# Supplementary High-Input Impedance Voltage-Mode Universal Biquadratic Filter Using DVCCs

Authors: Jitendra Mohan; Sudhanshu Maheshwari
Journal: Modelling and Simulation in Engineering
 (2012)

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## Abstract

To further extend the existing knowledge on voltage-mode universal biquadratic filter, in this paper, a new biquadratic filter circuit with single input and multiple outputs is proposed, employing three differential voltage current conveyors (DVCCs), three resistors, and two grounded capacitors. The proposed circuit realizes all the standard filter functions, that is, high-pass, band-pass, low-pass, notch, and all-pass filters simultaneously. The circuit enjoys the feature of high-input impedance, orthogonal control of resonance angular frequency (ωo), and quality factor (Q) via grounded resistor and the use of grounded capacitors which is ideal for IC implementation.


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## Body

## 1. Introduction

Analog filters are the basic building blocks and widely used for continuous-time signal processing. Application of analog filters employing current-mode active elements extends over a large number of fields [1]. The filter circuits may be used in phase-locked loop frequency modulation stereo demodulators, touch-tone telephone tone decoder, and cross-over networks in a three-way high fidelity loudspeaker [2, 3]. In the literature several voltage-mode biquadratic filters are presented which uses different types of current conveyors [4–28]. The voltage-mode filters with high-input impedance are of great interest because they can be easily cascaded to synthesize higher-order filters [7, 10, 13, 17, 26, 28]. In the literature there are a number of voltage-mode universal biquadratic filters with single-input multiple-outputs (SIMO) [4–12, 18] that are available. However, these reported circuits suffer from one or more of the following drawbacks:(i)
excessive use of passive components [4, 6, 7];(ii)
low-input impedance [5, 6, 8, 9, 11, 18];(iii)
lack of orthogonal control over the resonance angular frequency (ωo) and quality factor (Q) [10, 12].In this paper, a new voltage-mode universal biquadratic filter using three differential voltage current conveyors [29], two grounded capacitors, and three resistors is presented. The circuit realizes the entire standard filter functions, that is, high pass (HP), band pass (BP), low pass (LP), notch (NH), and all pass (AP) from the same circuit configuration. The circuit also possesses high-input impedance and provides orthogonal control of the ωo and Q via grounded resistor.


## 2. Differential Voltage Current Conveyor(DVCC)

The DVCC is first introduced long back as a modified current conveyor by Pal [30] and developed by Elwan and Soliman in 1997 [29]. It is a versatile building block, especially designed to handle differential and floating input signals [30, 31]. Using standard notation, the terminal relations of a DVCC are shown in Figure 1 and described by the following matrix equation:
(1)[IY1IY2VXIZ+IZ-]=[00000000001-10000010000-100][VY1VY2IXVZ+VZ-].(a) Symbol of DVCC. (b) CMOS implementation of DVCC.
(a)
(b)The difference of theY1 and Y2 terminal voltages is conveyed to the X terminal; the current input at the X terminal is conveyed to the Z+, with the same polarity and Z− terminal with inverse polarity. The DVCC is characterized by high-input impedance at the Y1 and Y2 terminals, high-output impedance at the Z+ and Z− terminals, and low impedance at the X terminal.


## 3. Proposed Circuit

The proposed voltage-mode universal biquadratic filter is shown in Figure2, employing three DVCCs, three resistors, and two grounded capacitors. The routine analysis of the proposed circuit in Figure 2 using (1) yields the filter transfer functions as
(2)VOUT1VIN=1s2C1C2R1R2+sC1R3+1VOUT2VIN=s2C1C2R1R2s2C1C2R1R2+sC1R3+1VOUT3VIN=sC1R1s2C1C2R1R2+sC1R3+1VOUT4VIN=s2C1C2R1R2+1s2C1C2R1R2+sC1R3+1VOUT5VIN=s2C1C2R1R2-sC1R1+1s2C1C2R1R2+sC1R3+1.
It can be seen from (2) that an LP response is obtained from VOUT1; HP response is obtained from VOUT2; BP response is obtained from VOUT3; NH response is obtained from VOUT4; if R3 = R1, AP response is obtained from VOUT5. In all the cases, the parameters ωo and Q of the filter can be found as
(3)ωo=(1C1C2R1R2)1/2,Q=1R3R1R2C2C1.
From (3), the Q of the proposed filter can be controlled independently of ωo by varying R3. Since the input voltage signal is connected directly to the Y1 port of the DVCC (1) and the input current to the Y1 port is zero (IY1 = 0), the circuit has the feature of high-input impedance. Thus the proposed circuit is capable to realize all five standard filter functions simultaneously and without changing the circuit topology, unlike the previously proposed circuit in [26]. The circuit reported in [26] uses two floating resistors but the proposed circuit employs only one floating resistor. The circuit needs no component-matching conditions except for the all-pass filter realization.Figure 2
Voltage-mode universal biquadratic filter.Note that the proposed circuit uses two grounded capacitors at theZ-terminal and three resistors at the X-terminal of the DVCCs. The design offers the feature of a direct incorporation of the shunt parasitic capacitances at the Z-terminals and the series parasitic resistances at the X-terminal, as a part of the main capacitors (C1 and C2) and resistors (R1, R2, and R3).


## 4. Nonideal Analysis

Taking the nonidealities of the DVCC into account, the relationship of the terminal voltages and currents of the DVCC can be rewritten as(4)[IY1IY2VXIZ+IZ-]=[0000000000βk1-βk200000αk10000-αk200][VY1VY2IXVZ+VZ-],
where βk1(s), βk2(s) represent the frequency transfers of the internal voltage followers and αk1(s), αk2(s) represent the frequency transfers of the internal current followers of the kth-DVCC, respectively. They can be approximated by first-order low-pass functions, which can be considered to have a unity value for frequencies [30]. If this circuit is working at frequencies much less than the corner frequencies of βk1(s), βk2(s), αk1(s), and, αk2(s), namely, then βk1(s) = βk1=1-εkv1 and εkv1(|εkv1≪1|) denotes the voltage tracking error from the Y1 terminal to the X terminal of the kth-DVCC; βk2(s)=βk2=1-εkv2 and εkv2(|εkv2≪1|) denotes the voltage tracking error from the Y2 terminal to the X terminal of the kth-DVCC, αk1(s)=αk1=1-εki1, and εki1(|εki1≪1|) denotes the current tracking error from the X terminal to the Z+ terminal; αk2(s)=αk2=1-εki2 and εki2(|εki2≪1|) denotes the current tracking error from the X terminal to the Z− terminal of the kth-DVCC.Taking the tracking errors of the nonideal DVCC into account, the denominator of (2) becomes
(5)D(s)=s2C1C2R2α22(R3α11+R1β12-R3α11β21)+sC1R3β22β31α11α22+β12β22β32.
The parameters ωo and Q from (5) can be rewritten as
(6)ωo=(β12β22β32C1C2R2α22(R3α11+R1β12-R3α11β21))1/2,Q=1R3β31α11(C2R2β12β32(R3α11+R1β12-R3α11β21)C1β22α22)1/2.
The active and passive sensitivities of the proposed SIMO voltage-mode filter are derived from (6). These are as follows:
(7)SC1,C2,R2ωo=-12,SR1ωo=-12R1β12(R3α11+R1β12-R3α11β21),Sβ22,β32ωo=-Sα22ωo=12,Sβ12ωo=12(R3α11-R3α11β21)(R3α11+R1β12-R3α11β21),SR3,α11ωo=-12R3α11(1-β21)(R3α11+R1β12-R3α11β21),Sβ21ωo=12R3α11β21(R3α11+R1β12-R3α11β21),SC2,R2Q=-SC1Q=12,Sβ32Q=-Sβ22,α22Q=12,SR1Q=12R1β12(R3α11(1-β21)+R1β12),SR3,α11Q=(-2R1β12-R3α11(1-β21))2(R3α11(1-β21)+R1β12),Sβ31Q=-1,Sβ12Q=12(R3α11+2R1β12-R3α11β21)(R3α11+R1β12-R3α11β21),Sβ21Q=-12R3α11β21(R3α11(1-β21)+R1β12).
From the results it is evident that the sensitivities are low and within unity in absolute value. Thus the proposed circuit can be classified as insensitive as all the active and passive sensitivities are less than or equal to unity [28].


## 5. Simulation Results

The performance of the proposed voltage-mode universal biquadratic filter in Figure2 is verified using the PSPICE simulation program. The MOS transistors are simulated using 0.35 μm CMOS process parameters given in Table 1. The aspect ratios of the transistors used in the simulation are given in Table 2. The supply voltages and biasing voltage are given by V+=2V, V-=-1.9V, Vb1=-1.23 V, and Vb2=-1.15V, respectively. The proposed circuit is designed for 3.18 MHz and Q = 1 by choosing R1=R2=R3=5 kΩ and C1=C2=10 pF. Figure 3 shows the simulated gain responses for the LP, HP, and BP filters and agrees well with the designed values. Figures 4 and 5 show the simulated gain and phase responses for the NH and AP filters. Next, Q tuning of BP filter at constant frequency of 3.18 MHz is shown in Figure 6. The circuit of Figure 2 is designed for Q values of 1, 5, and 10 with R3 values as 5 kΩ, 1 kΩ, and 500 Ω, respectively, with C1=C2=10 pF and R1=R2=5 kΩ.Table 1
TSMC 0.35μm CMOS process parameters.
NMOS
LEVEL
=
3
TOX
=
7.9
E
-
9
NSUB
=
1
E
17
GAMMA
=
0.5827871
PHI
=
0.7
VTO
=
0.5445549
DELTA
=
0
UO
=
436.256147
ETA
=
0
THETA
=
0.1749684
KP
=
2.055786
E
-
4
VMAX
=
8.309444
E
4
KAPPA
=
0.2574081
RSH
=
0.0559398
NFS
=
1
E
12
TPG
=
1
XJ
=
3
E
-
7
LD
=
3.162278
E
-
11
WD
=
7.04672
E
-
8
CGDO
=
2.82
E
-
10
CGSO
=
2.82
E
-
10
CGBO
=
1
E
-
10
CJ
=
1
E
-
3
PB
=
0.9758533
MJ
=
0.3448504
CJSW
=
3.777852
E
-
10
MJSW
=
0.3508721
PMOS
LEVEL
=
3
TOX
=
7.9
E
-
9
NSUB
=
1
E
17
GAMMA
=
0.4083894
PHI
=
0.7
VTO
=
-
0.7140674
DELTA
=
0
UO
=
212.2319801
ETA
=
9.999762
E
-
4
THETA
=
0.2020774
KP
=
6.733755
E
-
5
VMAX
=
1.181551
E
5
KAPPA
=
1.5
RSH
=
30.0712458
NFS
=
1
E
12
TPG
=
-
1
XJ
=
2
E
-
7
LD
=
5.000001
E
-
13
WD
=
1.249872
E
-
7
CGDO
=
3.09
E
-
10
CGSO
=
3.09
E
-
10
CGBO
=
1
E
-
10
CJ
=
1.419508
E
-
3
PB
=
0.8152753
MJ
=
0.5
CJSW
=
4.813504
E
-
10
MJSW
=
0.5Table 2
Aspect ratios of the MOS in Figure1.
MOS transistors
W (μm)
L (μm)
M1–M4
1.2
0.8
M7, M8
6.6
0.8
M9–M11, M17–M18
18.6
0.6
M5, M6, M12–M16
24
0.8Figure 3
Gain plots of LP, HP, and BP filters forQ = 1 at 3.18 MHz.Figure 4
Gain and phase plots of NH filter forQ = 1 at 3.18 MHz.Figure 5
Gain and phase plots of AP filter forQ = 1 at 3.18 MHz.Figure 6
Q tuning (Q = 1, 5, and 10) of BP filter at 3.18 MHz.To test the input dynamic range of the proposed filter, the simulation of the HP filter as example has been repeated for a sinusoidal input signal at 3.18 MHz.  Figure7 shows the input dynamic range of the HP filter which extends upto amplitude 200 mV (peak to peak) without significant distortion. In Figure 8, the total harmonic distortion (THD) of the VOUT2 output voltage is given at 3.18 MHz operation frequency. Figure 9 shows the INOISE and ONOISE simulated amplitude-frequency responses of the proposed LP filter at VOUT1.Input (a) and HP output (b) signal waveforms to demonstrate the ac dynamic range atVOUT2.
(a)
(b)Figure 8
THD variation withVIN for HP filter at VOUT2.Figure 9
The input and output referred noise spectral densities of the proposed LP filter atVOUT1.


## 6. Conclusion

The voltage-mode universal biquadratic filter realizes all the standard filter functions by employing three DVCCs and five passive components. It offers high-input impedance, which permit the use of circuits in cascade without requiring any impedance-matching device. Moreover, the proposed circuit enjoys the following features: orthogonal control ofωo and Q, low active and passive sensitivity, and the direct incorporation of parasitic resistance and parasitic capacitance at the X-terminal and Z-terminal of the respective DVCCs, as a part of main resistor and capacitor. So, the new circuit will enhance the existing knowledge on the voltage-mode universal biquadratic filter. PSPICE simulations with TSMC 0.35 μm process confirm the theoretical prediction.



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*Source: 184829-2012-09-06.xml*