# Design of CDTA and VDTA Based Frequency Agile Filters

Authors: Neeta Pandey; Aseem Sayal; Richa Choudhary; Rajeshwari Pandey
Journal: Advances in Electronics
 (2014)

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## Abstract

This paper presents frequency agile filters based on current difference transconductance amplifier (CDTA) and voltage difference transconductance amplifier (VDTA). The proposed agile filter configurations employ grounded passive components and hence are suitable for integration. Extensive SPICE simulations using 0.25μm TSMC CMOS technology model parameters are carried out for functional verification. The proposed configurations are compared in terms of performance parameters such as power dissipation, signal to noise ratio (SNR), and maximum output noise voltage.


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## Body

## 1. Introduction

The rapid evolution of wireless services has led to demand for one-fits-all “analog” front end solution. These services use different standards and therefore necessitate development of integrated multistandard transceivers as they result in reduction of size, price, complexity, and power consumption. The parameters of integrated transceiver can be modified in order to be able to adapt to the specifications of each standard [1]. Practically, the designs employ either elements handling various standards in parallel or reconfigurable elements. The frequency agile filter (FAF) [1–10] characterized by adjustment range, reconfigurability, and agility may be used in transceivers. The term shadow filters is sometimes used in literature to refer to FAF [11, 12]. The literature survey shows that a limited number of topologies of active FAF are available and are based on op-amp [1] and current mode active block [2, 3] and CMOS [4].There is a wide range of current mode building blocks available in open literature. Among these blocks current difference transconductance amplifier (CDTA) [11] is most suitable for current mode signal processing owing to its low input and high output impedances, respectively. The VDTA is yet another recently introduced building block which works on a principle similar to that of CDTA except that the input current differencing unit is replaced by the voltage differencing circuit. Many applications such as filters and oscillators based on CDTA and VDTA are available and have been reported in the literature [13–27] and references cited therein.The main intention of this paper is to present CDTA and VDTA based frequency agile filter topologies. The proposed filters are suitable for integration as these employ grounded capacitors and a resistor. The paper is organised as follows. The FAF implementation scheme is briefly reviewed in Section2. The CDTA based Class 0, Class 1, and Class 2 FAF are presented in Section 3. Section 4 deals with the realization of VDTA based Class 0, Class 1, and Class 2 FAF. In Section 5, nonideal analysis of filters is presented. Simulation results are provided in Section 6 to substantiate the proposed FAF topologies. The performance characteristics of filter topologies are described in Section 7. The paper is concluded in Section 8.


## 2. Implementation Scheme of FAF

The implementation scheme of frequency agile filter (FAF) [3] is briefly reviewed in this section.


### 2.1. Class 0 FAF

A classical second order filter with band pass (IBP) and low pass (ILP) outputs of Figure 1 is designated as Class 0 FAF [3]. The transfer functions of Class 0 FAF are given by
(1)TBPs=IBPIIN=ks1+αs+βs2,TLPs=ILPIIN=p1+αs+βs2.Figure 1
Class 0 FAF [3].The center frequency (f0) and quality factor (Q) of the filter are represented by (2) and (3), respectively:
(2)f0=12πβ,(3)Q=βα.


### 2.2. Class 1 FAF

The basic block diagram of Class 1 FAF is shown in Figure2 wherein the low pass output of the Class 0 FAF is amplified (with variable gain A) and fed back to the input. The characteristic frequency (f0A) and quality factor (QA) of Class 1 FAF are given by (4) and (5), respectively:
(4)f0A=f0(1+Ap),(5)QA=Q(1+Ap).Figure 2
Class 1 FAF.


### 2.3. Classn FAF

The method outlined for Class 1 FAF realization can be extended for Classn FAF implementation as shown in Figure 3. This requires n amplifiers each with gain A (A1=A2=⋯=An-1=An) to be placed in n feedback paths obtained in the same way as done in Class 1 implementation. The characteristic parameters of Class n FAF are given by
(6)f0An=f01+Apn/2,QAn=Q1+Apn/2.Figure 3
Classn FAF.


## 2.1. Class 0 FAF

A classical second order filter with band pass (IBP) and low pass (ILP) outputs of Figure 1 is designated as Class 0 FAF [3]. The transfer functions of Class 0 FAF are given by
(1)TBPs=IBPIIN=ks1+αs+βs2,TLPs=ILPIIN=p1+αs+βs2.Figure 1
Class 0 FAF [3].The center frequency (f0) and quality factor (Q) of the filter are represented by (2) and (3), respectively:
(2)f0=12πβ,(3)Q=βα.


## 2.2. Class 1 FAF

The basic block diagram of Class 1 FAF is shown in Figure2 wherein the low pass output of the Class 0 FAF is amplified (with variable gain A) and fed back to the input. The characteristic frequency (f0A) and quality factor (QA) of Class 1 FAF are given by (4) and (5), respectively:
(4)f0A=f0(1+Ap),(5)QA=Q(1+Ap).Figure 2
Class 1 FAF.


## 2.3. Classn FAF

The method outlined for Class 1 FAF realization can be extended for Classn FAF implementation as shown in Figure 3. This requires n amplifiers each with gain A (A1=A2=⋯=An-1=An) to be placed in n feedback paths obtained in the same way as done in Class 1 implementation. The characteristic parameters of Class n FAF are given by
(6)f0An=f01+Apn/2,QAn=Q1+Apn/2.Figure 3
Classn FAF.


## 3. CDTA Based FAF

The CDTA [11–18] consists of a unity-gain current source controlled by the difference of the input currents and a transconductance amplifier providing electronic tunability through its transconductance gain. The CDTA symbol is shown in Figure 4 and its terminal characteristics in matrix form are given by
(7)VpVnIzIx+Ix-=00000000001-100000g0000g00IpInVzVx+Vx-,
where g is transconductance of the CDTA. The CMOS implementation of CDTA [16] is given in Figure 5. The transistor network comprising transistors Mc1–Mc17 performs [16] current differencing operation on the currents entering at p and n nodes, which is available at Z terminal. The voltage of z terminal drives the source coupled pair (transistors (Mc18–Mc21)) [16] of differential amplifier (Mc18–Mc26) giving a transconductance of g. The value of transconductance (g) is expressed as
(8)g=2μCoxWL19,21IBias,
which can be adjusted by bias current IBias of CDTA.Figure 4
Symbol of CDTA.Figure 5
CMOS implementation of CDTA [16].


### 3.1. CDTA Based Class 0 FAF

The CDTA based second order filter employing two CDTA blocks and two grounded capacitors is shown in Figure6. The second CDTA block uses additional TA block with its current output terminals denoted by xc+ and xc-. It provides both low pass and band pass responses at high output impedance and can be used as Class 0 FAF. The current flowing through x+ and x- is controlled through transconductance g2 whereas current flowing through terminals xc+ and xc- is controlled through g3. The low pass and band pass transfer functions of CDTA based Class 0 FAF are given by (9) and (10), respectively:
(9)ILPIIN=g1g2C1C2s2+sC1g3+g1g2,(10)IBPIIN=sC2g1C1C2s2+sC1g3+g1g2.Figure 6
CDTA based Class 0 FAF.The center frequency and quality factor of Class 0 FAF are expressed as(11)f0=12πg1g2C1C2,(12)Q=1g3g1g2C2C1.It may be noted that theQ of the Class 0 FAF can be controlled independent of f0 by varying g3.


### 3.2. CDTA Based Class 1 FAF

The CDTA based Class 1 FAF is shown in Figure7. It employs Class 0 FAF of Figure 6 along with an additional TA block (provides an output current which is product of its transconductance and voltage difference between noninverting (+) and inverting (−) terminals) and one grounded resistor. The TA block in the feedback path functions as an amplifier with tunable gain A as given in
(13)A=g4R,
where g4 is the transconductance of TA block and is given by 2μCox(W/L)19,21IBias4.Figure 7
CDTA based Class 1 FAF.The low pass and band pass transfer functions of CDTA based Class 1 FAF are given by (14) and (15), respectively:
(14)ILPIIN=g1g2C1C2s2+sC1g3+g1g2(1+Rg4),(15)IBPIIN=sg1C2C1C2s2+sC1g3+g1g2(1+Rg4).The center frequency and quality factor of the CDTA based Class 1 FAF are expressed by (16) and (17), respectively:
(16)f0A=12πg1g2C1C2(1+g4R),(17)QA=1g3g1g2C2C1(1+g4R).


### 3.3. CDTA Based Class 2 FAF

The CDTA based Class 2 FAF is shown in Figure8. It employs two CDTA blocks, two grounded capacitors, three TA blocks, and two grounded resistors. The TA blocks in the feedback path are used as amplifier with tunable gain A. The gain A of TA based amplifier is given by (18). The second CDTA block uses two additional TA blocks. It provides both low pass and band pass responses at high output impedance and can be used as Class 0 FAF. The current flowing through x+, x-, xcc+, and xcc- is controlled through transconductance g2 whereas current flowing through terminals xc+ and xc- is controlled through g3:
(18)A=g4R.Figure 8
CDTA based Class 2 FAF.The low pass and band pass transfer functions of CDTA based Class 1 FAF are given by (19) and (20), respectively:
(19)ILPIIN=g1g2C1C2s2+sC1g3+g1g21+Rg42,(20)IBPIIN=sg1C2C1C2s2+sC1g3+g1g21+Rg42.The center frequency and quality factor of the CDTA based Class 1 FAF are expressed by (21) and (22), respectively:
(21)f0A=12πg1g2C1C21+g4R,(22)QA=1g3g1g2C2C11+g4R.The proposed filter uses grounded resistor of valueR(=1/g) which can easily be implemented using the TA based structure given in Figure 9.Figure 9
TA realization of a grounded resistor.


## 3.1. CDTA Based Class 0 FAF

The CDTA based second order filter employing two CDTA blocks and two grounded capacitors is shown in Figure6. The second CDTA block uses additional TA block with its current output terminals denoted by xc+ and xc-. It provides both low pass and band pass responses at high output impedance and can be used as Class 0 FAF. The current flowing through x+ and x- is controlled through transconductance g2 whereas current flowing through terminals xc+ and xc- is controlled through g3. The low pass and band pass transfer functions of CDTA based Class 0 FAF are given by (9) and (10), respectively:
(9)ILPIIN=g1g2C1C2s2+sC1g3+g1g2,(10)IBPIIN=sC2g1C1C2s2+sC1g3+g1g2.Figure 6
CDTA based Class 0 FAF.The center frequency and quality factor of Class 0 FAF are expressed as(11)f0=12πg1g2C1C2,(12)Q=1g3g1g2C2C1.It may be noted that theQ of the Class 0 FAF can be controlled independent of f0 by varying g3.


## 3.2. CDTA Based Class 1 FAF

The CDTA based Class 1 FAF is shown in Figure7. It employs Class 0 FAF of Figure 6 along with an additional TA block (provides an output current which is product of its transconductance and voltage difference between noninverting (+) and inverting (−) terminals) and one grounded resistor. The TA block in the feedback path functions as an amplifier with tunable gain A as given in
(13)A=g4R,
where g4 is the transconductance of TA block and is given by 2μCox(W/L)19,21IBias4.Figure 7
CDTA based Class 1 FAF.The low pass and band pass transfer functions of CDTA based Class 1 FAF are given by (14) and (15), respectively:
(14)ILPIIN=g1g2C1C2s2+sC1g3+g1g2(1+Rg4),(15)IBPIIN=sg1C2C1C2s2+sC1g3+g1g2(1+Rg4).The center frequency and quality factor of the CDTA based Class 1 FAF are expressed by (16) and (17), respectively:
(16)f0A=12πg1g2C1C2(1+g4R),(17)QA=1g3g1g2C2C1(1+g4R).


## 3.3. CDTA Based Class 2 FAF

The CDTA based Class 2 FAF is shown in Figure8. It employs two CDTA blocks, two grounded capacitors, three TA blocks, and two grounded resistors. The TA blocks in the feedback path are used as amplifier with tunable gain A. The gain A of TA based amplifier is given by (18). The second CDTA block uses two additional TA blocks. It provides both low pass and band pass responses at high output impedance and can be used as Class 0 FAF. The current flowing through x+, x-, xcc+, and xcc- is controlled through transconductance g2 whereas current flowing through terminals xc+ and xc- is controlled through g3:
(18)A=g4R.Figure 8
CDTA based Class 2 FAF.The low pass and band pass transfer functions of CDTA based Class 1 FAF are given by (19) and (20), respectively:
(19)ILPIIN=g1g2C1C2s2+sC1g3+g1g21+Rg42,(20)IBPIIN=sg1C2C1C2s2+sC1g3+g1g21+Rg42.The center frequency and quality factor of the CDTA based Class 1 FAF are expressed by (21) and (22), respectively:
(21)f0A=12πg1g2C1C21+g4R,(22)QA=1g3g1g2C2C11+g4R.The proposed filter uses grounded resistor of valueR(=1/g) which can easily be implemented using the TA based structure given in Figure 9.Figure 9
TA realization of a grounded resistor.


## 4. The VDTA Based FAF

The circuit symbol and the CMOS realization of VDTA [20, 21] are shown in Figures 10 and 11, respectively. The VDTA consists of two transconductance (TC) stages termed as input and output stages. The input differential voltage (Vp-Vn) is converted to current Iz through TC gain (g1) of input stage and second stage converts the voltage at z terminal (Vz) to current (Ix) through its TC gain (g2). The port relations of VDTA can thus be defined by the following matrix:
(23)IzIzcIx+Ix-=g1-g10-g1g1000g200-g2VpVnVz.Figure 10
Symbol of VDTA.Figure 11
CMOS implementation of VDTA [21].The TCg1 and TC g2 are expressed by (24) which can be adjusted by bias currents IBias1 and IBias2, respectively:
(24)g1=2μCoxWL1,2IBias1,g2=2μCoxWL5,6IBias2.


### 4.1. VDTA Based Class 0 FAF

The VDTA based Class 0 FAF employing single VDTA and two grounded capacitors is shown in Figure12. This circuit configuration is based on second order filter presented in [21]. However, to allow independent control of quality factor and center frequency an additional TA block with transconductance g2 is included in VDTA. The current flowing through z terminal is controlled by transconductance g1 whereas current flowing through zc terminal is controlled by g2. The terminal characteristics of the modified VDTA block are given by (25). The low pass and band pass transfer functions of VDTA based Class 0 FAF are given by (26) and (27), respectively:
(25)IzIzcIz′Izc′Ix+Ix-=g1-g10-g1g10g2-g20-g2g2000g300-g3VpVnVz,(26)ILPIIN=g1g3C1C2s2+sC2g2+g1g3,(27)IBPIIN=sC2g1C1C2s2+sC2g2+g1g3.Figure 12
The VDTA based Class 0 FAF.The center frequency and quality factor of Class 0 FAF are expressed by (28). The center frequency can be controlled by IBias1 and IBias3 whereas quality factor can be independently controlled by IBias2:
(28)f0=12πg1g3C1C2,Q=1g2g1g3C1C2.


### 4.2. VDTA Based Class 1 FAF

The VDTA based Class 1 FAF is shown in Figure13. It employs two VDTA blocks and two grounded capacitors. The second VDTA block is used as amplifier with tunable gain A. The gain A of VDTA based amplifier is given by
(29)A=g4g3
and can be adjusted by varying IBias3 and IBias4.Figure 13
VDTA based Class 1 FAF.The low pass and band pass transfer functions of VDTA based Class 1 FAF are given by (30) and (31), respectively:
(30)ILPIIN=g1g3C1C2s2+sC2g2+g1g31+(g4/g3),(31)IBPIIN=sg1C2C1C2s2+sC2g2+g1g31+(g4/g3).The center frequency and quality factor of the CDTA based Class 1 FAF are expressed by (32) and (33), respectively. The center frequency can be independently controlled by varying IBias2 without changing center frequency:
(32)f0A=12πg1g3C1C21+g4g3,(33)QA=1g2g1g3C1C21+g4g3.


### 4.3. VDTA Based Class 2 FAF

The VDTA based Class 2 FAF is shown in Figure14 which employs three VDTAs, two grounded capacitors and one grounded resistor. The second VDTA block is used as amplifier with tunable gain A. The gain A of VDTA based amplifier is given by (34). The proposed filter uses grounded resistor which can easily be implemented using the TA with transconductance equal to g3 based structure given in Figure 9. To realize second order filter, IBias7 is set to value of IBias4 such that g7 is equal to g4 and IBias6 is set to value such that g6 is equal to sum of g3 and g4; that is, g6 = g3 + g4. Consider
(34)A=g4g3,
which can be adjusted by varying IBias3 and IBias2, thereby making f0A tunable.Figure 14
VDTA based Class 2 FAF.The low pass and band pass transfer functions of CDTA based Class 1 FAF are given by (35) and (36), respectively:
(35)ILPIIN=g1g3C1C2s2+sC2g2+g1g31+(g4/g3)2,(36)IBPIIN=sg1C2C1C2s2+sC2g2+g1g31+(g4/g3)2.The center frequency and quality factor of the CDTA based Class 1 FAF are expressed by (37) and (38), respectively:
(37)f0A=12πg1g3C1C21+g4g3,(38)QA=1g2g1g3C1C21+g4g3.


## 4.1. VDTA Based Class 0 FAF

The VDTA based Class 0 FAF employing single VDTA and two grounded capacitors is shown in Figure12. This circuit configuration is based on second order filter presented in [21]. However, to allow independent control of quality factor and center frequency an additional TA block with transconductance g2 is included in VDTA. The current flowing through z terminal is controlled by transconductance g1 whereas current flowing through zc terminal is controlled by g2. The terminal characteristics of the modified VDTA block are given by (25). The low pass and band pass transfer functions of VDTA based Class 0 FAF are given by (26) and (27), respectively:
(25)IzIzcIz′Izc′Ix+Ix-=g1-g10-g1g10g2-g20-g2g2000g300-g3VpVnVz,(26)ILPIIN=g1g3C1C2s2+sC2g2+g1g3,(27)IBPIIN=sC2g1C1C2s2+sC2g2+g1g3.Figure 12
The VDTA based Class 0 FAF.The center frequency and quality factor of Class 0 FAF are expressed by (28). The center frequency can be controlled by IBias1 and IBias3 whereas quality factor can be independently controlled by IBias2:
(28)f0=12πg1g3C1C2,Q=1g2g1g3C1C2.


## 4.2. VDTA Based Class 1 FAF

The VDTA based Class 1 FAF is shown in Figure13. It employs two VDTA blocks and two grounded capacitors. The second VDTA block is used as amplifier with tunable gain A. The gain A of VDTA based amplifier is given by
(29)A=g4g3
and can be adjusted by varying IBias3 and IBias4.Figure 13
VDTA based Class 1 FAF.The low pass and band pass transfer functions of VDTA based Class 1 FAF are given by (30) and (31), respectively:
(30)ILPIIN=g1g3C1C2s2+sC2g2+g1g31+(g4/g3),(31)IBPIIN=sg1C2C1C2s2+sC2g2+g1g31+(g4/g3).The center frequency and quality factor of the CDTA based Class 1 FAF are expressed by (32) and (33), respectively. The center frequency can be independently controlled by varying IBias2 without changing center frequency:
(32)f0A=12πg1g3C1C21+g4g3,(33)QA=1g2g1g3C1C21+g4g3.


## 4.3. VDTA Based Class 2 FAF

The VDTA based Class 2 FAF is shown in Figure14 which employs three VDTAs, two grounded capacitors and one grounded resistor. The second VDTA block is used as amplifier with tunable gain A. The gain A of VDTA based amplifier is given by (34). The proposed filter uses grounded resistor which can easily be implemented using the TA with transconductance equal to g3 based structure given in Figure 9. To realize second order filter, IBias7 is set to value of IBias4 such that g7 is equal to g4 and IBias6 is set to value such that g6 is equal to sum of g3 and g4; that is, g6 = g3 + g4. Consider
(34)A=g4g3,
which can be adjusted by varying IBias3 and IBias2, thereby making f0A tunable.Figure 14
VDTA based Class 2 FAF.The low pass and band pass transfer functions of CDTA based Class 1 FAF are given by (35) and (36), respectively:
(35)ILPIIN=g1g3C1C2s2+sC2g2+g1g31+(g4/g3)2,(36)IBPIIN=sg1C2C1C2s2+sC2g2+g1g31+(g4/g3)2.The center frequency and quality factor of the CDTA based Class 1 FAF are expressed by (37) and (38), respectively:
(37)f0A=12πg1g3C1C21+g4g3,(38)QA=1g2g1g3C1C21+g4g3.


## 5. Nonideal Analysis

In this section, nonideal analysis of CDTA and VDTA based Class 0 FAF is presented.


### 5.1. Nonideal Analysis of Class 0 CDTA Based FAF

In practice, the transfer functions (9) and (10) modify due to nonidealities which are classified as tracking errors and parasites. The tracking errors cause current transfer from p and n ports to z port to differ from unity value and are represented by αp and αn. There is deviation in transconductance transfer from z to x+ and x- ports which is modeled by βgVz. The parasites denoted by resistances Rp and Rn are at p and n terminals; shunt output impedances (R//C) are present at terminals z, zc, x+ and x-, and xc+ and xc-. The effect of the parasites is highly dependent on the topology. A close inspection of the circuit of Figure 6 shows that the parasitic capacitances present at z terminal can be easily accommodated in external capacitances.Reanalysis of the proposed circuit (Figure6) yields the following nonideal transfer functions:(39a)ILPIIN=αn2β2g1g2Q1Dn1(s),(39b)IBPIIN=αn2βg1(sC2eq+Gz)Q1Dn1(s),
where
(39c)Dns=P1Q1(sC1eq+Gz)(sC2eq+Gz)+αpβg3P1(sC1eq+Gz)+αpαnβ2g1g2,P1=1+GXRn+sCXRn;Q1=1+GXRp+sCXRp;C1eq=C1+Cz;C2eq=C2+Cz;Gz=1RZ;GX=1RX.Choosing operating frequencies belowmin⁡⁡(1/CXRp,1/CXRn) (as GXRn≪1 and GXRp≪1) the terms P1 and Q1 would not affect the transfer function. For frequencies below min⁡⁡(GZ/C1eq,GZ/C2eq), (39c) modifies to
(39d)Dns=s2C1eqC2eq+αpβg3sC1eq+αpαnβ2g1g2,and transfer functions (39b) and (39c) change to(40a)ILPIIN=αn2β2g1g2Dn(s),(40b)IBPIIN=αn2βg1sC2eqDn(s).The center frequency, quality factor of Class 0 FAF can be expressed as(41a)f0=12παnαpβ2g1g2C1eqC2eq,(41b)Q=1g3αnαpg1g2C2eqC1eq.It is clear that the transfer functions and filter parameters ((40a),   (40b) and (41a), (41b)) deviate from the ideal value in presence of nonidealities. The change can, however, be accommodated by adjusting bias currents.


### 5.2. Nonideal Analysis of Class 0 VDTA Based FAF

Considering the nonideal characteristics of the VDTA, the port relations of current and voltage in (25) can be rewritten as
(42)IzIzcIz′Izc′Ix+Ix-=βg1-βg10-βg1βg10βg2-βg20-βg2βg2000βg300-βg3VpVnVz,
where β represents the tracking error. Apart from tracking error, the parasites appear as shunt impedances (R//C) at ports p, n, z, zc, and x+ denoted by (Rp//Cp), (Rn//Cn), (Rz//Cz), (Rz//Cz), and (Rx//Cx), respectively. The parasitic capacitances present at p, z, zc, and x terminal can be easily accommodated in external capacitances.Reanalysis of the proposed circuit in Figure12 yields the following nonideal transfer functions of Class 0 VDTA based FAF.Then(43a)ILPIIN=g1g3β2Dn2(s),(43b)IBPIIN=βg1(sC2eq+GZ)Dn2(s),
where
(43c)Dn2s=(sC2eq+Gz)(sC1eq+Gx+Gz+Gp+βg2)+β2g1g3,C1eq=C1+Cx+Cz+Cp;C2eq=C2+Cz;Gz=1RZ;GX=1RX;Gp=1Rp.AsGx+Gz+Gp≪βg2, (43c) modifies to
(44)Dn2s=sC2eq+GZsC1eq+βg2+β2g1g3.Choosing operating frequencies below min (GZ/C1eq,GZ/C2eq)  (44) reduces to
(45)Dn2s=s2C1eqC2eq+sC2eqβg2+β2g1g3,
and the transfer function (43b) simplifies to(46a)ILPIIN=g1g3β2Dn2(s),(46b)IBPIIN=βg1sC2eqDn2(s).And the filter parameters are calculated as(47a)f0=12πβ2g1g3C1eqC2eq,(47b)Q=1g2g1g3C2eqC1eq.It is clear that the transfer functions and filter parameters ((46a), (46b) and (47a), (47b)) deviate from the ideal value in presence of nonidealities. The change can, however, be accommodated by adjusting bias currents.


## 5.1. Nonideal Analysis of Class 0 CDTA Based FAF

In practice, the transfer functions (9) and (10) modify due to nonidealities which are classified as tracking errors and parasites. The tracking errors cause current transfer from p and n ports to z port to differ from unity value and are represented by αp and αn. There is deviation in transconductance transfer from z to x+ and x- ports which is modeled by βgVz. The parasites denoted by resistances Rp and Rn are at p and n terminals; shunt output impedances (R//C) are present at terminals z, zc, x+ and x-, and xc+ and xc-. The effect of the parasites is highly dependent on the topology. A close inspection of the circuit of Figure 6 shows that the parasitic capacitances present at z terminal can be easily accommodated in external capacitances.Reanalysis of the proposed circuit (Figure6) yields the following nonideal transfer functions:(39a)ILPIIN=αn2β2g1g2Q1Dn1(s),(39b)IBPIIN=αn2βg1(sC2eq+Gz)Q1Dn1(s),
where
(39c)Dns=P1Q1(sC1eq+Gz)(sC2eq+Gz)+αpβg3P1(sC1eq+Gz)+αpαnβ2g1g2,P1=1+GXRn+sCXRn;Q1=1+GXRp+sCXRp;C1eq=C1+Cz;C2eq=C2+Cz;Gz=1RZ;GX=1RX.Choosing operating frequencies belowmin⁡⁡(1/CXRp,1/CXRn) (as GXRn≪1 and GXRp≪1) the terms P1 and Q1 would not affect the transfer function. For frequencies below min⁡⁡(GZ/C1eq,GZ/C2eq), (39c) modifies to
(39d)Dns=s2C1eqC2eq+αpβg3sC1eq+αpαnβ2g1g2,and transfer functions (39b) and (39c) change to(40a)ILPIIN=αn2β2g1g2Dn(s),(40b)IBPIIN=αn2βg1sC2eqDn(s).The center frequency, quality factor of Class 0 FAF can be expressed as(41a)f0=12παnαpβ2g1g2C1eqC2eq,(41b)Q=1g3αnαpg1g2C2eqC1eq.It is clear that the transfer functions and filter parameters ((40a),   (40b) and (41a), (41b)) deviate from the ideal value in presence of nonidealities. The change can, however, be accommodated by adjusting bias currents.


## 5.2. Nonideal Analysis of Class 0 VDTA Based FAF

Considering the nonideal characteristics of the VDTA, the port relations of current and voltage in (25) can be rewritten as
(42)IzIzcIz′Izc′Ix+Ix-=βg1-βg10-βg1βg10βg2-βg20-βg2βg2000βg300-βg3VpVnVz,
where β represents the tracking error. Apart from tracking error, the parasites appear as shunt impedances (R//C) at ports p, n, z, zc, and x+ denoted by (Rp//Cp), (Rn//Cn), (Rz//Cz), (Rz//Cz), and (Rx//Cx), respectively. The parasitic capacitances present at p, z, zc, and x terminal can be easily accommodated in external capacitances.Reanalysis of the proposed circuit in Figure12 yields the following nonideal transfer functions of Class 0 VDTA based FAF.Then(43a)ILPIIN=g1g3β2Dn2(s),(43b)IBPIIN=βg1(sC2eq+GZ)Dn2(s),
where
(43c)Dn2s=(sC2eq+Gz)(sC1eq+Gx+Gz+Gp+βg2)+β2g1g3,C1eq=C1+Cx+Cz+Cp;C2eq=C2+Cz;Gz=1RZ;GX=1RX;Gp=1Rp.AsGx+Gz+Gp≪βg2, (43c) modifies to
(44)Dn2s=sC2eq+GZsC1eq+βg2+β2g1g3.Choosing operating frequencies below min (GZ/C1eq,GZ/C2eq)  (44) reduces to
(45)Dn2s=s2C1eqC2eq+sC2eqβg2+β2g1g3,
and the transfer function (43b) simplifies to(46a)ILPIIN=g1g3β2Dn2(s),(46b)IBPIIN=βg1sC2eqDn2(s).And the filter parameters are calculated as(47a)f0=12πβ2g1g3C1eqC2eq,(47b)Q=1g2g1g3C2eqC1eq.It is clear that the transfer functions and filter parameters ((46a), (46b) and (47a), (47b)) deviate from the ideal value in presence of nonidealities. The change can, however, be accommodated by adjusting bias currents.


## 6. Simulation Results

In this section, the functionality of the proposed filters has been verified. The SPICE simulations results for CDTA and VDTA based filters have been presented using TSMC 0.25μm CMOS process model parameters and supply voltages of VDD=-VSS=1.8 V.


### 6.1. Simulation of CDTA Based FAF

The CMOS schematic of Figure5 is used for verifying CDTA based FAF and the aspect ratios of the MOS transistors are given in Table 1. The additional TA blocks in CDTA providing current ports (xC+, xC-, xcc+, and xcc-) use aspect ratios same as that for x+ and x-. The capacitors C1 and C2 are chosen as 50 pF each. The grounded resistor of Figure 7 is realized using TA block. The bias current is set as 0.85 μA to realize a resistor of value 10 kΩ. The frequency responses of CDTA based Class 0, Class 1, and Class 2 FAF topologies are depicted in Figures 15, 16, and 17, respectively. The responses are obtained by varying bias currents IBias1 and IBias2 (IBias=IBias1=IBias2) to 1 μA, 10 μA, 30 μA, and 60 μA while keeping IBias3 and IBias4, respectively, at 0.5 μA and 10 μA. It can be clearly noticed that center frequency f0 increases on increasing the bias current.Table 1
Aspect ratios of MOS transistors used in CDTA.
MOSFETs
W (μm)/L (μm)
Mc26
7.0/0.7
Mc1
9.8/0.7
Mc2, Mc3, Mc13, Mc16, Mc17
10.5/0.7
Mc19, Mc21
16.1/0.7
Mc6, Mc20
28.0/0.7
Mc8, Mc10, Mc18
28.7/0.7
Mc15, Mc12, Mc5
35.0/0.7
Mc4, Mc14
42.0/0.7
Mc22, Mc23, Mc25
56.0/0.7
Mc24
58.8/0.7
Mc7, Mc9, Mc11
70.0/0.7Figure 15
Frequency response of CDTA based Class 0 FAF withIBias1=IBias2=IBias.Figure 16
Frequency response of CDTA based Class 1 FAF withIBias1=IBias2=IBias.Figure 17
Frequency response of CDTA based Class 2 FAF withIBias1=IBias2=IBias.The electronic tunability of quality factor and center frequency for proposed Class 0, Class 1, and Class 2 CDTA based FAF is plotted in Figures18 and 19, respectively. The analytical and simulated responses describing variation of quality factor are shown in Figure 18 for different values of IBias3 while setting IBias1 and IBias2 to 30 μA. Figure 19 depicts the analytical and simulated responses for center frequency variation for different values of IBias1 and IBias2 (IBias1=IBias2) while setting IBias3 to 0.5 μA. To plot responses for Class 1 and Class 2 CDTA based FAF the bias current IBias4 is taken as 10 μA.Figure 18
ElectronicQ-factor control of CDTA based FAF.Figure 19
Electronic center frequency control of CDTA based FAF.The transient behaviour of proposed CDTA based FAF is also studied by applying input signals of frequencies 100 KHz, 500 KHz, 1 MHz, and 10 MHz, each having an amplitude of 10μA. The responses for Class 0 FAF are obtained by setting bias currents IBias1 and IBias2 each to 10 μA and IBias3 to 0.5 μA. Figure 20 shows the input and output waveforms along with their frequency spectrum for CDTA based Class 0 FAF. It may clearly be noted that the CDTA based Class 0 FAF allows only 1 MHz signal to pass and significantly attenuates signals of frequencies 100 KHz, 500 KHz, and 10 MHz. Similar responses for Class 1 and Class 2 FAF were also obtained.Figure 20
((a) and (c)) Input and its frequency spectrum. ((b) and (d)) Output and its frequency spectrum for Class 0 FAF.


### 6.2. Simulation of VDTA Based FAF

The CMOS schematic of Figure12 is used for verifying VDTA based FAF and the aspect ratios of the MOS transistors are given in Table 2. The capacitors C1 and C2 are taken as 50 pF each. In the realization of Class 2 FAF, the grounded resistor is implemented by TA block. The frequency responses of VDTA based Class 0, Class 1, and Class 2 FAF topologies are shown in Figures 21, 22, and 23, respectively. The responses are obtained by keeping IBias2 to 5 μA and setting bias currents IBias1 and IBias3 (IBias=IBias1=IBias3) to 5 μA, 10 μA, 30 μA, and 60 μA. In realization of Class 1 FAF, IBias4 is set to obtain g4/g3 = 3 while keeping IBias5 equal to IBias1. In realization of Class 2 FAF, IBias6 is selected such that g6=g3+g4 while IBias7 is equal to IBias4.Table 2
Aspect ratios of MOS transistors used in VDTA.
MOSFETs
W (µm)/L (µm)
M1, M2, M5, M6
16.1/0.7
M3, M4, M7, M8
28/0.7
M9–M12
21/0.7
M13–M16
7/0.7
M14, M15, M17, M18
8.5/0.7Figure 21
Frequency response of VDTA based Class 0 FAF withIBias1=IBias3=IBias.Figure 22
Frequency response of VDTA based Class 1 FAF withIBias1=IBias3=IBias.Figure 23
Frequency response of VDTA based Class 2 FAF withIBias1=IBias3=IBias.The electronic tunability of quality factor and center frequency for proposed Class 0, Class 1, and Class 2 VDTA based FAF is plotted in Figures24 and 25, respectively. The analytical and simulated responses describing variation of quality factor are shown in Figure 24 for different values of IBias2 while setting IBias1 and IBias3 to 30 μA in Class 0. To plot responses for Class 1, IBias4 is set to get g4/g3 = 3 and IBias5 is set equal to IBias1. Class 2 FAF responses are plotted by selecting IBias6 to obtain g6 = g3+g4 while IBias7 is equal to IBias4. Figure 25 depicts the analytical and simulated responses for center frequency variation for different values of IBias1 and IBias3 (IBias1=IBias3) and keeping IBias2 to 5 μA. To plot responses for Class 1, IBias4 is set to a value in such a manner that g4/g3 = 3 whereas IBias5 is set equal to IBias1. The Class 2 FAF responses are plotted by setting IBias6 to value such that g6 = g3+g4 whereas IBias7 is equal to IBias4.Figure 24
ElectronicQ-factor control of VDTA based FAF.Figure 25
Electronic center frequency control of VDTA based FAF.The transient behaviour of proposed agile filter is also studied by applying input signals of frequencies 100 KHz, 500 KHz, 1 MHz, and 10 MHz, each having an amplitude of 10μA. The responses for Class 0 FAF are obtained by setting bias currents IBias1, IBias2, and IBias3 each to 30 μA. The input and output waveforms along with their frequency spectrum for VDTA based Class 0 FAF are shown in Figure 26. It may clearly be noted that the VDTA based Class 0 FAF allows only 1 MHz signal to pass, partially attenuates signal of frequency 500 KHz, and significantly attenuates signals of frequencies 100 KHz and 10 MHz. Similar responses for Class 1 and Class 2 FAF are also obtained.Figure 26
((a) and (c)) Input and its frequency spectrum. ((b) and (d)) Output and its frequency spectrum for Class 0 FAF.


## 6.1. Simulation of CDTA Based FAF

The CMOS schematic of Figure5 is used for verifying CDTA based FAF and the aspect ratios of the MOS transistors are given in Table 1. The additional TA blocks in CDTA providing current ports (xC+, xC-, xcc+, and xcc-) use aspect ratios same as that for x+ and x-. The capacitors C1 and C2 are chosen as 50 pF each. The grounded resistor of Figure 7 is realized using TA block. The bias current is set as 0.85 μA to realize a resistor of value 10 kΩ. The frequency responses of CDTA based Class 0, Class 1, and Class 2 FAF topologies are depicted in Figures 15, 16, and 17, respectively. The responses are obtained by varying bias currents IBias1 and IBias2 (IBias=IBias1=IBias2) to 1 μA, 10 μA, 30 μA, and 60 μA while keeping IBias3 and IBias4, respectively, at 0.5 μA and 10 μA. It can be clearly noticed that center frequency f0 increases on increasing the bias current.Table 1
Aspect ratios of MOS transistors used in CDTA.
MOSFETs
W (μm)/L (μm)
Mc26
7.0/0.7
Mc1
9.8/0.7
Mc2, Mc3, Mc13, Mc16, Mc17
10.5/0.7
Mc19, Mc21
16.1/0.7
Mc6, Mc20
28.0/0.7
Mc8, Mc10, Mc18
28.7/0.7
Mc15, Mc12, Mc5
35.0/0.7
Mc4, Mc14
42.0/0.7
Mc22, Mc23, Mc25
56.0/0.7
Mc24
58.8/0.7
Mc7, Mc9, Mc11
70.0/0.7Figure 15
Frequency response of CDTA based Class 0 FAF withIBias1=IBias2=IBias.Figure 16
Frequency response of CDTA based Class 1 FAF withIBias1=IBias2=IBias.Figure 17
Frequency response of CDTA based Class 2 FAF withIBias1=IBias2=IBias.The electronic tunability of quality factor and center frequency for proposed Class 0, Class 1, and Class 2 CDTA based FAF is plotted in Figures18 and 19, respectively. The analytical and simulated responses describing variation of quality factor are shown in Figure 18 for different values of IBias3 while setting IBias1 and IBias2 to 30 μA. Figure 19 depicts the analytical and simulated responses for center frequency variation for different values of IBias1 and IBias2 (IBias1=IBias2) while setting IBias3 to 0.5 μA. To plot responses for Class 1 and Class 2 CDTA based FAF the bias current IBias4 is taken as 10 μA.Figure 18
ElectronicQ-factor control of CDTA based FAF.Figure 19
Electronic center frequency control of CDTA based FAF.The transient behaviour of proposed CDTA based FAF is also studied by applying input signals of frequencies 100 KHz, 500 KHz, 1 MHz, and 10 MHz, each having an amplitude of 10μA. The responses for Class 0 FAF are obtained by setting bias currents IBias1 and IBias2 each to 10 μA and IBias3 to 0.5 μA. Figure 20 shows the input and output waveforms along with their frequency spectrum for CDTA based Class 0 FAF. It may clearly be noted that the CDTA based Class 0 FAF allows only 1 MHz signal to pass and significantly attenuates signals of frequencies 100 KHz, 500 KHz, and 10 MHz. Similar responses for Class 1 and Class 2 FAF were also obtained.Figure 20
((a) and (c)) Input and its frequency spectrum. ((b) and (d)) Output and its frequency spectrum for Class 0 FAF.


## 6.2. Simulation of VDTA Based FAF

The CMOS schematic of Figure12 is used for verifying VDTA based FAF and the aspect ratios of the MOS transistors are given in Table 2. The capacitors C1 and C2 are taken as 50 pF each. In the realization of Class 2 FAF, the grounded resistor is implemented by TA block. The frequency responses of VDTA based Class 0, Class 1, and Class 2 FAF topologies are shown in Figures 21, 22, and 23, respectively. The responses are obtained by keeping IBias2 to 5 μA and setting bias currents IBias1 and IBias3 (IBias=IBias1=IBias3) to 5 μA, 10 μA, 30 μA, and 60 μA. In realization of Class 1 FAF, IBias4 is set to obtain g4/g3 = 3 while keeping IBias5 equal to IBias1. In realization of Class 2 FAF, IBias6 is selected such that g6=g3+g4 while IBias7 is equal to IBias4.Table 2
Aspect ratios of MOS transistors used in VDTA.
MOSFETs
W (µm)/L (µm)
M1, M2, M5, M6
16.1/0.7
M3, M4, M7, M8
28/0.7
M9–M12
21/0.7
M13–M16
7/0.7
M14, M15, M17, M18
8.5/0.7Figure 21
Frequency response of VDTA based Class 0 FAF withIBias1=IBias3=IBias.Figure 22
Frequency response of VDTA based Class 1 FAF withIBias1=IBias3=IBias.Figure 23
Frequency response of VDTA based Class 2 FAF withIBias1=IBias3=IBias.The electronic tunability of quality factor and center frequency for proposed Class 0, Class 1, and Class 2 VDTA based FAF is plotted in Figures24 and 25, respectively. The analytical and simulated responses describing variation of quality factor are shown in Figure 24 for different values of IBias2 while setting IBias1 and IBias3 to 30 μA in Class 0. To plot responses for Class 1, IBias4 is set to get g4/g3 = 3 and IBias5 is set equal to IBias1. Class 2 FAF responses are plotted by selecting IBias6 to obtain g6 = g3+g4 while IBias7 is equal to IBias4. Figure 25 depicts the analytical and simulated responses for center frequency variation for different values of IBias1 and IBias3 (IBias1=IBias3) and keeping IBias2 to 5 μA. To plot responses for Class 1, IBias4 is set to a value in such a manner that g4/g3 = 3 whereas IBias5 is set equal to IBias1. The Class 2 FAF responses are plotted by setting IBias6 to value such that g6 = g3+g4 whereas IBias7 is equal to IBias4.Figure 24
ElectronicQ-factor control of VDTA based FAF.Figure 25
Electronic center frequency control of VDTA based FAF.The transient behaviour of proposed agile filter is also studied by applying input signals of frequencies 100 KHz, 500 KHz, 1 MHz, and 10 MHz, each having an amplitude of 10μA. The responses for Class 0 FAF are obtained by setting bias currents IBias1, IBias2, and IBias3 each to 30 μA. The input and output waveforms along with their frequency spectrum for VDTA based Class 0 FAF are shown in Figure 26. It may clearly be noted that the VDTA based Class 0 FAF allows only 1 MHz signal to pass, partially attenuates signal of frequency 500 KHz, and significantly attenuates signals of frequencies 100 KHz and 10 MHz. Similar responses for Class 1 and Class 2 FAF are also obtained.Figure 26
((a) and (c)) Input and its frequency spectrum. ((b) and (d)) Output and its frequency spectrum for Class 0 FAF.


## 7. Performance Evaluation

The performance of proposed CDTA and VDTA based FAF circuits is studied in terms of power dissipation, output noise voltage, and SNR. The overall performance characteristics are summarized in Table3. Figures 27 and 28 depict the signal to noise ratio (SNR) for the proposed CDTA and VDTA based filter topologies for Class 0, Class 1, and Class 2, respectively. The VDTA based FAF proved to be optimum concerning the power dissipation and signal to noise ratio. The maximum output noise voltage is better in VDTA based FAF.Table 3
Performance characteristics of CDTA and VDTA based Class 0, Class 1, and Class 2 FAF.
Performance   characteristics
Type ofFAF
I
Bias = 1 µA
I
Bias = 10 µA
I
Bias = 30 µA
I
Bias = 60 µA
Class 0
Class   1
Class    2
Class    0
Class    1
Class  2
Class    0
Class     1
Class    2
Class    0
Class     1
Class    2
Power dissipation  (mW)
CDTA
0.359
0.997
1.63
3.34
3.99
4.63
9.98
10.7
11.3
19.9
20.6
21.2
VDTA
0.089
0.177
0.405
0.32
1.19
3.45
0.835
3.34
9.57
1.60
6.28
17.4
SNR (dB)
CDTA
124.9
122.1
119.2
135.5
134.2
131.3
140.2
137.9
135.3
142.1
139.5
137.2
VDTA
175.82
170.4
165.0
181.7
180.5
170.96
182.0
179.3
171.6
182.0
179.75
173.2
Max. output noise  voltage (nV)
CDTA
79.37
74.92
75.49
155.02
82.99
58.97
210.46
70.69
40.85
290.59
60.56
31.92
VDTA
28.5
28.85
28.1
38.92
37.43
51.3
46.10
44.4
38.1
51.62
52.63
25.6Figure 27
SNR of CDTA based FAF.Figure 28
SNR of VDTA based FAF.


## 8. Conclusion

In this paper CDTA and VDTA based frequency agile filters are presented. The proposed FAF configurations employ grounded passive components and are suitable for integration. The filter configurations are designed in such a way that quality factor can be independently controlled without changing the center frequency. The simulation results are included to demonstrate the workability of the circuits. The performance of the proposed FAF is evaluated in terms of power dissipation, SNR, and noise performance. The VDTA based FAF proved to be optimum concerning the power dissipation and signal to noise ratio.



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*Source: 176243-2014-12-23.xml*