# Application and Exploration of VR and AI Technology in College English Teaching

Authors: Zhaodan Yang
Journal: Advances in Multimedia
 (2022)

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## Abstract

In order to improve the effect of college English teaching, this article applies VR and AI technology to college English teaching. According to the pixel structure of English teaching image and its array drive design, this article proposes a semiactive address-driven pixel structure. Moreover, this article controls the scanning rate by adjusting the period of the clock signal CLK generated by the computer or FPGA, which determines the speed of image transmission. In addition, in order to determine the output DC value of the cascode structure, the negative feedback loop is biased, and an intelligent teaching system is constructed. According to the teaching evaluation research, it can be seen that the college English teaching method based on VR technology and AI technology proposed in this article can effectively improve the teaching effect of college English.


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## Body

## 1. Introduction

In the era of AI, colleges and universities urgently need to cultivate a group of professional talents with high quality and strong innovation ability. In particular, in the cultivation of interpreting talents, it is necessary to actively introduce intelligent technology to innovate the teaching mode. Only in this way can China’s foreign trade and cultural needs be effectively met.Driven by 5G information and communication technology, the gradual maturity of virtual technology should have a huge impact on the college English teaching model. The traditional college English teaching mode is set up according to the disciplinary characteristics of the basic subjects, and the college education focuses on theoretical content and advocates theory-based practical teaching [1]. Regardless of the theoretical content or technical practice content of college English, the in-depth experiential teaching mode is the most thorough method for college English learning. Students can conduct an in-depth understanding of theory and technology through virtual space and can conduct reasonable inspection and feedback on design elements such as appearance, function, and structure of industrial product design through virtual space. Moreover, when the product design model is established, they can use the virtual technology to make the target user have a virtual experience, which can save the production cost and production time and improve the local design details of the product more accurately [2].In the course of course teaching, we cannot just use multimedia technology, we need to dig deep into the theory of the subject and improve the theoretical depth, we need to pay attention to the connotation of college English when teaching, and we cannot develop college English majors in the direction of art and craftsmanship. In order to cultivate high-quality talents with innovative thinking and good hands-on ability, it is necessary to improve the feedback mechanism [3] and listen to students in the process of teaching. The professional leaders of the disciplines should understand the students’ ideas and suggestions on professional teaching when they graduate. Although they cannot be implemented in the current class of graduates, they can carry out teaching reform and practice among subsequent students. According to the different personalities and characteristics of the students, we should teach students according to their aptitude reasonably so as to ensure the improvement of students’ innovative ability [4]. In addition, it is necessary to strengthen practical teaching. Through various cases, students can assemble and disassemble some real products so that students can understand their appearance and better understand their functions and structures so as to satisfy their curiosity and improve students’ hands-on ability so that they can better master professional knowledge [5]. In addition, in the process of design, it is necessary for students to deepen their own design concepts, strengthen the combination of design and practice, organize students to participate in some design competitions, hold corresponding lectures and special activities, improve students’ skills, and maximize students’ potential [6].The biggest highlight of the integration of AI technology and education is the establishment of a good teaching platform other than face-to-face teaching, which integrates high-end technologies such as image recognition technology, handwriting recognition technology, and speech recognition technology to effectively reshape traditional learning mechanisms and education models. In the new education and teaching control mode, artificial teaching can be assisted by AI technology to achieve more diversified teaching goals [7]. The application of AI technology in the construction of the knowledge system, combined with the education development system, shows that the knowledge system itself is a relatively complex system, and various disciplines are cross-connected. In the process of cross-disciplinary development, it is difficult to apply a traditional single teaching model to improve students’ learning. Comprehensive quality [7]: therefore, on the basis of the continuous development of college English, it is of great significance to apply AI technology to knowledge base processing and construction. It can comprehensively analyze the relevance of corresponding content, implement mind maps and knowledge maps, and provide guarantees for improving teaching efficiency. At the same time, a modular knowledge system can be established to create a reasonable teaching space for students to comprehensively improve their knowledge and cognition levels [8]. In the traditional teaching mechanism, teachers have limited knowledge content due to the limitation of knowledge and energy, and the application of artificial intelligence can construct a more systematic guidance teaching mode, which can save teachers a lot of time in the construction of a knowledge system, and provide teachers with lesson preparation. It is convenient and can also enrich the reserve of teachers so as to build a more complete and comprehensive teaching framework [9]. It should be noted that because teachers cannot guide students to complete corresponding learning tasks anytime and anywhere, and parents have limited tutoring ability, at this time, with the help of AI technology, various intelligent education platforms can be presented to receive students’ learning feedback, so as to timely respond to students’ questions and complete real-time communication, which improves the actual efficiency of tutoring work [10].The purpose of heuristic teaching is to inspire students’ thinking and to oppose instilling knowledge. It is not a teaching method that directly tells the students the established answers but hopes that the students can think and deduce the answers by themselves under the guidance of teachers. According to the characteristics of integrity education for college students, students learn different cases and through their own understanding, summarize the rules in their daily practice, and the process of acquiring knowledge is also a kind of heuristic education [11]. This process is similar to Transfer Learning (TL) in AI, which is a learning method that applies knowledge or patterns learned in a certain field or task to different but related fields or problems to acquire knowledge. In the practical teaching of college English, there are no strict rules for students to observe integrity. Whether it is copying the code in the book, referring to the program from the Internet, or getting inspiration from classmates, it can be the content of their own practice [12]. The purpose is to obtain ideas and methods for solving problems through independent learning from the excellent achievements of others. In the process of learning, the achievements of others are appearances and learning to “plagiarize” is to continuously accumulate one’s own learning [13]. The process of changing “plagiarism” from quantitative to qualitative is a process in which students learn the essence from the appearance and then solve their own problems by inference. The importance of honesty education is that after students use the knowledge of others to solve their own problems, they need to faithfully and clearly inform all cited results [14]. It is not shameful for students to use the achievements of others to solve their own problems, and there is no need to cover them up. Standing on the shoulders of others is also a correct way to solve problems. The key is that we admit and show this kind of citation behavior, which is integrity. An additional benefit of this process is that students can more clearly understand the difference between their own method and others and find out the innovation of their own method [15].At this stage, the lag of artificial intelligence teaching places is the main problem hindering smart learning. Adopt the “more and more, less and more” model to build a normal learning place for artificial intelligence. It is necessary to ensure that every school and even every classroom is equipped with AI equipment. On the one hand, for schools with abundant financial support and more AI equipment, adopt a “more and more refined” model, upgrade and detect artificial intelligence equipment from time to time, and screen and reorganize the equipment equipped in the classroom to maximize teaching benefits [16]. On the other hand, for schools whose funds cannot support more equipment, the construction is carried out in a “less and wide” mode. Disperse AI equipment resources and ensure that each classroom has equipment for basic teaching instead of concentrating all equipment in the same multimedia classroom. In a “few and wide” model, limited use of resources is used to promote the maximization of AI learning places [17].In order to make students’ expansive thinking under intelligent assisted learning practice, build a social practice platform corresponding to machine-assisted teaching, organically transform students’ theoretical thinking into practice, and lay a good foundation for cultivating practical and applied talents. Each school can cooperate with local enterprises to provide different job internships for students with different majors and interests, and excellent students can be directly hired [18]. In the process of machine-assisted docking with the social practice platform, the combined teaching mode of “industry-university-research cooperation” will be promoted, and the utility of AI + smart learning will be extended to the value of social practice. In the process of docking between learning and practice, students can reversely apply them to learning by summarizing their practice in social practice to enhance their adaptability to AI + smart learning [19].This article applies VR and AI technology to college English teaching to build an intelligent teaching system and improve the efficiency of intelligent college English teaching.


## 2. Teaching System Based on VR and AI

### 2.1. English Teaching Image Processing Technology

The phenomenon of direct interband transitions is a process in which a high electric field generates high-energy hot electrons at the same wave vector of the wave vector K space, which may directly recombine with holes, and the generated energy is released in the form of photons. The position ofk = 0 in the wave vector space is described by the following formula:(1)IvDirectlnterband=B1hv1.51+B2hvTeexp−hvTe.Among them,h is Planck’s constant, v is the frequency of the photon, B1,B2 is the constant, and Te is the electron temperature. However, this mechanism can only explain part of the high-energy region.There is the phenomenon of Indirect Interband Transitions. The electron-hole pair recombines through electron transition between the conduction band and the valence band. The remaining energy is released in the form of photons and phonons. The light emission intensity is the relationship between the carrier recombination probability and the distribution function:(2)IvIndirectinterband=IvEmission−IvAbsorption,(3)IvEmission∝n2vdndvv2Aexp−aA2B1aA2,(4)IvAbsorption∝n2vdndv+nv2Bexp−aB2B1aB2.In formulas (2) to (4), there is A=hv+kθ−Eg,B=hv−kθ−Eg and a=1/k0Te+1/k0Th. Among them, B1 is the modification of the first-order Bessel function, n is the refractive index, and Th and Te depend on the field strength of the barrier region and the ionization length of electrons and holes.The third type is Bremsstrahlung. When a breakdown occurs, the electric field strength in the depletion region is very high, which leads to the high kinetic energy of conduction band electrons. High-energy electrons are assisted by phonons, and part of their energy loss is emitted or ionized to generate photons, and the rest is transferred to hot carriers in the form of phonons (heat). Both the carrier distribution and the light intensity distribution are exponentially distributed:(5)fEcarrers∝exp−EcarrerskTe,fEphoton∝exp−EphotonkTe.Among them, Ecarrers is the energy of the carrier in the accelerating electric field, Ephoton is the photon energy, Te is the effective temperature of the hot carrier, and k is the Boltzmann constant.


### 2.2. Pixel Drive Circuit Design

The pixel driving circuit is the core of the entire pixel array module, and its schematic diagram is shown in Figure1.Figure 1
Pixel drive circuit.The designed pixel driving circuit includes the following: constant current source, column data switch, driving transistor, light-emitting unit, and scanning buffer. Among them, transistorT3 and transistor T4 are used to form a constant current source in response to Vref1 and Vref2. Transistor T2 is used to determine the rapid flow of current from the current source from the N2 node to the drive transistor T1 in response to the data signal Vdata. The transistor T1 is a driving transistor, which is used to determine the driving current of the pixel driving circuit and transmit it to the light-emitting unit M0. The gate-controlled PMOS light-emitting LEDM0 is used as a light-emitting unit to emit light and display in response to the driving current. The buffer of the scan signal is composed of transistor T5, transistor T6, transistor T7, and transistor T8, which can increase the driving capability of the pixel.In Figure1, the power supply voltage AVDD required by the pixel structure is +1.8V; VDD is +1.8V, which are all generated by an external power supply. The gate control signal VG of the light-emitting device is an adjustable voltage, and the source-drain region voltage VP of P+ is −6.5V, which are all generated by an external power supply (from Section 2, the breakdown voltage of the light-emitting device is about 6V, so the typical value of VP is designed and is −6.5V;Vdata is the column data signal and Vscan is the row scanning signal, which are all generated by the row and column drive timing module. The reference signals Vref1 and Vref2 are generated by the internal bias circuit.In the designed pixel drive circuit, in order to makeM0 emit light, transistor T1 must be in a conducting state and require current to pass through.Specifically, when the data signalVdata is at a low level, the transistor T2 is turned on, and the current of the node N2 is transmitted to the source of the transistor T1. When the scanning signal Vscan is at a low level, it passes through the inverter formed by the transistor T5 and the transistor T6, and together with the inverter formed by the transistor T7 and the transistor T8 form the scanning buffer. The node N1, that is, the gate of the transistor T1, is at a low level, and the transistor T1 is turned on. At this time, M0 has a current passing through it and emits light, and the luminous intensity has a linear relationship with the driving current.When the data signalVdata is at a high level, the transistor T2 is turned off, and no current flows through the transistor T1. Or, when the scanning signal Vscan is at a high level, it passes through the inverter formed by the transistor T5 and the transistor T6 and, together with the inverter formed by the transistor T7 and the transistor T8, forms the scanning buffer. Node N1, that is, the gate of the transistor, is high, and the transistor T1 is turned off. At this time, M0 does not pass through the current and is in an extinguished state.Therefore, the timing diagram of the pixel driving circuit is shown in Figure2. In the light-emitting state, the scan signal Vscan and the data signal Vdata are at low potentials at the same time, and the light-emitting intensity has a linear relationship with the driving current. In the off state, any of the scan signals Vscan and the data signal Vdata are at a high level.Figure 2
Timing diagram of the pixel drive circuit.


### 2.3. Low-Voltage Cascode Current Mirror and Its Bias Requirements

One of the classic applications of cascode is a constant current source because its high output impedance can generally be approximated as an ideal current source. As shown in Figure3, it is a low-voltage cascode current mirror and its bias requirements.Figure 3
Low-voltage cascode current mirror and its bias.TransistorT3 and transistor T4 together form a cascode current source, and its output impedance is shown in the following formula:(6)Z=1+gmb3+gm3rO3rO4+rO3.Among them,gm,gmb,ro is the transistor’s transconductance, body transconductance, and output resistance, respectively.In order to determine the output DC value of the cascode structure, we also need a negative feedback loop to bias. We use the voltage series negative feedback method of the folded cascode op-amp. The feedback network consists of a common drainT11 and a reference resistor RREF. Both the reference voltage VREF and the resistor RREF use an external connection; we can get the reference current:(7)IREF=VREFRREF.The channel modulation effect is considered, and for the current mirror circuit, we can know the following:(8)IREF=ID10=12μpCoxWL10VGS−VTH21+λVDS10,IOUT=ID4=12μpCoxWL4VGS−VTH21+λVDS4.Therefore, there is(9)IOUTIREF=ID4ID10=W/L4W/L101+λVDS41+λVDS10.In order to suppress the influence of channel modulation effect, we can forceVDS10=VDS4. We connect the output node of the cascode structure to its input. In this case, we have the following:(10)VDS4=Vref2−VGS3−AVDD,VDS10=Vref2−VGS9−AVDD.If there isVGS9=VGS3, VDS10=VDS4 can be forced. Therefore, we can choose Vref2 to make T10 work at the edge of the saturation region. Vref must make both T10 and T9 work in the saturation region, then T9 needs Vreρ to satisfy the following:(11)VGS9−VTH9≤VDS9=VGS10+AVDD+VGS9−Vref2.Then,T10 needs Vref2 to satisfy the following:(12)VGS10−VTH10≤VDS10=Vref2−VGS9−AVDD.Therefore, we can get the condition thatVref2 must satisfy the following:(13)VGS9+VGS10−VTH10+AVDD≤Vref2≤VGS10+VTH9+AVDD,If there is VGS9+VGS10−VTH10+AVDD<VGS10+VTH9+AVDD, the solution to VGS9−VTH9<VTH10,Vref2 exists. Therefore, we have to adjust the size of T9 so that its overdrive voltage is much smaller than the threshold voltage VTH10 of T10. At the same time, in order to minimize the consumed voltage margin, we can make Vref must be equal to or slightly larger than VGS9+VGS10−VTH10+AVDD.In addition, if the value ofVref1 or either Vref2 is high when the circuit is on, both T10 and T4 or T9 and T3 may be off and no current will flow through all circuits. Then, we also need an additional bias circuit to pull down the voltages of Vref1 and Vref to ensure the normal opening of the circuit. Its bias circuit is shown in Figure 4.Figure 4
Current source bias circuit.Its working process is as follows: whenVref1 is high, T16 and T17 are turned off, and no current flows through the circuit. At this time, the output terminal of the inverter, that is, the gate voltage of T18, is high, then T18 is turned on and Vref is pulled down. At this time, T16 and T17 are turned on and T18 is turned off. Then, the gates of T15 and T14 are high voltage; that is, T15 and T14 are also turned on, and the voltage of Vref2 is also pulled down. In this bias circuit, the value of Vref2 can be as follows:(14)Vref2=VDS13+VDS12+AVDD,=VGS13+VGS12−VTH12+AVDD.Therefore, we only need to adjust the dimensions ofT12 and T13,T9, and T10 so that they satisfy VGS13=VGS9 and VGS12−VTH12=VGS10−VTH10.On the other hand, the larger the pixel array is, the greater the parasitic characteristics (such as parasitic capacitance and parasitic resistance) it produces. How to improve the signal driving quality on row scan lines and column data lines is another difficult problem in the design of pixel drive arrays.In order to effectively solve the above problems, we can segment each row scan line and insert a buffer (usually two inverters cascaded) between the scan line and the driving transistor, as shown in Figure4. The insertion of this scan buffer can effectively improve the driving capability of the circuit and reduce the wiring capacitance and resistance, thereby improving the quality of signal transmission. The principle is that buffer usually has a very low input load, but it has a high driving capacity. Therefore, we can easily drive the buffer only by scanning the signal and then use the buffer to easily drive the subsequent transistors, which greatly improves the circuit driving capability. On the other hand, after the row scanning line is segmented and the buffer is inserted, the parasitic resistance and parasitic capacitance generated by the wiring of the row scanning line are also segmented. Compared with the direct drive of the scan signal, the buffer is driven by the scan signal after segmentation, and then the buffer drives the subsequent circuits, and the load driven by the buffer is very small. This reduces the delay of transmission and improves the quality of signal transmission. At the same time, this can also improve the margin of the back-end layout design, which can ensure the function and performance requirements of the circuit design.


## 2.1. English Teaching Image Processing Technology

The phenomenon of direct interband transitions is a process in which a high electric field generates high-energy hot electrons at the same wave vector of the wave vector K space, which may directly recombine with holes, and the generated energy is released in the form of photons. The position ofk = 0 in the wave vector space is described by the following formula:(1)IvDirectlnterband=B1hv1.51+B2hvTeexp−hvTe.Among them,h is Planck’s constant, v is the frequency of the photon, B1,B2 is the constant, and Te is the electron temperature. However, this mechanism can only explain part of the high-energy region.There is the phenomenon of Indirect Interband Transitions. The electron-hole pair recombines through electron transition between the conduction band and the valence band. The remaining energy is released in the form of photons and phonons. The light emission intensity is the relationship between the carrier recombination probability and the distribution function:(2)IvIndirectinterband=IvEmission−IvAbsorption,(3)IvEmission∝n2vdndvv2Aexp−aA2B1aA2,(4)IvAbsorption∝n2vdndv+nv2Bexp−aB2B1aB2.In formulas (2) to (4), there is A=hv+kθ−Eg,B=hv−kθ−Eg and a=1/k0Te+1/k0Th. Among them, B1 is the modification of the first-order Bessel function, n is the refractive index, and Th and Te depend on the field strength of the barrier region and the ionization length of electrons and holes.The third type is Bremsstrahlung. When a breakdown occurs, the electric field strength in the depletion region is very high, which leads to the high kinetic energy of conduction band electrons. High-energy electrons are assisted by phonons, and part of their energy loss is emitted or ionized to generate photons, and the rest is transferred to hot carriers in the form of phonons (heat). Both the carrier distribution and the light intensity distribution are exponentially distributed:(5)fEcarrers∝exp−EcarrerskTe,fEphoton∝exp−EphotonkTe.Among them, Ecarrers is the energy of the carrier in the accelerating electric field, Ephoton is the photon energy, Te is the effective temperature of the hot carrier, and k is the Boltzmann constant.


## 2.2. Pixel Drive Circuit Design

The pixel driving circuit is the core of the entire pixel array module, and its schematic diagram is shown in Figure1.Figure 1
Pixel drive circuit.The designed pixel driving circuit includes the following: constant current source, column data switch, driving transistor, light-emitting unit, and scanning buffer. Among them, transistorT3 and transistor T4 are used to form a constant current source in response to Vref1 and Vref2. Transistor T2 is used to determine the rapid flow of current from the current source from the N2 node to the drive transistor T1 in response to the data signal Vdata. The transistor T1 is a driving transistor, which is used to determine the driving current of the pixel driving circuit and transmit it to the light-emitting unit M0. The gate-controlled PMOS light-emitting LEDM0 is used as a light-emitting unit to emit light and display in response to the driving current. The buffer of the scan signal is composed of transistor T5, transistor T6, transistor T7, and transistor T8, which can increase the driving capability of the pixel.In Figure1, the power supply voltage AVDD required by the pixel structure is +1.8V; VDD is +1.8V, which are all generated by an external power supply. The gate control signal VG of the light-emitting device is an adjustable voltage, and the source-drain region voltage VP of P+ is −6.5V, which are all generated by an external power supply (from Section 2, the breakdown voltage of the light-emitting device is about 6V, so the typical value of VP is designed and is −6.5V;Vdata is the column data signal and Vscan is the row scanning signal, which are all generated by the row and column drive timing module. The reference signals Vref1 and Vref2 are generated by the internal bias circuit.In the designed pixel drive circuit, in order to makeM0 emit light, transistor T1 must be in a conducting state and require current to pass through.Specifically, when the data signalVdata is at a low level, the transistor T2 is turned on, and the current of the node N2 is transmitted to the source of the transistor T1. When the scanning signal Vscan is at a low level, it passes through the inverter formed by the transistor T5 and the transistor T6, and together with the inverter formed by the transistor T7 and the transistor T8 form the scanning buffer. The node N1, that is, the gate of the transistor T1, is at a low level, and the transistor T1 is turned on. At this time, M0 has a current passing through it and emits light, and the luminous intensity has a linear relationship with the driving current.When the data signalVdata is at a high level, the transistor T2 is turned off, and no current flows through the transistor T1. Or, when the scanning signal Vscan is at a high level, it passes through the inverter formed by the transistor T5 and the transistor T6 and, together with the inverter formed by the transistor T7 and the transistor T8, forms the scanning buffer. Node N1, that is, the gate of the transistor, is high, and the transistor T1 is turned off. At this time, M0 does not pass through the current and is in an extinguished state.Therefore, the timing diagram of the pixel driving circuit is shown in Figure2. In the light-emitting state, the scan signal Vscan and the data signal Vdata are at low potentials at the same time, and the light-emitting intensity has a linear relationship with the driving current. In the off state, any of the scan signals Vscan and the data signal Vdata are at a high level.Figure 2
Timing diagram of the pixel drive circuit.


## 2.3. Low-Voltage Cascode Current Mirror and Its Bias Requirements

One of the classic applications of cascode is a constant current source because its high output impedance can generally be approximated as an ideal current source. As shown in Figure3, it is a low-voltage cascode current mirror and its bias requirements.Figure 3
Low-voltage cascode current mirror and its bias.TransistorT3 and transistor T4 together form a cascode current source, and its output impedance is shown in the following formula:(6)Z=1+gmb3+gm3rO3rO4+rO3.Among them,gm,gmb,ro is the transistor’s transconductance, body transconductance, and output resistance, respectively.In order to determine the output DC value of the cascode structure, we also need a negative feedback loop to bias. We use the voltage series negative feedback method of the folded cascode op-amp. The feedback network consists of a common drainT11 and a reference resistor RREF. Both the reference voltage VREF and the resistor RREF use an external connection; we can get the reference current:(7)IREF=VREFRREF.The channel modulation effect is considered, and for the current mirror circuit, we can know the following:(8)IREF=ID10=12μpCoxWL10VGS−VTH21+λVDS10,IOUT=ID4=12μpCoxWL4VGS−VTH21+λVDS4.Therefore, there is(9)IOUTIREF=ID4ID10=W/L4W/L101+λVDS41+λVDS10.In order to suppress the influence of channel modulation effect, we can forceVDS10=VDS4. We connect the output node of the cascode structure to its input. In this case, we have the following:(10)VDS4=Vref2−VGS3−AVDD,VDS10=Vref2−VGS9−AVDD.If there isVGS9=VGS3, VDS10=VDS4 can be forced. Therefore, we can choose Vref2 to make T10 work at the edge of the saturation region. Vref must make both T10 and T9 work in the saturation region, then T9 needs Vreρ to satisfy the following:(11)VGS9−VTH9≤VDS9=VGS10+AVDD+VGS9−Vref2.Then,T10 needs Vref2 to satisfy the following:(12)VGS10−VTH10≤VDS10=Vref2−VGS9−AVDD.Therefore, we can get the condition thatVref2 must satisfy the following:(13)VGS9+VGS10−VTH10+AVDD≤Vref2≤VGS10+VTH9+AVDD,If there is VGS9+VGS10−VTH10+AVDD<VGS10+VTH9+AVDD, the solution to VGS9−VTH9<VTH10,Vref2 exists. Therefore, we have to adjust the size of T9 so that its overdrive voltage is much smaller than the threshold voltage VTH10 of T10. At the same time, in order to minimize the consumed voltage margin, we can make Vref must be equal to or slightly larger than VGS9+VGS10−VTH10+AVDD.In addition, if the value ofVref1 or either Vref2 is high when the circuit is on, both T10 and T4 or T9 and T3 may be off and no current will flow through all circuits. Then, we also need an additional bias circuit to pull down the voltages of Vref1 and Vref to ensure the normal opening of the circuit. Its bias circuit is shown in Figure 4.Figure 4
Current source bias circuit.Its working process is as follows: whenVref1 is high, T16 and T17 are turned off, and no current flows through the circuit. At this time, the output terminal of the inverter, that is, the gate voltage of T18, is high, then T18 is turned on and Vref is pulled down. At this time, T16 and T17 are turned on and T18 is turned off. Then, the gates of T15 and T14 are high voltage; that is, T15 and T14 are also turned on, and the voltage of Vref2 is also pulled down. In this bias circuit, the value of Vref2 can be as follows:(14)Vref2=VDS13+VDS12+AVDD,=VGS13+VGS12−VTH12+AVDD.Therefore, we only need to adjust the dimensions ofT12 and T13,T9, and T10 so that they satisfy VGS13=VGS9 and VGS12−VTH12=VGS10−VTH10.On the other hand, the larger the pixel array is, the greater the parasitic characteristics (such as parasitic capacitance and parasitic resistance) it produces. How to improve the signal driving quality on row scan lines and column data lines is another difficult problem in the design of pixel drive arrays.In order to effectively solve the above problems, we can segment each row scan line and insert a buffer (usually two inverters cascaded) between the scan line and the driving transistor, as shown in Figure4. The insertion of this scan buffer can effectively improve the driving capability of the circuit and reduce the wiring capacitance and resistance, thereby improving the quality of signal transmission. The principle is that buffer usually has a very low input load, but it has a high driving capacity. Therefore, we can easily drive the buffer only by scanning the signal and then use the buffer to easily drive the subsequent transistors, which greatly improves the circuit driving capability. On the other hand, after the row scanning line is segmented and the buffer is inserted, the parasitic resistance and parasitic capacitance generated by the wiring of the row scanning line are also segmented. Compared with the direct drive of the scan signal, the buffer is driven by the scan signal after segmentation, and then the buffer drives the subsequent circuits, and the load driven by the buffer is very small. This reduces the delay of transmission and improves the quality of signal transmission. At the same time, this can also improve the margin of the back-end layout design, which can ensure the function and performance requirements of the circuit design.


## 3. Application of VR and AI Technology in College English Teaching

This article applies VR and AI technology to college English teaching, identifies the characteristics of teaching situations, and links VR and AI technology with students.When two English teaching images are similar, it can be approximated that the English teaching images are matched. The evaluation index for the similarity of English teaching images can also be used to match English teaching images. The similarity evaluation of English teaching images is to analyze the similarity and consistency of English teaching images to judge whether they are similar. Starting from the pixels of English teaching images, it studies the content, characteristics, structure, relationship, texture, and gray level of English teaching images and other related factors and obtains the corresponding similarity relationship. In the evaluation of English teaching image similarity, the evaluation criteria structural similarity and peak signal-to-noise ratio have good accuracy. It can be seen from Figure5 that in the process of using the structural similarity index to measure the structural similarity of the two English teaching images, the brightness information of the two English teaching images, the contrast information of the English teaching images, and the structural contrast information of the English teaching images can be reflected by the pixels on the English teaching image.Figure 5
Schematic diagram of similarity measurement of English teaching images.The English teaching image algorithm based on the fusion of multiscale feature maps is an algorithm that uses the structural characteristics of convolutional neural networks to further identify the results of multiscene matching. The purpose is to improve the accuracy of straw burning English teaching images and draw on the idea of FasterRCNN to propose a recognition algorithm. The network structure diagram is shown in Figure6. This training network utilizes convolution and pooling and multiscale feature map fusion to enhance the feature maps for English teaching image model training. It can be seen from Figure 6 that the feature map is shared by the RPN network and the model training network in the subsequent use process. The RPN network utilizes this feature map to be shared by subsequent RPN layers and the model training network. Moreover, the RPN network can select positive and negative samples according to Anchor, which actually designs multiple grids on the original image. The RPN network selects positive and negative samples according to the CNN selection to judge those Anchors that contain targets that need to be detected and classify them according to this. Among them, the detection frame containing the detection target is a positive sample, and the detection frame without the detection target is a negative sample. In this process, the frame of the preprocessed data and the generated target region proposal frame are subjected to IOU operation, and the final target proposal region is obtained by NMS processing, that is, the positive and negative sample parts of the input image of the training network. On the other hand, the ROI Pooling layer uses the results of the target proposal region to extract the proposed feature region positive samples from the feature map and send them to the subsequent network with convolution, pooling, full connection, and Softmax as the classifier, and finally, the model is obtained.Figure 6
Schematic diagram of algorithm based on multiscale feature map fusion.In order to improve the effect of college English teaching, this article proposes a situation-driven AR-BCI brain-computer fusion interactive system based on VR technology and AI technology. The system uses machines to perceive and identify contextual information and augmented reality glasses for information fusion and display. Moreover, it establishes a direct two-way information path between the operator and the machine when facing the situation through brain-computer interface technology. The principle of the context-driven AR-BCI brain-computer fusion interaction system is shown in Figure7, which is mainly divided into two parts: machine context perception and human brain context cognition.Figure 7
Schematic diagram of the brain-computer fusion interactive system.In order to give full play to the fast computing power of machines at the feature level and the cognitive experience of people at the element and relationship level, a context-driven human-computer interaction system model is proposed. Moreover, this article proposes a real context-driven AR-BCI brain-computer fusion interaction system that integrates situational awareness, information rendering, and cognitive decision-making and divides it into machine situational perception, human brain situational cognition, and brain-computer fusion interaction. The three parts realize the combination of human decision-making ability and machine’s perception ability, computing ability, and execution ability. The principle flowchart of the system is shown in Figure8. The camera captures the current actual situation of the user and sends the situation information, that is, the video stream, to the computer and AR glasses through the local area network. The computer performs deep learning perception and recognition on the contextual video stream and sends the perception and recognition information to the AR glasses through the local area network. The AR glasses integrate virtual and real situational information and perception information and render the SSVEP stimulus source and object perception and recognition situation in front of the user. The cognitive activity of the user in this context is to determine the number of the target vehicle to hit and focus on the same stimulus as the number. At the same time, the computer processes and analyzes the user’s EEG signal collected by the amplifier, obtains the user’s SSVEP command, and sends it to the external device. After that, the peripherals form visual feedback through the camera for the execution of the SSVEP instruction for the user to adjust to the next step.Figure 8
Schematic diagram of the brain-computer fusion interaction system driven by real situations.Based on the above research, the system model proposed in this article is validated. In the experimental research, this article mainly evaluates the effect of image recognition in English teaching and the effect of intelligent teaching, and the results shown in Tables1 and 2 are obtained.Table 1
Image recognition effect of college English teaching based on VR technology and AI technology.
NumImage identificationNumImage identificationNumImage identification189.4771393.0332588.054289.5641488.1812689.065393.0571593.9572791.354490.6461691.9082893.490587.0471787.8962992.614687.8291890.0463091.706790.6321988.6023190.022889.2392089.0503291.921991.5572187.5523391.5941092.4012288.1293490.0491190.1732390.0173587.5311292.7872493.0483693.918Table 2
The improvement effect of college English teaching based on VR technology and AI technology.
NumTeaching improvementNumTeaching improvementNumTeaching improvement175.7201373.9352574.246274.6181482.7042672.249379.0381582.0832778.923476.0981677.7532874.572572.7791770.6842973.684671.6001872.0093069.251781.5091978.9113169.053881.8722077.8883280.046974.5982169.0113373.8551079.4412280.9233472.8781182.3482370.6643580.7331270.5782480.3413670.790From the above research, it can be seen that the college English teaching method based on VR technology and AI technology proposed in this article can effectively improve the teaching effect of college English.


## 4. Conclusion

At present, most colleges and universities still use the traditional teaching mode in English classroom teaching, which makes it difficult to achieve good teaching effect in English classroom teaching, and the teaching effectiveness is very low. Moreover, the traditional teaching mode cannot introduce more teaching content, and the amount of information is very scarce. Therefore, this article conducts in-depth research on the effectiveness of the English classroom teaching mode to explore a more efficient English classroom teaching mode, which will provide an important reference for colleges and universities to cultivate high-quality English talents. This article applies VR and AI technology to college English teaching to construct an intelligent teaching system. According to the teaching evaluation research, the college English teaching method based on VR technology and AI technology proposed in this article can effectively improve the teaching effect of college English.



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*Source: 1810177-2022-07-31.xml*