# Performance Analysis of Two-Loop Interleaved Boost Converter Fed PMDC-Motor System Using FLC

Authors: C. T. Manikandan; G. T. Sundarrajan; V. Gokula Krishnan; Isaac Ofori
Journal: Mathematical Problems in Engineering
 (2022)

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## Abstract

Nowadays, the Permanent Magnet DC (PMDC) motors are intended to achieve the maneuver with elevated exactness and accurateness. To elevate the exactness and accurateness of the Permanent Magnet DC motors, the two-loop Interleaved Boost Converter (ILBC) is intended to control methods. The projected Converter is located between DC load and Permanent Magnet DC motor loads. The united construction of Permanent Magnet DC motors and Interleaved Boost Converter may be miscarried owing to steady state error, speed disparity, and slow response. To condense the difficulties, the Fuzzy Logic Controller is intended in the recommended Converter and Permanent Magnet DC motor. This exertion enlightened the modelling, simulation, and relevance of the Interleaved Boost Converter with Permanent Magnet DC motor (ILBC-PMDCM). The recommended technique chief objective aims at upholding the mandatory DC voltage from the input supply voltage with the assistance of Fuzzy Logic Controller. Current mode Fuzzy Logic Controller is proposed in the present work. The objective is to improve small-scale stability of ILBC-PMDCM system. The recommended controller is functioning based on closed-loop alignment. The projected FL controller is simulated and equated with the Proportional Integral (PI) controller in Permanent Magnet DC motor. From the investigation, the projected controller presents the finest outcomes than the Proportional Integral controller. The projected controller has altered benefits such as declined steady state error and enriched time domain response. The hardware outcomes of the projected controller are also presented, which are evaluated against the simulation outcomes.


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## Body

## 1. Introduction

DC power supplies were usually adopted in abundant precincts swapping off of elementary electronic gadgets, for instance, notepad PCs, until pointedly more development relevance, for instance, electric vehicle and moreover the aviation relevance [1]. Subsequently, DC-DC Converter was normally utilized by altering the voltage of DC form to an alternate voltage of DC form subsequently to underwrite the DC voltage necessity of heat to the DC power flexibly; furthermore, DC-DC Converter was likewise a significant relevance for the force molding of the option electrical energy, for instance, PV, breeze generator, and energy unit framework. For each of these explanations, the DC-DC Converter relevance will make a beeline for the accompanying possible markets later on [2].Predominantly, the DC-to-DC Converter incorporated of power semiconductor apparatus worked as electronic controllers and designated traded approach DC-DC Converters or constantly suggested as SMPS. To embrace the yield voltage consistent, the analysis control circle was used to, therefore, alter the commitment cycle, paying little regard to incorporate voltage assortment and weight changes [3]. Action of the trading contraptions caused the Boost Converter ordinarily nonlinear characteristics [4]. Due to these futile nonlinear appearances, the Converters require a controller with a genuine degree of vibrant reaction [5]. Proportional Integral Derivative controllers go through kept regulation of their limits for disturbance conditions and altered weights [6]. Proportional Integral Derivative controller has a couple of burdens, for instance, slow reactions to the surprising change in the stack or exacerbation in the data voltage. Main design centers for electronic experts were to work on the feasibility of power change. For Pulse Width Modulation Converters, trading adversity was a large show measure [7]. The fake sharp control, for instance, Fuzzy Logic and brain framework, was completely capable for the distinctive verification, flexible, and control for nonlinear dynamical structures [8].A clear Boost convertor changes over a low-level DC voltage to raised level DC voltage, which diminishes the wave factors in equal data and yield circuits. To procure higher viability, the yield current was separated into 2 ways which decline I2R disasters and AC hardships. IBCS are used in a wide extent of purposes, for instance, PFC circuits, energy unit systems, and PV bunches [9–13]. In this, the construction approach of interleaved Boost Converter has been clarified. The computation of the inductance and the channel capacitance of the interleaved Boost Converter has been done. The construction of interleaved Boost Converter has been finished with a conclusive objective of diminishing the wave in the yield voltage and the data current. Fuzzy Logic is an etymological procedure which ascends to structure fundamental, bewildering, and introduced systems with control inputs. A Fuzzy Logic can be seen as a continuous expert system that uses Fuzzy Logic to control emotional elements [14].In this topic, the present work is exposed to fuzzy logic control to improve the dynamic response of 2SILBC-DCM and is organized in six sections. Section2 presents the 2SILBC and the block diagram of the proposed closed loop 2SILBC-DCM. The behavior of 2SILBC-DCM in closed loop is presented in Section 3. The control strategies for 2SILBC-DCM are evaluated in Section 4, and Section 5 gives the experimental results for 2SILBC-DCM. Conclusion is discussed in the last section.The arrangement of a Fuzzy Logic-structure can be arranged as a request issue in high layered space, where each guide talks with a standard set, support limits, and contrasting systems directly. Semantic variables, portrayed as elements whose characteristics were sentences in a trademark language (for instance, close to nothing and large), may be addressed by fluffy sets. Fuzzy Logic controllers were an appealing choice when accurate mathematical plans are unreasonable. The Interleaved Boost Converters used 2 Boost Converters which work at 1800. The inductor expands, clearing out happens half in the commitment cycle. The capacitor yield was the total of 2diode current (I1 + I2) which was not enhanced by the yield DC, which hence reduces the wave current of the yield capacitor (IOUT). It also filled in as a part of the commitment cycle. Exactly when the commitment cycle watches out for 0%, half, and 100 percent, the whole of the two diode streams in the like manner watches out for dc yield. Under any effect of ideal working centers, the capacitor yield is expected to channel the inductor grow streams. Fundamental 2P-Interleaved Boost Converters are laid out in Figure1.Figure 1
A basic 2P-Interleaved Boost Converter.The Interleaved Boost Converters, which encompass of 2 single stage Converters, are related in equal and afterward to a solitary yield capacitor [9–13, 15–18]. The 2-pulse width modulation sign distinction is 1800, and each switch is controlled by the interleaving strategy. Since every inductor current greatness is diminished by one for each stage, the inductor size and inductance can be diminished and furthermore the info current wave is diminished.


## 2. DC-to-DC Boost Converter

Boost Converter aptitude aims to fill in as venture up voltage starting on one level then to the next level. The DC-DC Boost Converter circuit is appeared in Figure2.Figure 2
DC-DC-boost converter circuit.BC equation in CCM can be inscribed as the following [17]. The input to yield voltage conversion-ratio is assimilated as follows:(1)Vo=Vi1−D.The loss Boost Converter duty ratio is(2)D=1−ηMDC1−ηViVo,where “Converter efficiency” is η and “transferal function of voltage” is C. The minimum and maximum load resistances are(3)Rmin=VoIomin,Rmax=VoIomin,MDCmin=VoVimax.


### 2.1. Research Gap

The exceeding literature does not pact with DCM fed from 2-stage ILBC. This work proposes 2-stage ILBC for 2-stage ILBC-DCM. There is a prerequisite to augment the dynamic response of Interleaved Boost Converter-DC Motor System. The overhead writing does not talk about augmentation of the dynamic response using Proportional integral/fuzzy logic controlled two-loop ILBC-DCMS. This work suggests Fuzzy logic controller for Interleaved Boost Converter-DC Motor System as Interleaved Boost Converter and DC Motor characteristics are nonlinear.


### 2.2. System Description

Figure3 outlines the block diagram of open-loop ILBC-DCMS. Figure 4 outlines the block diagram of two-loop Interleaved Boost Converter-DC Motor System with Proportional integral/Fuzzy logic controller. The speed of DC Motor is linked to a dimension speed. The F. Law is pragmatic to a speed Proportional integral controller. The yield of Proportional integral is equated with the actual current. The yield of the current Proportional integral is functional on a comparator. The comparator apprises the pulse size applied to Interleaved Boost Converters.Figure 3
Block diagram of open loop Interleaved Boost Converter-DC Motor System.Figure 4
Block diagram of two Interleaved Boost Converter-DC Motor System with PI/Fuzzy logic controller.The equations of DC machine are as follows:(4)Vi1b=Ri+Ldidt+eb,T=Βfw+Jmdwdt.The equations of PI-PI are as follows:(5)Iref=k1Ie+k4†Ne,Vpi2=k3Ie+k4†Ie.


## 2.1. Research Gap

The exceeding literature does not pact with DCM fed from 2-stage ILBC. This work proposes 2-stage ILBC for 2-stage ILBC-DCM. There is a prerequisite to augment the dynamic response of Interleaved Boost Converter-DC Motor System. The overhead writing does not talk about augmentation of the dynamic response using Proportional integral/fuzzy logic controlled two-loop ILBC-DCMS. This work suggests Fuzzy logic controller for Interleaved Boost Converter-DC Motor System as Interleaved Boost Converter and DC Motor characteristics are nonlinear.


## 2.2. System Description

Figure3 outlines the block diagram of open-loop ILBC-DCMS. Figure 4 outlines the block diagram of two-loop Interleaved Boost Converter-DC Motor System with Proportional integral/Fuzzy logic controller. The speed of DC Motor is linked to a dimension speed. The F. Law is pragmatic to a speed Proportional integral controller. The yield of Proportional integral is equated with the actual current. The yield of the current Proportional integral is functional on a comparator. The comparator apprises the pulse size applied to Interleaved Boost Converters.Figure 3
Block diagram of open loop Interleaved Boost Converter-DC Motor System.Figure 4
Block diagram of two Interleaved Boost Converter-DC Motor System with PI/Fuzzy logic controller.The equations of DC machine are as follows:(4)Vi1b=Ri+Ldidt+eb,T=Βfw+Jmdwdt.The equations of PI-PI are as follows:(5)Iref=k1Ie+k4†Ne,Vpi2=k3Ie+k4†Ie.


## 3. Results and Discussion of ILBC-DCMS

### 3.1. Open-Loop ILBC-DCMS with Source Disturbance

Figure5 delineates the circuit diagram of ILBC-DCMS with source disturbance. Figure 6 delineates the input voltage specified to the framework. The input voltage assessment is augmented from 48 V to 55 V. Figure 7 delineates the voltage across the motor load of ILBC-DCMS with source disturbance. The significance of voltage across the motor load initially upsurges and then declines to 410 V at t = 2.5 sec and it is stable. Figure 8 delineates the current through the motor load of ILBC-DCMS with source disturbance. The value of current through the motor load initially upsurges and then declines to 5 A and it is stable. Figure 9 delineates the motor speed of ILBC-DCMS with source disturbance. The value of motor speed initially upsurges and then diminishes to 1250 RPM and it is stable. Figure 10 delineates the motor torque of ILBC-DCMS with source disturbance, and the assessment attained is 5 N-m.Figure 5
Circuit diagram of open-loop Interleaved Boost Converter-DC Motor System with source disturbance.Figure 6
Input voltage of Interleaved Boost Converter-DC Motor System.Figure 7
Voltage across motor load of Interleaved Boost Converter-DC Motor System.Figure 8
Current through the motor load of Interleaved Boost Converter-DC Motor System.Figure 9
Motor speed of Interleaved Boost Converter-DC Motor System.Figure 10
Motor Torque of Interleaved Boost Converter-DC Motor System.The voltage output and speed of open-loop interleaved Boost Converter-DC Motor System upsurges due to a disturbance at the input. Hence, it is projected to go for closed-loop ILBC-DCMS with Proportional Integral/Fuzzy Logic controller.


### 3.2. Two-Loop ILBC-DCMS with and without P.I–P.I Controller and FLC-FLC

Figure11 delineates the two-loop Interleaved Boost Converter-DC Motor System circuit diagram with P.I–P.Controller. Figure 12 delineates the two-loop Interleaved Boost Converter-DC Motor System circuit diagram with FLC-FLC. Figure 13 delineates the Voltage across the motor load of Interleaved Boost Converter-DC Motor System with and without P.I–P.Controller and FLC-FLC. The value of Voltage across the motor load without controller is 410 V. The Voltage across the motor load with PI-PI initially upsurges and then declines to 410 V at t = 2.5 sec and it is stable. Voltage across the motor load with FLC-FLC gradually upsurges and reaches 380 V. Figure 14 delineates the Current through the motor load of Interleaved Boost Converter-DC Motor System with and without p.I–P.Icontroller and FLC-FLC. The value of current through the motor load without controller initially upsurges and then declines to 8 A and it is stable. The value of current through motor load with PI-PI initially upsurges and then declines to 6 A and it is stable. The value of current through motor load with FLC-FLC initially upsurges and then declines to 4 A and it is stable. Figure 15 delineates the Motor speed of Interleaved Boost Converter-DC Motor System with and without P.I–P.I and FLC-FLC controller. The value of motor speed without controller initially enhances and then gradually declines to 1300 RPM. The value of motor speed for PI-PI initially declines and then gradually upsurges to 1000 RPM and it is stable. The value of motor speed for FLC-FLC initially declines and then gradually upsurges to 1000 RPM and it is stable. Figure 16 delineates Interleaved Boost Converter-DC Motor System’s motor torque value without and with p.I–P.I and FLC-FLC controller. Motor torque of Interleaved Boost Converter-DC Motor System without controller is 10 N-m. Motor torque value of Interleaved Boost Converter-DC Motor System with PI-PI controller is 9 N-m.Figure 11
Two-loop Interleaved Boost Converter-DC Motor System with P.I–P.I controller.Figure 12
Two-loop Interleaved Boost Converter-DC Motor System with FLC-FLC.Figure 13
Voltage across motor load controller, PI-PI and FLC-FLC.Figure 14
Current through motor load controller, PI-PI and FLC-FLC.Figure 15
Motor speed controller, PI-PI and FLC-FLC.Figure 16
Motor Torque controller, PI-PI and FLC-FLC.Assessment of time domain parameters using P.I–P.I and F.LC-F.LC (NREF = 1000 RPM) is specified in Table1. By using F.LC-F.LC, the rise time is moderated from 1.74 Sec to 0.33 Sec; greatest time is moderated from 2.10 Sec to 0.64 Sec; the settle down time is moderated from 2.15 Sec to 0.72 Sec; the steady state error is moderated from 1.6 V to 0.1 V; and ripple voltage is moderated from 0.9 N-m to 0.008 N-m.Table 1
Assessment of time domain parameters NREF = 1000 RPM.
Type of controllerTrTpTsEssPI–PI1.742.102.151.6FLC-FLC0.330.640.720.1Assessment of time domain parameters using P.I–P.I and F.LC-F.LC (NREF = 950 RPM) is specified in Table2. By using F.LC-F.LC, the rise time is moderated from 1.77 Sec to 0.38 Sec; greatest time is moderated from 2.75 Sec to 0.79 Sec; settle down time is moderated from 2.75  Sec to 0.79 Sec; the steady state error is moderated from 1.8 V to 0.3 V.Table 2
Assessment of time domain parameters Nref = 950 RPM.
Type of controllerTrTpTsEssPI–PI1.772.302.751.8FLC-FLC0.380.700.790.3Assessment of time domain parameters using P.I–P.I and FLC-FLC (NREF = 900 RPM) is specified in Table3. By using F.LC-F.LC, the rise time is moderated from 1.79 Sec to 0.39 Sec; greatest time is moderated from 2.48 Sec to 0.73 Sec; settle down time is moderated from 2.86 Sec to 0.81 Sec; the steady state error is moderated from 1.9 V to 0.4 V.Table 3
Comparison table of time domain parameters Nref = 900 rpm.
Type of controllerTrTpTsEssPI–PI1.792.482.861.9FLC-FLC0.390.730.810.4Figure17 outlines the bar chart representation of ripple voltage. Comparison of torque ripple using P.I–P.I and F.LC-F.LC is specified in Table 4. Hence, the outcome represents that the F. LC-F.L-controlled two-loop Interleaved Boost DC-DC Converter is superior to P.I–P.I controlled two-loop Interleaved Boost DC-DC Converter. Torque ripple of Interleaved Boost Converter-DC Motor System with F.L-F.L controller is as minimum as 0.008 N-m.Figure 17
Bar chart representation of torque ripple using P.I–P.I and F.LC-F.LC.Table 4
Comparison of Torque Ripple using P.I–P.I and F.LC-F.LC
Type of controllerTr (N-m)P.I –P.I0.9F.LC-F.LC0.008Table 5
Simulation parameters.
Vin48 VC1, C20.1μFL1, L210 mHC3, C42000μFFrequency50 HzMosfetIRF840DiodeIN4007N1000 rpmV0360 VSimulation parameters are presented in Table5.The input variable 1 is shown in Figure18. The input variable 2 is shown in Figure 19. The output variable is shown in Figure 20. The surface viewer plot is shown in Figure 21.Figure 18
Plot for input1.Figure 19
Plot for input2.Figure 20
Plot for output.Figure 21
Surface viewer plot.


## 3.1. Open-Loop ILBC-DCMS with Source Disturbance

Figure5 delineates the circuit diagram of ILBC-DCMS with source disturbance. Figure 6 delineates the input voltage specified to the framework. The input voltage assessment is augmented from 48 V to 55 V. Figure 7 delineates the voltage across the motor load of ILBC-DCMS with source disturbance. The significance of voltage across the motor load initially upsurges and then declines to 410 V at t = 2.5 sec and it is stable. Figure 8 delineates the current through the motor load of ILBC-DCMS with source disturbance. The value of current through the motor load initially upsurges and then declines to 5 A and it is stable. Figure 9 delineates the motor speed of ILBC-DCMS with source disturbance. The value of motor speed initially upsurges and then diminishes to 1250 RPM and it is stable. Figure 10 delineates the motor torque of ILBC-DCMS with source disturbance, and the assessment attained is 5 N-m.Figure 5
Circuit diagram of open-loop Interleaved Boost Converter-DC Motor System with source disturbance.Figure 6
Input voltage of Interleaved Boost Converter-DC Motor System.Figure 7
Voltage across motor load of Interleaved Boost Converter-DC Motor System.Figure 8
Current through the motor load of Interleaved Boost Converter-DC Motor System.Figure 9
Motor speed of Interleaved Boost Converter-DC Motor System.Figure 10
Motor Torque of Interleaved Boost Converter-DC Motor System.The voltage output and speed of open-loop interleaved Boost Converter-DC Motor System upsurges due to a disturbance at the input. Hence, it is projected to go for closed-loop ILBC-DCMS with Proportional Integral/Fuzzy Logic controller.


## 3.2. Two-Loop ILBC-DCMS with and without P.I–P.I Controller and FLC-FLC

Figure11 delineates the two-loop Interleaved Boost Converter-DC Motor System circuit diagram with P.I–P.Controller. Figure 12 delineates the two-loop Interleaved Boost Converter-DC Motor System circuit diagram with FLC-FLC. Figure 13 delineates the Voltage across the motor load of Interleaved Boost Converter-DC Motor System with and without P.I–P.Controller and FLC-FLC. The value of Voltage across the motor load without controller is 410 V. The Voltage across the motor load with PI-PI initially upsurges and then declines to 410 V at t = 2.5 sec and it is stable. Voltage across the motor load with FLC-FLC gradually upsurges and reaches 380 V. Figure 14 delineates the Current through the motor load of Interleaved Boost Converter-DC Motor System with and without p.I–P.Icontroller and FLC-FLC. The value of current through the motor load without controller initially upsurges and then declines to 8 A and it is stable. The value of current through motor load with PI-PI initially upsurges and then declines to 6 A and it is stable. The value of current through motor load with FLC-FLC initially upsurges and then declines to 4 A and it is stable. Figure 15 delineates the Motor speed of Interleaved Boost Converter-DC Motor System with and without P.I–P.I and FLC-FLC controller. The value of motor speed without controller initially enhances and then gradually declines to 1300 RPM. The value of motor speed for PI-PI initially declines and then gradually upsurges to 1000 RPM and it is stable. The value of motor speed for FLC-FLC initially declines and then gradually upsurges to 1000 RPM and it is stable. Figure 16 delineates Interleaved Boost Converter-DC Motor System’s motor torque value without and with p.I–P.I and FLC-FLC controller. Motor torque of Interleaved Boost Converter-DC Motor System without controller is 10 N-m. Motor torque value of Interleaved Boost Converter-DC Motor System with PI-PI controller is 9 N-m.Figure 11
Two-loop Interleaved Boost Converter-DC Motor System with P.I–P.I controller.Figure 12
Two-loop Interleaved Boost Converter-DC Motor System with FLC-FLC.Figure 13
Voltage across motor load controller, PI-PI and FLC-FLC.Figure 14
Current through motor load controller, PI-PI and FLC-FLC.Figure 15
Motor speed controller, PI-PI and FLC-FLC.Figure 16
Motor Torque controller, PI-PI and FLC-FLC.Assessment of time domain parameters using P.I–P.I and F.LC-F.LC (NREF = 1000 RPM) is specified in Table1. By using F.LC-F.LC, the rise time is moderated from 1.74 Sec to 0.33 Sec; greatest time is moderated from 2.10 Sec to 0.64 Sec; the settle down time is moderated from 2.15 Sec to 0.72 Sec; the steady state error is moderated from 1.6 V to 0.1 V; and ripple voltage is moderated from 0.9 N-m to 0.008 N-m.Table 1
Assessment of time domain parameters NREF = 1000 RPM.
Type of controllerTrTpTsEssPI–PI1.742.102.151.6FLC-FLC0.330.640.720.1Assessment of time domain parameters using P.I–P.I and F.LC-F.LC (NREF = 950 RPM) is specified in Table2. By using F.LC-F.LC, the rise time is moderated from 1.77 Sec to 0.38 Sec; greatest time is moderated from 2.75 Sec to 0.79 Sec; settle down time is moderated from 2.75  Sec to 0.79 Sec; the steady state error is moderated from 1.8 V to 0.3 V.Table 2
Assessment of time domain parameters Nref = 950 RPM.
Type of controllerTrTpTsEssPI–PI1.772.302.751.8FLC-FLC0.380.700.790.3Assessment of time domain parameters using P.I–P.I and FLC-FLC (NREF = 900 RPM) is specified in Table3. By using F.LC-F.LC, the rise time is moderated from 1.79 Sec to 0.39 Sec; greatest time is moderated from 2.48 Sec to 0.73 Sec; settle down time is moderated from 2.86 Sec to 0.81 Sec; the steady state error is moderated from 1.9 V to 0.4 V.Table 3
Comparison table of time domain parameters Nref = 900 rpm.
Type of controllerTrTpTsEssPI–PI1.792.482.861.9FLC-FLC0.390.730.810.4Figure17 outlines the bar chart representation of ripple voltage. Comparison of torque ripple using P.I–P.I and F.LC-F.LC is specified in Table 4. Hence, the outcome represents that the F. LC-F.L-controlled two-loop Interleaved Boost DC-DC Converter is superior to P.I–P.I controlled two-loop Interleaved Boost DC-DC Converter. Torque ripple of Interleaved Boost Converter-DC Motor System with F.L-F.L controller is as minimum as 0.008 N-m.Figure 17
Bar chart representation of torque ripple using P.I–P.I and F.LC-F.LC.Table 4
Comparison of Torque Ripple using P.I–P.I and F.LC-F.LC
Type of controllerTr (N-m)P.I –P.I0.9F.LC-F.LC0.008Table 5
Simulation parameters.
Vin48 VC1, C20.1μFL1, L210 mHC3, C42000μFFrequency50 HzMosfetIRF840DiodeIN4007N1000 rpmV0360 VSimulation parameters are presented in Table5.The input variable 1 is shown in Figure18. The input variable 2 is shown in Figure 19. The output variable is shown in Figure 20. The surface viewer plot is shown in Figure 21.Figure 18
Plot for input1.Figure 19
Plot for input2.Figure 20
Plot for output.Figure 21
Surface viewer plot.


## 4. Experimental Results of Interleaved Boost Converter-DC Motor System

To verify the routine and functionality of the Modified Interleaved, Boost Converter-DC Motor System has been carried out using mat lab/∗Simulink and a prototype is established. An IRF840 MOSFET is cast-off as the switch. For the gate pulses, P.IC16F84 A microcontroller is utilized to generate a pulse of 10 kHz frequency. The hardware comprises of control circuit, rectifier circuit, I.L.B.C-board, and the load. The I.L.B.C hardware and snap shot are outlined in Figure 22. The PV panel powered by halogen lamp is utilized as a source, and by using a charge controller, the input voltage is regulated to 12 V and is supplied to the Converter. Input voltage is outlined in Figure 23. Switching pulses for M1 and M2 are seemed in Figure 24. The Interleaved Boost Converter-DC Motor System’s output voltage is seemed in Figure 25. Motor current of I.L.B.C-D.C.MS is outlined in Figure 26. Complete hardware circuit diagram of Interleaved Boost Converter-DC Motor System is delineated in Figure 27. Hardware component list for Interleaved Boost Converter-DC Motor System is given in Table 6.Figure 22
Hardware snap shot of Interleaved Boost Converter-DC Motor System.Figure 23
Voltage input of Interleaved Boost Converter-DC Motor System.Figure 24
Switching pulses for M1 and M2.Figure 25
Voltage output of Interleaved Boost Converter-DC Motor System.Figure 26
Motor current of Interleaved Boost Converter-DC Motor System.Figure 27
Hardware diagram of Interleaved Boost Converter-DC Motor System.Table 6
List of components of Interleaved Boost Converter-DC Motor System.
S. No.NameRatingType1Capacitor1.00E − 03Electrolytic2Capacitor4.70E − 05Electrolytic3Capacitor3.30E − 11Disc4Capacitor2.20E − 03Electrolytic5Diode1000 V, 3 APN junction6Inductance10 uHFerrite coil7MOSFET (IR840)600 V, 8 AN-channel8Resistor1 kQuarter watts9Resistor100 EWatts10Resistor22 EDisc11Regulator12 VL7812/TO312Regulator5 VL7805/TO22013ICIR2110Opto-coupler14PIC controllerP.IC16F84Disc15PCBV105General


## 5. Conclusion

This work deals with two-loop P.I–P.I and F.LC-Fuzzy logic controls two Interleaved Boost-Converter-DC Motor System. Interleaved Boost Converter speed is regulated using two-loop configurations. Two-loop P.I–P.I and F.LC-Fuzzy logic controlled Interleaved Boost DC-DC Converters are designed, analyzed, and simulated. The response of F.LC-F.LC Interleaved Boost Converter-DC Motor System is compared with Proportional Integral-controlled Interleaved Boost Converter-DC Motor System. F.LC-F.LC has minimum overshoot and produces a constant yield of D.C.M speed. From these data, it can be deduced that the settling time is reduced from the array of 2.15 seconds to 0.72 seconds, which would enhance the permanence of the framework with Fuzzy Logic Controller platform than a PIC-platform.The proposed two-loop interleaved Boost Converter-DC Motor System has advantages like high power capability and improved time domain response. Interleaved Boost Converter-DC Motor System has a disadvantage like the requirement of two Boost Converters. The contribution of this work is to advance the dynamic report of the two-loop interleaved Boost Converter-DC Motor System with a feedback system. Current ripple is reduced using 2SILBC and a fast time response in ILBC-DCM is achieved using FLC. ILBC requires two controlled switches and DC motor has high inertia. The SMC-based two-loop interleaved Boost Converter-DC Motor system will be simulated in future. The hardware of ILBC-DCM is implemented using PIC16F84. The hardware of ILBC-DCM can be implemented using DSPIC to increase the switching frequency. High power ILBC-DCM -drive may be implemented using IGBTs.



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