# A Fuzzy-Based Coordinated Power Management Strategy for Voltage Regulation and State-of-Charge Balancing in Multiple Subgrid-Based DC Microgrid

Authors: Mrutunjaya Panda; Devara Vijaya Bhaskar; Tanmoy Maity
Journal: International Transactions on Electrical Energy Systems
 (2022)

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## Abstract

Multiple DC subgrids in close proximity can be connected to form a DC microgrid. The interconnected DC subgrids enhance reliability and efficient utilization of resources. In this paper, a novel coordinated power management strategy is proposed for interconnected subgrids of a DC microgrid. Each DC subgrid has PV and battery units. The proposed strategy is implemented on interlinking bidirectional converters (IBCs). The strategy considers the state-of-charge (SoC) and charging/discharging current of the batteries for SoC balancing-based power sharing through IBCs. A fuzzy logic controller is implemented to decide the amount of power flow through the IBCs from SoC and the charging/discharging current of battery units. Moreover, with the coordinated strategy, a high SoC battery takes more loads compared to a lower SoC battery. The proposed strategy supports fast charging and fast discharging of batteries depending on the SoC level. In addition, the coordinated strategy can seamlessly transfer the control of IBC from the power regulating mode to the voltage regulating mode without any additional control scheme during an outage of the battery unit. The feasibility of the proposed strategy is validated through simulation in MATLAB/Simulink and OPAL-RT real-time digital simulator.


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## Body

## 1. Introduction

With renewable energy sources (RESs) and storage systems such as photovoltaic (PV), wind generators, fuel cells, and batteries, DC microgrids (DCMGs) are gaining importance in day-to-day life. DCMGs have advantages over AC microgrids like higher efficiency due to fewer conversion stages, no transfer of reactive power, and no synchronization issue [1–4]. The excessive addition of unpredictable RESs and uncertainty in load variations create challenges in managing the stability of DCMG [5]. To improve the reliability and stability of DCMG, multiple subgrids can be interconnected in close vicinity to form a DCMG cluster. The interconnceted subgrids can support each other in a coordinated way. The main advantages of interconnected DC subgrids are (1) the need for fewer energy storage units, (2) full utilization of RES and energy storage units, (3) optimal economic dispatch through coordination control, and (4) enhanced stability and reliability of DCMG [6–8].In general, multiple subgrids of a DCMG can be connected through tie-line and breakers [9, 10]. The tie-line-based interconnection may reduce the flexibility of DCMG. The plug-and-play features of DC subgrids are also influenced, which reduces the scalability of DCMG. To enhance the flexibility and reliability of interlinking DC subgrids, multiple DC subgrids can be connected through interlinking bidirectional converters (IBCs). In [11, 12], a centralized structure-based coordination control strategy for IBC has been discussed, which relies on communication lines. Although the centralized controller has better controllability and observability control, it has communication failure issues, less reliability, scalability, and flexibility issues [13]. To improve the system’s reliability, decentralized droop control techniques are widely adopted [14–16]. The droop control strategies provide reliable and flexible operation of DCMG. However, the major drawback of the droop control strategy is poor voltage regulation, which may affect voltage-sensitivity loads. Moreover, the droop strategy may lead to circulating current problems in DC subgrids. To avoid these issues, secondary controllers are added above the primary droop controller in DC subgrids [17]. For the secondary controller, the low bandwidth communication (LBC) channel shares the desired information to mitigate the voltage droop error and establishes a coordinated power flow among the subgrids [18].In [19], a coordinated power sharing strategy using the secondary controller is presented. In the presented method, load demand information is shared over LBC to the secondary controllers of local generation and IBC. The implemented strategy regulates the DC bus voltage at its reference value. However, SoC balancing strategy has not been established. A coordinated power management strategy for a DCMG cluster is implemented in [20]. With the proposed strategy, battery capacity-based power regulation and bus voltage regulation have been achieved. However, SoC-based power regulation among the subgrids has not been considered in the presented strategy. Further, the peak voltage deviations are more than 5% of their nominal values. A hybrid control structure for interconnected DCMGs is proposed in [21]. The proposed structure mainly focused on the regulation of DC bus voltages. However, the presented method does not consider the SoC of the battery and the peak capacity of individual subgrids. In [22], a power sharing strategy using a common bus is proposed for interlinked DCMGs. In the presented strategy, common bus voltage information is used for power sharing. However, the proposed strategy does not consider the SoC balancing of storage units. Further, the common bus voltage oscillates with the change in load demand. In [23], a power sharing strategy using a priority-driven IBC control technique is proposed. In this strategy, the IBC power regulation depends on the bus voltage deviation of DCMG. Further, SoC balancing-based power management has not been addressed in the proposed method.A power sharing strategy for multiple subgrids through the interlinking bidirectional converters is proposed in [24]. The proposed strategy tunes the IBCs from normalized voltage error information obtained from different subgrids. A coordinated secondary control strategy is added to improve the DC bus voltage regulation as well as the power sharing performance of IBCs. In [25, 26], a power management strategy using DC bus-signaling method is proposed. In this strategy, the DC bus voltage is regulated by battery controllers. However, overcharging and overdischarging of the battery have not been considered. An SoC-based power management scheme is presented in [27]. In this strategy, the DC bus voltage is regulated by the secondary controller of the battery. However, the proposed strategy is not suitable for the interconnection of subgrids. A tie-line-based power management scheme for interconnected DCMGs is proposed in [28–30]. In this structure, the power flow among the DCMGs depends on the voltage droop characteristics of the DC buses. Hence, with this structure, nominal DC bus voltage regulation is difficult to achieve, and the flexibility of DCMGs may reduce.From the aforementioned literature, a coordinated power sharing strategy for interlinked DC subgrids is a challenging task. Further, the power sharing strategy should consider the SoC balancing of the battery units and nominal voltage regulation of DC buses. To overcome these issues, a coordinated power management strategy (CPMS) considering SoC and DC bus voltage is proposed in this paper. The proposed coordination strategy is implemented on three DC subgrids connected through IBCs. Each subgrid has a PV, a battery unit, and DC loads connected to its DC bus. For SoC balancing and coordinated power sharing among the subgrids, a fuzzy-based coordinated secondary control technique for IBC is proposed.The main contribution of the proposed strategy can be summarized as follows:(1)
A fuzzy-based CPMS is proposed for IBC control. The fuzzy-based CPMS is robust and ensures reliable operation and critical control of DC bus voltage magnitude during load switching.(2)
The proposed CPMS enables a low SoC battery to fast charge than a high SoC battery, which restrains the deep discharge of a low SoC battery. Further, the CPMS enables a high SoC battery to charge at a slower rate and take more load demand. Hence, overcharging of the battery can be avoided.(3)
The CPMS can regulate the DC bus voltage of each DC subgrid at its nominal value. Hence, the voltage-sensitive loads remain unaffected by changes in load demand, unlike the droop control strategy.(4)
The proposed strategy supports the plug-and-play operation of storage. Moreover, with the proposed CPMS, a seamless mode transition with improved transient stability can be established.The rest of the paper is organized as follows: configuration of DCMG, voltage regulation strategy for subgrids, and IBC controller are illustrated in Section2. The coordinated power sharing strategy is illustrated in Section 3. In this section, SoC-based coordination control strategy with fast charging and discharging of battery is manifested. The mathematical model of converters, stability analysis, and sensitivity analysis are illustrated in Section 4. Simulation results are shown in Section 5 to verify the power sharing strategy. Section 6 concludes the paper.


## 2. Structure and Control of DCMG

### 2.1. Structure of DCMG

Figure1 shows the structure of interconnected subgrids of a DCMG. Three DC subgrids are connected to form an islanded DCMG. These subgrids are connected through two interconnected IBCs. The proposed configuration can be extended to more subgrids when necessary. In each subgrid, battery and PV generations are included. The battery terminal regulates the DC bus voltage, and PV operates as a constant power source.Figure 1
Structure of DCMG


### 2.2. Coordinated Power Management Strategy

The coordinated power management strategy includes regulation of DC bus voltage and SoC-based power sharing among the subgrids. The DC bus voltage regulation is managed by a battery controller, and SoC-based power sharing is managed by an IBC controller. These controllers operate in multilayer structures with different time scales. For the battery controller, the droop-based primary controller layer and DC bus voltage regulation-based secondary control layer are implemented. For the IBC controller, the primary controller is the conventional power regulating controller, and the secondary controller is the SoC balancing-based power sharing control strategy. Further, The PV generation in each subgrid operates in maximum powerpoint tracking (MPPT) mode or power control mode. Hence, for the PV generation regulation, the existing control strategy in [31] is implemented. A detailed analysis of PV controller is not discussed in this paper. In this section, a detailed analysis of battery control and IBC control strategies is elaborated.


#### 2.2.1. Battery Controller

The battery controller consists of a primary control loop and a secondary control loop, as shown in Figure2. The primary droop control technique for voltage regulation of DCMG can be expressed as [32](1)Vref=Vnom−a⋅Pb,a=Vmax−VnomPb_max,where Vref is the reference DC bus voltage, Vnom is the nominal DC bus voltage, a is a voltage droop gain, Vmax is the maximum DC voltage at the output of the converter, Pb is the power of the battery, and Pb_max is the peak power of the battery.Figure 2
Block diagram of the battery controller [32].The primary droop controller is the fastest control loop in the power management strategy. It ensures the voltage stability of the DCMG. However, the droop-based control of the battery controller causes DC bus voltage deviation while regulating the generation and demand. Hence, a secondary control structure is included in each battery controller to restore the DC bus voltage to its nominal value. The DC bus voltage is measured and sent to the secondary layer through a low bandwidth communication (LBC). A PI controller is used to generate a voltage correction factor for the primary layer as follows:(2)δVm=kps+kissVnom−Vdc,where kps is the proportional gain, and kis is the integral gain of the secondary PI controller. The shifting term δVm shifts the line droop characteristics to maintain the bus voltage at its nominal value.


#### 2.2.2. IBC Controller

In each IBC, two layers of control structures are used, similar to the battery control strategy. The primary control layer of the IBC is the power control loop. The main aim of the primary loop is to track the reference power generated by the secondary control layer. The secondary control layer is included in the IBC control structure to improve the power flow among the subgrids based on the DC bus voltage of each subgrid. In the conventional IBC control, the normalized DC bus voltage deviation-based IBC control strategy is adopted, benefiting coordinated power-sharing among the subgrids. The normalized DC bus voltage deviation (NVi) can be expressed as [24](3)NVi=Vnomi−Vdcini,ni=Vuci−Vlci,where Vlci and Vuci are the lower and upper limits of DC voltage of ith subgrid, respectively. At balance condition, i.e., NV1=NV2, the power flow through the IBC does not require to be changed. At unbalance condition, a secondary controller is added to impel NV1=NV2. However, the secondary battery controller also eliminates the normalized voltage deviation. Therefore, the normalized voltage deviation-based IBC secondary controller is inept in maintaining the supply and demand of subgrids from the normalized voltages. It results in poor performance of the IBC power sharing strategy. To achieve coordination in power sharing, the LBC can be utilized as an information career. By using LBC, a coordinated secondary control strategy for the IBC is proposed. A detailed analysis of the proposed coordinated secondary IBC control strategy is elaborated in Section 3.


## 2.1. Structure of DCMG

Figure1 shows the structure of interconnected subgrids of a DCMG. Three DC subgrids are connected to form an islanded DCMG. These subgrids are connected through two interconnected IBCs. The proposed configuration can be extended to more subgrids when necessary. In each subgrid, battery and PV generations are included. The battery terminal regulates the DC bus voltage, and PV operates as a constant power source.Figure 1
Structure of DCMG


## 2.2. Coordinated Power Management Strategy

The coordinated power management strategy includes regulation of DC bus voltage and SoC-based power sharing among the subgrids. The DC bus voltage regulation is managed by a battery controller, and SoC-based power sharing is managed by an IBC controller. These controllers operate in multilayer structures with different time scales. For the battery controller, the droop-based primary controller layer and DC bus voltage regulation-based secondary control layer are implemented. For the IBC controller, the primary controller is the conventional power regulating controller, and the secondary controller is the SoC balancing-based power sharing control strategy. Further, The PV generation in each subgrid operates in maximum powerpoint tracking (MPPT) mode or power control mode. Hence, for the PV generation regulation, the existing control strategy in [31] is implemented. A detailed analysis of PV controller is not discussed in this paper. In this section, a detailed analysis of battery control and IBC control strategies is elaborated.


### 2.2.1. Battery Controller

The battery controller consists of a primary control loop and a secondary control loop, as shown in Figure2. The primary droop control technique for voltage regulation of DCMG can be expressed as [32](1)Vref=Vnom−a⋅Pb,a=Vmax−VnomPb_max,where Vref is the reference DC bus voltage, Vnom is the nominal DC bus voltage, a is a voltage droop gain, Vmax is the maximum DC voltage at the output of the converter, Pb is the power of the battery, and Pb_max is the peak power of the battery.Figure 2
Block diagram of the battery controller [32].The primary droop controller is the fastest control loop in the power management strategy. It ensures the voltage stability of the DCMG. However, the droop-based control of the battery controller causes DC bus voltage deviation while regulating the generation and demand. Hence, a secondary control structure is included in each battery controller to restore the DC bus voltage to its nominal value. The DC bus voltage is measured and sent to the secondary layer through a low bandwidth communication (LBC). A PI controller is used to generate a voltage correction factor for the primary layer as follows:(2)δVm=kps+kissVnom−Vdc,where kps is the proportional gain, and kis is the integral gain of the secondary PI controller. The shifting term δVm shifts the line droop characteristics to maintain the bus voltage at its nominal value.


### 2.2.2. IBC Controller

In each IBC, two layers of control structures are used, similar to the battery control strategy. The primary control layer of the IBC is the power control loop. The main aim of the primary loop is to track the reference power generated by the secondary control layer. The secondary control layer is included in the IBC control structure to improve the power flow among the subgrids based on the DC bus voltage of each subgrid. In the conventional IBC control, the normalized DC bus voltage deviation-based IBC control strategy is adopted, benefiting coordinated power-sharing among the subgrids. The normalized DC bus voltage deviation (NVi) can be expressed as [24](3)NVi=Vnomi−Vdcini,ni=Vuci−Vlci,where Vlci and Vuci are the lower and upper limits of DC voltage of ith subgrid, respectively. At balance condition, i.e., NV1=NV2, the power flow through the IBC does not require to be changed. At unbalance condition, a secondary controller is added to impel NV1=NV2. However, the secondary battery controller also eliminates the normalized voltage deviation. Therefore, the normalized voltage deviation-based IBC secondary controller is inept in maintaining the supply and demand of subgrids from the normalized voltages. It results in poor performance of the IBC power sharing strategy. To achieve coordination in power sharing, the LBC can be utilized as an information career. By using LBC, a coordinated secondary control strategy for the IBC is proposed. A detailed analysis of the proposed coordinated secondary IBC control strategy is elaborated in Section 3.


## 2.2.1. Battery Controller

The battery controller consists of a primary control loop and a secondary control loop, as shown in Figure2. The primary droop control technique for voltage regulation of DCMG can be expressed as [32](1)Vref=Vnom−a⋅Pb,a=Vmax−VnomPb_max,where Vref is the reference DC bus voltage, Vnom is the nominal DC bus voltage, a is a voltage droop gain, Vmax is the maximum DC voltage at the output of the converter, Pb is the power of the battery, and Pb_max is the peak power of the battery.Figure 2
Block diagram of the battery controller [32].The primary droop controller is the fastest control loop in the power management strategy. It ensures the voltage stability of the DCMG. However, the droop-based control of the battery controller causes DC bus voltage deviation while regulating the generation and demand. Hence, a secondary control structure is included in each battery controller to restore the DC bus voltage to its nominal value. The DC bus voltage is measured and sent to the secondary layer through a low bandwidth communication (LBC). A PI controller is used to generate a voltage correction factor for the primary layer as follows:(2)δVm=kps+kissVnom−Vdc,where kps is the proportional gain, and kis is the integral gain of the secondary PI controller. The shifting term δVm shifts the line droop characteristics to maintain the bus voltage at its nominal value.


## 2.2.2. IBC Controller

In each IBC, two layers of control structures are used, similar to the battery control strategy. The primary control layer of the IBC is the power control loop. The main aim of the primary loop is to track the reference power generated by the secondary control layer. The secondary control layer is included in the IBC control structure to improve the power flow among the subgrids based on the DC bus voltage of each subgrid. In the conventional IBC control, the normalized DC bus voltage deviation-based IBC control strategy is adopted, benefiting coordinated power-sharing among the subgrids. The normalized DC bus voltage deviation (NVi) can be expressed as [24](3)NVi=Vnomi−Vdcini,ni=Vuci−Vlci,where Vlci and Vuci are the lower and upper limits of DC voltage of ith subgrid, respectively. At balance condition, i.e., NV1=NV2, the power flow through the IBC does not require to be changed. At unbalance condition, a secondary controller is added to impel NV1=NV2. However, the secondary battery controller also eliminates the normalized voltage deviation. Therefore, the normalized voltage deviation-based IBC secondary controller is inept in maintaining the supply and demand of subgrids from the normalized voltages. It results in poor performance of the IBC power sharing strategy. To achieve coordination in power sharing, the LBC can be utilized as an information career. By using LBC, a coordinated secondary control strategy for the IBC is proposed. A detailed analysis of the proposed coordinated secondary IBC control strategy is elaborated in Section 3.


## 3. Proposed Coordinated Secondary IBC Control

Figure3 shows the power regulation control structure of an IBC. By using LBCs, a coordinated secondary controller is developed for the IBC with the awareness of the DC bus voltage, SoC, and Ib information of connected subgrids. The coordinated IBC secondary controller has two objectives, named as (i) SoC-based power sharing and (ii) seamless transfer of IBC controller from power sharing mode to voltage regulation mode and vice versa during plug-and-play of the battery unit in a subgrid. A detailed analysis of the seamless transfer of the mode of the IBC controller is discussed in Section 4. In this section, SoC-based power sharing strategy with fast charging and fast discharging operation mode is manifested.Figure 3
Block diagram of IBC controller.


### 3.1. SoC-Based Power Sharing

For proportional power sharing of battery units, each IBC needs the SoC levels and charging/discharging current information of battery units of its connected subgrids. Using the LBC, the SoC and charging/discharging current information of batteries is sent to the IBC secondary controller. By gathering the information on DC bus voltage, SoC, and charging/discharging current of the battery, the IBC secondary controller generates a modified normalized voltage for each subgrid. The modified normalized voltage (NVi) can be expressed as(4)NVi=Vnomi−Vdcini−ΔVvi,The adjusted virtual voltage deviationΔVv is proposed considering depth-of-discharge (DoD) and depth-of-charge (DoC) in discharging and charging mode, respectively. ΔVv is defined as(5a)ΔVv=k×expDoC−1×IbΔIb,DoC=SoC−SoCc100,ifIb<0,k×expDoD−1×IbΔIb,DoD=100−SoC100,ifIb>0,(5b)ΔIb=Ib_max−Ib_min2,where SoCc is the lower cut-off SoC of battery, k is a constant, Ib_max is the peak discharging limit, and Ib_min is the peak charging limit. Ib<0 represents the battery charging mode, and Ib>0 represents the battery discharging mode. From (4), the power errors through the IBCs (ΔPe12,ΔPe13) can be defined as(6)ΔPe12=NV1−NV2ΔPe13=NV1−NV3,It can be observed that if the power errors can be minimized, the power flow through the IBC will be linked with the SoC and charging/discharging current of batteries. Hence, a SoC balancing-based power sharing among subgrids can be established by eliminating power errors. In this paper, a fuzzy logic controller is used for IBC secondary controllers to eradicate the power errors. The fuzzy logic controller is robust compared to the conventional PI controller, and it can cover a wider operating range of DC bus voltages. Moreover, the fuzzy-based control strategy can minimize voltage transient during load switching compared to the conventional control strategy. The control diagram of the fuzzy-based secondary IBC controller is manifested in Figure4(a).Figure 4
Fuzzy-based IBC reference generation. (a) Fuzzy-based secondary IBC controller. (b) Input variable membership functions. (c) Output variable membership functions.
(a)(b)(c)The modified normalized voltages are the inputs to the fuzzy logic controller, which calculate the change in IBC power to transfer among the subgrids. In the fuzzy logic controller, input and output variables have 7 membership functions, as shown in Figures4(b) and 4(c). The membership functions are defined in Table 1. Table 2 shows the fuzzy rules for the IBC secondary controller. The generated reference power of IBC is given to the primary controller of the IBC.Table 1
Input and output variables.
Negative high−NH/nhNegative medium−NM/nmNegative low−NL/nlZero−Z/zPositive low−PL/plPositive medium−PM/pmPositive high−PH/phTable 2
Fuzzy rules.
Input 2Input 1NHNMNLZPLPMPHNHzPlplpmpmphphNMnlZplplpmpmphNLnmNlzplplpmphZnhNmnlzplpmphPLnhNmnmnlzplpmPMnhNmnmnlnlzplPHnhNhnmnmnlnlz


### 3.2. Fast Charging and Discharging Mode

The concept of fast charging and fast discharging of battery is added to prevent a low SoC battery from deep discharge and prevent a high SoC battery from overcharge. If a battery operates below a specific SoC limit, it should charge quickly and discharge slowly. Similarly, if a battery operates beyond a certain SoC limit, then it should operate at fast discharging to balance the SoC limit and charge slowly to avoid overcharging condition. To incorporate the fast charging and fast discharging conditions, the secondary IBC control strategy is further modified depending on the three SoC levels. These three SoC levels are defined as normal SoC mode (NSM), high SoC mode (HSM), and low SoC mode (LSM). Hence, the SoC-based virtual voltage deviation is modified based on the three operating modes of the SoC. The modified virtual voltage deviation is shown below.In charging condition,(7)ΔVv=k×expDoC−1×IbΔIb;ifSoCl<SoC<SoCuNSM,k×expDoC−1−SoC−SoCu100×IbΔIb;ifSoC<SoClHSM,k×expDoC−1+SoC−SoCl100×IbΔIb;ifSoC>SoCuLSM.In discharging condition,(8)ΔVv=k×expDoD−1×IbΔIb,NSM,k×expDoD−1+SoC−SoCu100×IbΔIb,HSM,k×expDoD−1−SoC−SoCl100×IbΔIb,LSM,where SoCu and SoCl are the upper and lower SoC thresholds of the battery, respectively. For fast charging of the battery, the LSM condition of (7) is implemented, and for slow discharging of the battery, the LSM condition of (8) is implemented. Similarly, the HSM condition of (7) is implemented for slow charging of the battery, and for fast discharging of the battery, the HSM condition of (8) is implemented. It can be noted that fast charging is only implemented in LSM to prevent the deep discharging of a low SoC battery. Similarly, slow charging and fast discharging of the battery are only implemented in HSM to avoid overcharging condition of the battery.Figure5 shows the characteristics of the ΔVv generation in the charging and discharging mode of operation of a battery unit. The ΔVv generation in the normal operating mode (NOM) and fast charging/discharging mode is compared in Figure 5. It can be observed that, during NSM, the charging/discharging characteristics are similar for both modes of operation. However, in LSM, the fast charging/discharging characteristics move towards the left of the charging/discharging characteristics of the NOM. They enable a low SoC battery to charge at a faster rate and discharge at a slower rate compared to the NOM. Similarly, in HSM, the fast charging/discharging characteristics move towards the right of the charging/discharging characteristics of the NOM. They enable a high SoC battery to charge at a slower rate and discharge at a faster rate compared to NOM.Figure 5
Characteristics ofΔVv generation.


## 3.1. SoC-Based Power Sharing

For proportional power sharing of battery units, each IBC needs the SoC levels and charging/discharging current information of battery units of its connected subgrids. Using the LBC, the SoC and charging/discharging current information of batteries is sent to the IBC secondary controller. By gathering the information on DC bus voltage, SoC, and charging/discharging current of the battery, the IBC secondary controller generates a modified normalized voltage for each subgrid. The modified normalized voltage (NVi) can be expressed as(4)NVi=Vnomi−Vdcini−ΔVvi,The adjusted virtual voltage deviationΔVv is proposed considering depth-of-discharge (DoD) and depth-of-charge (DoC) in discharging and charging mode, respectively. ΔVv is defined as(5a)ΔVv=k×expDoC−1×IbΔIb,DoC=SoC−SoCc100,ifIb<0,k×expDoD−1×IbΔIb,DoD=100−SoC100,ifIb>0,(5b)ΔIb=Ib_max−Ib_min2,where SoCc is the lower cut-off SoC of battery, k is a constant, Ib_max is the peak discharging limit, and Ib_min is the peak charging limit. Ib<0 represents the battery charging mode, and Ib>0 represents the battery discharging mode. From (4), the power errors through the IBCs (ΔPe12,ΔPe13) can be defined as(6)ΔPe12=NV1−NV2ΔPe13=NV1−NV3,It can be observed that if the power errors can be minimized, the power flow through the IBC will be linked with the SoC and charging/discharging current of batteries. Hence, a SoC balancing-based power sharing among subgrids can be established by eliminating power errors. In this paper, a fuzzy logic controller is used for IBC secondary controllers to eradicate the power errors. The fuzzy logic controller is robust compared to the conventional PI controller, and it can cover a wider operating range of DC bus voltages. Moreover, the fuzzy-based control strategy can minimize voltage transient during load switching compared to the conventional control strategy. The control diagram of the fuzzy-based secondary IBC controller is manifested in Figure4(a).Figure 4
Fuzzy-based IBC reference generation. (a) Fuzzy-based secondary IBC controller. (b) Input variable membership functions. (c) Output variable membership functions.
(a)(b)(c)The modified normalized voltages are the inputs to the fuzzy logic controller, which calculate the change in IBC power to transfer among the subgrids. In the fuzzy logic controller, input and output variables have 7 membership functions, as shown in Figures4(b) and 4(c). The membership functions are defined in Table 1. Table 2 shows the fuzzy rules for the IBC secondary controller. The generated reference power of IBC is given to the primary controller of the IBC.Table 1
Input and output variables.
Negative high−NH/nhNegative medium−NM/nmNegative low−NL/nlZero−Z/zPositive low−PL/plPositive medium−PM/pmPositive high−PH/phTable 2
Fuzzy rules.
Input 2Input 1NHNMNLZPLPMPHNHzPlplpmpmphphNMnlZplplpmpmphNLnmNlzplplpmphZnhNmnlzplpmphPLnhNmnmnlzplpmPMnhNmnmnlnlzplPHnhNhnmnmnlnlz


## 3.2. Fast Charging and Discharging Mode

The concept of fast charging and fast discharging of battery is added to prevent a low SoC battery from deep discharge and prevent a high SoC battery from overcharge. If a battery operates below a specific SoC limit, it should charge quickly and discharge slowly. Similarly, if a battery operates beyond a certain SoC limit, then it should operate at fast discharging to balance the SoC limit and charge slowly to avoid overcharging condition. To incorporate the fast charging and fast discharging conditions, the secondary IBC control strategy is further modified depending on the three SoC levels. These three SoC levels are defined as normal SoC mode (NSM), high SoC mode (HSM), and low SoC mode (LSM). Hence, the SoC-based virtual voltage deviation is modified based on the three operating modes of the SoC. The modified virtual voltage deviation is shown below.In charging condition,(7)ΔVv=k×expDoC−1×IbΔIb;ifSoCl<SoC<SoCuNSM,k×expDoC−1−SoC−SoCu100×IbΔIb;ifSoC<SoClHSM,k×expDoC−1+SoC−SoCl100×IbΔIb;ifSoC>SoCuLSM.In discharging condition,(8)ΔVv=k×expDoD−1×IbΔIb,NSM,k×expDoD−1+SoC−SoCu100×IbΔIb,HSM,k×expDoD−1−SoC−SoCl100×IbΔIb,LSM,where SoCu and SoCl are the upper and lower SoC thresholds of the battery, respectively. For fast charging of the battery, the LSM condition of (7) is implemented, and for slow discharging of the battery, the LSM condition of (8) is implemented. Similarly, the HSM condition of (7) is implemented for slow charging of the battery, and for fast discharging of the battery, the HSM condition of (8) is implemented. It can be noted that fast charging is only implemented in LSM to prevent the deep discharging of a low SoC battery. Similarly, slow charging and fast discharging of the battery are only implemented in HSM to avoid overcharging condition of the battery.Figure5 shows the characteristics of the ΔVv generation in the charging and discharging mode of operation of a battery unit. The ΔVv generation in the normal operating mode (NOM) and fast charging/discharging mode is compared in Figure 5. It can be observed that, during NSM, the charging/discharging characteristics are similar for both modes of operation. However, in LSM, the fast charging/discharging characteristics move towards the left of the charging/discharging characteristics of the NOM. They enable a low SoC battery to charge at a faster rate and discharge at a slower rate compared to the NOM. Similarly, in HSM, the fast charging/discharging characteristics move towards the right of the charging/discharging characteristics of the NOM. They enable a high SoC battery to charge at a slower rate and discharge at a faster rate compared to NOM.Figure 5
Characteristics ofΔVv generation.


## 4. Control of Converters and Stability Analysis

In this section, modeling of battery, PV, and IBC converters is defined. The small signal models of these three converter controls are analyzed for the design of the converter controllers.


### 4.1. Small Signal Model of PV and Battery Controller

The block diagram of the PV and battery controller is shown in Figure6. For the PV controller, a PI regulator is implemented for power regulation of the PV terminal. The reference power for the PV controller is generated from an MPPT strategy. This paper does not conduct a detailed analysis of the MPPT technique. The implementation of the MPPT technique can be followed in [33,34]. The battery controller regulates the DC bus voltage, and the PV controller operates as a power source for the DC subgrid. The battery converter has a primary loop and a secondary loop. The secondary loop aims for nominal DC bus voltage regulation. Hence, it generates a desired reference DC bus voltage for the primary loop. The control response of the secondary controller is analyzed considering the time delay (Td). For each subgrid, the dynamics of the battery terminal output for voltage regulation are shown as follows [20]:(9)ΔPb1=ub1ilPt=ub1PtΔuref1−Δudc1kpu1+kiu1sGi1s,Δuref1=Δunom1−aΔPb1+Δunom1−Δudc1kps1+kis1/s1+sTd1,where ub is the battery voltage, il is the inductor current, and kpu and kiu are the proportional and integral gains of the voltage loop PI controller, respectively. Subscript ‘1’ indicates subgrid-1. Pt is the base value of power, and a is the voltage droop coefficient. Gis is the closed-loop transfer function of the inner current loop of the battery controller. Gis can be expressed as [20](10)Gi1s=Udc1kpi1s+kii1Lb1s2+kpi1Udc1s+kii1Udc1,where Lb is the inductor of BDDC, Udc1 is the rated DC bus voltage of subgrid-1, and kpi and kii are the proportional and integral gains of the current loop PI controller, respectively. For the DCMG, the dynamic DC bus voltage in the small signal model can be expressed as(11)C1.Udc12PtΔu˙dc1=ΔPpv1+ΔPb1−ΔPibc12−ΔPibc13,C1.Udc22PtΔu˙dc2=ΔPpv2+ΔPb2+ΔPibc12,C1.Udc32PtΔu˙dc3=ΔPpv3+ΔPb3+ΔPibc13,where Ci (i = 1,2,3) represents the DC bus capacitance, and Udci represents the nominal DC voltages of the subgrid.Figure 6
Block diagram of the PV and battery controller.From (9) to (11), the dynamic response of DC bus voltage in each subgrid can be expressed as(12)Δudc1=ΔPpv1−ΔPibc12−ΔPibc13sK1−Gbu1s=Gp1sΔPpv1−ΔPibc12−ΔPibc13,Δudc2=ΔPpv2+ΔPibc12sK2−Gbu2s=Gp2sΔPpv2+ΔPibc12,Δudc3=ΔPpv3+ΔPibc13sK3−Gbu3s=Gp3sΔPpv3+ΔPibc13,where Ki=Ci⋅Udci2/Pt. The transfer function Gpis can be used for DC bus voltage droop control analysis in the DC subgrids. From (9), Gbuis is expressed as(13)ΔPbi=GbuisΔudci=−kpui+kiui/sGiisPt/ubi+akpui+kiui/sGiisΔudci.


### 4.2. Small Signal Model of IBC Controller

The IBC controller regulates the power flow through the IBC from the reference power generated by the IBC secondary controller. Hence, the dynamic analysis of the IBC controller can be carried out fromΔPibc to ΔPibc_ref. From the primary loop, the dynamic characteristics of the inner power tracking loop (ΔPibc1js) can be expressed as(14)ΔPibc1js=Udcjkpibc1js+kiibc1jL1js21+sT+kpibc1jUdcjs+kiibc1jUdcjΔPref1js=Gibc1jsΔPref1js,where (j = 2,3), L1j is the inductor of IBC, and T is the time delay for IBC reference power generation. From (14), any change in power reference will be observed in the dynamics of the IBC output power. For control parameter design, a stability analysis study is carried out in the next section.


### 4.3. Stability Analysis

The small signal models from (12) to (14) are used for stability analysis. The generic model obtained from the equation can be expressed as(15)Δudc1Δudc2Δudc3=Gp1s000Gp1s000Gp1sΔPpv1ΔPpv2ΔPpv3+−Gp1sGibc12s−Gp1sGibc13sGp2sGibc12s00Gp3sGibc13sΔPibc12ΔPibc13.


#### 4.3.1. Stability Analysis during NOM

In normal operation mode, the pole-zero locations of the related transfer function fromΔPibc13 to Δudc1are shown in Figure7. By varying the inner loop proportional gain (kpibc13) from 0.0001 to 0.0021, with a step of 0.0002, it can be observed that, with the increase in gain value, the system moves towards the left of the s plane, as shown in Figure 7(a). It shows that the increase in the gain value increases the system stability and dynamics. In this case, the time delay is taken as 1 ms. Further, Figure 7(b) shows the pole-zero location of the related transfer function with the variation of time delay from 0.0001 to 0.0031, with a step of 0.0003. It can be observed that the increase in time delay leads the system towards an unstable region. With the implemented time delay (1 ms), the system remains stable.Figure 7
Impact of proportional gain and time delay on stability. (a) Pole-zero location of DCMG in NOM with the increase in proportional gain. (b) Pole-zero location of DCMG in NOM with the increase in time delay. (c) Pole-zero location of DCMG during an outage of battery unit with the increase in proportional gain. (d) Step response of DCMG during an outage of the battery unit.
(a)(b)(c)(d)


#### 4.3.2. Stability Analysis during Outage of Battery Unit

If one of the DC subgrids undergoes an outage of the battery unit, then the voltage regulation of that subgrid is transferred to the corresponding IBC connected to it. The challenge is whether the IBC will support a seamless transition from normal operating mode to voltage regulation mode. To analyze the dynamics in this condition, (12) can be rewritten as(16)Δudc1=ΔPpv1−ΔPibc12−ΔPibc13sK1=Gp1sΔPpv1−ΔPibc12−ΔPibc13,Δudc2=ΔPpv2+ΔPibc12sK2−Gbu2s=Gp2sΔPpv2+ΔPibc12,Δudc3=ΔPpv3+ΔPibc13sK3−Gbu3s=Gp3sΔPpv3+ΔPibc13.where Gp1s is 1/sK1 instead of 1/sK1−Gbu1s. It indicates that the battery in subgrid-1 has undergone an outage. To check the dynamics and stability of the system, the pole-zero analysis of related transfer functions from ΔPibc13 to Δudc1 is shown in Figure 7(c). It can be observed that, with the increase in proportional gain (kpibc13) from 0.0005 to 0.0025, with a step of 0.0002, the system stability increases. Excessive increases in gain lead to be a sluggish system. Further, the step response of DCMG to change in power is shown in Figure 7(d). It can be observed that, with an increase in proportional gain (kpibc13) from 0.0005 to 0.002, with a step of 0.0005, the time constant and settling time of the step response have reduced. Hence, the response is faster and smoother. From the above analysis, suitable gain values are selected for the PI controllers of DCMG. The design parameters of DCMG are shown in the appendix.


### 4.4. Sensitivity Analysis

In this section, the sensitivity analysis of the DCMG is performed with the variation of time delay, variation of the inductance of BDDC converter, and increase of droop gain. Figure7(b) shows the eigenvalues with the variation of time delay. It can be observed that, with an increase in communication time delay, the eigenvalues of the system moved towards the right half of the complex plane. Hence, the system is sensitive to the communication time delay. With a higher value of communication time delay, the DCMG may lose its stability.Figure8(a)shows the eigenvalues of the DCMG with the variation of the inductance of BDDC. It can be observed that, with the increase in inductance, the eigenvalues are moved towards zero. However, the eigenvalues never become positive. It indicates that the DCMG never becomes unstable, and it is less sensitive toward the inductance value compared to the increase in time delay. Figure 8(b) shows the eigenvalues of the DCMG with the variation of the power droop gain in the DCMG. It can be observed that the increase in droop gain does not affect the eigenvalues. In the proposed strategy, the droop gain factor is compensated by the secondary controller. Hence, the variation of droop gain does not affect the system's stability and sensitivity.Figure 8
Dominant pole-zero locations of DCMG. (a) Pole-zero location of DCMG with the increase in BDDC inductance. (b) Pole-zero location of DCMG with the increase in droop gain.
(a)(b)


## 4.1. Small Signal Model of PV and Battery Controller

The block diagram of the PV and battery controller is shown in Figure6. For the PV controller, a PI regulator is implemented for power regulation of the PV terminal. The reference power for the PV controller is generated from an MPPT strategy. This paper does not conduct a detailed analysis of the MPPT technique. The implementation of the MPPT technique can be followed in [33,34]. The battery controller regulates the DC bus voltage, and the PV controller operates as a power source for the DC subgrid. The battery converter has a primary loop and a secondary loop. The secondary loop aims for nominal DC bus voltage regulation. Hence, it generates a desired reference DC bus voltage for the primary loop. The control response of the secondary controller is analyzed considering the time delay (Td). For each subgrid, the dynamics of the battery terminal output for voltage regulation are shown as follows [20]:(9)ΔPb1=ub1ilPt=ub1PtΔuref1−Δudc1kpu1+kiu1sGi1s,Δuref1=Δunom1−aΔPb1+Δunom1−Δudc1kps1+kis1/s1+sTd1,where ub is the battery voltage, il is the inductor current, and kpu and kiu are the proportional and integral gains of the voltage loop PI controller, respectively. Subscript ‘1’ indicates subgrid-1. Pt is the base value of power, and a is the voltage droop coefficient. Gis is the closed-loop transfer function of the inner current loop of the battery controller. Gis can be expressed as [20](10)Gi1s=Udc1kpi1s+kii1Lb1s2+kpi1Udc1s+kii1Udc1,where Lb is the inductor of BDDC, Udc1 is the rated DC bus voltage of subgrid-1, and kpi and kii are the proportional and integral gains of the current loop PI controller, respectively. For the DCMG, the dynamic DC bus voltage in the small signal model can be expressed as(11)C1.Udc12PtΔu˙dc1=ΔPpv1+ΔPb1−ΔPibc12−ΔPibc13,C1.Udc22PtΔu˙dc2=ΔPpv2+ΔPb2+ΔPibc12,C1.Udc32PtΔu˙dc3=ΔPpv3+ΔPb3+ΔPibc13,where Ci (i = 1,2,3) represents the DC bus capacitance, and Udci represents the nominal DC voltages of the subgrid.Figure 6
Block diagram of the PV and battery controller.From (9) to (11), the dynamic response of DC bus voltage in each subgrid can be expressed as(12)Δudc1=ΔPpv1−ΔPibc12−ΔPibc13sK1−Gbu1s=Gp1sΔPpv1−ΔPibc12−ΔPibc13,Δudc2=ΔPpv2+ΔPibc12sK2−Gbu2s=Gp2sΔPpv2+ΔPibc12,Δudc3=ΔPpv3+ΔPibc13sK3−Gbu3s=Gp3sΔPpv3+ΔPibc13,where Ki=Ci⋅Udci2/Pt. The transfer function Gpis can be used for DC bus voltage droop control analysis in the DC subgrids. From (9), Gbuis is expressed as(13)ΔPbi=GbuisΔudci=−kpui+kiui/sGiisPt/ubi+akpui+kiui/sGiisΔudci.


## 4.2. Small Signal Model of IBC Controller

The IBC controller regulates the power flow through the IBC from the reference power generated by the IBC secondary controller. Hence, the dynamic analysis of the IBC controller can be carried out fromΔPibc to ΔPibc_ref. From the primary loop, the dynamic characteristics of the inner power tracking loop (ΔPibc1js) can be expressed as(14)ΔPibc1js=Udcjkpibc1js+kiibc1jL1js21+sT+kpibc1jUdcjs+kiibc1jUdcjΔPref1js=Gibc1jsΔPref1js,where (j = 2,3), L1j is the inductor of IBC, and T is the time delay for IBC reference power generation. From (14), any change in power reference will be observed in the dynamics of the IBC output power. For control parameter design, a stability analysis study is carried out in the next section.


## 4.3. Stability Analysis

The small signal models from (12) to (14) are used for stability analysis. The generic model obtained from the equation can be expressed as(15)Δudc1Δudc2Δudc3=Gp1s000Gp1s000Gp1sΔPpv1ΔPpv2ΔPpv3+−Gp1sGibc12s−Gp1sGibc13sGp2sGibc12s00Gp3sGibc13sΔPibc12ΔPibc13.


### 4.3.1. Stability Analysis during NOM

In normal operation mode, the pole-zero locations of the related transfer function fromΔPibc13 to Δudc1are shown in Figure7. By varying the inner loop proportional gain (kpibc13) from 0.0001 to 0.0021, with a step of 0.0002, it can be observed that, with the increase in gain value, the system moves towards the left of the s plane, as shown in Figure 7(a). It shows that the increase in the gain value increases the system stability and dynamics. In this case, the time delay is taken as 1 ms. Further, Figure 7(b) shows the pole-zero location of the related transfer function with the variation of time delay from 0.0001 to 0.0031, with a step of 0.0003. It can be observed that the increase in time delay leads the system towards an unstable region. With the implemented time delay (1 ms), the system remains stable.Figure 7
Impact of proportional gain and time delay on stability. (a) Pole-zero location of DCMG in NOM with the increase in proportional gain. (b) Pole-zero location of DCMG in NOM with the increase in time delay. (c) Pole-zero location of DCMG during an outage of battery unit with the increase in proportional gain. (d) Step response of DCMG during an outage of the battery unit.
(a)(b)(c)(d)


### 4.3.2. Stability Analysis during Outage of Battery Unit

If one of the DC subgrids undergoes an outage of the battery unit, then the voltage regulation of that subgrid is transferred to the corresponding IBC connected to it. The challenge is whether the IBC will support a seamless transition from normal operating mode to voltage regulation mode. To analyze the dynamics in this condition, (12) can be rewritten as(16)Δudc1=ΔPpv1−ΔPibc12−ΔPibc13sK1=Gp1sΔPpv1−ΔPibc12−ΔPibc13,Δudc2=ΔPpv2+ΔPibc12sK2−Gbu2s=Gp2sΔPpv2+ΔPibc12,Δudc3=ΔPpv3+ΔPibc13sK3−Gbu3s=Gp3sΔPpv3+ΔPibc13.where Gp1s is 1/sK1 instead of 1/sK1−Gbu1s. It indicates that the battery in subgrid-1 has undergone an outage. To check the dynamics and stability of the system, the pole-zero analysis of related transfer functions from ΔPibc13 to Δudc1 is shown in Figure 7(c). It can be observed that, with the increase in proportional gain (kpibc13) from 0.0005 to 0.0025, with a step of 0.0002, the system stability increases. Excessive increases in gain lead to be a sluggish system. Further, the step response of DCMG to change in power is shown in Figure 7(d). It can be observed that, with an increase in proportional gain (kpibc13) from 0.0005 to 0.002, with a step of 0.0005, the time constant and settling time of the step response have reduced. Hence, the response is faster and smoother. From the above analysis, suitable gain values are selected for the PI controllers of DCMG. The design parameters of DCMG are shown in the appendix.


## 4.3.1. Stability Analysis during NOM

In normal operation mode, the pole-zero locations of the related transfer function fromΔPibc13 to Δudc1are shown in Figure7. By varying the inner loop proportional gain (kpibc13) from 0.0001 to 0.0021, with a step of 0.0002, it can be observed that, with the increase in gain value, the system moves towards the left of the s plane, as shown in Figure 7(a). It shows that the increase in the gain value increases the system stability and dynamics. In this case, the time delay is taken as 1 ms. Further, Figure 7(b) shows the pole-zero location of the related transfer function with the variation of time delay from 0.0001 to 0.0031, with a step of 0.0003. It can be observed that the increase in time delay leads the system towards an unstable region. With the implemented time delay (1 ms), the system remains stable.Figure 7
Impact of proportional gain and time delay on stability. (a) Pole-zero location of DCMG in NOM with the increase in proportional gain. (b) Pole-zero location of DCMG in NOM with the increase in time delay. (c) Pole-zero location of DCMG during an outage of battery unit with the increase in proportional gain. (d) Step response of DCMG during an outage of the battery unit.
(a)(b)(c)(d)


## 4.3.2. Stability Analysis during Outage of Battery Unit

If one of the DC subgrids undergoes an outage of the battery unit, then the voltage regulation of that subgrid is transferred to the corresponding IBC connected to it. The challenge is whether the IBC will support a seamless transition from normal operating mode to voltage regulation mode. To analyze the dynamics in this condition, (12) can be rewritten as(16)Δudc1=ΔPpv1−ΔPibc12−ΔPibc13sK1=Gp1sΔPpv1−ΔPibc12−ΔPibc13,Δudc2=ΔPpv2+ΔPibc12sK2−Gbu2s=Gp2sΔPpv2+ΔPibc12,Δudc3=ΔPpv3+ΔPibc13sK3−Gbu3s=Gp3sΔPpv3+ΔPibc13.where Gp1s is 1/sK1 instead of 1/sK1−Gbu1s. It indicates that the battery in subgrid-1 has undergone an outage. To check the dynamics and stability of the system, the pole-zero analysis of related transfer functions from ΔPibc13 to Δudc1 is shown in Figure 7(c). It can be observed that, with the increase in proportional gain (kpibc13) from 0.0005 to 0.0025, with a step of 0.0002, the system stability increases. Excessive increases in gain lead to be a sluggish system. Further, the step response of DCMG to change in power is shown in Figure 7(d). It can be observed that, with an increase in proportional gain (kpibc13) from 0.0005 to 0.002, with a step of 0.0005, the time constant and settling time of the step response have reduced. Hence, the response is faster and smoother. From the above analysis, suitable gain values are selected for the PI controllers of DCMG. The design parameters of DCMG are shown in the appendix.


## 4.4. Sensitivity Analysis

In this section, the sensitivity analysis of the DCMG is performed with the variation of time delay, variation of the inductance of BDDC converter, and increase of droop gain. Figure7(b) shows the eigenvalues with the variation of time delay. It can be observed that, with an increase in communication time delay, the eigenvalues of the system moved towards the right half of the complex plane. Hence, the system is sensitive to the communication time delay. With a higher value of communication time delay, the DCMG may lose its stability.Figure8(a)shows the eigenvalues of the DCMG with the variation of the inductance of BDDC. It can be observed that, with the increase in inductance, the eigenvalues are moved towards zero. However, the eigenvalues never become positive. It indicates that the DCMG never becomes unstable, and it is less sensitive toward the inductance value compared to the increase in time delay. Figure 8(b) shows the eigenvalues of the DCMG with the variation of the power droop gain in the DCMG. It can be observed that the increase in droop gain does not affect the eigenvalues. In the proposed strategy, the droop gain factor is compensated by the secondary controller. Hence, the variation of droop gain does not affect the system's stability and sensitivity.Figure 8
Dominant pole-zero locations of DCMG. (a) Pole-zero location of DCMG with the increase in BDDC inductance. (b) Pole-zero location of DCMG with the increase in droop gain.
(a)(b)


## 5. Results and Discussion

In the simulation study, three interlinked subgrids are simulated in islanding mode. The single-line diagram of the implemented DCMG is shown in Figure9. The simulations are carried out with three case studies with a comparative analysis of the results for verification of the viability of the proposed strategy. Further, the feasibility of the proposed coordinated strategy is verified in the OPAL-RT OP-4510 real-time digital simulator (RTDS). In normal operating mode, all the subgrids operate with battery units, and PV sources operate at MPPT throughout the case study. For simplicity in coordination control analysis, the PV generations are set to operate at 25° C and 1000 W/m2 throughout the simulation. The parameters of subgrid components are manifested in Table 3. The maximum power transfer capacities of IBCs are set at 11 kW. To observe the change in SoC, the battery capacity has taken 10 Ah. For a higher capacity battery, precise observation of the change in SoC will take a longer time. In the implemented DCMG, the LBC has been taken as a dedicated wired communication for the analysis. In all the cases, the IBC power from subgrid-2 to subgrid-1 has been shown as positive, and vice versa. Similarly, the IBC power from subgrid-3 to subgrid-1 has been shown as positive, and vice versa.Figure 9
Studied DCMG single-line diagram.Table 3
Components parameters of DCMG.
ComponentsParametersSubgrid-1Subgrid-2Subgrid-3PV capacity@1000 W/m25 kW10.4 kW10.4 kWLoad capacity10 kW20 kW20 kWBatteryStorage capacity10 Ah10 Ah10 AhNominal voltage120 V240 V240 VPeak charging and discharging power10 kW12 kW12 kWSubgrid voltage and parametersVuc210 V420 V420 VVnom200 V400 V400 VVlc190 V380 V380 VSoCu90%90%90%SoCl30%30%30%SoCc20%20%20%k102020α0.002 V/W0.004 V/W0.004 V/W


### 5.1. Case 1: SoC Balancing Based Power Sharing

Figure10 shows the simulation results of DCMG in fast charging and fast discharging mode and in NOM. The load demand in DCMG is shown in Table 4. Subgrid-1 operates in NSM, subgrid-2 operates in LSM, and subgrid-3 operates in HSM. Hence, subgrid-1 operates in NOM, subgrid-2 operates in fast charging mode, and subgrid-3 operates in fast discharging mode.Figure 10
Performance of DCMG with fast charging and fast discharging condition. (a)Vdc variations and battery power in three subgrids. (b) Change in SoC, power through IBCs, and PV generations in three subgrids.
(a)(b)Table 4
Load variations on each subgrid.
Time interval (Sec)1–22–44–66–88–1010–1212–14SG1 Load (kW)9.515202323158SG2 Load (kW)3333333SG3 Load (kW)55551055Total Load (kW)17.5232831362316The DCMG starts its operation with charging mode in subgrid-2 and discharging mode in subgrid-1 and subgrid-3. It can be observed that all the DC bus voltages operate at their nominal value, as shown in Figure10(a). However, during 12 to 14 s, Vdc2 operates at 401 V, which is well within the allowable deviation limit [35], and it does not affect the voltage-sensitive loads. The small voltage deviation in subgrid-2 indicates peak charging of BS-2.It can be noted that the charging power of BS-2 is higher than the battery powers in subgrid-1 and subgrid-3, as shown in Figure10(a). It indicates that, due to the fast charging operation in subgrid-2, BS-2 takes higher power compared to subgrid-1 and subgrid-3. Similarly, due to HSM in subgrid-3, BS-3 always operates in discharging mode. Compared to NOM, a low SoC battery takes more charging current and lesser load demand with the fast charging mode. Similarly, with the fast discharging mode, a high SoC battery charges at a slower rate and takes more load demand compared to the NOM. It can be seen that, with fast charging mode, the SoC of BS-2 improves 0.5% more compared to NOM. Similarly, with fast discharging mode, the SoC of BS-3 decreases 0.4% more compared to NOM. Hence, with the fast charging factor, the low SoC battery is allowed to operate in fast charging mode. Similarly, a high SoC battery is allowed to operate in slow charging mode. Hence, deep discharge of a low SoC battery is prevented, and overcharge of a high SoC battery is avoided.Figure10(b) shows the power flow through the IBCs. To support the change in load demand, the charging power of BS-2 reduces, so the power through IBC12 also increases. It can be observed that, with fast charging and fast discharging mode, the power through IBC13 is unaffected till 10 s as BS-3 operates at constant discharging power. During this period, the IBC31 operates at its full transfer power. Thus, it validates the SoC balancing-based power sharing of IBCs. All the PV generations operate at their peak generation as power demand is greater than the generation, as shown in Figure 10(b).


### 5.2. Case 2: Plug-and-Play Operation of CPMS

Figure11 shows the simulation results of DCMG with fast charging and discharging mode and with the plug-and-play of BS-3 in fast charging and discharging mode. The transient outage of the battery in subgrid-3 is tested to verify the plug-and-play capability of the proposed CPMS. The load demands are similar to those of case-1 throughout the simulation.Figure 11
Performance of DCMG supporting plug-and-play of storage. (a)Vdc variations and battery power in three subgrids. (b) Change in SoC, power through IBCs, and PV generations in three subgrids.
(a)(b)The DCMG starts its operation with charging mode in subgrid-2 and discharging mode in subgrid-1 and subgrid-3. All the DC bus voltages are maintained at nominal voltages, as shown in Figure11(a). At t = 3 s, the BS-3 is stopped operating to emulate the plug-and-play operation of storage. It can be observed that the IBC secondary controller worked normally and regulated the DC bus voltage of subgrid-3. Further, the transient outage of BS-3 does not drastically affect Vdc1 and Vdc2. It indicates that the proposed IBC control has seamlessly transferred from SoC balancing-based power sharing mode to voltage control mode after an outage of the battery terminal without affecting other IBCs. Moreover, after the outage of BS-3, BS-1 and BS-2 are managed to fulfill the load demand and share their power according to their SoC levels, as shown in Figure 11(b). The discharging rate of BS-2 is less than BS-1, which prevents BS-2 from deep discharge and helps enhance its life span.Att = 11 s, the BS-3 starts its operation to emulate the plug-and-play process of the battery. It can be observed that, due to the turning on of BS-3, there is a voltage spike in Vdc3. However, the transient voltage in subgrid-3 is well below its allowable deviation. Further, the turned-on operation of BS-3 does not drastically affect Vdc1 and Vdc2. It indicates the plug-and-play features of the CPMS. All the PV generations operate at their peak generation as power demand is greater than the generation, as shown in Figure 11(b).


### 5.3. Case 3: Comparison of the Fuzzy-Based Controller with the Conventional Controller

Figure12 shows the performance of DCMG with the fuzzy-based controller and with a conventional controller. All the subgrids are operating in NOM. The performance of the microgrid is investigated with seven load steps. The load demand in DCMG is shown in Table 4.Figure 12
Performance of DCMG with fuzzy-based controller and conventional controller. (a)Vdc variations and battery power in three subgrids. (b) Change in SoC, power through IBCs, and PV generations in three subgrids.
(a)(b)Figure12(a)shows that the DC bus voltages are regulated at their nominal value with the fuzzy-based controller and with the conventional controller irrespective of load variation. The fuzzy-based controller has replaced the conventional controller in the secondary IBC controller; however, the battery controllers operate with the conventional PI controller. The fuzzy-based controller and conventional controller can operate in SoC balancing-based power sharing strategy, as shown in Figures 12(a) and 12(b). However, it can be observed that, with the fuzzy-based controller, the voltage peak in Vdc2 and Vdc3 is lesser than the conventional controller at the time of load switching. It shows the inertia support of the fuzzy-based controller compared to the conventional controller. Hence, it can be observed that the fuzzy logic controller is robust compared to the conventional PI controller.


### 5.4. Real-Time Digital Simulation Results

The performance of the fuzzy-based power management strategy is validated through OPAL-RT OP-4510 real-time digital simulator, as shown in Figure13. Two interconnected DC subgrids are implemented on the simulation platform. The capabilities of the fuzzy-based controller are observed in two case studies, that is, NOM in case-1 and fast charging and fast discharging mode in case-2. The load variations in case-1 and case-2 are shown in Table 5. For all the cases, the IBC power flow from subgrid-2 to subgrid-1 has been shown as positive, and vice versa.Figure 13
OPAL-RT OP-4510 real-time experiment setup.Table 5
Load variations on each subgrid.
Time interval (Sec)0–11–33–55–77–99–10Case-1SG1 Load (kW)6.5121212126.5SG2 Load (kW)4461144Case-2SG1 Load (kW)6.51212121212SG2 Load (kW)101012171010


#### 5.4.1. Case-1: RTDS Results in NOM

Figure14 shows the performance of DCMG with the proposed fuzzy-based CPMS in NOM. The performance of the DCMG is studied with six load steps. BS-1 is set to operate at 40% of SoC, and BS-2 is set to operate at 70% of SoC. Figure 14(a) shows that both DC bus voltages are regulated at their nominal values throughout the result. During load switching, the DC bus voltages are well within their allowable deviation limits. Hence, the proposed strategy is robust to load variation. It can be observed that the charging power of BS-1 is higher than the charging power of BS-2. Further, from Figure 14(b), it can be observed that the increase in SoC in BS-1 is 0.5% compared to 0.15% in BS-2. It indicates the SoC balancing-based power management performance of the proposed CPMS. During the experiment, all the PV generations operate at maximum power. The power generation of PV-2 is shown in Figure 14(b) for verification.Figure 14
Real-time result of the proposed CPMS in NOM. (a) DC bus voltage in SG1 and SG2, charge/discharge power of BS-1 and BS-2. (b) SoC of BS-1 and BS-2, power through IBC and PV generation.
(a)(b)


#### 5.4.2. Case-2: RTDS Results in Fast Charging and Fast Discharging Mode

Figure15 shows the performance of DCMG with the proposed fuzzy-based CPMS in fast charging and fast discharging mode of operation. BS-1 is set to operate at 25% of SoC, and BS-2 is set to operate at 95% of SoC. The viability of the proposed CPMS is studied with six load steps. Figure 15(a) shows that the DC bus voltages are regulated at their nominal values during the operation. Hence, the change in load does not affect the voltage-sensitive loads. Further, it can be observed that the charging power of BS-1 is higher than the charging power of BS-2. Moreover, BS-1 always operates in charging mode during the experiment, and BS-2 operates in discharging mode. From Figure 15(b), it can be observed that, with fast charging and fast discharging operation, the SoC of BS-1 increases to 25.7%, and the SoC of BS-2 decreases to 94%. Hence, with fast charging and fast discharging factor, the low SoC battery is allowed to operate in fast charging mode. Hence, deep discharge of the low SoC battery is avoided. Similarly, the high SoC battery is allowed to operate in slow charging mode. Hence, overcharging of the high SoC battery is avoided. During the experiment, both the PV generations operate at maximum power.Figure 15
Real-time result of the proposed CPMS in fast charging and fast discharging mode. (a) DC bus voltage in SG1 and SG2, charge/discharge power of BS-1 and BS-2. (b) SoC of BS-1 and BS-2, power through IBC and PV generation.
(a)(b)To validate the effectiveness of the proposed CPMS, a comparative study of the proposed CPMS with related reference strategies is summarized in Table6. The majority of reference works are utilized PI-based IBC control strategy, while few implemented fuzzy logic controllers. Further, SoC balancing with nominal voltage regulation and overcharging and discharging regulation is not investigated simultaneously in the addressed research works.Table 6
Comparison of proposed CPMS with related strategies.
ParametersRef [20]Ref [21]Ref [31]Ref [32]Ref [35]Ref [36]Proposed CPMSNominal voltage regulationYesYesNoYesNoNoYesIBC controllerPIFuzzyPIPIPIPIFuzzySoC balancing-based controlNoNoYesYesNoNoYesFast charging/fast discharging controlNoNoNoNoNoNoYesOvercharge and overdischarge regulationNoNoYesYesNoYesYesControl flexibility of batteryYesNoNoNoNoNoYes


## 5.1. Case 1: SoC Balancing Based Power Sharing

Figure10 shows the simulation results of DCMG in fast charging and fast discharging mode and in NOM. The load demand in DCMG is shown in Table 4. Subgrid-1 operates in NSM, subgrid-2 operates in LSM, and subgrid-3 operates in HSM. Hence, subgrid-1 operates in NOM, subgrid-2 operates in fast charging mode, and subgrid-3 operates in fast discharging mode.Figure 10
Performance of DCMG with fast charging and fast discharging condition. (a)Vdc variations and battery power in three subgrids. (b) Change in SoC, power through IBCs, and PV generations in three subgrids.
(a)(b)Table 4
Load variations on each subgrid.
Time interval (Sec)1–22–44–66–88–1010–1212–14SG1 Load (kW)9.515202323158SG2 Load (kW)3333333SG3 Load (kW)55551055Total Load (kW)17.5232831362316The DCMG starts its operation with charging mode in subgrid-2 and discharging mode in subgrid-1 and subgrid-3. It can be observed that all the DC bus voltages operate at their nominal value, as shown in Figure10(a). However, during 12 to 14 s, Vdc2 operates at 401 V, which is well within the allowable deviation limit [35], and it does not affect the voltage-sensitive loads. The small voltage deviation in subgrid-2 indicates peak charging of BS-2.It can be noted that the charging power of BS-2 is higher than the battery powers in subgrid-1 and subgrid-3, as shown in Figure10(a). It indicates that, due to the fast charging operation in subgrid-2, BS-2 takes higher power compared to subgrid-1 and subgrid-3. Similarly, due to HSM in subgrid-3, BS-3 always operates in discharging mode. Compared to NOM, a low SoC battery takes more charging current and lesser load demand with the fast charging mode. Similarly, with the fast discharging mode, a high SoC battery charges at a slower rate and takes more load demand compared to the NOM. It can be seen that, with fast charging mode, the SoC of BS-2 improves 0.5% more compared to NOM. Similarly, with fast discharging mode, the SoC of BS-3 decreases 0.4% more compared to NOM. Hence, with the fast charging factor, the low SoC battery is allowed to operate in fast charging mode. Similarly, a high SoC battery is allowed to operate in slow charging mode. Hence, deep discharge of a low SoC battery is prevented, and overcharge of a high SoC battery is avoided.Figure10(b) shows the power flow through the IBCs. To support the change in load demand, the charging power of BS-2 reduces, so the power through IBC12 also increases. It can be observed that, with fast charging and fast discharging mode, the power through IBC13 is unaffected till 10 s as BS-3 operates at constant discharging power. During this period, the IBC31 operates at its full transfer power. Thus, it validates the SoC balancing-based power sharing of IBCs. All the PV generations operate at their peak generation as power demand is greater than the generation, as shown in Figure 10(b).


## 5.2. Case 2: Plug-and-Play Operation of CPMS

Figure11 shows the simulation results of DCMG with fast charging and discharging mode and with the plug-and-play of BS-3 in fast charging and discharging mode. The transient outage of the battery in subgrid-3 is tested to verify the plug-and-play capability of the proposed CPMS. The load demands are similar to those of case-1 throughout the simulation.Figure 11
Performance of DCMG supporting plug-and-play of storage. (a)Vdc variations and battery power in three subgrids. (b) Change in SoC, power through IBCs, and PV generations in three subgrids.
(a)(b)The DCMG starts its operation with charging mode in subgrid-2 and discharging mode in subgrid-1 and subgrid-3. All the DC bus voltages are maintained at nominal voltages, as shown in Figure11(a). At t = 3 s, the BS-3 is stopped operating to emulate the plug-and-play operation of storage. It can be observed that the IBC secondary controller worked normally and regulated the DC bus voltage of subgrid-3. Further, the transient outage of BS-3 does not drastically affect Vdc1 and Vdc2. It indicates that the proposed IBC control has seamlessly transferred from SoC balancing-based power sharing mode to voltage control mode after an outage of the battery terminal without affecting other IBCs. Moreover, after the outage of BS-3, BS-1 and BS-2 are managed to fulfill the load demand and share their power according to their SoC levels, as shown in Figure 11(b). The discharging rate of BS-2 is less than BS-1, which prevents BS-2 from deep discharge and helps enhance its life span.Att = 11 s, the BS-3 starts its operation to emulate the plug-and-play process of the battery. It can be observed that, due to the turning on of BS-3, there is a voltage spike in Vdc3. However, the transient voltage in subgrid-3 is well below its allowable deviation. Further, the turned-on operation of BS-3 does not drastically affect Vdc1 and Vdc2. It indicates the plug-and-play features of the CPMS. All the PV generations operate at their peak generation as power demand is greater than the generation, as shown in Figure 11(b).


## 5.3. Case 3: Comparison of the Fuzzy-Based Controller with the Conventional Controller

Figure12 shows the performance of DCMG with the fuzzy-based controller and with a conventional controller. All the subgrids are operating in NOM. The performance of the microgrid is investigated with seven load steps. The load demand in DCMG is shown in Table 4.Figure 12
Performance of DCMG with fuzzy-based controller and conventional controller. (a)Vdc variations and battery power in three subgrids. (b) Change in SoC, power through IBCs, and PV generations in three subgrids.
(a)(b)Figure12(a)shows that the DC bus voltages are regulated at their nominal value with the fuzzy-based controller and with the conventional controller irrespective of load variation. The fuzzy-based controller has replaced the conventional controller in the secondary IBC controller; however, the battery controllers operate with the conventional PI controller. The fuzzy-based controller and conventional controller can operate in SoC balancing-based power sharing strategy, as shown in Figures 12(a) and 12(b). However, it can be observed that, with the fuzzy-based controller, the voltage peak in Vdc2 and Vdc3 is lesser than the conventional controller at the time of load switching. It shows the inertia support of the fuzzy-based controller compared to the conventional controller. Hence, it can be observed that the fuzzy logic controller is robust compared to the conventional PI controller.


## 5.4. Real-Time Digital Simulation Results

The performance of the fuzzy-based power management strategy is validated through OPAL-RT OP-4510 real-time digital simulator, as shown in Figure13. Two interconnected DC subgrids are implemented on the simulation platform. The capabilities of the fuzzy-based controller are observed in two case studies, that is, NOM in case-1 and fast charging and fast discharging mode in case-2. The load variations in case-1 and case-2 are shown in Table 5. For all the cases, the IBC power flow from subgrid-2 to subgrid-1 has been shown as positive, and vice versa.Figure 13
OPAL-RT OP-4510 real-time experiment setup.Table 5
Load variations on each subgrid.
Time interval (Sec)0–11–33–55–77–99–10Case-1SG1 Load (kW)6.5121212126.5SG2 Load (kW)4461144Case-2SG1 Load (kW)6.51212121212SG2 Load (kW)101012171010


### 5.4.1. Case-1: RTDS Results in NOM

Figure14 shows the performance of DCMG with the proposed fuzzy-based CPMS in NOM. The performance of the DCMG is studied with six load steps. BS-1 is set to operate at 40% of SoC, and BS-2 is set to operate at 70% of SoC. Figure 14(a) shows that both DC bus voltages are regulated at their nominal values throughout the result. During load switching, the DC bus voltages are well within their allowable deviation limits. Hence, the proposed strategy is robust to load variation. It can be observed that the charging power of BS-1 is higher than the charging power of BS-2. Further, from Figure 14(b), it can be observed that the increase in SoC in BS-1 is 0.5% compared to 0.15% in BS-2. It indicates the SoC balancing-based power management performance of the proposed CPMS. During the experiment, all the PV generations operate at maximum power. The power generation of PV-2 is shown in Figure 14(b) for verification.Figure 14
Real-time result of the proposed CPMS in NOM. (a) DC bus voltage in SG1 and SG2, charge/discharge power of BS-1 and BS-2. (b) SoC of BS-1 and BS-2, power through IBC and PV generation.
(a)(b)


### 5.4.2. Case-2: RTDS Results in Fast Charging and Fast Discharging Mode

Figure15 shows the performance of DCMG with the proposed fuzzy-based CPMS in fast charging and fast discharging mode of operation. BS-1 is set to operate at 25% of SoC, and BS-2 is set to operate at 95% of SoC. The viability of the proposed CPMS is studied with six load steps. Figure 15(a) shows that the DC bus voltages are regulated at their nominal values during the operation. Hence, the change in load does not affect the voltage-sensitive loads. Further, it can be observed that the charging power of BS-1 is higher than the charging power of BS-2. Moreover, BS-1 always operates in charging mode during the experiment, and BS-2 operates in discharging mode. From Figure 15(b), it can be observed that, with fast charging and fast discharging operation, the SoC of BS-1 increases to 25.7%, and the SoC of BS-2 decreases to 94%. Hence, with fast charging and fast discharging factor, the low SoC battery is allowed to operate in fast charging mode. Hence, deep discharge of the low SoC battery is avoided. Similarly, the high SoC battery is allowed to operate in slow charging mode. Hence, overcharging of the high SoC battery is avoided. During the experiment, both the PV generations operate at maximum power.Figure 15
Real-time result of the proposed CPMS in fast charging and fast discharging mode. (a) DC bus voltage in SG1 and SG2, charge/discharge power of BS-1 and BS-2. (b) SoC of BS-1 and BS-2, power through IBC and PV generation.
(a)(b)To validate the effectiveness of the proposed CPMS, a comparative study of the proposed CPMS with related reference strategies is summarized in Table6. The majority of reference works are utilized PI-based IBC control strategy, while few implemented fuzzy logic controllers. Further, SoC balancing with nominal voltage regulation and overcharging and discharging regulation is not investigated simultaneously in the addressed research works.Table 6
Comparison of proposed CPMS with related strategies.
ParametersRef [20]Ref [21]Ref [31]Ref [32]Ref [35]Ref [36]Proposed CPMSNominal voltage regulationYesYesNoYesNoNoYesIBC controllerPIFuzzyPIPIPIPIFuzzySoC balancing-based controlNoNoYesYesNoNoYesFast charging/fast discharging controlNoNoNoNoNoNoYesOvercharge and overdischarge regulationNoNoYesYesNoYesYesControl flexibility of batteryYesNoNoNoNoNoYes


## 5.4.1. Case-1: RTDS Results in NOM

Figure14 shows the performance of DCMG with the proposed fuzzy-based CPMS in NOM. The performance of the DCMG is studied with six load steps. BS-1 is set to operate at 40% of SoC, and BS-2 is set to operate at 70% of SoC. Figure 14(a) shows that both DC bus voltages are regulated at their nominal values throughout the result. During load switching, the DC bus voltages are well within their allowable deviation limits. Hence, the proposed strategy is robust to load variation. It can be observed that the charging power of BS-1 is higher than the charging power of BS-2. Further, from Figure 14(b), it can be observed that the increase in SoC in BS-1 is 0.5% compared to 0.15% in BS-2. It indicates the SoC balancing-based power management performance of the proposed CPMS. During the experiment, all the PV generations operate at maximum power. The power generation of PV-2 is shown in Figure 14(b) for verification.Figure 14
Real-time result of the proposed CPMS in NOM. (a) DC bus voltage in SG1 and SG2, charge/discharge power of BS-1 and BS-2. (b) SoC of BS-1 and BS-2, power through IBC and PV generation.
(a)(b)


## 5.4.2. Case-2: RTDS Results in Fast Charging and Fast Discharging Mode

Figure15 shows the performance of DCMG with the proposed fuzzy-based CPMS in fast charging and fast discharging mode of operation. BS-1 is set to operate at 25% of SoC, and BS-2 is set to operate at 95% of SoC. The viability of the proposed CPMS is studied with six load steps. Figure 15(a) shows that the DC bus voltages are regulated at their nominal values during the operation. Hence, the change in load does not affect the voltage-sensitive loads. Further, it can be observed that the charging power of BS-1 is higher than the charging power of BS-2. Moreover, BS-1 always operates in charging mode during the experiment, and BS-2 operates in discharging mode. From Figure 15(b), it can be observed that, with fast charging and fast discharging operation, the SoC of BS-1 increases to 25.7%, and the SoC of BS-2 decreases to 94%. Hence, with fast charging and fast discharging factor, the low SoC battery is allowed to operate in fast charging mode. Hence, deep discharge of the low SoC battery is avoided. Similarly, the high SoC battery is allowed to operate in slow charging mode. Hence, overcharging of the high SoC battery is avoided. During the experiment, both the PV generations operate at maximum power.Figure 15
Real-time result of the proposed CPMS in fast charging and fast discharging mode. (a) DC bus voltage in SG1 and SG2, charge/discharge power of BS-1 and BS-2. (b) SoC of BS-1 and BS-2, power through IBC and PV generation.
(a)(b)To validate the effectiveness of the proposed CPMS, a comparative study of the proposed CPMS with related reference strategies is summarized in Table6. The majority of reference works are utilized PI-based IBC control strategy, while few implemented fuzzy logic controllers. Further, SoC balancing with nominal voltage regulation and overcharging and discharging regulation is not investigated simultaneously in the addressed research works.Table 6
Comparison of proposed CPMS with related strategies.
ParametersRef [20]Ref [21]Ref [31]Ref [32]Ref [35]Ref [36]Proposed CPMSNominal voltage regulationYesYesNoYesNoNoYesIBC controllerPIFuzzyPIPIPIPIFuzzySoC balancing-based controlNoNoYesYesNoNoYesFast charging/fast discharging controlNoNoNoNoNoNoYesOvercharge and overdischarge regulationNoNoYesYesNoYesYesControl flexibility of batteryYesNoNoNoNoNoYes


## 6. Conclusion

In this paper, three DC subgrids are interconnected through two interlinking bidirectional converters (IBCs). In each subgrid, the PV source and battery storage are connected to the DC bus. For regulation of DC bus voltage at its nominal value, a secondary controller has been added above the primary controller of each battery controller. Further, a fuzzy-based coordinated power management strategy has been implemented for each secondary IBC controller for SoC balancing-based power sharing among the subgrids. In addition, with the fast charging and fast discharging mode of the proposed strategy, a low SoC battery charges at a faster rate and a high SoC battery discharges at a faster rate to balance the SoC levels. It has been observed that, in fast charging mode, the SoC of a low SoC battery improves more than 0.5% in 14 s compared to the normal operating mode. Similarly, the SoC of a high SoC battery decreases more than 0.4% in 14 s compared to the normal operating mode with the fast discharging mode. Hence, with the proposed strategy, deep discharge of a low SoC battery has been prevented, and overcharge of a high SoC battery has been avoided. Moreover, the proposed strategy can operate with the plug-and-play condition of the battery unit. The proposed strategy does not depend on a central controller, enhancing the reliability of the DC microgrid. The viability of the proposed strategy has been validated through simulation in MATLAB/Simulink and OPAL-RT real-time digital simulator. The proposed strategy can be implemented in remote area DC microgrids interconnections and telecommunication systems. For more robust control of SoC balancing-based power management and DC bus voltage regulation with an improved transient response, an intelligent algorithm or optimization technique can be implemented with a fuzzy controller in future research.



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*Source: 1288985-2022-04-29.xml*