# Realization of New Electronically Controllable Grounded and Floating Simulated Inductance Circuits Using Voltage Differencing Differential Input Buffered Amplifiers

Authors: Dinesh Prasad; D. R. Bhaskar; K. L.  Pushkar
Journal: Active and Passive Electronic Components
 (2011)

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## Abstract

A new active circuit is proposed for the realisation of lossless grounded and floating inductance employing Voltage Differencing Differential Input Buffered Amplifiers (VD-DIBAs). The proposed grounded simulated inductance circuit employs two VD-DIBAs and a single-grounded capacitor whereas the floating simulated inductance circuit employs three VD-DIBAs and a grounded capacitor. The circuit for grounded inductance does not require any realization conditions whereas in case of floating inductance, only equality of two transconductances is needed. Some sample results demonstrating the applications of the new simulated inductors using VD-DIBAs have been given to confirm the workability of the new circuits.


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## Body

## 1. Introduction

Several synthetic grounded and floating inductance circuits using different active elements such as operational amplifiers (op-amps) [1–5], current conveyors (CCs) [6–13], current controlled conveyors (CCCIIs) [14, 15], current feedback operational amplifiers (CFOAs) [16], operational mirrored amplifiers (OMAs) [17], differential voltage current conveyors (DVCCIIs) [18], current differencing buffered amplifiers (CDBAs) [19–21], current differencing transconductance amplifiers (CDTAs) [22, 23], and operational transconductance amplifier (OTA) [24] are reported in the literature. Recently, various active building blocks have been introduced in [25], VD-DIBA is one of them. Although some applications of VD-DIBAs have been reported in the literature such as in the realization of all pass section [26], to the best knowledge and belief of the authors, no grounded/ floating inductance simulation circuits using VD-DIBAs have yet been reported in the open literature so far. The purpose of this paper is, therefore, to propose new VD-DIBA-based lossless grounded and floating inductance simulation circuits.


## 2. The Proposed New Configurations

The schematic symbol and equivalent model of the VD-DIBA are shown in Figures1(a) and 1(b) [26]. The model includes two controlled sources: the current source controlled by differential voltage (V+-V-), with the transconductance  gm, and the voltage source controlled by differential voltage (Vz-Vv), with the unity voltage gain. The VD-DIBA can be described by the following set of equations:
(1)(Iv+Iv-IzIvVw)=(0000000000gm-gm00000000001-10)(Vv+Vv-VzVvIw).
The proposed configurations are shown in Figures 2 and 3, respectively.(a) Schematic symbol and (b) equivalent model of VD-DIBA [26].
(a)(b)Figure 2
Proposed grounded inductance simulation configuration.Figure 3
Proposed floating inductance simulation configuration.A routine analysis of the circuit shown in Figure2 results in the following expression for the input impedance(2)Zin(s)=s(4Cgm1gm2).
The circuit, thus, simulates a grounded inductance with resulting value given by(3)Leq=4Cgm1gm2.
On the other hand, an analysis of the circuit shown in Figure 3 yields(4)[I1I2]=gm1gm24sC[+1-1-1+1][V1V2],withgm1=gm3
which proves that the circuit simulates a floating lossless inductance with resulting inductance value given by(5)Leq=4Cgm1gm2.
Note that ensuring  gm1=gm3 requires only the equality of the two DC bias currents of the VD-DIBAs which can be easily implemented in practice


## 3. Nonideal Analysis and Sensitivity Performance

LetRz and Cz denote the parasitic resistance and parasitic capacitance of the Z terminal. Taking into account the nonidealities of the VD-DIBA, namely, Vw=(β+Vz-β-Vv), where β+=1-ε1(ε1≪1) and β-=1-ε2(ε2≪1) are voltage tracking errors of the VD-DIBA.For the circuit shown in Figure2, the input impedance will become(6)Zin(s)=4{s(C+Cz)+1/Rz}4{s2Cz2+1/Rz2+2sCz/Rz+s2CCz+sC/Rz}+gm1gm2(2-β1+)(2-β2+).The non-ideal equivalent circuit of the grounded inductor is shown in Figure 4(7)L=4(C+Cz)(4/Rz2+(2-β1+)(2-β2+)gm1gm2),C′=Cz,R′=(C+Cz)Rz(C+2Cz),D=Cz(C+Cz)Rz,C′′=(C+2Cz),R′′=4Rz(4+Rz2(2-β1+)(2-β2+)gm1gm2).The sensitivities of L with respect to active and passive elements are(8)SCL=C(C+Cz),SCzL=Cz(C+Cz),SRzL=2(4+(2-β1+)(2-β2+)Rz2gm1gm2),Sβ1+L=β1+(2-β2+)gm1gm2(4/Rz2+(2-β1+)(2-β2+)gm1gm2),Sβ2+L=β2+(2-β2+)gm1gm2(4/Rz2+(2-β1+)(2-β2+)gm1gm2),Sgm1,gm2L=-(2-β1+)(2-β2+)gm1gm2(4Rz2+(2-β1+)(2-β2+)gm1gm2).
For the circuit shown in Figure 3 the input-output currents and voltages relationship is given by:(9)[I1I2]=X[sCzRz+1XRz+1-1-1sCzRz+1XRz+1][V1V2],withβ1=β3,X=gm1gm2Rzβ1+(2-β2+)/4(s(C+Cz)Rz+1).Figure 4
Non-ideal equivalent circuit of grounded inductor of Figure2.The non-ideal equivalent circuit of floating inductor is shown in Figure5:(10)L=4(C+Cz)β1+(2-β2+)gm1gm2,R=4β1+(2-β2+)gm1gm2Rz.
The sensitivities of L with respect to active and passive elements are(11)SCL=C(C+Cz),SCzL=Cz(C+Cz),Sβ1+L=-1,Sgm1,gm2L=-1,Sβ2+L=β2+(2-β2+).
Assuming  gm1=gm2=258.091 uA/V, Cz=0, Rz=∞, C=16.65 pF, and β1+=β2+=1. These sensitivities are found to be (1, 0, 0, 1, 1, −1) and (1, 0, −1, −1, 1) for (8) and (11), respectively. Thus, all the passive and active sensitivities of both the proposed circuits are low.Figure 5
Non-ideal equivalent circuit of floating inductor of Figure3.


## 4. Verification of the Workability of the New Proposed Grounded/Floating Inductance Configurations

The workability of the proposed simulated inductors has been verified by realizing a band pass filter (BPF) and band reject filter (BRF), respectively.Figure6 shows the schematics for the realization of a BPF, using the new simulated grounded inductor.Figure 6
BPF realized by the new grounded simulated inductor.The transfer function realized by this configuration is given by(12)V0Vin=s(1/R1C1)s2+s(1/R1C1)+(gm1gm2/4C1C2).
Figure 7 shows the schematics for the realization of a BRF, using the proposed floating inductor circuit.Figure 7
BRF realized by the new floating simulated inductor.The transfer function realized by this configuration is given by(13)V0Vin=(s2+gm1gm2/4C1)s2+s(R1gm1gm2/4C1)+gm1gm2/4C1C2.
The performance of the new simulated inductors was evaluated by PSPICE simulations. Since VD-DIBA is not a commercially available IC, a possible implementation of VD-DIBA using commercially available devices is shown in Figure 8. A CMOS-based OTA as shown in Figure 17 and CFOA SPICE macromodel of AD844 to realise VD-DIBAs as per the schematic of Figure 8 were used to determine the frequency response of the grounded and floating simulated inductors. The following values were used for grounded inductor C=16.65 pF, gm1=gm2=258.09 1 uA/V, for floating inductor C=16.65 pF, gm1=gm3=258.091 uA/V. From the frequency response of the simulated grounded inductor (Figure 9) it has been observed that the inductance value remains constant up to 1 MHz. From the frequency response of the simulated floating inductor (Figure 10) it has been observed that the inductance value remains constant up to 1 MHz.Figure 8
A possible implementation of VD-DIBA.Figure 9
Frequency response of simulated grounded inductor.Figure 10
Frequency response of simulated floating inductor.To verify the theoretical analysis, the application circuits shown in Figures6 and 7 have been simulated using CMOS-based OTA as shown in Figure 17 and CFOA SPICE macromodel of AD844 to realise VD-DIBAs as per the schematic of Figure 8. The component values used were for Figure 6, C1=16.65 pF, C2=16.65 pF, R1=5.479 kΩ, and for Figure 7, C1=16.65 pF, C2=16.65 pF and R1=10.959 kΩ, the VD-DIBA was biased with ±1 volts D.C. power supplies with IB1=IB2=IB3=32 μA. IB1,IB2, and IB3 are the biasing currents for transconductances. Figures 11 and 12 show the simulated filter responses of the BP and BR filters, respectively. Figures 13 and 14 show the phase responses of BP and BR filters, respectively. Figure 15 shows the step response of the filter of Figure 6 which confirms the stability of the implemented filter. Figure 16 shows the simulated spectrum of the output signal Vo in Figure 6, where the total harmonic distortion (THD) is found to be 2.98%. The comparison of performance characteristics of VD-DIBA with OTA (CA3080) and CMOS OTA (as shown in Figure 17) has been given in Table 1. These results, thus, confirm the validity of the application of the proposed grounded/floating simulated inductance circuits.Table 1ParametersVD-DIBAOTA (CA 3080)CMOS OTA (Figure17)Input voltage linear range−120 mV to 120 mV−25 mV to 25 mV−109 mV to 109 mV−3 dB Bandwidth121 MHz2 MHz119 MHzPower consumption62.5 mW30 mW0.194 mWFigure 11
Frequency response of BPF using simulated grounded inductor.Figure 12
Frequency response of BRF using simulated floating inductor.Figure 13
Phase response of BPF using simulated grounded inductor.Figure 14
Phase response of BRF using simulated floating inductor.Figure 15
Step response of Figure6.Figure 16
Simulated spectrum of the output signal Vo in Figure6.Figure 17
CMOS implementation of OTA.


## 5. Concluding Remarks

Among various modern active building blocks, VD-DIBA is emerging as quite flexible and versatile building block for analog circuit design. However, the use of VD-DIBA in the realization of grounded/ floating inductor had not been known earlier. This paper has filled this void by introducing new VD-DIBA- based grounded and floating inductor configurations. This paper, thus, has added a new application circuits to the existing repertoire of VD-DIBA-based application circuits. The workability of new propositions has been confirmed by SPICE simulations.



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*Source: 101432-2011-06-07.xml*