# Current-Fed Bidirectional DC-DC Converter Topology for Wireless Charging System Electrical Vehicle Applications

Authors: Partha Sarathi Subudhi; M. Thilagaraj; C. S. Sundar Ganesh; S. Diwakaran; P. Naveen; Saravanakumar Gurusamy; M. Pallikonda Rajasekaran
Journal: Wireless Communications and Mobile Computing
 (2021)

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## Abstract

This paper compares the efficiency of a modified wireless power transfer (WPT) system with a current-fed dual-active half-bridge converter topology and a complete bridge converter topology for a current-fed resonate compensation network with current sharing and voltage doubler. Full-bridge topologies are widely used in current WPT structures. The C-C-L resonate compensation networks for dual-active half-bridge converter and full-bridge converter topologies are built in this paper on both the transmitter and receiver sides. Due to higher voltage stress around inverter switches, series-parallel (S-P) tanks are not recommended for current-fed topologies because they are not ideal for medium power applications. A series capacitor is connected to reduce the reactive power absorbed by the loosely coupled coil. As a consequence, the C-C-L network is used as a compensation network. Dual-active half-bridge topology is chosen over full-bridge topology due to the system’s component count and overall cost. Soft-switching of the devices is obtained for the load current. The entire system is modelled, and the effects are analysed using MATLAB simulation.


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## Body

## 1. Introduction

The revolution in the development of electric vehicles has brought many modifications in charging strategies. Initially, the plug-in electric vehicle battery charging strategy was popular for two, three decades. However, users may get shocked during adverse climatic conditions such as rain and snowfall. The cost of the charging cable also adds more manufacturing cost to the plug-in electric vehicle. These limitations of plug-in vehicles motivated researchers to concentrate on the wireless charging system. Wireless power transfer (WPT) is aimed at making electrical power transfer simpler, reducing complexity, and making it flexible for users and less costly.Battery charging for electric vehicles (EVs) [1–10], mobile devices, biomedical implants [11], and lighting applications [6] have been the subject of a recent WPT study. Revolution in WPT technique started with the invention of the microwave power transfer (MPT) technique. In this technique, the user had the capability to transfer power for a wider range [12]. MPT used rectennas that were connected at the sending and receiving end of the power transfer system. The rectenna facilitates conversion of microwave signal to electric power and vice versa. This power transfer technique was very famous among users as it was able to transfer a higher range of power for a larger range of air gap [13]. However, MPT uses a high-frequency power transfer system, which is not safe for living beings. These power transferring paths must be sealed with protective covers. This arrangement increases the system cost and reduces the reliability of the WPT system [14].Further research in WPT area motivated researchers to develop the inductive power transfer (IPT) technique [15–17]. This technique employs a lower range frequency compared to MPT technique for transferring power wirelessly. This WPT technique has been used in a range of applications over short distances. On the other hand, the performance begins to plummet after a certain distance between the coupling coils. With the increase in distance between the power transferring points and the increase in the misalignment between coils, the power transfer efficiency reduces drastically due to the increase in leakage inductance between the coupling coils [18, 19].In order to compensate for the leakage inductance in IPT technique, there are resonating capacitors connected to both sides of the WPT coupling coils.These resonating capacitors compensate the leakage inductance between the power transfer coils. A basic block diagram of IPT technique is depicted in Figure1. Generally, IPT technique operates in a frequency range of few kilohertz to 300 MHz to balance converter size, performance, and manufacturing cost of the system [6].Figure 1
Basic block diagram.As per the connection of resonating capacitor at both sides of the WPT coils, the WPT technique is divided into two compensation techniques. These techniques are series compensation and parallel compensation technique. WPT using parallel compensation technique is discussed in [8–10]. Basically, current source inverters (CSI) are used for parallel compensation of WPT technique. The parallel compensation technique provides various advantages such as it provides necessary reactive power to the coil; the parallel capacitors show lower impedance to higher-order harmonics. This feature reduces the voltage and current across the power transferring terminals of WPT coils. The parallel compensation circuit employs a series inductor connected with the WPT coils [20–23] This inductor reduces the fault current during inverter fault conditions in CSI. This is a very significant advantage of the WPT technique employing parallel compensation capacitors.Conversely, this series inductor is of big size, which limits the application of this technique to the area where the source produces a stiff rise in current, such as solar power generation system. The parallel LC tank used in WPT technique increases the impedance of the circuit, which can be solved by connecting a series capacitor in series with the compensating circuit. This series capacitor supplies a fraction of reactive power, which is needed by the coupling network [24, 25].The literature review found that using the CCL compensation technique in the primary side coil and LC compensation technique in the secondary coil increases the reliability of the WPT system. This technique is adopted in this proposed system.This paper proposes a soft-switching nonisolated duplex CCL compensation resonant circuit. Circuit diagram of the proposed system is shown in Figure2. It is a front-end half-bridge boost convertor followed by an associate in CCL compensation resonant circuit and voltage electronic device at high-voltage facet. The planned convertor has the subsequent merits: (1) zero voltage switch (ZVS) stimulation of all switches in each directions, (2) zero current switching (ZCS) stimulation and turn-off of all diodes in each directions, (3) voltage level decreases across all the components used to fabricate the system, (4) use of extra snubber circuit is avoided in this system, (5) high improvement and step down ratio, and (6) reduced volume of geophysical science.Figure 2
Circuit diagram of the proposed bidirectional resonant DC/DC converter.Contributions of this work are as follows:(i)
Soft-switching nonisolated duplex CCL compensation resonant circuit is proposed in this work(ii)
The proposed converter uses half-bridge boost converter in the front-end of the network, and CCL resonant circuit is used in this system in order to maximise the power output(iii)
The proposed converter uses ZVS and ZCS switching techniques which reduce the switching voltage of the converter(iv)
This converter also has high step up and step down voltage output capacity


## 2. Working of the Proposed Bidirectional DC/DC Converter

The CCL compensation resonant circuit enhances the voltage magnitude at the output of the converter and provides ZVS and ZCS for front-end devices and diodes, respectively. Half-bridge converter connected at the primary side of the compensating network increases the voltage across its output terminals. The CCL compensation technique adopted at the primary coil further increases the voltage level based on the resonant and switching frequency ratio. This voltage at the output of the compensation network is doubled by employing a voltage doubler circuit at the output of the compensation network. This is how the circuit behaves during the boost operation of the system. Circuit behavior during buck operation is provided in the following paragraph.While the user wants to reduce the converter’s output voltage, the capacitors of the half-bridge converter are used to divide the input voltage to equal magnitude.M3 and M4 switches are also modulated to allow for a high step down ratio. ZVS of switches M3 and M4 and ZCS of diodes D1 and D2 are aided by the CCL compensation resonant circuit.M1 and M2’s gating signals complement one another, with a sufficiently dead band for boost activity. M3 and M4 are switched off. M3 and M4 are run in tandem with enough dead time to allow for buck activity. M1 and M2 do not have any modulation. The converter’s steady-state functions while increasing the output voltage and while decreasing the output voltage are explained in the following subsection.


### 2.1. Converter Behavior while Increasing the Output Voltage Compared to the Input Voltage

Steady-state operating waveforms and the operation of the converter in boost mode are shown in Figures3 and 4, respectively. Devices M3 and M4 are not triggered and remain in OFF-state for the entire boost operation.Figure 3
Voltage and current waveforms of the components while the converter is used to step up the output voltage compared to the input voltage.Figure 4
Equivalent circuits during different intervals of operation of the proposed converter in boost operation.
(a)(b)(c)(d)(e)(f)(g)(h)Mode 1 [t0<t<t1]: The converter is operating as a boost converter. Switch M2 is conducting, and inductor L is storing energy. Working of the converter during this mode is depicted in Figure 4(a). Switch M1 and diodes D1 and D3 remain OFF during this mode. Load is fed by output capacitors, C7 and C8.Mode 2 [t1<t<t2]: During this mode, t=t2; switch M2 is in OFF state. Now, both the switches M1 and M2 are OFF. Inductor current iL and resonant current iLr1 jointly start discharging and charging the parasitic device capacitances C1 and C2, respectively. Working of the converter during this mode is depicted in Figure 4(b). Before the next interval, C1 discharges the stored charge in it and C2 is fully charged. This is quick, and the duration is concise. At the end of this mode, iM1t2=0, iM2t2=0, vM1t2=0, andvD4t2=0. Switch M2 voltage is given by the following:
(1)vM2t1=VL1−D,where D=TON/Ts, TON is the main switch conduction period, and Ts is the switching period.
(2)iLt=iLt3−vCst2−vCpt2Lt−t3.Voltage across diodeD3 is given by the following:
(3)vD3=VH.Mode 3[t2<t<t3]: Now, the body diode D1 starts conducting by iL−iLr1causing zero voltage across M1. Diode D4 is forward biased, and current starts flowing through resonant inductor Lr2and capacitor CP starts charging output capacitor C8. Working of the converter during this mode is depicted in Figure 4(c). Final values are iM1t3=0, iM2t3=0, vM1t3=0, and vM2t3=VL/1−D(4)iD1t3=iLt3−iLr1t3.Mode 4 [t3<t<t4]: At t=t3, M1 starts conducting with ZVS. The equivalent resonant circuit is shown in Figure 5(a). Antiparallel body diode D4 conducts to charge capacitor C8, while diode D3 is reverse biased. Before the next interval, the diode D4 turns off with ZCS as the resonant inductor current iLr2discontinues to zero. Working of the converter during this mode is shown in Figure 4(d). The equations for this interval are as follows:
(5)iLr1t=vCst3−vCpt3Zr⋅sinωrt−t3,where
(6)ωr=C5+CpLr1CpCs,zr=Lr1Cp+CsCp+Cs,iLt=iLt3−vCst2−vCpt2Lt−t3,iM1t=iLr1t−iLt.Figure 5
Equivalent circuit for resonant operation in (a) interval 3 and (b) interval 7.
(a)(b)Voltage across antiparallel diodeD3 is follows:
(7)vD3=VH,where Zr is known as characteristic impedance offered by the circuit formed by resonant tank Lr1, Cp, and capacitor C5 as shown in Figure 5(a).Mode 5 [t4<t<t5]: Current continues to flow through switch M1, and body diodes do not conduct. Load is fed by energy stored in output capacitor C7 and C8. At t=t4, switch M1 stops conducting. At the end of this mode, vD3t5=0, vD4t5=0, and vM2t5=VL/1−D. Working of the converter during this mode is depicted in Figure 4(e).Mode 6 [t5<t<t6]: Parasitic capacitance C1 is charged, and capacitance C2 is discharged by iLr1−iL. High-side body diodes are reverse biased. Before next interval, capacitance C2 is discharged completely, and C1 is charged to VH/1−D. Working of the converter during this mode is depicted in Figure 4(f).Mode 7 [t6<t<t7]: In this interval, diode D2 starts conducting through a difference of (iLr−iL) and M2 can now use for ZVS turn-on. Working of the converter during this mode is depicted in Figure 4(g). Diode D4 is reverse-biased while D3 conducts. Final values are iM1t7=0, iM2t7=0, vM1t7=0, and vM2t7=Vin/1–D.
(8)iD2t7=iLt7−iLr1t7.Mode 8 [t7<t<t8]: At t=t7, switch M2 conducts with ZVS. Resonant inductor Lr, capacitor CP, and C4 resonate together as shown in Figure 5(b). Working of the converter during this mode is depicted in Figure 4(h). Before the next interval t=t8, body diode D3 turns off with ZCS. The current through Lr is given by the following:
(9)iLr1=−vC6t7+vCpt7Zrsinwrt−t7,for C5=C6.Here, characteristic impedanceZr is offered by the circuit formed by Lr1, Cp, and capacitor C6 as shown in Figure 5(b). iL is given by the following:
(10)iLt=iLt7+VLLt−t7.iM2 is given by the following:
(11)iM2=iLt−t7−iLr1t−t7.Then, the next half cycle repeats in order to complete the full cycle.


#### 2.1.1. Converter Behavior while Decreasing the Output Voltage Compared to the Input Voltage

The converter waveforms and the current flow during different intervals of operation for the buck mode are shown in Figures6 and 7, respectively. M1 and M2 are not triggered for the entire buck operation.Figure 6
Voltage and current waveforms of the components. The converter is used to step down the output voltage compared to the input voltage.Figure 7
Equivalent circuits during different intervals of buck operation.
(a)(b)(c)(d)(e)(f)(g)Interval 1 [t0<t<t1]: It is identical to buck or voltage-fed operation. Current through switch M4 flows and power flows to low voltage side through the resonant circuit and body diode D2. Resonant current flows in the circuit.Interval 2 [t1<t<t2]: At t=t1, switch M4 is turned off. Parasitic capacitances C3 and C4 start charging and discharging, respectively, by resonant current iLr2. At the end of this interval, C3 and C4 are fully discharged and charged (to VH), respectively. This is a quick and short interval. Current iLr1is given by the following:
(12)iLr1t=vCpt1+vC6t1Zr⋅sinwrt−t1,where C5=C6; iL is given by the following:
(13)iLt=iLt1−VLLt−t1.iD2 is given by the following:
(14)iD2t−t1=iLr1t−t1−iLt−t1.Final values areiM3t2=0, iM4t2=0, vM3t2=VH, and vM4t2=0.Interval 3 [t2<t<t3]: The resonant inductor current iLr2 flows through the diode D3, which results voltage across switch M3 to 0 and it results for ZVS turn-on. iLr2 is given by the following:
(15)iLr2=vCpt2+0.5VHZrb⋅sinwrbt−t2,where currentiD3is given by the following:
(16)iD3t=iLr2t.Final values areiM3t3=0, iM4t3=0, vM3t3=0, and vM4t3=VH.Interval 4 [t3<t<t4]: At t=t3, switch M3 turns on. Voltage VH/2 is applied across resonant circuit through switch M3. Resonant inductor Lr2and capacitor CP resonate with capacitor C7. This interval ends at t=t4 when switch M3 is turned off.Interval 5 [t4<t<t5]: In this interval, both the switches M3 and M4 are off. Parasitic capacitances C4 and C3 start discharging and charging, respectively, by resonant current iLr2. At t=t5, C4 is discharged completely and C3 is fully charged to VH. Final values are iM3t5=iM4t5=0, vM3t5=VH, and vM4t5=0.Interval 6 [t5<t<t6]: Antiparallel diode D4 starts conducting, and M4 is used for ZVS turn-on. Before next interval, antiparallel diode D2 turns off with ZCS. iLr2 is given by the following:
(17)iLr2t=vCpt5+0.5VHZrb⋅sinwrbt−t5,where current through antiparallel diode D3 is given by the following:
(18)iD4=iLr2.Final values areiM3t6=iM4t6=0, vM4t6=0, and vM3t6=VH.Interval 7 [t6<t<t7]: At t=t6, switch M4 turns on with ZVS. Therefore, iLr2 flows through switch M4. Diode D1 is forward biased and starts charging capacitor C5. At t=t7, diode D1 turns off with ZCS.Then, the next half cycle starts with the same operation cycle in order to complete the other half cycle.


## 2.1. Converter Behavior while Increasing the Output Voltage Compared to the Input Voltage

Steady-state operating waveforms and the operation of the converter in boost mode are shown in Figures3 and 4, respectively. Devices M3 and M4 are not triggered and remain in OFF-state for the entire boost operation.Figure 3
Voltage and current waveforms of the components while the converter is used to step up the output voltage compared to the input voltage.Figure 4
Equivalent circuits during different intervals of operation of the proposed converter in boost operation.
(a)(b)(c)(d)(e)(f)(g)(h)Mode 1 [t0<t<t1]: The converter is operating as a boost converter. Switch M2 is conducting, and inductor L is storing energy. Working of the converter during this mode is depicted in Figure 4(a). Switch M1 and diodes D1 and D3 remain OFF during this mode. Load is fed by output capacitors, C7 and C8.Mode 2 [t1<t<t2]: During this mode, t=t2; switch M2 is in OFF state. Now, both the switches M1 and M2 are OFF. Inductor current iL and resonant current iLr1 jointly start discharging and charging the parasitic device capacitances C1 and C2, respectively. Working of the converter during this mode is depicted in Figure 4(b). Before the next interval, C1 discharges the stored charge in it and C2 is fully charged. This is quick, and the duration is concise. At the end of this mode, iM1t2=0, iM2t2=0, vM1t2=0, andvD4t2=0. Switch M2 voltage is given by the following:
(1)vM2t1=VL1−D,where D=TON/Ts, TON is the main switch conduction period, and Ts is the switching period.
(2)iLt=iLt3−vCst2−vCpt2Lt−t3.Voltage across diodeD3 is given by the following:
(3)vD3=VH.Mode 3[t2<t<t3]: Now, the body diode D1 starts conducting by iL−iLr1causing zero voltage across M1. Diode D4 is forward biased, and current starts flowing through resonant inductor Lr2and capacitor CP starts charging output capacitor C8. Working of the converter during this mode is depicted in Figure 4(c). Final values are iM1t3=0, iM2t3=0, vM1t3=0, and vM2t3=VL/1−D(4)iD1t3=iLt3−iLr1t3.Mode 4 [t3<t<t4]: At t=t3, M1 starts conducting with ZVS. The equivalent resonant circuit is shown in Figure 5(a). Antiparallel body diode D4 conducts to charge capacitor C8, while diode D3 is reverse biased. Before the next interval, the diode D4 turns off with ZCS as the resonant inductor current iLr2discontinues to zero. Working of the converter during this mode is shown in Figure 4(d). The equations for this interval are as follows:
(5)iLr1t=vCst3−vCpt3Zr⋅sinωrt−t3,where
(6)ωr=C5+CpLr1CpCs,zr=Lr1Cp+CsCp+Cs,iLt=iLt3−vCst2−vCpt2Lt−t3,iM1t=iLr1t−iLt.Figure 5
Equivalent circuit for resonant operation in (a) interval 3 and (b) interval 7.
(a)(b)Voltage across antiparallel diodeD3 is follows:
(7)vD3=VH,where Zr is known as characteristic impedance offered by the circuit formed by resonant tank Lr1, Cp, and capacitor C5 as shown in Figure 5(a).Mode 5 [t4<t<t5]: Current continues to flow through switch M1, and body diodes do not conduct. Load is fed by energy stored in output capacitor C7 and C8. At t=t4, switch M1 stops conducting. At the end of this mode, vD3t5=0, vD4t5=0, and vM2t5=VL/1−D. Working of the converter during this mode is depicted in Figure 4(e).Mode 6 [t5<t<t6]: Parasitic capacitance C1 is charged, and capacitance C2 is discharged by iLr1−iL. High-side body diodes are reverse biased. Before next interval, capacitance C2 is discharged completely, and C1 is charged to VH/1−D. Working of the converter during this mode is depicted in Figure 4(f).Mode 7 [t6<t<t7]: In this interval, diode D2 starts conducting through a difference of (iLr−iL) and M2 can now use for ZVS turn-on. Working of the converter during this mode is depicted in Figure 4(g). Diode D4 is reverse-biased while D3 conducts. Final values are iM1t7=0, iM2t7=0, vM1t7=0, and vM2t7=Vin/1–D.
(8)iD2t7=iLt7−iLr1t7.Mode 8 [t7<t<t8]: At t=t7, switch M2 conducts with ZVS. Resonant inductor Lr, capacitor CP, and C4 resonate together as shown in Figure 5(b). Working of the converter during this mode is depicted in Figure 4(h). Before the next interval t=t8, body diode D3 turns off with ZCS. The current through Lr is given by the following:
(9)iLr1=−vC6t7+vCpt7Zrsinwrt−t7,for C5=C6.Here, characteristic impedanceZr is offered by the circuit formed by Lr1, Cp, and capacitor C6 as shown in Figure 5(b). iL is given by the following:
(10)iLt=iLt7+VLLt−t7.iM2 is given by the following:
(11)iM2=iLt−t7−iLr1t−t7.Then, the next half cycle repeats in order to complete the full cycle.


### 2.1.1. Converter Behavior while Decreasing the Output Voltage Compared to the Input Voltage

The converter waveforms and the current flow during different intervals of operation for the buck mode are shown in Figures6 and 7, respectively. M1 and M2 are not triggered for the entire buck operation.Figure 6
Voltage and current waveforms of the components. The converter is used to step down the output voltage compared to the input voltage.Figure 7
Equivalent circuits during different intervals of buck operation.
(a)(b)(c)(d)(e)(f)(g)Interval 1 [t0<t<t1]: It is identical to buck or voltage-fed operation. Current through switch M4 flows and power flows to low voltage side through the resonant circuit and body diode D2. Resonant current flows in the circuit.Interval 2 [t1<t<t2]: At t=t1, switch M4 is turned off. Parasitic capacitances C3 and C4 start charging and discharging, respectively, by resonant current iLr2. At the end of this interval, C3 and C4 are fully discharged and charged (to VH), respectively. This is a quick and short interval. Current iLr1is given by the following:
(12)iLr1t=vCpt1+vC6t1Zr⋅sinwrt−t1,where C5=C6; iL is given by the following:
(13)iLt=iLt1−VLLt−t1.iD2 is given by the following:
(14)iD2t−t1=iLr1t−t1−iLt−t1.Final values areiM3t2=0, iM4t2=0, vM3t2=VH, and vM4t2=0.Interval 3 [t2<t<t3]: The resonant inductor current iLr2 flows through the diode D3, which results voltage across switch M3 to 0 and it results for ZVS turn-on. iLr2 is given by the following:
(15)iLr2=vCpt2+0.5VHZrb⋅sinwrbt−t2,where currentiD3is given by the following:
(16)iD3t=iLr2t.Final values areiM3t3=0, iM4t3=0, vM3t3=0, and vM4t3=VH.Interval 4 [t3<t<t4]: At t=t3, switch M3 turns on. Voltage VH/2 is applied across resonant circuit through switch M3. Resonant inductor Lr2and capacitor CP resonate with capacitor C7. This interval ends at t=t4 when switch M3 is turned off.Interval 5 [t4<t<t5]: In this interval, both the switches M3 and M4 are off. Parasitic capacitances C4 and C3 start discharging and charging, respectively, by resonant current iLr2. At t=t5, C4 is discharged completely and C3 is fully charged to VH. Final values are iM3t5=iM4t5=0, vM3t5=VH, and vM4t5=0.Interval 6 [t5<t<t6]: Antiparallel diode D4 starts conducting, and M4 is used for ZVS turn-on. Before next interval, antiparallel diode D2 turns off with ZCS. iLr2 is given by the following:
(17)iLr2t=vCpt5+0.5VHZrb⋅sinwrbt−t5,where current through antiparallel diode D3 is given by the following:
(18)iD4=iLr2.Final values areiM3t6=iM4t6=0, vM4t6=0, and vM3t6=VH.Interval 7 [t6<t<t7]: At t=t6, switch M4 turns on with ZVS. Therefore, iLr2 flows through switch M4. Diode D1 is forward biased and starts charging capacitor C5. At t=t7, diode D1 turns off with ZCS.Then, the next half cycle starts with the same operation cycle in order to complete the other half cycle.


## 2.1.1. Converter Behavior while Decreasing the Output Voltage Compared to the Input Voltage

The converter waveforms and the current flow during different intervals of operation for the buck mode are shown in Figures6 and 7, respectively. M1 and M2 are not triggered for the entire buck operation.Figure 6
Voltage and current waveforms of the components. The converter is used to step down the output voltage compared to the input voltage.Figure 7
Equivalent circuits during different intervals of buck operation.
(a)(b)(c)(d)(e)(f)(g)Interval 1 [t0<t<t1]: It is identical to buck or voltage-fed operation. Current through switch M4 flows and power flows to low voltage side through the resonant circuit and body diode D2. Resonant current flows in the circuit.Interval 2 [t1<t<t2]: At t=t1, switch M4 is turned off. Parasitic capacitances C3 and C4 start charging and discharging, respectively, by resonant current iLr2. At the end of this interval, C3 and C4 are fully discharged and charged (to VH), respectively. This is a quick and short interval. Current iLr1is given by the following:
(12)iLr1t=vCpt1+vC6t1Zr⋅sinwrt−t1,where C5=C6; iL is given by the following:
(13)iLt=iLt1−VLLt−t1.iD2 is given by the following:
(14)iD2t−t1=iLr1t−t1−iLt−t1.Final values areiM3t2=0, iM4t2=0, vM3t2=VH, and vM4t2=0.Interval 3 [t2<t<t3]: The resonant inductor current iLr2 flows through the diode D3, which results voltage across switch M3 to 0 and it results for ZVS turn-on. iLr2 is given by the following:
(15)iLr2=vCpt2+0.5VHZrb⋅sinwrbt−t2,where currentiD3is given by the following:
(16)iD3t=iLr2t.Final values areiM3t3=0, iM4t3=0, vM3t3=0, and vM4t3=VH.Interval 4 [t3<t<t4]: At t=t3, switch M3 turns on. Voltage VH/2 is applied across resonant circuit through switch M3. Resonant inductor Lr2and capacitor CP resonate with capacitor C7. This interval ends at t=t4 when switch M3 is turned off.Interval 5 [t4<t<t5]: In this interval, both the switches M3 and M4 are off. Parasitic capacitances C4 and C3 start discharging and charging, respectively, by resonant current iLr2. At t=t5, C4 is discharged completely and C3 is fully charged to VH. Final values are iM3t5=iM4t5=0, vM3t5=VH, and vM4t5=0.Interval 6 [t5<t<t6]: Antiparallel diode D4 starts conducting, and M4 is used for ZVS turn-on. Before next interval, antiparallel diode D2 turns off with ZCS. iLr2 is given by the following:
(17)iLr2t=vCpt5+0.5VHZrb⋅sinwrbt−t5,where current through antiparallel diode D3 is given by the following:
(18)iD4=iLr2.Final values areiM3t6=iM4t6=0, vM4t6=0, and vM3t6=VH.Interval 7 [t6<t<t7]: At t=t6, switch M4 turns on with ZVS. Therefore, iLr2 flows through switch M4. Diode D1 is forward biased and starts charging capacitor C5. At t=t7, diode D1 turns off with ZCS.Then, the next half cycle starts with the same operation cycle in order to complete the other half cycle.


## 3. Voltage Gain and Soft-Switching Conditions

### 3.1. Voltage Gain

(1)
Boost mode: The converter operates in three stages that contribute to the voltage gain of the system: (1) front-end boost convertergain=Vin/1−D, (2) resonant circuit gain, and (3) voltage doubler gain=2×. The overall converter gain is the multiplication of the gains offered by the individual circuits and is given by the following:
(19)VH=VL⋅Gboost⋅21−D,where D is the duty cycle, fs is the switching frequency, and Rac is effective ac load resistance and is given by Rac=XCp,XLr1,XLr2,XC6which are reactances of Cp, Lr1, Lr2, and C6, respectively. It is straightforward to derive using standard complex ac analysis.(2)
Buck mode: In the buck mode,VH/2 is applied across the coupling circuit due to the half-bridge inverter capacitors. The step down ratio is given by the following:
(20)VL=12VH⋅DBuckGBoost.


### 3.2. ZVS Conditions

Power stored in inductorLr1 at t=t1 must be bigger than the power stored in system capacitance of switches M1 and M2 to facilitate ZVS of M1.
(21)12Lr1ILavg2−12Lr1ir12t1>12C1+C2Vin1−D.The variance between the power stored in the inductorLr1 and the power stored in the inductor L must be adequate to charge and discharge system capacitances C1 and C2 as shown as follows:
(22)12Lr1ILavg2−12Lr1ir12t5>12C1+C2Vin1−D2.In order to adjust the motor speed to the required set point, a controller is used. An error signal is produced to adjust the speed generated by the difference of real motor speed with the reference speed, which facilitates the closed loop control of the motor. The error signal’s magnitude and polarity are directly proportional to the real and necessary speed change. The PI controller is in charge of generating the data.


## 3.1. Voltage Gain

(1)
Boost mode: The converter operates in three stages that contribute to the voltage gain of the system: (1) front-end boost convertergain=Vin/1−D, (2) resonant circuit gain, and (3) voltage doubler gain=2×. The overall converter gain is the multiplication of the gains offered by the individual circuits and is given by the following:
(19)VH=VL⋅Gboost⋅21−D,where D is the duty cycle, fs is the switching frequency, and Rac is effective ac load resistance and is given by Rac=XCp,XLr1,XLr2,XC6which are reactances of Cp, Lr1, Lr2, and C6, respectively. It is straightforward to derive using standard complex ac analysis.(2)
Buck mode: In the buck mode,VH/2 is applied across the coupling circuit due to the half-bridge inverter capacitors. The step down ratio is given by the following:
(20)VL=12VH⋅DBuckGBoost.


## 3.2. ZVS Conditions

Power stored in inductorLr1 at t=t1 must be bigger than the power stored in system capacitance of switches M1 and M2 to facilitate ZVS of M1.
(21)12Lr1ILavg2−12Lr1ir12t1>12C1+C2Vin1−D.The variance between the power stored in the inductorLr1 and the power stored in the inductor L must be adequate to charge and discharge system capacitances C1 and C2 as shown as follows:
(22)12Lr1ILavg2−12Lr1ir12t5>12C1+C2Vin1−D2.In order to adjust the motor speed to the required set point, a controller is used. An error signal is produced to adjust the speed generated by the difference of real motor speed with the reference speed, which facilitates the closed loop control of the motor. The error signal’s magnitude and polarity are directly proportional to the real and necessary speed change. The PI controller is in charge of generating the data.


## 4. Simulation Analysis of the Proposed System

Simulation analysis of the proposed system is described in this section. MATLAB software is used in order to carry the simulation of the system. The components used in order to carry out the simulation are listed in Table1. The simulation model of the proposed system is depicted in Figure 8. Voltage and current waveform at the output terminal of the inverter is depicted in Figure 9.Table 1
List of the components used in the system.
Sl. No.ComponentSpecification1MOSFET200 V, 30 A2Inductor101 mH, 20 A3Capacitor100μF, 500 V4Diode20 A5Coupled inductor100 mH, 20 AFigure 8
Simulation model of proposed DC-DC converter in boost mode.Figure 9
Voltage and current waveforms of inverter.Waveform of the current passing through the resonant inverter is shown in Figure10. Voltage across the transmitter coil and receiver coils used in order to transfer power wirelessly is depicted in Figures 11 and 12, respectively.Figure 10
Currents of resonant inductors.Figure 11
The output voltage and input voltage of transmitter, receiver coil.Figure 12
Simulation model of the proposed DC-DC converter in buck mode.Simulation model of the proposed system in buck mode is depicted in Figure12. Output and input voltage waveform of the converter in boost mode is shown in Figure 13.Figure 13
Output voltage and input voltage of boost mode.In boost mode, induction motor drive is used as the load in the proposed system. Simulation model of the system in boost mode is shown in Figure14. Waveforms of the load current and load voltage during this mode are depicted in Figures 15 and 16, respectively.Figure 14
Simulation model of proposed DC-DC converter in boost mode with induction motor drive.Figure 15
Performance of load voltage.Figure 16
Performance of load current.The output power of the system is varied and it is compared to the efficiency of the overall system. The comparison is plotted as shown in Figure17. It is observed that, in this proposed system, when the output power of 400 W is achieved, the efficiency of the system corresponds to 89%.Figure 17
Measured output power and efficiency property.


## 5. Future Extension of the Proposed System

(i)
The converter can be redesigned in order to reduce power conversion stages(ii)
Capacitive power transfer technique can be followed in the improved system in order to reduce manufacturing loss and complexity of the system(iii)
New wireless power techniques can be developed in order to increase the power transfer distance and efficiency of the system(iv)
New controller and cooling techniques can be developed in order to reduce overall system losses


## 6. Conclusion

This paper explains the design and analysis of a nonisolated bidirectional soft-switching current-fed resonant DC/DC converter. The converter is able to achieve high step up/step down ratio, high efficiency, and the low voltage across the components used to manufacture the converter. ZCS and ZVS turn-on of the system is achieved, which is a great achievement of the proposed converter compared to the existing topologies. The output voltage of the converter is clamped without the use of any snubber circuit. The proposed system is linked to an induction motor drive, and the drive’s output is controlled. The simulation analysis of the proposed converter resembles the theoretical explanation of the system proving the efficacy of the WPT system.



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*Source: 1144453-2021-12-08.xml*