Holographic reduction, interpolation and hardness We introduce the method of proving complexity dichotomy theorems by holographic reductions. Combined with interpolation, we present a unified strategy to prove #P-hardness. Specifically, we prove a complexity dichotomy theorem for a class of counting problems on 2-3 regular graphs expressible by Boolean signatures. For these problems, whenever a holographic reduction followed by interpolation fails to prove #P-hardness, we can show that the problem is solvable in polynomial time. The study of counting problems and their classifications are a major theme in computational complexity theory. Some counting problems are computable in P, while others appear hard. Valiant (1979a) introduced the class #P to capture most of these counting problems. Some well-known examples of this class of problems are counting perfect matchings, or counting vertex covers. A uniform framework to address a large class of counting problems is called H-coloring (Bulatov & Grohe 2005; Dyer & Greenhill 2000) .. Consider the problem of counting all vertex covers on a graph G = (V, E). One way to express this problem is as follows: We will consider all 0-1 assignments σ of the vertex set V , and for 574 Cai, Lu & Xia cc 21 (2012) every edge (x, y) ∈ E, we assign an Or function on two bits. We will also call such a function F a "signature." Then, σ −1 (1) is a vertex cover iff (x,y)∈E F (σ(x), σ(y)) = 1, and the total number of vertex covers is σ (x,y)∈E F (σ(x), σ(y)).. More generally, in H-colorings or H-homomorphisms, H is a fixed directed or undirected graph (with possible self-loops) given by a Boolean adjacency matrix. A mapping σ : V (G) → V (H) is a homomorphism iff for every edge (x, y) ∈ E(G), H(σ(x) , σ(y)) = 1. Then, the quantity σ (x,y)∈E(G) H(σ(x) , σ(y)) counts the number of H-homomorphisms. Vertex cover is the special case where the two-vertex graph H has the adjacency matrix . Dichotomy theorems for H-coloring problems with undirected graphs H and directed acyclic graphs H are given by Dyer & Greenhill (2000) and Dyer et al. (2007) , respectively.. When it comes to matchings or perfect matchings, the more natural framework will be to consider assignments to the edge set of G instead of the vertex set, and the "evaluation" F happens at each vertex, which is either a Boolean At-Most-One function (for matchings) or the Exact-One function (for perfect matchings). Thus, a Boolean assignment σ of E is a matching (respectively a perfect matching) iff at every vertex v the assignment σ on incident edges E(v) evaluates to 1 according to F , and the sum σ: E→{0,1} v∈V F (σ | E(v) ) is the total number of matchings or perfect matchings, respectively.. We remark that assigning values on edges can be viewed as a generalization of assigning values on vertices. To see this, let's temporarily consider the following further generalization where we assign a value at each end of an edge e = (x, y), that is, we assign a value σ(e, x) and σ (e, y) . Then, we may attach a function F at each edge as well as at each vertex. An edge function F at e takes inputs σ(e, x) and σ (e, y) . The overall evaluation is done for all v ∈ V and all e ∈ E. The counting problem is to evaluate σ v,e F , the sum over all σ, of products over all v and e. In this setup, evaluating over vertex assignments is the special case where F at each vertex is the Equality function, and evaluating over edge assignments is the special case where F at each edge is the Equality function of arity two. However, we claim that this further generalization can be easily simulated within the framework of edge assignments, by the following construction: Replace each edge by a path of length two and introduce a new vertex of degree two in the middle. This substitution makes G a bipartite graph (formally its incidence graph), where every vertex on one side (the new vertices) has degree 2.. In this study, we will study our counting problems in the framework of edge assignments. It turns out that this framework has a close connection with holographic algorithms and reductions. Holographic algorithms have been introduced by Valiant (2008) . There are two main ingredients in Valiant's beautiful theory. The first is the use of matchgates to encode computations, which allows a P-time computation over planar graphs using the FKT algorithm (Kasteleyn 1961; Temperley & Fisher 1961) in terms of Pfaffians. The second ingredient is to use linear algebra to transform one problem to another one representable by matchgates. The transformation creates exponential sums of perfect matchings in a "holographic mix" and achieves exponential cancellations in the process. Cai et al. (2011d) have introduced another family of holographic algorithms. These are based on Fibonacci gates, a counter part to matchgates; they are also P-time computable primitives and can be used over non-planar graphs as well. Holographic transformations with Fibonacci gates also create exponential cancellations to yield P-time algorithms.. We initiate, in this study, the use of holographic algorithms and reductions as a method to prove complexity dichotomy theorems. We investigate a class of counting problems and classify each problem to be either in P or #P-complete. In order to obtain clearly stated results, we restrict our attention to the class of 2-3 regular graphs. A 2-3 regular graph is a bipartite graph G = (U, V, E), where deg(u) = 2 and deg(v) = 3 for all u ∈ U and v ∈ V . As indicated above, evaluating over edge assignments for this class of graphs can simulate vertex assignments over 3-regular graphs. The reason for this restriction is that (a) in this simplest case we can already show #P-completeness, and (b) we can prove a dichotomy theorem, to demonstrate the power of this new technique as a uniform methodology.. 576 Cai, Lu & Xia cc 21 (2012) Our main technical contributions are as follows: Over the class of 2-3 regular graphs we will consider each vertex u ∈ U (resp. v ∈ V ) is given a Boolean signature, [x 0 , x 1 , x 2 ] (resp. [y 0 , y 1 , y 2 , y 3 ]). This notation (see Valiant 2008 ) means that at u ∈ U of degree 2, a Boolean function F takes the value x 0 , x 1 and x 2 , respectively, when the Hamming weight of the Boolean input at its two incident edges are 0, 1, and 2, respectively. The meaning of the signature [y 0 , y 1 , y 2 , y 3 ] at v ∈ V is similar, namely it takes the value y 0 , y 1 , y 2 and y 3 , respectively, when the Hamming weight of the 3 input bits are 0, 1, 2, and 3, respectively. We denote by #[x 0 , x 1 , x 2 ]|[y 0 , y 1 , y 2 , y 3 ] the counting problem over all 2-3 regular graphs using these signatures. Our starting point is the observation that both # . The feasibility of these holographic reductions is informed by the ideas from Cai & Lu (2010 , 2011 ; but it can be understood and verified directly, independent of Cai & Lu (2010 , 2011 (Valiant 1979a) . The lemma gives a sufficient condition for this interpolation to succeed. The proof of this lemma uses some basic Galois theory. The actual interpolation is accomplished by a couple of combinatorial gadgets. (But the theory is strong enough that the particular gadgets are almost generic without cleverness; see more discussions in Section 8.) When this interpolation succeeds, we will have proved that the counting problem #[x 0 , x 1 , x 2 ] | [y 0 , y 1 , y 2 , y 3 ] is #P-complete. All our hardness results are proved by this single universal strategy.. Along the way we will discover that for some signature pairs [x 0 , x 1 , x 2 ] and [y 0 , y 1 , y 2 , y 3 ] this hardness proof via interpolation does not work. Then, we will show that these cases are in fact computable in polynomial time. They come in three categories: (1) They can be solved by Fibonacci gates over general graphs; (2) They can be solved by matchgates over planar graphs; and (3) Some special cases are solvable in P for obvious reasons. This gives us a dichotomy theorem. We make some remarks on the proof methodology. As can be seen all the hardness results in this study are proved by a uniform method. The general principle is holographic reductions followed by interpolations. Holographic reductions reveal internal unity among apparently different problems. The success of interpolation depends on an algebraic lemma whose proof uses some basic Galois theory, but the actual interpolation using the lemma is carried out by specific gadgets, case by case.. However, unlike a typical NP-hardness proof, here the gadgets are generic, without any particular built-in design purpose. In a typical NP-hardness proof, we usually design a particular gadget with some definite functionality built-in, for example, as a truth setting component related to a SAT problem. Here, there are no custom designed features. Nonetheless, since the conditions of the algebraic lemma are fairly general, one expects that a generic gadget will work (if the underlying problem is indeed hard).. There is another aspect of the proof methodology that is worth commenting on. When we design a gadget A using e edges for interpolation in this framework, the theory dictates that we must compute the transition matrix A from N s to N s+1 for their respective signatures. The computation of this matrix is in fact not a cc 21 (2012) Holographic reduction, interpolation, hardness 599 trivial matter, involving 2 e steps in the worst case for each entry. (Mildly self-referential, if P #P = P, this computation cannot be substantially simpler in the worst case.) In our proofs, we simply presented these matrices in its computed form, without giving any efficient way to verify these. This is a marked departure from the practice in typical NP-hardness proofs, where we usually have a built-in structure in the gadget which ensures that there are only a few cases to be examined, in order for us to "understand" the gadget. Here, this "understanding" comes at a cost of 2 e steps of computation. If we equate NP with a proof system having an efficient verification, then our proofs fit this notion tenuously. One can easily contemplate moderately sized gadgets with over 50 or 100 edges, say, and then to verify a particular gadget works, it may require the computation of 2 100 steps, far exceeding many cryptosystems such as DES.. Further development. Some preliminary work of this study was presented in Cai et al. (2008) . While this study was in submission, a number of improvements and closely related results have been obtained. In Cai et al. (2011c) we considered the case #[x 0 , x 1 , x 2 ]|[y 0 , y 1 , y 2 , y 3 ] where [y 0 , y 1 , y 2 , y 3 ] = [1, 0, 0, 1] is the Equality function and x 0 , x 1 , x 2 ∈ R are arbitrary real numbers. In Kowalczyk & Cai (2010) , this is generalized to all complex signatures [x 0 , x 1 , x 2 ]. In Cai & Kowalczyk (2010) we considered the case #[x 0 , x 1 , x 2 ]|(= k ), where (= k ) is the Equality function on k bits and x 0 , x 1 , x 2 ∈ R. This is generalized in Cai & Kowalczyk (2012) to #[x 0 , x 1 , x 2 ]|(= k ), for all x 0 , x 1 , x 2 ∈ C. In all cases, we proved a complexity dichotomy theorem. Each dichotomy theorem is built on top of the previous one, starting from Kowalczyk & Cai (2010) . The case with Equality functions is particularly well-studied, called Spin Systems in statistical physics, and corresponds to vertex assignments for 3-regular (resp. k-regular) graphs. Even though they formally do not include all the cases discussed in this paper, Kowalczyk & Cai (2010) does prove the "generic" 2-3 regular case from the perspective of holographic reductions. Building on Kowalczyk & Cai (2010) , a dichotomy theorem was proved in Cai et al. (2010a) for the general 2-3 regular case #[x 0 , x 1 , x 2 ]|[y 0 , y 1 , y 2 , y 3 ], for all x i , y j ∈ C, which 600 Cai, Lu & Xia cc 21 (2012) classifies all such problems into either polynomial time computable or #P-hard, with an effective criterion. It did not consider planar graphs. The further classification on 2-3 regular planar graphs that fully generalizes Theorem 6.2 appeared in Cai et al. (2010b) (Theorem V.1). These studies follow the approach of holographic reductions initiated in this study, but the proof details differ and logically they do not depend on this study. They use different techniques to justify the success of interpolations. In this study, we use basic Galois theory for this purpose, by looking at the exact order of the roots of unity and the cyclotomic polynomials involved. When the signatures are real or complex, this is difficult to do.. If we allow all unary functions to be freely available in a Holant problem, then we have a Holant * problem, for which a dichotomy theorem is proved in Cai et al. (2011b) . This article also studied the class of Holant problems, where only the constant 0, 1 unary functions are freely available, called Holant c problems. These have a strong connection to complex-valued counting CSP problems (Cai et al. 2009 ). The main result in Cai et al. (2010a) is a connection between counting CSP and Holant problems. Cai et al. (2010b) is heavily dependent on the results obtained in Cai et al. (2011b) . Great progress has been made in counting CSP problems on general domains (Bulatov 2008; Bulatov & Dalmau 2007; Cai et al. 2011a; Dyer & Richerby 2010) .

B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Comparison of simulation models in terms of quantity and allocation of land change François Mas. Comparison of simulation models in terms of quantity and allocation of land change. Environmental Modelling and Software, Elsevier, 2015, pp.Available online Keywords: Quantity and allocation Assessment Validation Land Change Model Land use and cover change (LUCC) a b s t r a c tOur article illustrates how to compare the outputs from models that simulate transitions among categories through time. We illustrate the concepts by comparing two land change models: Land Change Modeler and Cellular Automata Markov. We show how the modeling options influence the quantity and allocation of simulated transitions, and how to compare output maps from pairs of model runs with respect to a reference map of transitions during the validation interval. We recommend that the first step is to assess the quantity of each transition and to determine the cause of the variation in quantity among model runs. The second step is to assess the allocation of transitions and to determine the cause of the variation in allocation among model runs. The separation of quantity and allocation of the transitions is a helpful approach to communicate how models work and to describe pattern validation. Land Change Models can be useful tools for environmental and geomatics research concerning land use and cover change (LUCC) . The simulation maps obtained from LUCC models help us to understand, forecast and anticipate the future evolution for a variety of applied environmental problems. One of the most important challenges is to clarify the validity of the outputs from the models.. A study area's rate and pattern of LUCC can influence a simulation's accuracy. If the real transitions among land categories constitute a small portion of the study area, then it can be difficult to predict the changes accurately, especially when the data have errors (Pontius et al., 2008; Pontius and Petrova, 2010) . Furthermore, if the changes during the calibration interval are not stationary with the changes during the validation interval, then an extrapolation from the calibration interval to the validation interval will probably have systematic errors (Pontius and Neeti, 2010) . Moreover, land changes involve complex processes that are shaped by dynamic, non-linear human-nature interactions, which can be difficult for available variables and algorithms to capture (P erez- Vega et al., 2012; Kolb et al., 2013) .. The choice of the model is a subject of debate concerning the validation of models (Villa et al., 2007; Paegelow and Camacho Olmedo, 2008; Pontius et al., 2008; Fuller et al., 2011; Mas et al., 2011; Wang and Mountrakis, 2011; Sinha and Kumar, 2013) . Some research attempts to test whether one model is more accurate than another model. However, a single model can create various outcomes depending on how the user chooses the model's parameters. If the choice of the parameters within a single model produces greater variation in accuracy than the choices among alternative models, then it makes little sense to report that one model is more accurate than another model (Pontius and Malanson, 2005) . Model comparison can be challenging, because each model offers a variety of choices at each stage in a modeling application.. Our article concerns how to compare the outputs from models that simulate transitions among categories over time. We illustrate the concepts by comparing two models in the Selva version of the Idrisi software (Clark Labs 2006 Eastman, 2009 ). The models are Land Change Modeler (LCM) and Cellular Automata Markov (CA_MARKOV). For a comparison between the two models and also with other models, see Paegelow and Camacho Olmedo (2008) and Mas et al. (2014) . For applications of LCM, see Aguejdad and Houet (2008) , Dang Khoi and Murayama (2010), Fuller et al. (2011) and Sangermano et al. (2012) . For applications of CA_MARKOV, see Paegelow and Camacho Olmedo (2005) , Shirley and Battaglia (2008) , Kamusoko et al. (2009) , Mobaied et al. (2011 ), Behera et al. (2012 , Memarian et al. (2012) and Nejadi et al. (2012) . Our goals are to show: (1) how the modeling options influence the quantity and allocation of simulated changes, and (2) how to compare output maps from pairs of model runs with respect to a reference map of change during the validation interval. We recommend that the first step to validate the output of a land change model is to assess the quantity of each transition, meaning the sizes of areas of the temporal changes. Users must understand the reference transitions during the calibration and validation intervals. Then users must understand how the method for extrapolation of the quantity of each transition works. In our case study, the reference change during the calibration interval accelerated during the validation interval. Therefore, the extrapolation showed less than the reference change during validation interval. Our recommended second step to validate the outputs among land change models is to assess the variation in the allocation of changes and to determine the cause of the variation. In our case study, the 5 Â 5 spatial filter made the output map from CA_MARKOV fundamentally different than the other two modeling approaches. The 5 Â 5 spatial filter causes the gain of a category to occur near where the category already existed. The other two models did not have this characteristic. The assessment of quantity and allocation of change is a helpful framework to learn how models work, and to communicate pattern validation.

O O O O O O O B I I O O O O O O O O O O O O B I I O O O O O O O O O O O O B I I B B B I I B I I I I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O B I I I I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O B I I O O O O O O O O O O O O O O O B


ANTICIPATED FUNCTION SYNCHRONIZATION WITH UNKNOWN PARAMETERS OF DISCRETE-TIME CHAOTIC SYSTEMS In this paper, firstly, the control problem for the chaos synchronization of discrete-time chaotic (hyperchaotic) systems with unknown parameters are considered. Next, backstepping control law is derived to make the error signals between drive 2D discrete-time chaotic system and response 2D discrete-time chaotic system with two uncertain parameters asymptotically synchronized. Finally, the approach is extended to the synchronization problem for 3D discrete-time chaotic system with two unknown parameters. Numerical simulations are presented to show the effectiveness of the proposed chaos synchronization scheme. Since the discovery of chaos synchronization by Pecora and Carroll, 1 there have been tremendous interests in studying the synchronization of various chaotic systems, see Refs. 2-27 and the references therein. The idea of synchronization is to use the output of the drive system to control the response system so that the output of the response system follows the output of the drive system asymptotically. In the literature, various synchronization schemes, such as variable structure control, 2 OGY method, 3 parameters adaptive control, 4,5 observer-based control, 6 active control, 7 time-delay feedback approach, 8 backstepping design technique, 9,10 and so on, have been successfully applied to the chaos synchronization. The backstepping method has become one of the most important approaches for design of nonlinear systems in recent years. The aim of this paper is to study the global chaos synchronization of discretetime chaotic system based on backstepping control law and Chen.. 26,27 Backstepping design [11] [12] [13] [14] has become a systematic and powerful method for the construction of both feedback controllers and associated Lyapunov functions. Strong properties of global or local stability and tracking are built into the nonlinear system in a number of steps, which is never higher than the system order. The design method has been applied to investigate control and synchronization of many continuous-time dynamical systems. Backstepping scheme plays different forms in continuous-time and discrete-time dynamical systems. [15] [16] [17] Until now, some articles have been reported to extend the backstepping design to deduce some proper controllers to investigate chaos control and synchronization in some discrete-time dynamical systems. Based on the backstepping design method, we present a systematic and automatic algorithm to investigate simultaneously anticipated function synchronization (AFS) between the discrete-time drive system and response system with strict-feedback form via a scalar controller. With the aid of symbolic-numeric computation, the proposed scheme is used to discrete-time chaotic systems. [18] [19] [20] [21] [22] [23] [24] [25] 27 However, these works are based on the exact knowledge of the system parameters. But in real situation, some or all of the parameters are unknown.. The organization of this article is as follows. In Sec. 2, we give a definition of AFS with unknown parameters in discrete-time systems. In Secs. 3 and 4, a synchronization scheme is applied to investigate AFS between two identical 2D and 3D discrete-time systems based on backstepping design with controllers. Moreover, we provide numerical examples to demonstrate the effectiveness of the proposed method. In summary, a synchronization scheme is presented to study AFS in discrete-time chaotic and hyperchaotic systems based on backstepping design with controllers. The scheme is applied to investigate anticipated synchronization between two identical 2D and 3D discrete-time chaotic systems with uncertain parameters. Numeric simulations are used to verify the effectiveness of our scheme.

B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Identification of AMP-activated protein kinase targets by a consensus sequence search of the proteome Background: AMP-activated protein kinase (AMPK) is a heterotrimeric serine/threonine protein kinase that is activated by cellular perturbations associated with ATP depletion or stress. While AMPK modulates the activity of a variety of targets containing a specific phosphorylation consensus sequence, the number of AMPK targets and their influence over cellular processes is currently thought to be limited. Maintenance of cellular health requires the orchestration of multiple metabolic pathways and signaling cascades whose effects sum to maintain cellular homeostasis. AMP-activated protein kinase (AMPK) has emerged as a major regulator of cellular metabolism through activation of signaling cascades that are protective against stress. AMPK is composed of three subunits (α, β, and γ), and its activation occurs via AMP-dependent and -independent mechanisms leading to phosphorylation of the α subunit at Thr172. While elevation of the AMP: ATP ratio promotes AMP binding to the γ subunit, which permits activation by LKB1, Ca 2+ influx elicits activation by CaMKKβ independent of the AMP: ATP ratio [1] [2] [3] . In addition to Thr172 phosphorylation a variety of posttranslational modifications including phosphorylation at sites other than Thr172 as well as myristolation of the β subunit can control AMPK activation [4] .. Once activated, AMPK initiates an array of signaling cascades by phosphorylating proteins with a βϕβXXXS/ TXXXϕ consensus sequence (hydrophobic, φ = M, L, I, F, or V; basic, β = R, K, or H, X = any amino acid, S/T = phosphorylation site) [5, 6] . AMPK targets often contain slight variants of this consensus sequence, because AMPK can phosphorylate sites flanked by amino acid sequences lacking the basic residues in the −4/-6 positions. Additionally, the −5 hydrophobic residue may be shifted to the −4 position [7] . Understanding how AMPK exerts its protective effects via various signaling pathways requires knowledge of all of AMPK targets, which may be more extensive than currently recognized. To explore this possibility, we mapped its phosphorylation consensus sequence to both human and mouse proteomes. Delineation of AMPK networks involved integration of these data into Gaggle software to organize putative targets based on function. Along with knowledge gained from an extensive literature review, networks were constructed and then used to predict pathways linking the putative targets [8] . This approach yielded an extraordinarily large group of putative AMPK targets and suggested several novel pathways. The predicted pathways from this approach have the potential to redefine the role of AMPK as a survival master switch responding to stress imposed on the cell.

O O O O O O O O O O O O O B O O O O B O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O B I I O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O B I I O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O


Platform-Based Design for the Low Complexity and High Performance De-Interlacing System SUMMARY With the development of digital TV system, how to display the NTSC signal in digital TV system is a problem. De-interlacing is an algorithm to solve it. In previous papers, using motion compensation (MC) method for de-interlacing needs lots of computation complexity and it is not easy to implement in hardware. In this paper, a content adaptive de-interlacing algorithm is proposed. Our algorithm is based on the motion adaptive (MA) method which combines the advantages of intra-field and inter-field method. We propose a block type decision mechanism to predict the video content instead of a blind processing with MC method throughout the entire frame. Additionally, in intra-field method, we propose the edge-base adaptive weight average (EAWA) method to achieve a better performance and smooth the edge and stripe. In order to demonstrate our algorithm, we implement the de-interlacing system on the DSP platform with thorough complexity analysis. Compared to MC method, we not only achieve higher video quality in objective and subjective view, but also consume lower computation power. From the profiling on CPU runtime analysis, the proposed algorithm is only one-fifth of MC method. At the DSP demonstration board, the saving ratio is about 54% to 96%. key words: de-interlace, de-interlacing, intra-field interpolation method, inter-field interpolation method, motion adaptive method, motion compensation method De-interlacing converts interlaced video sequences into progressive ones for displaying on progressive devices such as LCD, progressive CRT, and projection TV. It is a picture format conversion from interlaced to progressive picture, and has been widely used to reduce the visual effects on those artefacts. It is developed to recover all the defects appearing in the interlaced to progressive conversion.. Various de-interlacing techniques have been proposed in last few decades. Those can be categorized into two categories: intra-field method and inter-field method. The intrafield method [1] - [5] is used with spatial filtering method and edge-directional interpolation method such as "Edge Line Average "(ELA) [2] , one of well-known spatial domain interpolation technique. Chang [3] proposed an extended intelligent edge-based line average method which finds the dominant edge to avoid the wrong interpolated value from background area. In [4] , a directional interpolation instead of the traditional ELA is used to enhance the performance. The similar idea is used in [5] for the field-sequential stereoscopic video usage. In [6] , an edge-dependent interpolation method with dedicated consideration on edge patterns is proposed. The advantages of intra-field methods are low computational complexity and hardware cost. The inter-field methods include motion adaptive filtering and motion compensation. The first inter-field method is developed to merge the two fields into a frame. Until 1999, Sugiyama [7] used motion compensation (MC) for de-interlacing. MC is applied to the temporal correlation of video sequence and find the most similar pixel from the neighbourhood fields to be interpolated. Kwon [8] also used MC method for de-interlacing and even used half pixel accuracy to refine the motion vector. Chang [9] proposed a same parity four field local MC de-interlacing method to utilize the characteristic of interlaced video on motion estimation. Although MC method can achieve better deinterlacing quality, it needs a motion estimation engine and consumes a lot of computation power. Consequently, the computational complexity and hardware cost are the main concerns in MC de-interlacing algorithm.. Currently, motion adaptive method (MA) [10] - [14] is treated as one of inter-field methods and the main stream of the de-interlacing method. Motion adaptive method relies on accurate motion detection [11] . Some inter-field methods even use motion compensation to find the similar block from neighbour field, consequently it needs more computation power and requires a motion estimation engine. In MA method, motion detection plays an important role to combine intra-field method and inter-field method; but how to perform accurate motion detection is the key point.. De-interlacing technique is certainly quality-oriented, but it is also necessary to consider the complexity and implementation issue. To enhace the video quality, many algorithms are intuitively constructed based on MC method. Although the block moving information is actually reliable for recovering the video, exhaustive motion estimation/compensation consumes enormous computation power. Recently, the de-interlacing designs are realized as a single chip with ASIC approach [15] , [16] . Some of them even accomplish the de-interlacing engine as a high complexity design. In recent trends, the displaying IC should be an integrated system and de-interlacing engine is only a component of it. How to reduce the de-interlacing complexity and cost but still maintain the video quality is very crucial. In point of a displaying system, a platform-based design for de-interlacing issue should be more valuable, especially for the requirements of low cost and easy implementation on consumer application.. In this paper, we propose a novel content adaptive Since few literatures explored the de-interlacing design including both the algorithm and hardware level perspectives, in this paper a content adaptive de-interlacing technique is presented in detail. In our algorithm, it includes several efficient techniques, especially for EAWA and block type decision. EAWA is a novel intra-field method. Compared with traditionally ELA, we can detect the edge more accurately, and thus it is more adaptive for texture area. Block type decision is the other important idea in our proposed algorithm. With this mechanism, we can precisely classify the inter-or intra-field method without the blind motion estimation on every pixel. This paper presents a comprehensive description on the proposed algorithm and also provides complete numerical data for comparisons. Not only the subjective view, but also the objective evaluation is provided. Experimental results show that we can save large computational complexity and also get higher video quality than other methods. Referring to the design on platformbased system, we apply several optimization techniques to enhance the system performance.

O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B B B I I B I I B I I B I I B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O B I I O O O O O O O O O O O O O O O O O B O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


A Configurable Logic Architecture for Dynamic Hardware/Software Partitioning In previous work, we showed Dynamic software optimization is becoming an increasingly popular method of improving software performance and power. In dynamic optimization, a user executes a standard binary program on a processor system. The processor system itself then monitors the executing binary, detects the frequently executed kernels, and optimizes those kernels. Existing optimizations include dynamic recompilation and caching of previous binary translation results [3] [12] [18] . Dynamic optimizations can be carried out by extra tasks sharing the processor and/or by extra hardware.. One advantage of dynamic optimization is that dynamic optimization fits seamlessly into traditional software design flows, requiring no special desktop tools and no special profiling step. While designers familiar with hardware design flows may not mind an extra tool or profiling step, the vast majority of software design flows are solidly established and not open to such changes. Further advantages include that dynamic optimization can be based on real runtime data, large amounts of such data, and changing runtime data, all of which represent additional benefits compared to desktop-based optimization. A drawback is that the optimization algorithms may have to be less powerful than desktop algorithms. Nevertheless, dynamic optimizations continue to increase in popularity.. Current dynamic software optimizations typically exhibit performance and power improvements on the order of 10-20%. However, with the advent of single-chip platforms having both microprocessors and configurable logic on the same chip, like Triscend's E5 and A7 [29] platform, Altera's Excalibur [1] , Atmel's Field Programmable System Level Integrated Circuit (FPSLIC) [2] , and Xilinx's Virtex-II Pro [33] , a far more powerful optimization has become possible. Re-implementing the software kernels as a hardware coprocessor on the configurable logic, known as hardware/software partitioning, can result in overall software speedups of 200%-1000% [4] [9] [10] [11] [17] [30] , as well as reducing system energy [15] [16] [26] [31] .. Until recently, hardware/software partitioning has only been implemented as a desktop CAD tool, typically incorporated into a software compiler that partitions high-level code, like C or C++. Recently, we showed [27] that desktop hardware/software partitioning could be done starting from binaries rather than from high-level code, with competitive resulting performance and energy. Additionally, a recently introduced commercial tool performs coprocessor synthesis from standard software binaries [8] . Binary-level partitioning approaches can produce excellent results by using decompilation techniques to retrieve most of the high-level information typically lost at the binary level [7] . Such binary-level partitioning opens the door to dynamic hardware/software partitioning, in which an executing binary is dynamically optimized by moving software kernels to configurable logic -a process we call warp processing, since performance and energy are automatically warped during software execution.. Given the critical kernels of an application, dynamic partitioning requires decompilation, compiler optimization, behavioral synthesis, logic synthesis, and finally placement and routing onto a configurable logic architecture. While implementing all those tools on-chip for dynamic execution on a lean processor may at first sound absurd given the long computation times and huge resource usage of those tools' desktop counterparts, we have previously shown the feasibility of implementing many such tools on-chip [20] [21] [25] . The key is to recognize that dynamic tools need only focus on speeding up kernels, which typically consist of only a few dozen lines of code and result in hardware consisting of only 10,000 to 30,000 gates. Furthermore, dynamic tools map to only one target technology. In contrast, desktop tools must handle much bigger designs and must be much more general.. In [25] , we presented the benefits and feasibility of dynamic partitioning using prototype tools, executing on a lean embedded processor and producing good results for a number of popular embedded system benchmarks. However, our earlier work in dynamic hardware/software partitioning used a very basic configurable logic architecture as a proof-of-concept. That architecture only supported combinational logic, could only implement loops with sequential memory accesses, and incurred a large routing overhead. Nevertheless, place and route was still the most computationally expensive step (as is also true using desktop tools) in dynamic partitioning -an order of magnitude more expensive than all the other steps combined. Therefore, we set out to design a new configurable logic architecture and underlying configurable logic fabric, along with a modified place and route algorithm, that together would support a much larger range of benchmarks while requiring reasonable computation time and memory resources.. In this paper, we present our warp configurable logic architecture (WCLA) for dynamic hardware/software partitioning, specifically targeted at speeding up critical loops of embedded systems applications. We did so in part by evaluating digital signal processors (DSP) and incorporating into our architecture features from the DSP domain specifically designed at increasing loop performance, such as data address generators and loop control hardware. Additionally, we analyzed potential architectural features of our configurable logic architecture with regards to the impacts on place and route tools.. In this paper, we summarize related work, introduce our WCLA, and provide results comparing our tools and architecture to a commercial tool and configurable logic, showing that we obtain similar speedups and energy savings, yet use orders of magnitude less runtime, data memory, and code memory. Dynamic hardware/software partitioning represents a far more powerful dynamic optimization than currently proposed dynamic software optimizations, the former achieving 200%-400% performance improvements rather than the typical 10%-20% of the latter -with greater improvements easily possible by partitioning more than one loop. The hardest step of dynamic partitioning is placing and routing onto a configurable logic fabric. We have simultaneously designed a new configurable logic architecture and simple configurable logic fabric along with accompanying place and route algorithms specifically intended for dynamic partitioning. Our architecture includes data address generators for accessing up to three distinct arrays in memory, loop control hardware to control loop iterations, a 32-bit multiplier-accumulator, and a configurable logic fabric with simple combinational logic blocks and routing resources. We have shown that our architecture, fabric, and accompanying algorithms result in place and route that is 50 times faster than commercial tools, using 10,000 times less data memory and 1,000 times less code memory, and running in a reasonable time of just a few seconds on a small embedded microprocessor. Yet, we also showed that our architecture and lean tools still obtain comparable speedups to commercial configurable logic and tools, with an average software speedup of 2.1 and energy savings of 33% when partitioning even just one loop -speedups and savings will be even more when additional loops are considered. We are continuing to improve our architecture, fabric, and tool set, to handle a larger set of applications. We compare a dynamic hardware/software partitioning using our WCLA with a typical hardware/software partitioning approach targeting a Xilinx Virtex-E FPGA, comparing speedup and energy reduction for 13 embedded systems benchmarks from NetBench, MediaBench, EEMBC, and Powerstone. Our experimental framework consists of an ARM7 processor executing at 75 MHz coupled with either our WCLA or a Xilinx Virtex-E series FPGA. Furthermore, our WCLA executes at a fixed frequency of 60 MHz due to the current implementation of our MAC and DADG, while . the FPGA executes at the highest frequency possible for each design when synthesized and mapped using Xilinx ISE 4.1 [33] .. For each benchmark, we determined the single most critical loop and partitioned the critical loop to hardware either using our ROCPAR or synthesizing a custom VHDL implementation of the critical loop. While partitioning a single critical loop produces good results, the speedups would be even greater if we considered multiple loops. Figure 3 and Figure 4 highlight the speedup and energy reduction of our WCLA and the Xilinx FPGA for all 13 benchmarks. In determining speedups of the two approaches, all software execution times were determined using the SimpleScalar simulator [5] ported for the ARM instruction set. Additionally, we determined execution times for the hardware implementations using a high-level simulator for our configurable logic architecture and using VHDL simulations with the appropriate clock frequency for each implementation determined during synthesis. We calculated the energy required for each partitioned application using the equations in Figure 5 . We used the Xilinx Virtex Power Estimator along with information provided by Xilinx ISE to determine total power consumed by the FPGA when active as well as the overall static power. The approach used by the Xilinx Power Estimator consists of providing information including the number of LUTs, number of flip-flops, average switching within the FPGA, and clock frequency to determine the power consumed by the FPGA. We implemented a similar estimation approach to determine the power consumed by our WCLA. We implemented a small version of our configurable logic architecture in VHDL and synthesized the design using Synopsys Design Compiler targeting the UMC 0.18 µm technology library provided by Artisan Components. Using gatelevel simulations, we determined the power consumed by individual components within our configurable logic architecture.. Although our WCLA is much simpler than the Xilinx FPGA, on average our WCLA achieved a speedup of 2.1 with an average energy reduction of 33.1%. These results are very close to the average speedup of 2.2 and energy reduction of 36.2% achieved using a Xilinx FPGA. We initially thought that while our configurable logic architecture would not produce results better than a general FPGA, our configurable logic architecture should result in less overall energy consumption compared with an FPGA. However, for several benchmarks, including tblook, ttsprk, matrix01, and idctrn01, our WCLA had a higher energy consumption than the Xilinx FPGA. We determined that for matrix01 and idctrn01, the high energy consumption was mainly caused by the use of our embedded multiplier, which has a higher energy consumption than the dedicated multiplier support within the Xilinx FPGA. Additionally, all four benchmarks had large energy consumption resulting from a large usage of routing resources, indicating the need to develop new place and route algorithms that can run on-chip environment while producing good results -a task we are working on.. We also evaluated our ROCPAR tools, comparing them with Xilinx ISE 4.1. Table 2 displays the average data memory usage and code size in kilobytes and the average execution times in seconds of Xilinx ISE and ROCPAR executing on a 1.4 GHz Pentium workstation. Table 2 also displays execution time in seconds for ROCPAR executing on a 75 MHz ARM7 processor. On average, executing our simplified tools in an embedded environment requires less than 2 seconds, which is quite feasible. Furthermore, the maximum data memory required was on average less than 10 kilobytes. While Xilinx ISE was never designed to execute on-chip, the large data memory requirements indicate that the algorithms and data structures used by these tools are not suitable for on-chip execution either. Thus, new synthesis, technology mapping, and place and route tools are required for a dynamic hardware/software partitioning approach. Many configurable logic architectures have been developed to increase embedded software performance. These approaches use Field-Programmable Gate Arrays (FPGAs), reconfigurable computing, or even custom ASIC processors to achieve improvements in software execution. Existing approaches for improving embedded software performance can be classified as general (FPGAs), fine-grained configurable systems, coarsegrained configurable system, and custom ASIC processors.. Many techniques have been proposed for hardware/software partitioning. One common method for implementing hardware in such an approach is using traditional commercially available FPGAs. However, traditional FPGAs are not well suited for use in dynamic hardware/software partitioning. Traditional FPGAs are typically designed to handle an extremely wide variety of designs and are frequently used to prototype ASIC circuits. To support these vastly different designs, FPGA vendors, such as Xilinx [33] and Altera [1] , design FPGAs with complex logic cells having embedded sequential components, large routing resources, large input/output resources, capabilities to support sequential logic, etc. However, in a dynamic hardware/software partitioning approach, traditional FPGAs provide more capabilities than are needed. A configurable logic architecture for implementing critical loops typically has a very simple interface to the main processor and memory and thus does not require general input/output capabilities of traditional FPGAs. Critical loops often consist of simple combinational logic or small sequential circuits and thus do not require large numbers of logic cells. Furthermore, due to their complexity, traditional FPGAs require complex synthesis, technology mapping, and place and route tools, which are not targeted for very fast execution.. Many researchers have developed techniques using FPGAs or fine-grained configurable logic in ways to improve software performance through partitioning. DISC is a run-time configurable system that dynamically swaps in hardware regions into an FPGA when needed during software execution [32] . Chimaera is a similar approach that uses an FPGA as a coprocessor tightly integrated into a processor's datapath [13] . The Garp project couples an extended MIPS processor with a reconfigurable coprocessor under direct control of the software executing on the processor [14] . Although fine-grained configurable systems have shown very good speedups, their use in a dynamic hardware/software partitioning is limited by their reliance upon complex FPGA architectures. Furthermore, with respect to improving performance of critical loops, approaches that tightly integrate the configurable logic within the datapath are not able to eliminate loop overhead, consisting of branches, comparisons, and memory address calculations.. Other approaches for increasing embedded software performance rely upon coarse-grained configurable logic architecture. MorphoSys is a reconfigurable computing platform that incorporates a RISC processor with an array of reconfigurable processing components [19] . The configurable components are coarse-grained ALU-like components that perform operations including two-operand logic functions, arithmetic functions, and multiply-accumulate.. For accelerating the execution of critical software loops, coarse-grained configurable logic architectures are limited in the number of applications that can be mapped to them. To overcome the limitations of coarse-grained configurable logic, some approaches have proposed using heterogeneous configurable logic consisting of coarse-grained units along with fine-grained configurable logic. The Chameleon [24] project and the Pleiades [31] project both propose using heterogeneous configurable logic in conjunction with a general-purpose processor. These approaches benefit from using custom designed coarse-grained units to handle commonly used operations while supporting custom operations, such as bit manipulation, using an FPGA. However, we cannot include coarse-grained functional units to support all operations frequently found within critical loops. Hence, in developing a configurable logic architecture for warp processing, specifically targeting speeding up critical loops, we must carefully analyze the possible inclusion of any coarsegrained units.. Tensilica has developed the Xtensa architecture that allows designers to customize the Xtensa processor by adding custom instructions using the Tensilica Instruction Extension (TIE) language [28] . After describing the newly added instructions, a designer is provided with a synthesizable description of the extended processor along with the associated software development tools. However, for optimizing the performance of critical software loops within embedded applications, the Xtensa processor suffers from the same drawbacks of tightly integrated fine-grained configurable logic approaches.

O B I O O O B I O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O B O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O B I O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O B I O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O B I O O O B I O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O B I I O O O O O O B I O O B I O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O B I I O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O B I O O O O O O B I O O O O O O O B I O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O


Data Structures on Event Graphs Abstract. We investigate the behavior of data structures when the input and operations are generated by an event graph. This model is inspired by Markov chains. We are given a fixed graph G, whose nodes are annotated with operations of the type insert, delete, and query. The algorithm responds to the requests as it encounters them during a (random or adversarial) walk in G. We study the limit behavior of such a walk and give an efficient algorithm for recognizing which structures can be generated. We also give a near-optimal algorithm for successor searching if the event graph is a cycle and the walk is adversarial. For a random walk, the algorithm becomes optimal. In contrast with the traditional adversarial assumption of worst-case analysis, many data sources are modeled by Markov chains (e.g., in queuing, speech, gesture, protein homology, web searching, etc.). These models are very appealing because they are widely applicable and simple to generate. Indeed, locality of reference, an essential pillar in the design of efficient computing systems, is often captured by a Markov chain modeling the access distribution. Hence, it does not come as a surprise that this connection has motivated and guided much of the research on self-organizing data structures and online algorithms in a Markov setting [1, [7] [8] [9] [10] [11] [15] [16] [17] [18] . That body of work should be seen as part of a larger effort to understand algorithms that exploit the fact that input distributions often exhibit only a small amount of entropy. This effort is driven not only by the hope for improvements in practical applications (e.g., exploiting coherence in data streams), but it is also motivated by theoretical questions: for example, the key to resolving the problem of designing an optimal deterministic algorithm for minimum spanning trees lies in the discovery of an optimal heap for constant-entropy sources [2] . Markov chains have been studied intensively, and there exists a huge literature on them (e.g., [12] ). Nonetheless, the focus has been on state functions (such as stationary distribution or commute/cover/mixing times) rather than on the behavior of complex objects evolving over them. This leads to a number of fundamental questions which, we hope, will inspire further research.. Let us describe our model in more detail. Our object of interest is a structure T (X) that evolves over time. The structure T (X) is defined over a finite subset X of a universe U. In the simplest case, we have U = N and T (X) = X. This corresponds to the classic dictionary problem where we need to maintain a subset of a given universe. We can also imagine more complicated scenarios such as U = R d with T (X) being the Delaunay triangulation of X. An event graph G = (V, E) specifies restrictions on the queries and updates that are applied to T (X). For simplicity, we assume that G is undirected and connected. Each node v ∈ V is associated with an item x v ∈ U and corresponds to one of three possible requests: (i) insert(x v ); (ii) delete(x v ); or (iii) query(x v ). Requests are specified by following a walk in G, beginning at a designated start node of G and hopping from node to neighboring node. We consider both adversarial walks, in which the neighbors can be chosen arbitrarily, and random walks, in which the neighbor is chosen uniformly at random. The latter case corresponds to the classic Markov chain model. Let v t be the node of G visited at time t and let X t ⊆ U be the set of active elements, i.e., the set of items inserted prior to time t and not deleted after their last insertions. We also call X t an active set. For any t > 0, X t = X t−1 ∪ {x v t } if the operation at v t is an insertion and X t = X t−1 \ {x v t } in the case of deletion. The query at v depends on the structure under consideration (successor, point location, ray shooting, etc.). Another way to interpret the event graph is as a finite automaton that generates words over an alphabet with certain cancellation rules.. Markov chains are premised on forgetting the past. In our model, however, the structure T (X t ) can remember quite a bit. In fact, we can define a secondary graph over the much larger vertex set V ×2 U |V , where U |V = {x v | v ∈ V } denotes those elements in the universe that occur as labels in G, see Fig. 1 . We call this larger graph the decorated graph, dec(G), since the way to think of this secondary graph is to picture each node v of G being "decorated" with the subsets X ⊆ U |V . (We define the vertex set using 2 U |V in order to allow for every possible initial subset X.) Let n be the number of nodes in G. Since |U |V | ≤ n, an edge (v, w) in the original graph gives rise to up to 2 n edges (v, X)(w, Y ) in the decorated graph, with Y derived from X in the obvious way. A trivial upper bound on the number of states is n2 n , which is essentially tight. If we could afford to store all of dec(G), then any of the operations at the nodes of the event graph could be precomputed and the running time per step would be constant. However, the required space might be huge, so the main question is Can the decorated graph be compressed with no loss of performance?. This seems a difficult question to answer in general. In fact, even counting the possible active sets in decorated graphs seems highly nontrivial, as it reduces to counting words in regular languages augmented with certain cancellation rules. Hence, in this paper we focus on basic properties and special cases that highlight the interesting behavior of the decorated graph. Beyond the results themselves, the main contribution of this work is to draw the attention of algorithm designers to a more realistic input model that breaks away from worst-case analysis.. Our Results. The paper has two main parts. In the first part, we investigate some basic properties of decorated graphs. We show that the decorated graph dec(G) has a unique strongly connected component that corresponds to the limiting phase of a walk on the event graph G, and we give characterizations for when a set X ⊆ U |V appears as an active set in this limiting phase. We also show that whether X is such an active set can be decided in linear time (in the size of G).. In the second part, we consider the problem of maintaining a dictionary that supports successor searches during a one-dimensional walk on a cycle. We show how to achieve linear space and constant expected time for a random walk. If the walk is adversarial, we can achieve a similar result with near-linear storage. The former result is in the same spirit as previous work by the authors on randomized incremental construction (RIC) for Markov sources [3] . RIC is a fundamental algorithmic paradigm in computational geometry that uses randomness for the construction of certain geometric objects, and we showed that there is no significant loss of efficiency if the randomness comes from a Markov chain with sufficiently high conductance.. 1. An event graph over four vertices and the associated decorated graph. Each node of the event graph is replaced by four nodes decorated with the subsets of {1, 2}. We have presented a new approach to model and analyze restricted query sequences that is inspired by Markov chains. Our results only scratch the surface of a rich body of questions. For example, even for the simple problem of the adversarial walk on a path, we still do not know whether we can beat van Emde Boas trees with linear space. Even though there is some evidence that the known lower bounds for successor searching on a pointer machine give the adversary a lot of leeway [14] , our lower bound technology does not seem to be advanced enough for this setting. Beyond paths and cycles, of course, there are several other simple graph classes to be explored, e.g., trees or planar graphs.. Furthermore, there are more fundamental questions on decorated graphs to be studied. For example, how hard is it to count the number of distinct active sets (or the number of nodes) that occur in the unique sink component of dec(G)? What can we say about the behaviour of the active set in the limit as the walk proceeds randomly? And what happens if we go beyond the dictionary problem and consider the evolution of more complex structures during a walk on the event graph?

O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Heterogeneous Database Integration in Biomedicine The rapid expansion of biomedical knowledge, reduction in computing costs, and spread of internet access have created an ocean of electronic data. The decentralized nature of our scientific community and healthcare system, however, has resulted in a patchwork of diverse, or heterogeneous, database implementations, making access to and aggregation of data across databases very difficult. The database heterogeneity problem applies equally to clinical data describing individual patients and biological data characterizing our genome. Specifically, databases are highly heterogeneous with respect to the data models they employ, the data schemas they specify, the query languages they support, and the terminologies they recognize. Heterogeneous database systems attempt to unify disparate databases by providing uniform conceptual schemas that resolve representational heterogeneities, and by providing querying capabilities that aggregate and integrate distributed data. Research in this area has applied a variety of database and knowledge-based techniques, including semantic data modeling, ontology definition, query translation, query optimization, and terminology mapping. Existing systems have addressed heterogeneous database integration in the realms of molecular biology, hospital information systems, and application portability. and healthcare system, however, has resulted in a patchwork of diverse, or heterogeneous, database implementations, making access to and aggregation of data across databases very difficult. The database heterogeneity problem applies equally to clinical data describing individual. The rapid expansion of biomedical knowledge, reduction patients and biological data characterizing our genome. Specifically, in computing costs, and spread of internet access have credatabases are highly heterogeneous with respect to the data models ated an ocean of electronic data. Today, databases around they employ, the data schemas they specify, the query languages they the world contain biomedical data ranging from the clinical support, and the terminologies they recognize. Heterogeneous database findings for an individual patient to the genetic structure of systems attempt to unify disparate databases by providing uniform conceptual schemas that resolve representational heterogeneities, and our species. Many of these systems are connected or accessiby providing querying capabilities that aggregate and integrate distribble via internet standards. In aggregate, these data encompass uted data. Research in this area has applied a variety of database information and knowledge that can significantly improve and knowledge-based techniques, including semantic data modeling, patient care, public health, basic research, and administrative ontology definition, query translation, query optimization, and termiefficiency. However, the wonderful volume and availability nology mapping. Existing systems have addressed heterogeneous data-database implementations, making access to and aggregation mammography data that are collected and stored in databases across the United States [1] . of data across implementations very difficult from a practical perspective. The practical problems of heterogeneous data-2. Horizontal integration. The composition of semantibase integration create a large gap between the potential and cally complementary data from multiple heterogeneous the realized value of electronically stored data.. sources. For example, a system that supports complex queFor example, many hospitals have information systems ries across genomic, proteinomic, and clinical information for their administrative, laboratory, pharmacy, ICU charting, sources for molecular biologists [2] [3] [4] , or a physician worksand other functions, but very few have integrated physician tation that provides a single interface to data stored in multiworkstations that allow clinicians to review data for a single ple ancillary systems [5] [6] [7] . patient across all of these functions. Also, numerous online resources now exist for molecular biologists that together 3. Integration for application portability. The standardization of access to semantically similar information at dispacharacterize the genomic, proteinomic, and clinical features of many diseases. However, most biologists must learn sevrate sources. For example, a universal database interface for decision-support applications that allows them to be shared eral different user interfaces to access and cross-reference all these data, and many types of useful information requests across institutions with no modifications to their implementations [8] . are not possible, although the data to answer them are available.. The creation of software systems to overcome these probHeterogeneous Database Systems lems may seem to be a simple matter of "programming." In actuality, very significant theoretical barriers impede the Heterogeneous database systems (HDBS) are computaintegration of heterogeneous data sources. The foremost of tional models and software implementations that provide these barriers is the representational heterogeneity of the heterogeneous database integration [9] . For example, an data themselves, that is, the differences in data models, HDBS might provide uniform access to electronic patient schemas, naming conventions, and levels of abstraction used records in a hospital computing environment that uses a to represent data that are conceptually similar. Additional MUMPS hierarchical database for storing patient demotheoretical challenges include performance optimizations for graphic data and a Sybase relational database for storing translating queries and executing them across multiple datapatient laboratory results. HDBSs are sometimes confused bases, and methods to efficiently maintain mappings among with distributed database systems (DDBSs) because both databases that are autonomously managed and frequently provide a unified view of and common interface to data that changed.. is physically stored in different locations. However, DDBSs In biomedicine and other domains, the problems of heteroare much more integrated and coordinated than are HDBSs. geneous database integration are being addressed in research Typically, the constituent databases of a DDBS implement and application environments. This paper reviews the nature the same data model and query language and run the same of heterogeneous database integration, the general methodoldistributed database management software. Also, the fragogies that researchers have pursued to overcome the probmentation of data in DDBSs is usually induced to reap the lem, and the specifics of several database-integration projefficiency and autonomy advantages of distributed computects in biomedicine.. ing. The constituent databases in HDBSs, in contrast, existed prior to the establishment of the HDBS and are coordinated much more loosely. Specifically, HDBSs have the following BACKGROUND characteristics [9]:. 1. Representational heterogeneity. The constituent dataThe process of heterogeneous database integration may bases in an HDBS may use different data models, different be defined as "the creation of a single, uniform query interquery languages, different terminologies, and different face to data that are collected and stored in multiple, heteroschema structures to represent the same real-world semangeneous databases." Several varieties of heterogeneous datatics. In other words, although the data stored at multiple base integration are useful in biomedicine.. sites may have identical real-world semantics, the data representations and the data-access methods at the sites may differ. 1. Vertical integration. The aggregation of semantically similar data from multiple heterogeneous sources. For exam-2. Local autonomy. Each constituent database has the right to control access to its own data by the HDBS and ple, a "virtual repository" that provides centralized access to it has the ability to access and manipulate its own data 5. The schemas of local database change quickly (on average of two or three times per year). The databases are independently of the HDBS. Most decisions regarding the representation and manipulation of data are made by local designed and maintained to meet local needs, and changes are made independently of the integrated database structure. database administrators to accommodate local system needs (such as functionality, performance, and cost). The member-6. Updates to local databases occur frequently, and value is placed on timely access to the newest data. ship of the database in a heterogeneous database system is incidental to the primary purpose of the database.. 3. Bottom-up integration. Whereas DDBSs induce the distribution of data that were previously integrated to achieve Query Models: A Framework for Considering efficiency benefits, HDBSs integrate data that were preHeterogeneous Database Integration viously distributed to achieve interoperability benefits. Bottom-up integration implies that the HDBS must provide an. The core of the database-integration problem is that independently developed and maintained databases are heterogeinterface to diverse, preexisting information systems without requiring extensive modifications of preexisting software.. neous with respect to their query models. Informally, a query model [8] is the model of data storage and information The goal of an HDBS is to provide database transparency retrieval that must be known to a user or database programto users and application programmers, that is, to provide a mer when she encodes the conceptual notion of an informaglobal and consistent database interface for applications, tion request into the executable commands of a formal query as if the data were not distributed and all of the database language. Query models consist of the following four commanagement systems were of the same type. HDBS research ponents: is predicated upon the belief that heterogeneity at the level 1. The abstract model of data representation that applies of constituent database systems will (and should) persist, to the database (for example, can the data be thought of as despite standardization efforts. This certainly is a realistic represented by unstructured text files, by relational tables, model for biomedical databases around the world in the or by the tree structure of a hierarchical database?); foreseeable future.. 2. The schema of the specific data that are represented in the database (for example, are the names of patients and the names of the medications taken by those patients Requirements for Heterogeneous Database Integration represented in a single file, which the query can directly It is useful to enumerate a set of requirements and assumpaccess, or are they represented in different files, which the tions to provide a context to the challenges of heterogeneous query must compare or join?); database integration. The following requirements are 3. The language for specifying queries that can be proadapted from [10] :. cessed by the database, including syntax and semantics (for example, does the database require low-level commands that 1. Database heterogeneity is here to stay, at a variety instruct it precisely where to find the names of all drugs of levels. Despite efforts and advancements in the area of associated with a patient name, or can it process high-level standards, a single model for biomedical databases will commands, such as SQL, that describe declaratively which not emerge.. patients and drugs to retrieve?); 2. Users and applications must be able to issue complex 4. The format of the data that are represented in the declarative multidatabase queries. Heterogeneous database database (for example, are the names of drugs represented systems must provide powerful and general query capabilias the full trade names used by clinicians, as the abbreviated ties that retrieve all the information pertaining to a single names used by the hospital formulary, or as the numerical object or all the objects that meet a set of search criteria. The codes used by a national drug-coding system?). capabilities should not be tied to any particular application or information need.. The task of heterogeneous database integration is to create a single "virtual" query model that encapsulates the query 3. Users and applications should not be required to know the existence, physical location, access mechanism, or models of constituent databases and allows users and programs to access data from the constituent databases using schema of the underlying local databases.. 4. Write access to local databases is not required by most this virtual model. Figure 1 illustrates the concept. All heterogeneous database systems, in biomedicine and other dousers and applications. The contents of the local databases may be maintained autonomously and locally.. mains, provide this service, although the general strategies varying number of tables. For example, the relationship between a patient and a physician may be represented in at least two ways, as shown in Fig. 2 . Alternative vertical decompositions entail different distributions of rows among one or more tables. Rows may be partitioned in certain databases across multiple tables to improve retrieval performance when most (local) queries access only a subset of all the rows. For example, the representation of inpatient and outpatient records in the database of a large hospital may be represented in at least two ways, as shown in Fig. 3 .. Because the relational model has no constructs for representing type hierarchies directly, such hierarchies may be encoded in a variety of ways in relational databases, and these encodings entail differences in the use of data and metadata. For example, the encoding of two types of serum electrolyte results, serum sodium and serum potassium, may and specific technologies that they employ differ signifibe represented in at least three ways, involving the use of cantly. sources of heterogeneity and entail differences in the distri-REPRESENTATIONAL HETEROGENEITY bution of primitive data elements across multiple fields versus concatenated in one field. Common examples include the separation or concatenation of laboratory result values The largest barrier to heterogeneous database integration and units (i.e., ͗"145 mg"͘ versus ͗"145," "mg"͘, and the is the variety with which similar data are represented in separation or concatenation of address components (i.e., different databases, i.e., representational heterogeneity. It is ͗"125 Elm St., Denver, CO 80220"͘ versus ͗"125 Elm St.," instructive to consider the several types of representational "Denver," "CO," "80220"͘). heterogeneity that schema integration techniques must resolve. The most general type of heterogeneity is that of the data models themselves. Aggregating data from relational, Naming Differences hierarchical, object-oriented, and flat file databases into a Naming differences are characterized by distinct lexical single representation is the first step in schema integration.. terms denoting the same semantic objects across database However, even if all database systems were to use the relaschemas. Naming differences may be manifested as metadata tional model, significant representational heterogeneity differences or as data differences. Metadata differences are would remain. Specifically, there exist structural differences, among the simplest forms of database heterogeneity and naming differences, semantic differences, and content differcomprise variations in the names of tables and fields, such ences. Examples of each of these differences are discussed as "Doctor" versus "Physician" or "MRN" versus "Pabelow, with examples adapted from [11] . tient ID." The difficulty with metadata naming differences is discriminating differences that are solely syntactic from differences that represent variations in semantics. For examStructural Differences ple, "MRN" versus "Patient ID" is a semantic rather than naming difference if "Patient ID" denotes the social secuStructural differences may consist of alternative table decompositions (horizontal and vertical), differences in data rity number of the patient rather than the medical record number (semantic differences are addressed in the following versus metadata representation, and differences in structured versus free-text encodings. Alternative horizontal table desection). Detecting these sometimes-subtle semantic distinctions is among the most time-consuming aspects of database compositions entail different degrees of normalization that result in the same information being distributed across a schema integration.

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