Imposing Constraints from the Source Tree on ITG Constraints for SMT In current statistical machine translation (SMT), erroneous word reordering is one of the most serious problems. To resolve this problem, many word-reordering constraint techniques have been proposed. The inversion transduction grammar (ITG) is one of these constraints. In ITG constraints, targetside word order is obtained by rotating nodes of the source-side binary tree. In these node rotations, the source binary tree instance is not considered. Therefore, stronger constraints for word reordering can be obtained by imposing further constraints derived from the source tree on the ITG constraints. For example, for the source word sequence { a b c d }, ITG constraints allow a total of twenty-two target word orderings. However, when the source binary tree instance ((a b) (c d)) is given, our proposed "imposing source tree on ITG" (IST-ITG) constraints allow only eight word orderings. The reduction in the number of word-order permutations by our proposed stronger constraints efficiently suppresses erroneous word orderings. In our experiments with IST-ITG using the NIST MT08 English-to-Chinese translation track's data, the proposed method resulted in a 1.8-points improvement in character BLEU-4 (35.2 to 37.0) and a 6.2% lower CER (74.1 to 67.9%) compared with our baseline condition. Statistical methods are widely used for machine translation. One of the popular statistical machine translation paradigms is the phrase-based model (PBSMT) (Marcu et al., 2002; Koehn et al., 2003; Och et al., 2004) . In PBSMT, errors in word reordering, especially in global reordering, are one of the most serious problems. Approaches used to resolve this problem are categorized into two types. The first type is linguistically syntax-based. In this approach, source (Quirk et al., 2005; Liu et al., 2006; Huang et al., 2006) , target (Yamada et al., 2000; Galley et al., 2006; , or both side (Melamed 2004; Ding et al., 2005) tree structures are used for model training. The second type is formal constraints on word permutations. IBM constraints (Berger et al., 1996) , lexical word reordering model (Tillmann, 2004) , and inversion transduction grammar (ITG) constraints (Wu, 1995; Wu, 1997) belong to this type of approach. Our approach is an extension of ITG constraints and is a hybrid of the first and second type of approach.. We propose "imposing source tree on ITG" (IST-ITG) constraints for directly introducing source sentence structure into our set of constraints. In IST-ITG, ITG constraints under the given source sentence tree structure are used as stronger constraints than the original ITG. For example, IST-ITG allows only eight word orderings for a four-word sentence, even though twenty-two word orderings are possible with respect of in the original ITG constraints.. In Section 2, we present the proposed IST-ITG for word-based translation. In Section 3, the proposed method is extended to phrase-based translation. In Section 4, we present a real-time decoding algorithm for IST-ITG constraints. In Section 5, we give details of the experiments and present the results. Finally, in Section 6, we offer a summary and some concluding remarks. We proposed new word reordering constraints for PBSMT using source tree structure. The proposed IST-ITG constraints are extensions of the ITG constraints. In ITG constraints, the instance of the source-side tree is not taken into account. On the other hand, in IST-ITG constraints, the tree that is obtained by source sentence parsing is imposed on the decoding process. Therefore, IST-ITG constraints are stronger than those of the original ITG. For example, for four-word source sentences, IST-ITG constraints allow eight word orderings in a target sentence compared with twenty-two orderings under the original ITG constraints. IST-ITG constraints can be applied to a common decoder to determine a target sentence from one-pass without rescoring. In our E-J patent translation experiments, the proposed method resulted in a 2.7-point improvement in BLEU and a 5.7% improvement in WER compared with those of the original ITG constraints. In this paper we have argued the WER is the most appropriate measure to gauge the effectiveness of our approach since it gives importance to the global word order. Our approach gave rise to considerable gains in term of WER in all of our experiments, indicating that a respectable improvement in global word order was achieved. The improvement could clearly be seen from visual inspection of the output, a few examples of which are presented in the following Appendix.

O O O O O O O B I O O O O B I I O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O B I O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O B I O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O B I O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Interpolation in local theory extensions Abstract. In this paper we study interpolation in local extensions of a base theory. We identify situations in which it is possible to obtain interpolants in a hierarchical manner, by using a prover and a procedure for generating interpolants in the base theory as blackboxes. We present several examples of theory extensions in which interpolants can be computed this way, and discuss applications in verification, knowledge representation, and modular reasoning in combinations of local theories. Many problems in mathematics and computer science can be reduced to proving satisfiability of conjunctions of (ground) literals modulo a background theory. This theory can be a standard theory, the extension of a base theory with additional functions, or a combination of theories. It is therefore very important to find efficient methods for reasoning in standard as well as complex theories. However, it is often equally important to find local causes for inconsistency. In distributed databases, for instance, finding local causes of inconsistency can help in locating errors. Similarly, in abstraction-based verification, finding the cause of inconsistency in a counterexample at the concrete level helps to rule out certain spurious counterexamples in the abstraction.. The problem we address in this paper can be described as follows: Let T be a theory and A and B be sets of ground clauses in the signature of T , possibly with additional constants. Assume that A ∧ B is inconsistent with respect to T . Can we find a ground formula I, containing only constants and function symbols common to A and B, such that I is a consequence of A with respect to T , and B ∧ I is inconsistent modulo T ? If so, I is a (Craig) interpolant of A and B, and can be regarded as a "local" explanation for the inconsistency of A ∧ B.. In this paper we study possibilities of obtaining ground interpolants in theory extensions. We identify situations in which it is possible to do this in a hierarchical manner, by using a prover and a procedure for generating interpolants in the base theory as "blackboxes". We presented a method for obtaining simple interpolants in theory extensions. We identified situations in which it is possible to do this in a hierarchical manner, by using a prover and a procedure for generating interpolants in the base theory as "black-boxes". This allows us to use the properties of T 0 (e.g. the form of interpolants) to control the form of interpolants in the extension T 1 . We discussed applications of interpolation in verification and knowledge representation.. The method we presented can be applied to a class of theories which is more general than that considered in McMillan [8] (extension of linear rational arithmetic with uninterpreted function symbols). Our method is orthogonal to the method for generating interpolants for combinations of theories over disjoint signatures from Nelson-Oppen-style unsatisfiability proofs proposed by Yorsh and Musuvathi in [19] , as it allows us to consider combinations of theories over non-disjoint signatures.. The hierarchical interpolation method presented here was in particular used for efficiently computing interpolants in the special case of the extension of linear arithmetic with free function symbols in [11] ; the algorithm we used in that paper (on which an implementation is based) differs a bit from the one presented here in being tuned to the constrained based approach used in [11] . The implementation was integrated into the predicate discovery procedure of the software verification tools Blast [4] and ARMC [10] . First tests suggest that the performance of our method is of the same order of magnitude as the methods which construct interpolants from proofs, and considerably faster on many examples. In addition, our method can handle systems which pose problems to other interpolation-based provers: we can handle problems containing both strict and nonstrict inequalities, and it allows us to verify examples that require predicates over up to four variables. Details about the implementation and benchmarks for the special case of linear arithmetic + free function symbols are described in [11] .. Although the method we presented here is based on a hierarchical reduction of proof tasks in a local extension of a given theory T 0 to proof tasks in T 0 , the results presented in Section 5 (in particular the separation technique described in Proposition 5.7) and in Section 6 also hold for non-purified formulae (i.e. they also hold if we do not perform the step of introducing new constant names c f (d) for the ground terms f (d) which occur in the problem or during the separation process). Depending on the properties of T 0 , techniques for reasoning and interpolant generation in the extension of T 0 with free function symbols e.g. within state of the art SMT solvers can then be used. We can, therefore, use the results in Sections 5 and 6 to extend in a natural way existing methods for interpolant computation which take advantage of state of the art SMT technology (cf. e.g. [3] ) to the more complex types of theory extensions with sets of axioms of type (5.1) we considered here.. An immediate application of our method is to verification by abstraction-refinement; there are other potential applications (e.g. goal-directed overapproximation for achieving faster termination, or automatic invariant generation) which we would like to study. We would also like to analyze in more detail the applications to reasoning in complex knowledge bases. Appendix A. Amalgamation and interpolation. There exist results which relate ground interpolation to amalgamation or the injection transfer property [5, 2, 18] and thus allow us to recognize many theories with ground interpolation. If Π = (Σ, Pred) is a signature and A, B are Π-structures, we say that: • a map h : A ֒→ B is a homomorphism if it preserves the truth of positive literals, i.e.. has the property that if f A (a 1 , . . . , a n ) = a then f B (h(a 1 ) , . . . , h(a n )) = h(a), and if P A (a 1 , . . . , a n ) is true then P B (h(a 1 ), . . . , h(a n )) is true.. • a map i : A ֒→ B is an embedding if it preserves the truth of both positive and negative literals, i.e. P A (a 1 , . . . , a n ) is true (in A) if and only if P B (i(a 1 ), . . . , i(a n )) is true (in B) for any predicate symbol, including equality. Thus, an embedding is an injective homomorphism which also preserves the truth of negative literals.. Definition A.1. Let Π = (Σ, Pred) be a signature, and let M be a class of Π-structures.. (1) We say that M has the amalgamation property (AP) if for any A, B 1 , B 2 ∈ M and any embeddings i 1 : A ֒→ B 1 and i 2 : A ֒→ B 2 there exists a structure C ∈ M and embeddings j 1 : B 1 ֒→ C and j 2 : (1) The theory of pure equality (without function symbols). 7 In fact, the theories (1) and (4) allow equational interpolation. Similar results were also established for (2) in [11] . Proof.. (1), (2), (3) are well-known (for (2) we refer for instance to [8] or [19] ). For proving (4) we use the fact that if a universal theory has a positive algebraic completion then it has the injection transfer property [1] . All theories in (4) are equational theories; by results in [18] , for equational theories the injection transfer property is equivalent to the equational interpolation property. With these remarks, (4)(a) follows from the fact that any Gaussian theory is its own positive algebraic completion [1] , and (4)(b),(c) from the fact that the theory of semilattices and that of distributive lattices have a positive algebraic completion [1] .. Similarly it can be proved that the equational classes of (abelian) groups and lattices have ground interpolation.. For the cases (4) and (5) we again use the criterion in [15] and Theorem 4.5. Let (P, f P , g P ) be a weak partial model of T 1 . Let a 0 ∈ P be such that a 0 ≥ f P (p 1 , . . . , p n ) whenever f P (p 1 , . . . , p n ) is defined. We define A = (P, f A , g A ) as follows:. f is obviously monotone. In order to prove that the second condition holds, we analyze two cases. Assume first that g P (y 1 , . . . , y n ) is undefined. Then. (d) Let T 0 be the theory of totally ordered sets. Assume that (P, f P , (g i P )) is a totally ordered weak partial model of SGc(f,. ), where f A and g i A are extensions of f P , g i P defined as in the proof of (b). f A , g 1 A , . . . , g n A are obviously monotone. We prove that the condition SGc (f, g 1 , . . . , g n ) holds in A. Assume that U i ⊆ g i A (V ) for i = 1, . . . , n, and let x ∈ f A (U 1 , . . . , U n ). Then there exist u i ∈ U i = g i A (V i ) such that f (u 1 , . . . , u n ) is defined and x ≤ f (u 1 , . . . , u n ). As u i ∈ g i A (V ), there exist v i ∈ V such that g i P (v i ) is defined and u i ≤ g i P (v i ). Let v = max(v 1 , . . . , v n ). Then u i ≤ g i P (v). Hence f P (u 1 , . . . , u n ) ≤ v ∈ V . Therefore, x ≤ f P (u 1 , . . . , u n ) ∈ V so x ∈ V . Let i : P → A defined by i(p) =↓ p. To show that it is a weak embedding we only have to show that if g P (x 1 , . . . , x n ) is defined then i(g P (x 1 , . . . , x n )) = ↓g P (x 1 , . . . , x n ) = g A (↓x 1 , . . . , ↓x n ). This is true by the definition of g A .. (e) Assume that T 0 is the theory of semilattices. The construction in (d) can be applied to this case without problems. The proof is similar to that of (d) with the difference that if n = 1 we only have one element v 1 so we do not need to compute a maximum (which for n ≥ 2 may not exist if the order is not total).. The proof of the fact that the remaining theories satisfy (Loc f ) is based on the criterion of finite locality given in Theorem 4.5. The constructions and the proofs are similar to those in the proof of (b) resp. (c) for the cases (4) and (5) . Due to the fact that we assumed that the definition domain of the extension functions is finite {f P (u 1 , . . . , u n ) | u i ≤ x i , f P (u 1 , . . . , u n ) defined} is a finite join, and thus exists (if f is nowhere defined it is sufficient to define it as being everywhere equal to t in case (b) or to g A in case (c)). The fact that the definition domains are finite also ensures that in the proof of (c) an element a 0 (chosen in the definition of g A ) with the desired properties always exists. Proof. Note first that if a partially-ordered theory is interpolating for ≤ it is also for ≈.. Assume that A ∧ B |= T a ≈ b. Then A ∧ B |= T a ≤ b and A ∧ B |= T b ≤ a, hence there exist terms t 1 , t 2 containing only common constants of A and B such that A∧B |= a ≤ t 1 ∧t 1 ≤ b and A ∧ B |= b ≤ t 2 ∧ t 2 ≤ a. It follows that A ∧ B |= t 1 ≈ t 2 , A ∧ B |= a ≈ t 1 ∧ t 1 ≈ b.. (1) and (2): convexity is obvious; the property of being P -interpolating can be proved by induction on the structure of proofs. (3) is known (cf. e.g. [19] ). A method for computing interpolating terms for LI(R) and LI(Q) is presented in [11] . (4) This is a constructive proof based on ideas from [12, 13] . The results presented there show, as an easy particular case, that one can reduce the problem of checking the satisfiability of a conjunction Γ of unit clauses with respect to one of the theories above to checking the satisfiability of a conjunction Ren Γ ∧ P Γ ∧ N Γ obtained by introducing a propositional variable P e for each subterm e occurring in Γ, a set of renaming rules of the form P e 1 op e 2 ↔ P e 1 op P e 2 op binary Boolean operation P ¬e ↔ ¬P e in the case of Bool, and translations of the positive resp. negative part of Γ:. (a) The convexity of the theory of Boolean algebras with respect to ≈ follows from the fact that this is an equational class; convexity with respect to ≤ follows from the fact that x ≤ y if and only if x ∧ y ≈ x. We prove that the theory of Boolean algebras is ≤-interpolating, i.e. that if A and B are two conjunctions of literals and A ∧ B |= Bool a ≤ b, where a is a constant occurring in A and not in B and b a constant occurring in B and not in A, then there exists a term containing only common constants in A and B such that A |= Bool a ≤ t and B |= Bool t ≤ b. We can assume without loss of generality that A and B consist only of atoms (otherwise one moves the negative literals to the right and uses convexity). A ∧ B |= Bool a ≤ b if and only if the following conjunction of literals in propositional logic is unsatisfiable:. (Ren(∧)) P e 1 ∧e 2 ↔ P e 1 ∧ P e 2 (Ren(∨)) P e 1 ∨e 2 ↔ P e 1 ∨ P e 2 (Ren(¬)) P ¬e ↔ ¬P e (P) P e 1 ↔ P e 2 e 1 ≈ e 2 ∈ A (N) P a. for all e, e 1 , e 2 subterms in A P g 1 ∧g 2 ↔ P g 1 ∧ P g 2 P g 1 ∨g 2 ↔ P g 1 ∨ P g 2 P ¬g ↔ ¬P g P g 1 ↔ P g 2 g 1 ≈ g 2 ∈ B ¬P b for all g, g 1 , g 2 subterms in B. We obtain an unsatisfiable set of clauses (N A ∧ P a ) ∧ (N B ∧ ¬P b ) |=⊥. Propositional logic allows interpolation, so there exists an interpolant I = f (P e 1 , . . . , P en ), which is a Boolean combination (say in CNF) of the common propositional variables occurring in N A and N B such that (N A ∧ P a ) |= I and (N B ∧ ¬P b ) ∧ I |=⊥ . But then A |= Bool a ≤ f (e 1 , . . . , e n ) and B |= Bool f (e 1 , . . . , e n ) ≤ b.. (4)(b) The proof is similar to that of (4)(a) with the difference that in the renaming rules in the structure-preserving translation to clause form only the conjunction rules apply, hence N A and N B are sets of non-negative Horn clauses. We can saturate N A ∪ P a under resolution with selection on the negative literals in linear time. The saturated set N * A of clauses contains all unit clauses P e where e is subterm of A with A |= SLat a ≤ e. Only unit positive clauses P e where e occurs in both A and B can enter into resolution inferences with clauses in N B ∪ ¬P b and lead to a contradiction. Thus we proved that {P e | A |= SLat a ≤ e, e common subterm} ∧ N B ∧ ¬P b |=⊥ . This is equivalent to B |= SLat t ≤ b, where t = {e | A |= SLat a ≤ e, e common subterm of A and B} .. Obviously, A |= SLat a ≤ t.. (4)(c) The case of distributive lattices can be treated similarly. Due to the fact that in this case the renaming rules for ∨ and ∧ are taken into account, the sets N A and N B are not Horn. We adopt the same negative selection strategy. When saturating N A ∪ P a a finite set of positive clauses is generated, namely of the form P e 1 ∨ · · · ∨ P en where A |= DL a ≤ (e 1 ∨ · · · ∨ e n ). We consider a total ordering on the propositional variables where P e is larger than P g if e occurs in A and not in B and g occurs in both A and in B. Then the only inferences which can lead to a contradiction with N B ∪ ¬P b are those between the clauses in N * A which only contain common propositional variables. Thus we proved that { P e i | A |= DL a ≤ e i , e i common terms} ∧ N B ∧ ¬P b |=⊥ . This is equivalent to B |= DL t ≤ b, where t = { e i | A |= DL a ≤ e i , where all e i are common subterms of A and B}. Obviously, A |= DL a ≤ t.

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O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O 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Multi-optimization power management for chip multiprocessors The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power saving opportunity for a variable performance loss which depends on application characteristics and program phase. Furthermore, the potential benefits of these optimizations are sometimes non-additive, and it can be difficult to identify which combinations of these optimizations to apply. Trial-and-error approaches have been proposed to adaptively tune a processor. However, in a chip multiprocessor, the cost of individually configuring each core under a wide range of optimizations would be prohibitive under simple trial-and-error approaches.In this work, we introduce an adaptive, multi-optimization power saving strategy for multi-core power management. Specifically, we solve the problem of meeting a global chip-wide power budget through run-time adaptation of highly configurable processor cores. Our approach applies analytic modeling to reduce exploration time and decrease the reliance on trial-and-error methods. We also introduce risk evaluation to balance the benefit of various power saving optimizations versus the potential performance loss. Overall, we find that our approach can significantly reduce processor power consumption compared to alternative optimization strategies. In modern systems, power optimizations at every layer of the system stack are crucial to avoid thermal limits and improve energyPermission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. PACT'08, October 25-29, 2008 , Toronto, Ontario, Canada. Copyright 2008 ACM 978-1-60558-282-5/08/10 ...$5.00. efficiency. Both low-level optimizations at transistor scale and highlevel operating system control of resources are indispensable in today's systems. An increasing number of optimizations at the microarchitecture level ( [1, 6, 12] ) seek to make run-time trade-offs with the goal of adapting to an application's needs. This task is difficult because not all of the optimizations have uniform power and performance effects on all applications. Furthermore, due to execution phases [10] , it is likely that resource demands change frequently within an application's run and that consequently some power optimizations can become more or less desirable at various stages. The presence of multiple, compatible power optimizations, offers even greater potential for power-savings, but makes the decision process harder. Rather than merely a simple binary decision on whether or not to apply an optimization, the system must chose a subset of optimizations to apply. In some cases, these optimizations have non-additive effects, making it difficult to predict what the cumulative impact will be.. For multicore processors, the choice of which optimizations to apply is even more complicated because the global search space is potentially huge. In addition, multiprogrammed workloads offer challenges because each application is likely to have its own resource requirements. Furthermore, it can be difficult to balance these individual demands while trying to achieve global power and performance goals. Finally, a system-wide optimization is made harder by the presence of independent, disjoint program phases. Within each local application phase, we can expect a thread to maintain the same sensitivity to resource allocation and power optimizations. If we consider a system-wide phase to be an interval in which all threads are within stable phases, we can expect that on average these independent threads will contribute to make systemwide stable phases short lived. Consequently, global pressure on resources and hence susceptibility to power optimizations, evolves continually.. In recent work, trial-and-error frameworks have been used to manage reconfigurable units in a single core processor [9, 15] . In these approaches, the policy uses a testing period to try out all possible configurations or power modes. The results collected from the trial phase are further used to select an appropriate run-time configuration. To help reduce unnecessary trials, policies can include techniques [8] to identify stable execution phases. These execution windows are likely to have consistent resource utilization patterns. Trial phases are typically entered when the system detects that a new, stable execution phase has begun. If the phases are long-lived the system can benefit because the length of the trial phases are relatively short compared to the steady-state behavior.. This simple policy can be expanded to a multi-core scenario. However, certain features of this policy make it less favorable than it is in a single-core system. First, trial phases may contribute to performance loss when inferior configurations are tested. Furthermore, the scalability of trial-and-error adaptation is quite limited. As more power-saving techniques and therefore more power modes are added, the number of required testing modes can explode.. In this paper, we examine a mechanism that integrates multiple power optimizations and globally manages chip multiprocessor processor power consumption to honor a chosen power budget. We believe this is timely given the prominence of multi-core processors and growing interest in run-time optimization. Our approach addresses concerns related to the large search space in a CMP system with many core-level optimizations, complex relationships between these optimizations, and transient resource demands due to very short-lived global phases.. Our work makes three principal contributions:. • We provide a global multiple optimization power management framework for multi-core architectures. Our solution configures individual cores to meet a chip-wide power constraint while maximizing global instruction throughput.. • Our approach introduces simple yet reasonably accurate performance/power models that allow us to explore a very large search space in a short amount of time. These models are position independent; they allow us to evaluate the power and performance of any given processor configuration from any other configuration.. • We propose a risk evaluation strategy to find a balance between cost and benefit of applying the various power-saving techniques.. The remainder of this paper is organized as follows: In Section 2, we describe our framework and identify how we envision global power management being used in a system. We go on to describe and evaluate power optimizations that we use in our solution in Section 3. Then, in Section 4 we discuss policies that can be used to guide global power management. We present simulation methodology, workloads, and experimental results in Sections 5 and 6. We follow with a discussion and comparison to related works in Section 7. Finally, we offer conclusions in Section 8. We described a global multiple optimization power management framework for multi-core architectures. Our approach applies a greedy algorithm to quickly examine a large search-space and find operating points that offer good power/performance compromises. We then configure individual cores to meet the chip-wide power constraint while maximizing global instruction throughput. Our approach introduces simple yet reasonably-accurate power models that allow us to explore a very large search space in a short amount of time. In particular, we introduce position-independent models that allow us to evaluate potential power modes based on the current configuration. With these mechanisms, we find that we can avoid the cost of trial-and-error approaches commonly used in on-line microarchitecture adaptation. Finally, we propose a risk evaluation strategy to find a balance between cost and benefit of applying the various power-saving techniques.

O B O O B I O B O B O O O B B O O O O O O O O O O B O O O O O O B O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O B O O O O B O O O O O O O O O O O O O O O O O O O O B O O O O B O O O O O O O B O B O B B O O O O O O B O O O O O O O O B O O O O O O O O O O O B B O O O O O O B O O O O O B O O O O O O O O O O B B I O O O O B O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O B O O O B O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B B O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O B O O O O O O O O O O O O O O O O O O B B O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O B O O O O O O B B I O O O O B B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O B O O B O O O O O O O O O O O O O O B B O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O B O O O B O O O O O O O O O B B O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B B O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O B B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B B O O B O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O B B O O O O O O B O O O O O O O O


Silhouette-based human action recognition using sequences of key poses In this paper, a human action recognition method is presented in which pose representation is based on the contour points of the human silhouette Weizmann, MuHAVi and IXMAS datasets return high and stable success rates, achieving, to the best of our knowledge, the best rate so far on the MuHAVi Novel Actor test.

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A quantitative analysis of the speedup factors of FPGAs over processors The speedup over a microprocessor that can be achieved by implementing some programs on The speedup over a traditional CPU that can be achieved by implementing a computation as a circuit on an FPGA has been reported many times in the technical literature. The objective of this paper is NOT to report yet another speedup. Rather, it is to present an analysis, both quantitative and qualitative, of the components of this speedup at the architecture level. Parallelism is the most notorious of these factors: Large FPGAs allow the user to implement multiple copies of the same computation by unrolling or strip-mining loops. Typical applications that are mapped onto FPGAs, such as signal, image and video processing applications, involve complex computations on a large volume of streaming data. Such applications can benefit tremendously from on-chip parallelism. However, the parallelism by itself does not account for the whole speedup which is often much larger. Furthermore, when we factor into this equation the ratio of clock frequencies, the speedup appears to be even larger when counted in number of clock cycles.. The last few years has seen the introduction of a number of Configurable System-on-a-Chip (CSoC) platforms that combine one or more CPU cores, an FPGA -based reconfigurable fabric, as well as memory blocks on a single chip. These amazing computing devices have the flexibility of software yet can approach computing speeds of custom hardware. The earliest example is that of the Triscend [12] E5 followed by the Triscend A7, the Xilinx [13] Virtex II Pro, and the Altera [14] Excalibur. The capabilities of these platforms span a wide range. At the low end, the Triscend A7 consists of a 60 MHz ARM CPU with about 20,000 programmable gates. At the high end, the Xilinx Virtex II Pro Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. [19] . Recently, BDTI [15] reported that an Altera Stratix EP1S20-6 could accommodate more than 60 times the channel capacity of a Motorola MSC8101 DSP running at 300 MHz.. With the introduction of these platforms, it is now feasible to combine on a same chip the two styles of computations: temporal, on the CPU, and spatial, on the reconfigurable fabric. CSoCs are therefore ideal platforms for embedded applications that combine both control and data intensive computations. Image and video processing applications, among many others, fall into this category.. The objective of this study is a quantitative evaluation of the various factors that contribute to the speedup achieved by FPGA implementations over traditional, and less traditional, CPUs. We believe that a better understanding of these issues can be of great help for current and future applications of CSoC, for the design of more efficient configurable fabrics and in general for a more targeted hardware/software codesign of embedded systems.. Ours is not an exhaustive analysis -we have limited ourselves, for convenience, to only one FPGA -based reconfigurable platform, the Xilinx Virtex architecture, and to one type of application: data parallel compute intensive programs drawn from image processing applications. It is well known that the clock speeds that can be realized on FPGA platforms fall well behind the ones that are customary on microprocessors, even low cost microprocessors intended for large volume embedded applications. A typical embedded CPU runs at a frequency 6 to 15 times that of a typical FPGA implementation.. DeHon [10] compares the computational densities that can be obtained on CPUs, FPGAs and ASICs. He shows that while the computational density on FPGAs is lower than ASICs, it is still much larger than what is achieved on a CPU. Of course, FPGAs, compared with ASICs, have the advantage of being programmable.. The rest of this paper is organized as follows. In Section 2, we describe the benchmarks used as well their implementation on a CSoC. Section 3 reports on the comparison with three general-purpose processors: MIPS, Pentium III and a VLIW machine. Section 4 gives an indepth analysis of the factors accounting for the performance difference. Section 5 provides conclusions. In this paper, we analyzed three image-processing applications (Prewitt edge detection, wavelet transform, and maximum filter) implemented both on an FPGA -based reconfigurable platform and on general-purpose processor platforms (MIPS, Pentium III and VLIW). The objective of our analysis was to identify and quantify the factors that contribute to the speedup achieved on the FPGA over the processors, and to guide the design and implementation of reconfigurable systeams. We show that in spite of the clock cycle advantage of CPUs the instruction efficiency of the FPGA is an important factor. This factor ranges from 6 to 47 on our benchmarks. The instruction efficiency factor can be considered the inherent advantage of FPGAs over the von Neumann model architectures and affect reconfigurable computing systems' performance dramatically. We also show that FPGA implementations are very efficient in term of loading and storing data to/from memory or I/O. This is a result of the streaming computation that is usually implemented. We believe that this quantitative analysis will help shed some light on the 20 to 100 speedup factors that can be achieved by FPGA implementations over generalpurpose processors.

O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O B O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O B O O O O


Distributed Denial of Service is a Scalability Problem Distributed denial of service attacks are often considered a security problem. While this may be the way to view the problem with the Internet of today, new network architectures attempting to address the issue should view it as a scalability problem. In addition, they need to approach the problem based on a rigorous foundation.

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On the design of low-voltage, low-power CMOS analog multipliers for RF applications power dissipations of the proposed class-AB buffer amplifier, which is loaded with a large-size capacitor of 680 pF with the input of a step-wise (0.54 V) for a 97.8 KHz scanning frequency, are only 1 and 0.893 mW for charging and discharging, respectively. Experimental prototype output buffer implemented in the TSMC 0.6-m CMOS technology had demonstrated that the circuit draws only 30 A static current and exhibited settling times of 1.6 s and 1 s for rise and fall edges for the proposed circuit under a 680 pF capacitance load.The settling time for the rise edge is improved from 175 s of the conventional buffer amplifier to 1.6 s of the proposed buffer. The input swing is 3.85 V. The measured data do show that the proposed output buffer circuit is very suitable for the application in the flat panel as the display driver.[1] Y. Takahashi et al., "Multimedia projector using 720 2 480 pixel a-Si TFT-LCD's and a high-speed analogue driver LSI," Displays: Technology & Application, vol. 13, no. 1, pp. 5-30, Jan. 1992 Carl James Debono, Franco Maloberti, and Joseph Micallef Abstract-Novel low-voltage, low-power techniques in the design of portable wireless communication systems are required. Two system examples of low-power analog multipliers operating from a 1.2 V supply are presented. These proposed structures achieve the required multiplication function by using current processing. The circuits were fabricated using standard double-poly CMOS processes for a 900 MHz application. Measurement results of the prototypes are comparable to other higher voltage designs. Continuous growth in the demand for portable wireless systems has driven recent efforts to increase integration levels in RF transceivers [1] . The integrability and power consumption of the digital part of a communications transceiver will further improve with the downscaling of technologies. The bottleneck for further advancements is the analog front-end electronics [2] . In order to reduce the power consumption, architectures that require smaller currents must be developed. One approach is to use structures that function at a lower supply voltage.. Operation at 1.2 V is difficult to achieve with bipolar technologies since the base-to-emitter voltage is 0.7 V and the base-to-collector junction must be reverse biased. By contrast the MOS transistor allows the drain-to-source voltage to be lower than the gate-to-source voltage. Therefore, if the saturation voltage is kept at a few hundred millivolts there is enough room for some output dynamic range. This implies that low-voltage, low-power analog structures can be developed using CMOS technology.. The downconversion mixer is one of the indispensable analog blocks in a receiver, where its main function is that of frequency translation of the incoming RF signal to an intermediate frequency for further processing. Various authors have tackled the problem of designing lowvoltage CMOS RF mixer architectures that permit satisfactory operation at frequencies higher that 900 MHz [3] - [11] . Mixers based on the Gilbert cell topology [3] - [6] all require stacking of a current source, the RF input pair, the local oscillator quad and the output loads, thus limiting the minimum supply voltage required by the circuit. The mixer proposed in [7] also requires a high bias voltage due to the stacking of transistors. The passive mixers proposed in [8] , [9] have a better linearity than active mixer designs but require a high supply voltage required for the digital part in [8] and for the stacking in the opamp in [9] . The passive mixer proposed in [10] operates at a lower voltage than [8] , [9] but it still uses transistor stacking limiting the minimum supply voltage. A different approach that requires only ground-connected transistors operating in saturation for the mixer core was taken in [11] . The minimum supply voltage of this approach is limited by the output buffer. This paper first discusses design strategies for achieving low-voltage operation. Then, two low-power circuits capable of performing the analog multiplication of two differential input signals with low-signal distortion, operating from a 1.2 V supply, will be presented. The circuits exploit the quadratic relation between the current and the voltage of the MOS transistor in saturation. The most noticeable feature of these proposed structures is their low-voltage operation. They can operate at a supply voltage of 1.2 V while sustaining high linearity making them suitable for battery operated portable systems. The multipliers were designed for a 900 MHz application in a standard double-poly 0.6-m and a 0.35-m CMOS process, respectively. The principle of operation of both designs is described in Section II. In Section III the circuit realizations are presented. The nonlinearity effects and the measurement results follow in Sections IV and V, respectively, while a conclusion is given in Section VI. A design approach for low-voltage, low-power mixer designs together with two examples have been presented. The measurement results indicate that both circuits have a good linearity even at these low voltages. Also, these results are comparable to the measured results of a similar approach proposed in [11] , where a supply voltage of 3 V was used. Both designs occupy a small chip area making them very feasible analog multipliers in various implementations. The supply voltage limitation of the first example is given by the adder circuits, since these require a gate-to-source voltage, a saturation voltage and some margin across the output resistance. The threshold voltage for the 0.6-m CMOS technology used is 0.75 V thus imposing a limit of 1.2 V supply for the circuit to function correctly. Also the output dynamic range of the circuit is limited by the core of the mixer and for the circuit to operate at 1.2 V this range lies between 6200 mV.. The advantages of this structure with respect to [11] are that it has a lower power dissipation and a lower noise figure.. The minimum supply voltage of the second example is limited by the threshold voltage of the input pair, the drain-to-source voltages of the current sources and the voltage across the resistors of the V -I converters. For the 0.35-m CMOS technology used the threshold voltage is 0.6 V and as a result a minimum supply voltage of 1.2 V is required for correct operation. The advantage of this circuit over the other example is that it has a lower third harmonic component but this was achieved at the expense of a higher power dissipation and noise figure. The higher power consumption is required to guarantee linear operation of the circuit, while the higher noise figure is due to the smaller conversion gain of the circuit. The circuit also presents a better output dynamic range that has a maximum of 6300 mV, and a smaller chip area. Therefore, a proper tradeoff permits the improvement of the linearity at the expenses of higher noise figure and power dissipation.

O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Induction in Algebra: a First Case Study Abstract. Many a concrete theorem of abstract algebra admits a short and elegant proof by contradiction but with Zorn's Lemma (ZL). A few of these theorems have recently turned out to follow in a direct and elementary way from the Principle of Open Induction distinguished by Raoult. The ideal objects characteristic of any invocation of ZL are eliminated, and it is made possible to pass from classical to intuitionistic logic. If the theorem has finite input data, then a finite partial order carries the required instance of induction, which thus is constructively provable. A typical example is the well-known theorem "every nonconstant coefficient of an invertible polynomial is nilpotent". Many a concrete theorem of abstract algebra admits a short and elegant proof by contradiction but with Zorn's Lemma (ZL). A few of these theorems have recently turned out to follow in a direct and elementary way from the Principle of Open Induction (OI) distinguished by Raoult [42] . A proof of the latter kind may be extracted from a proof of the former sort. If the theorem has finite input data, then a finite partial order carries the required instance of induction, which thus is provable by mathematical induction-or, if the size of the data is fixed, by fully first-order methods.. But what is Open Induction? In a nutshell, OI is transfinite induction for subsets of a directed-complete partial order that are open with respect to the Scott topology. While OI was established [42] as a consequence of ZL, by complementation these two principles are actually equivalent [21] with classical logic but in a natural way. Hence OI is the fragment of transfinite induction of which the corresponding minimum principle just is ZL.. Our approach is intended as a contribution to a partial realisation in algebra [13] of the revised Hilbert Programmeà la Kreisel and Feferman (see [17] for a recent account including references), and was motivated by related work in infinite combinatorics [8, 11, 14, 42] as well as by the methods of dynamical algebra [16, 39, 51] and formal topology [30, 44, 46] . In Hilbert's terminology, the "ideal objects" characteristic of any invocation of ZL are eliminated by passing to OI, and it is made possible to work with "finite methods" only, e.g. to pass from classical to intuitionistic logic.. A typical example, studied before [41, 43] and taken up in this paper, is the well-known theorem "every nonconstant coefficient of an invertible polynomial is nilpotent". More formally, this can be put as f g = 1 → ∃e (u e = 0) (1.1) where f and g are polynomials with coefficients in an arbitrary commutative ring. b j T j and u = a i 0 where 1 ≤ i 0 ≤ n. The customary short and elegant proof of (1.1) works by reduction to the case of polynomials over an integral domain f g = 1 → u = 0 or, equivalently, by reduction modulo any prime ideal P of the given ring:. This special case is readily settled by looking at the degrees, or more explicitly by a polynomial trick due to Gauß [15, 29] . In order to reduce (1.1) to (1.2) , it is natural to invoke ∀P (u ∈ P ) → ∃e (u e = 0) .. But the latter, a variant of Krull's Lemma, is normally deduced from ZL by a proof by contradiction, which is anything but an argument using only finite methods. In addition, a universal quantification over prime ideals P occurs, which are ideal objects (see e.g. [17] ). These foundational issues aside, there is a practical problem. By decomposing (1.1) into (1.2) and (1.3) one virtually loses the computational information the hypothesis of (1.1) is made of; in particular [41, 43] the proof falls short of being an algorithm for computing an exponent e under which the nilpotent u vanishes. However, we can still extract a proof that is based on induction over a finite partial order; and the proof tree one can grow alongside the induction encodes an algorithm which computes the desired exponent.. That our method does work may seem less surprising if one takes into account that the theorem has already seen constructive proofs before [41, 43] , and that an entirely down-toearth proof is possible anyway [4, Chapter 1, Exercise 2]. Needless to say, each of those proofs embodies an algorithm; one of them [41] has even been partially implemented in Agda, a proof assistant based on Martin-Löf type theory.. Just as the proof in [41] , our constructive proof is gained from a given classical one, the one by reduction to the case of integral domains we have mentioned above. As compared with [41] , we keep somewhat closer to the classical proof. The price we have to pay is that we have to suppose certain decidability hypotheses, which need to-and can-be eliminated afterwards by a variant of the Gödel-Gentzen and Dragalin-Friedman translations. In [41] a simpler instance of this elimination method is built directly into the proof.. To be slightly more specific, we we first turn the indirect proof of (1.3) with ZL into a direct deduction from OI; and then transform the latter into a constructive proof of (1.1) by induction over a finite poset. This is possible because the hypothesis of (1.1)-unlike the one of (1.3)-consists of computationally relevant information about a finite amount of elementary data: of nothing but the finitely many equations. Heuristics aside, all this makes redundant the reduction, and the prime ideals disappear.. 1.1. Preliminaries.. 1.1.1. Foundations. The overall framework of this note is constructive algebraà la Kronecker and Bishop [31, 35] . Due to the corresponding choice of intuitionistic logic, one or the other assumption needs to be made explicit that would be automatic in classical algebra, by which we mean algebra as carried out within ZFC set theory and thus, in particular, with classical logic. For example, we say that an assertion A is decidable whenever A ∨ ¬A holds; and that a subset S of a set T is detachable if t ∈ S is decidable for each t ∈ T .. As moreover the principle of countable choice will not occur, let alone the one of dependent choice, our constructive reasoning can be carried out within (a suitable elementary fragment of) the Constructive Zermelo-Fraenkel Set Theory CZF which Aczel [1, 2, 3] has interpreted within Martin-Löf's [34] Intuitionistic Theory of Types. Unlike Friedman's [19] impredicative Intuitionistic Zermelo-Fraenkel Set Theory IZF, this CZF does not contain the axiom of power set. Hence in CZF an unrestricted quantification over subsets-such as the one crucial for this paper, over all prime ideals of an arbitrary ring-in general is a quantification over the members of a class.. 1.1.2. Rings. Throughout this paper, R will denote a commutative ring (with unit). We briefly recall some related concepts [4] . An ideal of R is a subset I that contains 0, is closed under addition, and satisfies s ∈ I → rs ∈ I for all r, s ∈ R. We write (S) for the ideal generated by a subset S of R: that is, (S) consists of the linear combinations r 1 s 1 + . . . + r n s n of elements s 1 , . . . , s n of S with coefficients r 1 , . . . , r n from R.. A radical ideal of R is an ideal I such that r 2 ∈ I → r ∈ I for all r ∈ R. The radical √ I = {r ∈ R : ∃e ∈ N (r e ∈ I)} of an ideal I is a radical ideal with I ⊆ √ I. An ideal I is a radical ideal if and only if I = √ I. The radical √ 0 of the zero ideal 0 = {0} is the nilradical, and its elements are the nilpotents.. An ideal P is a prime ideal if 1 / ∈ P and. for all a, b ∈ R. Clearly, every prime ideal is a radical ideal. A ring R is an integral domain-for short, a domain-if 1 = 0 in R and. for all a, b ∈ R. A quotient ring R/P is a domain if and only if P is a prime ideal.. 1.1.3. Induction. Let (X, ≤) be a partial order. We do not specify from the outset whether X is a set in the sense of CZF, which in the case of our definite interest will anyway be the case, but during heuristics will depend on the choice of a more generous set theory such as IZF. Unless specified otherwise every quantification over the variables x, x ′ , y, and z is understood as over the elements of the partial order X under consideration. Let U be a predicate on X. We say that U is progressive if 6) where y > x is understood as the conjunction of y ≥ x and y = x. About the antecedent of (1.6), note that y > x is used rather than y < x, as is common in other contexts; our choice allows us to avoid reversing the naturally given order (i.e., inclusion) later on. Also, in the relevant instantiations below, the predicate U will define-and be identified with-a subset of the set X; and ≤ will be a decidable relation (that is, for all x, y ∈ X, the assertion x ≤ y is decidable). By induction for U and X we mean the following: If U is progressive, then ∀x U (x). Classically, induction holds for every U precisely when X is well-founded in the sense that every inhabited predicate on X has a maximal element-or, in classically equivalent terms, that there is no strictly increasing sequence in X.. We will use induction in cases in which X has a least element ⊥, in which U (⊥) is equivalent to ∀x U (x) whenever U is monotone: that is, if x ≤ y, then U (x) implies U (y). Note finally that if U is progressive, then U is satisfied by every maximal element of X, and thus by the greatest element ⊤ of X whenever this exists. Our choices of the partial orders X and the predicates U were crucial to make induction work. In particular, the objects X from the constructive proofs are finite partial orders, as required for FI, and, by the way, are sets in the sense of CZF. Moreover, we thus have eventually kept close to the data of the given problem: that is, the coefficients a i and b j of the polynomials f and g. We could have done so much earlier, and perhaps more efficiently: by the method of indeterminate coefficients [31, p. 82 ]. This would have meant to pass from the arbitrary given R to the ring. 5 Thierry Coquand has kindly pointed us toward this method. As we have learned from Christoph-Simon Senjak, the proof translation at use is related-via the Curry-Howard isomorphism-to the continuationpassing style in programming.. with generators a 0 , . . . , a n , b 0 , . . . , b m and relations (6.2) . This R 0 indeed encodes all the data and information we would have needed for phrasing and proving NC. For its simple structure, moreover, R 0 is Noetherian [23] ; and SPT holds constructively for R 0 since this is a fully Lasker-Noether ring [39] . Hence LN for R 0 is constructively provable [39] , and KL for R 0 follows without any talk of OI, let alone of ZL.. The universal quantification required for KL, over all possible prime ideals of R, could then be replaced by the more manageable one over the finitely many finitely generated prime ideals of R 0 as produced by LN. Modulo each of the latter prime ideals we could have followed Gauß's argument for the case of a domain, yet replacing-as we have done anyway-the proof by contradiction by an appropriate distinction-by-cases. In all, we would have got a perfectly constructive proof of NC. This avenue, however, might not have forced us to seek an invocation of FI, and thus to keep close to the given data. In particular, we would not have made explicit a tree and an algorithm as simple as they have resulted from the constructive proofs with FI.. With hindsight, the proof pattern coined with Theorem 4.2, including the crucial notion of reducibility, stands already behind many a post-war textbook proof of the Lasker-Noether theorem [4, 37] , and more implicitly behind Krull's proof [27] . It is not yet clear however whether any constructive "unwinding" of this type of classical proof can be brought under that pattern. We have anyway seen how the pattern can be applied to NC, a lemma in polynomial algebra, and yet another application of the pattern has proved possible in the area of inversion problems for Banach algebras [20] . A further case study will be undertaken about Gauß's lemma "the product of two primitive polynomials is primitive", which leads over its generalisation, ascribed to Joyal, to the so-called Dedekind Prague Theorem [5, 15, 29, 12] .. We have conceived the constructive proofs of NC along the lines of the classical proof with Gauß's trick that we have recalled earlier. In particular, (6.3) and (6.8) are nothing but (6.4) and (6.7), respectively, with "= 0" replaced by "∈ F ". Now if "= 0" is considered within a domain, as in the classical proof, then it actually corresponds to "∈ P " where P is a prime ideal of an arbitrary ring. Hence the move from "= 0" to "∈ F " is in accordance with a paradigm that goes back to the so-called D5 philosophy of dynamic evaluation in computer algebra [18] : to handle the prime ideals P by way of their incomplete specifications F [16, 28, 29] , which are (radicals of) finitely generated ideals but not necessarily prime.. In all, we have carried out a case study for a further potentially systematic way to gain finite methods from ideal objects in algebra. As discussed above (Section 6.2), our main competitor [41] has studied the same case but with a different method taken from point-free topology. We thus have started yet another attempt to make constructive sense of the notion of prime ideals, which ". . . play a central role in the theory of commutative rings" [26, p. 1] . In constructive algebra the notion of prime ideals has seen a revival [9] after it was considered problematic in general: "If an ideal P in a commutative ring is not detachable, it is is not clear just what it should mean for P to be prime" [35, p. 77] .. Our work may further give evidence for the practicability of the recent proposals of a controlled use of ideal objects in constructive mathematics [45, 47] on the basis of a twolevel foundations with forget-restore option [33, 32] . Last but not least, we have put some mathematical flesh on Bell's conjecture that ZL is "constructively neutral" [7] .

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Martingale Families and Dimension in P We introduce a new measure notion on small complexity classes (called F -measure), based on martingale families, that gets rid of some drawbacks of previous measure notions: it can be used to define dimension because martingale families can make money on all strings, and it yields random sequences with an equal frequency of 0's and 1's. As applications to F -measure, we answer a question raised in [1] by improving their result to: for almost every language A decidable in subexponential time, P A = BPP A . We show that almost all languages in PSPACE do not have small non-uniform complexity. We compare F -measure to previous notions and prove that martingale families are strictly stronger than Γ-measure [1], we also discuss the limitations of martingale families concerning finite unions. We observe that all classes closed under polynomial many-one reductions have measure zero in EXP iff they have measure zero in SUBEXP. We use martingale families to introduce a natural generalization of Lutz resource-bounded dimension [13] on P, which meets the intuition behind Lutz's notion. We show that P-dimension lies between finitestate dimension and dimension on E. We prove an analogue to the Theorem of Eggleston in P, i.e. the class of languages whose characteristic sequence contains 1's with frequency α, has dimension the Shannon entropy of α in P. Resource-bounded measure has been successfully used to understand the structure of the exponential time classes E and EXP, see [12] for a survey. Recently resource-bounded measure has been refined via effective dimension which is an effectivization of Hausdorff dimension, yielding applications in a variety of topics, including algorithmic information theory, computational complexity, prediction, and data compression [13, 17, 14, 4, 2, 6] .. Unfortunately both Lutz's resource-bounded measure and dimension formulations [10, 13] only work on classes containing E (apart from finite-state dimension). One reason for this is that when a martingale is to bet on some string x depending on the history of the language for strings y < x, the history itself is exponentially larger than the string x. Thus even reading the history is far above the computational power of P.. One way to overcome this difficulty was proposed in [1] , with a measure notion (called Γ-measure) defined via martingales betting only on a sparse subset of strings of the history, with the drawback that the class of sparse languages does not have measure zero. Nevertheless it seems that sparse languages and more generally languages whose characteristic sequences satisfy some frequency property should be small for an appropriate measure notion on P, because there exists simple (exponential-time computable) martingales always making the same fixed bet that succeed on such languages. Such martingales are relatively "simple": exponential computational power is only required to keep track of the current capital. This also shows how important it is for a martingale to be able to bet on all strings, in order to succeed. This "betting on all strings" property becomes crucial in Lutz's recent formulation of effective Hausdorff dimension [13] .. A stronger measure notion called dense martingale measure (denoted Γ d ) was then proposed in [23] , with the surprising result that the polynomial time version of Lutz's hypothesis "NP does not have measure zero in E" does not hold [3] . Γ d -measure does not satisfy the finite union property though; it was then showed that a restricted version (denoted Γ/(P)) of it does, unfortunately Γ/(P)-measure has some unnatural properties: a language with infinitely many easy instances can still be random.. Another limitation of previous martingale-based measure notions on P from [1, 23] and on PSPACE [18] is the inability of the corresponding martingales to bet on all strings. Γ-martingales can only bet on a polynomial number out of the exponentially many strings of length n, whereas Γ d and Γ/(P) martingales can only double their capital a polynomial number of times while betting on (the exponentially many) strings of size n, with the direct consequence that neither can be used to define a dimension notion, because the ability to bet on every string is essential for this purpose (notice that simply keeping track of the capital won by a martingale doubling its capital on every string is impossible in polynomial time). Moreover the random sequences yielded by either of those two measure notions do not have an equal frequency of 0's and 1's in the limit, whereas this property is captured by Lutz's resource-bounded measure notion on E, corresponding to the intuitive idea of a random sequence.. In this paper we introduce a measure notion on P based on martingale families (called F -measure), where martingale families can double their capital on all strings, thus enabling us to define dimension in P. F -measure gets rid of the unnatural random sequences of Γ/(P)-measure [23] , and yields random sequences with an equal frequency of 0's and 1's, similarly to Lutz resource-bounded measure [10] . Moreover F -measure is strictly stronger than Γ-measure. United, we stand; divided, we fall is the key idea behind F -measure, i.e. whereas a single polynomial time computable martingale is not able to make money on all exponentially many strings of size n, a family of martingales working together and sharing their capital can. The idea is to separate the exponentially many strings of size n into groups of polynomial size, where each member of the family bets on one of these groups of strings. The family shares a common bank account: When such a martingale bets on a string x, the capital at its disposal amounts to the capital currently gathered by its family on predecessors of x, although it has no information about how much this (possibly) exponentially large capital is.. Constructing a perfect measure on P has turned out to be much more difficult as previously thought; it is now widely admitted that the perfect measure on P might be very difficult to achieve, and that for any measure notion on P some desirable properties must be abandoned; and F -measure is no exception. Similarly to Γ d -measure [23] , martingale families do not satisfy the finite union property, but only satisfy the union property in some non-general sense: we can only guarantee the union property for families with the same bank account structure; however this is usually enough to prove theorems where the union property is needed.. We show in Section 3.1 that except for general unions, martingale families satisfy the basic measure properties, i.e. every single language has measure zero, and the whole class P does not have measure zero, we then introduce uniform P-unions and show that the union property holds for those. We observe that it is easy to derive a F -measure notion on classes between P and E like QUASIPOLY, SUBEXP and PSPACE; for BPP see [21] .. Next we show that the concept of randomness yielded by F -measure is optimal regarding frequency: every language L such that there are infinitely many n with |L[1 · · · n]| ≤ n (with < 1/2), has measure zero in P (Section 3.2).. As applications to F -measure, we answer a question raised in [1] , improving their result to: almost all (all except a measure zero class) languages computable in subexponential time, are hard enough to derandomize BPP, i.e. a polynomial time algorithm can use almost every language L ∈ SUBEXP to derandomize every probabilistic polynomial time algorithm, even if the probabilistic algorithm has also oracle access to L.. We also investigate the nonuniform complexity of languages of PSPACE, and show that almost all languages in PSPACE do not have small nonuniform complexity, thus reducing the resource-bounds of a similar result in [11] .. Next we compare F -measure to previous measure notions on P, and show that F -measure is strictly stronger than Γ-measure, i.e. every Γ-measure zero set has F -measure zero, and there are classes with Γ-measure non-zero that have F -measure zero. Due to their intrinsic differences, we cannot compare Γ d -measure and Γ/(P)-measure [23] to F -measure. Nevertheless all sets proved to be small for Γ/(P)-measure in [23] are also small for F -measure. Regarding density arguments, F -measure performs better; indeed a (Lebesgue) random language has (1/2 − o(1))2 n words of length n (with high probability), and this property is captured by Fmeasure, whereas for Γ/(P)-measure, the set of languages having o(2 n ) words of length n has Γ/(P)-measure zero. The advantage of Γ/(P)-measure over F -measure is that it satisfies the finite union property. Concerning Γ d -measure and F -measure, both their respective strengths are different, whereas Γ d -measure cannot be used to define dimension in P, F -measure fails to capture the Γ d -measure zero sets in [3] .. We also show that all classes closed under polynomial many-one reductions have measure zero in EXP iff they have F -measure zero in E α , which reduces the time bounds of many results [8, 19, 8, 7] from measure on E to measure on SUBEXP.. The second part of the paper is devoted to dimension in P. Lutz resource-bounded dimension [13] , has been introduced on a wide variety of complexity classes ranging from finite state automata, exponential time and space up to the class of recursively enumerable languages [17] , with the exception of small classes like P.. Hausdorff dimension is a refinement of Lebesgue measure, where every measure zero class of languages is assigned a real number between 0 and 1, called its Hausdorff dimension. The key idea of Lutz is to receive a tax after each round (even if the martingale did not bet during that round): the largest tax rate which can be received without preventing the martingale from succeeding on a given class represents the dimension of the class.. Trying to bridge the gap between finite state automata and exponential time requires a measure notion which is able to bet and double the capital at every round. Whereas all previous measure notions on P [1, 23] are unable to do so, it is not a problem for martingale families. This leads to a natural generalization of Lutz resource-bounded dimension [13] on P, which meets the idea behind Lutz's notion.. We give some evidence that P-dimension is a natural extension to P of previously existing dimension notions, by showing that it lies exactly between finite-state dimension and dimension on E, i.e. we show that for any sequence S,. Finally we prove an analogue to the Theorem of Eggleston [5] in P, i.e. the class of languages whose characteristic sequences contain 1's with frequency α, has strong dimension the Shannon entropy of α in P.. Due to space constraints, all proofs are postponed to the Appendix. From the quest for the perfect measure on P a widespread consensus has emerged that for measure on small complexity classes some properties need to be renounced. The main contribution of our measure notion is that unlike previous measure notions on P, it leads to a reasonable way to define dimension in P. The price to pay is that martingale families only satisfy a non-general union property. We expect our measure and dimension notions to be useful for further measure-based investigations in small complexity classes.

O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O B I O O O O B I O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Cost, power consumption and performance evaluation of metro networks Abstract-We provide models for evaluating the performance, cost and power consumption of different architectures suitable for a metropolitan area network (MAN). We then apply these models to compare today's synchronous optical network/synchronous digital hierarchy metro rings with different alternatives envisaged for next-generation MAN: an Ethernet carrier grade ring, an optical hub-based architecture and an optical time-slotted wavelength division multiplexing (WDM) ring. Our results indicate that the optical architectures are likely to decrease power consumption by up to 75% when compared with present day MANs. Moreover, by allowing the capacity of each wavelength to be dynamically shared among all nodes, a transparent slotted WDM yields throughput performance that is practically equivalent to that of today's electronic architectures, for equal capacity. T he growing ubiquity of broadband access solutions such as fiber to the home (FTTH) is currently putting a strain on metropolitan area network (MAN) bandwidth. Most of today's metropolitan area networks are based on circuit switched synchronous optical network/synchronous digital hierarchy (SONET/SDH) architectures. Initially designed to transport constant-rate voice traffic, SONET/SDH networks are unable to cope with today's constantly increasing bursty data traffic demands. Thus, Internet service providers (ISPs) deploy Ethernet-based metropolitan area networks, which are arguably more flexible, scalable and cost-effective than legacy SONET/SDH architectures [1] [2] [3] . Despite these advantages, the Ethernet-based MAN still represents an opaque solution because optical signals must be converted to the electronic domain at every intermediate network node. Optical-electronic-optical conversion represents the largest cost when operating optical fiber networks [4] ; thus, reducing or eliminating O/E/O conversion of in-transit traffic is a key design objective for MANs.. In today's metro networks most of the traffic carried by the network is destined to the Internet. In this context, O/E/O conversion at intermediate nodes can be eliminated simply using a dedicated wavelength channel to connect each network node to a hub node, which provides access to the Internet. We refer to this architecture as hub-based architecture. Although this simple solution can readily be implemented using existing optical devices, it is hampered by severe scalability issues. First, the technology most likely to be deployed in the metro area is coarse wavelength division multiplexing (CWDM), which only supports up to 16 wavelengths. Thus, the number of nodes cannot exceed the number of available wavelengths, unless exploiting spatial diversity with parallel fibers. Second, the whole inbound traffic, i.e., traffic not destined to the Internet, undergoes unnecessary O/E/O conversion and processing at the hub node. Scalability can be improved by allowing the capacity of each wavelength channel to be shared by multiple access nodes. Sharing can be achieved in the time domain by dividing the wavelength capacity into fixed-size time-slots. Time-slotted WDM architectures have been demonstrated as a viable approach to provide all-to-all connectivity in optical fiber rings [5] [6] [7] [8] [9] [10] [11] [12] . Slots propagate on the ring and each node can add/drop data to/from in-transit slots by means of one optical transmitter and receiver pair, which we also refer to as a transceiver. Tunability is required at least at the transmitter or receiver side to enable single-hop, all-optical connections between nodes. Since the architectures in [5] [6] [7] require several transceivers per node, and [8] does not support spatial reuse, we consider the architecture proposed in the ECOFRAME project [13] . This architecture, named slotted WDM in the following, requires a single tunable transmitter and a fixed receiver per node and provides great flexibility, being able to dynamically adapt the wavelength load to changing traffic demands.. Since both the hub-based and slotted WDM solutions allow in-transit traffic to transparently bypass intermediate nodes, we refer to them as transparent architectures. In this paper, we provide models to compare performance, cost and power consumption of the above described architectures. We apply these models to a realistic case study and compare the two opaque solutions (SONET/SDH and Ethernet carrier grade) with the two transparent solutions (hub-based and time-slotted WDM) in the context of ring MANs. Specifically, we consider a MAN in which network nodes are interconnected by means of two counter-rotating fiber rings. One of these rings is used exclusively for protection purposes. In our study, we only concentrate on the operation of a single ring; the one used for transporting data.. We show that, by allowing in-transit traffic to optically bypass intermediate nodes, the two transparent solutions require a smaller number of electronic components, thus reducing network cost and power consumption. Furthermore, we analytically prove that a slotted WDM solution is able to efficiently utilize network resources, attaining a traffic capacity which is comparable to that of today's electronic networks.. The remainder of this paper is organized as follows. The next section describes the considered network architectures. In Section III we present a model for cost and power consumption evaluation. The model for performance evaluation is then presented in Section IV, whereas in Section V we present a case study highlighting the expected performance, cost and power consumption of each architecture. Section VI concludes the paper. We provided models for evaluating the cost, power consumption and traffic capacity of different network architectures.. Then, we applied these models to compare four architectures suitable for a MAN. Our results indicate that allowing transit traffic to bypass intermediate nodes in the optical domain would reduce power consumption by up to 75% with respect to today's opaque SONET/SDH networks. We studied two different architectures which enable optical bypass of transit traffic. We showed that a time-slotted WDM architecture in which the capacity of each wavelength is dynamically shared among several source-destination pairs is able to attain a level of performance equivalent to that of opaque networks, while minimizing the number of required transmitters and receivers and thus the total network cost.. As future work we intend to extend the present study by comparing the cost and power consumption of the considered architectures in a dynamic traffic environment, when interfaces are switched off during periods of low network load.

O B I O B I O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O B I O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O