Feature-adaptive GPU rendering of Catmull-Clark subdivision surfaces We present a novel method for high-performance GPU-based rendering of Catmull-Clark subdivision surfaces. Unlike previous methods, our algorithm computes the true limit surface up to machine precision, and is capable of rendering surfaces that conform to the full RenderMan specification for Catmull-Clark surfaces. Specifically, our algorithm can accommodate base meshes consisting of arbitrary valence vertices and faces, and the surface can contain any number and arrangement of semisharp creases and hierarchically defined detail. We also present a variant of the algorithm which guarantees watertight positions and normals, meaning that even displaced surfaces can be rendered in a crack-free manner. Finally, we describe a view-dependent level-of-detail scheme which adapts to both the depth of subdivision and the patch tessellation density. Though considerably more general, the performance of our algorithm is comparable to the best approximating method, and is considerably faster than Stam's exact method. Nießner, M., Loop, C., Meyer, M., and DeRose, T. 2012. Feature-adaptive GPU rendering of Catmull-Clark subdivision surfaces. Catmull-Clark subdivision surfaces [Catmull and Clark 1978] have been used extensively by the feature film industry for some time. With the advent of hardware tessellation units on GPUs, they are becoming increasingly attractive for use in games. Hardware tessellation exploits the compact representation and data independence of patch primitives to produce triangle data for immediate consumption by the rasterization stage. This means that only the vertices of a coarse model need to be animated; the GPU can amplify the coarse geometry on-the-fly with very little memory bandwidth to produce a dense tessellation of the surface. Subdivision surfaces seem ideally suited to this paradigm. However, efficiently using tessellation hardware to render Catmull-Clark subdivision surfaces has previously relied either on the construction of approximating patches [Loop and Schaefer 2008; Myles et al. 2008a Myles et al. , 2008b Ni et al. 2008; Loop et al. 2009 ], or on the direct, but considerably slower, Stam evaluation algorithm [Stam 1998 ].. Since their introduction in 1978, Catmull-Clark surfaces have been extended in a number of ways, including the treatment of boundaries [Nasri 1987 ], infinitely sharp creases [Hoppe et al. 1994 ], semisharp creases [DeRose et al. 1998 ], and hierarchically defined detail [Pixar Animation Studios 2005] . The introduction of semisharp creases has proven to be particularly important as they allow realistic edges to be defined while keeping memory footprints small. For example, the rounded edges of the steel frame of the garbage truck shown in Figure 9 were created with semisharp creases, requiring only a few bytes of tag data per creased edge. Achieving a similar shape without semisharp creases would require a base mesh with significantly more vertices, faces, and edges. Similarly, the use of hierarchical edits, as introduced by Forsey and Bartels [1988] and as defined in the RenderMan specification, allows detail at various resolutions to be specified much more efficiently than globally refining the mesh. An example is shown in Figure 10 (b) where the sandy terrain is modeled at one scale, and the footprints are details that appear at a much finer scale.. To date there are no GPU algorithms for the real-time rendering of Catmull-Clark surfaces possessing semisharp creases or hierarchical detail. In this article, we present the first such algorithm. It uses a combination of GPU compute kernels and hardware tessellation to adaptively patch Catmull-Clark surfaces. Moreover, the algorithm is exact rather than approximating (by exact we mean that the vertices of our patch tessellations lie exactly on the limit surface up to machine precision), and we present a variant that is capable of creating watertight tessellations. This variant additionally satisfies a much stronger condition: namely, that abutting patches meet 6:2 • M. Nießner et al. with bitwise identical positions and normals. With this stronger property surfaces with normal displacements are also guaranteed crack-free.. The algorithm is based on the idea of feature-adaptive subdivision. It has long been known that regular faces of a Catmull-Clark base mesh (that is, quad faces whose vertices have exactly four neighbors) generate a single bicubic patch in the limit of infinite subdivision, and that regions around extraordinary vertices (vertices having other than four neighbors) give rise to an infinite nesting of bicubic patches that approach a well-defined limit [Doo and Sabin 1978] . A similar recursive nesting of bicubic patches also occurs near other kinds of features such as semi-or infinitely sharp creases, as well as near regions affected by hierarchical detail. Our algorithm exploits this fact to subdivide the mesh only in the vicinity of these features. At each stage of local subdivision, new bicubic patches are generated that are directly rendered using hardware tessellation. Since we only subdivide locally, our time and memory requirements are significantly less than the naive approach of globally subdividing the entire base mesh each step.. In addition to being more accurate and general than previous algorithms, the performance of our approach is competitive with an optimized implementation of the fastest approximate scheme based on Gregory Patches [Loop et al. 2009 ]. We also show that our approach is significantly faster than a GPU implementation of Stam's direct evaluation procedure (see Section 8). Furthermore, we also demonstrate that iteratively refining a mesh is inherently memory I/O bound, while our algorithm utilizes hardware tessellation in order to avoid this limitation. We have presented a novel method of GPU-based rendering of arbitrary Catmull-Clark surfaces. In contrast to previous algorithms, our method is exact and implements the full RenderMan specification of Catmull-Clark surfaces, including arbitrary base mesh topology, semisharp creases, and hierarchically defined detail. We also presented a variant of the algorithm that produces watertight positions and normals, allowing for the crack-free rendering of displaced surfaces. We demonstrated the method on feature-film-quality models, and showed that even for such complexity we are able to generate nearly one billion triangles per second.. Though this article has focused on feature film applications, we believe our algorithm can be effectively used to increase the realism and cinemagraphic experience in the next generation of games. Our implementation uses DirectX 11 running under Windows 7. We used Direct Compute for GPU subdivision and the Direct3D 11 graphics pipeline to access the hardware tessellator. All GPU code was written in HLSL, and all timing measurements were made on a NVIDIA GeForce GTX 480. Timings are provided in milliseconds and account for all runtime overhead except for display of the GUI widgets, text rendering, etc. The problem of GPU-based rendering of Catmull-Clark surfaces has received considerable attention in recent years. We separate these approaches into three categories: global mesh refinement, direct evaluation, and approximate patching. Global mesh refinement implements subdivision according to its standard definition. A base mesh is repeatedly (possibly adaptively) refined until the mesh achieves a sufficient density and then the resulting faces are rendered. The work of Bunnell [2005] , Shiue et al. [2005] , and Patney and Owens [2009] belong to this category. Global refinement schemes require significant memory I/O to stream control mesh data to and from GPU multiprocessors and global GPU memory (i.e., on-and off-chip). We demonstrate in Section 8 that performing global refinement iteratively is severely limited in performance as memory bandwidth becomes the bottleneck.. By leveraging the eigenstructure of a subdivision matrix Stam [1998] developed a method for directly evaluating subdivision Feature-Adaptive GPU Rendering of Catmull-Clark Subdivision Surfaces • 6:3 surfaces at arbitrary parametric values. In order to apply this approach, a control mesh must have isolated extraordinary vertices. This means that two global refinement steps must be applied to an arbitrary control mesh (only one for a quad mesh) as a preprocess. Afterwards, Stam's algorithm can be easily implemented on the GPU using hardware tessellation. First, patch data must be transformed into eigenspace, making subsequent watertight boundary evaluation problematic. To do patch evaluation, one of three possible sets of precomputed eigenbasis functions must be evaluated. While this is feasible, the complexity of the algorithm and significant amount of computation limit performance; see Section 8. Furthermore, extending this approach to the evaluation of semisharp creases and hierarchical details remains a formidable challenge.. Another direct evaluation approach has been proposed by Bolz and Schröder [2002] originally targeting the CPU. Their approach exploits the fact that subdivision surfaces are linear functions of control point positions, meaning that a basis function can be associated with each control point. These basis functions must be generated for all patch configurations. In order to keep basis function count within limits they require extraordinary vertices to be isolated. They indicate that approximately 5300 tables for the basis functions are required restricting vertex valence for interior patches to 12. Evaluation of surface points and derivatives is therefore reduced to dot products of the table values with control point positions. Extending their method to accommodate semisharp creases and hierarchical detail is problematic for several reasons. First, since crease sharpnesses can take on fractional values, there are an unbounded number of potential basis functions, meaning that the tables must be precomputed in a mesh-dependent fashion, and the number of distinct tables can be very large. More fundamental is the fact that hierarchical detail coefficients are represented in local surface frames (refer to Forsey and Bartels [1988] ), implying that the surface is no longer linear in the control vertices, and hence basis functions do not exist.. In anticipation of hardware tessellation, Loop and Schaefer [2008] noted the high cost of direct evaluation and the need for pretessellator subdivision. They proposed an approximation to a quads-only Catmull-Clark limit surface based on bicubic Bézier patches. Several variants along these lines have appeared with various improvements to the restrictions on mesh connectivity or underlying surface algorithm. For instance, a quads-only method was described by Myles et al. [2008b] and Ni et al. [2008] , a method to handle a mixture of triangles and quads was presented by Loop et al. [2009] , and Myles et al. [2008a] offer a method to deal with pentagonal patches as well as quads and triangles. Finally, the case of infinitely sharp creases in the context of an approximate Catmull-Clark subdivision on the GPU was handled by Kovacs et al. [2009] .. It has been understood for decades that adaptive tessellation requires a specific strategy for eliminating cracks [Catmull 1974 ] at boundaries between distinct tessellation densities. Since a goal of our work is to create adaptive, crack-free renderings, our method is similar to that of Von Herzen and Barr [1987] , where the notion of restricted quadtrees was introduced. A quadtree is said to be restricted if the subdivision levels of adjacent cells differs at most by one. With this restriction it is relatively easy to avoid cracks; fortunately the pattern of subdivision that naturally arises in our algorithm ensures this condition.

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Nonlinear image representation for efficient perceptual coding Abstract-Image compression systems commonly operate by transforming the input signal into a new representation whose elements are independently quantized. The success of such a system depends on two properties of the representation. First, the coding rate is minimized only if the elements of the representation are statistically independent. Second, the perceived coding distortion is minimized only if the errors in a reconstructed image arising from quantization of the different elements of the representation are perceptually independent. We argue that linear transforms cannot achieve either of these goals and propose, instead, an adaptive nonlinear image representation in which each coefficient of a linear transform is divided by a weighted sum of coefficient amplitudes in a generalized neighborhood. We then show that the divisive operation greatly reduces both the statistical and the perceptual redundancy amongst representation elements. We develop an efficient method of inverting this transformation, and we demonstrate through simulations that the dual reduction in dependency can greatly improve the visual quality of compressed images. We have proposed the direct use of divisive normalization in transform coding. This nonlinear augmentation of a traditional linear transform leads to a substantial reduction in the both the perceptual and statistical dependencies between the coefficients of the representation. The combination of these two improvements implies that subsequent scalar processing and encoding of the coefficients can be nearly optimal in terms of both bitrate and perceptual distortion.. We have studied the analytic invertibility of the divisive normalization representation, and proposed an efficient algorithm based on series expansion. When using a moderate size blocktransform the analytical inversion is computationally affordable, but when using a wavelet basis, the series expansion inversion is the better choice. We also derived the general condition for the normalization to be invertible and showed that the proposed psychophysically derived normalization is invertible. The empirical results on a large natural image collection suggest that quantization does not generally interfere with invertibility. However, it is still possible that inversion could fail on some particular images at some levels of quantization. In these cases, the invertibility condition is a practical tool to detect this problem and solve it by slightly adjusting the bit rate.. Finally, image coding results suggest that a straightforward uniform quantization of the normalized coefficients using the psychophysically inspired parameters is a simple and promising alternative to the current transform coding techniques that use perceptual information in the image representation and quantizer design. These results show that removing or reducing the (statistical and perceptual) dependence in linear transforms makes a big difference in the quality (or bit rate) of the reconstructed images.. The ability of the proposed representation to reduce the statistical dependence among the coefficients may alleviate the need for more sophisticated methods to extract any residual statistical relationships amongst the linear transform coefficients. Nevertheless, the results reported here could be improved by trying to exploit the statistical relations that may remain in the nonlinear representation. However, it has to be stressed that the current techniques that exploit the redundancies in transform domains [8] - [10] should be substantially changed as the statistical nature of the signal in the nonlinear representation is different [39] .. Future work should consider alternative methods of estimating the parameters of the normalization (e.g., the statistical approach in [38] ) which may improve the statistical benefits of the representation while retaining its perceptual properties. This effort is related to the development of more accurate statistical models for natural images. Finally, the properties of the proposed normalized representation may be useful in other image processing problems (e.g., denoising or texture analysis and synthesis) where both the perceptual and statistical properties of the coefficients are of fundamental importance. ACKNOWLEDGMENT J. Malo would like to thank the co-authors for their patience while he was slowly writing the manuscript (you just have to consider the fact that Fig. 7 represents the evolution of 15 years of perception based image coding; therefore, one year delay is not that much).

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Security architectures revisited Abstract In the last decade, several (operating) system projects were well underway to build platforms for applications with very high security requirements. Examples include DSSA (Digital Systems Security Architecture [5] ), Trusted Mach [2] , and BSA (BirliX Security Architecture [7] ). None of them was used in practice, at least not in notably large scale.. One reason may be the (right or wrong) perception that such systems were and -despite the events on September 11th -are not needed. Another reason may be that the technology to build such systems was not mature enough at the time.. This paper claims that today the knowledge to build such a platform is well established in the operating-systems community and that the required technologies have significantly matured over the recent years. However, they still need to be combined into a proper architecture. The remainder of the paper shortly states my view of the requirements for a small secure platform and discusses the needed technologies and their status. It finally puts these ingredients together into a general-purpose small secure platform and explains the use in a dedicated embedded system. For related work, we will concentrate on security architectures, i. e., on the integrative usage of the key technologies rather than adding more references to the technologies per se. We will skip closed-language-based systems and real-time systems that employ separation techniques in similar ways (such as Oncore System's and DROPS' realtime variants of Linux). In my view, IBM's and VMWare's implementations of virtual machines and completely new implementations such as the EROS operating system come closest to what I claimed to be desirable. However none of these comes anywhere near to some derivatives of MULTICS and to the very well-written descriptions of the DSSA. The most complete integrative implementation of a Nizza-like architecture is probably Christian Stüble's Perseus [13] .

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ASAM: Automatic architecture synthesis and application mapping This paper focuses on mastering the automatic architecture synthesis and application mapping for heterogeneous massively-parallel MPSoCs based on customizable applicationspecific instruction-set processors (ASIPs). It presents an overview of the research being currently performed in the scope of the European project ASAM of the ARTEMIS program. The paper briefly presents the results of our analysis of the main problems to be solved and challenges to be faced in the design of such heterogeneous MPSoCs. It explains which system, design, and electronic design automation (EDA) concepts seem to be adequate to resolve the problems and address the challenges. Finally, it introduces and briefly discusses the ASAM design-flow and its main stages.Index Termsembedded systems, heterogeneous multiprocessor system-on-chip (MPSoC), customizable ASIPs, architecture synthesis, MPSoC and ASIP design automation; The recent spectacular progress in semiconductor technologies has enabled implementation of increasingly complex multiprocessor systems on single chips (MPSoCs). New important opportunities have been created: the traditional applications can now be served much better, and numerous new sorts of systems became technologically feasible and economically justified.. However, in parallel, unusual silicon and system complexity has been introduced. This complexity results in a number of new difficult issues to be addressed such as ensuring high-quality and validation of the highly complex systems; adequately addressing the MPSoC energy crisis, and increased leakage power; resolving the interconnect scalability problems and on-chip communication problems; adequately accounting for the dominating influence of interconnects and communication on major physical system characteristics; and substantially decreasing the high system development and production costs, and long development times.. Moreover, for the new highly-demanding applications increasingly complex and sophisticated MPSoCs are required to perform real-time computations to extremely tight schedules, with high demands regarding energy, area, costs and devel-opment efficiency. Many of the MPSoCs are required to be highly flexible. The modern complex embedded applications typically include many various parts and numerous different algorithms involving various kinds of information processing. They are from their very nature heterogeneous. Consequently, to implement these complex and demanding heterogeneous applications effectively and efficiently, the heterogeneous application-specific multi-processor system approach should be used.. This paper focuses on mastering the MPSoC architecture design for such highly-demanding embedded applications. It presents an overview of the research being currently performed in the scope of the European project ASAM (Architecture Synthesis and Application Mapping for heterogeneous MPSoCs based on adaptable ASIPs) of the ARTEMIS program. The paper briefly presents the results of our analysis of the main problems that have to be solved and challenges to be faced in the design of such heterogeneous MPSoCs. It explains which system, design, and electronic design automation (EDA) concepts seem to be adequate to resolve the problems and address the challenges. Finally, it introduces and briefly discusses the design-flow and its main stages proposed by the ASAM project consortium to enable effective and efficient solution of these problems. In the former sections an overview has been presented of the research results of the European project. Due to a limited length of the paper, we had to focus on only the main unsolved problems and only the main solution concepts. Many more research results have been produced by the ASAM consortium than these once briefly discussed in this paper. They include results related to such important problems as energy consumption management, application analysis and restructuring or actual automatic coherent SW and HW co-development. More information on the research results from ASAM can be found in several already published papers with links to them at the ASAM home-page (http://www.asam-project.org/), a few more specific papers in this conference [27] [28] [29] , [31] , [32] , and several papers under preparation.

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Multiple Comparisons in Induction Algorithms A single mechanism is responsible for three pathologies of induction algorithms: attribute selection errors, overfitting, and oversearching. In each pathology, induction algorithms compare multiple items based on scores from an evaluation function and select the item with the maximum score. We call this a multiple comparison procedure (MCP). We analyze the statistical properties of MCPs and show how failure to adjust for these properties leads to the pathologies. We also discuss approaches that can control pathological behavior, including Bonferroni adjustment, randomization testing, and cross-validation. This paper defines and analyzes multiple comparison procedures (MCPs). 1 MCPs are ubiquitous in induction algorithms as well as other AI algorithms. MCPs have important statistical properties, and failure to adjust for these properties produces three pathologies of induction algorithms-attribute selection errors, overfitting, and oversearching.. The contribution of this work is to identify a single statistical mechanism underlying these pathologies. All induction algorithms implicitly or explicitly make statistical inferences, but nearly all make them incorrectly. Understanding why these inferences are incorrect explains the pathologies themselves, identifies potential solutions, and explains why previously proposed solutions have succeeded and failed. Several previous theories and empirical findings in machine learning and statistics implicate the statistical properties of multiple comparison procedures as the cause of pathologies in induction algorithms. Our work provides explicit proof of some prior qualitative explanations. For example, overfitting, oversearching, and attribute selection errors have often been attributed to "fluke" relationships. The statistical properties of MCPs explain the frequency of those flukes and indicate effective solutions. In other cases, previous work lends support to the notion that MCPs have an important influence on the credibility of induced models. For example, the Vapnik-Chervonenkis dimension and minimum description length principle point toward the number of comparisons n as an important factor in overfitting. Finally, our explanation of the mechanism behind overfitting, oversearching, and attribute selection errors is enhanced by looking at two related concepts: overfitting avoidance as bias and the bias-variance tradeoff. Each of these points is elaborated below.

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Subjectively adapted high capacity lossless image data hiding based on prediction errors Abstract This article reports on a lossless data hiding scheme for digital images where the data hiding capacity is either determined by minimum acceptable subjective quality or by the demanded capacity. In the proposed method data is hidden within the image prediction errors, where the most well-known prediction algorithms such as the median edge detector (MED), gradient adjacent prediction (GAP) and Jiang prediction are tested for this purpose. In this method, first the histogram of the prediction errors of images are computed and then based on the required capacity or desired image quality, the prediction error values of frequencies larger than this capacity are shifted. The empty space created by such a shift is used for embedding the data. Experimental results show distinct superiority of the image prediction error histogram over the conventional image histogram itself, due to much narrower spectrum of the former over the latter. We have also devised an adaptive method for hiding data, where subjective quality is traded for data hiding capacity. Here the positive and negative error values are chosen such that the sum of their frequencies on the histogram is just above the given capacity or above a certain quality. This paper has introduced a high-capacity reversible data hiding algorithm, based on the shifted prediction error histogram. It's ability for adaptively trading capacity for quality, makes sure the highest required capacity is gained at the cost of least quality degradation. Moreover, working on the prediction error histogram, visibility of the hidden data is masked by the texture and edges of the cover image. It was shown that the proposed method outperforms almost all the known reversible data hiding methods and working on pixel differences, the subjective quality of the marked image is even more impressive.. The high capacity of the proposed method is mainly due to the fact that the histograms of predicted error pixels are very peaky. This not only increases the data hiding capacity, but due to narrower density distribution of errors, the marked image is less distorted. Designing of more efficient predictors, particularly better matched to image texture, will undoubtedly improve both the data hiding capacity of the system and the subjectively quality of the marked images.. per a Universitats i Recerca de la Generalitat de Catalunya) and at the Departamento de Ingeniería de Sistemas y Automática de la Universidad de Valladolid, in both cases as an invited lecturer. He was an assistant lecturer at the UAB from September 1994 to October 2001. Since October 2001, he is at the UOC (Universitat Oberta de Catalunya) and has achieved the position of Associate Professor. Since October 2002, he is also the Director of the Master Programme in Free Software which is currently offered at the UOC. His current teaching activities are mostly related to free and open source software and has participated in several forums and conferences concerned with this field. His current interests include Free Software and Open Source Software and information security, copyright protection schemes, and steganography. He has published several research papers in different international conferences and journals. He has participated in several national joint research projects both as a contributor and as a manager (main researcher). He has also experience in European projects, such as the European Network of Excellence of Cryptology or the SELF project of the FP6.. Mohammad Ghanbari (M'78-SM'97-F01) is a Professor of Video Networking in the Department of Computing and Electronic Systems, University of Essex, United Kingdom. He is best known for the pioneering work on two-layer video coding for ATM networks, now is known as SNR scalability in the standard video codecs, which earned him the Fellowship of IEEE in 2001. He has registered for eleven international patents and published more than 400 technical papers on various aspects of video networking. He was the corecipient of A.H. Reeves prize for the best paper published in the 1995 proceedings of IEE in the theme of digital coding. He was also a coinvestigator of the European MOSAIC project studying the subjective assessment of picture quality, which resulted to ITU-R Recommendation 500. He is the co-author of Principles of Performance Engineering, book published by IEE press in 1997, and the author of Video coding: an introduction to standard codecs, book also published by IEE press in 1999, which received the

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Parallel view-dependent tessellation of Catmull-Clark subdivision surfaces We adaptively subdivide faces of a Catmull-Clark subdivision mesh until the screen-space geometric criterion is met. Using a parallel approach to the subdivision procedure, we are able to obtain interactive performance for complex real-life models. Moreover, we ensure that the subdivided mesh is free of cracks and T-junctions.We present a strategy for performing view-adaptive, crack-free tessellation of Catmull-Clark subdivision surfaces entirely on programmable graphics hardware. Our scheme extends the concept of breadth-first subdivision, which up to this point has only been applied to parametric patches. While mesh representations designed for a CPU often involve pointer-based structures and irregular perelement storage, neither of these is well-suited to GPU execution. To solve this problem, we use a simple yet effective data structure for representing a subdivision mesh, and design a careful algorithm to update the mesh in a completely parallel manner. We demonstrate that in spite of the complexities of the subdivision procedure, real-time tessellation to pixel-sized primitives can be done.Our implementation does not rely on any approximation of the limit surface, and avoids both subdivision cracks and T-junctions in the subdivided mesh. Using the approach in this paper, we are able to perform real-time subdivision for several static as well as animated models. Rendering performance is scalable for increasingly complex models. Higher-order surfaces offer numerous advantages as rendering primitives, including ease of modeling and a compact representation. Of these, Catmull-Clark subdivision surfaces form one of the most popular primitives for off-line modeling and rendering. However, the difficulty of robustly subdividing such a surface in an interactive, view-dependent manner has thus far precluded its use in real-time graphics pipelines.. The programmability and peak computational capabilities of a modern graphics processor (GPU) make it an ideal candidate to perform such subdivision. However, GPUs are highly parallel processors, and thus adapting an already complex subdivision algorithm to such a parallel architecture is a challenging task. As a result, previous work in real-time adaptive subdivision has generally tackled less complex primitives such as parametric surfaces (specifically, Bézier patches and PN-triangles) [Patney and Owens 2008; Eisenacher et al. 2009; Schwarz and Stamminger 2009] . While this previous work has been successful in showing the feasibility of using higher-order surfaces in real-time graphics pipelines, we believe the advantages of Catmull-Clark surfaces over other higher-order surfaces (Section 2.1) motivate its use in future graphics pipelines as the higher-order surface of choice. In this work we describe our system for performing view-adaptive, crack-free tessellation of Catmull-Clark subdivision surfaces entirely on the GPU.. Like previous work, we use a breadth-first subdivision strategy to parallelize within a subdivision step. However, Catmull-Clark subdivision surfaces present multiple challenges over and above previous work. These challenges include maintaining a mesh-based data structure instead of a list of smaller primitives (patches), allowing the inherent dependence of each subdividing face on its 1-ring neighborhood, and avoiding cracks and T-junctions. In this paper, we address these problems.. Contribution Our main contribution in this paper is a simple yet robust framework to perform an all-quad view-adaptive tessellation for subdivision surfaces on a highly parallel graphics processor. This is a hard problem due to the lack of a straightforward parallelization (as in the case of parametric patches), the absence of efficient GPU data structures for performing parallel surface subdivision, and the vulnerability to subdivision cracks. While previous techniques to subdivide surface meshes using GPU resources have either been highly specialized (fixed number of subdivision levels, limit surface tessellation for a few finite cases) or approximate, our approach is highly generic and completely flexible. We have carefully chosen a compact but intuitive data structure to maintain the subdivision mesh, and perform updates to this structure in a completely parallel fashion. We also present a data-parallel technique that uses templates given by Schneiders [1996] to completely avoid cracks by eliminating T-junctions in the subdivided mesh. We demonstrate the validity of our strategy by achieving real-time performance for several real-life models. We have presented a simple and generic data structure and algorithm that helps to perform recursive subdivision of Catmull-Clark meshes entirely on a GPU. Our scheme uses fairly regular data structures and carefully manages updates to ensure maximal parallelism. Subdivision is divided into a sequence of four broad steps, which link directly to the conceptual definition of subdivision sur- faces. We are able to use this approach to demonstrate real-time rendering performance for several complex models.. We have also generalized the idea of performing programmable surface tessellation using breadth-first subdivision to include CatmullClark meshes, thereby extending its scope to a richer domain of 3D modeling. We have also shown how the crack prevention operation can be effectively parallelized. Our work presents an alternative to fixed-function hardware tessellation; one potential outcome of our work could be the adoption of programmable tessellation as a common operation in real-time graphics.. Finally, we see our work as part of a larger effort to study efficient data structures for programmable graphics on a GPU. Research in this area is still in infancy, and we hope that our ideas like ours will encourage further development of techniques to efficiently handle the irregular execution and data management tasks often encountered in graphics, and map them to a massively parallel GPU architecture. From our results, our first observation is the consistently linear dependence between the size of the final mesh and the time taken to subdivide to it. This performance characteristic is similar to what is observed for parametric surfaces [Patney and Owens 2008] , which is encouraging because it follows our original goal of extending breadth-first subdivision to subdivision surfaces. Also, as the complexity of the subdivision workload increases, performance improves towards its peak of approximately 2.5-3 MFaces/s (Figure 8(b) and 8(c) ). This suggests that our parallel approach to subdivision scales well with hardware, and can be expected to perform better as GPU capabilities improve.. While performance achieved by our implementation could be optimized to more impressive numbers, this is not our primary contribution. We have provided a data structure and an associated algorithm to efficiently perform breadth-first subdivision in a completely parallel environment. It has several advantages over related implementations found in literature: • In our approach, we do not need to maintain unreasonable amounts of extra storage for the mesh: only three main data structures are sufficient. Moreover, our data structure does not rely on variable-size neighbor lists, and hence has a constant element size. At no point during runtime do we need to loop through any list of unknown size.. • We always maintain the mesh as a set of quads, even after performing view-adaptive updates. This keeps the subdivision process uniform and permits drawing the entire mesh in a single draw call. An all-quad mesh is also well-suited to Reyes-like applications, where the subdivided mesh is evaluated further (diced) before rendering. Having non-quads in the mesh makes dicing a much harder problem.. • Using our technique, we can obtain completely watertight subdivision -there are no subdivision cracks or T-junctions. Moreover, elimination of cracks also happens completely in parallel, and is thus well-suited to data parallel systems.. • Our data structure allows generalized subdivision. Little preprocessing is needed, and there are no assumptions or approximations on the input. We expect it to be straightforward to extend our technique to other forms of refinement, such as Loop and Doo-Sabin.. Limitations Inefficient memory accesses are our biggest performance limitation. Many accesses in our code are uncoalesced due to non-deterministic mesh layout, and thus hurt performance. Also, since our algorithm needs to perform atomic accesses for data structure updates, we incur a penalty in rendering performance. We believe that performing faster memory accesses is the biggest optimization challenge for our approach. To address this, we are investigating the feasibility of a software-managed geometry cache. The GPU implementation of our approach demonstrates the merits of parallelization-we demonstrate real-time rendering performance for most of our test models, even under animation. This is in spite of the fact that our CUDA programs have not been aggressively optimized, and suffer from several incoherent long-latency memory transactions. Looking at our performance, we believe that our parallelization technique has contributed to maintaining high throughput for real-time tessellation.. Rendering Performance Figures 1 and 10 show examples of rendered images using our approach. The subdivision performance for these cases is shown in Table 2 . Figure 3 shows a subdivision surface rendered from an animated base mesh, and Figure 9 shows how meshes with sharp boundaries (following DeRose [1998] ) and textures fit into our framework. In Figure 8 (a), we have plotted the relationship between the number of faces in the subdivided mesh and the time it takes to perform subdivision and rendering. This relationship is unmistakably linear and is consistent across all models tested. Figures 8(b) and 8(c) graph the performance of subdivision (generated mesh size/subdivision time) with two varying parameters: the subdivision criterion and the screen size of the rendered image. Both have an impact on the complexity of the work load. From the two plots it can be seen that in general, subdivision throughput either improves or is maintained as the workload is increased. The subdivision performance of roughly 2.5-3 MFaces/s is independent of any specific model, and (as a rough measure) is about 2.5 times the performance of recursive subdivision as we previously reported on a less powerful GPU (GeForce 8800 GTX) [Patney and Owens 2008] . In recent years, several efforts have been made to dynamically subdivide Catmull-Clark meshes for rendering on a GPU platform [Shiue et al. 2005; Bunnell 2005; Bolz and Schröder 2002] . These implementations perform view-dependent subdivision on every frame of rendering, and thus do not suffer from the many of the issues described in Section 2.1. The earliest work from Bolz and Schröder [2002] first performs subdivision on the CPU, and then renders the generated polygons using a GPU. This approach suffers from both the cost of transferring the geometry to the GPU as well as a lack of viewpoint awareness.. Our work is more similar to that of Shiue et al. [2005] and Bunnell [2005] , who both use GPU shaders to perform dynamic subdivision on the GPU. However, apart from the improved performance, there are two main differences from our work. First, while both these implementations use multiple textures to store the base mesh as 'patches,' we perform subdivision without modifying the original mesh structure. This makes animation a much easier task (Figure 3 ), since there is no need to modify a vertex at multiple locations. In general, the resulting data structures also become much easier to manage. Secondly, unlike the prior work, we perform subdivision without using precomputed lookup tables, so we have no limitations on either the number of subdivision levels, or the va-lence of input faces. Our implementation is thus more general in comparison.. There has also been prior work in high performance adaptive subdivision of Catmull-Clark surfaces for ray tracing [Benthin et al. 2007] . Although the approach in this paper also performs viewadaptive subdivision, it appears that the granularity of subdivision is coarse (constant for a face) and hence expected to generate a comparatively denser target mesh. Moreover, since the authors' subdivision technique is tuned for ray tracing, it is unclear how the design trade-offs will translate to a rasterizer-based rendering environment.. The closest work to our own performs software tessellation using GPU computing techniques [Patney and Owens 2008; Eisenacher et al. 2009; Schwarz and Stamminger 2009] . Research in this area has gained significant popularity due to its impressive performance for real-time applications, as well as the flexibility of a completely programmable implementation. The central idea is the reformulation of tessellation as a breadth-first task, which provides ample parallelism for acceleration using a GPU architecture. However, prior to our work, all work in this domain is restricted to parametric surfaces, which have several disadvantages compared to subdivision surfaces (Section 2.1). There is no obvious extension to subdivision surfaces, except through the approximation by Loop and Schaefer [2008] . Their approach regularizes the workload, which lends to robust rendering performance for real-time applications. However, the resulting tessellated surface is approximate and in general does not possess the same continuity as the limit surface. This is overcome by using a different approximation for tangent patches, which suppresses visual artifacts due to lack of proper continuity. We do not make these approximations, so surfaces tessellated using our technique follow properties of the limit surface.. Loop and Schaefer's approximation also forms the basis for hardware-supported Catmull-Clark subdivision in the upcoming Direct3D 11 pipeline [Microsoft Corporation 2008] . This API adds three new stages to the rendering pipeline, which allow for programmable tessellation of parametric patches, and through this approximation, Catmull-Clark surfaces as well. The tension between hardware acceleration's superior performance and efficiency vs. software's superior flexibility is broader than this paper and by no means settled, but we look forward to carefully comparing our implementation against DirectX 11 implementations when they are available.

O O O O B B I O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B B I O O O O O O O O O O O O O O O O O O O O B B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


New perspectives in autonomic design patterns for stream-classification-systems Nowadays, systems are growing in size and are becoming more and more complex. Such a complexity suggests a new need for mechanisms that enable the system to self-manage, freeing administrators of low-level task management whilst delivering an optimized system. Autonomic systems sense their operating environment and automatically take action to change the environment or their own behavior. They are able to achieve it with a minimum of human effort. This is because they are: self-configuring, self-healing, selfoptimizing and self-protecting. Current autonomic systems are ad hoc solutions: each system is designed and implemented from scratch i.e., there are not standard (or wellestablished) methodologies that autonomic system designers and/or programmers can exploit to drive their work. In this paper, we propose a design pattern that can be easily exploited by the stream-classification-systems designer to achieve autonomicity with a minimal effort. The pattern is described using a java-like notation for the classes and interfaces. A simple UML class diagram is depicted. The growing size and complexity of current systems suggests a new need for mechanisms able to automatically adapt the systems to new scenarios. A need for mechanisms making the systems self-managing in order to overcome their rapidly growing complexity and to enable their further growth. Indeed, the management of such systems, characterized by a huge size and complexity, is too difficult and expensive to be done by using human operators only. On the other hand, the autonomic systems sense their operating environment and take action to change the environment or their own behavior with a minimum effort. This is because they are able to adapt themselves to new, somehow not previously taken into account, situations. Autonomic Computing is an initiative started by IBM in 2001, with the presentation of its manifesto [4] . Its ultimate aim is to create self-managing computer systems to overcome their rapidly growing complexity and to enable their further growth. The manifesto states that a system, to be autonomic, must have the following properties (that are simply listed because their analysis is beyond the scope of this paper): self-configuring, selfhealing, self-optimizing and self-protecting. The IBM researchers outlined in the autonomic manifesto and in the "Vision" paper [5] , the main aspects characterizing the autonomic computing:. • the features that an autonomic system should have;. • a possible evolution path for the autonomic computing (five evolution steps: base, managed, predictive, adaptive, autonomic);. • a highly abstract structure of an autonomic element ( Figure 1 ).. Nevertheless, they did not provide any programming model or (behavioral) design pattern to ease the work of autonomic application (or system) designers. The lack of design and implementation methodologies for autonomic computing brings about a very expensive design and implementation of autonomic system. Current autonomic systems can be considered ad hoc solutions: each system is designed and implemented from scratch. In this paper, we propose a generic autonomic pattern for stream-classification-systems (SCS) that can be easily exploited by SCS designers to achieve autonomicity with a minimal effort. The streamclassification-systems are designed to analyze streams of data and to classify each stream item depending on a specific classification policy. A traffic shaper [1] is a good example of these kind of systems. The packets come into the shaper, it first assigns them a priority (w.r.t. some traffic classification rules) and then it chooses how to manage them. Some packets can be put inside higher priority queues, others in lower priority queues and/or can be discarded by the system because are unsuitable for the traffic shape it has to provide. The pattern provided is a generic solution that can be easily adapted to specific situations. This paper is organized as follows: in Section 2 we present the proposed pattern describing its fundamental entities. In Section 3 we shortly introduce related work and in Section 4 we draw our conclusion sketching the path for possible future work. In this paper, we presented a pattern easing the design and the implementation of autonomic stream-classificationsystems. The pattern can be easily incorporated into the design and implementation process packaging it inside a component (or a library) around which develop the autonomic SCS. An interesting direction for future research concerns meta-programming and Aspect Oriented Programming: code transformation tools that, starting from a set of high level specification, are able to generate the code needed to provide autonomic behavior to certain class of systems. In this section we present some works that deal with different aspects of autonomic systems and their design. Sterritt and Bustard in their paper [9] discuss the type of system architecture needed to support such objectives. They propose a design template based on a simple characterization of autonomic systems. In [3] , Gilbert exploits the analogy of autonomic human behavior with object behavior as an abstraction used to identify opportunities for concurrency. The paper provides a pattern that exploit such abstraction. In [6] is presented a technique to approximate the form of the data stream distribution. Their estimation can lead to a good data classification, but their proposal has not autonomic features. Pendarakis et al. [7] propose a characterization of the traffic generated by distributed applications. They present a system for autonomic management of network resources (such as local link bandwidth) to effect a desired balance between concurrently executing processes on a stream processing node. Solomon et al. [8] outline a component-based architecture for autonomic computing and propose a set of seven components for building autonomic systems. While our approach focus on the programming model of autonomic SCSs, they propose a general architecture for autonomic applications.

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Statistical Properties of Factor Oracles Abstract. Factor and suffix oracles have been introduced in [1] in order to provide an economic and efficient solution for storing all the factors and suffixes respectively of a given text. Whereas good estimations exist for the size of the factor/suffix oracle in the worst case, no average-case analysis has been done until now. In this paper, we give an estimation of the average size for the factor/suffix oracle of an n-length text when the alphabet size is 2 and under a Bernoulli distribution model with parameter 1/2. To reach this goal, a new oracle is defined, which shares many of the properties of a factor/suffix oracle but is easier to study and provides an upper bound of the average size we are interested in. Our study introduces tools that could be further used in other average-case analysis on factor/suffix oracles, for instance when the alphabet size is arbitrary. Finding a given pattern inside a given text is a classical problem (the pattern matching problem) for which many solutions have been proposed until now. A very important class of solutions relies on the use of indexing structures, i.e. data structures that allow to store the text, to have a fast access to it and to quickly execute certain operations on data. Suffix arrays, suffix automata, suffix trees are classical structures which can be implemented in linear time with respect to the text size.. Still, these structures require a too important (although linear) amount of space. Several techniques for reducing the memory space needed by index implementation were developed (see [4] for a survey). Language approximation is one of these techniques, and factor/suffix oracles (introduced in [1] ) are one way to illustrate it. Whereas suffix arrays, suffix automata and suffix trees owe their efficacity to their perfect accuracy when answering to the question "Is the word w a suffix (or a factor) of the stored text?", the factor/suffix oracles are only accurate when they provide the negative answer. The language each of them recognizes is larger or equal to the set of factors/suffixes (respectively) of the text, but their size is very small. The words accepted by a factor/suffix oracle which are not factors/suffixes of the stored text will be termed by-products.. A simple, space economical and linear on-line algorithm to build oracles is given in [1] , together with some applications to pattern matching. Other applications to pattern matching, finding maximal repeats and text compression can be found in [8] , [9] , [10] and [11] . A linear compression algorithm, improving the previous quadratic algorithms proposed in [2] and [3] , to transform a suffix tree into an oracle can be found in [16] . Another algorithm, based on Ukkonen's algorithm to build a suffix tree, is given in [5] .. Two ideas come easily out from these applications. On the one hand, oracles should be reasonably envisaged when one has to deal with a text mining problem. On the other hand, evaluating precisely the performances of an application that uses oracles is a hard task, especially in the average case. Although theoretical studies have been performed for the maximum number of transitions [1] and the maximum number of by-products [12] for the oracles of an n-length text, no theoretical study exists in the average case (An experimental study was realized in [12] for the number of by-products). As a consequence, no theoretical average-case runningtime or memory space analysis exists for any algorithm based on oracles. Moreover, experimentally supported conjectures are still open. This is the case, for instance, for the conjecture claiming that the BOM pattern matching algorithm presented in [1] is optimal in the average.. In this paper, we estimate the average number of transitions (i.e. the average space occupancy) of the factor/suffix oracle of an n-length text, when the alphabet size is 2 and under a Bernoulli distribution model with parameter 1/2. In this way, we answer another one of the questions raised in the seminal paper [1] (and raised again in [5] ). The first of these questions, concerning the characterization of the language recognized by the factor/suffix oracle, was answered in [13] .. The paper is organized as follows. In Section 2 we define the factor/suffix min-oracle (which is the classical factor/suffix oracle) and present its main properties. In Section 3, the factor/suffix short-oracle is introduced and is briefly compared to the factor/suffix min-oracle. In section 4, we investigate local properties of the min-and short-oracles and deduce probabilistic results, that we use in Section 5 to estimate the average space occupancy of a short-oracle, and thus of a min-oracle. Section 6 is the conclusion. In this paper, we provide precise approximations for the probabilities that an external transition exists in the min-and short-oracles. These approximations allow us to study the average space occupancy of these oracles. The main goal of such results is to allow comparing the factor/suffix oracle with other indexing structures such as suffix trees, whose space occupancy closely depends on the number of its internal edges, that is known to be of order n/ log 2 (see [7] ). Figure 6 compares our bound on the average number of external transitions to the average number of edges of suffix trees. This latter figure suggests a conjecture of n/3 + 1 for the average number of external transitions of short-oracles. Notice that one of the main open questions arising when studying oracles concerns the number of words, recognized by an oracle, that are not factor or suffixes. Our results should certainly be helpful since the total number of words recognized by a factor oracle expresses as a sum n k=0 N k , where N i is the expected number of words recognized in state i. They satisfy N 0 = 1 and for all 0 < j ≤ n, N j = j i=0 pmin i→j N i . It is still a challenge to solve this latter recurrence. Nevertheless, it is quite easy to design a dynamical programming algorithm yielding an upper bound for the expected number of words recognized by a min-oracle, in the same vein of our bound for the expected number of external transitions.

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