A logic-based framework for attribute based access control Attribute based access control (ABAC) grants accesses to services based on the attributes possessed by the requester. Thus, ABAC differs from the traditional discretionary access control model by replacing the subject by a set of attributes and the object by a set of services in the access control matrix. The former is appropriate in an identityless system like the Internet where subjects are identified by their characteristics, such as those substantiated by certificates. These can be modeled as attribute sets. The latter is appropriate because most Internet users are not privy to method names residing on remote servers. These can be modeled as sets of service options. We present a framework that models this aspect of access control using logic programming with set constraints of a computable set theory [DPPR00]. Our framework specifies policies as stratified constraint flounder-free logic programs that admit primitive recursion. The design of the policy specification framework ensures that they are consistent and complete. Our ABAC policies can be transformed to ensure faster runtimes. Open environments such as the Internet where service requesters are not identified by unique names depend upon their attributes (usually substantiated by certificates) to gain accesses to resources. In order to accommodate this need, many important attribute based access control systems have been designed in the recent past [LMW02b, BS00, BS02, YWS00, YWS01, YWS03]. Also role based [SCFY96, BS04] and flexible [JSSS01, BCFP03] access control systems can be used to specify some aspects of attribute based access policies by exploiting the indirection and the collectability of permissions provided by roles. One of the important aspect of attribute based access control policies is their ability to specify accesses to a collection of services based upon a collection of attributes processed by the requester. Thus the nature of such collections and their properties determines the expressibility of specifiable policies. Some systems such as [LMW02b] model these collections as sets (but with limited structural properties) and others as finite vectors of attributes [BS00, BS02] . Yet others use roles as their primary vehicle of collecting attributes and services. To the best of our knowledge, there is no single model that uses sets as data structures with their algebraic operations (i.e. ∪, ∩, \) to specify attribute based policies. This paper does so by using a version of computable set theory as a constraint system in logic programming.. The version of set theory we use is CLP(SET ), the hereditarily finite and computable set theory developed by Dovier et al. [DPPR00, DPR00, DPR98] . Hereditarily finiteness refers to the fact that sets are constructed out of a finite universe by applying operators such as ∪, ∩ etc. Because our policies refer to attributes and services, we use a two sorted first order language with set variables. The chosen constraint system ensures that set terms satisfy an equality theory with algebraic identities such as the distributivity of unions over intersections etc. As will be seen shortly, because policies are written as stratified constraint logic programs with recursion, they terminate as logic programs. Also the specification language follows the blueprint of the flexible access framework (FAF) [JSSS01], where conflict resolution and default policies are specifiable -thereby ensuring the consistency and completeness of policies.. Fixed point semantics of constraint logic programs assigns one of three truth values true, false and undetermined to every predicate instance. This is unacceptable for an access controller because every access request requires a unique yes or no answer. But we show that the policies we allow are always assigned either true or false. Additionally, constraint logic programs that we use as policies have a NP complete run time, that invite concerns about their utility by access controllers. As a remedy, we show that our policies can be rewritten to yield faster runtimes by applying an appropriate set of unfolding transformations that have the same semantics and runtime advantages as materialized views.. The rest of the paper is organized as follows. Section 2 describes related work. Sections 3 and 4 provides the syntax and semantics of our language. Section 5 describes materialization and policy transformation for execution time efficiency. Section 6 concludes the paper. Requesting remote services in an identity-less open system requires that sets of attributes be presented in order to gain accesses to resources. In order to do so, we propose a stratified logic programming based framework to specify ABAC policies where collections of attribute and service options are modeled as sets in a computable hereditarily finite set theory. Our policies are flounder free, consistent and complete. In order to enhance runtime performance, we transform ABAC polices so that rewritten policies have the same runtimes as executing materialized rules. Our ongoing work explore other computable set theories and efficient implementations.. P. The second condition is vacuously satisfied as, by definition 1 the only rules in which base predicates appear as heads are the ones with empty bodies. Strata n+1: Suppose the inductive hypothesis holds for all instances of atoms of lower ranks and H( c) is an instance of a reserved predicate of rank n+1. Then there must be at least one rule in which the body has at least one reserved predicate with rank n. Choose any such rule cl, say H←C, B. There are two cases to consider. Case 1: Φn ↑ (P) (B( c, c ) (H( c), I ) ∈ MSn(P) for a set I of rule indices. Thus the first condition for MS(P) correctly materializing P is met by satisfying both sides of the by-implication stated in definition 7.. For the second condition, consider any rule cl where H( c) has rank n + 1 and Φω ↑ (P)(B( c, c )) = T . Then it could be shown by induction that Φn ↑ (P)(B( c, c )) = T . Now by repeating the previous part of the argument, if C( c, c ) is satisfiable, then (H( c), I) ∈ MS(P) whereĉl ∈ I, for some rule set index I that containĉl.. Case 2: Φn ↑ (P)(B( c)) = T . This could be so due to one of two factors: (1) Φn ↑ (P)(b( c, c )) = T for some atom b ∈ B. (2) C( c, c) does not hold. If (1) is the case, then by the inductive hypothesis, (b, I) ∈ MSn(P) for any index set I. In either case, the inductive step of algorithm 2 does not add H( c, {ĉl}) into MSn+1(P). Therefore the first condition of correctness criteria in definition 7 holds.. The second condition is satisfied because, as stated the inductive step of algorithm 2 does not add any steps when Φn ↑ (P)(B( c)) = T . The RT framework of Li et al. [LMW02a] is a distributed, identity-less access control specification framework where each role specifies the roles that it contains and/or attributes that are required for membership. They use the predicate isMemeber(x,X) to model that x is a member of the role X. Although the RT syntax does not explicitly support set operations such as ∪, ∩, ⊂, \, they have a notion of intersection roles to specify those attributes that are contained in other roles defined using attribute sets. In contrast, having set operations allows our policies to express set unions and intersections in a more intuitive syntax satisfying structural identities expected of sets. Secondly, RT uses only Horn clauses, thereby preventing the use of set difference operator, consequently preventing from constructing difference roles, whereas we admit limited forms of negations in rule bodies and allow the set difference operator. Furthermore RT is based on a monotonicity assumption where any superset of a set of attributes automatically satisfy the requirements specified by the set, which we do not require. Nevertheless, RT addresses trust propagation and distributing access specifications that we do not have.

O O B O B I I I B I I I O O O O O O O O B O O O O O O O O O O O B I B O O O O O O O O B O O O O O O O O O O B I O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O B B O O O O B O O O O O O O O O O O O B O O O O B O O O B O B I O B O O O O O O O O B O O B O O O O B O B O O O O B O B O O B O B O O O O O O O O O O O O O O O O O O O O O O B O B O O O O O O O O O O B O O O O O O O O O O O O O O O O O B I I I B O O O O O O O O O O O O O O O O O O O O O O B I B O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O B I I I O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O B O O O B O O O O O O O O O O O O O O O B O O O O O O O O O O O O O B O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O B O O B O O O O O B O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O B O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O B B O O B O O O B O O O O O O O O O O O O B O O O O O O O O O O O O O B O B O O O O O O B B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O B O O B O O O O O O O O O B O O O O O O O O O O O B O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O B I O B O O O O O O O O O O B O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O


On Bridging the Gap Between Stochastic Integer Programming and MIP Solver Technologies Stochastic integer programs (SIP) represent a very difficult class of optimization problems arising from the presence of both uncertainty and discreteness in planning and decision problems. Although applications of SIP are abundant, nothing is available in the way of computational software. On the other hand, commercial software packages for solving deterministic integer programs have been around for quite a few years, and more recently, a package for solving stochastic linear programs has been released. In this paper, we describe how these software tools can be integrated and exploited for the effective solution of general purpose SIPs. We demonstrate these ideas on four problem classes from the literature, and show significant computational advantages. Recent years have witnessed widespread use of stochastic programming to address planning problems under uncertainty (Birge & Louveaux 1997 , Kall & Wallace 1994 . In a typical setting, the uncertainty is resolved by specifying a set of scenarios and the problem is reduced to deterministic, albeit large-scale, mathematical program -known as the deterministic equivalent. For linear structures, a wide array of efficient decomposition algorithms have been proposed in the research literature (Birge 1985 , Rockafellar & Wets 1991 , Ruszczyński 1986 , Higle & Sen 1996 , Van Slyke & Wets 1969 and have been successfully implemented in computational software (Birge, Donohue, Holmes & Svintsitski 1996 , Gassmann 1990 , IBM 1998 .. Unfortunately standard stochastic programming decomposition algorithms break down in the presence of discrete problem variables. Such stochastic integer programming (SIP) problems arise, for example, in production planning (Dempster, Fisher, Jansen, Lageweg, Lenstra & Rinnooy Kan 1981 , Lenstra, Rinnooy Kan & Stougie 1983 , Bitran, Haas & Matsuo 1986 , scheduling (Dempster 1982 , Tayur, Thomas & Natraj 1995 , Birge & Dempster 1996 , routing (Spaccamela, Rinnooy Kan & Stougie 1984 , Laporte, Louveaux & Mercure 1989 , Laporte, Louveaux & Mercure 1992 , location (Laporte, Louveaux & van Hamme 1994) , capacity expansion (Ahmed, Parija & King 2002 , Bienstock & Shapiro 1988 , electricity production (Takriti, Birge & Long 1996 , Carøe, Ruszczyński & Schultz 1997 , environmental control (Norkin, Ermoliev & Ruszczyński 1998) , and finance (Dert 1995) . Recently quite a few new algorithms for stochastic integer programming have been proposed. These techniques rely on integer programming duality or Lagrangian duality to decompose the problem, in conjunction with branch and bound or enumeration techniques (Ahmed, Tawarmalani & Sahinidis 2000 , Carøe & Schultz 1999 , Carøe & Tind 1998 , Laporte & Louveaux 1993 , Norkin et al. 1998 . Although these ideas are theoretically promising, a great number of practical issues concerning their successful software implementation remain open. For a detailed discussion of stochastic integer programming, the reader is referred to various survey articles (van der Vlerk 1995 , Schultz, Stougie & van der Vlerk 1996 , Stougie & van der Vlerk 1997 ).. With the scenarios specified, a stochastic integer program is essentially a large-scale structured integer program. Thus, at least in principle, standard deterministic mixed-integer programming (MIP) techniques implemented in commercial software, such as CPLEX (ILOG Inc. 1997) , OSL (IBM 1991) , XPRESS (Dash Assoc. 1999) , are applicable.. General purpose MIP software packages spend a significant amount of time analyzing problem matrix data structures to generate logical relationships existing among cuts (rows) and integer variables automatically. These additional relationships help tighten the underlying formulation, thus minimizing the effort required to close the linear programming (LP) relaxation gap. However, for certain problem formulations, these relationships are too complex to be automatically detected by a commercial solver in reasonable times, thus causing the solver to perform poorly.. The scenario tree structure underlying stochastic integer programs carries complex, hard-todetect but very useful information about important scenarios, implication lists (linking the integer variables) and branching priorities of sets of integers associated with various stages and scenarios.. However, the modelling infrastructure provided by commercial MIP solvers are often inadequate to hold such rich knowledge about the underlying model. Therefore, when existing MIP solvers attempt to solve the specially structured MIPs underlying stochastic integer programs, the exercise is equivalent to discarding the structural knowledge completely, and then computationally re-discovering a small subset of the discarded knowledge at a high price. Therefore, it should not come as a surprise that straightforward application of commercial MIP solvers are doomed to perform terribly on stochastic integer programs.. In 1998, IBM released the first commercial grade stochastic optimization modeling/solver software product, IBM OSL Stochastic Extensions (IBM 1998), or OSLSE, that 1. allows easy modelling of stochastic linear, quadratic and integer programs using scenario tree data structures, 2. allows easy manipulation of tree objects and elements (nodes, scenarios etc), and 3. provides a set of specialized solver algorithms that exploit the underlying tree structure for solving stochastic linear programs effectively.. It has already been demonstrated in (King & Wright 2001 ) that the tree structure in stochastic linear programs makes them amenable to various decomposition algorithms implemented in IBM OSLSE. This motivated us to explore OSLSE as a modelling environment and its integration with a standard MIP solver (OSL MIP) for solving stochastic integer programs. The key challenge is to exploit the stochastic tree structure in improving the problem formulation and to guide the branch and bound process in the MIP solver for effective resolution of the problem.. The remainder of the paper is organized as follows. In Section 2, we briefly describe the underlying general strategy for attacking stochastic integer programs by integrating OSLSE and OSL MIP. The next two sections (Sections 3 and 4) describe the applications of the proposed strategy on two sets of stochastic integer programs from the literature. For both problem sets, we describe problem-specific reformulation techniques to improve the LP relaxation bounds, as well as specialized branching rules to expedite branch and bound convergence. In Section 5, we apply the proposed method to an industrial-scale test problem arising in the planning of machine tool purchases in a semiconductor manufacturing facility. Finally, in Section 6, we consider a class of stochastic dynamic capacity acquisition and assignment problems from the literature. In each of the test cases, we demonstrate significant computational advantages over using straightforward MIP techniques. Finally, Section 7 concludes the paper with some closing remarks. Stochastic integer programs remain among the most formidable problems in mathematical programming. Although progress in developing specialized algorithms is continually being made, a great number of issues remain open before these algorithmic ideas can be implemented in software for solving general purpose SIPs. On the other hand, much has been accomplished in the way of software packages for solving deterministic integer programs as well as stochastic linear programs.. In this paper, we showed how the modelling infrastructure afforded by stochastic linear programming solvers can be integrated with commercial MIP software packages to exploit the knowledge of the scenario tree structure underlying stochastic MIPs. We have demonstrated that the proposed ideas offer significant computational advantage when applied to problem sets from the literature. Each of the above ideas require the ability to manipulate the underlying scenario tree structure in stochastic integer programs. For our implementation, we decided to exploit the flexible architecture of the OSL Stochastic Extension (OSLSE) product to this effect. OSLSE allows one to input the model data by scenarios, define the integer variables as sets associated with the nodes of the scenario tree, prioritize the sets for branching purposes, and devise a node selection strategy that would quickly yield feasible integer solutions to important scenarios (in contrast to a feasible integer solution for the overall MIP). OSLSE aids the MIP preprocessor/solver in the solution effort by transforming the tree structure information into appropriate logical data structures such as implication lists, pseudo costs, sets and priorities, that can be accommodated by the MIP solver. The OSLSE architecture retains the stochastic structure of the problem, thereby allowing easy adaptation of reformulation techniques. Furthermore, the decomposition algorithms in OSLSE greatly expedites the solution of the LP relaxation sub-problems. OSLSE does not have a MIP solver of its own, rather, it uses the MIP solver algorithm in OSL to solve the deterministic equivalent of the underlying stochastic MIP. Moreover, the amount of data associated with the deterministic equivalent of a stochastic MIP can be enormous, hence, OSLSE provides a rich suite of methods for accessing and manipulating data organized by nodes of the scenario tree. Also, the flexible design of OSLSE allows one to reuse existing base OSL tuning strategies (such as branch and node selection user callbacks) in a seamless manner.. In the following four sections, we describe the use of OSLSE in solving four sets of stochastic integer programming test problems.

O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O B I O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O


Fine-grained DVFS using on-chip regulators Limit studies on Dynamic Voltage and Frequency Scaling (DVFS) provide apparently contradictory conclusions. On the one hand early limit studies report that DVFS is effective at large timescales (on the order of million(s) of cycles) with large scaling overheads (on the order of tens of microseconds), and they conclude that there is no need for small overhead DVFS at small timescales. Recent work on the other hand-motivated by the surge of on-chip voltage regulator research-explores the potential of fine-grained DVFS and reports substantial energy savings at timescales of hundreds of cycles (while assuming no scaling overhead).This article unifies these apparently contradictory conclusions through a DVFS limit study that simultaneously explores timescale and scaling speed. We find that coarse-grained DVFS is unaffected by timescale and scaling speed, however, fine-grained DVFS may lead to substantial energy savings for memory-intensive workloads. Inspired by these insights, we subsequently propose a fine-grained microarchitecture-driven DVFS mechanism that scales down voltage and frequency upon individual off-chip memory accesses using on-chip regulators. Fine-grained DVFS reduces energy consumption by 12% on average and up to 23% over a collection of memory-intensive workloads for an aggressively clock-gated processor, while incurring an average 0.08% performance degradation (and at most 0.14%). We also demonstrate that the proposed fine-grained DVFS mechanism is orthogonal to existing coarse-grained DVFS policies, and further reduces energy by 6% on average and up to 11% for memory-intensive applications with limited performance impact (at most 0.7%). Dynamic Voltage and Frequency Scaling (DVFS) is a widely used power reduction technique: DVFS lowers supply voltage (V) and clock frequency (f) to reduce both dynamic and static power consumption. DVFS is being used in commercial processors across the entire computing range: from the embedded and mobile market up to the server market. Example processors are the Intel XScale processor [Intel 2004] , the Transmeta Crusoe [Transmeta Corporation 2001] , the AMD Mobile K6 Plus, the Intel Pentium M, the Intel Sossaman and Woodcrest CMP server processors, and the AMD Opteron Quad-Core processor. Through a limit study, we unify two apparently contradictory results in the DVFS literature, and we find that the effectiveness of coarse-grained DVFS is largely unaffected by timescale and scaling speed, however, fine-grained DVFS at small timescales may lead to substantial energy savings for memory-intensive workloads. We find that finegrained DVFS is effective at a timescale of on the order of tens or hundreds of processor cycles, or on the order of the memory access latency. In other words, energy consumption can be reduced substantially through fine-grained DVFS if the V/f setting can be scaled down upon individual off-chip memory accesses. This requires that the voltage regulators be fast and efficient, which we found to be the case for contemporary on-chip voltage regulators. The potential energy savings for memory-intensive workloads are substantial: 14% on average across a range of performance targets for memory-bound applications on an aggressively clock-gated processor.. Motivated by this insight, we subsequently propose a fine-grained DVFS mechanism driven by a microarchitecture that scales the V/f setting upon individual off-chip memory accesses. Using a mechanistic analytical processor performance model we determine when to scale down the V/f setting: for off-chip I-cache misses, we scale down when the miss occurs, and for off-chip load misses, we scale down when dispatch stalls upon an off-chip load miss at the head of the reorder buffer. This fine-grained DVFS mechanism potentially achieves an on average 12% (and up to 23%) energy reduction for memory-intensive workloads at a small performance degradation (0.08% on average and at most 0.14%); this assumes proactive upscaling, that is, the V/f setting is scaled up to its upper level by the time the off-chip memory access returns. Reactive upscaling, scaling up when the miss returns, leads to an on average 23% (and up to 40%) energy-reduction for an on average 6% performance degradation for memoryintensive workloads. The fine-grained DVFS mechanism assumes on-chip regulators and incurs very little hardware overhead. We also demonstrate that the proposed finegrained DVFS mechanism is orthogonal to coarse-grained DVFS policies, leading to a multitimescale DVFS system: the coarse-grained DVFS policy optimizes system-level objectives such as meeting soft real-time deadlines while minimizing energy consumption, and the fine-grained DVFS mechanism further reduces energy consumption by 6% on average and up to 11% for memory-intensive workloads for an aggressively clock-gated processor (with minimal impact on performance of at most 0.4%). Using the limit algorithm and the setup outlined in the preceding, we now explore the impact of the DVFS timescale granularity and scaling speed on energy efficiency. Energy efficiency in this study is quantified using a Pareto frontier that represents multiple optimal solutions in terms of energy versus performance. For constructing the Pareto frontier we consider 5 performance targets uniformly spread between the fastest solution (at the highest V/f setting) and the middle point between the fastest and slowest solutions; and for each of these performance targets we then determine the optimal DVFS scheduling that minimizes energy consumption using the DVFS limit algorithm. Figure 3 shows the Pareto frontiers for the ammp, parser, and eon benchmarks; the two curves in each graph represent fine-grained DVFS, assuming on-chip regulators, a 20-cycle timescale granularity, and a 20mV/ns voltage switching speed, versus coarse-grained DVFS, assuming an off-chip regulator 1 and a million-cycle timescale granularity. The vertical axis represents normalized energy consumption (which includes dynamic and static power consumption, regulator loss and DVFS overhead); the horizontal axis represents normalized execution time. These graphs clearly illustrate that fine-grained DVFS leads to substantially lower energy consumption compared to coarse-grained DVFS for memory-intensive workloads. Energy savings through finegrained DVFS go from 42% for ammp to 11% for parser for the same level of performance as coarse-grained DVFS. For compute-intensive applications (see eon), we observe slightly higher energy consumption (because of regulator loss). In what follows, we will quantify energy efficiency as the average normalized energy consumption across these five Pareto-optimal solutions compared to coarse-grained DVFS. The reason for taking the average across multiple Pareto-optimal solutions instead of a single operating point is to cover a broad range of trade-offs in terms of performance versus energy.. The graphs in Figures 4 and 5 explore the impact of DVFS timescale granularity versus voltage switching speed assuming a clock-gated and non-clock-gated processor, respectively. These graphs show average normalized energy consumption on the vertical axis versus voltage switching speed (in mV/ns) on the horizontal axis for different timescale granularities (in clock cycles)-the different curves in Figures 4 and 5 show different timescales and are limited to at most 10,000 cycles for readability (larger timescales show the same result as 10,000 cycles). Energy consumption is barely affected by the timescale granularity for the compute-intensive workloads (see the top graphs in Figures 4 and 5) . However, energy consumption increases substantially with increasing voltage switching speeds. This increase is due to increasing regulator loss as a result of higher voltage switching speeds. The picture is very different for memoryintensive workloads (see the bottom graphs in Figures 4 and 5) . Energy efficiency is very sensitive to timescale granularity, especially for relatively high voltage switching speeds (higher than 5mV/ns). A DVFS timescale granularity on the order of 20 cycles can lead to dramatic reductions in energy consumption, 18% on average for a non-clock-gated processor and around 12% on average for a clock-gated processor.. The key insight from these graphs is that the substantial reduction in energy consumption at small time scale granularities comes from scaling voltage and frequency upon individual off-chip memory accesses. Accessing off-chip memory takes 70ns, or around 170 cycles, for the 2.4GHz processor configuration, and small timescale DVFS exploits the fine-grained slack due to memory accesses. Interestingly, there is an optimum that balances regulator loss and processor energy saving as a function of voltage switching speed. This optimum appears around 20mV/ns, which is the range of feasible on-chip regulator designs according to Kim et al. [2008] . These results confirm and unify the apparently contradictory results reported in prior research on DVFS: energy-efficiency is largely insensitive to the timescale in the case of slow voltage switching speeds, however there are significant energy saving opportunities for memory-intensive applications through fine-grained DVFS at the timescale of tens or hundreds of processor cycles-when applying DVFS at the granularity of individual off-chip memory accesses. The switching speeds offered by existing on-chip regulators are in a speed range that enables dramatic energy savings for memory-intensive workloads. This insight motivates the fine-grained DVFS mechanism as described in the next section. A large body of work has been done on DVFS. In this section, we only describe the work most related to ours. 3.1.1. Benchmarks and Simulator. We use the SPEC CPU2000 benchmarks; the binaries are highly optimized Alpha binaries (taken from the SimpleScalar Web site). To limit the simulation time in our experiments, we use representative 100M-instruction simulation points provided by SimPoint [Sherwood et al. 2002] . We use the SimpleScalar/Alpha v3.0 out-of-order simulator for all of our experiments. We assume a contemporary 4-wide superscalar out-of-order processor configuration; see Table I . Figure 1 shows the nonpipelined fraction of the total execution time: the fraction of the execution time due to off-chip memory accesses for all benchmarks on the baseline 2.4GHz processor-the fraction of the total execution time that is insensitive to DVFS. This graph gives insight into the computation-dominant versus memory-bound behavior of the benchmarks. For the remainder of the article, we classify all benchmarks with a nonpipelined fraction smaller than 30% as compute-intensive; these are the applications on the lefthand side of the graph from eon up to gap. All the other benchmarks on the righthand side of the graph are classified as memory-intensive, from parser (33%) up to ammp (79%).. 3.1.2. Power Model. The dynamic power model is taken from Wattch v1.02 [Brooks et al. 2000] . We consider two power modes: (1) cc0, which assumes that all processor structures consume dynamic power every clock cycle, that is, there is no clock gating, and (2) cc1, which assumes that unused processor structures have no dynamic power consumption-the processor is aggressively clock-gated. A real processor may not be fully clock-gated but may exhibit some degree of clock-gating; in other words, we expect performance and energy results for a real processor to lie between the non-clock-gated and clock-gated processor performance and energy numbers presented in this article. The static power model is taken from HotLeakage [Skadron et al. 2003 ]. Further, we assume a 70nm CMOS chip technology, a nominal V dd,n = 1V supply voltage, and a nominal f n = 2.4GHz clock frequency. Static power varies between 44% of the total power consumption (at the 1V and 2.4GHz operating point) to 63% (at the 0.64V and 0.6 GHz operating point).. 3.1.3. Voltage Regulators. In our setup, similar to Kim et al. [2008] , we assume an offchip regulator that scales down the supply voltage from 3.7V to 1.8V. On-chip regulators scale down the 1.8V supply to a range of 0.64V to 1V. The motivation for this two-step voltage scaling setup is the inherent degradation in conversion efficiency for large step-down ratios. The various V/f settings are shown in Table II .. On-chip regulator loss depends on the power transistor switching frequency (which also determines the voltage switching speed), the output voltage of the regulator, and processor activity. Regulator loss increases with voltage switching speed (see middle graph in Figure 2) ; regulator loss decreases and regulator efficiency increases, with higher output voltages, higher processor activity, and slower switching speeds (see top and bottom graphs in Figure 2 ). In our experiments, we model regulator lossdependence on voltage switching speed, output voltage, and processor activity following the data presented by Kim et al. [2008] . Figure 2 shows these dependences along with the Kim et al. data and the interpolations that we performed to get a picture of the entire on-chip regulator design space.

B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O


Fuzzy analysis of statistical evidence ABSTRACT In this paper we develop a classification method using the fuzzy operators to aggregate attribute information (evidence), and it is named Fuzzy Analysis of Statistical Evidence (FASE). This method is closely related to the Bayesian classifiers. However, the classification is represented by the possibility and belief measures. By employing the possibility measure there is no need for the consideration of prior and there is more mathematical tools can be used. In machine learning when we infer from training sample to population, this is a process of inductive inference. As pointed out by Chen [3] it is more suitable to measure the inductive belief by the possibility measure than the probability measure. If two or more rival hypotheses (classes) are equally likely, then we do not have confidence or belief, which is true. Thus, belief is always a relative measure.. Machine learning algorithms are aiming for higher precision and faster computation. However, with the inconsistency of the data evidence, insufficient information provided by the attributes, and the fuzziness of the class boundary. We do not expect machine learning algorithm or even human expert to make the correct classification all the time. So it is important to have an uncertainty measure to represent our ignorance. In this paper we explore the classification problem from an evidential reasoning point of view. We only investigate a simple model of aggregating attributes information with a common t-norm. However, this approach might suffice in many situations, as shown from the experiments, a precise belief model for the attributes is not very important. The advantage of using the possibility measure over of the probability measure for classification is clearly demonstrated here. Since FASE is noise-tolerant and able to handle missing values with ease, it allows us to consider as many attributes as possible. This is important since many patterns become separable if we increase the dimensionality of data. The belief Bel (C | A) can be interpreted as " If A then C with certainty factor CF". Thus, by extracting the statistical pattern from the data and combine them with the fuzzy inference rule FASE can serve as a link to inductive reasoning (machine learning) and deductive reasoning (expert systems).

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TAIR: Testability analysis by implication reasoning Abstract-To predict the difficulty of testing a wire stuck-at fault, testability analysis algorithms provide an estimated testability value by computing controllability and observability. In most common previous work such as COP and SCOAP , signal correlation between controllability and observability is not well handled. As a result, the estimated values can be quite inaccurate. On the other hand, some previous work can take into account signal correlation but may require more CPU time. This paper discusses an efficient method for testability analysis improvement. Our algorithm starts with results obtained from conventional testability analysis such as COP . For each stuck-at fault, we gradually refine these results by recursively applying some simple signal correlation rules. Experimental results show that, with reasonable run-time overhead, significant improvement for testability analysis can be achieved. The objective of testability measurement is to predict the difficulty for testing a node or a wire. A good measurement can give an early warning about testing problems so as to provide guidance in improving the testability of a circuit by adding test circuits [6] , [20] , [22] , [25] . In addition, the testability measurement can also provide information for random test length analysis.. Normally, testability measurement assigns each node a testability value by computing the node's controllability and observability. The computation can be done by two sweep of the circuit under test (CUT) with some rules. Since only approximate values are provided, testability measurement is less accurate than the time-consuming test generation and fault simulation processes. As a result, for testability analysis to be useful, its run time must be very fast. Usually, the analysis needs to be linear or almost linear to a circuit size.. There has been research [2] , [4] , [5] , [7] , [8] , [10] , [11] , [16] , [17] , [19] , [23] , [24] in the area of testability analysis. The algorithm COP [4] computes a signal probability (controllability) value for each node from primary inputs to primary outputs using a set of formulae. These signal probability values are then used to derive the observability of each node by some rules. For the example in Fig. 1 , COP estimates the 1-controllability of node d to be 1/4 and the observability to be 1/4.. The testability for wire d ! e stuck-at-1 (s-a-1) fault is calculated to be (1=4) 3 f1 0 (1=4)g = 3=16. Due to the reconvergent fanout problem, signal probabilities computed by COP are generally inaccurate. The algorithm PREDICT [24] , on the other hand, tries to improve signal probabilities using the concept of super gates. This results in much higher complexity with more precise testability estimation. The. Manuscript received August 12, 1998 ; revised September 20, 1999 . This paper was recommended by Associate Editor S. Reddy.. The authors are with the Department of Computer Science and Information Engineering, National Chung Cheng University, Chiyai, Taiwan 621, R.O.C.. Publisher Item Identifier S 0278-0070(00)01372-5. testability analysis tool SCOAP [10] does not provide probability-like values; instead, it gives a numeric number which represents the difficulty for testing a node. Without computing the exact value for each signal probability, the cutting algorithm [19] calculates the lower and upper bounds for each signal probability by cutting all multiple fanout branches in the CUT. The Parker-McCluskey algorithm [16] manipulates the symbolic expression for each output to compute both signal and detection probabilities, though the equations may soon become too complex to analyze for large circuits. The improved cutting algorithm [17] combines the cutting algorithm and the Parker-McCluskey algorithm. The algorithm chooses a subset of fanout branches for cutting and others for symbolic manipulation. Both algorithms [17] , [19] are designed to compute signal probabilities which can be further modified to compute the lower bounds of testability measurements by adding an auxiliary AND gate. The AND-gate output will be one if the target fault is sensitized and propagated by a preselected path. The signal correlation between controllability and observability can be considered for detection probability analysis in [16] , [17] , [19] , and [24] . In the example of Fig. 1 , although the controllability values are exact for all the nodes except f , all testability measurements (detection probabilities) are incorrect. This is due to the ignorance of signal correlation between controllability and observability. In addition, two redundant faults, a ! d and a ! f s-a-1 faults, are both assigned nonzero values. In this paper, we address the problem of testability analysis by efficiently taking into account signal correlation. Our algorithm called testability analysis by implication reasoning (TAIR) starts with testability analysis results such as COP [4] . For each single stuck-at fault, the accuracy of testability will be improved by recursively applying some simple rules. Each rule is associated with a formula which characterizes signal correlation. When the condition of a rule is met, we modify the old testability analysis result by using the associated formula. For the example in Fig. 1 , to test the d ! e s-a-1 fault, node a 0278-0070/00$10.00 © 2000 IEEE must be assigned 1 and node d must be assigned zero. TAIR can recognize that these two signal assignments are correlated and then can correct the old result by multiplying a factor of 2/3 to get the exact result, 1/8. The rules are derived from the implication analysis during testing a wire stuck-at fault. Further, these rules are complete in the sense that we always get the same final results regardless of how an implication algorithm is implemented.. Since our emphasis is on detecting efficiently correlation between controllability and observability of a fault, TAIR can benefit from existing algorithms, such as the cutting algorithm [19] and PREDICT [24] , which attempt to improve the accuracy of signal probabilities. Although, in the following context, the method is suggested to improve COP's results, the same principle can be applied to other methods such as PREDICT. Another advantage of TAIR is that the testabilities of many redundant faults can be naturally set to zero. This paper is organized as follows. Section II gives the required background. Section III presents the relationship between testability analysis and signal correlation. Section IV describes the major idea of TAIR and Section V summarizes the algorithm by an example. In Section VI, we discuss the experimental results obtained by computer simulation. Finally, conclusions are given in Section VII. In this paper, we have presented an enhancement algorithm for testability analysis by implication reasoning. The TAIR algorithm starts with the COP results where signal assignments are assumed to be independent. The testability analysis results are then improved by considering signal correlations. Experimental results show that TAIR produces far more accurate testability analysis than COP using very reasonable run-time. The results can be applied to more precisely identify hard-to-detect faults which can then be dealt with by design-for-testability techniques. For example, if a fault is identified as hard-to-detect, it can be solved by inserting appropriate test logic. More precisely identifying these faults will end up with adding test logic at the right places. Also, random test pattern length generally is determined by the faults with small detection probabilities [18] . The testability analysis method proposed in this work tends to better estimate the detection probabilities for hard-to-detect faults as the simulation results demonstrated before. Thus, the random test length determined can be more accurate.

O B O O B O O O O O O B O O O O B O O O O O B O O O O O O O O O O O O O B O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O B O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O B O O O O O O O B O O O O O O O O O O O O O O B O O O O O O O O O B O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O B O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O B O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O B O O B O O O O B O O O O B O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O B O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O B O O O O O O O B O O O O O O O O O O B O O O O O O O O O O O O O O O O O O B O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Flash memory efficient LTL model checking As the capacity and speed of flash memories in form of solid state disks grow, they are becoming a practical alternative for standard magnetic drives. Currently, most solid-state disks are based on NAND technology and much faster than magnetic disks in random reads, while in random writes they are generally not.So far, large-scale LTL model checking algorithms have been designed to employ external memory optimized for magnetic disks. We propose algorithms optimized for flash memory access. In contrast to approaches relying on the delayed detection of duplicate states, in this work, we design and exploit appropriate hash functions to re-invent immediate duplicate detection.For flash memory efficient on-the-fly LTL model checking, which aims at finding any counter-example to the specified LTL property, we study hash functions adapted to the two-level hierarchy of RAM and flash memory. For flash memory efficient off-line LTL model checking, which aims at generating a minimal counterexample and scans the entire state space at least once, we analyze the effect of outsourcing a memory-based perfect hash function from RAM to flash memory.Since the characteristics of flash memories are different to magnetic hard disks, the existing I/O complexity model is no longer sufficient. Therefore, we provide an extended model for the computation of the I/O complexity adapted to flash memories that has a better fit to the observed behavior of our algorithms. Model checking real-life industrial systems is a memory demanding and computational intensive task. Utilizing the increase of computational resources available for the verification process is indispensable to handle these complex systems. The three major approaches to gain more computational power include the usage of parallel computers, clusters of workstations and the usage of external memory devices, as well as their combination.. In this work, we study two model checking problems: reachability analysis and LTL model checking. The aim of reachability analysis is to find an erroneous state of a system or prove that all states satisfy criteria given in the propositional logic. Linear temporal logic (LTL) [55] is a favorite logic for specification of temporal properties of systems. It can express the behavior of whole paths in contrast to properties of single states. The LTL model checking problem can be reduced to the problem of accepting cycle detection in the state space of a finite automaton [19] , i.e., checking for the presence of a cycle containing at least one accepting state. We focus on external memory devices, for which the access to stored information is orders of magnitude slower then the access to information stored in the main memory. Therefore, the complexity of algorithms is measured in the number of I/O operations [1] . Our goal is to develop algorithms that reduce this number. Recent designs of external memory algorithms [56] exploit hard disks to work with large data sets that do not fit into RAM, while flash memory devices in form of solid state disks ask for new time-space trade-offs [3] . In such solid state disks random reads operate at a speed that (in orders of magnitudes) lies between RAM and hard disks; while random writes are much slower and should be avoided.. Mass production for solid state disks has recently started; in the near future prices are expected to drop and storage capacities are expected to rise. To exploit the advantages of flash memory compared to disk access, semi-external LTL model checking algorithms have been adapted in this article. As random reads are fast, flash media are good for outsourcing static dictionaries, but generally not for outsourcing dynamic dictionaries that change with random access over time. By exploiting fast random seeks, we obtain interesting trade-offs between loss of speed and savings in RAM. Due to easiness of parallel disk connection, large capacities of SSDs are possible. 21 We have contributed new approaches to hashing applied to SSDs. The most important observation is that with the advent of SSD technology, immediate duplicate detection becomes applicable, offering more flexibility for the choice of the exploration strategy. Monitoring CPU performance, we observed that hashing strategies preserve ratios of 50% or more, suggesting that I/O waits are present, but not thrashing. With SSDs random access time decreasing, SSDs will likely become fast enough to rise the CPU usage to 100% making the SSD fully transparent to the user.. The standard external memory model of Aggarwal and Vitter [1] hardly covers the discrepancy between (random) reads and writes. We verified the suitability of the flash memory model for predicting the running-time of algorithms using SSD as an external memory, i.e., we could predict on how well the behavior of the algorithms on SSDs corresponds to their theoretical analyses on the flash model. Compression, the best performing strategy, requires substantial main memory, which according to current ratios of space between RAM and SSDs is still no bottleneck. Although we have tested DFS and BFS, our SSD hashing strategies can also be applied to directed model checking approaches [30] to increase the number of states that can be visited.. Directly compared to former I/O-efficient algorithms optimized for magnetic disks there can be a threshold in state space exploration, from which these new approaches pay off on flash disks due to their linearity in size of state space -at least for the compress approach. Algorithms optimized for magnetic disks are not linear, but they have good constant factors which allow them to outperform new approaches on many inputs. The threshold is not dependent only on the structure of a state space, but also on parameters of SSD. With higher bandwidth of SSDs, former I/O-efficient algorithms accelerate, while new approaches are not much influenced since they spend most of the time on random access to data. On the contrary, new approaches take advantage of lower access times, while former algorithms do not as they avoid random I/O operations completely.. For existing semi-external algorithms, the number of I/Os for accessing the hard disk does not change. Therefore, the design of semi-external algorithms should be the first step for flash-efficient model checking. By externalizing the perfect hash function to the flash memory, we discussed the transformation of (1 + c PHF )-bit to 1-bit semi-external memory algorithms. For minimal counterexample searching in LTL model checking, we adapted an internal-memory algorithm to be O(1 + c PHF + ⌈log(ϵ s + 1)⌉)-bit semi-external with O((|Accept| + l) · scan(|V |) + sort(|E|)) I/Os. We discussed a flashefficient solution, which reduces the RAM requirement from (1 + c PHF + ⌈log ϵ s ⌉) bits per state to (1 + c PHF ) bits by moving the depth-array to the flash memory and to 1 bit per state by additionally moving the perfect hash function to the flash memory.. The fact that for a minimal counterexample search we perform many independent calls to BFS (one for each accepting state) suggests an effective parallelization.

O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Improved CSG rendering using overlap graph subtraction sequences The Sequenced Convex Subtraction (SCS) algorithm for Constructive Solid Geometry (CSG) sequentially subtracts convex volumes from the z-buffer. The performance of the algorithm is determined by the length of the subtraction sequence used. View-independent subtraction sequences are O(n 2 ) in length. These can be reduced to O(kn) if the maximum depth complexity k, which ranges between 1 and n, is known or can be determined.We present an improvement to subtraction sequence generation which uses object space overlap information to give O(n) length sequences in the best case and (unchanged) O(n 2 ) sequences in the worst case. The approach is based on what we term an overlap graph. We also discuss a unifying approach combining overlap graph based processing with the Sequenced Convex Subtraction (SCS) CSG rendering algorithm. Finally, we present experimental results which show performance improvements, depending on the spatial arrangements of objects. The Sequenced Convex Subtraction (SCS) algorithm [Stewart et al. 2000; Stewart et al. 2002] is an image-space approach to CSG rendering. The algorithm utilises an O(n) algorithm for intersection of convex objects and an O(n 2 ) algorithm for subtraction of convex objects [Stewart et al. 2002] . Previous image-space CSG rendering algorithms [Epstein et al. 1989; Goldfeather et al. 1989; Wiegand 1996 ] rely on multiple z-buffers, extended z-testing or zbuffer copying. The SCS algorithm aims to maximise performance by increased utilisation of high-performance polygon rasterisation, which is typically a fast path, rather than z-buffer copying, which is typically a slow path [Wiegand 1996; Stewart et al. 1998; Stewart et al. 2000] .. In this paper we present an approach resulting in faster subtraction of large numbers of convex objects from the z-buffer. Objectspace intersection detection (spatial overlap) is used as a means of producing shorter subtraction sequences. In the best case subtraction sequences of length O(n) can be determined based on the spatial arrangement of objects -an improvement over the O(n 2 ) sequences which would otherwise be needed. In the worst case the subtraction sequence length remains the same.. The overlap graph which stores spatial intersection information and is the basis of our improved approach is introduced in Section 2. Properties of the overlap graph we use are discussed in Section 3, including methods for encoding subtraction sequences. In Section 4 a complete algorithm is presented for encoding subtraction sequences from overlap graphs. Experimental results and a performance comparison are presented in Section 5. Finally, concluding remarks are given in Section 6. Object-space overlap graph techniques can be beneficial for decreasing the length of SCS subtraction sequences. In the best case, O(n) subtraction sequences can be determined. In the worst case, O(kn) subtraction sequences are still necessary. CSG trees composed of relatively sparse and evenly distributed objects especially benefit from this approach, while dense or clustered CSG trees may not.. Overlap graph sequence encoding adds an additional step to the SCS algorithm that often results in improved overall performance. Speed-up factors of up to three have been observed experimentally. There is scope for extending these techniques to cyclic graph encoding. Graphs presenting relatively few opportunities for leaf node trimming could be approached by either grouping nodes or by considering further object-space information about adjacencies such as location and orientation.. Object-space collision algorithms such as I-COLLIDE [Cohen et al. 1995] could be combined with the SCS CSG rendering algorithm for dynamic and interactive CSG trees. Such models could be dynamic in terms of the position and shape of objects, or the arrangement of objects in the CSG tree.. Use of the stencil buffer for depth complexity sampling is a potential bottleneck for graphs consisting of many cyclic clusters. For each disconnected graph the stencil buffer is read into main memory for analysis. Alternative algorithms may need investigation. Our overlap graph is implemented in C++ as an adjacency-list using the standard library vector and map templated containers. Use of a sparse representation is based on the assumption that there are generally few edges at each node. Sparse graphs are more likely to result in short subtraction sequences. We expect that real-world applications typically result in sparse graphs.. The implementation uses a std::vector of std::maps, one map for each node in the graph. Each map is a balanced tree of edges incident on a particular node. Each edge is stored at both end nodes. The class interface supports edge addition and node removal. Node degree and edge list queries are efficient.. Our own shape intersection testing routines have been used for overlap graph initialisation. In principle one of the available collision detection libraries [Cohen et al. 1995] could be used as an alternative. Optimisation of this aspect was not pursued in this investigation due to our focus on per-frame performance. Overlap graph construction is usually a once off preprocessing step.

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A Monadic Second-Order Definition of the Structure of Convex Hypergraphs We consider finite hypergraphs with hyperedges defined as sets of vertices of unbounded cardinality. Each such hypergraph has a unique modular decomposition, which is a tree, the nodes of which correspond to certain subhypergraphs (induced by certain sets of vertices called strong modules) of the considered hypergraph. One can define this decomposition by monadic second-order (MS) logical formulas. Such a hypergraph is convex if the vertices are linearly ordered in such a way that the hyperedges form intervals. Our main result says that the unique linear order witnessing the convexity of a prime hypergraph (i.e., of one, the modular decomposition of which is trivial) can be defined in MS logic. As a consequence, we obtain that if a set of bipartite graphs that correspond (in the usual way) to convex hypergraphs has a decidable monadic second-order theory (which means that one can decide whether a given MS formula is satisfied in some graph of the set) then it has bounded clique-width. This yields a new case of validity of a conjecture which is still open. We are interested in the expression in Monadic Second-order (MS) logic of properties of graphs and hypergraphs, and also in the definition by MS formulas of their relevant "structures". We take "structure" as a generic term that can cover several notions like that of a tree-decomposition of width at most k of a graph ( [Cou5, Lapoire] ), or the representation of a planar drawing of a planar graph (by rotation schemes, see [Cou12] ), the modular decomposition of a graph [MR, Cou10] , a linear order of a given graph satisfying certain properties [Cou10] , a depth-first spanning tree ( [Cou8, Cou14] ) just to take a few examples.. Certain graphs have a unique such structure: for instance, every graph has a unique modular decomposition, every 3-connected graph has a unique decomposition in 3-connected components, (a result by Tutte [Tu] used in [Cou11] ), every planar 3-connected graph has a unique planar representation, by a theorem of Whitney (used in [Cou12] ). It seems that structures are easier to define by MS formulas when they are unique. The constructions are otherwise more difficult [Lapoire] or impossible (for instance one cannot define by MS formulas a linear order on a set).. We study here the notion of modular decomposition of a hypergraph (which can be found in [MR] ) and prove that it is MS definable. To be precise, we consider finite hypergraphs with unordered hyperedges of unbounded rank. Each of them has a unique modular decomposition, which is a tree, the nodes of which consist of certain prime subhypergraphs of the considered hypergraph. Roughly speaking, a hypergraph is prime if it cannot be obtained from smaller hypergraphs by substitutions to vertices. A hypergraph can be considered as a bipartite graph in a standard way, but its modular decomposition is not the modular decomposition of the corresponding bipartite graph.. We prove that it is definable by Monadic Second-order (MS) logical formulas. We take advantage of the fact that the logical structure representing a hypergraph has an element in its domain for each hyperedge. In the case of graphs considered in [Cou10] where we used logical structures the domains of which consist only of vertices, we were unable to define the modular decomposition without using an auxiliary linear order. In the present case, we need no such order.. We focus then our attention on convex hypergraphs, i.e., on those the vertices of which can be linearly ordered in such a way that the hyperedges form intervals. We prove that a prime hypergraph has at most one (up to reversal) linear order witnessing its convexity. Our main result says that this unique linear order can be defined by MS formulas.. Using other results, we deduce that, for any set of convex bipartite graphs (i.e., those corresponding to convex hypergraphs), if it has a decidable monadic theory, then it has bounded clique-width. This yields a new case of validity of a still open conjecture made by Seese ([Seese] ) and formulated in terms of clique-width by means of results by Courcelle and Engelfriet [CE] .. Previous cases were considered in [Seese, Cou8, Cou14] . The notion of cliquewidth and a discussion of this conjecture can be found at the beginning of Section 4.

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Grasp quality measures: review and performance The correct grasp of objects is a key aspect for the right fulfillment of a given task. Obtaining a good grasp requires algorithms to automatically determine proper contact points on the object as well as proper hand configurations, especially when dexterous manipulation is desired, and the quantification of a good grasp requires the definition of suitable grasp quality measures. This article reviews the quality measures proposed in the literature to evaluate grasp quality. The quality measures are classified into two groups according to the main aspect they evaluate: location of contact points on the object and hand configuration. The approaches that combine different measures from the two previous groups to obtain a global quality measure are also reviewed, as well as some measures related to human hand studies and grasp performance. Several examples are presented to illustrate and compare the performance of the reviewed measures. This paper has presented several grasp quality measures (summarized in Table 2 ) applicable to the synthesis and evaluation of fingertip grasps. The quality measures have been classified into two large groups: measures associated with the location of contact points on the object boundary, and measures associated with the hand configuration. Most quality measures in the literature are associated with the location of contact points, so this first large group was divided into three subgroups. The first one contains measures based on algebraic properties of G, which have limited practical application as they do not consider any restriction on the forces applied at the contact points. The second subgroup considers the measures based on geometric relations of grasp, oriented toward the improvement of grasps in the presence of inertial forces and the synthesis of independent contact regions. They are specially used to provide robustness to the grasp. The third subgroup contains measures that consider limitations on the finger forces, and includes one of the most used criterion in grasp synthesis, i.e. the largest ball and its variations.The second large group of quality measures includes criteria defined to obtain appropriate hand configurations for the grasp. A proper grasp should be optimal with respect to both groups of quality measures, and with this purpose different global quality indexes have been proposed to simultaneously quantify the grasp with respect to both groups.. Although some studies compare the optimal grasps obtained according to different criteria for different objects in 2-dimensional (Bone and Du 2001; Morales et al. 2002; Borst et al. 2004 ) and 3-dimensional grasps (Miller and Allen 1999) , the selection of the best criterion in each real case is not always trivial. Besides, even knowing the criterion to be applied, the complexity of real cases often makes the computational cost of any grasp optimization really high. In order to provide an idea of the behavior of each quality measure, Sects. 3.4 and 4.2 present application examples on simple cases that allow the intuitive interpretation of the measure. In fact, it is not possible to provide a general recommendation for the use of any grasp quality measure, as the quality value depends on several aspects of the grasp. In general, quality measures may consider: (a) locations of the contact points on the object, (b) directions of the forces applied at the contact points, (c) magnitudes of the applied forces at the contact points, and (d) gripper configuration. The consideration of these elements may provide a better idea on the most convenient quality measure for a particular task.. Most of the presented grasp analysis is based on quasistatic considerations. Dynamic manipulability was originally proposed for serial manipulators (Yoshikawa 1985a (Yoshikawa , 2000 , and was formulated for cooperative robots as the ratio between an input torque and the resultant acceleration of the grasped object . The concept has been recently extended to the field of multifingered grasping (Yokokohji et al. 2009 ).. The commercial availability of hands with integrated tactile sensors and fingertip sensors that can be adapted to specific hands (Silva et al. 2013; Yousef et al. 2011) , also provides a new field of application for the presented quality measures, traditionally associated to grasp planning stages. In fact, a fingertip sensor could provide information on the magnitude of the contact force and its point of application, which can be used to estimate the direction of the force being applied on the object. This information is exploited for locally optimizing some quality index by adjusting the grasp force or even the contact location, such that the overall grasp stability during real executions is increased (Dang and Allen 2013; Laaksonen et al. 2012; Bekiroglu et al. 2011) .. Some studies have analyzed the change of grasp quality with the location of contacts and the variation of the friction coefficient (Zheng and Qian 2004) , and even with the number of contacts (Rosell et al. 2010) . It has been suggested that, without other considerations, grasp quality increases slightly for more than a given number of contact points. A large number of contact points is typical in power grasps, but the applicability of quality measures for power grasps has hardly been tackled. One way to quantify the robustness of a power grasp is by considering the minimum virtual work rate required to move the object along a virtual displacement (Zhang et al. 1994) . Another metric was proposed to minimize the distance between the object and predefined contact points on the hand, which was used to plan a pregrasp shape that is later used for online grasp planning (Ciocarlie and Allen 2009) . Although in theory most of the above measures can be applied to grasps with any number of contact points , the explicit consideration of the limited forces that some parts of the hand can apply on the object allows the definition of contact robustness, i.e. how far a contact is from violating contact constraints, which is different from grasp robustness, i.e. how far the grasp is from overcoming the object immobilization constraint .. Most of the measures presented in this survey were developed for fingertip grasps using fully actuated multifingered hands. The application of the measures to underactuated hands, in particular the measures related to gripper configuration (Sect. 4), requires the development of new theoretical tools. For instance, if finger joints are modeled as elastic elements, the instantaneous kinematics of the hand and object can be predicted by considering a quasi-static equilibrium when the hand is perturbed (Quenouelle and Gosselin 2009; Odhner and Dollar 2011) . Such mapping allows the application of the presented manipulability measures. The theoretical framework of parallel robots has been recently proposed as a tool for studying fingertip grasps and dexterous manipulation for underactuated hands (Borras and Dollar 2013) .. The adaptation of classical manipulability indices (condition number, singular values) to parallel robots has been studied and they do not seem to be consistent for analyzing such robots (Merlet 2006) ; the adaptation of grasp quality measures for underactuated hands is currently an open area of research (Malvezzi and Prattichizzo 2013) .. The grasp quality measures reported in this survey do not consider the effect of compliance. For analyzing compliant grasps a grasp stiffness matrix K is required; the grasp is stable if the stiffness matrix is positive definite (Howard and Kumar 1996) . A measure of grasp stability is based on the eigenvalue decomposition of the generalized matrix M −1 K , with M a metric that allows that twists and wrenches lie on the same vector space (Bruyninckx et al. 1998 ). However, this measure depends on the choice of the metric M. A frame-invariant quality measure can also be developed based on the computation of principal rotational and translational stiffnesses for a grasp with stiffness matrix K (Lin et al. 2000) .. When dealing with whole-hand grasps, in general it is not possible to generate forces in all directions. Thus, the concepts of active and passive force closure arise: an external wrench can be counterbalanced if there exist strictly active or passive internal forces (Bicchi and Pratichizzo 2000) . Note that in this way, the condition for active force closure is stricter than for pure force closure. A grasp optimization for this case can, for instance, minimize the joint efforts . Also, when considering hand and contact compliance, specific solutions to the force distribution problem ω = G f can be obtained (Bicchi 1994) . The implications of compliance in the grasp analysis is receiving a renewed interest due to the evolution of underactuated robotic hands (Prattichizzo et al. 2012 ).. There are still more open research problems related to the quality measures. First, it is worth mentioning the need for efficient algorithms (both in terms of computational complexity and computational cost) to generate optimal grasps according to different quality criteria. A second aspect is the automatic determination of the relevant quality measures for the problem at hand, either to select the most appropriate one or the most convenient combination. Even when there are already some measures that try to consider the goal of the grasp (i.e. the task to be performed), this is also an aspect that requires further research and more practical proposals. In any case, continuous advances in the development of dexterous grasping devices will require the definition and formalization of new quality measures as well as optimal procedures to apply them.

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