Credit-based dynamic reliability management using online wearout detection As circuit geometries continue to shrink, and supply voltages remain relatively constant, circuit wearout becomes a concern. We propose that the relative reliability of the circuits of a processor be exposed to the operating system, and be managed by a credit-based wearout monitor. This wearout monitor receives dynamic updates of the reliability of circuits through the use of stability detector circuits that are small enough to be widely deployed. We find that through the combined use of the wearout monitor and stability detectors, we can efficiently and accurately manage the reliability of a processor, and re-coup the performance of a processor that would otherwise be lost when processors are over-provisioned to meet an expected lifetime. We simulate a 16 core DSP with a wearout monitor and stability detectors on a mix of four different media algorithms. Using the wearout monitor and stability detectors, we find that by reducing average performance by only 5%, we can increase the lifetime of the processor by 46%. Transistor scaling has yielded unprecedented performance gains for modern processors. However, similar reductions in supply voltage have not been possible due to the need to limit power consumption drawn by leakage current. By not reducing the supply Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. CF'08, May 5-7, 2008 voltage, we find the that the electric fields of the transistors are often stronger than required, that the current densities of the metal wires on our processors are higher, and the operating temperature of our processors is undesirable. This combination of strong electric fields, high current densities and high temperatures have caused concern that the transistors of our processors will wear out over time.. Wearout is not only a problem that impacts the reliability of a processor, but is also an effect that can impact the performance of a processor because as transistors wear out, they also become slower. To determine the clock period of the processor, the designer of the processor must first find the delay through the critical path logic for a voltage, temperature and process technology corner. Die-todie and intra-die process variations also need to be accounted for when setting the clock period of a processor. On top of this, the designer needs to provision some added delay in a clock cycle to allow for wearout.. We demonstrate the impact that wearout has on both the lifetime of a processor and the operation frequency of a processor using Figure 1 . A processor manufacturer needs to guarantee a specific lifetime for a processor under some specified operating conditions. In technologies where circuit wear out is negligible, the additional delay that we need to pad each clock cycle with is also negligible. However, as we continue to shrink transistor geometries we find that wearout can become a problem in a time-frame where we are still interested in using the processor. As a consequence, to ensure the lifetime of a processor, the designer needs to make some assumptions about the rate of processor wearout. Then, the designer must pad the clock period with an amount of overhead in order to accommodate this wearout that happens over time. We refer to the amount of clock-cycle padding required to meet a processor lifetime as ∆Wearout. In Figure 1 , for the 65 nm technology node, D1 is the amount of ∆Wearout that is required for a processor lifetime of T1. If we use the same amount of ∆Wearout for the 65nm curve and the 32nm curve, we find that the lifetime of the 32nm processor is now T2, where T2 is smaller than T1. On the other hand, if we wanted to preserve T1 as the lifetime of our processor in 32 nm, we would need to add D2 ∆Wearout to the clock cycle time of our processor.. What are the consequences of adding a constant ∆Wearout to the clock period of a processor? First, when the processor is new, and has no added latency due to wearout, the processor is actually running at a lower frequency than it is capable of. The processor is leaving some early-life performance "on the table" in order to ensure a given lifetime. This over-provisioning of the processor leads to a loss in possible performance while the processor is new. Second, eventually the processor will wear out where signals will no longer meet the clock cycle time (padded with ∆Wearout). However, the processor could continue to operate at reduced frequency. The consequence is that we are losing some end-of-life performance.. One way to reclaim early-life and end-of-life performance is to make ∆Wearout represent the actual amount of wearout of the processor at any given time. We propose the use of stability detection circuits that can be used to find ∆Wearout for an individual processor. We could then have the freedom to operate the processor at higher frequencies than nominal during the early-life phase of a processor, or at lower frequencies during the end-of-life phase of a processor. On-line detection, rather than static computation of ∆Wearout is important for many reasons. First, it may be difficult to create models that accurately describe wearout because the physics of some wearout mechanisms are not well understood. Second, the companies that manufacture semiconductors may be reluctant to release detailed information about the wearout of transistors made using their fabrication process. Third, because of die-to-die and other manufacturing variations, configuring a static wearout model to a single manufactured processor is difficult.. However, simply re-claiming the performance during the earlylife and end-of-life phase of a processor does not measure the remaining lifetime of a processor. So we are still left with the problem of ensuring a processor's lifetime that over-provisioning a processor's clock cycle time in the face of wearout had solved. To address this issue, we propose that a credit-system be used to account for the reliability of a processor. A processor is given a number of credits that is proportional to the manufacturer's guaranteed lifetime if that processor is operated at certain constraints (frequency, voltage, temperature, etc.). For every time unit we run the processor at the nominal frequency, we deduct some number of credits. If we continue to use credits at this rate and the number of reliability credits of the processor becomes very low, the probability of wearout of the processor occurring in the near future is high. We can run the processor at higher frequency than nominal, the processor uses more credits per time unit. Or, for every time unit the processor is idle, we will be saving credits that could be spent at later times of high processor demand. Likewise, a similar behavior is seen if the processor runs at higher or lower temperatures.. For instance, processor in a data center may be on an upgrade schedule where they are replaced by new processor every 3 years to do improvements in performance of new processors. Additionally, if we know that a processor will fail if run at maximum performance after two years, it may be wiser to slightly reduce the processor's performance in order get the processor to last for 3 years.. There are two goals of this paper. The first is to address problem of ensuring an expected lifetime of a processor using a credit-based wearout monitor (WM) that allows an operating system or user to manage reliability-performance trade-offs of a processor. We show that a WM also allows the operating system or user to budget the remaining reliability of the processor in order to maximize the performance of the processor for an expected lifetime. The second goal of this paper is to employ a method for accurately measuring the wear out of a processor. To measure ∆Wearout, we employ a low-overhead stability detection (SD) circuit that can be widely deployed on a processor [1] . Accurate on-line measurements of the wearout of different structures on a processor allow us to capture the performance normally lost in a processor's early-life and end-of-life due to conservative allocation of ∆Wearout. Additionally, the combination of the credit-based WM and SD circuitry allows us to improve the accuracy of the WM by dynamically updating the relative wearout of the processor.. The rest of this paper is organized as follows. In Section 2, we discuss wearout-related work and contrast what is novel about our contribution. Section 3 gives a brief overview of wearout mechanisms that we model in this work. We then introduce our creditbased WM in Section 4.1. The SD circuitry and it's benefits are detailed in Section 4.2. We evaluate the WM and SD in the context of a multi-core digital signal processor with a mesh interconnect in Section 5. Finally, in Section 6, we discuss future directions for reliability aware architectures and then conclude. One early work on architectural-level techniques for mitigating processor wear out was published by Srinivasan et al. in 2004 [2] [3] . This work describes a detailed wearout model of the processor to quantify the impact of scaling on lifetime reliability. They find that a 65nm design is over 3 times as likely to fail as a similar design in 180nm, and that time-dependent dielectric breakdown and electromigration are the primary modes of wear out in geometries of 65nm and smaller.. Later in 2004, the same group published two architectural methods for mitigating wear out [4] . They propose a Dynamic Reliability Management (DRM) strategy that explores the potential benefit of architectural re-configuration and dynamic voltage and frequency scaling (DVS). Their solutions has a drawback of requiring a precise device wearout model (called RAMP) to effectively predict wear out. Wearout models are difficult to accurately build, especially because the physics of all the wearout mechanisms are not fully understood. It is also difficult to build RAMP-like wearout models accurately because silicon foundries are reluctant to release detailed information about their process technology. Finally, because of die-to-die variations, it will be increasingly difficult to accurately characterize the parameters of semiconductors.. Building off the HotSpot tool [5] , previous work has been done to show how much lifetime can be saved by reducing the operation frequency of the processor [6] [7] . Our WM techniques is one way to implement a method for managing these performance-reliability trade-offs.. To motivate how difficult it is to build accurate models of the wear out of processor, Figure 2 demonstrates how crucial small changes in the failure modes of semiconductors can be. In this figure, the "SPEC-FP Avg." and "SPEC-Int Avg." bars represent the results for a POWER4 processor as presented in [8] . Using a RAMP-like wearout model, we decrease the activation energy of metal by 0.1 eV and also allow the thickness of gate oxide to vary by 20%. We assume that these changes only impact the electromigration and time-dependent dielectric breakdown wear out, and those two wearout mechanisms account for 78% of all possible wearout modes [2] . From Figure 2 , we can see that if this variability is introduced into the RAMP-like wearout model, the actual MTTF of the processor can be off by 24%, leading to pre-mature failure of the processor.. Instead of building static reliability models, we use stability detection circuits to accurately diagnose the level of wearout on the processor. This avoids the need for extremely accurate device wearout models. Additionally, since our stability detectors are used along side the datapath, they will experience the same activity as well as temperature as the circuit under test, providing an accurate assessment of the operating conditions of the processor.. Srinivasan et al. also proposed using structural duplication as well as allowing some structures to degrade in performance over time [8] . However, some structures were not protected, such as the instruction fetch and decode mechanisms, due to their size. The primary drawback of sparing is that having redundant structures onchip is often costly in terms of area. This would typically be true for large on-chip structures, such as on-chip inter-core interconnects and instruction decoders.. Recently, Blome et. al. [9] [10] proposed a wearout detection unit, which measures wear out using a similar technique to what we propose. Their wearout detection unit (WDU) is similar to our SD circuit, but does additional statistics tracking in hardware to help filter out transient errors. Unfortunately, due to the size (7.5 um 2 in 130nm for each signal monitored) of the wearout detection unit, it may be expensive to deploy on a wide scale. By comparison, the SD circuit that we employ is much smaller citefrancoVLSI1994, allowing broader deployment for better monitoring of wear out.. The WDU uses chains of inverters to determine the delay of a signal, and includes statistical tracking circuitry that may be better computed in software. The reduced area of the SD is accomplished through the use of a feedback patch and by pushing the responsibilities of filtering transient instabilities to the operating system (OS).. Another unique contribution that we propose is the use of a creditbased WM that exposes the remaining lifetime reliability of a processor to the OS. Neither the WDU work, nor the RAMP work propose a strategy on how to ensure an expected lifetime of a processor, or how to maximize the performance of a processor during an expected lifetime.. The Razor work [11] shows architectural and circuit techniques for using DVS efficiently. They use time delayed redundant latches to detect timing violations due to data dependencies to determine if lower voltages may be used. This delayed latch-comparison scheme is somewhat similar to our SD circuit, but with different goals. Razor is looking for instability events, due to data dependencies, that happen on a much finer time-scale in order to change the voltage to minimize power consumption. The SD circuits that we employ, are looking for wearout events that happen over a much longer time frame. The advantage of our stability detection system is that it is simpler as the Razor system provides some features that our technique does not need.. In summary, while our SD circuit is similar to the Razor and WDU, there are significant differences in the implementation of the SD with the Razor and WDU stability detectors. The RAMP wearout model is similar to the WM that we propose, but does not provide strategies for managing performance over the expected lifetime of a processor. Finally, the combination of the SD and WM is a unique contribution that provides both wearout detection and management.

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A mechanisation of some context-free language theory in HOL4 We describe the mechanisation of some foundational results in the theory of context-free languages (CFLs), using the HOL4 system. We focus on push-down automata (PDAs). We show that two standard acceptance criteria for PDAs ("accept-by-empty-stack" and "accept-by-finalstate") are equivalent in power. We are then able to show that the pushdown automata (PDAs) and context-free grammars (CFGs) accept the same languages by showing that each can emulate the other. With both of these models to hand, we can then show a number of basic, but important results. For example, we prove the basic closure properties of the context-free languages such as union and concatenation. Along the way, we also discuss the varying extent to which textbook proofs (we follow Hopcroft and Ullman) and our mechanisations diverge: sometimes elegant textbook proofs remain elegant in HOL; sometimes the required mechanisation effort blows up unconscionably. A context-free grammar (CFG) provides a simple and precise mechanism for describing the methods by which phrases in languages are built from smaller blocks, capturing the "block structure" of sentences. The simplicity of the formalism makes it amenable to rigorous mathematical study. Context-free grammars are also simple enough to allow the construction of efficient parsing algorithms using pushdown automata (PDAs). These "predicting machines" use knowledge about their stack contents to determine whether and how a given string can be generated by the grammar. For example, PDAs underlie the construction of efficient parsers for LR grammars.. The theory of context-free languages is well understood and elegant. It is also of clear practical importance, being the basis for the description and implementation of computer programming language syntax. For these reasons, we feel it is a natural object for mechanised study. Our contribution in this paper is to describe the mechanisation of a number of basic results in this area.. The most significant of these is the equivalence of the CFG and PDA models for context-free languages. Needless to say, there is no question that this theory is in any doubt! Nonetheless, there are a number of other reasons for performing these mechanisations:. • We investigate the degree to which the mechanical system (HOL4 Gordon and Melham (1993) ; Slind and Norrish (2008) in our case) is capable of dealing with such important mathematics.. • We also provide an important basis for future, more complicated mechanised developments. Without basic results such as those proved here, mechanised developments such as our verification of generation of SLR automata (Barthwal and Norrish, 2009) would not be possible. The library of proofs, techniques and notations developed here provides the basis from which further work on verified language theory can proceed at a quickened pace.. • The mechanisation work is an engaging intellectual exercise in itself; performing proofs of this sort is a very good way to iron out any wrinkles in one's understanding of the material.. As such, we highly recommend mechanisation to all! The rest of the paper is structured as follows. We introduce the basic details of our types (languages, grammars and automata) in Sections 2 and 3. In Section 4 we describe the two ways in which a PDA can accept an input ("acceptance by empty stack" and "acceptance by final state"), and show that they are equivalent in power. In Section 5, we present some closure properties for context-free languages.. It turns out that closure under union, concatenation and Kleene closure (Sections 5.1 to 5.3) are easy to formalise. These results depend on the fact that given any two grammars, G 1 and G 2 , one can rename the variables such that variables of G 1 and G 2 are disjoint. The main effort goesinto establishing this 'disjoint' property. The remaining closure property illustrates how equivalence results for different models can be a great help: closure under substitution (Section 5.4) uses a 'parse tree' representation (Section 5.4.1) for derivations (rather than derivation lists).. Finally, in Sections 6 and 7 we describe the paper's most involved mechanisations: proofs of the result that the CFG and PDA formalisms are equivalent in power.. HOL4: Background, Theorems and Notation. The work described in this paper was all carried out in HOL4 (Gordon and Melham, 1993; Slind and Norrish, 2008) , a modern interactive theorem-proving system, or proof assistant. Based on the "LCF philosophy", HOL4 has a small trusted code base, its proof kernel. All theorems proved in the system ultimately depend only on that kernel, providing a high degree of confidence in their validity.. In this paper, all statements identified as HOL Theorems are theorems mechanically proved in the system and automatically pretty-printed to L A T E X from the relevant theory in the HOL4 development. Any discussion of proofs accompanying these theorems will be in an informal style. The actual proof scripts consumed by the system are typically quite incomprehensible, for all that they do embody the mathematical essence of the proof. For this reason, the paper does not include any HOL4 source code directly. Of course, full sources are available for download (see the following "availability" section).. Notation specific to this paper is explained as it is introduced. Otherwise, HOL4 supports a notation that is a generally pleasant combination of predicate logic (quantifiers ∀, ∃, connectives ∧, ⇒, for example) and functional programming (λ for function abstraction, juxtaposition for function application).. Lists are written between square brackets, e.g., [1; 2] . The length of a list ℓ is written |ℓ|.. The concatenation of ℓ 1 and ℓ 2 is written ℓ 1 ++ ℓ 2 . Overloading notation, we use ∈ (and / ∈) to refer to membership (non-membership) of both lists and sets. Lists support a range of functions from the functional programming world such as MAP and FLAT (which takes a list of lists and returns the concatenation of all the member lists).. Concrete sets are written between braces, e.g., { 1; 2 }. We can write set comprehensions in typical syntax: the expression { x | x < 4 } denotes the set of numbers less than 4. If R is a (curried) binary relation (such that we write R x y when x and y are linked in the relation), then R * is the reflexive and transitive closure of R.. Availability. Both HOL4 itself and the sources for this work are available from github.com.. The paper's sources are at http://github.com/mn200/CFL-HOL, and build with the latest repository version of HOL4. They will also build with the next official release of HOL4, Kananaskis-8, due in August 2012.. Acknowledgements. NICTA is funded by the Australian Government as represented by the Department of Broadband, Communications and the Digital Economy and the Australian Research. Council through the ICT Centre of Excellence program. We have mechanised a large portion of the background theory of context-free grammars and pushdown automata. This theory is fundamental to an important part of computer science, and had not been mechanised previously. The work was pursued as part of a larger project (the first author's PhD): to mechanise one of the field's standard textbooks. And, just as a textbook lays the foundation for future research, we hope our mechanised theories provide a platform for others' work in the area of context-free languages.. Inevitably, the mechanisation work occasioned a great many instances of "proof blowup", where something handled briefly in prose turns out to require a great deal of toil. Most of this was simple tedium (necessary inductions are very easy for humans to glide past); at other times, the effort seem to require rather more human ingenuity. A numerical summary of the blood, sweat and tears per theory appears in Table 1 . The total person-time taken was in the order of one PhD student multiplied by 6 months.. Despite these issues around proof-size explosion, we also hope our mechanisation might be a good basis for teaching language theory. Others, such as Blanc et al. (2007) and Pierce (2010) have used the Coq system as part of courses on logic, mathematics and topics in theoretical computer science. Given its central part in the curriculum, and given our success in the mechanisation of Hopcroft and Ullman, we now believe language theory to be an area well-suited to mechanised pedagogy. In the general area of mechanised language theory, the earliest work we are aware of is by Nipkow (1998) . That paper describes a verified and executable lexical analyzer generator.. Focusing on core language theory as it does, we feel this work is the closest in nature to our own mechanisation, though of course it covers regular rather than context-free languages.. Apart from our own earlier work on SLR parsing, there have recently been a number of papers directly concerned with mechanisation and verification of specific approaches to parsing.. For example, Koprowski and Binsztok (2011) describe the construction of a verified parser for expression grammars. This formalism allows for parsers for a large class of languages to be generated from natural specifications that look a great deal like context-free grammars. Another example is Ridge (2011) , which work presents a verified parser for all possible context-free grammars, using an admirably simple algorithm. The drawback is that, as presented, the algorithm is of complexity O(n 5 ).. Parser combinators, popular in functional programming languages, are another approach to the general parsing problem, and there has been some mechanisation work in this area. For example, Danielsson (2010) presents a library of parser combinators that have been verified (in the Agda system) to guarantee termination of parsing.

O O O O O O O O B O O O O O O O O O O O O B I O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


A combined feasibility and performance macromodel for analog circuits The need to reuse the performance macromodels of an analog circuit topology challenges existing regression based modeling techniques. A model of good reusability should have a number of independent design parameters and each parameter can vary in a large numeric range. On the other hand, these requirements can cause a large percentage of functionally incorrect designs in the design space and thus results in a sparse feasible design space. They also complicate the mathematical relationship between the performance parameters and the design parameters. In order to tackle these challenges, this paper presents a combined feasibility and performance macromodel based on Support Vector Machines (SVMs). The feasibility model identifies the feasible designs that satisfy the design constraints. The performance macromodel is valid for feasible designs. Feasibility macromodeling is formulated as a classification problem while performance macromeling as a regression problem. An active learning scheme [5] has been applied to improve the accuracy of the feasibility model much faster than only using uniformly distributed designs in the entire design space. Our experiment shows that the performance macromodels in the feasible design space are more accurate and faster to construct and evaluate than performance macromodels in the entire design space without functional or performance constraints considered. Performance macromodels are mathematical models that approximate the relationship between controllable design parameters and performance parameters. One major characteristic of performance macromodels is their short evaluation time compared to a circuit level simulator. Hence, they usually replace the circuit level simulator both to enhance early design space exploration [6] , [1] , [12] and to accelerate circuit sizing [7] , [9] . The other characteristic is reusability. Performance macromodels for a certain circuit topology can be used to size the same circuit for various applications to meet different performance specifications. Short evaluation time and good reusability are also the requirements for performance macromodels.. Previous work in performance macromodeling mainly falls into three categories:. • Knowledge based approach relies on manual derivation of mathematical equations by expert designers.. • Symbolic analysis techniques generate system transfer functions automatically. Symbolic equations for performance parameters need to be further generated. Either knowledge based approach or symbolic approach requires the numerical values of the small signal parameters that appear in the equations and thus a simple device model such as SPICE Level 1 model or a circuit level simulator is needed. Furthermore, symbolic approach is not readily to be applied in large signal behavior of the circuits.. • Regression techniques have gained more and more research interest lately, including artificial neural networks [13] , fitting approach to generate symbolic equations [3] and least squares support vector machines [8] . The common strategy involves using a regressor and samples of performance parameters from simulations to fit the regressor. The modeling process is somewhat automated and reusability of the generated models mainly depends on the design space in which these models are applicable. Performance macromodels generated by regression techniques are, however, valid only in the design space defined during model generation. In most previous work [13] , [3] , designers manually define the design space by selecting the design variables and constraining them between lower and upper bounds.. S. Zazala, J. Eckmuller and H. Grab [14] appear to be the first to define and calculate the feasible design space. They define feasible We present a combined feasibility and performance macromodel for analog circuits. The generated model is composed of one feasibility model and a set of performance macromodels. The feasibility model identifies the feasible designs in the entire design space while the performance macromodels approximate the performance parameters. We treated he feasible design space identification problem as a two class classification problem so that advanced classification algorithm SVMs can be applied. We also applied an active learning scheme to tackle the sparsity of the feasible designs. Thus we are able to build accurate performance macromodels. Experimental results show that it is an efficient approach to analog circuit performance macromodeling. The applications of analog performance macromodels include fast analog sizing, design space exploration and topology selection. The limitations of the proposed methodology is also discussed.

O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O


Estimating Information from Image Colors: An Application to Digital Cameras and Natural Scenes Abstract-The colors present in an image of a scene provide information about its constituent elements. But the amount of information depends on the imaging conditions and on how information is calculated. This work had two aims. The first was to derive explicitly estimators of the information available and the information retrieved from the color values at each point in images of a scene under different illuminations. The second was to apply these estimators to simulations of images obtained with five sets of sensors used in digital cameras and with the cone photoreceptors of the human eye. Estimates were obtained for 50 hyperspectral images of natural scenes under daylight illuminants with correlated color temperatures 4,000, 6,500, and 25,000 K. Depending on the sensor set, the mean estimated information available across images with the largest illumination difference varied from 15.5 to 18.0 bits and the mean estimated information retrieved after optimal linear processing varied from 13.2 to 15.5 bits (each about 85 percent of the corresponding information available). With the best sensor set, 390 percent more points could be identified per scene than with the worst. Capturing scene information from image colors depends crucially on the choice of camera sensors. C OLOR provides information about the reflecting properties of surfaces, thereby allowing regions of a scene to be demarcated and the elements of regions to be distinguished. Yet how much information about the content of a scene is captured by the colors of the reflected light? More specifically, if images of a scene under a particular illumination are obtained with a digital trichromatic camera, to what extent can the elements of the scene be identified by their colors, independent of spatial position?. A priori, it seems unlikely that all the elements in a scene can be characterized in this way. One problem is that the color values at each point in an image depend on the spectrum of the illumination on the scene, so that when the illumination changes, so generally do the color values. This confounding effect of illumination can be largely discounted by correcting color values by so-called von Kries scaling [1] , [2] , although not completely. Another problem is that different reflectance spectra at different points in the scene under the same illumination can produce the same color values. This is the phenomenon of metamerism [3] and is a consequence of the number of degrees of freedom in natural reflectance spectra being greater than the number of degrees of freedom in color values, namely, three with a trichromatic camera.. Nevertheless, there remains a strong dependency between the color values of different images of the same scene under different illuminations. This dependency can be quantified with Shannon's mutual information [4] , [5] , [6] . The advantages of this measure over other measures of dependency, such as linear correlation, are well known [7] , [8] , [9] , [10] .. Two kinds of mutual information associated with the images of a scene were used here, namely, the information available from the color values at each point in the scene imaged under different illuminations and the information retrieved in the basic task of matching points across those images by their color values. The information available is, by construction [4] , [5] , [6] , founded on a theoretical camera with an infinite number of pixels. It sets, therefore, an upper (finite) bound on the information actually available from any camera with a finite number of pixels, which can yield only a finite sample of color values. The information available necessarily depends on factors such as the spectral reflectances of the surfaces in the scene and their relative abundances, the spectral radiances of the illuminations on the scene, and the spectral sensitivities of the camera sensors. The information retrieved depends not only on these factors, but also on how the sensor signals are processed and then matched, for example, by von Kries scaling and by nearestneighbor matching. The information available is also an upper bound on the information retrieved.. In previous analyses, estimates of the information available and information retrieved have been used to reveal both the efficiency and the limits of color processing by the human eye in viewing natural scenes under different illuminations. In one application [11] , it was shown that coding at the receptors was highly redundant, as expected given the overlap of the spectral sensitivities of the medium-and long-wavelength-sensitive cone pigments [12] . But with optimal linear postreceptoral processing, redundancy was reduced and efficiency increased so that the information retrieved from color images of natural scenes under different daylight illuminants reached almost 90 percent of that achievable by an ideal observer. The coefficients of the linear transformations describing this postreceptoral processing are similar to those estimated independently by behavioral methods [13] . Such calculations illustrate the importance of estimating both kinds of mutual information associated with the images of a scene.. One of the two aims of this work was to put on a firmer basis the derivation and verification of the estimators of the information available and the information retrieved to answer the question posed earlier, namely, how much information about a scene's content is captured by its colors. The other aim of the work was to illustrate an application of these estimators to five sets of sensors used in commercial digital trichromatic cameras. To provide a reference, the estimators were also applied to the cone photoreceptors of the human eye. Conveniently, mutual information can be interpreted as the logarithm of the mean number of distinct elements or points that can be identified without error across images of the scene under different illuminations [11] , [14] . The resulting information estimates therefore provided an answer to the more specific question of the extent to which the elements of a scene can be identified by their colors, independent of spatial position.. The organization of this work was as follows. Images of natural scenes were generated from a set of 50 hyperspectral images of rural and urban scenes under each of three daylight illuminants with correlated color temperatures (CCTs) of 4,000, 6,500, and 25,000 K. Information available and information retrieved were estimated for images of a scene under pairs of these illuminants. As a practical matter, naive estimates of mutual information based on histograms, here of color values at each point, are known to be susceptible to bias, and so methods were employed that were asymptotically unbiased and reasonably efficient for both kinds of information estimate. As already implied, by the nature of these calculations, information estimates did not incorporate any spatial data. Thus, images were not segmented into uniform regions in any way, except for the trivial limit defined by pixel resolution, and any estimate of the number of identifiable points was assumed to be an upper bound on the number of identifiable regions. No allowance was made for noise in the sensors or in postsensor processing. In this way, the effects of spectral tuning of the sensors could be most clearly demonstrated.. It was found that for the largest difference in daylight illuminants-with CCTs of 25,000 and 4,000 K-the mean estimated information available varied from 15.5 to 18.0 bits, depending on the set of sensors. These values are equivalent to 4:7 Â 10 4 and 2:7 Â 10 5 distinct identifiable points per scene, an increase of 470 percent from the worst to the best sensor set. The corresponding estimated information retrieved was lower, at 13.2 and 15.5 bits, equivalent to 9:5 Â 10 3 and 4:7 Â 10 4 distinct identifiable points per scene, an increase of 390 percent from the worst to the best sensor set.. For the eye, the mean estimated information available and information retrieved for the same illuminants were 17.1 and 14.7 bits, respectively, equivalent to 1:37 Â 10 5 and 2:7 Â 10 4 distinct identifiable points per scene, similar to the highest values recorded with some camera sensors.. To help set these estimates in context, the pointillistic painting by Georges Seurat "A Sunday Afternoon on the Island of La Grande Jatte" (1884-1886) would require 16.6 bits to code the more than 10 5 "points" on the canvas. Some implications of present findings, and their limitations, are considered in the Discussion. Suppose that this reflected spectrum is sampled by the long-, medium-, and short-wavelength-sensitive (conventionally, R, G, and B) sensors of a digital camera (or cone photoreceptors of the eye) with spectral sensitivities s R ðÞ, s G ðÞ, and s B ðÞ, respectively. The corresponding triplet of color values ðr; g; bÞ at ðx; yÞ encodes the spectrum cð; x; yÞ thus:. where the integral is evaluated over the visible wavelength range. If the point ðx; yÞ within the scene is chosen randomly, the color values r, g, and b in (1) may be treated as instances of continuous random variables [12] , R, G, and B, say. The triplet a ¼ ðr; g; bÞ is an instance of a trivariate continuous random variable A ¼ ðR; G; BÞ, whose probability density function (pdf) is f, say. This pdf characterizes the nature of the unpredictability of the color values for a particular scene, illuminant, and set of sensors. A discretized version of the continuous random variable A can be obtained [6] by partitioning the space in which the (bounded) variables R, G, and B take their values. Suppose that the partition has a finite number of bins, D say, indexed by an integer d with 1 d D. Suppose that each bin has equal edge lengths Ár ¼ Ág ¼ Áb and let Áa ¼ ÁrÁgÁb. For each d, let a d be the value of a within the dth bin such that. fðr; g; bÞdrdgdb:. 1. With a spatially uniform global illuminant eðÞ, the effective spectral reflectance ð; x; yÞ at ðx; yÞ is defined by cð; x; yÞ=eðÞ, given that eðÞ > 0 for all . This representation confounds variations in spectral reflectance with the effects of surface orientation, occlusion, and mutual illumination, but this confound is not critical in this application [15] . The notation in [15] differs slightly from that used in this work.. Denote by A Á ¼ ðR Á ; G Á ; B Á Þ the discretized version of A whose probability mass function (pmf) p is given by. The entropy HðA Á Þ of the discrete random variable A Á for a particular scene, illuminant, and set of sensors is then defined [4] , [5] , [6] by. where the probabilities pða d Þ are given by (2) and where, conventionally, 0 log 0 ¼ 0. The entropy HðA Á Þ ranges from zero to log D. If the logarithm is to the base 2, then the entropy is in bits; if it is the natural logarithm, then the entropy is in nats.. If all the points in a scene have the same color value so that the pmf pða d Þ of A Á is zero except at one particular value of d, e.g., if the scene is a perfectly homogeneous surface so that all the points have the same effective reflectance spectrum or if the binning is too coarse (i.e., D is too small) to capture the differences in effective spectral reflectance between points, then there is no uncertainty about the color value at any chosen point and . The conditional entropy HðA . The conditional entropy measures the uncertainty about random variable A . Shannon's channel-coding theorem [4] , [5] gives the mutual information an operational interpretation which was alluded to earlier. That is, since the maximum number of points that can be encoded with I bits is 2 I , if. I is the maximum number of distinct points that can be identified reliably across two images of a scene under the two global illuminants e 1 and e 2 [11] .. As bin size Ár ¼ Ág ¼ Áb tends to zero, the entropies HðA . the continuous analog of (5) . The value of (6) [16, Ch. 4] . This least upper bound I is the information that is available across two images of a scene each under a different illuminant. Let. Then N I is the least upper bound on the number of distinct points that can be identified reliably across two images of the scene. Notice that if A 1 ¼ A 2 , the mutual information. In practice, estimating the information available, i.e., IðA 1 ; A 2 Þ, is not straightforward. Several methods, including some used in this analysis, make use of the fact that mutual information can be expressed as a combination of differential entropies [4] , [5] , [6] . The differential entropy hðA 1 Þ of A 1 is defined [4] , [5] by . mirroring (4).. One method of estimating IðA 1 ; A 2 Þ is to estimate the pdfs f 1 and f 2 and the joint pdf f 12 , and use them to estimate hðA 1 Þ, hðA 2 Þ, and hðA 12 Þ from the corresponding definitions, e.g., (8) . The estimates of f 1 , f 2 , and f 12 are necessarily based on finite samples. Accordingly, suppose that N points fðx i ; y i Þ j i ¼ 1; . . . ; Ng are sampled uniformly from a scene and their color values are calculated from (1) for illuminants e 1 and e 2 , yielding the sets. and. The difficulty is in arriving at the estimates of f 1 , f 2 , and f 12 from these samples. If the sample size N is large enough, reliable estimates of f 1 , f 2 , and f 12 may be obtained by simple histogram-based methods such as binning and adaptive partitioning [17] . This is equivalent to D-bin quantization with pmfs as in (2), although if partitioning is adaptive, variable values of Ár, Ág, and Áb are needed. Even so, D must be very large to obtain accurate estimates; otherwise the pdf is not well approximated by the empirical pmf, leading to bias [18] . In addition, the sample size N has to be much larger than the number of bins with nonzero probability [19] . Some of these disadvantages can be overcome with the use of kernel density estimators [10] , [18] , but systematic errors in the differential entropy estimates remain [20] , [21] . By contrast, methods based on kth-nearest-neighbor statistics [20] , [21] avoid estimating pdfs and instead involve calculating distances in the neighborhood of each point in a sample drawn from the spaces spanned by A 1 , A 2 , and A 12 , such as the sets in (10) and (11) . The advantages of kth-nearest-neighbor estimators have been documented elsewhere [21] , [22] , [23] .. For completeness, four estimators were used to estimate the information available:. 1. a kernel density estimator [10] , 2. a generalized version of a nearest-neighbor estimator due to Kozachenko and Leonenko [20] , [ 24] , 3. a nearest-neighbor estimator due to Kraskov et al. [21] , and 4. an experimental offset modification [14] used to improve both estimators 1 and 2. Capturing scene information from image colors depends crucially on the choice of camera sensors. Although not all of the information available can be retrieved with any particular set of sensors, providing that the sensor spectral sensitivities are optimally modified with a sharpening transformation, the information retrieved can approach the information available, depending of course on the scene and illumination. As shown in this work, estimating the continuous and discrete informational quantities involved and comparing them over different sets of camera sensors is not straightforward, but clear differences between sensor sets did emerge over a range of natural scenes and daylight illuminants. Most notably, with the best sensor set about 390 percent more points could be identified per scene than with the worst. In the following sections, some of the factors contributing to these differences in performance are examined in more detail.

O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O 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Computational simulation of turbulent mixing with mass transfer In this paper, we present a series of computational simulations of three-dimensional turbulent mixing with mass transfer for various pipe mixing arrangements. . In the paper industry, fiber water mixture needs to be diluted and delivered smoothly and uniformly to the headbox forming section.One of the key components is the so-called silo mixing unit depicted in Fig. 1 In the following section, we summarize the governing equations and the criteria used in measuring mixing uniformity. We discuss in Section 3 transverse jet mixers with different angles.In Section 4, we focus on concentric mixers with various nozzle shapes. The relatively new multijet mixing arrangements are considered in Section 5, and the full-fledged silo mixing unit simulations are presented in Section 6.in Sections 3 to 6 as well as in the concluding section.We consider here the turbulent flow of a homogeneous, viscous, incompressible fluid with constant properties. By representing the fluctuating parts in the eddy viscosity _t, turbulent kinetic energy k, and turbulent dissipation rate e, we obtain the following governing equations from the mass and momentum conservation equations where a_, a2, Crk, and a_ are designated constants; _ denotes the inner product of Ovi Ovj the velocity strain tensor 2eijeij with eij -(O_x_+ 0-_x_ )/2; and the turbulent time J lb* scale T and viscosity vt are expressed as:with a constant c_.In addition to the mass and momentum conservation equations with the k-e /fAWe recognize that the integrals fAudA and fAcudA are directly related to the volume flow rates and tracer concentration through mass balances. Denoting q and as the flow rates of the streams with tracer concentrations cl and c2, respectively, from the mass conservation laws, we obtainwhich can be used to validate the computational results.The most widely used pipe mixer is the transverse mixer shown in Turbulent mixing of various fluid streams has many industrial applications in areas such as sewer discharge, chemical reactions, heat transfer operations, and mixing and combustion processes [5] [12] . In the paper industry, fiber water mixture needs to be diluted and delivered smoothly and uniformly to the headbox forming section.. One of the key components is the so-called silo mixing unit depicted in Fig. 1 , which consists of various pipe mixing arrangements.. In this work, we consider the following mathematical models related, but not limited to current silo designs: (i) transverse mixers at different injection angles; (ii) concentric mixers with different nozzle shapes; and (iii) multijet mixers. Full-fledged simulations for four silo mixing units with complex three-dimensional geometries are also investigated. Considering the fact that the rheology of low consistency fiber water mixture is very similar to that of water, we employ the mixing model of two turbulent miscible fluids with the same density and viscosity, however, different inert tracer concentrations.. In the general area of turbulent mixing, many research efforts have been directed to experimental investigations. Recently, some numerical studies have been performed on two-or three-dimensional turbulent mixing with mass or heat transfer for simple geometries [10] . However, very few studies are available for dealing with complex three-dimensional turbulent simulation with mass transfer. Some of the recent advances in applying CFD techniques to the chemical process industry are documented in Ref. [11] . In this paper, we present a systematic study of various In the following section, we summarize the governing equations and the criteria used in measuring mixing uniformity. We discuss in Section 3 transverse jet mixers with different angles.. In Section 4, we focus on concentric mixers with various nozzle shapes. The relatively new multijet mixing arrangements are considered in Section 5, and the full-fledged silo mixing unit simulations are presented in Section 6.. Design information deduced from the computational simulation results is presented in Sections 3 to 6 as well as in the concluding section. In this paper, a systematic numerical study of various pipe mixers and silo mixing units has been conducted with the ADINA software. To summarize, we obtain the following information pertaining to the design of the considered mixing arrangements'. (1) Although transverse mixers with an injectction angle of 6; >_90°are more efficient in mixing, they tend to produce large-scale vortices near the injection point, and the jet is more susceptible to impacting the opposite wall. Therefore, in the paper industry, an acute injection angle may be considered, and in practice, a longer distance downstream away from the injection point is recommended in order to compensate for the loss of mixing efficiency.. (2) In concentric mixers, with the same input flow rates, for the geometries used in this work (typical geometries in the paper industry), the mixing efficiency is much higher than those of the corresponding transverse and multijet mixers. In addition, from the further investigation with different relative injection jet size, we find that

O O O B I O B I O O O O O O O O O O O O B I O B I O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O B O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O


Efficiently finding web services using a clustering semantic approach Efficiently finding Web services on the Web is a challenging issue in service-oriented computing. Currently, UDDI is a standard for publishing and discovery of Web services, and UDDI registries also provide keyword searches for Web services. However, the search functionality is very simple and fails to account for relationships between Web services. Firstly, users are overwhelmed by the huge number of irrelevant returned services. Secondly, the intentions of users and the semantics in Web services are ignored. Inspired by the success of partitioning approach used in the database design, we used a novel clustering semantic algorithm to eliminate irrelevant services with respect to a query. Then we utilized Probabilistic Latent Semantic Analysis (PLSA), a machine learning method, to capture the semantics hidden behind the words in a query, and the descriptions in the services, so that service matching can be carried out at the concept level. This paper reports upon the preliminary experimental evaluation that shows improvements over recall and precision. Web services have emerged as one of distributed computing technologies and sparked a new round of interest from industrial and research communities. As Web services adopt open standard interfaces and protocols, they are likely used as basic software building blocks in service-oriented applications, which are expected to play important role in a variety of application domains such as business application integration, business-to-business (B2B) and business information management. Meanwhile, inspired by the promise of applications presented by Web services, the research community has identified two major areas of interests: Web service discovery and Web service composition. In this paper, we address the issue of efficiently finding Web services on the Web. It is a challenging task to effectively find the desired Web services that conceptually match user's needs. In this paper, we studied two main problems introduced by the keyword-based search approach: lacking semantics and high cost of computation.. To overcome the problems, we proposed a clustering Probabilistic Semantic Approach (CPLSA). Based on the assumption that the efficiency of finding services can be improved if irrelevant data is eliminated, we applied a k-means approach to eliminate irrelevant services. After removing irrelevant services with respect to a query, the PLSA technique is applied to the service dataset so that service matching against the query can be carried out at the concept level. We also performed several experiments to evaluate the effectiveness of the proposed approach. Overall, the results show that our approaches improve over recall and precision. Table 2 Table 2 Table 2 Table 2 Table 3 Table 3 Table 3 Table 3 . . . . examples of the most li examples of the most li examples of the most li examples of the most likely words kely words kely words kely words for 4 hidden concept for 4 hidden concept for 4 hidden concept for 4 hidden concept Fig Fig Fig Figure 5 In this experiment, we evaluated the performance using our semantic matching service approach (CPLSA). We first trained the probabilistic semantic model through setting the different numbers of latent semantic variables ranging from 2 to 20, in order to observe the performance of the retrieval. As data used in this work is artificially classified into different categories, the results were observed in various service categories. In particular, we calculate and compare the recall and precision by selecting four hidden semantic variables, which represent four service categories: Business, Communications, Converter and Money. In addition, CPLSA performance was investigated by comparing our probabilistic semantic approach with a keyword approach. The first experiment was implemented over the dataset to observe the performance of probability model learning. Table 2 lists the 10 extracted latent aspects and their corresponding categories. An example of the likely words for four hidden semantic concept is shown in Table 3 .. To see how effective our clustering semantic approach described in the previous section is, we compared the performance of the CPLSA approach with the keyword-based approach. In this experiment, we first fixed the parameter for the experiment, e.g., setting clusters' number to 4. The comparison was made on the top n=10 results retuned by each method, and the experiments were repeated 10 times. The result of the comparison on the accuracy is shown in the Figure 5 . As can be seen from this figure, the performance of keyword-based technique only based on the text description in Web services is poor. However, the accuracy of service retrieval is improved when CPLSA approach is introduced.. The next experiment implemented was to inspect the recall and precision by comparing CPLSA and keyword-based approach. The results are illustrated in Figure 6 . From the Figure 6 , we can see that CPLSA performed better than keyword-based approach in the selected four categories. For example, for the query containing "conversion", keyword-based approach may retrieve only those service that include the word conversion, but PLSA-based approach can get services including words "conversion" and "translation". In this section we briefly discuss some of the research work related to locating Web services.. Although various approaches can be used to locate Web services on the Web, this research is focused on the service discovery problem using a clustering method. The clustering methodology is a technology that transforms a complex problem into a series of simpler ones, which can be handled more easily. Specifically, this technology re-organizes a set of data into different groups based on some standards of similarity. Clustering analysis has been often used in computer science, as in data mining, in information retrieval, and in pattern classification.. More recently, clustering approaches are used for discovering Web services [6, 1, 16] . Dong [6] puts forward a clustering approach to search Web services where the search consisted of two main stages. A service user first types keywords into a service search engine, looking for the corresponding services. Then, based on the initial Web services returned, the approach extracts semantic concepts from the natural language descriptions provided in the Web services. In particular, with the help of the co-occurrence of the terms appearing in the inputs and outputs, in the names of the operations and in the descriptions of Web services, the similarity search approach employs the agglomerative clustering algorithm for clustering these terms to the meaningful concepts. Through combination of the original keywords and the concepts extracted from the descriptions in the services, the similarity of two Web services can be compared at the concept level so that the proposed approach improves the precision and recall.. Arbramowicz [1] proposes an architecture for Web services filtering and clustering. The service filtering is based on the profiles representing users and application information, which are further described through Web Ontology Language for Services (OWL-S). In order to improve the effectiveness of the filtering process , a clustering analysis is applied to the filtering process by comparing services with related the clusters. The objectives of the proposed matchmaking process are to save execution time, and to improve the refinement of the stored data. Another similar approach [16] concentrates on Web service discovery with OWL-S and clustering technology, which consists of three main steps. The OWL-S is first combined with WSDL to represent service semantics before a clustering algorithm is used to group the collections of heterogeneous services together. Finally, a user query is matched against the clusters, in order to return the suitable services.. Other approach [5] focuses on service discovery based on a directory where Web services are clustered into the predefined hierarchical business categories. In this situation, the performance of reasonable service discovery relies on both service providers and service requesters having prior knowledge on the service organization schemes.. Our approach CPLSA has similarities to approaches [6, 1, 16] in that keywords are used to first retrieve Web services, and extract semantic concepts from the natural language descriptions in the Web services. However, our work differs from these works in several ways. Firstly, we eliminate irrelevant service via exploiting a clustering algorithm to diminish the size of services returned; this approach shows some potential applications like over mobile uses. Secondly, based on the characteristics of Web services with a very limited amount of information, we regard the extraction of semantic concepts from service description as a problem of dealing with missing data. Therefore, we utilize Probabilistic Latent Semantic Analysis (PLSA) [10] , a machine learning method, to capture the semantic concept hidden behind the words in a query and the advertisements in services.

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Three kinds of normative behaviour: minimal requirements for feedback models We present an analysis for modelling social norms. In social psychology three different normative behaviours have been identified: obedience, conformity and compliance. We show that this triad is a useful conceptualisation of normative behaviour and that current models only ever deal with conformity and obedience two, neglecting compliance. We argue that this is a result from modelling having so far focussed too much on agent behaviour rather than agent knowledge and that cognitive models of normative behaviour are needed to capture this third and arguably most interesting normative behaviour. The conundrum of social norms has been the backbone of sociological enquiry from the very start. Social order exists without any central planning or decentralised negotiation, contract or agreement. The conceptualisation of social facts dominated the analysis for the better part of the last century (from Durkheimian origins to the structuralism of the 1960s). Structuralism 1 was later rejected as being too deterministic, not leaving enough agency for individuals (see for example critiques by Bourdieu and more recently Coleman (1990) ). But with a starting point of individuals alone it is hard to explain the phenomenon of social order. This is commonly known as the structure-agency problem of social norms (e.g. see inter alia Ritzer (2007) , Giddens (1993) and Goffman (1959) ).. Different types of social norms can easily be distinguished but it is hard to give a fully fledged typology (Verhagen (2007) ). There are coordination norms, like driving on the left or right, there are fashion norms, like wearing hats or ties, there are moral norms concerning e.g. abortion rights. In terms of modelling there is an array of models of norms, from game theoretic models conceptualising norms via cooperation and defection (Axelrod (1984) ) over models transmitting norms via imitation mechanisms (e.g. Flentge et al. (2001) , Gatherer (2002) , Epstein (2000) ) to models analyising the function of norms (Conte and Castelfranci (1995) ). We can categorise norms by content, transmission mechanism, origin, function etc. but it is likely that we will fail like many other categorisations before (Morris (1956) ). The reason is that it is not the content of the norm itself that is interesting but how and why people adhere to a norm and for that it does not matter whether it is wearing a hat to a wedding of protesting against an abortion clinic.. Rather than attempting a new typology or categorisation of norms we use a tripartition of normative behaviour from social psychology. There are three essential ways of people adhering to norms: conformity, obedience and compliance. Using these three types of adherence to norms we sort existing models of normative behaviour. We show that compliance has not been captured in any models so far and argue that it is the most interesting adherence type as it alone displays a feature unique to humans: context sensitive 2 deliberation about values.. The remainder of the paper is organised as follows. In Section 1 we give a definition of normative behaviour. In Section 2 we explain conformity, obedience and compliance from a social psychology point of view. We particularly focus on compliance, arguing that it is the mechanism of behaviour unique to humans. In Section 3 we sort a set of major models of normative behaviour into the categories established in Section 2. In Section 4 we discuss some minimal cognitive requirements models of normative behaviour have to incorporate if they want to tackle compliance. We conclude in Section 5.

O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


SHARP-looking geometric partitioning A new technique, named SHARP, is presented for the partitioning of VU1 integrated circuits. SHARP is a hillclimbing heuristic that is designed to be incorporated into a partitioning-based placement algorithm.Its important features include a geometric decomposition of the layout surface into a '#'-shaped legion; a multi-objective function that more accurately represents wire usage than the standard min-cut criterion, and extensive use of Steiner trees. A series of experiments demonstrates that the SHARP technique produces very high quality partitions. The physical design process for VLSI circuits is often one of hierarchical decomposition. At all levels of,the hierarchy, an important design step is partitioning the atomic circuit elements that compose the functional unit into a physical package. The physical package is realized typically as a collection of subpackages or modules that are chosen such that together they optimize some predetermined figures of merit. The principal figures of merit are usually concerned with one or more of the following values: number of modules, size of modules, number of external connections required by any module, system delay [6,131.. Circuit partitioning research has concentrated primarily on the mincut partitioning problem which divides a circuit into two roughly equal-sized partitions in a manner that minimizes the inter-module connections. These research investigations have produced a variety of circuit element migration techniques that iteratively transform a given solution [5,6,7l. While these solution methods are primarily p x d y heuristics, they all use hill-climbing techniques to varying extents.. Min-cut partitioning methods have proven to be quite effective for their traditional application of circuit packaging, where a package is characterized by its size and its number of external terminals. This success led researchers to apply the method to other physical design problem -most notably VLSI circuit placement [ 1,4,9,10].. The goal of the placement step is to optimally position circuit elements onto a layout surface. The positioning of a circuit element has two basic components -one is to determine its location, and the other is to specify its orientation. An optimal assignment is typically one which allows the interconnection activity to automatically achieve its goals. These goals are often over-constrained and almost always include minimizing the total wire length and layout surface. Although placement is clearly a problem of at least two dimensions, min-cut partioning methods can produce a solution in the following manner.. Apply the partitioning method to construct two partitions. Elements in different partitions are constrained to lie in different halves of the package.. The algorithm is applied recursively and separately to the two partitions. The recursion terminates when no partition has more than one circuit element in it. The technique is depicted graphically in Figure 1 .. Placement researchers realized that the above method is too simple. To achieve acceptable solutions, the subproblems cannot be dealt with in isolation. Suaris and Kedem's experiments with quadrisection indicate that the method's solution quality is competitive with TIMBERWOLF, while running in only a tenth of the t i m e . Yet, in spite of their generalization, some problems n?main. For example, simultaneous congestion balancing is limited to quadrants in different halves although the preference in practice is to balance cuts on opposite sides of the same half (e.g., a standard cell channel has uniform height in most design methodologies). As another example, the estimate of the muting m a required by a net remains aude as the coarseness of the partitioning allows only straight-line, single bend, and horseshoe connections (with rotations) to be considered.. To overcome these problems, we propose a new partitioning method that is more strongly influenced by the geometry of the layout surface. It is tuned for intra-package connections rather than inter-package. The method is named, SHARP, as the layout circuit surface is decomposed geometrically into nine regions in a manner that resembles a musical '#. This is demonstrated graphically in Figure 2

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