Understanding repair as a creative process of everyday design This paper presents the findings from an exploratory study that looks at how creativity plays a role in the repair and reuse of objects in the home. We are interested in a particular form of creativity that manifests in the everyday -what John Dewey [8] describes as a constant doing and undergoing, as we actively adjust to everyday situations. The goal of this study is to show evidence of repair as not only an act of restoration, but also as an act of creativity that entails the repurposing and resourcing of objects. This study is part of a larger research initiative known as the Everyday Design, where it is believed that everyone is a designer and that design is an ongoing activity that includes the repair, modification, and appropriation of design objects and systems. Furthermore, this study serves as baseline research for future investigations in how to inform the design of technologies whose lifecycle can be extended for various contexts of use through repair. This paper reports on a qualitative study that looks at understanding how creativity plays a role in the everyday repair of objects in the home. We see creativity as a phenomenon that occurs throughout our daily lives. We describe creativity as resourceful and adaptive actions that lead to unique design situations and systems. The goal of this research is to reconstruct the notion of repair as a creative process that serves an important role in the multiple lives of objects in the home.. This study is part of the larger study of Everyday Design. The aim of this research is to re-construct the "user" as an 'everyday designer,' or someone who creatively 'designs' systems in by re-appropriating artifacts through design-inuse [27] . We believe that by understanding the evolution of artifacts and systems through the lens of repair (as a process of design-in-use), we can then begin to inform the design of interactive technologies that can be reused and appropriated to fit a variety of changing contexts and needs.. Understanding everyday repair in the home has relevant implications for interaction design, as we explore the fundamental barriers of objects' physical attributes that either compel or prohibit the repair, reuse and/or appropriation of everyday technologies. We set out to answer the following three questions:. 1. Is repair a creative process?. 2. In what way does repair relate to appropriation? 3. How do acts of appropriation and repair fit within the context of Everyday Design -specifically as aspects/dimensions of design-in-use?. This paper outlines the current status of the project, as we describe the methods of our data collection (via a web survey) and the analysis of 30 responses. We describe our two methods of analysis. The first method entailed the development of an open-coding rubric for defining various states of repair, reuse and 'digitality' of the broken objects submitted. Our second method included an affinity analysis where patterns of repaired objects, particularly their physical attributes, were defined as part of an initial design framework for facilitating creative repair and appropriation. We conclude with a discussion of what implications this research has for the design of technology, and what challenges this poses for the interaction design community. This study demonstrates the need to consider repair as creative activity in the use, and reuse, of objects in the home. Based on the data collected in the surveys, it is clear that we can learn a lot from the material qualities of mechanical objects -specifically when considering the benefits of their inherent simplicity. Further research in this area can move us towards a framework of design that accommodates for creativity in situations where repair is needed -a scenario that is inevitable once the life of a technology ends.. In this paper we give evidence of the barriers to repairing digital technologies. We see the potential in considering how everyday designers operate as creative agents in the multiple 'lives' of objects -particularly in situations where repair entails the creative re-design of objects through resourceful and adaptive actions to meet new needs. This study also offers a different perspective on what we define as broken given the fine line between something that is no longer useful, or no longer usable. This has significant implications for interaction design, as designers accommodate for situations where repair is a viable option when it comes to the "end" of a technology's lifecyclewhether it means the end of its intended usefulness, or when its use may be appropriated in other ways.. Lastly, we see the need to incorporate flexible, substitutable and reclaimable attributes as key aspects of material use in the design of digital technologies, as inspired by our observations of mechanical objects and the ease with which our participants repaired and creatively reused them. We see this as a useful starting point and intend to investigate these factors further in future work. Data collection took place in the form of a qualitative survey that was distributed via email and Facebook. The goal of the survey was to gain insights into the processes by which people repair broken objects, as well as understand the reasons for why certain objects are kept and repaired. Another aspect of this study looked at uncovering the different kinds of values people attributed to objects that are broken, kept and repaired. Participants ranged from ages 20-67 years of age, with a range of different occupations including university students, a lawyer, designers, musicians, teachers, a dental hygienist, and a stay-at-home mom.. The survey population was composed of 50% female and 50% male participants, most of which were between ages 20-29. A total of p=30 responses were submitted with each participant including anywhere between 1-7 examples of repaired and/or broken objects from their home. The total number of objects submitted was n=87. Some of the responses were too vague to give a proper assessment, thus the total objects used in our data analysis came to 74.. The survey took place in two phases; the first phase asked participants the following three questions:. 1. Do you have something that is broken but not thrown away?. 2. Do you have something that is broken which you have repaired and is now more valuable (monetary or sentimental) and/or functions better than before?. 3. Do you have something that is broken which you are still using or reusing in a new way?. Participants were also asked to include pictures of their broken items wherever possible. Photos were used as part of the analysis to determine the objects repair, type (mechanical or digital) and reuse (we will discuss this further in the following section.) The second phase of the survey included follow up emails with participants in an attempt to elicit further information about how and why their objects were or weren't repaired.. The data collected from the survey responses was categorized into two sets. The first set quantified object types and the instances of repair present in each type. These were based on their degree of repairability and degree of digitality, and degree of reusability. The second data set is comprised of value-themes that resulted from an affinity analysis of the participants' submissions. The following two sections will describe each data set and the methods used to analyze them. For degree of repairability, objects were rated as one of the following values: (1) This object is not repaired and not usable; (2) This object is not repaired and is partially usable; (3) There is an attempt to repair this object and it is not usable; (4) There is an attempt to repair this object and it is partially usable; and lastly (5) This object is repaired and is fully usable.. Distinctions of all the objects' type, or degree of digitality, were defined, as we were particularly interested in finding examples of repaired digital objects and the processes that lead to their repair. An object's type was determined based on the following values: (1) This object is mechanical -it has no digital mechanisms; (2) This object has both mechanical and digital mechanisms; and finally (3) This object is digital -it only has digital mechanisms.. Objects were then assessed for their degree of reusability under the following rubric: (1) This object is no longer usable; (2) This object is used as it is originally intended/designed; and (3) This object is used with new intentions/functions.. By using this rubric, we set out to answer the following questions:. 1. Are there visible differences amongst objects repaired versus those unrepaired? Reused or not reused? Repurposed or not repurposed?. 2. What can any emerging patterns from the open-coding scheme say about creativity as part of everyday repair?. We describe the results our analysis in the following section.

O B O O O O O B I O O O O O O O O O O O O O B O O O O O B O B O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O B O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O B O O O O O O B O O O O O O O B O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O B B O B O O O O O O O O O O O O O O B O O O O O O O O B O O B O O O O O B O B O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O B O O O O O O O O O O


The Design of an Environment for Monitoring and Controlling Remote Sensor Networks In this work we present the design of jWebDust, a software environment for monitoring and controlling sensor networks via a web interface. Our software architecture provides a range of services that allow to create customized applications with minimum implementation effort that are easy to administrate. We present its open architecture, the most important design decisions, and discuss its distinct features and functionalities. jWebDust will allow heterogeneous components to operate in the same sensor network, and the integrated management and control of multiple such networks by defining web-based mechanisms to visualize the network state, the results of queries, and a means to inject queries in the network. We have presented the architecture and the design of the main components of jWebDust, and discussed several distinct features along with their implementation and functionality. The main strengths of jWebDust are:. Provides an environment to package and manage the plethora of lower level protocols with minimum implementation and administration effort. Allows to implement new functionality that can be easily integrated with the rest of the architecture at all levels of the hierarchy (i.e., sensor level, control centers level, database level, user-interface level) to best suit the application needs. Supports multiple sensor networks (i.e., physically separated) with multiple/ separate control centers and allows to handle them as a single virtual sensor network, even if more than one sensor share the same ID.. Handles sensor networks comprised of devices with heterogeneous characteristics. Real world sensor networks will rarely be homogeneous. Supports Disconnected/Mobile Control Centers by taking special care of long disconnections of the control centers, and the sensor networks attached to these Figure 9 . A sample interface for vineyard monitoring using portlets.. centers, from the upper parts of the architecture (i.e., database, web, etc.), so that information is not lost. Many users can simultaneously query, monitor, and visualize the execution of the wireless sensor network through a Web-based user interface.. We plan to continue the development of jWebDust by implementing the set of features described in this work, improving them and introducing new ones. For example, we wish to address the security issues uniformly over the application environment. Another issue we are considering is the implementation of sleep-awake strategies that will further increase the lifetime of the network as sensors enter sleep mode to reduce energy consumption. We also plan to make a comparison of jWebDust and other similar software environments, when the software reaches a more stable level. Finally, apart from implementing the user interface using portlets, we also plan to use Google Earth and Google Maps to build some extra functionality. Although wireless sensor networks have attracted a lot of attention from researchers at all levels of the system hierarchy (from the physical layer and communication protocols up to the

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Prediction of Fault-Prone Software Modules Using a Generic Text Discriminator SUMMARY This paper describes a novel approach for detecting faultprone modules using a spam filtering technique. Fault-prone module detection in source code is important for the assurance of software quality. Most previous fault-prone detection approaches have been based on using software metrics. Such approaches, however, have difficulties in collecting the metrics and constructing mathematical models based on the metrics. Because of the increase in the need for spam e-mail detection, the spam filtering technique has progressed as a convenient and effective technique for text mining. In our approach, fault-prone modules are detected in such a way that the source code modules are considered text files and are applied to the spam filter directly. To show the applicability of our approach, we conducted experimental applications using source code repositories of Java based open source developments. The result of experiments shows that our approach can correctly predict 78% of actual fault-prone modules as fault-prone. Fault-prone prediction is one of the most mature area of software engineering. The prediction of faulty software modules is important for both the reduction of development cost and the assurance of software quality. Much research has been conducted so far [2] , [4] , [7] , [11] , [13] - [18] , [20] , [24] . Most research used some kind of software metrics, such as program complexity, size of modules, object-oriented metrics, etc., and constructed mathematical models to calculate fault-proneness. This approach is usually based on a hypothesis that the more complex module the more bugs. However, such a hypothesis is not always true.. We thus tried to break through the conventional faultprone prediction by introducing a text-mining technique. This paper introduces a new idea for fault-prone module detection. The idea is inspired from a spam e-mail filtering technique. According to Postini Inc.'s report, 94% of all e-mail messages on the Internet were spam in November 2006 [23] . Such an explosive increase of spam e-mail messages triggered the development of many spam filtering techniques [3] , [22] .. In spam e-mail filtering, incoming e-mail messages are classified into spam or ham (non-spam) based on the frequency of tokens appearing in e-mail messages. Recently, since the usefulness of Bayesian theory for spam filtering Manuscript received July 2, 2007. Manuscript revised October 15, 2007 . † The authors are with the Graduate School of Information Science and Technology, Osaka University, Suita-shi, 565-0871 Japan.. a) E-mail: o-mizuno@ist.osaka-u.ac.jp DOI: 10.1093/ietisy/e91-d. 4 .888 has been acknowledged, most spam filtering tools have implemented this theory. Consequently, the accuracy of spam detection has been improved drastically.. Spam filters are usually implemented as a generic text discriminator. We thus tried to apply a generic text discriminator to the fault-prone detection. We call our approach "fault-prone filtering." In fault-prone filtering, we consider a software module as an e-mail message, and assume that all of the software modules belong to either fault-prone (FP) modules or not-fault-prone (NFP) modules. After learning of existing FP and NFP modules, we can classify a new module into either FP or NFP by applying a spam filter.. One advantage of such a statistical approach is that we do not have to investigate source code modules in detail. We do not measure any metrics explicitly, but implicitly our approach measures only one metric: frequency of tokens found in the source code.. To validate the usefulness of our approach, we describe experiments using Java-based open source developments, such as argoUML and the Eclipse BIRT plugin. In these experiments, we consider a method in Java class as a module. That is, the judgments of FP and NFP were applied to methods in Java source code. We then performed 10-fold cross validation to evaluate our approach. The result showed that the best classifier can classify 78% of actual fault-prone modules correctly. This result implies that "fault-prone filtering" may be useful for detecting fault-prone modules.. The rest of this paper is organized as follows: Section 2 describes work related to this study. The outline of "fault-prone filtering" is then described in Sect. 3. An experiment to show the effectiveness of our approach is shown in Sect. 4. Section 5 discusses the result obtained in the experiment and Sect. 6 shows threats to the validity of our research. Finally, Sect. 7 summarizes this study and also addresses future work. This paper proposed an approach to classify fault-prone software modules using a spam filtering technique. In our approach, source code modules were considered text files and were applied to the spam filter directly. For the spam filtering software, we selected a generic text discriminator.. We conducted an experiment using source code repositories of Java-based open source developments. The result of our experiment showed that the OSB classifier is the most appropriate for fault-prone prediction. By using the OSB classifier, our approach can classify 78% of actual faultprone modules as fault-prone.. For future work, we have to apply our approach to not only open source development, but also to actual development in industries. Additionally, further investigation of misclassified modules will contribute to improvement of accuracy. Finally, an application environment has to be developed.

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Risk bounds for random regression graphs Abstract. We consider the regression problem and describe an algorithm approximating the regression function by estimators piecewise constant on the elements of an adaptive partition. The partitions are iteratively constructed by suitable random merges and splits, using cuts of arbitrary geometry. We give a risk bound under the assumption that a "weak learning hypothesis" holds, and characterize this hypothesis in terms of a suitable RKHS. Many algorithms based on adaptive partitions have been proposed in the learning theory literature. Different algorithms adopt different strategies for the construction of the adaptive partitions. For example, probably the best known such an algorithm, CART [2] , realizes a series of dyadic cuts by coordinate planes. In this case, the orientations of the cuts are chosen runtime and it is not set in advance how a particular cell will be split. On the contrary, other algorithms are based on a predetermined set of cuts [1] , which constraints the geometry of the resulting cells, e.g. hypercubes. The aim of this paper is devising an algorithm which allows maximum freedom to the geometrical properties of the partitions.. The algorithm is based on an iterative procedure to construct a partition P of the input space X. It is defined in terms of a set C of allowed cuts of X, endowed with a probability measure π. At every iteration t a set of cuts are drawn i.i.d. from C according to π, and one of them is used to perform a split on the current partition. We have in mind (see Example 1) the case of cuts induced by arbitrary half-spaces in the Euclidean space E d , randomly drawn according to an isotropic measure. In order to control the number of elements of the partition, the splits are followed by the merging of a class of (not necessarily connected) elements. The use of merges in the construction of adaptive partitions has been first proposed in the context of classification [14] and recently in the context of regression [12] [11] . But we are not aware of any previous thorough error analysis for adaptive algorithms involving both merges and splits by such general cuts.. A connection between this class of algorithms and boosting theory is also well established in the literature [13] , and in fact our main error estimate (Theorem 1 in Subsection 2.3) relies on an assumption on the regression function f ρ (Hypothesis 3), which can be described as a "weak learning hypothesis". It establishes a lower bound for the average squared covariance of f ρ and the characteristic function of a randomly drawn half-space. Indeed, this quantity can be linked to the risk reduction, due to a random split, of the optimal piecewise constant estimators on the partitions (see Proposition A2). Therefore, Hypothesis 3 describes a guaranteed average risk reduction as effect of a random split.. The second main result of the paper (Theorem 2 in Section 3) shows that the functions belonging to the RKHS induced by the Mercer kernel K(x, y) = 1 − 2C x − y , satisfy Hypothesis 3.. From Theorem 1, Theorem 2, and the expression (4) for the constant C, we get the following Corollary.

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Building the Component Tree in Quasi-Linear Time Abstract-The level sets of a map are the sets of points with level above a given threshold. The connected components of the level sets, thanks to the inclusion relation, can be organized in a tree structure, that is called the component tree. This tree, under several variations, has been used in numerous applications. Various algorithms have been proposed in the literature for computing the component tree. The fastest ones (considering the worst-case complexity) have been proven to run in ( ln( )). In this paper, we propose a simple to implement quasi-linear algorithm for computing the component tree on symmetric graphs, based on Tarjan's union-find procedure. We also propose an algorithm that computes the most significant lobes of a map. T HE LEVEL sets of a map are the sets of points with a level above a given threshold. The connected components of the level sets, thanks to the inclusion relation, can be organized in a tree structure, that is called the component tree. The component tree captures some essential features of the map. It has been used (under several variations) in numerous applications among which we can cite: image filtering and segmentation [7] , [11] , [12] , [14] , video segmentation [21] , image registration [16] , [18] , image compression [21] , and data visualization [5] . This tree is also fundamental for the efficient computation of the topological watershed introduced by Couprie and Bertrand [3] , [7] , [8] .. While having been (re)discovered by several authors for image processing applications, the component tree concept was first introduced in statistics [13] , [26] for classification and clustering. For image processing, the use of this tree in order to represent the "meaningful" information contained in a numerical function can be found in particular, in a paper by Hanusse and Guillataud [11] , [12] ; the authors claim that this tree can play a central role in image segmentation, and suggest a way to compute it, based on an immersion simulation. Several authors, such as Vachier [25] , Breen and Jones [4] , and Salembier et al. [21] have used some variations of this structure in order to implement efficiently some morphological operators (e.g., connected operators [22] , granulometries, extinction functions, dynamics [2] ).. Manuscript received November 7, 2005 ; revised March 10, 2006 . The associate editor coordinating the review of this manuscript and approving it for publication was Dr. Philippe Salembier.. The authors are with the Institut Gaspard-Monge, Groupe ESIEE, Laboratoire A2SI, BP99, 93162 Noisy-le-Grand Cedex, France (e-mail: l.najman@esiee.fr; m.couprie@esiee.fr).. Digital Object Identifier 10.1109/TIP.2006.877518. Let us describe informally an "emergence" process that will later help us designing an algorithm for building the component tree. Using topographical references, we see the map as the surface of a relief, with the level of a point corresponding to its altitude. Imagine that the surface is completely covered by water, and that the level of water slowly decreases. Islands (regional maxima) appear. These islands form the leaves of the component tree. As the level of water decreases, islands grow, building the branches of the tree. Sometimes, at a given level, several islands merge into one connected piece. Such pieces are the forks of the tree. We stop when all the water has disappeared. The emerged area forms a unique component: the root of the tree.. Various algorithms have been proposed in the literature for computing the component tree [4] , [15] , [21] , the latter reference also contains a discussion about time complexity of the different algorithms. The fastest ones (considering the worst-case complexity) have been proved to run in , where denotes the number of pixels of the image. In this paper, 1 we propose a quasi-linear algorithm for computing the component tree of functions defined on general symmetric graphs, based on Tarjan's union-find [24] procedure. More precisely, our algorithm runs in where denotes the size of the graph (number of vertices number of edges) and is a very slow-growing "diagonal inverse" of the Ackermann's function (we have ). We would like to emphasize that this algorithm is simple to implement.. The paper is organised as follows: we first recall the definitions of some basic graph notions and define the component tree in this framework. We explain the disjoint set problem, together with the solution proposed by Tarjan. Using a disjoint set fomulation, we present our component tree algorithm, and we describe its execution on an example. We then show that the proposed algorithm is quasi-linear with respect to the size of the graph, and compare it to one of the most cited component tree algorithm. We illustrate the use of the component tree for automatic detection of some image features, based on a unique parameter which is the number of features that we expect to find in the image.

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Dynamic synthesis for relaxed memory models Modern architectures implement relaxed memory models which may reorder memory operations or execute them non-atomically. Special instructions called memory fences are provided, allowing control of this behavior.To implement a concurrent algorithm for a modern architecture, the programmer is forced to manually reason about subtle relaxed behaviors and figure out ways to control these behaviors by adding fences to the program. Not only is this process time consuming and error-prone, but it has to be repeated every time the implementation is ported to a different architecture.In this paper, we present the first scalable framework for handling real-world concurrent algorithms running on relaxed architectures. Given a concurrent C program, a safety specification, and a description of the memory model, our framework tests the program on the memory model to expose violations of the specification, and synthesizes a set of necessary ordering constraints that prevent these violations. The ordering constraints are then realized as additional fences in the program.We implemented our approach in a tool called DFENCE based on LLVM and used it to infer fences in a number of concurrent algorithms. Using DFENCE, we perform the first in-depth study of the interaction between fences in real-world concurrent C programs, correctness criteria such as sequential consistency and linearizability, and memory models such as TSO and PSO, yielding many interesting observations. We believe that this is the first tool that can handle programs at the scale and complexity of a lock-free memory allocator. Modern architectures use relaxed memory models in which memory operations may be reordered and executed non-atomically [2] . These models enable improved hardware performance but pose a burden on the programmer, forcing her to understand the effect that the memory model has on their implementation. To allow programmer control over those executions, processors provide special memory fence instructions.. As multicore processors increasingly dominate the market, highly-concurrent algorithms become critical components of many systems [28] . Highly-concurrent algorithms are notoriously hard to get right [22] and often rely on subtle ordering of events, which may be violated under relaxed memory models [14, Ch.7] .. Placing Memory Fences Manually reasoning where to place fences in a concurrent program running on a relaxed architecture is a challenging task. Using too many fences (over-fencing) hinders performance, while missing necessary fences (under-fencing) permits illegal executions. Manually balancing between over-and under-fencing is very difficult, time-consuming and error-prone [4, 14] . Furthermore, the process of placing fences is repeated whenever the algorithm changes, and whenever it is ported to a different architecture.. Our goal is to automate the task of fence placement and free the programmer to focus on the algorithmic details of her work. Automatic fence placement is important for expert designers of concurrent algorithms, as it lets the designer quickly prototype with different algorithmic choices. Automatic fence placement is also important for any programmer trying to implement a concurrent algorithm as published in the literature. Because fence placement depend on the specific architecture, concurrent algorithms are usually published without a detailed fence placements for different architectures. This presents a nontrivial challenge to any programmer trying to implement an algorithm from the literature on relaxed architectures.. Dynamic Synthesis Existing approaches to automatic fence inference are either overly conservative [26] , resulting in overfencing, or have severely limited scalability [17, 18] . The main idea in this paper is to break the scalability barrier of static approaches by performing the synthesis based on dynamic executions. To identify illegal executions, we introduce a flush-delaying demonic scheduler that is effective in exposing illegal executions under relaxed memory models.. Given a program P , a specification S, and a description of the memory model M , guided execution (using the flush-based scheduler) of P under M can be used to identify a set of illegal execu- tions (violating S). The tool will then automatically synthesize a program P that avoids the observed illegal executions (under M ), but still permits as many legal executions as possible.. Evaluation Enabled by our tool, we perform the first in-depth study of the subtle interaction between: i) required fences in a number of real-world concurrent C algorithms (including a lock-free memory allocator), ii) correctness criteria such as linearizabiltiy and (operation-level) sequential consistency [14] , and iii) relaxed memory models such as TSO and PSO. In this section, we show how different synchronization requirements arise for different memory models and specifications. We use a practical work-stealing queue algorithm as an example.. Motivating Example Fig. 1 shows a pseudo-code of the ChaseLev work-stealing queue [7] (note that our implementation handle the complete C code). A work-stealing queue is a special kind of double-ended queue that provides three operations: put, take, and steal. A single owner thread can put and take an item from the tail of the queue, and multiple thief threads can steal an item from the head of the queue. In the implementation of Fig. 1 , H and T are global shared variables storing head and tail indices of the valid section of the array items in the queue. The operations put and take operate on one end of the array, and steal operates on the other end.. The put operation takes a task as parameter, and adds it to the tail of the queue by storing it in items [t] and incrementing the tail index T. The take operation uses optimistic synchronization, repeatedly trying to remove an item from the tail of the queue, potentially restarting if the tail and the head refer to the same item. take works by first decrementing the tail index, and comparing the new value with the head index. There are three possible cases:. • new tail index is smaller than head index, meaning that the queue is empty. In this case, the original value of tail index is restored and the take returns EMPTY (line 9).. • new tail index is larger than head index, take then uses it to read and return the item from the array.. • new tail index equals to head index, in which case, the only item in the queue may be potentially stolen by a concurrent steal operation. A compare-and-swap (CAS) instruction is used to check whether the head has changed since we read it into h. If the head has not changed, then there is no concurrent steal, and the single item in the queue can be returned, while the head is updated to the new value h+1. If the value of head has changed, take restarts by going to the next loop iteration. Similarly, the implementation of steal reads the head and tail indexes of the array first, and if the head index is larger or equal to the tail index, either the queue is empty or the only item is taken by the owner, and the thief returns EMPTY. Otherwise, it can read the items pointed by the head. In case no other thieves are stealing the same element, a CAS instruction is used to update the head index atomically. If the CAS succeeds, the item can be returned, otherwise, the steal function needs to retry. Correctness Criteria and Terminology The implementation of Fig. 1 works correctly on an ideal processor without memory model effects. Under this ideal processor, the two CAS instructions in the algorithm are sufficient for correctly updating the head index H.. In this work, we focus on two important specifications: (operationlevel) sequential consistency and linearizability. Note that the term operation-level sequential consistency refers to the behavior of the algorithm and not to the memory model itself. Precise definitions and extensive discussion comparing (operation-level) sequential consistency and linearizability can be found in [14, ]. As we focus on relaxed memory models, in the rest of the paper we use the term sequential consistency to mean operation-level sequential consistency (and not hardware-level sequential consistency). Informally, both, (operation-level) sequential consistency and linearizability can be expressed as follows:. • Sequential consistency requires that for each concurrent execution, there exists a serial execution that yields the same result.. • Linearizability requires that for each concurrent execution, there exists a serial execution that yields the same result and maintains the ordering between non-overlapping operations in the concurrent execution. We believe this work is the first detailed comparison between linearizability and sequential consistency specifications for real concurrent algorithms. Returning to our algorithm, unfortunately, a relaxed memory model may reorder accesses to shared variables, leading to unexpected results. For example, in the total store order (TSO) memory model, loads can bypass earlier stores in the same thread, thus another thread can load an inconsistent value and produce an incorrect result. In the partial store order (PSO) memory model, both loads and stores can bypass earlier stores. Correctness under TSO Fig. 2a shows an execution of the ChaseLev queue under the TSO memory model violating sequential consistency. In this execution, thread 1 performs a take(1) operation, and thread 2 performs steal(1), trying to steal the same item. Thread 1 first updates the tail index of the queue to 0, and then loads 1 from the head index. For thread 1, the head equals to the tail, and it takes the first element of the queue, 1, successfully. However, since the update of the tail index by thread 1 is buffered (noted in boldface), thread 2 can only load the original 1 from the tail index, and returns the same item 1. The same element is popped by two different threads, and we cannot find a serial execution that has the same result. The original implementation violates the sequential consistency on TSO memory model. To fix this problem, we need to guarantee that the buffered store of the tail index in thread 1 is committed to main memory and visible to other threads before the head index is loaded. This can be accomplished by inserting a memory fence after the store (F1 in Fig. 1 ), which enforces a flush of the buffered store to main memory. Correctness under PSO Unfortunately, fence F1 is not sufficient when running the algorithm on the PSO memory model. Under PSO, a possible store-store reordering can still lead to violation of sequential consistency as shown in Fig. 2b . In this execution, thread 1 performs put(1) and thread 2 performs steal(1). Thread 1 tries to store the item 1 in the first position of the queue and updates the tail index in main memory. Concurrently, thread 2 loads the new tail index, finds there is a single item in the queue and loads the item. However, the real value of the item is buffered by thread 1, and thread 2 reads an uninitialized value 0. For this execution, we cannot find a serial execution that can fetch an item which has not been put by any of the threads. To fix this problem, before thread 1 updates the tail index, we need to ensure that the corresponding item is updated first. Thus a memory fence F2 is added after the item store instruction. In general, this store-store reordering can also lead to a memory safety violation if for instance we use the value to index some array. Linearizability Linearizability is stricter than sequential consistency. Linearizability requires at least one additional fence in this algorithm. Fig. 2c shows an execution of the implementation that satisfies SC under PSO (Fig. 2b) , and shows that it violates linearizability. The schedule is similar to the one of Fig. 2b : thread 1 executes put(1), and thread 2 executes steal(-1) after thread 1 finishes put (1) . Even though the store to the first item by thread 1 is committed to main memory before the tail index is updated, thread 2 can load an incorrect value of the tail index due to the buffering in thread 1, resulting in an empty steal. Because put(1) of thread 1 and steal(-1) of thread 2 are non-overlapping, we cannot find a serial execution where the thief fails to steal from a queue that is non-empty. The violation occurs because the update to tail is not committed to main memory. To flush the value of the tail index to main memory, another fence (F3 in Fig. 1 ) needs to be inserted before the method returns. This violation can also occur under TSO, and a memory fence is required there as well. We introduced dynamic synthesis for concurrent programs running on relaxed memory models. The key idea is to break the scalability barrier of standard synthesis approaches by instead focusing on dynamic executions: when a set of violating executions is discovered, the program is automatically repaired to avoid these executions, and the synthesis procedure continues with the repaired program.. We implemented our techniques in LLVM and evaluated its effectiveness on a comprehensive list of concurrent C algorithms including a complex lock-free memory allocator. Each algorithm was evaluated with two memory models (TSO and PSO), three specifications (linearizability, sequential consistency and memory safety), various repair strategies, and different scheduling parameters (e.g. flush probability). We demonstrated the effectiveness of our approach by automatically synthesizing necessary fences for each of the concurrent algorithms.. As future work, we plan to extend our tool with more advanced demonic schedulers to discover violations even quicker. We also plan to add support for other memory models and to evaluate our tool on a wider set of concurrent C programs. Tab. 3 summarizes our results. Under each of the three specifications, we show the fences that DFENCE synthesized for a given memory model (we note that memory safety checking is always on, hence, Linearizability and Sequential Consistency columns include fences inferred due to memory safety violations). We describe each fence with the triple (m, line1 : line2) to mean that we discovered the need for a fence in method m between lines line1 and line2. We use "−" to indicate the end of the method in the triple.. For Chase-Lev's WSQ, we use the locations indicated in Fig. 1 . For Cilk's THE WSQ, the line numbers correspond to our C implementation. For all WSQ and iWSQ, the line numbers are the same as those found in [24] . Similarly for the rest of the algorithms.. For all iWSQ algorithms, the "Memory Safety" column also includes the "no garbage tasks returned" specification. Analysis of iWSQ algorithms under Linearizability or SC requires more involved sequential specifications and is left as future work.. The last column shows the number of locations where a fence can be potentially inserted -this corresponds to the total number of store instructions in the LLVM bytecode. Note that this number is an order of magnitude greater than the actual number of inferred fences, meaning that without any help from the tool, we would need to manually examine an exponential number of location combinations. By Source Lines of Code (LOC), we mean the actual C code and by Bytecode LOC we mean the LLVM bytecode (which is a much larger number). Exhaustive Approaches for Relaxed Memory Models The works in [16, 25] describe explicit-state model checking for the Sparc RMO model, but neither of these approaches perform fence inference. The work in [15] describes an explicit-state model checker and a simple inference technique for the .NET memory model. Recent work [17, 18] focuses on fence inference based on model checking (with abstraction). In [4] , a different approach is taken where instead of working with explicit state, they convert programs into a form that can be checked against an axiomatic model specification. Collectively, the fundamental limitation of these exhaustive approaches is that they are not inherently scalable for larger concurrent programs and often require manual intervention (to specify abstractions or a model of the program). In contrast, our focus is squarely on handling large concurrent C implementations, which in turn dictates our dynamic synthesis approach. Delay Set Analysis A number of works on fence inference [11, 20, 27] rely on concepts such as delay sets and conflict graphs [26] . Particularly, the Pensieve project implements fence inference based on delay set analysis. This kind of analysis is necessarily more conservative than ours for two reasons: first, it is static in nature, and second, the correctness criteria are more restrictive than the ones used in this work. For instance, their criteria would prevent behaviors that are linearizable and should be allowed. Other Approaches The works in [5, 6] present algorithms that find violations under the TSO and PSO memory models based on correctness criteria similar to the ones used in the delay set analysis approaches mentioned above, meaning that [5, 6] can be needlessly conservative. Further, both of these works do not support fence inference. In [30] , the authors propose algorithms that automatically infer synchronization constructs such as atomic sections. Their work does not deal with relaxed memory models. We applied DFENCE to a number of challenging concurrent C algorithms under different settings by varying four dimensions: (i) the memory model (TSO, PSO) (ii) the specification (memory safety, sequential consistency, and linearizability) (iii) the clients, and (iv) scheduler parameters.. In the first part of the evaluation, we evaluate the quality of fence inference under different choices along these four dimensions. Many of the algorithms used in our experiments have already been extensively tested on one memory model, usually TSO (x86). In this case, we first removed the fences from the algorithms and then ran DFENCE to see if it could infer them automatically. When we did not have the available fences for a given model, say PSO, we ran our tool and inspected the results manually to make sure the inferred fences were really required.. In the second part of our evaluation, we explore some of the connections between the different dimensions. In particular, we set out to answer the following questions: 2. Client: How does the choice of client affect the ability to expose a violation, and how does it relate to the choice of specification and memory model?. 3. Specification: How does the choice of specification affect the resulting fence placements?

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O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O B I I O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O B O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O B I I O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Variationally Universal Hashing The strongest well-known measure for the quality of a universal hash-function family is its being ε-strongly universal (ε-SU). We give an example application in which this measure is too week, and we introduce a stronger measure for the quality of a hash-function family, ε-variationally universal (ε-VU). We explain the utility of this notion and provide an approach for constructing efficient ε-VU hash-function families.Key words: Randomized algorithms, cryptography, hashing, universal hashing.A hash-function family H is a collection of hash functions, each h ∈ H having some common domain A and some common, finite, codomain B. One assumes a hash family to be samplable: one can choose a random h from H. Often we assume that the domain A is a set of strings. An element m ∈ A will be called a message. Carter and Wegman introduced hash-function families, and they and Stinson give various measures of their quality [1-3], as we now describe.Hash family H is strongly universal (SU) if for all distinct messages m, m from the domain, the pair (h(m), h(m )) is uniformly distributed when h is randomly sampled from H. Two relaxations of SU are ε-almost universal (ε-AU) and ε-strongly universal (ε-SU), where ε ∈ [0, 1] is a real number. A hash-function family H is ε-AU if the probability that any two distinct messages m, m collide (ie, hash to the same output), when hashed by a randomly A hash-function family H is a collection of hash functions, each h ∈ H having some common domain A and some common, finite, codomain B. One assumes a hash family to be samplable: one can choose a random h from H. Often we assume that the domain A is a set of strings. An element m ∈ A will be called a message. Carter and Wegman introduced hash-function families, and they and Stinson give various measures of their quality [1] [2] [3] , as we now describe.. Hash family H is strongly universal (SU) if for all distinct messages m, m from the domain, the pair (h(m), h(m )) is uniformly distributed when h is randomly sampled from H. Two relaxations of SU are ε-almost universal (ε-AU) and ε-strongly universal (ε-SU), where ε ∈ [0, 1] is a real number. A hash-function family H is ε-AU if the probability that any two distinct messages m, m collide (ie, hash to the same output), when hashed by a randomly selected member of H, is at most ε. When ε is deemed small we say, informally, that H almost-AU. A hash-function family H is ε-SU if for all distinct messages m, m from domain A and all c, c from codomain B,. , and. The first condition says that h(m) is uniformly distributed over B given a randomly chosen h, and the second condition says that you cannot guess h(m) with a probability better than ε even if you know h(m ). When ε is deemed small we say, informally, that H almost-SU.. Almost-AU and almost-SU hash functions have proven to be useful tools, and there is substantial literature on fast computer implementations for these objects. Constructions and software implementations have been given for ε-AU and ε-SU hash-function families with small ε, say ε ≤ 2 −30 , and peak processing rates of less than one CPU cycle per byte of message [4] [5] [6] . Known constructions for SU families are much slower to compute.. While the notion of an almost-SU hash-function family might seem strong, we suggest that it is actually weaker than one may need to be generally useful. As an example, consider the hash familyH = {h f,c : {0,. 64 is a function and c is a 64-bit string. Define h f,c (x) = c || f (x). Choosing a random member ofH is achieved by choosing a random f and c. This family is 2 −64 -SU, which sounds good, but there are natural applications where this family is less appropriate than one might expect. Consider a message authentication scheme where messages are hashed by a random member of the hash-function family, and the result is encrypted by xoring it with a random value, producing a tag. Wegman and Carter showed that when the hash-function family is almost-SU, the tag can be used to establish the message's authenticity [2] . It is often desired, however, to truncate the tag to create a shorter one. One expects this to diminish the level of security, but significant security should remain even if one were to truncate tags to 64 bits, for example. But for the hash functionH, truncating so as to leave the first 64 bits will produce identical hash values for every message hashed. The truncated tags will not be usable for message authentication.. We suggest that the definition of ε-SU, which focuses on ones inability to know the entire value of h(m) once one knows h(m ), is not a technically desirable way to relax the definition of SU for applications like that above. One should instead formalize that everything about h(m) looks random, even if one knows h(m ). We realized this as a byproduct of our earlier work on creating a fast-to-compute message authentication code and a fast-to-compute hash function on which to base it [5] . Achieving the strengthened notion of hash-function security will remain computationally cheap, but a hash-function family that is designed and implemented so as to achieve the strengthened notion will make a more generally-useful tool.

O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I B B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Evaluation on FPGA of triple rail logic robustness against DPA and DEMA Abstract-Side channel attacks are known to be efficient techniques to retrieve secret data. In this context, this paper concerns the evaluation of the robustness of triple rail logic against power and electromagnetic analyses on FPGA devices. More precisely, it aims at demonstrating that the basic concepts behind triple rail logic are valid and may provide interesting design guidelines to get DPA resistant circuits which are also more robust against DEMA. In the last century, modern cryptology has mainly focused on defining cryptosystems resistant against logical attacks. But lately, with the increasing use of secure embedded systems, researchers focused on the correlation between data processed by cryptographic devices and their physical leakages. As a result, new, efficient side-channel attacks exploiting these physical leakages have appeared such as DPA [1] (Differential Power Analysis) and DEMA (Differential Electro-Magnetic Analysis).. Several countermeasures against power analyses have been proposed in former works [2] [3] [4] [5] [6] [7] . Most of these aim at hiding or masking the correlation between processed data and physical leakages, by adding, for example, random power consumption.. In this context, self-timed circuits seem an interesting alternative, since it is more difficult to correlate the leaking syndromes to the data flowing in a secure design in the absence of a global synchronization signal [4] [8] .. Among all available asynchronous circuit families, QDI (Quasi-Delay Insensitive) circuits offer another main advantage, namely the return to zero dual rail encoding used to encode logic values [9] [10] . Also, a single rising transition on one of the two wires generates an invalid code, which has no logical meaning. Consequently, the transmission of a valid logic one or zero always requires switching exactly one wire to VDD. The differential power signature of QDI circuits may therefore be strongly reduced, provided the use of perfectly balanced cells.. Several implantations of robust dual rail cells are available in the literature [5] [6] [7] [10] [11] [12] . Most of these have been proposed to design robust ASIC, and a few works were dedicated to mapping of secure dual rail logic on FPGA [13] .. Among all these works, an investigation of the effective robustness against DPA of dual rail logic has been introduced in [5] [14] [15] . These evaluations demonstrated that the load imbalances introduced during place and route steps significantly reduce the robustness against DPA of dual rail logic. More precisely, the authors of [5] identified the potential mismatches of data propagation delays through different data paths as the main remaining weakness of dual rail logic against DPA. As a result, they suggested in [5] the use of an additional third wire to simultaneously balance the power consumption and the timing, thus obtaining quasi-data independent power consumption and computation time logic.. The scope of this paper is to investigate the efficiency of triple rail logic against DPA and DEMA. To the authors knowledge, this is the first report on concrete results about the robustness of redundant logic against DEMA.. The experiments described here were achieved by implementing a sensitive block of the DES algorithm on FPGA using both dual rail and triple rail data encoding. Next, the robustness against power and electromagnetic analyses of the prototypes were computed.. The remainder of this paper is organized as follows. Section 2 presents secure triple rail logic and its concepts. Section 3 introduces the hard macros developed to efficiently map triple rail logic on FPGAs. Section 4 introduces the power and electromagnetic analysis platform used to evaluate the robustness of triple rail logic against DPA and DEMA. Experimental results are given section 5, and conclusions are drawn in Section 6. In this paper, an experimental evaluation of triple rail logic robustness against DPA and DEMA has been introduced. This evaluation has been done on FPGAs using hard macros and standard place and route algorithms. The results obtained demonstrate: (a) that secure triple rail logic is definitively more robust against DPA/CPA than single rail logic and slightly more robust than dual rail logic, (b) that the mapping on FPGA of dual rail and triple rail logic occupies the same die area and (c) that triple rail logic, while more resistant than single rail and dual rail logic is not fully robust against DEMA/CEMA. This latter result suggests that further effort must be done to spatially balance, in amplitude and time, the switching current flows within the die. However, one may wonder if such a task can be successfully achieved.

O O B O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


DNA Motif Representation with Nucleotide Dependency Abstract-The problem of discovering novel motifs of binding sites is important to the understanding of gene regulatory networks. Motifs are generally represented by matrices (position weight matrix (PWM) or position specific scoring matrix (PSSM)) or strings. However, these representations cannot model biological binding sites well because they fail to capture nucleotide interdependence. It has been pointed out by many researchers that the nucleotides of the DNA binding site cannot be treated independently, for example, the binding sites of zinc finger in proteins. In this paper, a new representation called Scored Position Specific Pattern (SPSP), which is a generalization of the matrix and string representations, is introduced, which takes into consideration the dependent occurrences of neighboring nucleotides. Even though the problem of discovering the optimal motif in SPSP representation is proved to be NP-hard, we introduce a heuristic algorithm called SPSP Finder, which can effectively find optimal motifs in most simulated cases and some real cases for which existing popular motif-finding software, such as Weeder, MEME, and AlignACE, fail. A gene is a segment of the DNA that is the blueprint for protein. In most cases, genes seldom work alone; rather, they cooperate to produce different proteins for a particular function. In order to start the protein decoding process (gene expression), a molecule called transcription factor will bind to a short region (binding site) preceding the gene. One kind of transcription factor can bind to the binding sites of several genes to cause these genes to coexpress. These binding sites have similar patterns called motifs. Discovering novel motifs of unknown transcription factors and the binding sites from a set of DNA sequences is a critical step for understanding the gene regulatory network.. In order to discover motifs of unknown transcription factors, we must first have a model to represent motifs. There are two popular models: string representation [4] , [6] , [7] , [8] , [13] , [14] , [17] , [20] , [22] , [23] , [25] , [26] , [27] , [28] , [29] , [30] , [31] , [32] , [33] and matrix representation [1] , [2] , [9] , [11] , [15] , [16] , [18] , [19] , [21] . String representation is the most basic representation which uses a length-l string of symbols (or nucleotides) "A," "C," "G" and "T" to describe a motif. To improve the representation's descriptive power, wildcard symbols [6] , [26] , [31] can be introduced into the string to represent choice from a subset of symbols at a particular position (for example, "K" can denote "G" or "T"). Matrix representation further improves descriptive power. In the matrix representation, motifs of length l are represented by position weight matrices (PWMs) or position specific scoring matrices (PSSMs) of size 4 Â l with the four entries in the jth column of the matrix, effectively giving the occurrence probabilities of the four nucleotides at position j.. Although matrix representation appears superior, the solution space for PWMs and PSSMs, which consists of 4l real numbers is infinite in size, and there are many local optimal matrices, thus, algorithms generally either produce a suboptimal motif matrix [1] , [2] , [9] , [15] , [16] , [21] or take too long to run when the motif is longer than 10 bp [19] .. As it turns out, the string and the matrix representations share an important common weakness: They assume the occurrence of each nucleotide at a particular position of a binding site is independent of the occurrence of nucleotides at other positions. This assumption does not represent the true picture. According to Bulyk et al. [5] , analysis of wildtype and mutant Zif268 (Egr1) zinc fingers gives compelling evidence that nucleotides of transcription factor binding sites should not be treated independently, and a more realistic motif representation should be able to describe nucleotide interdependence. Man and Stormo [24] have arrived at a similar conclusion in their analysis of Salmonella bacteriophage repressor Mnt: They found that interactions of Mnt with nucleotides at positions 16 and 17 of the 21 bp binding site are in fact not independent.. When the positions of binding sites are known, we may represent the motif by Hidden Markov Model (HMM) [36] , Bayesian network [3] , or enhanced PWM [10] , which can overcome the above weakness. However, these models cannot be easily extended to discover novel motifs especially when the number of coexpressed genes is small (say, less than 10). It is because the input data does not contain enough information for deriving the hidden motif and the above models usually overfit the input data. Hence, they are far less popular representations.. In this paper, we introduce a new motif representation called Scored Position Specific Pattern (SPSP), which has the following advantages:. 1. Better representation. SPSP can describe the interdependence between neighboring nucleotides with similar number of parameters as string and matrix representations. In this paper, we have proposed a new and better representation based on SPSP to describe a motif and its binding sites. With the proposed heuristic algorithm for the RMD Problem, we can successfully find motifs and their binding sites even in some situations in which existing popular software fail. In the RMD problem, the possible scores received by the binding sites are limited to a small set of integers. In the real biological situation, each binding site should have a different score. With this assumption, we would expect an increase in the success rate of finding the correct motif. However, finding the optimal motif for the general MD Problem without restrictions is very difficult and should be no easier than finding the optimal motif in matrix representation. The difficulty lies not only with the large solution space of the score fs i;j g, but also with the exponential number of possible sets of patterns for a length-l

O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Variations on a theme by Schalkwijk and Kailath Schalkwijk and Kailath (1966) developed a class of block codes for Gaussian channels with ideal feedback for which the probability of decoding error decreases as a second-order exponent in block length for rates below capacity. This well-known but surprising result is explained and simply derived here in terms of a result by Elias (1956) concerning the minimum mean-square distortion achievable in transmitting a single Gaussian random variable over multiple uses of the same Gaussian channel. A simple modification of the Schalkwijk-Kailath scheme is then shown to have an error probability that decreases with an exponential order which is linearly increasing with block length. In the infinite bandwidth limit, this scheme produces zero error probability using bounded expected energy at all rates below capacity. A lower bound on error probability for the finite bandwidth case is then derived in which the error probability decreases with an exponential order which is linearly increasing in block length at the same rate as the upper bound. This note describes coding and decoding strategies for discrete-time additive memoryless Gaussian-noise (DAMGN) channels with ideal feedback. It was shown by Shannon [14] in 1961 that feedback does not increase the capacity of memoryless channels, and was shown by Pinsker [10] in 1968 that fixed-length block codes on Gaussiannoise channels with feedback can not exceed the sphere packing bound if the energy per codeword is bounded independently of the noise realization. It is clear, however, that reliable communication can be simplified by the use of feedback, as illustrated by standard automatic repeat strategies at the data link control layer. There is a substantial literature (for example [11] , [3] , [9] ) on using variable-length strategies to substantially improve the rate of exponential decay of error probability with expected coding constraint length. These strategies essentially use the feedback to coordinate postponement of the final decision when the noise would otherwise cause errors. Thus small error probabilities can be achieved through the use of occasional long delays, while keeping the expected delay small.. For DAMGN channels an additional mechanism for using feedback exists whereby the transmitter can transmit unusually large amplitude signals when it observes that the receiver is in danger of making a decoding error. The power (i.e., the expected squared amplitude) can be kept small because these large amplitude signals are rarely required. In 1966, Schalkwijk and Kailath [13] used this mechanism in a fixed-length block-coding scheme for infinite bandwidth Gaussian noise channels with ideal feedback. They demonstrated the surprising result that the resulting probability of decoding error decreases as a second order exponential 1 in the code constraint length at all transmission rates less than capacity. Schalkwijk [12] extended this result to the finite bandwidth case, i.e., DAMGN channels. Later, Kramer [8] (for the infinite bandwidth case) and Zigangirov [15] (for the finite bandwidth case) showed that the above doubly exponential bounds could be replaced by kth order exponential bounds for any k > 2 in the limit of arbitrarily large block lengths. Later encoding schemes inspired by the Schalkwijk and Kailath approach have been developed for multi-user communication with DAMGN [16] , [17] , [18] , [19] , [20] , secure communication with DAMGN [21] and point to point communication for Gaussian noise channels with memory [22] .. The purpose of this paper is three-fold. First, the existing results for DAMGN channels with ideal feedback are made more transparent by expressing them in terms of a 1956 paper by Elias on transmitting a single signal from a Gaussian source via multiple uses of a DAMGN channel with feedback. Second, using an approach similar to that of Zigangirov in [15] , we strengthen the results of [8] and [15] , showing that error probability can be made to decrease with blocklength n at least with an exponential order an − b for given coefficients a > 0 and b > 0. Third, a lower bound is derived. This lower bound decreases with an exponential order in n equal to an + b ′ (n) where a is the same as in the upper bound and b ′ (n) is a sublinear function 2 of the block length n. Neither this paper nor the earlier results in [12] , [13] , [8] , and [15] are intended to be practical. Indeed, these second and higher order exponents require unbounded amplitudes (see [10] , [2] , [9] ). Also Kim et al [7] have recently shown that if the feedback is ideal except for additive Gaussian noise, then the error probability decreases only as a single exponential in block length, although the exponent increases with increasing signal-to-noise ratio in the feedback channel. Thus our purpose here is simply to provide increased understanding of the ideal conditions assumed.. We first review the Elias result [4] and use it to get an almost trivial derivation of the Schalkwijk and Kailath results. The derivation yields an exact expression for error probability, optimized over a class of algorithms including those in [12] , [13] . The linear processing inherent in that class of algorithms is relaxed to obtain error probabilities that decrease with block length n at a rate much faster than an exponential order of 2. Finally a lower bound to the probability of decoding error is derived. This lower bound is first derived for the case of two codewords and is then generalized to arbitrary rates less than capacity.

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Simple equations on binary factorial languages We consider equations on the monoid of factorial languages on the binary alphabet. We use the notion of a canonical decomposition of a factorial language and previous results by Avgustinovich and the author to solve several simple equations on binary factorial languages including X n = Y n , the commutation equation XY = Y X and the conjugacy equation XZ = ZY . At the end of the paper we discuss the difficulties hindering to reduce equations on factorial languages to equations on words and to enlarge the alphabet considered. Language equations consitute an extensively developing and very non-trivial area. Their behaviour shows impressive differences with that of word equations and is much more complicated [10] . Even if we restrict ourselves to single equations envolving as an operation only the catenation, many intricate effects appear.. As an example consider the commutation equation. On words, it is easy to completely solve it: if x and y are finite words, we have xy = yx if and only if x = z n and y = z m for some word z and some non-negative integers n and m.

O O O O O O O O O O O B I I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O