Scalability and resource usage of an OLAP benchmark on clusters of PCs Designing clusters of PCs for distributed databases processing OLAP (On Line Analytical Processing) workloads in parallel with good scalability remains a particular challenge as we are lacking a deep understanding of the architectural issues around resource usage by standard DBMSs on distributed platforms. To address this problem, we present a novel performance monitoring framework for filtering and abstracting samples of performance data from low level counters into a high level performance picture. Our framework is used side by side with the DBMS and delivers many interesting insights about the most critical resource in the different queries and systems configuration. As required for a larger distributed hardware/software system, our solution comprises software instrumentation at the OS level, tools for gathering performance relevant data and an analytical model for performance evaluation and performance prediction to future platforms. We demonstrate the viability of our approach with the in-depth analysis of distributed TPC-D, a standard OLAP benchmark running on clusters of commodity PCs. Based on the data provided by our framework, we isolate and resolve a few crucial performance issues of OLAP workloads on clusters. For different queries, we give a workload characterization in terms of resource usage, quantify the optimal scalability and investigate the impact of the networking speed on the overall application performance. We show that the disk performance and CPU speed remains the most critical resource bottleneck for most queries. Queries with a lot of inter-node communication are limited by the communication software inefficiency within the DBMS and not by the raw networking speeds. A systematic performance evaluation constitutes a solid basis for architectural decisions and system optimization in clusters of PCs that are dedicated to large parallel database systems. Clusters of commodity PCs have become a highly popular platform for distributed computing since simple PC workstation have one of the best price performance ratios in the market for computing equipment. Moving large OLAP (On Line Analytical Processing) database workloads to clusters of commodity PCs looks very tempting because of the lower cost of clusters and the significant potential for speed-up. As any other effort in parallel and distributed computing, the success depends on proper performance analysis of the entire system including hardware and software. Engineering such systems for scalability and good performance remains a highly difficult task, since we are lacking tools and instrumentation for performance analysis that work in distributed systems and with standard DBMS. The scalability of the different TPC-D queries, chosen as a typical example of OLAP applications on PC clusters presents a picture of unpredictable performance and speedup numbers that seem to be highly sensitive to the nature of the workload. Figure 1 shows a typical study case for the TPC-D Benchmark distributed with TP-Lite (a software tool for distributing queries) on three nodes of a cluster of PCs. We expect a speed-up of almost three (shown with the upper line in the picture) however, not all the queries are sped up (i.e 2,9 and 10) and some of them (i.e. 5 and 7) do not even end in a reasonable time due to some inefficiency in parallel processing. For studying the reason of suboptimal speed-up in Figure 1 , most DBMS like ORACLE incorporate elaborate instrumentation for performance monitoring and tuning [9, 6] . However, such instrumentation normally works on the basis of data collection inside the DBMS and not on the basis of mapping the operating system state or the basic performance monitoring data back to an abstraction level that is more appropriate for a user. In particular, the performance monitoring instrumentation of ORACLE only accounts for the total count of operations and does neither allow to efficiently sample performance counts at certain intervals nor allow for this information to be collected efficiently from a large number processing nodes in a cluster. While some of the logical or table access counts would certainly be interesting, most performance information of the database management system does not directly relate to the usage of physical resources in a distributed system and is therefore hard to use in a framework that aims at predicting the execution time based on application and platform parameters. In applications that use multiple processors and distribute a large workload for the sake of higher execution speed, precise understanding of resource utilization becomes a crucial concern for finding the causes of performance and scalability problems. Such an investigation requires a proper engineering of the complex system. A precise understanding of resource utilization is not just required for fine tuning a running system, but also for the prediction of scalability or the study of viability of the application on new, alternative platforms such as clusters of low cost commodity PCs. The problem of understanding which hardware component leads to which part of the total execution time in simple queries has been previously studied in [1] for a memory resident database and different kind of commercial DBMSs running on an Intel Xeon and Windows NT 4.0. The study focuses on processor and memory interactions excluding effects of I/O subsystems and data partitioning. Our main contribution in this paper is to explain precise resource usage and the scalability of the TPC-D Benchmark running on clusters of PCs including disks and networks. We demonstrate that there is indeed a systematic way to filter the raw performance data provided by the operating system and turn the result into a more abstract performance picture that reflects the the resource usage of the distributed application code. As cluster architects we can improve the configuration of future PC clusters based on this data about resource usage. Depending on the most performance critical resources we can improve the cost/performance ratio by using cheaper or more expensive CPUs, disks, memory systems (motherboard) or interconnects between the nodes. If we can use cheaper components without penalty in performance we can afford a larger number on nodes in a cluster. Since cluster computing is always about the best use of commodity components, we look at parallel-and distributed systems built entirely with commodity hardware and commercial software components. In particular, we combine the open source operating system LINUX with the proprietary single node DBMS of ORACLE and a lean experimental software layer for the distributing processing of queries. The resulting high performance database system for decision support workloads can be classified as a shared-nothing architecture. Since we are interested in using cluster for very large data sets exceeding the disk capacities of a single node our data distribution scheme relies on partitioning rather than on replication. The rest of the paper is organized as follows: Section 2 describes our approach to distribute the OLAP workload to the nodes of a PC cluster based on the TP-Lite system and the basic characteristics TPC-D benchmark. Section 3 presents our performance monitoring framework for distributed systems using raw performance data supplied by the operating system. Section 4 applies our methodology to three performance issues in distributed databases. We use the framework to characterize the workload of TPC-D and classify different queries according to their resource usage, to investigate the scalability problems of certain queries and to determine the performance impact of different interconnect speeds found in modern PC clusters. Section 6 concludes the paper with a statement about the viability of our approach to instrument a complex system of standard software properly for performance analysis and performance optimization. Performance analysis in parallel databases running on clusters of commodity PCs remains a highly difficult task, since we are still lacking many of the tools and instrumentation that could give us the performance data we need to understand parallel-and distributed systems executing OLAP workloads in standard DBMSs. As a contribution to address this important problem, we present a performance monitoring framework for collecting and filtering the raw performance data given by the operating system in a distributed high performance database system built from common commodity PCs and commercial DBMSs. Our framework for performance monitoring combines the usual monitoring instruments at the operating system level with an effective strategy for collection and interpretation of this monitoring information at the overall systems level. Together with some simple analytical model of overall resource usage, we can assess the high level performance indicators at a level of abstraction that is appropriate for an application writer. In particular, our system is able to give some new insights about the use of specific machine resources in the system. In the existing monitoring system, we capture CPU usage (CPI), two kinds of disk usage (sequential and non-sequential), communication system usage and the work for memory system usage is currently progress. Unlike the built-in performance monitors of most database management systems, our operating system based monitoring solution is fully operational in a cluster setting with distributed processing and accounts for accumulated resource usage as well as for a time-variant resource usage by sampling and collecting performance data at arbitrary intervals. Information about peak resource usage and temporary bottlenecks can be derived from the time-variant resource usage traces.. To demonstrate the viability of our approach and to draw proper architectural conclusion about the construction of future PC clusters for high performance database systems, we use our performance monitoring framework to investigate parallel high performance databases executing OLAP workloads on clusters of commodity PCs. We successfully analyze a highly complex hardware-software system that relies primarily on standard hardware and commercial software components that were provided to us by a database research group. The configuration evaluated includes an ORACLE DBMS for SQL processing at each node, LINUX operating system to manage the node's resources as well as different Ethernet switches to take care of inter-node communication.. The experimental software shell to distribute the queries to different nodes (TP-Lite) is taken from a database research project.. In our measurement effort, we execute a 10GB TPC-D benchmark and to characterize the workload precisely according to the resource usage encountered in the cluster. We gain significant insight into the question of the impact of high performance networking to this sort of application. As a most interesting result, we can classify the queries of TPC-D into CPU-limited, disk-limited or communication-limited queries including a fourth class that remains inefficient due to DBMS software limitations. Knowing the critical resource for each query we can properly explain scalability (or lack thereof) for each query on cluster with three and six nodes. Based on a simple analytic model that factors the total execution time into parts attributed to each resource, we can estimate scalability large number of nodes. To our biggest surprise, the inter-node communication is not the key to better scalability unless the communication facilities of standard DBMS software are drastically improved. In particular, we have shown that the Gigabit high speed network in our high end cluster of PCs does not improve scalability of the application due to inefficiencies in the commercial DBMS software that is used in conjunction with TP-Lite. Clusters of commodity PCs with off-the-shelf software are becoming the most popular platform for very large data processing tasks. Therefore, we look at the execution of a parallel query on top of multiple instances of ORACLE running on nodes of a cluster of PCs under the LINUX operating system. We refer to the database software needed to do this task as DBMS. An application-run in our experiment depends on several parameters controlling the workload and the execution environment. The parameters under investigation are called factors. Most factors are external and under the control of the application writer. However, our approach also deals with parameters that affect performance but are not directly visible to the application writer such as the set of factors related to the characteristics of the platform (i.e. the architectural parameters of a PC cluster) that we define the platform factors. Among them we consider the factors at the following levels:. • the clock rate of the CPU (t clock cycle ): 400 MHz Pentium II (Deschutes) or 1000 MHz Pentium III (Coppermine),. • the average disk read performance 1 (disk rate): 22.0 MB/s (slow disk) or 30.5 MB/s (fast disk). • the average disk access time (t rand access ): 7.3 ms (slow disk) or 6.8 ms (fast disk),. • the speed of the network interconnect (network speed): 100 Mbit/s (Fast Ethernet) or 1000 Mbit/s (Gigabit Ethernet),. • the number of slaves in the cluster (ns): 1, 3 or 6 processing nodes 2 . Besides the factors (parameters under investigation), some parameters are held at constant level for this investigation. For the sake of better explanation, they are written as variable in the analytical performance model of the performance monitoring framework. Among them are the clock cycle per instruction (CP I = 1) linking CPU clock-frequencies to integer performance, the size of a memory block (blk = 512), which is an important constant in the I/O buffering system of LINUX, the number of disks per node (3 disks: one for the system information, one for the indexes and a third for the data), the physical capacity of each disk (disk size = 18 GB), the total size of the tables in the TPC-D database benchmark (10GB) and the memory size (512MB).. The main motivation behind the migration of OLAP database work to clusters of PCs is to run huge databases of terabytescale on PC clusters that are equipped with a large number of inexpensive disks.

O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O B I O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs AbstractAs the number of transistors integrated on a chip continues to increase, a growing challenge is accurately modeling per- 8%, 9.5% and 17.8%, respectively. To design a new microprocessor architects typically create a cycle-accurate simulator and run numerous simulations to quantify performance trade-offs. Not only is the task of creating such a simulator time-consuming, but also running such simulations can be slow. Both are significant components of overall design-to-market time. As microprocessor design cycles stretch with increasing transistor budgets, architects effectively start each new project with less accurate information about the eventual process technology that will be used, leading to designs that may not achieve the full potential of a given process technology node.. An orthogonal approach to obtaining performance estimates for a proposed design is analytical modeling [36] . An analytical model employs mathematical formulas that approximate the performance of the microprocessor being designed based upon program characteristics and microarchitectural parameters. One of the potential advantages of analytical modeling is that it can require much less time than crafting and running a performance simulator. Thus, when an architect has analytical models available to evaluate a given design, the models can help shorten the design cycle. While cycle-accurate simulator infrastructures exist that leverage reuse of modular building blocks [10] , [34] , and workload sampling [29] , [35] can reduce simulation time, another key advantage of analytical modeling is its ability to provide insights that a cycle-accurate simulator may not.. Several analytical models have been proposed before [8] , [16] , [19] , [23] , [24] , [25] , [26] , [27] , [28] and Karkhanis and Smith's first-order model [19] is relatively accurate. Their first-order model separately estimates the cycles per instruction (CPI) component due to branch mispredictions, instruction cache misses, and data cache misses, then adds each CPI component to an estimated CPI under ideal conditions to arrive at a final model for the performance of a superscalar processor. However, little prior work has focused on analytically modeling the performance impact of data prefetching and the performance impact of hardware support for a limited number of overlapping long latency data cache misses due to finite MSHR resources. In this paper we explore how to accurately model these important aspects of modern microprocessor designs.. One significant aspect of long latency data cache misses is the large effect of pending data cache hits (PH) on overall performance. A pending data cache hit is a memory reference to a cache block for which a request has already been initiated by another instruction but has not yet completed (i.e., the requested block is still on its way from memory). Figure 1 compares actual CPI due to long latency data cache misses to modeled CPI due to long latency data cache misses for mcf with increasing memory access latency. The first bar (actual) shows the result from a cycle-accurate simulator whose configuration is described in Section 4. The second bar (baseline) shows the result from a careful re-implementation of a previously proposed hybrid analytical model [19] 1 . The third bar (SWAM w/ PH) illustrates the result from a new technique that we propose in this paper (see Section 3.5.1). In this paper, a modeled CPI due to long latency data cache misses (CP I D$miss ) is always derived by dividing the total extra cycles due to long latency data cache misses by the total number of instructions committed. From Figure 1 we observe that the error becomes increasingly significant as memory latency grows. Therefore, to accurately model the performance of future superscalar microprocessors, it is necessary to carefully model pending data cache hits.. This paper makes the following contributions:. • It shows that the performance impact of pending data cache hits is non-negligible for memory intensive applications and describes how to model their effect on performance in the context of a trace driven hybrid analytical model (Section 3.1).. • It presents a novel technique to more accurately compensate for the potential overestimation of the modeled CP I D$miss , which relies upon analysis of a program's individual characteristics (Section 3.2).. • It proposes a technique to model the CP I D$miss when a data prefetching mechanism is applied in a microprocessor, without requiring a detailed simulator (Section 3.3).. • It describes a technique to analytically model the impact of a limited number of outstanding cache misses supported by a memory system (Section 3.4).. • It also proposes two novel profiling techniques to better analyze overlapped data cache misses (Section 3.5). We evaluate our approach for modeling data prefetching by using it to predict the performance impact of three different prefetching strategies and find the average error of our model is 13.8% versus 50.5% when not using the technique we propose. As the instruction window of future microprocessors becomes larger [9] , a limited number of Miss Status Holding Registers (MSHRs) can have a dramatic impact on the per-1. Our analysis shows that pending data cache hits can significantly impact model accuracy. However, we note that the prediction error of the CPI due to long latency data cache misses we report for our baseline modeling technique (described in Section 2) is in some cases large relative to those reported in [19] . Our baseline modeling technique is our implementation of the firstorder model described in [19] based upon the details described in that paper and the follow-on work [18] , [20] . We believe the discrepancy is partly due to our use of a smaller L2 cache size of 128 KB versus 512 KB used in [19] , and partly due to their use of a technique similar to the one we describe in Section 3.5.1 [32] . formance of the whole system [33] . Our technique reduces the arithmetic mean of the absolute error of our baseline from 33.6% to 9.5% when the maximum number of outstanding misses supported is limited. As with earlier hybrid modeling approaches [19] , [18] , [20] , we find our model is two orders of magnitude faster than detailed simulations. Our improvement increase the realism (and hence applicability) of analytical models for microprocessor designers.. In this paper, we use arithmetic mean of the absolute error to validate the accuracy of an analytical model, which we argue is the correct measure since it always reports the largest error numbers and is thus conservative in not overstating the case for improved accuracy. Note that we are interested in averaging the error of the CPI prediction on different benchmarks, not the average CPI predicted for an entire benchmark suite, which often allows errors on individual benchmarks to "cancel out" in a way that suggests the modeling technique is more accurate than it really is. We also report the geometric mean and harmonic mean of the absolute error to allay any concerns that these numbers might lead to different conclusions. In all cases the improvements resulting from applying our new modeling techniques are robust enough that the selection of averaging technique does not impact our conclusions.. The rest of this paper is organized as follows. Section 2 reviews the first-order model [18] , [19] , [20] . Section 3 describes how to accurately model the effects of pending data cache hits, data prefetching, and hardware that supports a limited number of outstanding data cache misses. Section 4 describes the experimental methodology and Section 5 presents and analyzes our results. Section 6 reviews related work and Section 7 concludes the paper. In this paper, we proposed and evaluated several improvements to an existing analytical performance model for superscalar processors. We showed the importance of properly modeling pending data cache hits and proposed a technique to accurately model their performance impact, while not requiring a performance simulator. We then extended this model to estimate the performance of a microprocessor when an arbitrary data prefetching method is applied. Moreover, we proposed a technique to quantify the impacts of a limited number of MSHRs. Overall, the techniques we introduced in this paper can reduce the modeling error of our baseline from 39.7% to 10.3% for a set of memory intensive benchmarks. The average error of our model is 13.8% when modeling several prefetching strategies and 9.5% when modeling a limited number of supported outstanding cache misses. This section summarizes our experimental results. There exist many analytical models proposed for superscalar microprocessors [24] , [25] , [26] , [28] . A common limitation of early models is that they assume a perfect data cache. As the gap between memory and microprocessor speed increases, data cache misses must be properly modeled to achieve reasonable accuracy.. Agarwal et al. [1] present an analytical cache model estimating cache miss rate given cache parameters. However, in a superscalar, out-of-order execution microprocessor, the cache miss rate itself is not enough to predict the real performance of the program analyzed. Jacob et al. [16] propose an analytical memory model that applies a variational calculus approach to determine a memory hierarchy optimized for the average access time given a fixed hardware budget with an (implicit) assumption that memory level parallelism does not occur. Noonburg and Shen present a superscalar microprocessor Markov chain model [27] that does not model long memory latency. The first-order model proposed by Karkhanis and Smith [19] is the first to attempt to account for long latency data cache misses. Our analytical model improves the accuracy of our re-implementation of their technique described in Section 2 (based upon details available in the literature) by modeling pending data cache hits, and extends it to estimate the performance impact of data prefetching techniques and a limited number of outstanding cache misses.. Some earlier work has investigated the performance impact increasing the number of MSHRs using detailed simula-tions [13] , [3] . The hybrid analytical model that we propose can be used to estimate the performance impact of a limited number of MSHRs without requiring a detailed simulator.. Concurrent with our work, Eyerman proposed an approach similar to SWAM described in Section 3.5.1, except that the profile window slides to begin with each successive long latency miss [11] . Reportedly, a pending hit compensation mechanism was used [22] . To evaluate our analytical model, we have modified SimpleScalar [5] to simulate the performance loss due to long latency data cache misses when accounting for a limited number of MSHRs. We compare against a cycle accurate simulator rather than real hardware to validate our models since a simulator provides insights that would be challenging to obtain without changes to currently deployed superscalar performance counter hardware [12] . We believe the most important factor is comparing two or more competing (hybrid) analytical models against a single detailed simulator provided the latter captures the behavior one wishes to model analytically. Table 1 describes the microarchitectural parameters used in this study. Note we are focusing on predicting only the CPI component for data cache misses using our model. We verified that the CPI contribution due to overlapping miss events is small for our benchmarks with realistic branch prediction and instruction caches [7] so our comparisons in Section 5 is to a detailed cycle accurate simulator in which instruction cache misses have the same latency as hits and all branches are predicted perfectly. In the rest of this paper, we focus on how to accurately predict CP I D$miss , which is the performance loss due to long latency data cache misses when both branch predictor and instruction cache are ideal (this is the same methodology applied to model CP I D$miss described in [19] ). To evaluate the technique proposed in Section 3.3 for estimating the CP I D$miss when a prefetching mechanism is applied, we have applied our modeling techniques to predict the performance benefit of three different prefetching mechanisms: prefetch-on-miss [30] , tagged prefetch [14] , and stride prefetch [2] . When prefetch-on-miss [30] is applied, an access to a cache block that results in a cache miss will initiate a prefetch for the next sequential block in memory given that the block is not in the cache. The tagged prefetch mechanism [14] adds a tag bit to each cache block to indicate whether the block was demand-fetched or prefetched. When a prefetched block is referenced, the next sequential block is prefetched if it is not in the cache. The stride prefetch technique [2] uses a reference prediction table (RPT) to detect address referencing patterns. Each entry in the RPT is assigned a state and a state machine is applied to control the state of each entry. Whether a prefetch is initialized or not depends on the current state of the entry [2] . In this study, we modeled a 128-entry, 4-way RPT that is indexed by the microprocessor's program counter (PC).. To stress our model, we simulate a relatively small L2 cache compared to contemporary microprocessors. We note that the size of the L2 cache that we simulated is close in size to those employed in microprocessors shipped at the time when those benchmarks we use were released. The benchmarks chosen are ones from SPEC 2000 [31] and OLDEN [6] that have at least 10 long latency data cache misses for every 1000 instructions simulated (10MPKI). Table 2 illustrates the miss rates of these benchmarks and the labels used to represent them in figures. Moreover, for each benchmark, we select 100M representative instructions to simulate using the Sim-Point toolkit [29] .

O B I O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O B I O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O B O O B I O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O B O O O O O B O O O O O O O O O B O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O B I O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Quantum Information as a Measure of Multipartite Correlation The mutual information has been successfully used as a measure of correlation strength between quantum systems, especially for bipartite systems. Here we examine the use of this measure for multipartite quantum systems. For system of qubits we find that the difference between 'classical' and 'quantum' regimes of correlation strength amounts to just 1 bit of information, at most. We show that the information content of a correlation can be expanded into correlations between pairwise components and demonstrate that in terms of this information-based measure of correlation the GHZ states are the only states that simultaneously optimize these pairwise correlations for systems of qubits. In classical communication theory it is clear that information cannot be transmitted on a channel unless there is some correlation between the sent and received data [1] . If Alice and Bob, at the endpoints of the channel, cannot establish such a correlation then they cannot exchange information. The correlation is usually characterized by the mutual information I (X; Y ). The correlation between quantum systems is more interesting and subtle than that between their classical counterparts, but this measure of correlation has also been usefully applied to obtain insights into the properties of correlated quantum systems [2] [3] [4] [5] .. With the discovery of discordant states of quantum systems it can be seen that entanglement is not the only source of a correlation that is quantum mechanical in nature [6, 7] . The mutual information, appropriately defined, between two quantum systems provides a measure of the total information content contained in the correlation In particular, if S is the total entropy and S (k) the entropy of a component part, then for a 2-component system the basisindependent single measure of correlation strength, S (1) + S (2) − S, is not sensitive enough on its own to distinguish the contributions to the correlation arising from the various sources.. The relationship between entanglement and correlation and the 'degree' of non-classical behaviour does not seem to be wholly clear even for bipartite entanglement. The difficulty is compounded when we look at tripartite entanglements, or indeed multipartite entanglements. The entanglement of 3 quantum systems, for example, leads to the non-classical property of monogamy which places a limit on the ability to share entanglement between the systems [8] .. Accordingly here we focus simply on a measure of correlation strength, largely avoiding the more difficult issues of the origin of that correlation. Indeed, one may ask the question what does it mean to say that 2 (or more) quantum systems are correlated? In general, the correlation between two systems is only made explicit when measurements are compared. That is to say that correlation is exhibited in the joint properties of observables.. The spin-1/2 singlet state is an example of a maximally entangled bipartite quantum state and yet there is no observable correlation between the spin-z properties of one spin and the spin-x properties of the other. A suitable measure of overall correlation should, therefore, effectively 'average' the correlation between all possible choices of observable. The total information content of the correlation between quantum systems, whether the contributions to the correlation arise from classical or quantum properties, is a fundamental metric that can be applied. As we shall see, this metric does indeed distinguish between classical and non-classical regimes of correlation strength, but further analysis is necessary in order to elucidate the particular non-classical properties that contribute to the stronger correlations in the quantum regime.. Entanglement and discord, and their consequent effect on observable correlations are quantum properties associated with the state of the system. It is therefore reasonable to seek a measure of correlation that is independent of any specific observable and captures some global property of the state. Furthermore, we require that this measure be independent of any notional splitting of a multicomponent system into various components. Of course the correlations between and within any notional partition can vary according to our particular choice, but the correlation of the overall system remains unaffected by any notional partitioning.. In this paper we examine a measure of correlation strength for multipartite quantum systems, initially proposed in [4] , that is simply the information content of the correlation. This is defined as a natural extension of the 'index of correlation' for bipartite systems. The index of correlation for 2 systems is just the quantum generalization of the classical mutual information and, for pure states, is equal to twice the entropy of entanglement. This information-based measure arises as a consequence of imposing certain natural conditions on any measure of correlation strength [9] . We show here that, in a specific sense, this measure applied to systems of qubits implies that the difference between 'quantum' and 'classical' is at most just 1 bit of information, irrespective of the number of qubits. We examine the significance of this single bit and show that the GHZ states of n-qubit systems are the special states that simultaneously optimize pairwise correlations. . In previous work we termed this measure, somewhat superfluously perhaps, as the index of correlation. This quantity is a direct measure of the information contained in the correlation. The difference between quantum systems and classical systems can be ascertained with use of the remarkable Araki-Lieb inequality [10] which states that for any quantum systems A and B the entropies are related by. An immediate consequence of this is that for pure states of the AB system the sub-system entropies are equal. The LHS of this inequality is a specifically quantum mechanical property and the equivalent inequality to (1) for any two classical systems is that. Using these properties we obtain the bounds for the strength of correlation between two systems in the quantum and classical cases as. the bounds in each case only being reached when the sub-systems have equal entropy, and in the quantum case when the total AB system is also in a pure state. If {|a i } and {|b j } are the eigenstates of the Schmidt observables for the A and B systems, respectively, then assuming an n-dimensional Hilbert space for both systems (for convenience) we have State Index of Correlation. The region inf (S (A) , S (B)) ≤ I ≤ 2 inf (S (A) , S (B)) is clearly a non-classical region. Only quantum states of our systems can possess a degree of correlation strength in this region. However, we cannot make the converse supposition that states in the region 0 ≤ I ≤ inf (S (A) , S (B)) are necessarily classical. This is in accord with the profound result of Gisin and Peres which shows that any entangled (non-factorable) pure state of 2 quantum systems will violate a suitably-chosen Bell inequality [11] . The size of the index of correlation alone is thus not always sufficient to determine whether a given state will display non-classical correlations. We must compare this quantity with the individual sub-system entropies in order to determine whether the state is non-classical. It is possible to find states of 2 correlated systems which can be described by a separable mixed state density operator with a higher value for the index of correlation than a weakly-entangled pure state of the two systems.. A simple example of 2 correlated qubits illustrates this point; consider the states of 2 qubits given by. The index of correlation for the first state is just ln 2 whereas the index of correlation for the second can be lower than this when |a| = |b|. The second state will, however, violate a suitably-chosen Bell inequality [11] whereas the first state will not, being essentially a classically-correlated state of the 2 qubits. However, any state of. ) is definitely a non-classical state that cannot be obtained by any classical description of the 2 objects. For 2 qubits this means that any state of [AB] such that ln 2 ≤ I (A; B) ≤ 2 ln 2 is a non-classical state.. This simple example tells us that whilst the index of correlation is a good measure of overall correlation strength, it is not on its own sufficient to distinguish the nature of these correlations in all cases. It is only for certain regions of correlation strength can we definitely say that the system must be necessarily non-classical. A state of the form (5) can be very weakly entangled, with a very small value for any measure of 'overall' correlation, and yet still display highly non-classical properties for specific observable correlations. The production and manipulation of correlated systems of qubits where the quantum nature of the correlation can be used as a resource to yield properties unachievable within a classical framework is a very active and important area of research. The potential inherent in exploiting entanglement can be seen in the development of such new and exciting technologies such as quantum teleportation [15] and quantum computation [16] . Indeed the whole area of quantum information processing in general seems to be a rich framework for the development of new capabilities and insights [17] and the notions of entanglement have generated new perspectives in areas as diverse as, biology [18] , thermodynamics [19] and games [20] , to give just 3 examples of many.. It would seem therefore that understanding the nature of the correlation between quantum systems is an important goal. Whilst correlated states of 2 systems, such as the celebrated singlet state for spin-1/2 particles, may seem simple and straightforward on the surface, at least from a purely mathematical perspective, even pairwise quantum correlations yield a surprisingly subtle and difficult behaviour to interpret. The introduction of the idea of discord has beautifully emphasized that there is still much to learn even about such simple correlated systems. The difficulties and subtleties are further compounded when we consider correlations between more than just 2 quantum systems. The property of monogamy elegantly illustrates some of the further subtleties encountered when we move beyond bipartite correlations.. Information is a fundamental metric that finds a natural role in the description of correlation. Here we have applied this parameter purely as a measure of correlation strength without concerning ourselves about the particular quantum or classical feature that is contributing to the correlation. From the perspective afforded by this information-based parameter we have argued that the difference between 'classical' and 'quantum' for systems of qubits amounts to, at most, one additional bit of information contained in the correlation. We have further shown that for tripartite pure states the entropy of one sub-system places a fundamental bound on the difference in the entropies of the remaining 2 sub-systems.. By developing an expansion of multi-qubit correlation into pairwise correlations of single qubits and collections of qubits it is possible to view the GHZ states as a fundamental state of systems of qubits in that states of this form are the only ones that simultaneously optimise these pairwise correlations. The optimization here is a constrained simultaneous optimization of the various components because, as the property of monogamy demonstrates, the individual pairwise correlations are not independent quantities.

B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O B O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


On the inductive inference of recursive real-valued functions We combine traditional studies of inductive inference and classical continuous mathematics to produce a study of learning real-valued functions. We consider two possible ways to model the learning by example of functions with domain and range the real numbers. The first approach considers functions as represented by computable analytic functions. The second considers arbitrary computable functions of recursive real numbers. In each case we find natural examples of learnable classes of functions and unlearnable classes of functions. The starting point for studies in inductive inference is the model of learning by example introduced by Gold [5] . This is a simple model of learning algorithms that input examples of some function and produce programs that are intended to compute the function generating the examples. Learning takes place as the "correct" program must be produced after the learning algorithm has seen only finitely many examples.. The functions used as input are typically (partial) recursive functions. Using traditional encoding techniques, this class of functions is rich enough to model a wide range of phenomena [ 11. Researchers in inductive inference have used the basic model of Gold to study the effects of other parameters of the learning process such as errors tolerance, plurality of approaches, probability of success, learning via queries, etc. Herein we combine traditional studies of inductive inference and classical continuous mathematics to produce a study of learning real-valued functions.. The basic model of Gold works well as long as the collection of possible examples is effectively enumerable. The first problem that arises in our investigation is how to represent real-valued functions. In this work, we consider two possible ways to model the learning by example of functions with domain and range the real numbers. The first approach considers functions as represented by computable analytic functions. The second considers arbitrary computable functions of recursive real numbers [8] . In this case the sequence of conjectures is required to converge to some approximation of the target function -with a certain error bound allowed. In each case we find natural examples of learnable classes of functions and unlearnable classes of functions. The result with the most intriguing interpretation for machine learning concerns learning functions with an error bound.

O O B I O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


Making nested parallel transactions practical using lightweight hardware support Transactional Memory (TM) simplifies parallel programming by supporting parallel tasks that execute in an atomic and isolated way. To achieve the best possible performance, TM must support the nested parallelism available in real-world applications and supported by popular programming models. A few recent papers have proposed support for nested parallelism in software TM (STM) and hardware TM (HTM). However, the proposed designs are still impractical, as they either introduce excessive runtime overheads or require complex hardware structures.This paper presents filter-accelerated, nested TM (FaNTM). We extend a hybrid TM based on hardware signatures to provide practical support for nested parallel transactions. In the FaNTM design, hardware filters provide continuous and nesting-aware conflict detection, which effectively eliminates the excessive overheads of software nested transactions. In contrast to a full HTM approach, FaNTM simplifies hardware by decoupling nested parallel transactions from caches using hardware filters. We also describe subtle correctness and liveness issues that do not exist in the non-nested baseline TM.We quantify the performance of FaNTM using STAMP applications and microbenchmarks that use concurrent data structures. First, we demonstrate that the runtime overhead of FaNTM is small (2.3% on average) when applications use only single-level parallelism. Second, we show that the incremental performance overhead of FaNTM is reasonable when the available parallelism is used in deeper nesting levels. We also demonstrate that nested parallel transactions on FaNTM run significantly faster (e.g., 12.4×) than those on a nested STM. Finally, we show how nested parallelism is used to improve the overall performance of a transactional microbenchmark. Transactional Memory (TM) [11] has been proposed as a promising solution to simplify parallel programming. With TM, programmers can simply declare parallel tasks as transactions that appear to execute in an atomic and isolated way. TM manages all concurrency control among concurrent transactions. A large number of TM implementations have been proposed based on hardware [9, 13] , software [8, 10, 17] , and hybrid [6, 7, 16] techniques.. To date, most TM systems have assumed sequential execution of the code within transactions. However, real-world parallel applications often include nested parallelism in various forms including nested parallel loops, calls to parallel libraries, and recursive function calls [19] . To achieve the best possible performance with the increasing number of cores, it is critical to fully exploit the parallelism available at all levels. Several popular programming models that do not use transactions have already incorporated nested parallelism [1, 18] ; TM should be extended to efficiently support the case of nested parallelism.. A few recent papers investigated the semantics of concurrent nesting and proposed prototype implementations in STM [2-4, 15, 21] . While compatible with existing multicore chips, most STM implementations already suffer from excessive runtime overheads of TM barriers even for single-level parallelism [6] . To make the problem worse, supporting nested parallelism solely in software may introduce additional performance overheads due to the use of complicated data structures [2, 4] or the use of an algorithm whose time complexity is proportional to the nesting depth [3] . For example, as shown in our performance evaluation, a singlethreaded, transactional version of the red-black tree microbenchmark runs 6.2× slower with single-level transactions and 17.0× slower with nested transactions than a non-transactional, sequential version. Nested parallel transactions in STM will remain impractical unless these performance issues are successfully addressed.. A recent paper investigated how to support nested parallelism in HTM [20] . However, supporting nested parallelism solely in hardware may drastically increase hardware complexity, as it requires intrusive modifications to caches. For instance, apart from the additional transactional metadata bits in tags, the design proposed in [20] requires that caches are capable of maintaining multiple blocks with the same tag but different version IDs, and provide version-combining logic that merges speculative data from multi-ple ways. Given the current trend in which hardware companies are reluctant to introduce complicated hardware components to implement transactional functionality even for single-level parallelism, this hardware-only approach is unlikely to be adopted.. To address this problem, we propose filter-accelerated, nested transactional memory (FaNTM) that provides practical support for nested parallel transactions using hardware filters. FaNTM extends a baseline hybrid TM (SigTM) [6] to implement nesting-aware conflict detection and data versioning. Since hardware filters provide continuous, nesting-aware conflict detection, FaNTM effectively reduces the excessive runtime overheads of software nested transactions. In contrast to a full HTM approach, FaNTM simplifies hardware by decoupling nested transactions from caches. As a result, FaNTM makes nested parallel transactions practical in terms of both performance and implementation cost.. The specific contributions of this work are:. • We propose FaNTM, a hybrid TM system that supports nested parallel transactions with low overheads. FaNTM provides eager data versioning and conflict detection at cache-line granularity across nested parallel transactions.. • We describe subtle correctness and liveness issues such as a dirty-read problem that do not exist in the non-nested baseline TM. We also propose solutions to address the problems.. • We quantify the performance of FaNTM across multiple use scenarios. First The rest of the paper is organized as follows. Section 2 reviews the semantics of concurrent nesting and TM systems. Section 3 presents FaNTM. Section 4 discusses subtle correctness and liveness issues. Section 5 quantifies the performance of FaNTM. Section 6 reviews related work, and Section 7 concludes the paper. The baseline hybrid TM only supports single-level parallelism. Therefore, to support concurrent nesting, FaNTM hardware must be extended to provide nesting-aware conflict detection and retain multiple transactional contexts per processor core. FaNTM software must be extended to implement nesting-aware data versioning and handle liveness issues of nested transactions. This section presents our FaNTM design that implements high-performance nested parallel transactions in a manner that keeps hardware and software complexity low. We also provide a qualitative performance analysis on FaNTM. Figure 1 shows the overall architecture of FaNTM. Each processor has a hardware filter. Filters are connected to the interconnection network to snoop coherence messages such as requests for shared/exclusive accesses and negative acknowledgements (nacks) to these requests. We assume that the underlying coherence protocol provides the nack mechanism. Filters may handle or propagate incoming messages to their associated cache depending on the characteristics of the messages. We also assume that each coherence message includes additional fields such as TID to encode the transactional information on the transaction that generated the message. This paper presented FaNTM, a hybrid TM that provides practical support for nested parallel transactions using hardware filters. FaNTM effectively eliminates excessive runtime overheads of software nested transactions using lightweight hardware support. FaNTM simplifies hardware by decoupling nested parallel transactions from hardware caches. Through our performance evaluation, we showed that FaNTM incurs a small runtime overhead when only single-level parallelism is used. We also demonstrated that nested transactions on FaNTM perform comparably with top-level transactions and run significantly faster than those on a nested STM. Finally, we showed how nested parallelism can improve the performance of a transactional microbenchmark. Moss and Hosking proposed the reference model for concurrent nesting in TM [14] . Based on the proposed model, a few recent papers investigated nested parallelism in STM [2-4, 15, 21] . While compatible with existing multicore chips, this software-only approach may introduce excessive runtime overheads due to the use of complicated data structures [2, 4] or the use of an algorithm whose time complexity is proportional to the nesting depth [3] , limiting its practicality. Our work differs because FaNTM aims to eliminate substantial overheads of software nested transactions using hardware acceleration.. Vachharajani proposed an HTM that supports nested parallelism within transactions [20] . While insightful, the proposed design drastically increases hardware complexity by intrusively modifying hardware caches to implement nesting-aware conflict detection and data versioning. In contrast, FaNTM simplifies hardware by decoupling nesting-aware transactional functionality from caches using hardware filters. We used an execution-driven simulator for x86 multi-core systems. Table 5 summarizes the main architectural parameters. The processor model assumes that all instructions have a CPI of 1.0 except for the instructions that access memory or generate messages over the interconnection network. However, all the timing details in the memory hierarchy are modeled, including contention and queueing events.. Through our performance evaluation, we aim to answer the following three questions: Q1: What is the performance overhead of FaNTM when applications only use top-level parallelism? Q2: What is the performance overhead when the available parallelism is exploited in deeper nesting levels? Q3: How can we exploit nested parallelism to improve transactional application performance? For Q1, we used seven of the eight STAMP benchmarks [5] except for bayes as its non-deterministic behavior may make it difficult to compare the results across different TMs. For Q2, we used two microbenchmarks based on concurrent hash table (hashtable) and red-black tree (rbtree). For Q3, we used a microbenchmark (np-rbtree) that uses multiple red-black trees. We provide additional details on the benchmarks later in this section. Table 6 shows the performance differences between SigTM and FaNTM using STAMP benchmarks that only use top-level transactions. It summarizes the normalized performance difference (NPD) defined as N P D(%) =

O O O O O O O O O B I O O B I O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O B I O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O B I O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O


A semi-dependent decomposition approach to learn hierarchical classifiers In hierarchical classification, classes are arranged in a hierarchy represented by a tree or a forest, and each example is labeled with a set of classes located on paths from roots to leaves or internal nodes. In other words, both multiple and partial paths are allowed. A straightforward approach to learn a hierarchical classifier, usually used as a baseline method, consists in learning one binary classifier for each node of the hierarchy; the hierarchical classifier is then obtained using a top-down evaluation procedure. The main drawback of this naïve approach is that these binary classifiers are constructed independently, when it is clear that there are dependencies between them that are motivated by the hierarchy and the evaluation procedure employed. In this paper, we present a new decomposition method in which each node classifier is built taking into account other classifiers, its descendants, and the loss function used to measure the goodness of hierarchical classifiers. Following a bottom-up learning strategy, the idea is to optimize the loss function at every subtree assuming that all classifiers are known except the one at the root. Experimental results show that the proposed approach has accuracies comparable to state-of-the-art hierarchical algorithms and is better than the naïve baseline method described above. Moreover, the benefits of our proposal include the possibility of parallel implementations, as well as the use of all available well-known techniques to tune binary classification SVMs. Many real-world domains require automatic systems to organize objects into known taxonomies. For instance, a news website, or a news service in general, needs to classify the latest articles into sections and subsections of the site [1] [2] [3] [4] [5] [6] . This learning task is usually called hierarchical classification. Although most of its applications deal with textual information, there are other fields in which hierarchical classification can be useful. The authors of [7, 8] described an algorithm to classify speech data into a hierarchy of phonemes. A system was presented in [9] in which a robot can infer the similarity between different tools using a learned taxonomy. Another interesting task is related to biological terms: the Gene Ontology [10] is a controlled vocabulary used to represent molecular biology concepts and is the standard for annotating genes/proteins. This task has recently been addressed using hierarchical classification [11, 12] .. Hierarchical classification differs from multiclass learning in that: i) the whole set of classes has a hierarchical structure usually defined by a tree, and ii) each object must be labeled with a set of classes consistent with the hierarchy: if an object belongs to a class, then it must belong to any of its ancestors. In multi-label learning tasks, see for instance [13, 14] , training examples belong to a subset of labels too, but the output space does not necessarily have any hierarchical structure.. The aim of hierarchical classification algorithms is to learn a model that can accurately predict a set of classes; notice that these subsets of classes generally have more than one element and are endowed with a subtree structure. In the more general case, see Figure 1 , these subtrees may have more than one branch (we then say that there are multipaths in the labels) and subtrees may not end on a leaf (i.e. they include partial paths). In this paper we will present a learning algorithm for hierarchical classification able to deal with multiple and partial paths. In this paper, we have presented a learning method for hierarchical classifications tasks based on the decomposition approach: our learner is composed of a set of individual binary cost-sensitive classifiers, one for each class of the hierarchy. The main novelty of our approach is that these models are not independent from one another, as usually occurs in decomposition approaches. Each individual classifier depends on the models of its descendant classes. The algorithm is based on the use of a bottom-up learning procedure that allows a generic hierarchical loss function to be considered when models are learned.. In the experiments reported in Section 4, we also confirm the good scores of this approach against both, state-of-the-art algorithms like [5, 6] and baseline methods.. One of the aims of this work is to prove that decomposition methods can be as useful in hierarchical classification tasks as in multiclass classification where this kind of approach is widely used in real applications. Additionally, decomposition strategies generally have the advantage of modularity. It is thus possible to have fast parallel implementations for hierarchical classifications. Moreover, each binary classification could be learned using well-known SVM implementations, and the regularization parameters or the kernels employed may be tuned. As always, the choice of the right kernel may be a crucial point in the performance of any classification task. As in multiclass classification, the algorithms available in the literature used to solve hierarchical classification can be arranged into two main groups: those that take a decomposition approach, and those that learn a hierarchical classifier in a single process. Decomposition algorithms learn a model for each node of the hierarchy using different methods; a hierarchical classification of an object is then obtained by combining, in some way, the predictions of these individual classifiers. The algorithms presented in [1] [2] [3] 11] belong to this group. Hierarchical classification can, however, be seen as a whole rather than a series of local learning tasks; the idea being to optimize the global performance all at once. This approach is adopted in [4] [5] [6] [7] [8] .. In [1] , Koller and Sahami employ a Bayesian classifier at each internal node of the hierarchy to distinguish between its children. In the learning stage, they only use those instances that belong to the class as training instances. Their approach does not permit multipath or partial paths in the labels: the examples must belong to exactly one class at the bottom level of the hierarchy and the algorithm always predicts a single leaf.. In [2] , a classifier is trained at each node and the outputs of all classifiers are combined by integrating scores along each path. After training the support vector machines (SVM) classifiers, the authors fit a sigmoid to the output of the SVM using regularized maximum likelihood fitting. The SVM thus produces posterior probabilities that are directly comparable across categories.. In [3] , Cesa-Bianchi et al. presented an algorithm able to work with multipaths and partial paths. Essentially it constructs a conditional regularized least squares estimator for each node. This is an on-line algorithm and in each iteration an instance is presented to the current set of classifiers, the predicted labels are compared to the true labels, and regularized least squares estimators are updated.. A two-step approach was presented in [11] : first, an SVM model is learned for each node in an attempt to distinguish whether an instance belongs to that node, and then a Bayesian network is used to ensure that the predictions are consistent with the hierarchy.. Cai and Hofmann [4, 5] presented two algorithms based on the large margin principle. These authors also derive a novel taxonomy-based loss function between overlapping categories that is motivated from real applications. The difference between both papers is that in the former their algorithm is only able to predict one category, while in the latter, they employ the category ranking approach proposed in [15] to deal with the additional challenge of multipaths.. In [6] , Rousu et al. presented a kernel-based method in which the classification model is a variant of the maximum margin Markov network framework. This algorithm relies on a decomposition of the problem into single-example subproblems and conditional gradient ascent for optimisation of these subproblems. They propose a loss function that decomposes into contributions of edges so as to marginalize the exponential-sized problem into a polynomial one.. An on-line algorithm and a batch algorithm were presented in [7, 8] combining ideas from large margin kernel methods and Bayesian analysis. The authors associate a prototype with each label in the hierarchy and formulate the learning task as an optimization problem with varying margin constraints. They impose similarity requirements between the prototypes corresponding to adjacent labels.. Finally, Vens et al. [16] compare three decision tree algorithms on the task of hierarchical classification: i) an algorithm that learns a single tree that predicts all classes at once, ii) one that learns a separate decision tree for each class, and iii) an algorithm that learns and applies such single-label decision trees in a hierarchical way. The first one outperforms the others in all aspects: predictive performance, model size and efficiency.

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