Laboratoire

de

l'Informatique

du

Parall?lisme

Ecole

Normale

Sup?rieure

de

Lyon

Unit

de

recherche

associ?e

au

CNRS

n

A

new

guaranteed

heuristic

for

the

software

pipelining

problem

Pierre-Yves

Calland

Alain

Darte

Yves

Robert

November

Research

Report

No

Ecole

Normale

Sup?rieure

de

Lyon

Adresse

lectronique

lip@lip.ens-lyon.fr

T?l?phone

-LRB-

-RRB-

T?l?copieur

-LRB-

-RRB-

All?e

d'Italie

Lyon

Cedex

France

A

new

guaranteed

heuristic

for

the

software

pipelining

problem

Pierre-Yves

Calland

Alain

Darte

Yves

Robert

November

Abstract

We

present

yet

another

heuristic

for

the

software

pipelining

problem

We

believe

this

heuristic

to

be

of

interest

because

it

brings

a

new

insight

to

the

software

pipelining

problem

by

establishing

its

deep

link

with

the

circuit

retiming

problem

Also

in

the

single

resource

class

case

our

new

heuristic

is

guaranteed

with

a

better

bound

than

that

of

-LSB-

-RSB-

Finally

we

point

out

that

in

its

simplest

form

our

algorithm

has

a

lower

complexity

R?esum?e

Nous

pr?esentons

une

nouvelle

heuristique

pour

le

probl?eme

du

pipeline

logiciel

Nous

montrons

par

cette

nouvelle

approche

l'existence

d'un

lien

etroit

entre

le

probl?eme

du

pipeline

logiciel

et

le

probl?eme

de

resynchronisation

des

circuits

De

plus

nous

montrons

que

dans

le

cas

de

ressources

identiques

notre

heuristique

est

garantie

-LRB-

avec

une

borne

de

garantie

meilleure

que

celle

obtenue

pour

l'heuristique

de

Gasperoni

et

Schwiegelshohn

-LSB-

-RSB-

-RRB-

et

dans

sa

forme

non

optimis?ee

une

complexit?e

moindre

Mots-cl

es

Pipeline

logiciel

resynchronisation

de

circuits

heuristiques

garanties

ordonnancement

de

liste

ordonnancement

cyclique

A

new

guaranteed

heuristic

for

the

software

pipelining

problem

Pierre-Yves

Calland

Alain

Darteyand

Yves

Robertz

Laboratoire

LIP

URA

CNRS

Ecole

Normale

Sup?erieure

de

Lyon

F

LYON

Cedex

e-mail

-LSB-

Pierre-Yves.Calland,Alain.Darte,Yves.Robert]@lip.ens-lyon.fr

October

Abstract

We

present

yet

another

heuristic

for

the

SP

problem

We

believe

this

heuristic

to

be

of

interest

because

it

brings

a

new

insight

to

the

SP

problem

by

establishing

its

deep

link

with

the

circuit

retiming

problem

Also

in

the

single

resource

class

case

our

new

heuristic

is

guaranteed

with

a

better

bound

than

that

of

-LSB-

-RSB-

Finally

we

point

out

that

in

its

simplest

form

our

algorithm

has

a

lower

complexity

Keywords

Software

pipelining

circuit

retiming

guaranteed

heuristic

list

scheduling

cyclic

scheduling

Introduction

Software

pipelining

-LRB-

SP

hereafter

-RRB-

is

a

technique

aimed

at

the

efficient

execution

of

simple

loops

The

main

problem

is

to

cope

with

both

dependence

and

resource

constraints

which

make

the

problem

NP-complete

in

general

Consider

the

following

example

to

illustrate

the

discussion

We

will

work

on

this

example

all

along

the

paper

Example

DO

k

N

-LRB-

-RRB-

a

-LRB-

k

-RRB-

c

-LRB-

k

-RRB-

-LRB-

-RRB-

b

-LRB-

k

-RRB-

a

-LRB-

k

-RRB-

d

-LRB-

k

-RRB-

-LRB-

-RRB-

c

-LRB-

k

-RRB-

b

-LRB-

k

-RRB-

-LRB-

-RRB-

d

-LRB-

k

-RRB-

f

-LRB-

k

-RRB-

-LRB-

-RRB-

e

-LRB-

k

-RRB-

sin

-LRB-

f

-LRB-

k

-RRB-

-RRB-

-LRB-

-RRB-

f

-LRB-

k

-RRB-

log

-LRB-

b

-LRB-

k

-RRB-

e

-LRB-

k

-RRB-

-RRB-

ENDDO

Supported

by

Region

Rh

one-Alpes

yCorresponding

author

Telephone

Fax

e-mail

Alain.Darte@lip.ens-lyon.fr

zSupported

by

the

ESPRIT

Basic

Research

Action

of

the

European

Economic

Community

and

by

the

CNRS-INRIA

project

ReMaP

The

instructions

-LRB-

-RRB-

-LRB-

opn

-RRB-

within

the

loop

-LRB-

n

in

our

example

-RRB-

are

called

generic

tasks

-LRB-

or

operations

-RRB-

Each

of

them

is

executed

N

times

where

N

is

assumed

to

be

very

large

Instance

k

of

operation

opi

is

denoted

-LRB-

opi

k

-RRB-

and

its

execution

is

scheduled

to

begin

at

time

oe

-LRB-

opi

k

-RRB-

and

to

last

ffi

-LRB-

opi

-RRB-

units

of

time

The

goal

is

to

determine

a

schedule

oe

to

minimize

the

total

execution

time

T

maxfoe

-LRB-

opi

k

-RRB-

ffi

-LRB-

opi

-RRB-

i

n

k

Ng

subject

to

resource

constraints

and

while

preserving

the

semantics

of

the

original

loop

-LRB-

dependence

constraints

-RRB-

Resource

constraints

In

the

most

general

instance

of

the

SP

problem

resource

constraints

are

expressed

as

follows

generic

tasks

are

partitioned

into

classes

To

each

class

C

corresponds

a

given

-LRB-

finite

-RRB-

number

p

-LRB-

C

-RRB-

of

available

processors

-LRB-

or

resources

-RRB-

For

example

think

of

tasks

being

partitioned

into

additions

-LRB-

class

-RRB-

and

multiplications

-LRB-

class

-RRB-

then

p

-LRB-

-RRB-

is

the

number

of

available

adders

and

p

-LRB-

-RRB-

that

of

multipliers

We

need

to

ensure

that

the

scheduling

oe

satisfies

to

the

resource

constraints

i.e.

that

at

any

time-step

and

for

each

resource

class

C

no

more

than

p

-LRB-

C

-RRB-

instances

of

tasks

belonging

to

class

C

are

being

executed

In

a

simpler

instance

of

the

SP

problem

there

is

a

single

resource

class

composed

of

p

identical

processors

Each

operation

op

can

be

executed

indifferently

on

any

processor

with

delay

ffi

-LRB-

op

-RRB-

Although

less

general

this

single

resource

class

instance

has

motivated

a

great

deal

of

research

for

at

least

two

reasons

ffl

it

has

a

great

importance

in

practice

as

it

models

fine-grain

parallelism

extraction

in

shared

memory

machines

with

programmable

ALUs

-LRB-

or

off-the-shelf

microprocessors

-RRB-

ffl

it

is

the

only

case

where

guarantees

exist

-LSB-

-RSB-

for

scheduling

heuristics

This

is

very

important

as

it

gives

a

sound

basis

for

comparing

heuristics

-LRB-

the

only

alternative

is

to

multiply

experiments

-RRB-

Dependence

constraints

Dependence

constraints

express

the

fact

that

some

computations

must

be

executed

in

a

specified

order

so

as

to

preserve

the

semantics

of

the

loop

In

our

example

computation

-LRB-

k

-RRB-

writes

a

-LRB-

k

-RRB-

hence

it

must

precede

computation

-LRB-

k

-RRB-

which

reads

this

value

There

is

also

-LRB-

among

others

-RRB-

a

dependence

from

-LRB-

k

-RRB-

to

-LRB-

k

-RRB-

because

f

-LRB-

k

-RRB-

must

be

read

in

-LRB-

k

-RRB-

All

dependences

are

usually

captured

into

a

reduced

dependence

graph

-LRB-

see

Figure

-RRB-

The

SP

problem

has

motivated

a

great

amount

of

research

Since

the

pioneering

work

of

Aiken

and

Nikolau

-LSB-

-RSB-

several

authors

have

proposed

various

heuristics

-LSB-

-RSB-

The

main

contribution

of

this

paper

is

to

present

yet

another

heuristic

for

the

SP

problem

We

believe

this

heuristic

to

be

of

interest

because

it

brings

a

new

insight

to

the

SP

problem

by

establishing

its

deep

link

with

the

circuit

retiming

problem

Also

in

the

single

resource

class

case

our

new

heuristic

is

guaranteed

with

a

better

bound

than

that

of

-LSB-

-RSB-

Finally

we

point

out

that

in

its

simplest

form

our

algorithm

has

a

lower

complexity

The

rest

of

the

paper

is

organized

as

follows

in

Section

we

formally

define

the

SP

problem

and

we

briefly

survey

complexity

results

and

heuristics

from

the

literature

In

Section

we

present

the

guaranteed

heuristic

of

Gasperoni

and

Schwiegelshohn

-LSB-

-RSB-

In

Section

we

show

how

to

modify

this

heuristic

so

as

to

cut

more

edges

in

the

dependence

graph

-LRB-

hence

expecting

better

results

-RRB-

This

gives

the

starting

point

of

our

heuristic

whose

presentation

is

split

over

Sections

and

Furthermore

we

show

that

the

bound

for

our

heuristic

is

better

than

the

bound

in

-LSB-

-RSB-

Finally

small

list

is

far

from

being

comprehensive

op

op

op

op

op

op

Figure

The

reduced

dependence

graph

G

we

discuss

some

extensions

in

Section

We

summarize

our

results

and

give

some

perspectives

in

Section

Known

results

on

the

SP

problem

Problem

formulation

Formally

software

pipelining

problem

instances

are

represented

by

a

finite

vertex-weighted

edgeweighted

directed

multi-graph

G

-LRB-

V

E

ffi

d

-RRB-

The

vertices

V

of

the

graph

model

the

generic

tasks

V

opng

Each

generic

task

opi

has

a

positive

delay

-LRB-

or

latency

-RRB-

ffi

-LRB-

opi

-RRB-

Vertex

-LRB-

task

-RRB-

delays

ffi

can

be

rational

numbers

but

since

the

graph

is

finite

we

can

always

change

the

time

unit

to

have

integer

delays

The

graph

G

is

often

called

the

reduced

dependence

graph

in

the

literature

Each

generic

task

opi

has

several

instances

-LRB-

opi

k

-RRB-

k

N

The

problem

is

to

find

a

schedule

oe

that

assigns

a

time-step

oe

-LRB-

opi

k

-RRB-

to

begin

the

execution

of

each

computation

-LRB-

opi

k

-RRB-

The

directed

edges

E

of

the

graph

model

dependence

constraints

Let

e

-LRB-

opi

opj

-RRB-

E

be

an

edge

of

G

with

weight

d

-LRB-

e

-RRB-

this

means

that

instance

k

of

generic

task

opi

must

be

completed

before

the

execution

of

instance

k

d

-LRB-

e

-RRB-

of

generic

task

opj

In

other

words

we

have

the

scheduling

constraints

-LRB-

opi

opj

-RRB-

E

oe

-LRB-

opi

k

-RRB-

ffi

-LRB-

opi

-RRB-

oe

-LRB-

opj

k

d

-LRB-

e

-RRB-

-RRB-

Edge

delays

are

nonnegative

integers

by

construction

Some

edge

delays

may

be

equal

to

zero

but

there

does

not

exist

any

cycle

in

G

whose

length

-LRB-

the

sum

of

the

edge

delays

-RRB-

is

zero

-LRB-

otherwise

some

computation

depends

upon

itself

-RRB-

The

multi-graph

G

for

our

example

is

depicted

in

Figure

operator

delays

are

given

in

square

boxes

Resource

constraints

are

expressed

as

follows

generic

tasks

are

partitioned

into

classes

To

each

class

C

corresponds

a

given

number

p

-LRB-

C

-RRB-

of

available

processors

-LRB-

or

resources

-RRB-

We

need

to

ensure

that

at

any

time-step

no

more

than

p

-LRB-

C

-RRB-

instances

of

tasks

belonging

to

class

C

are

being

executed

This

translates

into

the

following

formula

jf

-LRB-

op

k

-RRB-

op

C

k

N

t

ffi

-LRB-

op

-RRB-

oe

-LRB-

op

k

-RRB-

tgj

p

-LRB-

C

-RRB-

Resource

constraints

can

be

expressed

slightly

differently

in

the

case

of

pipelined

processors

If

we

assume

processors

of

class

C

to

be

pipelined

then

no

more

than

p

-LRB-

C

-RRB-

tasks

of

class

C

can

be

initiated

at

each

unit

of

time

The

SP

problem

can

therefore

be

reduced

to

the

determination

of

the

schedule

oe

subject

to

the

above

constraints

Valid

schedules

are

those

schedules

satisfying

all

constraints

-LRB-

both

dependence

constraints

and

resource

constraints

-RRB-

Because

of

the

regular

structure

of

the

SP

problem

we

usually

search

for

a

cyclic

schedule

oe

we

aim

at

finding

a

nonnegative

integer

-LRB-

called

the

initiation

interval

of

oe

-RRB-

and

constants

ci

such

that

oe

-LRB-

opi

k

-RRB-

k

ci

Because

the

input

loop

is

supposed

to

execute

many

iterations

-LRB-

N

is

large

-RRB-

we

focus

on

the

asymptotic

behavior

of

oe

The

initiation

interval

is

a

natural

performance

estimator

of

oe

as

measures

oe

's

throughput

Note

that

if

the

reduced

dependence

graph

G

is

acyclic

and

if

the

target

machine

has

enough

processors

then

can

be

zero

-LRB-

this

type

of

schedule

has

infinite

throughput

-RRB-

A

variant

consists

in

searching

for

a

nonnegative

rational

u

v

and

to

let

oe

-LRB-

opi

k

-RRB-

b

k

cic

-LRB-

with

rational

constants

ci

-RRB-

This

amounts

to

unroll

the

input

loop

by

a

factor

v.

Note

that

rational

cyclic

schedules

are

dominant

in

the

case

of

unlimited

resources

-LSB-

-RSB-

In

the

following

we

restrict

to

the

simplest

case

i.e.

the

case

of

a

single

resource

class

of

non

pipelined

processors

Our

heuristic

does

apply

to

many

resource

classes

but

we

are

no

longer

able

to

guarantee

it

in

this

case

Related

work

Many

papers

on

software

pipelining

have

been

published

In

this

section

we

very

briefly

summarize

four

of

the

most

recent

ones

by

Feautrier

-LSB-

-RSB-

Hanen

and

Munier

-LSB-

-RSB-

Gasperoni

and

Schwiegelshohn

-LSB-

-RSB-

and

Wang

et

al.

-LSB-

-RSB-

Feautrier

-LSB-

-RSB-

Feautrier

formalizes

the

SP

problem

in

terms

of

integer

linear

programming

in

the

case

of

different

resource

classes

He

gives

two

scheduling

algorithms

one

for

the

case

p

-LRB-

C

-RRB-

-LRB-

which

means

that

all

resources

are

considered

as

different

-RRB-

and

another

for

the

general

case

In

both

cases

it

is

shown

how

to

translate

resource

constraints

into

systems

of

bilinear

integer

constraints

This

technique

permits

to

derive

optimal

solutions

though

in

non-polynomial

time

Hanen

and

Munier

-LSB-

-RSB-

Hanen

and

Munier

use

a

very

interesting

graph-based

approach

They

restrict

themselves

to

the

single

resource

class

case

They

use

tie-breaking

graphs

to

derive

schedules

Basically

the

idea

is

to

add

some

edges

to

the

reduced

dependence

graph

These

new

edges

link

task

instances

to

be

executed

on

the

same

group

of

processors

The

problem

is

to

determine

how

to

partition

processors

into

groups

and

how

to

add

new

edges

The

proposed

heuristics

look

quite

powerful

although

not

guaranteed

Gasperoni

and

Schwiegelshohn

-LSB-

-RSB-

Gasperoni

and

Schwiegelshohn

tackle

the

single

resource

class

case

both

with

pipelined

and

non-pipelined

processors

They

use

yet

another

approach

they

separate

so

to

speak

dependence

constraints

and

resource

constraints

They

first

schedule

the

reduced

dependence

graph

G

assuming

an

unlimited

number

of

processors

Such

a

schedule

is

the

basis

to

decide

which

edges

to

cut

in

G

so

as

to

make

it

acyclic

On

the

new

acyclic

graph

Ga

they

use

a

list-scheduling

heuristic

to

cope

with

the

resource

constraints

The

key-point

is

that

the

final

scheduling

is

guaranteed

We

explain

Gasperoni

and

Schwiegelshohn

's

approach

with

full

details

in

Section

and

we

build

upon

their

results

Wang

Eisenbeis

Jourdan

and

Su

-LSB-

-RSB-

Wang

et

al.

have

an

approach

very

similar

to

that

of

Gasperoni

and

Schwiegelshohn

The

main

difference

is

in

the

selection

criterion

to

cut

edges

in

G

so

as

to

make

it

acyclic

They

cut

more

edges

than

Gasperoni

and

Schwiegelshohn

thereby

expecting

better

results

when

list-scheduling

the

acyclic

graph

Ga.

For

our

new

heuristic

we

apply

this

idea

of

cutting

edges

too

Our

goal

is

twofold

ffl

Miminize

the

longest

path

in

the

acyclic

graph

Ga

so

as

to

have

the

best

possible

performance

bound

hence

improving

the

heuristic

guarantee

ffl

Minimize

the

number

of

edges

in

Ga

so

as

to

have

as

few

constraints

as

possible

As

already

mentioned

we

first

describe

Gasperoni

and

Schwiegelshohn

's

approach

-LRB-

Section

-RRB-

before

introducing

our

new

heuristic

-LRB-

Section

-RRB-

Going

from

cyclic

scheduling

to

acyclic

scheduling

Before

going

into

the

details

of

Gasperoni

and

Schwiegelshohn

heuristic

-LRB-

GS

for

short

-RRB-

we

recall

some

properties

of

cyclic

schedules

so

as

to

make

the

rest

of

the

presentation

clearer

Some

properties

of

cyclic

scheduling

Given

the

dependence

graph

G

-LRB-

V

E

ffi

d

-RRB-

a

cyclic

schedule

oe

is

a

schedule

of

the

form

oe

-LRB-

opi

k

-RRB-

k

ci

where

ci

k

N

that

satisfies

both

dependence

constraints

and

resource

constraints

Such

a

cyclic

schedule

is

periodic

with

period

the

computation

scheme

is

reproduced

every

units

of

time

More

precisely

if

instance

-LRB-

opi

k

-RRB-

is

assigned

to

begin

at

time

t

then

instance

-LRB-

opi

k

-RRB-

will

begin

at

time

t

Therefore

we

only

need

to

study

a

slice

of

clock

cycles

to

know

the

behavior

of

the

whole

cyclic

scheduling

in

steady

state

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

processors

time

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

Figure

Successive

slices

of

a

schedule

for

graph

G

-LRB-

unbroken

lines

represent

type

dependences

dotted

lines

represent

type

dependences

-RRB-

Let

us

observe

such

a

slice

e.g.

the

slice

SK

from

clock

cycle

K

up

to

clock

cycle

-LRB-

K

-RRB-

where

K

is

large

enough

so

that

the

steady

state

is

reached

-LRB-

see

Figure

for

an

example

with

an

optimal

schedule

and

unlimited

resources

-RRB-

Perform

the

Euclidean

division

of

ci

by

ci

ri

qi

where

ri

Then

oe

-LRB-

opi

k

-RRB-

ri

-LRB-

k

qi

-RRB-

This

means

that

one

and

only

one

instance

of

opi

is

initiated

within

the

slice

SK

it

is

instance

k

K

qi

started

ri

clock

cycles

after

the

beginning

of

the

slice

If

the

schedule

is

valid

both

resource

constraints

and

dependence

constraints

are

satisfied

The

latter

constraints

can

be

satisfied

because

of

two

different

reasons

either

two

dependent

computation

instances

are

initiated

in

the

same

slice

SK

-LRB-

type

-RRB-

or

they

are

initiated

in

two

different

slices

-LRB-

type

-RRB-

Of

course

the

partial

dependence

graph

induced

by

type

constraints

is

acyclic

because

type

dependences

impose

a

partial

order

on

the

operations

according

to

their

apparition

order

within

the

slice

The

main

idea

of

GS

is

the

following

Assume

that

we

have

a

valid

cyclic

schedule

of

period

for

a

given

number

of

processors

and

that

we

want

to

deduce

a

valid

schedule

for

a

smaller

number

p

of

processors

A

way

of

building

the

new

schedule

is

to

keep

the

same

slice

structure

i.e.

to

keep

the

same

operation

instances

within

a

given

slice

Of

course

we

might

need

to

increase

the

slice

length

to

cope

with

the

reduction

of

resources

In

other

words

we

have

to

stretch

the

rectangle

of

size

to

build

a

rectangle

of

size

p.

Using

this

idea

type

dependences

will

still

be

satisfied

if

we

choose

large

enough

Only

type

dependences

have

to

be

taken

into

account

for

the

internal

reorganization

of

the

slice

-LRB-

see

Figure

-RRB-

But

since

the

corresponding

partial

dependence

graph

is

acyclic

we

are

brought

back

to

a

standard

acyclic

scheduling

problem

for

which

many

theoretical

results

are

known

In

particular

a

simple

list

scheduling

technique

provides

a

guaranteed

heuristic

-LRB-

and

the

shorter

the

longest

path

in

the

graph

the

more

accurate

the

heuristic

bound

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

op

-LRB-

k

-RRB-

processors

time

p

p

processors

p

p

p

p

time

-LRB-

a

-RRB-

-LRB-

b

-RRB-

op

-LRB-

k

-RRB-

Figure

Two

different

allocations

of

a

slice

of

graph

G

-LRB-

p

-RRB-

Once

this

main

principle

settled

there

remain

several

open

questions

How

to

choose

the

initial

scheduling

How

to

choose

the

reference

slice

-LRB-

There

is

no

reason

a

priori

to

choose

a

slice

beginning

at

a

clock

cycle

congruent

to

modulus

-RRB-

How

to

decide

that

an

edge

is

of

type

hence

to

be

considered

in

the

acyclic

problem

These

three

questions

are

of

course

linked

together

Intuitively

it

seems

important

to

-LRB-

try

to

-RRB-

minimize

both

ffl

the

length

of

the

longest

path

in

the

acyclic

graph

which

should

be

as

small

as

possible

as

it

is

tightly

linked

to

the

guaranteed

bound

for

the

list

scheduling

ffl

and

the

number

of

edges

in

the

acyclic

graph

so

as

to

reduce

the

dependence

constraints

for

the

acyclic

scheduling

problem

We

will

give

a

precise

formulation

to

these

questions

and

give

a

solution

Beforehand

we

review

the

choices

of

GS

The

heuristic

of

Gasperoni

and

Schwiegelshohn

In

this

section

we

explain

with

full

details

the

GS

heuristic

-LSB-

-RSB-

The

main

idea

is

as

outlined

in

the

previous

section

The

choice

of

GS

for

the

initial

scheduling

is

to

consider

the

optimal

cyclic

scheduling

for

an

infinite

number

of

processors

-LRB-

-RRB-

i.e.

without

resource

constraints

Optimal

schedule

for

unlimited

resources

Consider

the

cyclic

scheduling

problem

G

-LRB-

V

E

ffi

d

-RRB-

without

resource

constraints

-LRB-

p

-RRB-

Let

be

a

nonnegative

integer

Define

from

G

an

edge-weighted

graph

-LRB-

V

-RRB-

as

follows

Vertices

of

Add

to

V

a

new

vertex

s

V

V

-LSB-

fsg

Edges

of

Add

to

E

an

edge

from

s

to

all

other

vertices

E

-LSB-

-LRB-

fsg

V

-RRB-

Weight

of

edges

of

Define

-LRB-

e

-RRB-

if

e

and

-LRB-

e

-RRB-

ffi

-LRB-

opi

-RRB-

>=d

-LRB-

e

-RRB-

if

e

-LRB-

opi

opj

-RRB-

E

We

have

the

following

well-known

result

Lemma

is

a

valid

initiation

interval

has

no

cycle

of

positive

weight

Proof

ffl

If

is

a

valid

initiation

interval

there

is

a

cyclic

schedule

oe

-LRB-

opi

k

-RRB-

ci

k

that

satisfies

the

dependence

constraints

-LRB-

opi

opj

-RRB-

E

ci

ffi

-LRB-

opi

-RRB-

>=d

-LRB-

e

-RRB-

cj

-LRB-

-RRB-

Consider

a

cycle

C

in

Note

that

C

is

a

cycle

of

G

too

Summing

all

inequalities

-LRB-

-RRB-

that

involve

the

edges

of

C

leads

to

X

-LRB-

ci

ffi

-LRB-

opi

-RRB-

-RRB-

X

d

-LRB-

e

-RRB-

X

cj

ffi

-LRB-

C

-RRB-

>=d

-LRB-

C

-RRB-

-LRB-

C

-RRB-

ffl

Conversely

if

has

no

cycle

of

positive

weight

one

can

define

for

all

op

V

the

longest

path

-LRB-

in

-RRB-

from

s

to

op

that

we

denote

by

t

-LRB-

s

op

-RRB-

By

definition

t

-LRB-

s

op

-RRB-

satisfies

the

following

triangular

inequality

-LRB-

opi

opj

-RRB-

E

t

-LRB-

s

opj

-RRB-

t

-LRB-

s

opi

-RRB-

-LRB-

e

-RRB-

i.e.

-LRB-

opi

opj

-RRB-

E

t

-LRB-

s

opi

-RRB-

ffi

-LRB-

opi

-RRB-

t

-LRB-

s

opj

-RRB-

>=d

-LRB-

e

-RRB-

This

proves

that

oe

-LRB-

op

k

-RRB-

t

-LRB-

s

op

-RRB-

k

is

a

valid

cyclic

schedule

Lemma

has

two

important

consequences

ffl

First

given

an

integer

it

is

easy

to

determine

if

is

a

valid

initiation

interval

and

if

yes

to

build

a

corresponding

cyclic

schedule

by

applying

Bellman-Ford

's

algorithm

-LSB-

-RSB-

on

ffl

The

optimal

initiation

interval

is

the

smallest

integer

such

that

has

no

positive

cycle

Therefore

if

G

is

acyclic

and

maxfd

ffi

-LRB-

C

-RRB-

d

-LRB-

C

-RRB-

e

C

cycle

of

Gg

otherwise

Algorithm

GS

for

p

resources

As

said

before

in

the

case

of

p

identical

processors

the

algorithm

consists

in

the

conversion

of

the

dependence

graph

G

into

an

acyclic

graph

Ga.

Ga

is

obtained

by

deleting

some

edges

of

G

As

initial

scheduling

GS

takes

the

optimal

scheduling

with

unlimited

resources

-LRB-

opi

k

-RRB-

t

-LRB-

s

opi

-RRB-

As

reference

slice

GS

takes

a

slice

starting

at

a

clock

cycle

congruent

to

modulus

i.e.

a

slice

from

clock

cycle

K

up

to

clock

cycle

-LRB-

K

-RRB-

This

amounts

to

decomposing

t

-LRB-

s

opi

-RRB-

into

t

-LRB-

s

opi

-RRB-

ri

where

ri

In

other

words

ri

t

-LRB-

s

opi

-RRB-

mod

Consider

an

edge

e

-LRB-

opi

opj

-RRB-

E

In

the

reference

slice

the

computation

instance

-LRB-

opi

K

qi

-RRB-

is

performed

If

ri

ffi

-LRB-

opi

-RRB-

rj

the

computation

instance

of

opj

which

is

performed

within

the

reference

slice

-LRB-

namely

-LRB-

opj

K

qj

-RRB-

-RRB-

is

started

before

the

end

of

the

computation

-LRB-

opi

K

qi

-RRB-

Hence

this

computation

instance

-LRB-

opj

K

qj

-RRB-

is

not

the

one

that

depends

upon

completion

of

-LRB-

opi

K

qi

-RRB-

In

other

words

K

qi

d

-LRB-

e

-RRB-

K

qj

The

two

computations

in

dependence

through

edge

e

are

not

initiated

in

the

same

slice

Edge

e

can

be

safely

considered

as

a

type

edge

thus

can

be

deleted

from

G

This

is

the

way

edges

are

cut

in

GS

We

are

led

to

the

following

algorithm

Algorithm

-LRB-

Algorithm

GS

-RRB-

Compute

the

optimal

cyclic

schedule

for

unlimited

resources

Let

e

-LRB-

opi

opj

-RRB-

be

an

edge

of

G

Then

e

will

be

deleted

from

G

if

and

only

if

t

-LRB-

s

opj

-RRB-

mod

t

-LRB-

s

opi

-RRB-

mod

ffi

-LRB-

opi

-RRB-

-LRB-

-RRB-

This

provides

the

acyclic

graph

Ga.

this

is

not

the

best

way

to

determine

type

edges

See

Section

-LRB-

a

-RRB-

Consider

the

acyclic

graph

Ga

where

vertices

are

weighted

by

ffi

and

edges

represent

task

dependences

and

perform

a

list

scheduling

oea

on

the

p

processors

-LRB-

b

-RRB-

Let

maxopi

-LRB-

oea

-LRB-

opi

-RRB-

ffi

-LRB-

opi

-RRB-

-RRB-

be

the

latency

of

the

schedule

for

Ga.

For

all

opi

E

and

k

N

oe

-LRB-

opi

k

-RRB-

oea

-LRB-

opi

-RRB-

t

-LRB-

s

opi

-RRB-

k

is

a

valid

cyclic

schedule

The

correctness

of

Algorithm

GS

can

be

found

in

-LSB-

-RSB-

It

can

also

be

deduced

from

the

correctness

of

Algorithm

CDR

-LRB-

see

Section

-RRB-

Performances

of

Algorithm

GS

GS

gives

an

upper

bound

to

the

initiation

interval

obtained

by

Algorithm

Let

opt

be

the

optimal

-LRB-

smallest

-RRB-

initiation

interval

with

p

processors

The

following

inequality

is

established

p

p

opt

-LRB-

p

-RRB-

-LRB-

-RRB-

where

is

the

length

of

the

longest

path

in

Ga.

Moreover

owing

to

the

strategy

for

cutting

edges

ffimax

-LRB-

see

Lemma

in

-LSB-

-RSB-

-RRB-

This

implies

p

p

opt

-LRB-

p

-RRB-

-LRB-

ffimax

-RRB-

which

leads

to

opt

p

p

p

ffimax

opt

GS

is

the

first

guaranteed

algorithm

We

see

from

equation

-LRB-

-RRB-

that

the

bound

directly

depends

upon

the

length

of

the

longest

path

in

Ga.

Example

We

go

back

to

our

example

Assume

p

available

processors

Figure

-LRB-

a

-RRB-

recalls

the

graph

G

for

which

In

Figure

-LRB-

b

-RRB-

we

depict

the

graph

that

permits

to

compute

t

-LRB-

s

op

-RRB-

for

all

op

-LRB-

the

different

values

t

-LRB-

s

op

-RRB-

are

given

in

circles

on

the

figure

-RRB-

and

an

optimal

schedule

with

unlimited

resources

-LRB-

op

k

-RRB-

t

-LRB-

s

op

-RRB-

This

schedule

was

already

represented

Figure

processors

are

needed

Figure

-LRB-

c

-RRB-

shows

the

acyclic

graph

Ga

obtained

by

cutting

edges

e

-LRB-

opi

opj

-RRB-

such

that

rj

ri

ffi

-LRB-

opi

-RRB-

where

ri

t

-LRB-

s

opi

-RRB-

mod

Finally

Figure

-LRB-

d

-RRB-

shows

a

possible

schedule

of

operations

provided

by

a

list

scheduling

for

which

Cutting

edges

by

retiming

Let

us

summarize

Algorithm

GS

as

follows

first

compute

the

values

t

-LRB-

s

op

-RRB-

in

to

provide

the

optimal

scheduling

without

resource

constraints

Then

take

a

reference

slice

starting

at

top

mod

-LRB-

opi

k

-RRB-

ri

-LRB-

k

qi

-RRB-

with

ri

Finally

delete

from

G

some

edges

that

necessarily

correspond

to

dependences

between

different

slices

only

those

edges

e

-LRB-

opi

opj

-RRB-

such

that

ri

ffi

-LRB-

opi

-RRB-

rj

are

removed

by

GS

However

edges

that

correspond

to

dependences

between

different

slices

are

those

such

that

qi

qj

d

-LRB-

e

-RRB-

Indeed

within

the

reference

slice

the

scheduled

computation

instances

are

-LRB-

opi

K

qi

-RRB-

p

p

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

processors

-LRB-

d

-RRB-

time

-LRB-

a

-RRB-

s

-LRB-

b

-RRB-

-LRB-

c

-RRB-

Figure

-LRB-

a

-RRB-

The

reduced

dependence

graph

G

-LRB-

b

-RRB-

The

graph

-LRB-

c

-RRB-

The

acyclic

graph

Ga

-LRB-

d

-RRB-

A

corresponding

list

scheduling

allocation

and

-LRB-

opj

K

qj

-RRB-

for

edge

e

-LRB-

opi

opj

-RRB-

Therefore

the

computation

-LRB-

opj

K

qi

d

-LRB-

e

-RRB-

-RRB-

which

depends

upon

-LRB-

opi

K?qi

-RRB-

is

performed

in

the

same

slice

iff

K?qi

d

-LRB-

e

-RRB-

K?qj

i.e.

qj

d

-LRB-

e

-RRB-

qi

Otherwise

it

is

performed

in

a

subsequent

slice

and

in

this

case

qj

d

-LRB-

e

-RRB-

qi

Therefore

the

condition

for

cutting

edges

corresponding

to

dependences

between

different

slices

-LRB-

i.e.

those

we

called

type

dependences

-RRB-

writes

qj

d

-LRB-

e

-RRB-

qi

rather

than

ri

ffi

-LRB-

opi

-RRB-

rj

Let

us

check

this

mathematically

Consider

a

valid

cyclic

scheduling

oe

-LRB-

opi

k

-RRB-

ci

k

and

let

ci

ri

qi

with

now

ri

where

is

given

we

look

at

an

arbitrary

slice

of

length

For

each

edge

e

-LRB-

opi

opj

-RRB-

the

dependence

constraint

is

satisfied

thus

ri

ffi

-LRB-

opi

-RRB-

qi

rj

-LRB-

qj

d

-LRB-

e

-RRB-

-RRB-

Then

ri

ffi

-LRB-

opi

-RRB-

qi

rj

-LRB-

qj

d

-LRB-

e

-RRB-

-RRB-

-LRB-

ri

rj

-RRB-

ffi

-LRB-

opi

-RRB-

-LRB-

qj

d

-LRB-

e

-RRB-

qi

-RRB-

-RRB-

-LRB-

qj

d

-LRB-

e

-RRB-

qi

-RRB-

-RRB-

qj

d

-LRB-

e

-RRB-

qi

-RRB-

qj

d

-LRB-

e

-RRB-

qi

Furthermore

if

qj

d

-LRB-

e

-RRB-

qi

then

the

dependence

constraints

directly

writes

ri

ffi

-LRB-

opi

-RRB-

rj

Conversely

if

ri

ffi

-LRB-

opi

-RRB-

rj

then

necessarily

qj

d

-LRB-

e

-RRB-

qi

if

an

edge

is

cut

by

GS

then

it

is

also

cut

by

our

new

rule

We

are

led

to

a

modified

version

of

GS

which

we

call

mGS

Since

we

cut

more

edges

in

mGS

than

in

GS

the

acyclic

graph

mGa

obtained

by

mGS

contains

a

subset

of

the

edges

of

the

acyclic

graph

Ga.

See

Figure

to

illustrate

this

fact

We

are

now

ready

to

formulate

the

problem

We

need

neither

an

initial

ordering

nor

a

reference

slice

any

longer

What

we

only

need

is

to

determine

a

function

q

V

Zsuch

that

-LRB-

u

v

-RRB-

E

q

-LRB-

v

-RRB-

d

-LRB-

e

-RRB-

q

-LRB-

u

-RRB-

p

p

op

op

op

op

op

op

op

op

op

op

op

op

processors

time

-LRB-

b

-RRB-

-LRB-

a

-RRB-

Figure

-LRB-

a

-RRB-

The

acyclic

graph

provided

by

Algorithm

mGS

-LRB-

b

-RRB-

A

corresponding

list

scheduling

allocation

Such

a

function

q

is

called

a

retiming

in

the

context

of

synchronous

VLSI

circuits

-LSB-

-RSB-

Retiming

is

an

assignment

of

an

integer

lag

q

-LRB-

u

-RRB-

to

each

vertex

u

V

it

amounts

to

suppress

q

-LRB-

u

-RRB-

registers

to

the

weight

of

each

edge

leaving

u

-LRB-

whose

tail

is

u

-RRB-

and

to

add

q

-LRB-

v

-RRB-

registers

to

each

edge

entering

v

-LRB-

whose

head

is

v

-RRB-

It

leads

to

a

new

edge-weighting

function

dq

defined

for

an

edge

u

e!

v

by

dq

-LRB-

e

-RRB-

d

-LRB-

e

-RRB-

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

After

a

suitable

retiming

is

found

we

define

the

acyclic

graph

mGa

as

follows

an

edge

e

E

is

kept

in

mGa

iff

its

new

weight

dq

-LRB-

e

-RRB-

is

-LRB-

edge

without

register

-RRB-

Clearly

mGa

is

acyclic

-LRB-

assume

there

is

a

cycle

and

sum

up

retimed

edge

weights

on

this

cycle

to

get

a

contradiction

-RRB-

Given

mGa

we

list

schedule

it

as

a

DAG

whose

vertices

are

weighted

by

the

initial

ffi

function

Recall

that

our

goal

was

to

answer

the

two

following

questions

ffl

How

to

cut

edges

so

as

to

obtain

an

acyclic

graph

Ga

whose

longest

path

has

minimal

length

ffl

How

to

cut

as

many

edges

as

possible

so

that

the

number

of

dependence

constraints

to

be

satisfied

by

the

list-scheduling

of

Ga

is

minimized

Now

using

our

new

formulation

we

can

state

our

objectives

more

precisely

in

terms

of

retiming

Objective

Find

a

retiming

q

that

minimizes

the

longest

path

in

mGa

i.e.

in

terms

of

retiming

that

minimizes

the

clock

period

of

the

retimed

graph

-LRB-

see

Section

-RRB-

Objective

Find

a

retiming

q

so

that

the

number

of

edges

in

mGa

is

minimal

i.e.

distribute

registers

so

as

to

leave

as

few

edges

without

registers

as

possible

In

Section

we

show

how

to

achieve

the

first

objective

-LRB-

this

is

a

well-known

problem

-RRB-

There

are

several

possible

solutions

and

in

Section

we

show

how

to

select

the

best

one

with

respect

to

the

second

objective

and

we

state

our

final

algorithm

We

improve

upon

GS

for

two

reasons

first

we

have

a

better

bound

and

second

we

cut

more

edges

hence

more

freedom

for

the

list

scheduling

Minimizing

the

longest

path

of

the

acyclic

graph

There

are

well-known

retiming

algorithms

that

can

be

used

to

minimize

the

clock

period

of

a

VLSI

circuit

In

this

section

we

show

how

to

use

such

algorithms

to

derive

a

valid

value

q

-LRB-

opi

-RRB-

for

each

operator

opi

Retiming

algorithms

Formally

a

retiming

of

a

graph

G

-LRB-

V

E

ffi

d

-RRB-

is

a

vertex-labeling

function

q

V

Z.

q

performs

a

transformation

of

the

initial

graph

G

into

a

new

graph

Gq

-LRB-

V

E

ffi

dq

-RRB-

where

dq

is

defined

as

follows

if

e

-LRB-

u

v

-RRB-

is

an

edge

of

E

then

dq

-LRB-

e

-RRB-

d

-LRB-

e

-RRB-

q

-LRB-

v

-RRB-

q

-LRB-

e

-RRB-

Such

a

retiming

is

valid

if

for

each

edge

e

of

E

dq

-LRB-

e

-RRB-

Note

that

we

assumed

that

in

any

cycle

of

G

there

is

at

least

one

edge

whose

weight

is

positive

using

VLSI

terminology

we

say

G

is

synchronous

Leiserson

and

Saxe

-LSB-

-RSB-

present

several

algorithms

to

compute

an

optimal

valid

retiming

in

the

sense

that

the

longest

path

of

weight

in

the

retimed

graph

is

as

short

as

possible

Before

presenting

these

algorithms

with

more

details

we

need

some

definitions

We

denote

by

u

P

v

a

path

P

of

G

from

u

to

v

by

d

-LRB-

P

-RRB-

P

d

-LRB-

e

-RRB-

the

sum

of

the

dependences

of

the

edges

of

P

and

by

ffi

-LRB-

P

-RRB-

P

ffi

-LRB-

v

-RRB-

the

sum

of

the

delays

of

the

vertices

of

P

We

define

D

and

as

follows

D

-LRB-

u

v

-RRB-

minfd

-LRB-

P

-RRB-

u

P

vg

-LRB-

u

v

-RRB-

maxfffi

-LRB-

P

-RRB-

u

P

v

and

d

-LRB-

P

-RRB-

D

-LRB-

u

v

-RRB-

g

D

and

are

computed

by

solving

an

all-pairs

shortest-path

algorithm

on

G

where

edge

u

e!

v

is

weighted

with

the

pair

-LRB-

d

-LRB-

e

-RRB-

ffi

-LRB-

u

-RRB-

-RRB-

Finally

let

-LRB-

G

-RRB-

maxfffi

-LRB-

P

-RRB-

P

path

of

G

d

-LRB-

P

-RRB-

g

-LRB-

G

-RRB-

is

the

length

of

the

longest

path

of

weight

in

G

-LRB-

and

is

called

the

clock

period

of

G

in

VLSI

terminology

-RRB-

Theorem

-LRB-

Theorem

in

-LSB-

-RSB-

-RRB-

Let

G

-LRB-

V

E

ffi

d

-RRB-

be

a

synchronous

circuit

let

be

an

arbitrary

positive

real

number

and

let

q

be

a

function

from

V

to

the

integers

Then

q

is

a

legal

retiming

of

G

such

that

-LRB-

Gq

-RRB-

if

and

only

if

q

-LRB-

u

-RRB-

q

-LRB-

v

-RRB-

d

-LRB-

e

-RRB-

for

every

edge

u

e!

v

of

G

and

q

-LRB-

u

-RRB-

q

-LRB-

v

-RRB-

D

-LRB-

u

v

-RRB-

for

all

vertices

u

v

V

such

that

-LRB-

u

v

-RRB-

Theorem

provides

the

basic

tool

to

establish

the

following

algorithm

-LRB-

Algorithm

-RRB-

that

determines

a

retiming

such

that

the

clock

period

of

the

retimed

graph

is

minimized

Algorithm

-LRB-

Algorithm

in

-LSB-

-RSB-

-RRB-

Compute

D

and

-LRB-

see

Algorithm

WD

in

-LSB-

-RSB-

-RRB-

Sort

the

elements

in

the

range

of

Binary

search

among

the

elements

-LRB-

u

v

-RRB-

for

the

minimum

achievable

clock

period

To

test

whether

each

potential

clock

period

is

feasible

apply

the

Bellman-Ford

algorithm

to

determine

whether

the

conditions

in

Theorem

can

be

satisfied

For

the

minimum

achievable

clock

period

found

in

step

use

the

values

for

the

q

-LRB-

v

-RRB-

found

by

the

Bellman-Ford

algorithm

as

the

optimal

retiming

This

algorithm

runs

in

O

-LRB-

jV

log

jV

j

-RRB-

but

there

is

a

more

efficient

algorithm

whose

complexity

is

O

-LRB-

jV

jjEj

log

jV

j

-RRB-

which

is

a

significant

improvement

for

sparse

graphs

It

runs

as

the

previous

algorithm

except

in

step

where

the

Bellman-Ford

algorithm

is

replaced

by

the

following

algorithm

Algorithm

-LRB-

Algorithm

FEAS

in

-LSB-

-RSB-

-RRB-

Given

a

synchronous

circuit

G

-LRB-

V

E

ffi

d

-RRB-

and

a

desired

clock

period

this

algorithm

produces

a

retiming

q

of

G

such

that

Gq

is

a

synchronous

circuit

with

clock

period

if

such

a

retiming

exists

For

each

vertex

v

V

set

q

-LRB-

v

-RRB-

to

Repeat

the

following

jV

j

times

-LRB-

a

-RRB-

Compute

graph

Gq

with

the

existing

values

for

q.

-LRB-

b

-RRB-

for

any

vertex

v

V

compute

-LRB-

v

-RRB-

the

maximum

sum

ffi

-LRB-

P

-RRB-

of

vertex

delays

along

any

zero-weight

directed

path

P

in

G

leading

to

v

This

can

be

done

in

O

-LRB-

jEj

-RRB-

-LRB-

c

-RRB-

For

each

vertex

v

such

that

-LRB-

v

-RRB-

set

q

-LRB-

v

-RRB-

to

q

-LRB-

v

-RRB-

Run

the

same

algorithm

used

for

step

-LRB-

b

-RRB-

to

compute

If

then

no

feasible

retiming

exists

Otherwise

q

is

the

desired

retiming

After

performing

a

retiming

q

to

obtain

the

graph

Gq

with

minimal

clock

period

we

convert

this

graph

into

an

acyclic

one

by

deleting

edges

with

positive

weight

From

the

definition

of

a

retiming

we

see

that

the

sum

d

-LRB-

C

-RRB-

along

any

cycle

C

of

G

remains

unchanged

i.e.

dq

-LRB-

C

-RRB-

d

-LRB-

C

-RRB-

Furthermore

since

any

cycle

of

the

dependence

graph

G

contains

at

least

one

edge

with

positive

weight

the

graph

we

obtain

by

deleting

edges

with

positive

weight

is

acyclic

A

new

scheduling

algorithm

Algorithm

CDR

We

can

now

give

our

new

algorithm

and

prove

that

both

resource

and

dependence

constraints

are

met

Algorithm

-LRB-

Algorithm

CDR

-RRB-

Let

G

-LRB-

V

E

ffi

d

-RRB-

be

a

dependence

graph

Find

a

retiming

q

that

minimizes

the

length

of

the

longest

path

of

weight

in

Gq

-LRB-

use

Algorithm

with

the

improved

algorithm

for

step

-RRB-

Delete

edges

of

positive

weight

or

equivalently

keep

edges

e

-LRB-

u

v

-RRB-

which

satisfy

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

-LRB-

i.e.

edges

with

no

registers

-RRB-

By

this

way

we

obtain

an

acyclic

graph

Ga.

Perform

a

list

scheduling

oea

on

Ga

and

compute

-LRB-

oea

-LRB-

u

-RRB-

ffi

-LRB-

u

-RRB-

-RRB-

Define

the

cyclic

schedule

oe

by

V

N

oe

-LRB-

u

k

-RRB-

oea

-LRB-

u

-RRB-

-LRB-

k

q

-LRB-

u

-RRB-

-RRB-

Note

that

the

complexity

of

Algorithm

CDR

is

determined

by

Step

whose

complexity

is

O

-LRB-

jV

jjEj

log

-LRB-

jV

j

-RRB-

-RRB-

Therefore

the

complexity

of

Algorithm

CDR

is

lower

than

that

of

Algorithm

GS

whose

complexity

is

O

-LRB-

jV

jjEj

log

-LRB-

jV

jffimax

-RRB-

-RRB-

This

comes

from

the

fact

that

opt

can

be

searched

among

the

jV

values

-LRB-

u

v

-RRB-

whereas

is

searched

among

all

values

between

and

jV

jffimax

In

particular

we

point

out

that

the

complexity

of

Algorithm

CDR

does

not

depend

on

ffimax

which

makes

it

more

robust

Correctness

of

Algorithm

CDR

Theorem

The

schedule

oe

obtained

with

Algorithm

CDR

meets

both

dependence

and

resource

constraints

Proof

Resource

constraints

are

obviously

met

because

of

the

list

scheduling

and

the

definition

of

which

ensures

that

slices

do

not

overlap

To

show

that

dependence

constraints

are

satisfied

for

each

e

-LRB-

u

v

-RRB-

of

E

we

need

to

verify

oe

-LRB-

u

k

-RRB-

ffi

-LRB-

u

-RRB-

oe

-LRB-

v

k

d

-LRB-

e

-RRB-

-RRB-

oea

-LRB-

u

-RRB-

q

-LRB-

u

-RRB-

ffi

-LRB-

u

-RRB-

oea

-LRB-

v

-RRB-

q

-LRB-

v

-RRB-

>=d

-LRB-

e

-RRB-

oea

-LRB-

u

-RRB-

oea

-LRB-

v

-RRB-

ffi

-LRB-

u

-RRB-

-LRB-

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

-RRB-

-LRB-

-RRB-

On

one

hand

suppose

that

e

is

not

deleted

i.e.

e

Ga.

It

is

equivalent

to

say

that

the

weight

of

e

after

the

retiming

is

equal

to

zero

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

But

since

oea

is

a

schedule

for

Ga

oea

-LRB-

u

-RRB-

ffi

-LRB-

u

-RRB-

oea

-LRB-

v

-RRB-

Thus

inequality

-LRB-

-RRB-

is

satisfied

On

the

other

hand

if

e

is

deleted

then

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

and

thus

-LRB-

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

-RRB-

But

by

definition

of

we

have

oea

-LRB-

u

-RRB-

ffi

-LRB-

u

-RRB-

oea

-LRB-

v

-RRB-

oea

-LRB-

u

-RRB-

ffi

-LRB-

u

-RRB-

Thus

inequality

-LRB-

-RRB-

is

satisfied

Performances

of

Algorithm

CDR

Now

we

show

that

our

algorithm

is

guaranteed

and

we

give

a

bound

for

the

initiation

interval

that

is

better

than

the

bound

given

for

Algorithm

GS

Theorem

Let

G

be

a

dependence

graph

opt

the

minimum

achievable

clock

period

for

G

the

initiation

interval

of

the

schedule

generated

by

Algorithm

CDR

when

p

processors

are

available

and

opt

the

best

possible

initiation

interval

for

this

case

Then

opt

p

p

opt

opt

Proof

Let

be

the

overall

time

in

oea

when

no

more

than

p

processors

are

busy

Since

is

the

makespan

of

the

list

scheduling

oea

p

X

ffi

-LRB-

u

-RRB-

-LRB-

p

-RRB-

-LRB-

see

-LSB-

-RSB-

for

more

details

-RRB-

As

oea

is

generated

by

a

list

scheduling

algorithm

there

exists

a

dependence

path

P

in

Ga

such

that

ffi

-LRB-

P

-RRB-

By

construction

opt

is

the

length

of

the

longest

path

in

Ga

thus

ffi

-LRB-

P

-RRB-

opt

So

we

can

write

p

X

ffi

-LRB-

u

-RRB-

-LRB-

p

-RRB-

p

opt

-LRB-

p

-RRB-

opt

which

leads

to

opt

p

p

opt

opt

Now

we

show

that

the

bound

obtained

for

Algorithm

CDR

-LRB-

Theorem

-RRB-

is

always

better

than

the

bound

for

Algorithm

GS

-LRB-

see

Equation

-RRB-

This

is

a

consequence

of

the

following

lemma

Lemma

opt

ffimax

Proof

Let

us

apply

Algorithm

CDR

with

unlimited

resources

For

that

we

define

a

retiming

q

such

that

-LRB-

Gq

-RRB-

opt

and

we

define

the

graph

Ga

by

deleting

from

G

all

edges

e

such

that

dq

-LRB-

e

-RRB-

Then

we

define

a

schedule

for

Ga

with

unlimited

resources

by

oea

-LRB-

u

-RRB-

maxfffi

-LRB-

P

-RRB-

P

path

of

Ga

leading

to

ug

The

makespan

of

oea

is

opt

by

construction

Finally

we

get

a

schedule

for

G

by

defining

oe

-LRB-

u

k

-RRB-

oea

-LRB-

u

-RRB-

-LRB-

q

-LRB-

u

-RRB-

k

-RRB-

opt

Since

by

definition

is

the

smallest

initiation

interval

for

p

we

have

opt

Now

consider

a

schedule

oe

for

unlimited

resources

and

initiation

interval

equal

to

as

defined

in

Section

oe

-LRB-

u

k

-RRB-

t

-LRB-

s

u

-RRB-

Let

r

-LRB-

u

-RRB-

t

-LRB-

s

u

-RRB-

mod

and

q

-LRB-

u

-RRB-

b

t

-LRB-

s

u

-RRB-

c

As

proved

in

Section

q

defines

a

retiming

for

G

i.e.

for

all

edges

e

-LRB-

u

v

-RRB-

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

Furthermore

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

implies

r

-LRB-

u

-RRB-

ffi

-LRB-

u

-RRB-

r

-LRB-

v

-RRB-

Define

Ga

by

deleting

from

G

all

edges

e

such

that

dq

-LRB-

e

-RRB-

-LRB-

as

in

Algorithm

mGS

-RRB-

Let

P

be

any

path

in

Ga

P

-LRB-

un

-RRB-

We

have

for

all

i

i

n

r

-LRB-

ui

-RRB-

ffi

-LRB-

ui

-RRB-

r

-LRB-

ui

-RRB-

Summing

up

these

n

inequalities

we

obtain

n

X

i

ffi

-LRB-

ui

-RRB-

r

-LRB-

-RRB-

r

-LRB-

un

-RRB-

ffi

-LRB-

P

-RRB-

ffi

-LRB-

un

-RRB-

r

-LRB-

-RRB-

r

-LRB-

un

-RRB-

ffi

-LRB-

P

-RRB-

r

-LRB-

un

-RRB-

ffi

-LRB-

un

-RRB-

-LRB-

-RRB-

ffimax

By

construction

-LRB-

Gq

-RRB-

is

the

length

of

the

longest

path

in

Ga

thus

-LRB-

Gq

-RRB-

ffimax

Finally

we

have

opt

-LRB-

Gq

-RRB-

hence

the

result

Theorem

The

bound

for

Algorithm

CDR

is

better

than

the

bound

for

Algorithm

GS

Proof

This

is

easily

derived

from

the

fact

that

opt

ffimax

as

shown

by

Lemma

Link

between

and

opt

As

shown

in

Lemma

and

opt

are

very

close

However

the

retiming

that

can

be

derived

from

the

schedule

with

initiation

interval

does

not

permit

to

define

an

acyclic

graph

with

longest

path

opt

In

other

words

looking

for

is

not

the

right

approach

to

minimizing

the

period

of

the

graph

In

this

section

we

investigate

more

deeply

this

fact

by

recalling

another

formulation

of

the

retiming

problem

given

by

Leiserson

and

Saxe

-LSB-

-RSB-

Lemma

-LRB-

Lemma

in

-LSB-

-RSB-

-RRB-

Let

G

-LRB-

V

E

ffi

d

-RRB-

be

a

synchronous

circuit

and

let

c

be

a

positive

real

number

Then

there

exists

a

retiming

q

of

G

such

that

-LRB-

Gq

-RRB-

if

and

only

if

there

exists

an

assignment

of

a

real

value

s

-LRB-

v

-RRB-

and

an

integer

value

q

-LRB-

v

-RRB-

to

each

vertex

v

V

such

that

the

following

conditions

are

satisfied

s

-LRB-

v

-RRB-

ffi

-LRB-

v

-RRB-

for

every

vertex

v

V

s

-LRB-

v

-RRB-

for

every

vertex

v

V

q

-LRB-

u

-RRB-

q

-LRB-

v

-RRB-

d

-LRB-

e

-RRB-

wherever

e

u

v

s

-LRB-

u

-RRB-

s

-LRB-

v

-RRB-

ffi

-LRB-

v

-RRB-

wherever

e

u

v

such

that

q

-LRB-

u

-RRB-

q

-LRB-

v

-RRB-

d

-LRB-

e

-RRB-

-LRB-

-RRB-

By

letting

s

-LRB-

u

-RRB-

r

-LRB-

u

-RRB-

ffi

-LRB-

u

-RRB-

for

every

vertex

u

inequalities

are

equivalent

to

r

-LRB-

v

-RRB-

for

every

vertex

v

V

r

-LRB-

v

-RRB-

ffi

-LRB-

v

-RRB-

for

every

vertex

v

V

q

-LRB-

u

-RRB-

q

-LRB-

v

-RRB-

d

-LRB-

e

-RRB-

wherever

e

u

v

r

-LRB-

v

-RRB-

r

-LRB-

u

-RRB-

ffi

-LRB-

u

-RRB-

wherever

e

u

v

such

that

q

-LRB-

u

-RRB-

q

-LRB-

v

-RRB-

d

-LRB-

e

-RRB-

-LRB-

-RRB-

This

last

system

permits

to

better

understand

all

the

techniques

that

we

developed

previously

Optimal

schedule

for

unlimited

resources

As

seen

in

Lemma

the

schedule

oe

-LRB-

u

k

-RRB-

t

-LRB-

s

u

-RRB-

satisfies

system

with

r

-LRB-

u

-RRB-

t

-LRB-

s

u

-RRB-

mod

and

q

-LRB-

u

-RRB-

b

t

-LRB-

s

u

-RRB-

c

except

the

second

inequation

We

do

have

r

-LRB-

v

-RRB-

but

not

necessarily

r

-LRB-

v

-RRB-

ffi

-LRB-

v

-RRB-

-LRB-

except

if

ffimax

and

in

this

case

opt

-LRB-

see

Lemma

for

another

proof

-RRB-

-RRB-

Schedule

obtained

by

Algorithm

CDR

for

unlimited

resources

By

construction

with

r

oea

q

the

retiming

such

that

-LRB-

Gq

-RRB-

opt

opt

system

is

satisfied

with

the

smallest

value

for

Therefore

this

technique

leads

to

the

better

cyclic

schedule

with

unlimited

resources

for

which

the

slices

do

not

overlap

-LRB-

because

of

the

second

inequation

-RRB-

Therefore

it

is

not

always

possible

to

find

this

way

Schedule

obtained

by

Algorithms

CDR

and

GS

for

p

resources

The

schedule

obtained

satisfies

system

with

r

oea

the

makespan

of

oea

For

CDR

q

is

the

retiming

that

achieves

the

optimal

period

whereas

for

GS

q

is

the

retiming

defined

from

-LRB-

q

-LRB-

u

-RRB-

b

t

-LRB-

s

u

-RRB-

c

-RRB-

For

CDR

the

fourth

inequation

is

satisfied

exactly

for

all

edges

e

-LRB-

u

v

-RRB-

such

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

However

for

GS

oe

is

required

to

satisfy

the

fourth

inequation

for

more

edges

than

necessary

-LRB-

actually

for

all

edges

e

-LRB-

u

v

-RRB-

such

that

r

-LRB-

u

-RRB-

ffi

-LRB-

u

-RRB-

r

-LRB-

v

-RRB-

-RRB-

Note

that

for

both

algorithms

there

are

additional

conditions

imposed

by

the

resource

constraints

that

do

not

appear

in

system

Example

We

can

now

apply

Algorithm

CDR

to

our

key

example

-LRB-

assume

again

p

available

processors

-RRB-

opt

and

the

retiming

q

that

achieves

this

clock

period

is

obtained

in

two

steps

by

Algorithm

-LRB-

Figures

-LRB-

a

-RRB-

-LRB-

b

-RRB-

and

-LRB-

c

-RRB-

show

the

successive

retimed

graphs

-RRB-

Figure

-LRB-

d

-RRB-

shows

the

corresponding

acyclic

graph

Ga

and

finally

Figure

-LRB-

e

-RRB-

shows

a

possible

schedule

of

operations

provided

by

a

list

scheduling

technique

whose

initiation

interval

is

This

is

better

than

what

we

found

with

Algorithm

mGS

-LRB-

see

Figure

-LRB-

b

-RRB-

-RRB-

and

a

fortiori

with

Algorithm

GS

-LRB-

see

Figure

-LRB-

d

-RRB-

-RRB-

p

p

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

op

processors

time

-LRB-

e

-RRB-

-LRB-

a

-RRB-

-LRB-

d

-RRB-

-LRB-

b

-RRB-

-LRB-

c

-RRB-

Figure

-LRB-

a

-RRB-

Initial

dependence

graph

G

-LRB-

b

-RRB-

and

-LRB-

c

-RRB-

First

step

of

Algorithm

CDR

-LRB-

d

-RRB-

Corresponding

acyclic

graph

-LRB-

e

-RRB-

A

corresponding

list

scheduling

allocation

Minimizing

the

number

of

edges

of

the

acyclic

graph

Our

purpose

in

this

section

is

to

find

a

retimed

graph

with

the

minimum

number

of

weight

edges

among

all

retimed

graphs

whose

longest

path

has

the

best

possible

length

opt

Removing

edges

of

non

weight

will

give

an

acyclic

graph

that

matches

both

objectives

stated

at

the

end

of

Section

Consider

step

of

Algorithm

CDR

in

which

we

use

the

retiming

algorithm

of

Leiserson

and

Saxe

-LSB-

-RSB-

-LRB-

Algorithm

with

or

without

the

improved

algorithm

for

step

-RRB-

This

retiming

algorithm

does

minimize

the

length

of

the

longest

path

of

weight

into

a

dependence

graph

but

is

does

not

necessarily

minimize

the

number

of

weight

edges

See

again

our

key

example

Figure

-LRB-

c

-RRB-

for

which

We

can

apply

yet

another

retiming

to

obtain

the

graph

of

figure

-LRB-

a

-RRB-

The

length

of

the

longest

path

of

weight

is

still

but

the

total

number

of

weight

edges

is

smaller

This

implies

that

the

corresponding

acyclic

graph

Ga

-LRB-

see

Figure

-LRB-

b

-RRB-

-RRB-

contains

fewer

edges

than

the

acyclic

graph

of

Figure

-LRB-

d

-RRB-

and

therefore

is

likely

to

induce

a

smaller

initiation

-LRB-

that

is

the

case

in

our

example

we

find

an

initiation

interval

equal

to

-LRB-

see

Figure

-LRB-

c

-RRB-

-RRB-

op

op

op

op

op

op

-LRB-

b

-RRB-

op

op

op

op

op

p

p

op

op

op

op

op

-LRB-

a

-RRB-

processors

time

-LRB-

c

-RRB-

Figure

-LRB-

a

-RRB-

the

final

retimed

graph

q

-LRB-

-RRB-

q

-LRB-

-RRB-

q

-LRB-

-RRB-

q

-LRB-

-RRB-

q

-LRB-

-RRB-

q

-LRB-

-RRB-

-LRB-

b

-RRB-

The

corresponding

acyclic

graph

-LRB-

c

-RRB-

A

corresponding

list

scheduling

allocation

Recall

that

a

retiming

q

such

that

-LRB-

Gq

-RRB-

opt

is

any

integral

solution

to

the

following

system

-LRB-

see

formulation

of

Theorem

-RRB-

-LRB-

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

for

every

edge

u

e!

v

E

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

D

-LRB-

u

v

-RRB-

for

all

vertices

u

v

V

such

that

-LRB-

u

v

-RRB-

opt

-LRB-

-RRB-

scheduling

a

graph

which

is

a

subset

of

another

graph

will

not

always

produce

a

smaller

execution

time

But

intuition

shows

that

it

will

in

most

practical

cases

-LRB-

the

fewer

constraints

the

more

freedom

-RRB-

turns

out

that

is

the

best

possible

integer

initiation

interval

with

p

processors

the

sum

of

all

operation

delays

is

and

d

e

Among

these

retimings

we

want

to

select

one

particular

retiming

q

for

which

the

number

of

weight

edges

in

Gq

is

minimized

This

can

be

done

as

follows

Lemma

Let

G

-LRB-

V

E

ffi

d

-RRB-

be

a

synchronous

circuit

A

retiming

q

such

that

-LRB-

Gq

-RRB-

opt

and

such

that

the

number

of

weight

edges

in

Gq

is

minimized

can

be

found

in

polynomial

time

by

solving

the

following

integer

linear

program

min

P

v

-LRB-

e

-RRB-

v

-LRB-

e

-RRB-

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

v

-LRB-

e

-RRB-

for

every

edge

u

e!

v

E

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

D

-LRB-

u

v

-RRB-

for

all

vertices

u

v

V

such

that

-LRB-

u

v

-RRB-

opt

-LRB-

-RRB-

Proof

Consider

an

optimal

integer

solution

-LRB-

q

v

-RRB-

to

system

q

defines

a

retiming

for

G

with

-LRB-

Gq

-RRB-

opt

since

system

is

satisfied

indeed

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

v

-LRB-

e

-RRB-

and

v

-LRB-

e

-RRB-

implies

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

Note

that

each

v

-LRB-

e

-RRB-

is

constrained

by

only

one

equation

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

v

-LRB-

e

-RRB-

There

are

two

cases

ffl

The

edge

e

in

Gq

has

weight

i.e.

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

Then

v

-LRB-

e

-RRB-

is

the

only

possibility

ffl

The

edge

e

in

Gq

has

a

positive

weight

i.e.

q

-LRB-

v

-RRB-

q

-LRB-

u

-RRB-

d

-LRB-

e

-RRB-

-LRB-

recall

that

q

and

d

are

integers

-RRB-

In

this

case

the

minimal

value

for

v

is

Therefore

given

a

retiming

q

P

v

-LRB-

e

-RRB-

is

minimal

when

it

is

equal

to

the

number

of

weight

edges

in

Gq

Now

it

remains

to

show

that

such

an

optimal

integer

solution

can

be

found

in

polynomial

time

For

that

we

write

System

in

matrix

form

as

minfcx

j

Ax

bg

minf

-LRB-

-RRB-

q

v

j

BBB

Id

Id

C

Id

CCCA

q

v

BBB

d

D

CCCAg

where

C

is

the

transpose

of

the

jV

j

jEj-incidence

matrix

of

G

is

the

transpose

of

the

incidence

matrix

of

the

graph

whose

edges

are

the

pairs

-LRB-

u

v

-RRB-

such

that

-LRB-

u

v

-RRB-

opt

and

Id

is

the

jEj

jEj

identity

matrix

Note

that

if

M

is

a

totally

unimodular

matrix

then

so

are

tM

and

M

Id

The

matrix

C

is

also

the

transpose

of

an

incidence

matrix

-LRB-

the

incidence

matrix

of

G

-LSB-

-RRB-

thus

it

is

totally

unimodular

-LRB-

see

-LSB-

page

example

-RSB-

-RRB-

Then

C

Id

is

totally

unimodular

B

Id

C

Id

CA

is

totally

unimodular

and

finally

A

is

also

totally

unimodular

Therefore

solving

the

ILP

Problem

is

not

NP-complete

System

considered

as

an

LP

problem

has

an

integral

optimum

solution

-LRB-

Corollary

a

in

-LSB-

-RSB-

-RRB-

and

such

an

integral

solution

can

be

found

in

polynomial

time

-LRB-

Theorem

in

-LSB-

-RSB-

-RRB-

Let

us

summarize

how

this

refinement

can

be

incorporated

into

our

software

pipelining

heuristic

first

we

compute

opt

the

minimum

achievable

clock

period

for

G

then

we

solve

System

and

we

obtain

a

retiming

q

We

define

Ga

as

the

acyclic

graph

whose

edges

have

weight

in

Gq

the

longest

path

in

Ga

is

minimized

and

the

number

of

edges

in

Ga

is

minimized

Finally

we

schedule

Ga

as

in

Algorithm

CDR

We

call

this

heuristic

the

modified

CDR

-LRB-

or

simply

mCDR

-RRB-

Remark

Solving

System

can

be

expensive

although

polynomial

An

optimization

that

permits

to

reduce

the

complexity

is

to

pre-compute

the

strongly

connected

components

Gi

of

G

and

to

solve

the

problem

separately

for

each

component

Gi

Then

a

retiming

that

minimizes

the

number

of

weight

edges

in

Gq

is

built

by

adding

suitable

constants

to

each

retiming

qi

so

that

all

edges

that

link

different

components

have

positive

weights

Future

work

will

try

to

find

a

pure

graph-theoretic

approach

to

the

resolution

of

System

so

that

the

practical

complexity

of

our

software

pipelining

heuristic

is

decreased

Load

balancing

We

have

restricted

so

far

initiation

intervals

to

integer

values

As

mentioned

in

Section

searching

for

rational

initiation

intervals

might

give

better

results

but

at

the

price

of

an

increase

in

complexity

searching

for

pq

can

be

achieved

by

unrolling

the

original

loop

nest

by

a

factor

of

q

thereby

processing

an

extended

dependence

graph

with

many

more

vertices

and

edges

In

this

section

we

propose

a

simple

heuristic

to

alleviate

potential

load

imbalance

between

processors

and

for

which

there

is

no

need

to

unroll

the

graph

Remember

the

principle

of

the

four

previously

described

heuristics

-LRB-

GS

mGS

CDR

and

mCDR

-RRB-

First

an

acyclic

graph

Ga

is

built

from

G.

Then

Ga

is

scheduled

by

a

list

scheduling

technique

This

defines

the

schedule

oea

inside

each

slice

of

length

-LRB-

the

initiation

interval

-RRB-

Finally

slices

are

concatenated

a

slice

being

initiated

just

after

the

completion

of

the

previous

one

The

main

weakness

of

this

principle

is

that

slices

do

not

overlap

Since

the

schedule

in

each

slice

has

been

defined

by

an

As-Soon-As-Possible

-LRB-

ASAP

-RRB-

list

scheduling

what

usually

happens

is

that

many

processors

are

idle

during

the

last

time

steps

of

the

slice

The

idea

to

remedy

this

problem

is

to

try

to

fill

these

holes

in

the

schedule

with

the

tasks

of

the

next

slice

For

that

instead

of

scheduling

the

next

slice

with

the

same

schedule

oea

we

schedule

it

with

an

As-Late-AsPossible

-LRB-

ALAP

-RRB-

so

that

holes

may

appear

in

the

first

time

steps

of

the

slice

Then

between

two

successive

slices

processors

are

permuted

so

that

the

computational

load

is

-LRB-

nearly

-RRB-

equally

balanced

when

concatenating

both

slices

Let

us

formulate

this

more

precisely

Define

a

retiming

q

for

G

for

example

the

retiming

that

minimizes

the

period

of

Gq

and

that

minimizes

the

number

of

edges

of

Gq

with

no

registers

Delete

from

Gq

all

edges

that

have

at

least

one

register

-LRB-

i.e.

whose

weight

is

positive

-RRB-

this

defines

Ga.

Then

define

for

Ga

an

As-Soon-As-Possible

-LRB-

ASAP

-RRB-

list

scheduling

oeas

and

an

As-Late-AsPossible

-LRB-

ALAP

-RRB-

oeal

Denote

by

s

and

l

the

respective

makespans

of

oeas

and

oeal

By

construction

oes

-LRB-

opi

k

-RRB-

oeas

-LRB-

opi

-RRB-

s

-LRB-

q

-LRB-

opi

-RRB-

k

-RRB-

and

oel

-LRB-

opi

k

-RRB-

oeal

-LRB-

opi

-RRB-

l

-LRB-

q

-LRB-

opi

-RRB-

k

-RRB-

are

both

valid

cyclic

schedules

for

G.

Note

that

both

define

the

same

slices

only

the

organization

inside

slices

may

be

different

To

define

the

final

schedule

oe

computations

of

slice

-LRB-

even

slices

-RRB-

for

oeas

will

be

scheduled

in

slice

K

of

oe

and

organized

with

oeal

whereas

computations

of

slice

-LRB-

odd

slices

-RRB-

for

oel

will

be

scheduled

in

slice

K

and

organized

with

oel

However

they

will

be

delayed

so

that

dependences

between

operations

in

slice

and

in

slice

are

respected

In

other

words

we

try

to

determine

a

schedule

of

the

following

form

-LRB-

oe

-LRB-

opi

k

-RRB-

oeas

-LRB-

opi

-RRB-

-LRB-

q

-LRB-

opi

-RRB-

k

-RRB-

if

q

-LRB-

op

-RRB-

k

oe

-LRB-

opi

k

-RRB-

D

oeal

-LRB-

opi

-RRB-

-LRB-

q

-LRB-

opi

-RRB-

k

-RRB-

if

q

-LRB-

op

-RRB-

k

-LRB-

-RRB-

where

D

s

D

l

and

D

is

minimized

D

is

the

time

step

at

which

the

first

operations

that

correspond

to

odd

slices

of

oel

are

initiated

By

this

construction

all

dependences

are

respected

except

possibly

some

dependences

between

operations

of

slice

and

operations

of

slice

D

has

to

be

chosen

sufficiently

large

so

that

these

remaining

dependences

are

satisfied

Let

Cr

s

-LRB-

resp

Cr

l

-RRB-

be

the

set

of

operations

that

are

allocated

to

processor

r

in

schedule

oes

-LRB-

resp

in

schedule

oel

-RRB-

Denote

by

Er

t

the

set

of

edges

e

-LRB-

opi

opj

-RRB-

such

that

opi

Cr

s

opj

Ct

l

and

q

-LRB-

opj

-RRB-

q

-LRB-

opi

-RRB-

d

-LRB-

e

-RRB-

Er

t

induces

a

set

of

constraints

on

D

that

can

be

formulated

as

follows

Let

ae

-LRB-

Cr

Ct

-RRB-

be

the

minimum

value

which

meets

the

following

inequality

ae

-LRB-

Cr

Ct

-RRB-

oeal

-LRB-

opj

-RRB-

oeas

-LRB-

opi

-RRB-

ffi

-LRB-

opi

-RRB-

if

e

-LRB-

opi

opj

-RRB-

Er

t

Intuitively

ae

-LRB-

Cr

Ct

-RRB-

is

the

minimum

distance

between

tasks

in

slice

assigned

to

processor

r

and

tasks

in

slice

assigned

to

processor

t

which

are

linked

by

a

dependence

Dependence

constraints

are

now

expressed

as

D

ae

-LRB-

Cr

Ct

-RRB-

for

r

t

p

-LRB-

-RRB-

Next

we

have

to

concatenate

two

successive

slices

so

that

all

processors

receive

the

same

amount

of

work

The

idea

is

to

make

a

permutation

between

processors

clusters

for

slice

will

not

be

recomputed

but

target

processors

will

be

interchanged

to

take

into

account

possible

load

imbalance

from

slice

Let

tr

s

-LRB-

oeas

-LRB-

op

-RRB-

ffi

-LRB-

op

-RRB-

-RRB-

and

ut

l

-LRB-

oeal

-LRB-

op

-RRB-

-RRB-

Let

ss

be

a

permutation

of

pg

such

that

Cr

s

and

Css

-LRB-

r

-RRB-

l

will

be

allocated

to

the

same

processor

Resource

constraints

are

expressed

as

follows

D

uss

-LRB-

r

-RRB-

tr

for

r

p

-LRB-

-RRB-

Clearly

the

optimal

permutation

ss

that

minimizes

D

is

defined

as

-LRB-

uss

-LRB-

-RRB-

uss

-LRB-

p

-RRB-

tp

We

obtain

the

final

heuristic

Use

Algorithm

mCDR

to

compute

the

acyclic

graph

Ga.

Compute

an

ASAP

list

scheduling

oeas

and

an

ALAP

list

scheduling

oeal

Compute

the

minimum

distance

D

from

equations

and

The

final

schedule

is

expressed

according

to

equation

As

both

oeas

and

oeal

are

list

schedulings

we

can

prove

the

same

guarantee

bound

for

this

heuristic

as

for

Algorithms

CDR

and

mCDR

since

s

l

-LRB-

and

each

slice

computes

two

iterations

instead

of

one

-RRB-

The

possible

gain

is

that

rather

than

executing

slices

without

overlap

we

have

tried

to

interleave

them

as

tightly

as

possible

Example

Consider

our

key

example

again

Figure

-LRB-

c

-RRB-

shows

a

possible

allocation

of

an

instance

of

Ga

provided

by

an

ASAP

list

scheduling

Figure

shows

an

allocation

provided

by

an

ALAP

list

scheduling

and

Figure

the

concatenation

of

these

two

instances

The

initiation

interval

that

we

obtain

is

equal

to

for

two

instances

i.e.

which

is

better

than

the

initiation

interval

obtained

with

Algorithm

mCDR

-LRB-

Figure

-LRB-

c

-RRB-

-RRB-

p

p

op

op

op

op

op

op

processors

time

Figure

ALAP

scheduling

opopop

opopop

op

op

op

op

op

op

op

op

op

op

processors

Figure

Concatenation

of

two

instances

Conclusion

In

this

paper

we

have

presented

a

new

heuristic

for

the

SP

problem

We

have

built

upon

results

of

Gasperoni

and

Schwiegelshohn

and

we

have

made

clear

the

link

between

software

pipelining

and

retiming

In

the

single

resource

class

case

our

new

heuristic

is

guaranteed

with

a

better

bound

than

that

of

-LSB-

-RSB-

Unfortunately

we

can

not

extend

the

guarantee

to

the

many

resource

classes

case

because

list

scheduling

itself

is

not

guaranteed

in

this

case

We

point

out

that

our

CDR

heuristic

has

a

low

complexity

As

for

mCDR

further

work

will

be

aimed

at

deriving

an

algorithmic

implementation

that

will

not

require

the

use

of

Integer

Linear

Programming

-LRB-

even

though

the

particular

instance

of

ILP

invoked

in

mCDR

is

polynomial

-RRB-

Finally

note

that

all

edge-cutting

heuristics

lead

to

cyclic

schedulings

where

slices

do

not

overlap

-LRB-

by

construction

-RRB-

Our

final

load-balancing

technique

is

a

first

step

to

overcome

this

limitation

It

would

be

very

interesting

to

derive

methods

-LRB-

more

sophisticated

than

loop

unrolling

-RRB-

to

synthesize

resource-constrained

schedulings

where

slices

can

overlap

can

not

be

improved

further

the

two

processors

are

always

busy

as

P

i

ffi

-LRB-

opi

-RRB-

References

-LSB-

-RSB-

A.

Aiken

and

A.

Nicolau

Perfect

pipelining

A

new

loop

parallelization

technique

In

ESOP

volume

of

Lectures

Notes

in

Computer

Science

pages

-LCB-

Springer

Verlag

-LSB-

-RSB-

C.Hanen

and

A.Munier

Cyclic

scheduling

on

parallel

processors

an

overview

Technical

Report

Laboratoire

de

Recherche

en

Informatique

Universite

de

Paris

Sud

Centre

d'Orsay

-LSB-

-RSB-

E.

G.

Coffman

Computer

and

job-shop

scheduling

theory

John

Wiley

-LSB-

-RSB-

Thomas

H.

Cormen

Charles

E.

Leiserson

and

Ronald

L.

Rivest

editors

Introduction

to

Algorithms

The

MIT

Press

-LSB-

-RSB-

Paul

Feautrier

Fine-grain

scheduling

under

resource

constraints

In

Languages

and

Compilers

or

Parallel

Computing

number

in

Lectures

Notes

in

Computer

Science

pages

-LCB-

Springer

Verlag

-LSB-

-RSB-

F.Gasperoni

and

U.Schwiegelshohn

Generating

close

to

optimum

loop

schedules

on

parallel

processors

Parallel

Processing

Letters

-LRB-

-RRB-

-LCB-

-LSB-

-RSB-

R.

Govindarajan

Erik

R.

Altman

and

Guang

R.

Gao

A

framework

for

resource-constrained

rate-optimal

software

pipelining

In

COMPAR

VI

volume

of

Lectures

Notes

in

Computer

Science

Springer

Verlag

-LSB-

-RSB-

J.Wang

C.Einsenbeis

M.Jourdan

and

B.Su

Decomposed

software

pipelining

International

Journal

of

Parallel

Programming

-LRB-

-RRB-

-LCB-

-LSB-

-RSB-

C.E.

Leiserson

and

J.B.

Saxe

Retiming

synchronous

circuitry

Algorithmica

-LCB-

-LSB-

-RSB-

Alexander

Schrijver

Theory

of

Linear

and

Integer

Programming

John

Wiley

and

Sons

New

York

Contents

Introduction

Known

results

on

the

SP

problem

Problem

formulation

Related

work

Going

from

cyclic

scheduling

to

acyclic

scheduling

Some

properties

of

cyclic

scheduling

The

heuristic

of

Gasperoni

and

Schwiegelshohn

Optimal

schedule

for

unlimited

resources

Algorithm

GS

for

p

resources

Performances

of

Algorithm

GS

Cutting

edges

by

retiming

Minimizing

the

longest

path

of

the

acyclic

graph

Retiming

algorithms

A

new

scheduling

algorithm

Algorithm

CDR

Correctness

of

Algorithm

CDR

Performances

of

Algorithm

CDR

Link

between

and

opt

Minimizing

the

number

of

edges

of

the

acyclic

graph

Load

balancing

Conclusion

circuit retiming
cyclic scheduling
guaranteed heuristic
list scheduling
software pipelining