Patent ID: 12232246

DETAILED DESCRIPTION

Some embodiments presented in this disclosure feature a structure for delivering power that reduces power noise. Embodiments presented herein can generally be part of any power distribution network in which planes (or substantially planar conductors) are used for power delivery. Specifically, embodiments can be part of a power distribution network in an IC die, an IC package, or a printed circuit board.

FIGS.2A and2Billustrate plots of the impedance of a power distribution network versus frequency in accordance with some embodiments described in this disclosure.

In some embodiments described herein, the impedance of a power distribution network can be modeled using one or more resistances, inductances, and/or capacitances. In these embodiments, as the frequency increases, the contribution of the one or more inductances to the total impedance increases, while the contribution of the one or more capacitances to the total impedance decreases.

If the total impedance of the power distribution network is high for a particular frequency range, then the power distribution network may introduce an unacceptably high amount of power noise in that frequency range. For example, as shown inFIG.2A, the impedance of the power distribution network at frequency F1is Z1. If the value of Z1is sufficiently high, then the power distribution network may introduce an unacceptably high amount power noise with frequencies around F1.

Some embodiments described herein decrease the impedance of the power distribution network, thereby decreasing the amount of power noise introduced by the power distribution network. For example, as shown inFIG.2B, reducing the inductance of the power distribution network decreases the overall impedance of the power distribution network. Specifically, the peak impedance value Z2shown inFIG.2Bis lower than the peak impedance value Z1shown inFIG.2A.

Some embodiments described herein provide a structure for delivering power that has a low inductance, which causes the impedance of the power distribution network to be low, which, in turn, causes the amount of power noise introduced by the power distribution network to be low.

FIG.3Aillustrates a structure for delivering power in accordance with some embodiments described in this disclosure.

Some embodiments can comprise conductors disposed on two or more layers. Specifically, in some embodiments, a structure for delivering power can comprise interdigitated conductors310disposed on a first layer, and conducting structure312disposed on a second layer.

As shown inFIG.3A, interdigitated conductors310can include conductors302-308. At least one conductor (e.g., conductors302and306) in interdigitated conductors310can be maintained at voltage V1, and at least one conductor (e.g., conductors304and308) in interdigitated conductors310can be maintained at voltage V2, wherein voltage V1is different from voltage V2.

In general, voltages V1and V2can be any voltages that can be used to provide power to a circuit. Specifically, in some embodiments, voltage V1can be ground and voltage V2can be a power supply voltage. In other embodiments, voltage V1can be a power supply voltage and voltage V2can be ground.

Conducting structure312can include one or more conductors. In some embodiments, at least one conductor in conducting structure312can be maintained at voltage V1. In other embodiments, at least one conductor in conducting structure312can be maintained at voltage V2.

In some embodiments, the orientation of the conductors can be substantially along the expected direction of current flow. For example, inFIG.3A, the current is expected to flow along direction315, and therefore, interdigitated conductors310are substantially oriented along direction315. In some embodiments, the shape of the conductors can be based on the pattern of current flow. For example, if the die dimension is smaller than package size, the conductors may have a tapered shape, e.g., a trapezoidal shape. The shapes and/or sizes of the conductors can be selected to ensure that the DC (direct current) resistance of the power delivery structure has a negligible impact on the operation of the circuit to which power is being delivered.

In some embodiments described herein, the inductance associated with a current loop depends on the cross-sectional area of the current loop, and the width of the current loop along a direction that is orthogonal to the plane of the current loop. If the distance between a power supply conductor and a ground conductor is large, it can cause the cross-sectional area of the current loop to be large, which, in turn, can cause the inductance of the power distribution network to be high.FIGS.3B-3Cdescribed below explain why the inductance of the structure shown inFIG.3Ais low.

FIG.3Billustrates a front view (i.e., a view along direction314) of the structure shown inFIG.3Ain accordance with some embodiments described in this disclosure.

Current loop318is formed by a current that flows between a first set of contacts and a second set of contacts via conductor308and conducting structure312. For example, the first set of contacts may be electrically connected to the left ends of conductor308and conducting structure312, and the second set of contacts may be electrically connected to the right ends of conductor308and conducting structure312. The inductance due to current loop318can depend on the cross-sectional area of current loop318and on the width (along direction314) of current loop318.

FIG.3Cillustrates a top view (i.e., a view along direction316) of the structure shown inFIG.3Ain accordance with some embodiments described in this disclosure.

Current loop320is formed by a current that flows between the first set of contacts and the second set of contacts via conductors308and306. Current loop320also contributes an inductance to the power distribution network.

The inductances contributed by current loops318and320are coupled in parallel. Therefore, the effective inductance of these two loops is less than the individual inductances of either of the two loops. This effective inductance can be less than the inductance of a corresponding structure that does not have interdigitated conductors, e.g., a structure similar to the one shown inFIG.1. In some embodiments, the structure illustrated inFIG.3Acan be more effective in reducing the overall inductance of the power distribution network when the distance between the two layers (e.g., the distance between interdigitated conductors310and conducting structure312) is large and/or the distance between adjacent conductors in the set of interdigitated conductors (e.g., interdigitated conductors310) is small.

Various modifications to the disclosed embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present disclosure. Some variations and modifications of the embodiment illustrated inFIG.3Aare described below.

FIG.4Aillustrates a structure for delivering power in accordance with some embodiments described in this disclosure.

The structure shown inFIG.4Acomprises conductors disposed on two or more layers. Specifically, the structure comprises interdigitated conductors410disposed on a first layer, and a monolithic conductor412disposed on a second layer.

In some embodiments, interdigitated conductors410can include conductors402-408. At least one conductor (e.g., conductors402and406) in interdigitated conductors410can be maintained at voltage V1, and at least one conductor (e.g., conductors404and408) in interdigitated conductors410can be maintained at voltage V2, wherein voltage V1is different from voltage V2. In general, voltages V1and V2can be any voltages that can be used to provide power to a circuit. Specifically, in some embodiments, voltage V1can be ground and voltage V2can be a power supply voltage. In other embodiments, voltage V1can be a power supply voltage and voltage V2can be ground.

In some embodiments, conductor412can be maintained at the same voltage as conductors402and406, i.e., voltage V1. In some embodiments, conductor412can be maintained at voltage V2.

In some embodiments (as shown inFIG.4A), conductors402and406can have smaller widths than conductors404and408. In some embodiments, conductors402and406can have the same widths as conductors404and408.

The inductance of the structure shown inFIG.4Acan be less than the inductance of a structure in which conductors402and406have the same widths as conductors404and408. The inductance of a structure in which conductors402and406have the same widths as conductors404and408can be less than the inductance of a structure that does not include interdigitated conductors (e.g., a structure similar to the one shown inFIG.1).

FIG.4Billustrates a structure for delivering power in accordance with some embodiments described in this disclosure.

The structure shown inFIG.4Bis a variation of the structure shown inFIG.4A. Both of these structures comprise conductors disposed on two or more layers. However, unlikeFIG.4A, interdigitated conductors430(which include conductors422-428) are disposed on a lower layer, and monolithic conductor432is disposed on an upper layer.

FIG.5Aillustrates a structure for delivering power in accordance with some embodiments described in this disclosure.

The structure shown inFIG.5Acomprises conductors disposed on two or more layers. Specifically, the structure comprises interdigitated conductors510disposed on a first layer, and interdigitated conductors530disposed on a second layer.

Interdigitated conductors510can include conductors502-508, and interdigitated conductors530can include conductors522-528. At least one conductor (e.g., conductors502and506) in interdigitated conductors510can be maintained at voltage V1, and at least one conductor (e.g., conductors504and508) in interdigitated conductors510can be maintained at voltage V2. Further, at least one conductor (e.g., conductors524and528) in interdigitated conductors530can be maintained at voltage V1, and at least one conductor (e.g., conductors522and526) in interdigitated conductors510can be maintained at voltage V2.

Voltages V1and V2are different from one another, and can generally be any set of voltages that can be used to provide power to a circuit. Specifically, in some embodiments, voltage V1can be ground and voltage V2can be a power supply voltage. In other embodiments, voltage V1can be a power supply voltage and voltage V2can be ground.

InFIG.5A, the voltage of a conductor in a layer (e.g., conductor506in the upper layer) is different from the voltages of adjacent conductors in the same layer (e.g., conductors504and508in the upper layer), and is also different from the voltage of the corresponding conductor in the other layer (e.g., conductor526in the lower layer).

InFIG.5A, conductors502-508and522-528are shown as having substantially the same widths. However, in other embodiments, the conductors may have different widths.

FIG.5Billustrates a structure for delivering power in accordance with some embodiments described in this disclosure.

The structure shown inFIG.5Bis a variation of the structure shown inFIG.5A. Both of these structures comprise interdigitated conductors disposed on two or more layers. Specifically, interdigitated conductors550(which include conductors542-548) are disposed on an upper layer, and interdigitated conductors560(which include conductors552-558) are disposed on a lower layer. Furthermore, as inFIG.5A, the voltage of a conductor in a layer (e.g., conductor546) is different from the voltages of adjacent conductors in the same layer (e.g., conductors544and548). However, unlikeFIG.5A, the voltage of a conductor in a layer (e.g., conductor546in the upper layer) is the same as the voltage of the corresponding conductor in the other layer (e.g., conductor556in the lower layer). Although the conductors inFIG.5Bare shown as having substantially the same widths, the conductors can have different widths in other embodiments.

FIG.6Aillustrates a structure for delivering power in accordance with some embodiments described in this disclosure.

The structure shown inFIG.6Acomprises conductors disposed on three or more layers. Specifically, the structure comprises interdigitated conductors610(which include conductors602-608) disposed on a first layer, monolithic conductor612disposed on a second layer, and interdigitated conductors630(which include conductors622-628) disposed on a third layer.

At least one conductor (e.g., conductors602and606) in interdigitated conductors610can be maintained at voltage V1, and at least one conductor (e.g., conductors604and608) in interdigitated conductors610can be maintained at voltage V2. Similarly, at least one conductor (e.g., conductors622and626) in interdigitated conductors630can be maintained at voltage V1, and at least one conductor (e.g., conductors624and628) in interdigitated conductors630can be maintained at voltage V2. In some embodiments, conductor612can be maintained at voltage V1, and in other embodiments, conductor612can be maintained at voltage V2.

Voltages V1and V2are different from one another, and can generally be any set of voltages that can be used to provide power to a circuit. Specifically, in some embodiments, voltage V1can be ground and voltage V2can be a power supply voltage. In other embodiments, voltage V1can be a power supply voltage and voltage V2can be ground.

InFIG.6A, conductors602,606,622, and626are shown as having smaller widths than conductors604,608,624, and628. In other embodiments, the conductors may have the same widths. The inductance of the structure shown inFIG.6Amay be less than the inductance of a structure in which conductors have the same widths.

FIG.6Billustrates a structure for delivering power in accordance with some embodiments described in this disclosure.

The structure shown inFIG.6Bis a variation of the structure shown inFIG.6A. Both of these structures comprise conductors disposed on three or more layers. Specifically, the structure shown inFIG.6Bcomprises monolithic conductor640disposed on a first layer, a set of interdigitated conductors that include conductors642-648disposed on a second layer, and monolithic conductor650disposed on a third layer.

At least one conductor (e.g., conductors642and646) in the set of interdigitated conductors can be maintained at voltage V1, and at least one conductor (e.g., conductors644and648) in the set of interdigitated conductors can be maintained at voltage V2. Monolithic conductors640and650can be maintained at voltage V1or V2.

FIG.7illustrates a structure for delivering power that is part of a power distribution network in an IC die in accordance with some embodiments described in this disclosure.

IC die700can include a power distribution network that supplies power to various circuit elements in the IC die. The power distribution network can include conductors disposed on two or more metal layers, including a set of interdigitated conductors702-708disposed on one of the metal layers. The conductors can be oriented substantially along an expected direction of current flow, and may or may not have the same dimensions and/or shapes. Adjacent conductors in the set of interdigitated conductors702-708can have different voltages. For example, conductors702and706may be maintained at voltage V1and conductors704and708may be maintained at voltage V2. Voltages V1and V2can generally be any pair of voltages that are capable of being used to deliver power to a circuit. The power distribution network may also include other conducting structures (not shown) that are disposed on other metal layers of the IC die.

FIG.8illustrates a structure for delivering power that is part of a power distribution network in an IC package in accordance with some embodiments described in this disclosure.

IC package800can include a power distribution network that supplies power to die802. The power distribution network can include conductors disposed on two or more layers, including a set of interdigitated conductors804-818disposed on a first layer. Conductors804-810are trapezoidal, and are oriented substantially along the expected direction of current flow. Conductors812-818are rectangular and are oriented substantially along the expected direction of current flow. Conductors812-818do not extend to an edge of IC package800, and have different lengths. Adjacent conductors in the set of interdigitated conductors804-818can have different voltages. For example, conductors804and808may be maintained at voltage V1and conductors806and810may be maintained at voltage V2. Similarly, conductors814and818may be maintained at voltage V3(which may or may not be the same as voltage V1) and conductors812and816may be maintained at voltage V4(which may or may not be the same as voltage V2). The power distribution network may also include other conducting structures (not shown) that are disposed on other layers.

FIG.9illustrates a structure for delivering power that is part of a power distribution network in a printed circuit board in accordance with some embodiments described in this disclosure.

Printed circuit board900can include a power distribution network that supplies power from set of contacts904to IC package902. The power distribution network can include conductors disposed on two or more layers, including a set of interdigitated conductors906-912disposed on a first layer. As shown inFIG.9, conductors906-912can be rectangular in shape, and can be oriented substantially along the expected direction of current flow, namely, between set of contacts904and IC package902. Further, adjacent conductors in the set of interdigitated conductors906-912can have different voltages. For example, conductors906and910may be maintained at voltage V1and conductors908and912may be maintained at voltage V2. The power distribution network may also include other conducting structures (not shown) that are disposed on other layers.

In some embodiments, IC die700, and IC packages800and902can include memory devices. Examples of memory devices include, but are not limited to, static random access memory devices, dynamic random access memory (DRAM) devices such as synchronous double data rate (DDR) DRAM, and non-volatile memory devices such as Flash memory devices.

Various modifications to the disclosed embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present disclosure. Thus, the scope of the present disclosure is not limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.