Patent ID: 12187601

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

In the drawings, like reference numerals refer to like elements throughout, and the various features are not necessarily drawn to scale. In this description, the term “couple” or “couples” includes indirect or direct electrical or mechanical connection or combinations thereof. For example, if a first device couples to or is coupled with a second device, that connection may be through a direct electrical connection, or through an indirect electrical connection via one or more intervening devices and connections.

FIGS.1-3illustrate a sensor integrated circuit (IC)100including a semiconductor die102with a resistive sensor structure102R in an internal cavity110of a package structure108according to one embodiment. In various embodiments, sensor circuitry and associated amplifiers, control circuits and interface circuits are fabricated in the semiconductor die102to interface sensing structures with external circuits, and a sensor output signal is provided to an externally accessible IC pad or pin106via a corresponding die pad114and bond wire112to indicate the sensed environmental condition, such as pressure, vacuum, etc. The cavity110is defined by an interior surface of the package structure108, and an aperture, or port or opening116provides gas connection of the cavity110with an ambient condition of an exterior of the package structure108. The die102provides an electronic sensor structure with an outer surface spaced from the interior surface in the cavity110. The die102in one example is at least partially supported by bond wires112in the cavity110. In the example ofFIG.1, the die102is also partially supported by one or more a die attach structures120extending between a base104(e.g., such as a die or chip paddle) of a leadframe structure and a portion of a bottom side of the substrate102proximate the lateral edge of the semiconductor die102. In other examples, the die attach structure120can be laterally spaced from the die edge(s).

The electronic sensor structure102includes an upper sensing surface, in this case a top surface of the resistive sensor structure102R that is exposed to the internal cavity110to sense the ambient condition of an exterior of the package structure108. In one example, the resistor component102R includes a top side exposed to the cavity110, a bottom side exposed to the cavity110, and one or both lateral sides exposed to the cavity110to sense a pressure condition of the exterior of the IC100. The leadframe structure further includes electrical conductors106, and the bond wires112are individually connected between one of the electrical conductors106of the leadframe structure and a corresponding bond pad114of the die102. The package structure108encloses portions of the leadframe structure104,106and the bond wires112, and leaves portions of the electrical conductors106exposed as pins or pads of a finished IC100to allow soldering to a host circuit, not shown. The example ofFIG.1is a surface mount IC100where the leadframe electrical conductors106have exposed planar bottom surfaces to allow soldering of the finished IC to corresponding pads of a host printed circuit board (PCB, not shown) for electrical connection to the die102. Leaded surface-mount packages and leaded through-hole packages could also be used.

The package structure108can be formed by molding or other suitable process, preferably using an electrical insulator material. Described examples use a sublimation process to provide low-cost pressure or vacuum sensors using the semiconductor die102as the sensor element and also optionally for signal processing and other supporting circuitry. The semiconductor die102is encapsulated in the molded package structure108including sublimation die coat or other sacrificial material, and then baked to sublimate (e.g., evaporate) the sacrificial material, leaving the internal cavity110in which the die102, or at least a portion thereof, is not touching the mold compound108. The opening116is drilled or cast into the package structure108such that the external environment being sensed couples directly to the exposed sense surface of the die102. In various examples, the opening116can be cast into the package structure108via a mold sprue, or the opening116can be incorporated into the package before the molding process via a disposable plug, or drilled into the package108after molding using mechanical drilling, laser drilling, etching or other techniques.

Sacrificial sublimation material can also be used under the die102(e.g., in between die attach structures120, or under the die102to provide full stress isolation of the die102from the package structure108and from the leadframe base104. The described sensor ICs100provides a low cost electronic sensor solution compared with other MEMs sensors. Other advantages include small package size, mitigation of the use of ceramics or metal IC package materials, and the ability to use ordinary mainstream manufacturing processing steps and equipment. In addition, the described examples facilitate high quality sensing capabilities and long device life.

The IC100includes a sensor circuit, in one example including the resistive sensor structure102R formed on or in the semiconductor die102. As shown inFIG.1, the top, lateral sides, and bottom of the resistive structure102R provide sensing surfaces exposed to the cavity110to sense the ambient condition of the IC exterior. In one example, the structure102is configured to sense a pressure of the exterior of the package structure108. Although example inFIG.1is a pressure or vacuum sensor IC100, various different types of sensors can be constructed using the described techniques and examples, including without limitation moisture or dew-point sensors, ion sensors, ph sensors, gas flow-rate sensors, fluid flow-rate sensors, radiation sensors, pressure sensors, and/or vacuum sensors as shown. In addition, different IC techniques and circuits can be used to sense properties of a gas in other embodiments, such as conductivity between exposed electrodes, by applying current and measuring a voltage; applying a voltage and measuring a current, or applying a voltage to a capacitor and measuring a decay time, etc.

In certain example, the die102includes a substrate, such as silicon, SOI, or other semiconductor substrate, and the sensor circuitry is formed on or in the substrate101using known semiconductor fabrication processes and equipment. The package structure108in one example is a molded structure. The package structure108can be any suitable molding material that provides electrical insulation and mechanical protection for the die102, and can include low modulus of elasticity material to enhance stress immunity. The described thermal and mechanical isolation techniques and concepts allow use of package materials108that have a high coefficient of thermal expansion (CTE) and high thermal conductivity to save cost, while providing temperature stabilized operation, and mechanical isolation of the sensor circuitry. The die102can be supported in any suitable manner within the cavity110. In addition, at least a portion of the outer surface of the semiconductor die102is spaced from the interior surface of the package structure cavity110. Moreover, the die102separated from the package material108so as to be mechanically isolated from package stresses, thereby facilitating measurement of pressure or other environmental conditions inside the ported cavity110. In other examples, part of the surface of the die102can be in contact with the interior surface of the package structure108in the cavity110, or in contact with support structures, etc. (e.g., the die attach structures120inFIG.1, where included).

In certain examples, such as where the die attach structures120inFIG.1are omitted, the die102is suspended (e.g., mechanically supported exclusively) by the bond wires112that extend from the leadframe conductive structures106into the internal cavity110. The bond wires112are soldered or welded to bond pads114on the top of the semiconductor die102to form electrical connection between the bond pads114and the associated leadframe conductive structures106prior to a molding process to form the package material108. The cavity110is created by sublimation or evaporation of a sacrificial sublimation material formed during intermediate fabrication processing, and the port or opening116can be created as part of a molding process, or can be later drilled or machined through the molded material108. The port116can be used to facilitate fabrication of the suspended die structure102using sublimation materials or other sacrificial materials that are thermally evaporated or sublimated after formation of the molded structure108to leave the die102at least in part, by the bond wires112as shown inFIG.1. Suitable fabrication processes and materials are illustrated and described in U.S. patent application Ser. No. 15/248,151, filed Aug. 26, 2016, and entitled “Floating Die Package”, the entirety of which is hereby incorporated by reference.

The cavity110in one example is formed by depositing a sacrificial encapsulant material over the semiconductor die102prior to molding, and heating to cause sublimation of the sacrificial encapsulant material through the port116of the molding structure116. This process leaves a space in which the semiconductor die102is disposed floating over the leadframe base104(completely separated from the base104where the die attach structures120are omitted, or a space or gap is formed between the lower surface of the resistive structure102R and the top surface of the base structure104as shown inFIG.1where one or more die attach structures120are included). The open spaces of the cavity120are thus formed by sublimation or shrinkage/delamination of a sacrificial material deposited between the die102and the base104, and on the sensed face of the die structure102prior to the sublimation thermal process. The separation or spacing of the outer surface of the die102from the interior surface of the molded material108in certain examples provides a gap for thermal and/or mechanical isolation on all sides of the die102, leaving the bond wires112as the only significant thermal conduction path and mechanical support structure relative to the outside environment. In certain embodiments, the diameter, length, location and quantity of the bond wires112maintain the die in a fixed position in the cavity110. This approach enables efficient temperature management of just the silicon die, while eliminating most of the parametric electrical drifts due to mechanical stress and hysteresis of existing approaches.

Described examples facilitate low-cost packaging of electronic sensors in molded packages using a conducting leadframe and insulating over-mold with a port or cavity116so that the IC can be coupled to an environment (for example: gas or fluid.) such that the gas being sensed is in direct contact with the top of the die102, or the sensing face of the die102can be exposed to the cavity interior through a thin material layer, such as a passivation layer (e.g.,FIG.13below). This provides many advantages compared with sensor circuits packaged in expensive, ceramic or machined metal packages. Any suitable sacrificial material can be used in forming the cavity110, which will vaporize or sublimate when heated, leaving an open cavity110around all or at least a portion of the semiconductor die102.

Referring also toFIGS.2and3, the IC100ofFIG.1in one example implements a Pirani vacuum sensor using an etched, serpentine resistor structure102R formed of semiconductor material (e.g., silicon) of the die102. In this sensor, the resistor structure102R is incorporated in the IC and powered by circuitry detailed inFIGS.4and5below. The resistor temperature will increase as a function of the applied power and heat conductivity of the materials. With an isolated IC, the rate of cooling is related to the number of gas atoms around the IC (level of vacuum). In this manner, the sensor IC100can measure pressure and/or vacuum of the ambient at the exterior of the IC100. Conventional IC processes deposit resistive materials over silicon, silicon dioxide, or silicon nitride. Silicon dioxide is a better thermal insulator than silicon, but still conducts heat. As shown inFIG.2, the resistive structure102R is a portion of the semiconductor substrate102with trenches or gaps118aand118bformed on lateral sides of the remaining substrate portion102R. In this example, the trench-isolated resistive structure102R is essentially suspended between first and second ends, by which the center portion of the resistive structure102R includes an exposed top, and exposed bottom, and first and second exposed lateral sides within the cavity110. Using trench etching allows the resistor to be even further thermally insulated from the IC bulk, producing a Pirani Vacuum sensor. In an alternate implementation, the resistor could be made from a wire or other separate element suspended above the die102, such as a bond wire or resistance wire. The serpentine resistive element102R inFIGS.1-3is thermally decoupled from the surrounding silicon and packaging by the trenches118aand118band placement of sublimation material above and below it during fabrication leaves the cavity surrounding the surfaces of the structure102R. In operation, thermal flux from the serpentine resistor structure102R to the surrounding silicon walls has a magnitude that is a function of the gas density of the environment being sensed. High thermal flux is manifested as a drop in the serpentine resistor temperature. The presence of the die attach structures120in the illustrated embodiment advantageously provides structural support and mechanical attachment through the structures120to the lead frame structure104such that the outer portions of the structure102remain at a somewhat constant ambient temperature. As further shown inFIGS.1and3, the port or opening116extends from the top surface of the package structure108to the cavity110. In other examples, a serpentine structure is not needed, and the plan view profile can be straight, curved, curvilinear or any other shape to implement a resistor structure102R.

The trench regions118are formed by etching or cutting regions118aand118bof silicon away from top to bottom of the semiconductor substrate, leaving a resistant element or structure102R. In operation of the sensor IC100, a voltage or current signal is applied to the resistor structure102R, and thermal exchange between that heated element102R and its exterior can be used to measure the level of vacuum in that region. This example provides an inexpensive vacuum sensor IC100, in which a current is passed through the resistor structure102R, and the resistance of the structure102R is measured while it is being heated. The thermal conductivity between the structure102R and the region above, below and laterally alongside the structure102R is a function of the gas in the cavity110. The thermal loss of the heated structure102R is a function of the amount of vacuum in the cavity110, and the resistance of the structure102R will change based on the vacuum level.

As further shown inFIGS.4and5, the resistor structure102R is incorporated into the die102and powered by a reference voltage VREF (FIG.4) or a reference current IREF (FIG.5). In various examples, the amplifier402provides a sensor output according to a voltage or a current of the resistor component102R.FIG.4shows an interface circuit example including the sense resistor structure102R along with a second resistor R and an amplifier402constructed on or in the semiconductor die102. The resistors102R and R are connected in series between a voltage signal source VREF and a reference node. The amplifier402has an input401connected to a node joining the resistors102R and R to receive a voltage signal representing a current IS flowing in the sensor resistor structure102R. The amplifier402includes an output403providing a sensor output signal SENSE OUT representing the sense resistor current IS.FIG.5shows another example including a current source IREF providing a current signal to the resistor structure102R. In this case, the amplifier402measures a voltage VS across the resistor structure102R and provides the sensor output signal SENSE OUT at the output403. In the sensor IC example100ofFIGS.1-5, the temperature of the resistor structure102R increases as a function of the applied power and heat conductivity of the materials. With an isolated IC, the rate of cooling is related to the number of gas atoms around the IC (level of vacuum), and the sensor output signal SENSE OUT represents the vacuum level ambient condition of the exterior of the IC100.

FIGS.6-11show another sensor integrated circuit example600fabricated using sublimation of sacrificial die attach material and advanced etching to implement an electronic sensor. The sensor IC600in this example provides a capacitive membrane or diaphragm sensor structure in the cavity110of the package structure108. The electronic sensor structure600can be used in a variety of applications to measure pressure, and in certain examples can be used as a microphone configured to respond to an acoustic wave on the exterior of the molded package structure. The IC structures including the packaging material108, the leadframe structure104,106, the cavity110, the port or opening116, the bond wires112and the bond pads114are generally as described above. The sensor IC600inFIG.6includes a semiconductor die assembly605, with a first semiconductor substrate601and a second semiconductor substrate602. A first dielectric layer603is formed over a portion of a first side of the first semiconductor substrate601. The second semiconductor substrate602includes a first side (shown as the top side inFIG.6), and a lower second side. The substrate602also includes an annular first portion with a top side and a bottom side, where the bottom side of the first portion602is in contact with the first dielectric layer603. In addition, the second substrate602includes an inner second portion602D providing a diaphragm. The inner portion602D includes a top or upper first side, and a lower second side. The diaphragm or second portion602D in this example is laterally inwardly spaced from the annular first portion602. In certain examples, the annular portion602and the diaphragm portion602D can be generally circular, but other shapes can be used. In this example, moreover, the lower second side of the second portion602D is vertically spaced from the first dielectric layer603in order to form a pressure sensor diaphragm that is laterally spaced from the annular first portion602. This structure provides a capacitive membrane or diaphragm sensor structure in an internal cavity. As schematically shown in dashed lines inFIG.6, the second portion602D of the second semiconductor substrate forms a capacitor C including a first capacitor plate disposed above a second capacitor plate formed by the exposed upper first side of the first semiconductor substrate601. The gap or void beneath the diaphragm portion602D is evacuated during fabrication in one example to facilitate use as an absolute pressure sensor.

Interface circuitry (not shown) is fabricated in the annular portion602of the second substrate in one example to convert capacitance of the structure to a usable signal (e.g., voltage or current). In one example, the majority of the annular portion602and base portion601are operated at a ground or reference potential, and the second portion602D is connected to the interface circuit. The active portion602D of the capacitive element in this example is essentially buried in the die assembly605, and is not subject to surface leakage issues (e.g., isolated by oxides). In certain examples, a Faraday structure is provided by a polysilicon grid (not shown) formed over the diaphragm602D at the same potential as the diaphragm602D. This allows or facilitates cancellation of parasitic capacitance changes caused by the sensed medium or contamination of the interior of the cavity110of the sensor IC600.

FIGS.7-11illustrate the sensor IC600at successive intermediate stages of fabrication. InFIG.7, the upper (e.g., second) semiconductor substrate602is shown, with an inter-metal dielectric (IMD) layer604formed on the upper or first side of the substrate602. As previously mentioned, interface circuitry and other components are formed on and/or in the substrate602(not shown). In addition, bond pads114are formed on the upper side of the structure, extending through the dielectric material604to the top side of the substrate602. InFIG.8, a backside edge is used to form the trenches or openings118aand118b, extending from the bottom or second side of the second substrate602to the bottom of the IMD layer604. In certain examples, the trenches118can be backfilled with sacrificial sublimation material (not shown), and the lower side of the structure can be backgrounded and polished to a desired thickness (e.g., 4 mm), after which the trench material can be removed, leaving the structure shown inFIG.9. As shown inFIG.10, the first dielectric layer603is formed on the laterally outward portions of the upper or first side of the first semiconductor substrate601, with a central portion of the upper side exposed (i.e., not covered by the dielectric603).

The two structures are bonded to one another in the direction shown by the arrow inFIG.10, to provide a dual-substrate semiconductor die structure605as shown inFIG.11. Any suitable substrate bonding techniques and materials can be used to form the resulting die structure605. In one example, the semiconductor (e.g., silicon) material602is bonded to the dielectric material603inFIG.10in a vacuum, under a bias voltage and at high temperature to create a high integrity, low leakage bond that encloses the lower side of the sensor diaphragm602D in a vacuum for the sensor IC600. In one example, this is the reference vacuum for an absolute pressure sensor. The dielectric bonding approach in one example seals this reference vacuum permanently between the two capacitor plates.

As previously mentioned, the die605can then be mounted to the leadframe structure104,106using a sacrificial die attach material (not shown) and wire bonding is used to connect bond wires112from the die pads114two associated electrical conductors106of the leadframe structure. Thereafter, additional sacrificial sublimation material is formed on the lateral sides and upper surface of the die605, and the molded package structure108is formed through a molding or other suitable process. The resulting structure is then heated in order to evaporate or sublimate the sacrificial material, leaving the cavity110with the dual-substrate die structure605suspended through mechanical support provided by the soldered or welded bond wires112. One of the challenges in conventional semiconductor sensors is mechanical stress applied to the sensor through the package structure108and a support or pedestal mechanically connected to the base substrate. Such mechanical configuration can introduce significant stress due to temperature expansion differences in the materials which causes deflection of the diaphragm structure. In the described examples, this mechanical coupling is avoided, and the dual-substrate die structure605can be mechanically supported exclusively by the bond wires112inside the cavity110of the molded package structure108. The resulting sensor IC structure600shown inFIG.6is substantially free of all of the stresses introduced by the package and by the mold compound108, by anything around it and the opening116provides the ability to couple external atmosphere to the sensing face at the top of the dielectric layer604above the diaphragm structure602D.

FIG.12shows a pressure sensor100as described above in connection withFIGS.1-5in a system1200with a containing tube1202. In the example ofFIG.12, the sensor IC100further includes a coil1206to receive power and/or to transmit data. In one implementation, the sensor IC100includes a single transformer coil to transfer both power and data, although other implementations are possible that include separate, integrated power and data transformer coils (only a single coil1206is shown inFIG.12). The power and/or data is transformer coupled to a corresponding single or multiple secondary coils1208provided with a power transfer and/or communications IC1210. In these arrangements, power can be provided in the direction1212from an external source to the sensor IC100, and data from the sensor IC100can be wirelessly provided to the external IC1210in order to provide sensed pressure signals or values in the direction1214inFIG.12. This facilitates sensing within a controlled tube or chamber1202in order to provide pressure readings regarding a pressure condition in the interior1204of the tube or enclosure1202. Although illustrated in use within open ended tube1202, a sealed enclosure can be used in other applications, with a hermetically sealed interior1204. In this case, the sensor IC100wirelessly receives power and provides sensor data through the transformer coupling of the coils1206and1208. In other embodiments, the wireless power and/or data exchange concepts of the example ofFIG.12can be used in implementing the other sensor types shown and described herein.

Referring now toFIGS.13-15,FIG.13shows another sensor integrated circuit example1300, used to measure gas dew point, which includes a semiconductor die1302with a resistive bridge circuit including a temperature controlled first resistor1311and a second resistor1312with a sensing face exposed to the interior cavity110.FIG.14illustrates a control circuit1404, a temperature regulation circuit1410, and a bridge circuit1401in the IC1300ofFIG.13, and a signal diagram1500andFIG.15shows a controlled bridge excitation signal waveform1502along with sensor output voltage signal waveforms1504,1506and1508in the sensor1300ofFIGS.13and14. The various schematically illustrated components (e.g.,FIG.14) are fabricated on and/or in the semiconductor die1302in one example. The IC1300inFIG.13provides a mechanically isolated semiconductor die1302in the illustrated a package structure cavity110to implement a dewpoint sensor or humidity sensor. The IC structures including the packaging material108, the leadframe structure104,106, the cavity110, the port or opening116, the bond wires112and the bond pads114are generally as described above. In addition, the example ofFIG.13includes a semiconductor die including a substrate1302(e.g., silicon), with an upper metallization structure including one or more dielectric material (e.g., IMD) layers1304with conductive metal structures. In addition, the illustrated example includes an n-doped buried layer (NBL)1320formed proximate the lower side of the silicon substrate1302, and a temperature sensing diode1318is formed in an upper region of the semiconductor substrate1302.

The first resistor structure1311in one example is an elongated generally annular structure of suitable metal or other resistive material formed on or in an upper surface of the IMD dielectric material1304. In one example, the resistive material as a significant resistive temperature coefficient and is preferably close to the surface. A first passivation layer1310of a first thickness or height is formed over the first resistor structure1311between the first resistor structure1311and the cavity110. In this manner, the first resistor structure1311is substantially hermetically isolated from the ambient environment in the cavity110. The second resistor structure1312can also be formed using suitable metal or other resistive material on or in a portion of the upper surface of the dielectric material1304, and laterally spaced from the annular first resistor structure1311. All or a portion of the second resistor structure1312is completely or at least partially uncovered in the cavity110. In certain examples, no overlying material is formed over at least a portion of the top surface of the second resistor structure1312. In other possible implementations, a second passivation layer1313formed between the second resistor structure1312and the cavity110, wherein the second passivation layer1313is thinner than the first passivation layer1310. By either of these approaches, the second resistor structure1312is operatively exposed to the environmental conditions of the cavity110, and the first resistor structure1311environmentally unexposed to the cavity110.

The first and second resistor structures1311and1312are connected with one another and with further resistors R3and R4in a bridge circuit1401as schematically shown inFIG.14. An excitation source provides a bias signal (e.g., a bias voltage VB) to the bridge circuit1401, and an amplifier1402measures a bridge voltage to provide an output signal VOUT representing relative resistances R1, R2of the first and second resistor structures1311and1312. The amplifier1402in the example ofFIG.14includes a differential input connected to opposite branches of the bridge circuit1401, and a single-ended output1403provides the signal VOUT to a control circuit or controller1404(e.g., also fabricated in the semiconductor die1302). The control circuit1404in one example operates a switch S to selectively connect the bias voltage signal VB to an upper branch of the bridge circuit1401. The waveform1502inFIG.15illustrates an example switching control signal to set the closed or open state of the switch S. The control circuit1404receives a temperature signal TMP from an input1416. The temperature signal TMP in one example is generated by a thermal sensing diode1318formed in the substrate1302, shown in simplified form inFIG.13. The diode1318is biased by a current source1411in the example ofFIG.14.

As schematically shown inFIG.14, the sensor circuit further comprises a thermal control circuit1410that controls the temperature of the first resistor structure1311. As previously discussed, the first resistor structure1311inFIG.13is covered by the first passivation layer1310, and is therefore not exposed to the environmental conditions of the cavity110. The thermal control circuit1410in this example includes a first conductive structure1314, referred to as a cold plate. The structure1314is disposed proximate the first resistor structure1311such that the temperature of the structure1314represents a temperature associated with the first resistor structure1311. In the example ofFIG.13, the cold plate conductive structure1314is disposed laterally in a middle portion of the metallization structure in the IMD dielectric layer1304, and extends laterally under the annular first resistor structure1311and the second resistor structure1312. In this example, further metallization layer via and conductor structures are connected between the first conductive structure1314and a contact structure1316formed on or in an upper surface of the semiconductor substrate1302near the temperature sense diode1318. In this configuration, the diode1318senses a temperature associated with the first resistor structure1311. The TMP signal from the temperature sense diode1318is provided to the control circuit1404via the input1416as schematically shown inFIG.14. Although illustrated as using a diode1318, other temperature sensing components can be used in other examples.

As shown inFIG.13, one example of the semiconductor die assembly further includes a thermo-electric structure1308electrically connected to the first conductive structure1314. In one implementation, the thermo-electric structure1308is a Peltier material structure, such as n-doped nanoparticles of Bismuth Telluride printed on a thermally and electrically insulating oxide or other dielectric material1304. As shown inFIG.14, the thermal control circuit1410also includes a driver1412(e.g., formed on and/or in the semiconductor substrate1302). The driver1412has a first input to receive the TMP signal from the temperature sense diode1318, and a second input to receive a setpoint signal SP. An output1414of the driver1412provides a current or voltage signal to the thermo-electric structure1308. As shown inFIG.13, the thermo-electric structure1308is formed in one example as an annular structure overlying portions of the upper first surface of the dielectric layer1304, with a central opening laterally spaced from the first and second resistor structures1311,1312and from the passivation material layers1310and1313. The thermo-electric material1308is controlled by the driver1412to selectively provide heat to, or remove heat from, the first conductive structure1314.

In one example, the driver1412implements a closed-loop thermal regulator to control the temperature of the first resistor structure1311according to the setpoint signal SP. As previously mentioned, the first resistor structure1311is covered by the passivation layer1310and is thus unexposed to the cavity110. As a result, the regulator circuit implemented by the driver1412, the temperature sense component1318, and the thermo-electric material1308can stabilize the temperature of the first resistive structure1311. In the bridge circuit1401ofFIG.14, therefore, the resistance R1of the first resistive structure1311remains generally stable. At the same time, the second resistor structure1312is exposed to the cavity110(e.g., directly, or through a thin passive visitation layer material1313). Thus, the resistance R2of the second resistor structure1312changes with the temperature of the cavity110and the relative resistances R1and R2as measured by the amplifier1402will change according to environmental changes in the cavity110.

As further shown inFIG.13, the illustrated semiconductor by die structure1302in the sensor IC1300further includes annular conductive structures1306laterally outwardly spaced from one another on a first side of the dielectric layer1304. An inner annular conductive structure1306is electrically connected to the first conductive structure1314and conducts a current13from the overlying thermo-electric structure1308. A subsequent outlying annular conductive structure1306is laterally spaced outwardly from the inner annular conductive structure1306, and conducts a larger current12. In this example, a third annular conductive structure1306is laterally outwardly spaced from the second annular conductive structure1306, and conducts a still larger current11from the thermo-electric structure1308. An outer annular conductive structure1306in this example is proximate to the lateral outer edges of the dice structure, and is electrically connected to at least one bond pad. In this configuration, the outer annular conductive structure1306provides a thermal path to the electrical conductors106via the bond wires112. The thermo-electric structure1308is formed over portions of the upper side of the dielectric layer1304between the annular conductive structures1306, and operates to transfer heat in stages between the first conductive structure1314and the bond pad. In this manner, the combination of the thermo-electric material structure1308and the annular conductive structures1306, provides a lateral thermal path to either draw heat from the cold plate1314, or to provide heat to the cold plate1314as needed, in order to regulate the temperature of the first resistor structure1311at a temperature corresponding to the setpoint signal SP.

Conventional polymer-based humidity sensors calculate dewpoint using psychrometric lookup technique or calculation. However, these humidity sensors do not work well at low dewpoint levels. In addition, conventional humidity sensors are slow and tend to age. Chilled mirror sensors for automotive and other applications often use a Peltier or other thermo-electric element to cool a mirror to the condensation point causing interruption in reflected light. These sensors are typically very accurate, but are expensive to fabricate.

The sensor IC1300inFIG.13avoids a conductivity approach which is subject to contamination over time. In one example, the IC1300implements a dewpoint sensor that determines a time lag due to the latent heat of vaporization of condensate by using the cold plate conductive structure1314and the resistor bridge circuit1401. The signal diagram1500inFIG.15shows a controlled bridge excitation signal waveform1502provided by the control circuit1404inFIG.14, as well as sensor output voltage signal waveforms1504,1506and1508in the sensor IC1300. The control circuit1404implements digital control using the switch S and the driver1412drives the annular Peltier structure1308to cool the buried metal center cold plate conductive structure1314to a temperature slightly below a dewpoint that corresponds to the setpoint signal SP. The resistor structures1311and1312in one example are matched, high temperature coefficient metal resistors in the bridge circuit1401. The second resistor structure1312is exposed to the cavity directly, or through the thin passivation layer1313. The exposed second resistor structure1312in certain examples can also be exposed to the cavity1310through a thin IMD dielectric material (not shown).

The control circuit1404in one example applies a periodic excitation to the bridge via the switch S, represented as a pulse signal1502inFIG.15. This causes incremental heating of the metal resistor structures1311and1312. Because the first resistive structure1311R1, being in contact with passivation and by construction, will have more thermal mass than R2(except when condensate is covering R2), when the conductive structure1314is above the dewpoint temperature, the amplified output signal VOUT from the circuit amplifier1402undergoes a discernible negative transient shown in the curve1504inFIG.15. When the conductive structure1314is below the dewpoint temperature, and there is thermal mass over the second resistive structure1312, the amplified output signal VOUT undergoes a slight positive response as shown in the curve1506inFIG.15. This indicates to the control circuit1404that condensate exposed to the second resistive structure1312lags its heating relative to the first resistive structure1311. As shown in the curve1508andFIG.15, when the cold plate conductive structure1314is just barely below dewpoint temperature, the response of the amplified output signal VOUT will be of much higher positive amplitude as the heating of the second resistive structure1312is held fixed as energy flows into the structure1312to overcome the heat of vaporization of the condensate. While the second resistive structure1312is held fixed in temperature, the first resistive structure1311continues to heat resulting in a higher amplitude response in the amplified output signal VOUT. The control circuit1404accordingly extends the duration of the pulse in the waveform1502until the condensate evaporates in a closed loop fashion in response to the duration and polarity of the amplified output signal VOUT to increment the temperature of the conductive structure1314to a value just below dewpoint, and when this condition is achieved, the control circuit1404outputs the temperature reading represented by the signal TMP from the temperature sensing diode1318.

FIG.16illustrates an example method1600to fabricate an electronic sensor, such as the sensor ICs100,600and1300described above. At1602, a semiconductor die (e.g.,102,605,1302) is mounted to a leadframe structure (e.g.,104,106) using a sacrificial material. At1604, one or more bond wires112are connected between corresponding electrical conductors108of the leadframe structure104,106and bond pads114of the semiconductor die102,605,1302, using any suitable wire bonding processing steps and equipment. At1606, a sacrificial material is formed over the sensing face of the semiconductor die, and a package material is formed at1608over the die, the bond wires112and portions of the leadframe structure104,106to create a package structure108. In one example, this processing includes a conventional molding process at1608. At1610, the sacrificial material is heated in order to sublimate the sacrificial material and create an internal cavity110defined by an interior surface of the package structure108and to expose the sensing face of the semiconductor die102,605,1302. At1612, an opening116is optionally formed in the material108as a separate step to connect the cavity110and the exterior of the a package structure108. In other implementations, the opening116can be formed as part of the molding process at1608.

Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims.