Patent ID: 12206526

DETAILED DESCRIPTION

In various embodiments, a radio receiver is implemented with a differential detector circuit that is configured to efficiently estimate a channel for an incoming radio frequency (RF) signal and to generate soft decisions based at least in part on the channel estimates. Embodiments may be used in a variety of receiver implementations for determining and using channel estimates to obtain soft decisions for incoming orthogonal frequency division multiplexing (OFDM) communications. While embodiments are not limited in this regard, implementations may be used in connection with a Digital Audio Broadcast (DAB) digital radio communication system according to a given specification. Other implementations can be used in connection with other digital communication techniques, including wireless local area networks or other receivers using OFDM signaling.

While a differential detector circuit can be implemented in different manners, in embodiments herein this circuit may be implemented as part of a receiver signal processing path that receives downconverted digitized symbols in the frequency domain (after conversion from the time domain to the frequency domain). With embodiments, a blind channel estimate can be performed based on the knowledge that an incoming symbol provides information of one of a limited set of known values. Using this channel estimation allows coherent demodulation to occur, which gives a performance gain over non-coherent demodulation.

An OFDM signal is processed mostly in the frequency domain. Due to the properties of OFDM modulation in which message information includes a cyclic prefix and message content, each signal can be presented as:
Yi=XiHi+Ni[Equation 1]

where:Y_i is the complex value of an input signal at frequency i,H_i is the complex value of the channel at frequency i,X_i is the complex value of the transmitted modulation symbol i, and N_i is the complex gaussian noise sample.

The goal of channel estimation is to estimate H1for every data cell on a time-frequency grid. In an DAB symbol stream in which differentially encoded quadrature phase shift keying (DEQPSK) OFDM symbols are communicated, there are no pilot or other reference signals at known locations that can be used for determining channel estimations. As such, channel estimates may be performed according to a blind channel estimation technique where the fact that an incoming symbol can present one of four possible values (namely one of four 2-bit combinations) can be leveraged.

Referring now toFIG.1A, shown is a graphical illustration of a plurality of frequency carriers for multiple OFDM symbols having DEQPSK modulation. More specifically as shown inFIG.1A, graphical illustration10includes multiple OFDM symbols (e.g., X OFDM symbols)150-15X. After conversion from the time domain to the frequency domain, each OFDM symbol15is represented by a plurality of OFDM frequency carriers (e.g., N frequency carriers) such that each OFDM symbol15is represented by a plurality of frequency carriers150, 0-150, n. Note that the four constellation points of each succeeding OFDM symbol15are phase shifted from its predecessor by 45°. In a DEPSK modulation scheme, information is encoded in the change of phase of every frequency carrier15. In a DAB system implementation, a communication frame may include 76 OFDM symbols, where each OFDM symbol is transformed, e.g., in a fast Fourier transform (FFT) engine, into 2048 frequency bins, with 1536 frequency bins carrying data.

Referring now toFIG.1B, shown is a graphical illustration of a received signal via a channel. As shown inFIG.1B, an OFDM symbol20, after conversion to the frequency domain, includes a plurality of frequency carriers200-20n. Given a channel having some level of impairment, frequency carriers20have different magnitudes and phases.

Referring now toFIG.2, shown is a block diagram of a receiver in accordance with an embodiment. As shown inFIG.2, receiver200may include a signal processing path having various components. Embodiments can be incorporated in different types of receiver systems. In some embodiments, receiver200may be a single-die integrated circuit such as a CMOS die having mixed signal circuitry including both analog and digital circuitry.

With reference to receiver200, an incoming RF signal that includes digital radio signals according to a given digital broadcast specification may be received over the air via an antenna205. As used herein, the terms “digital radio” or “digital radio broadcast signal” are used interchangeably and are intended to correspond to broadcast radio communication that occurs digitally. Such communications may be in accordance with various standards such as a DAB or other standard.

As shown inFIG.2, an incoming RF signal received via antenna205is provided to a low noise amplifier (LNA)210, which amplifies the RF signal. In turn, LNA210is coupled to a filter215, which may perform filtering of the received RF signal. Understand while shown with two RF front end blocks, a receiver may include additional RF front end circuitry in other examples. In turn, the filtered RF signal is provided to a mixer220, which in an embodiment may be implemented as a complex mixer. In embodiments herein mixer220may downconvert the RF signal to a lower frequency signal using a mixing signal received from a clock generator225. In an embodiment, clock generator225may be implemented as a local oscillator, phase lock loop or other such clock generation circuit. In a particular embodiment, this lower frequency signal may be, e.g., a low-intermediate frequency (IF) or zero-IF signal. This downconverted signal is an in-phase/quadrature phase (IQ) signal.

The resulting downconverted signal is provided to an analog-to-digital converter (ADC)230, where the signal can be digitized into a digital signal. Note that in some embodiments, either before or after digitization, channelization may be performed to generate a channelized signal. In an OFDM system, a plurality of samples forms an OFDM symbol of an incoming data stream.

In turn, samples are provided to a buffer240, which may be implemented as a first in first out (FIFO). The incoming samples are stored in buffer240, and are then output to a main digital signal processing path including a fast Fourier transform (FFT) engine260, which generates frequency domain OFDM symbols from incoming time domain OFDM symbols. In one embodiment, each incoming time domain OFDM symbol can be processed by FFT engine260into a plurality of frequency carriers. Note that the number of frequency carriers corresponding to a given OFDM symbol may vary depending upon a particular radio standard, bandwidth of the signal and time duration of the OFDM symbol (without cyclic prefix).

As further shown inFIG.2, frequency carriers generated in FFT engine260are provided to a differential detector270. In embodiments herein, differential detector270may be a dedicated hardware circuit or a microcontroller or other control logic to execute instructions stored in a non-transitory storage medium such as firmware and/or software instructions. Differential detector270may be implemented as a coherent differential equalizer to perform channel estimations and use the channel estimate information to generate soft decisions, e.g., in the form of log likelihood ratio (LLR) values, as described herein. Of course, differential detector270could be implemented in different ways in other embodiments.

In embodiments herein, differential detector275may generate LLR values for each pair of frequency carriers of the OFDM symbol. In turn, these LLR values may be provided to a channel decoder280. In an embodiment, channel decoder280may be implemented as a Viterbi decoder to decode encoded message information based at least in part on the LLR values. Channel decoder also may be used to perform error correction and information bit extraction. The resulting demodulated signal may be provided to an audio processor290for audio processing. The encoded audio signal is then provided to an audio source decoder (not shown for ease of illustration inFIG.2) to generate source audio. Although shown as individual components, understand that portions of the receiver after ADC230to the end of the signal processing path ofFIG.2can be implemented in a digital signal processor (DSP).

Referring now toFIG.3, shown is a graphical illustration of a plurality of OFDM modulated frequency carriers in accordance with an embodiment. As shown inFIG.3, graphical illustration300shows a plurality of frequency carriers312(only a representative one of which is enumerated inFIG.3). As illustrated, for each time instant (on the X-axis) representing an OFDM symbol, a plurality of frequency carriers312are provided (illustrated on the y-axis)

As further shown inFIG.3, an evaluation window310is present. As will be described herein, samples within evaluation window310may be processed in determining LLR values for a given one or more of frequency carriers312within evaluation window310. As such, evaluation window310may act as a moving window to enable efficient and accurate determination of LLR values for given frequency carriers. This is so, as typically the channel changes slowly in both frequency and time. As such, it may be assumed that within an evaluation window such as evaluation window310, the channel is approximately constant.

Referring now toFIG.4A, shown is a graphical illustration of a channel estimation for a frequency carrier in accordance with an embodiment. As shown inFIG.4A, graphical illustration400presents four possible modulation points4050-4053for a frequency carrier. As further shown, a received signal Yi410also is illustrated. Note that there may be multiple, namely four, possible channel estimates per frequency carrier. with the modulation points {1,j,−1,−j}, one of the 4 channel estimates (Yi; 1j*Yi; −Yi; −1j*Yi) will fall on received signal410, because h_est=Yi/mod_point. Accordingly, referring now toFIG.4B, shown is a graphical illustration of four possible channel estimates h0-h3for a given frequency carrier.

A channel estimate can be determined solely by using information of a single carrier; however there may be excessive noise which may impact accuracy. In embodiments, information of neighboring carriers may be considered in determining channel estimates. As such, some averaging may be performed, leveraging information from one or more neighbor carriers to a given carrier at issue.

To average between channel estimates in accordance with an embodiment, any one of the four channel estimates for a carrier under analysis may be selected. Thus with reference back toFIG.4B, assume that channel estimate h0is selected. Next, channel estimates from one or more neighboring carriers can be selected as well. Referring toFIGS.4C and4D, channel estimates for neighboring carriers are shown, with relation to the selected channel estimate h0for a carrier under analysis. Thus as shown inFIG.4C, from four channel estimates h0′-h3′ for a first neighboring carrier, channel estimate h0′ is selected since it is closest to h0. And in turn with regard toFIG.4D, from four channel estimates h0″-h3″ for a second neighboring carrier, channel estimate h0″ is selected since it is closest to h0.

Thus with these selected channel estimates of three neighboring carriers, a channel estimation may be performed, e.g., according to a simple average, as shown in Equation 2.
hest=(h0+h0′+h0″)/3  [Equation 2]

Note that while Equation 2 may be used to perform a simple average for determining a channel estimate, in other cases a weighted average may be used; however, a performance impact of such weighted average calculation may be negligible such that the simpler average calculation instead may be used, in an embodiment. Note that these 3 channel estimates are for illustration purpose; in embodiments, N×M channel estimates can be used for averaging using a moving window, where N is how many carriers' channel estimates are used from the current OFDM symbol (frequency axis) and M is how many carriers' channel estimates are used from other OFDM symbols (time axis), where N and M are configurable.

Note that any one of the channel estimates for a carrier under analysis may be selected. This is so, as each of the other channel estimates have a known relation to h0, as shown in Equations 3-5.
hest(1)=hest(0)*exp(1jpi/2)  [Equation 3]
hest(2)=−hest(0)  [Equation 4]
hest(3)=hest(0)*exp(−1jpi/2)  [Equation 5]

Note that using any of hest(0), hest(1), hest(2) and hest(3) in the LLR calculation will give identical results due to the symmetric nature of the modulation points. Various LLR calculations may be performed based at least in part on this channel estimate determined using a selected channel estimate of multiple neighboring carriers. To illustrate these LLR calculations, consider modulation points that are generated as a result of encoding in a transmitter.

Referring now toFIGS.5A and5B, shown are graphical illustrations of possible modulation points for a received frequency carrier. As shown inFIGS.5A and5Btwo neighboring carriers, namely a first frequency carrier at symbol k−1 inFIG.5Aand a succeeding carrier at symbol k inFIG.5B, each may have four possible modulation points5050-5053and5150-5153, respectively. In addition, as shown each illustration also includes a received signal,510and520, respectively. With this arrangement, Equations 6 and 7 illustrate representative LLR calculations for each respective bit (of a 2-bit value).

LLR⁡(0)=maxa∈(bit⁡(0)=1)Re⁢{Ck-1*h*(xk⁢a*+xk-1)}-maxa∈(bit⁡(0)=0)Re⁢{Ck-1*(h*(xk⁢a*+xk-1)}[Equation⁢6]LLR⁡(1)=maxa∈(bit⁡(1)=1)Re⁢{Ck-1*h*(xk⁢a*+xk-1)}-maxa∈(bit⁡(1)=0)Re⁢{Ck-1*(h*(xk⁢a*+xk-1)}[Equation⁢7]

According to these Equations, the LLR represents a measure of the likelihood that a given bit of a symbol is a logic 0 or logic 1 value. In Equations 6 and 7, the following values are used:Ck-1—modulation point after encoder (4 options)h—channel estimationxk—received signala—information phase change, a={exp(jpi/4), exp(3jpi/4), exp(5jpi/4), exp(7jpi/4)}

In the above Equations, half of the ‘a’ values correspond to bit=0 and the other half correspond to bit=1. These halves are different for LLR(0) and LLR(1). Also note that in DAB, differential encoding is applied across the time dimension, but embodiments are also applicable in the case when differential encoding is applied across the frequency dimension. With Equations 6 and 7 above, to check all possible modulation point values for corresponding frequency carriers of two symbols, 8 calculations may be performed for each of the possible phase changes. However, in certain hardware implementations, various optimizations can be performed to reduce these number of calculations as information phase change may only take on two of the four possible values.

While the above Equations 6 and 7 may be used to identify LLR values for two bits of a modulation point using information from a single neighboring sample (i.e., for a common frequency carrier of two adjacent symbols), embodiments may more accurately determine LLR values using information obtained from multiple frequency carriers of a plurality of symbols within an evaluation window.

To this end, embodiments may leverage information from one or more neighboring symbols to a symbol under analysis and further may leverage information of neighboring frequency carriers of both the symbol of interest and one or more neighboring symbols.

Referring now toFIG.6, shown is a graphical illustration of an evaluation window in accordance with an embodiment. As shown inFIG.6, a graphical illustration600includes a plurality of frequency carriers (representative carriers of two adjacent OFDM symbols k−1 and k are enumerated). As further shown, an evaluation window610includes a plurality of frequency carriers of these two symbols. In addition, channel estimates h1-h6, each associated with a given one of the frequency carriers, are illustrated. In embodiments herein, channel estimation information from these 6 frequency carriers may be used in determining LLR values for a given phase change between 2 carriers (here a carrier associated with channel estimate h1). Understand while inFIG.6, evaluation window610is illustrated that includes carriers of two adjacent symbols, and is further formed of three adjacent frequency carriers in each of these symbols, embodiments are not limited in this regard and larger or smaller evaluation windows may be used in other embodiments. In some embodiments, a control circuit of a receiver may dynamically configure the size of the evaluation window based on operating conditions, modulation scheme or so forth.

Techniques to efficiently determine LLR values in accordance with embodiments may be performed in various locations. For example, some implementations may determine these values in general-purpose processing circuitry such as a DSP or other programmable controller, microcontroller or so forth that executes instructions stored in a non-transitory storage medium such as firmware and/or software instructions. Instead in other embodiments, dedicated hardware circuitry may be provided to determine LLR values.

Referring now toFIG.7, shown is a block diagram of a coherent differential equalization circuit in accordance with an embodiment. In an embodiment, coherent differential equalization circuit700may be implemented as a differential detector such as differential detector270ofFIG.2. As shown inFIG.7, coherent differential equalization circuit700itself may include multiple hardware blocks. Incoming frequency carriers (X) may be received in a channel estimation circuit710. In embodiments, channel estimation circuit710may determine one or more channel estimates for each incoming carrier. In a particular embodiment, there may be N×M channel estimates determined, with N and M configurable as discussed above. In turn, these N×M channel estimates are provided to a channel estimation smoother720. In various embodiments, channel estimation smoother720may include buffering circuitry that may be configured to determine a channel estimate for a given frequency carrier that is an average of channel estimations for multiple frequency carriers including neighboring carriers to a given frequency carrier of interest. For example, channel estimation smoother720may be configured to generate a channel estimate in accordance with Equation 2 above.

Still with reference toFIG.7, in turn this channel estimate (hm) is provided to a LLR metric calculator730. In embodiments herein, LLR metric calculator730may generate LLR metrics with respect to a pair of frequency carriers of interest (differential) using information from that frequency carrier and additional frequency carriers in an evaluation window with the carrier of interest. To this end, LLR metric calculator730may determine multiple metrics for a given pair of frequency carriers of interest (differential) using Equations 8-11. Note that the calculated LLR metrics may be stored in a buffer735included in LLR metric calculator730or coupled thereto.

In an embodiment these LLR metrics are as follows:

LLR⁡(b⁢0,m,1)=maxa∈(bit⁡(0)=1)Re⁢{Ck-1*h*(xk⁢a*+xk-1)}[Equation⁢8]LLR⁢(b⁢0,m,0)=maxa∈(bit⁡(0)=0)Re⁢{Ck-1*h*(xk⁢a*+xk-1)}[Equation⁢9]LLR⁡(b⁢1,m,1)=maxa∈(bit⁡(1)=1)Re⁢{Ck-1*h*(xk⁢a*+xk-1)}[Equation⁢10]LLR⁡(b⁢1,m,1)=maxa∈(bit⁡(1)=0)Re⁢{Ck-1*h*(xk⁢a*+xk-1)}[Equation⁢11]

These metrics rely on the same variables described above as to Equations 6 and 7, and may be determined to obtain a likelihood that a given bit of each of m frequency carriers is either a logic 0 or logic 1.

Referring still toFIG.7, these LLR metrics may be provided in turn to an LLR determination circuit740. In embodiments herein, LLR determination circuit740may determine an LLR value for each of multiple bits of a pair of frequency carriers, e.g., using Equations 12-13 below. As such, LLR determination circuit740outputs these LLR values. In an embodiment, the LLR values correspond to a probability that each of the 2 bits (b0-b1) of the carrier are a logic 0 or a logic 1. Note that these LLR values are thus soft decisions for the bits of the pair of frequency carriers and may be provided to additional circuitry of the receiver, such as a channel decoder. Understand while shown at this high level in the embodiment ofFIG.7, many variations and alternatives are possible.

LLR⁡(b⁢0)=maxm=1:6{LLR⁡(b⁢0,m,1)}-maxm=1:6{LLR⁡(b⁢0,m,0)}[Equation⁢12]LLR⁡(b⁢1)=maxm=1:6{LLR⁡(b⁢1,m,1)}-maxm=1:6{LLR⁡(b⁢1,m,0)}[Equation⁢13]

Referring now toFIG.8, shown is a flow diagram of a method in accordance with an embodiment. More specifically, method800is a method for determining channel estimates according to a blind channel estimate technique and using the resulting channel estimates to calculate LLR values. In an embodiment, method800may be performed by a hardware circuit of a receiver, such as a channel estimation circuit that in turn may be implemented within a differential detector. Understand that the channel estimation circuit itself may include or be associated with LLR calculation circuitry, such as shown in coherent differential equalization700ofFIG.7.

As shown, method800begins by calculating a channel estimation per carrier (block810). In an embodiment, a selected one of multiple possible channel estimates for a given frequency carrier may be determined. Next at block820channel estimates per carrier may be determined according to an averaging process. In an embodiment this channel estimation may be calculated using channel estimates of multiple carriers within an evaluation window as discussed above.

Still with reference toFIG.8, next at block830channel estimates may be collected for an evaluation window. Note that the collected channel estimates can be temporarily stored, e.g., in a buffer. Then at block840LLR metrics may be calculated for the evaluation window. In an embodiment, such LLR metrics may be calculated according to Equations 8-11. Next at block850an LLR for bits of a given pair of carriers can be determined. More specifically as described herein the calculated LLR metrics for the evaluation window may be used in determining the LLRs, which may occur according to Equations 12-13 above.

Still referring toFIG.8, next it is determined whether there are additional OFDM carriers for a given symbol under analysis (diamond860). If so, control passes to block810, discussed above. Otherwise the LLRs for the symbol may be buffered and provided as soft decisions to a decoder when a full decoder block is received (block870), so that channel decoding may be performed. Note that a full decoder block may formed of a given number of OFDM symbols. Understand while shown at this high level in the embodiment ofFIG.8, many variations and alternatives are possible.

For example, as discussed above in determination of LLR metrics, it is possible to perform certain optimizations to reduce compute complexity. As one example, when considering possible modulation points in, e.g., any of Equations 8-11, when a multiplication has a factor of ejπ/4kor ejπkthe multiplication can be simplified to:
(a+jb)ejπ/4k(a+jb)ejπk
(a+b+j(b−a))/sqrt(2)a+jb
(a−b+j(a+b))/sqrt(2) −a−jb
(−a−b+j(a−b))/sqrt(2)b+ja
(b−a−j(a−b))/sqrt(2) −b+ja

Determining each of the four different Ck-1can be performed as follows:
max{Re{Ck-1*hm*(xka*+xk-1)}}=max{Re{Ck-1(0)*X},Re{Ck-1(1)*X},Re{Ck-1(2)*X},Re{Ck-1(3)*X}}

As another optimization, since these modulation points are 90 degrees from each other, the determination may be implemented as below.
MAX(ABS(real(X),ABS(imag(X));
MAX(real(X)−imag(X),real(X)+imag(X))/sqrt(2);

Embodiments may be implemented in many different types of end node devices. Referring now toFIG.9, shown is a block diagram of a representative device900which may be a given wireless device. In the embodiment shown inFIG.9, device900may be a standalone radio, or a radio incorporated into another device such as a sensor, actuator, controller or other device that can be used in a variety of use cases in a wireless control network, including sensing, metering, monitoring, embedded applications, communications applications and so forth.

In the embodiment shown, device900includes a memory system910which in an embodiment may include a non-volatile memory such as a flash memory and volatile storage, such as RAM. In an embodiment, this non-volatile memory may be implemented as a non-transitory storage medium that can store instructions and data, including code for performing methods including the method ofFIG.8. Memory system910couples via a bus950to a digital core920, which may include one or more cores and/or microcontrollers that act as a main processing unit of the device. As further shown, digital core920may couple to clock generators930which may provide one or more phase locked loops or other clock generation circuitry to generate various clocks for use by circuitry of the device. As further illustrated, device900further includes power circuitry970, which may include one or more voltage regulators.

Additional circuitry may optionally be present depending on particular implementation to provide various functionality and interaction with external devices. Such circuitry may include interface circuitry960which may provide interface with various off-chip devices, sensor circuitry940which may include various on-chip sensors including digital and analog sensors to sense desired signals, such as speech inputs, image inputs, environmental inputs or so forth.

In addition as shown inFIG.9, transceiver circuitry980may be provided to enable transmission and receipt of wireless signals, e.g., according to one or more digital radio communication standards such as DAB, DRM or HD™ radio, local area wireless communication schemes, such as a given IEEE 802.11 scheme, wide area wireless communication scheme such as LTE or 9G, among others. And as shown transceiver circuitry980includes a coherent differential equalizer circuit985, which may perform channel estimations and use the channel estimate information to generate soft decisions, as described herein. Understand while shown with this high level view, many variations and alternatives are possible.

While the present invention has been described with respect to a limited number of embodiments, those skilled in the art will appreciate numerous modifications and variations therefrom. It is intended that the appended claims cover all such modifications and variations as fall within the true spirit and scope of this present invention.