Patent ID: 12255085

DETAILED DESCRIPTION

Common reference numerals are used throughout the drawings and the detailed description to indicate the same or similar components. Embodiments of the present disclosure will be readily understood from the following detailed description taken in conjunction with the accompanying drawings.

Spatial descriptions, such as “on,” “above,” “below,” “up,” “left,” “right,” “down,” “top,” “bottom,” “vertical,” “horizontal,” “side,” “higher,” “lower,” “upper,” “over,” “under,” and so forth, are specified with respect to a certain component or group of components, or a certain plane of a component or group of components, for the orientation of the component(s) as shown in the associated figure. It should be understood that the spatial descriptions used herein are for purposes of illustration only, and that practical implementations of the structures described herein can be spatially arranged in any orientation or manner, provided that the merits of embodiments of this disclosure are not deviated from by such arrangement.

Further, it is noted that the actual shapes of the various structures depicted as approximately rectangular may, in actual device, be curved, have rounded edges, have somewhat uneven thicknesses, etc. due to device fabrication conditions. The straight lines and right angles are used solely for convenience of representation of layers and features.

In the following description, semiconductor circuits/devices/dies/packages, methods for manufacturing the same, and the likes are set forth as preferred examples. It will be apparent to those skilled in the art that modifications, including additions and/or substitutions may be made without departing from the scope and spirit of the present disclosure. Specific details may be omitted so as not to obscure the present disclosure; however, the disclosure is written to enable one skilled in the art to practice the teachings herein without undue experimentation.

FIG.1andFIG.2are top views of a wafer holder according to some embodiment of the present disclosure. The wafer holder1has a carrier plate10and a plurality of blocking devices11.

The blocking devices11and the carrier plate10are combined, and the blocking devices11are able to move on the carrier plate10. To be specific, the carrier plate10has a base100and a guiding structure101, and the guiding structure101surrounds the base100. In this embodiment, the base100has a carrier surface1000. The blocking devices11are coupled to the carrier plate10through the guiding structure101, and the blocking devices11are able to move along the border or edge of the base100. In other words, the guiding structure101form a track surrounding the carrier surface1000of the base100, and the blocking devices11are able to move along the track.

For example, the carrier surface1000of this embodiment is circular, and the guiding structure101is circular as well and formed a ring-like structure that surrounds the base100. In other words, the carrier surface1000is rounded, and the guiding structure101encircles the carrier surface1000.

The blocking devices11are configured to move along the guiding structure101, and each of the blocking devices11has a curved wall110. The curved walls110at least partially surround an area above the carrier surface1000. To be specific, the curved walls110at least partially surround a right circular cylinder area above the carrier surface1000, and the blocking devices11does not intersect or overlap the right circular cylinder area. Therefore, the area above the carrier surface1000is adapted to load and unload one or more wafer.

Moreover,FIG.1is the top view while the blocking devices11are located at the first position, andFIG.2is the top view while the blocking devices11are located at the second position. In this embodiment, the operating method of the wafer holder1includes: moving the blocking devices11to the first position (FIG.1); disposing at least one wafer on the carrier surface1000of the base100; and moving the blocking devices11to the second position (FIG.2).

While the blocking devices11are located at the first location, the curved walls110of the blocking devices11cover half of the periphery of the carrier surface1000, and the wafer holder1provide a large opening to load or unload one or more wafers from the carrier surface1000. In some embodiment of the present disclosure, the curved walls110of the blocking devices11may cover one third or a quarter of the periphery of the carrier surface1000while the blocking devices11are located at the first location.

Referring toFIG.2, while the blocking devices11are located at the second location, the blocking devices11surround the wafers and hold the wafer in the wafer holder1. While facing the carrier surface1000, the blocking devices11are located at the 12, 3, 6, and 9 o'clock positions respectively, and the wafers will be hold by the blocking devices11. In other words, the curved walls110of the blocking devices11cover top, bottom, right, and left sides of the carrier surface1000while locating at the second positions, and the wafer on the carrier surface1000may be protected by the blocking devices11at these sides.

Therefore, the wafer holder1can provide an install mode (FIG.1) and a holding mode (FIG.2), and the install mode can provide an easy way to input or remove the wafer from the carrier surface1000without scratching or impacting any part of the wafer holder1, and the holding mode can hold the wafers in the wafer holder1firmly, and the sideways movement of the wafer is limited in the holding mode.

For example, while in the install mode, the blocking devices11are located at the first position, and the curved walls110are configured to cover half of the periphery of the carrier surface1000. While in the holding mode, the blocking device11are located at the second position, and the curved walls are configured to maintain a wafer on the carrier surface1000. Therefore, the wafer holder1can provide a safe and easy wafer loading process and unloading process, and the wafer holder1can provide a safe packaging during shipping.

In this embodiment, the carrier plate10of the wafer holder1has a base102. The base102surrounds the guiding structure101and the base100. The shape of the base102of this embodiment is a square, and the blocking devices11are adjacent to the sides of the square while the blocking devices11are located at the second position. Therefore, the base102provide large areas near the corners, and a plurality of connecting structures can be formed thereon, and the connecting structures are configured to connect a cover.

FIG.3is a sectional view according to the cutting plane line I inFIG.2. In this embodiment, the wafer holder1includes a bottom elastic layer12, and the bottom elastic layer12is disposed on the carrier surface1000. The bottom elastic layer12on the carrier surface1000can carry the wafers and provide proper support to the wafers, and the wafers couldn't be scratched by the carrier surface1000of the base100. For example, the bottom elastic layer12may include sponge, which is elastic and compressible and being able to protect the wafers.

The wafer holder1also includes side elastic layers13. Each of the side elastic layers13is disposed on a surface1101of one of the curved walls110, and the surface1101is facing towards the carrier surface1000.

To be specific, the surface1101of every curved wall110and the carrier surface1000are perpendicular, and the surfaces1101surround the area above the carrier surface1000. While one of more wafers are disposed on the carrier surface1000, the side elastic layers13on the surfaces1101may surround the wafers and provide protection.

In the operating method of this embodiment, the step of disposing the wafer on the carrier surface1000of the base100includes: disposing the wafer on the bottom elastic layer12; and moving the wafer until the wafer touches side elastic layers13on the curved walls110. While the blocking devices11are located at the first location, the side elastic layers13can touch and protect the edges of the wafers.

While the blocking devices11are located at the second location, the blocking devices11can maintain the wafer on the carrier surface1000. Moreover, the side elastic layers13on the curved walls110of the blocking device11can touch and hold the wafer without scratching.

In one aspect, the wafer holder1of this embodiment includes the carrier plate10and the side elastic layers13, and the carrier plate10includes the bottom elastic layer12and the guiding structure101surrounded the bottom elastic layer12.

The side elastic layers13are coupled to the carrier plate10through the guiding structure101, and the side elastic layers13occupy an area above the bottom elastic layer12, and the side elastic layers13are configured to move along the guiding structure101.

The bottom elastic layer12can carry one or more wafers, and the side elastic layers13can protect the wafers sideways. To be specific, the bottom elastic layer12and the side elastic layers13are adapted to touch and hold the wafers, and therefore the wafers on the bottom elastic layer12cannot move sideways.

For example, the bottom elastic layer12and the side elastic layer13may serve as a cushion layer, a buffer layer, or a shock reducing layer, and the bottom elastic layer12and the side elastic layers13may both include sponge, and the bottom elastic layer12and the side elastic layers13are compressible. The side elastic layers13are configured to touch and affix the wafers on the bottom elastic layer12. In some embodiments of the present invention, the bottom elastic layer12and the side elastic layer13may also include sponge, polyurethane (PU), expanded polyethylene (EPE), Tyvek paper, the combination thereof, or other resilient materials. Also, the bottom elastic layer12and the side elastic layers13are replaceable, and new elastic layers12,13can be install before any wafer storage and shipment.

In one aspect, the carrier surface1000of the base100is rounded, and the wafers may be disposed on the carrier surface1000. For example, the diameter of the carrier surface1000falls within a range from 204 mm to 205 mm, and the carrier surface1000is adapted to carry one or multiple 8 inches nitride-based semiconductor wafers. The guiding structure101encircles the carrier surface1000, and the blocking devices11and the side elastic layers13may move along the border of the area above the carrier surface1000, where the wafers are disposed.

Moreover, the cylinder area over the carrier surface1000is adapted to accommodate wafers, and the blocking devices11are located outside and around the cylinder area, and at least part of every side elastic layer13is inside the cylinder area while no wafer is loaded. Therefore, the side elastic layers13and the wafers can be interference fit or friction fit after the wafers are loaded.

For example, the thickness d of the part of the side elastic layer13overlapping the bottom elastic layer12is in the range from 3 mm to 5 mm, and, therefore, the side elastic layer13can hold the wafer properly.

In some embodiment, the blocking devices11are located outside the cylinder area above the carrier surface1000, and the edges or the surface1101of the blocking devices11coincide with the edge of the carrier surface1000, and the side elastic layers13are located in the cylinder area above the carrier surface1000. Therefore, the blocking devices11can adjust the position of the side elastic layers13in the cylinder area, so the side elastic layers13and the wafers can be interference fit.

In one aspect, each of the blocking device11has a knob111, and the knob111and the side elastic layer13are disposed on the opposite sides of every curved wall110. Each of the knobs111is disposed on back of one of the side elastic layers13. Every side elastic layer13is disposed on the surface1101of the curved wall110that is facing towards the area above the carrier surface1000of the base100, and every knob111is disposed on the other surface1102of the curved wall110that is facing backward towards the area above the carrier surface1000of the base100.

In this embodiment, the side elastic layers13can touch, press and hold the wafers, and the knobs111are adapted to adjust the positions of the side elastic layers13on the blocking devices11. In other words, users can move the blocking devices11through the knobs111, and the positions of the blocking devices11can be adjusted easily.

In one aspect, the bottom elastic layer12touches the side elastic layers13, and the elastic layers12,13can provide more protection while carrying the wafers. To be specific, the bottom part of every side elastic layer13touches the periphery of the bottom elastic layer12, and the side elastic layers13and the bottom elastic layer12provide elastic surfaces that is connected continuously, which provide a proper protection to the loaded wafers.

Moreover, the curved walls110of this embodiment is completely covered by the side elastic layers13respectively. Therefore, the side elastic layers13can fully protect and hold the wafers on the bottom elastic layer12.

In this embodiment, the guiding structure101has an accommodation space1010. The accommodation space1010is located in the carrier plate10, and the accommodation space1010is located below the carrier surface1000and a top surface1020at the periphery of the carrier plate10.

Each of the blocking devices11has a guiding base112. The curved wall110is connected to the guiding base112, and the guiding base112is installed in the accommodation space1010. The shape of the sectional view of the accommodation space1010is similar to the shape of the sectional view of the guiding base112, while the sectional view of the guiding base112is smaller than the sectional view of the accommodation space1010. Therefore, the guiding base112can move along the accommodation space1010.

FIG.4is a perspective view of a blocking device11according to some embodiment of the present disclosure. The guiding base112is fan-shaped, and the accommodation space1010also form a ring in the carrier plate10. The guiding base112are accommodated in the accommodation space1010, and the accommodation space1010form a circular track in the carrier plate10.

The curved wall110is disposed on the guiding base112perpendicularly. The guiding structure101has an opening1011, and the opening1011is formed between the top surface1020and the carrier surface1000. The opening1011is formed on the top of the accommodation space1010, and the curved wall110can pass through the opening1011. The curved wall110is located above the carrier plate10, and the guiding base112is located in the carrier plate10, and the curved wall110and the guiding base112are connected, and the connected part pass through the opening1011of the guiding structure101.

In one aspect, the guiding structure101has a plurality of fastening structures1012. The fastening structures1012are located on the top of the accommodation space1010, and the fastening structure1012and the opening1011are adjacent. In other words, the fastening structures1012are formed on the top surface1020of the base102.

Each of the guiding bases112has a fastening structure1120, and each of the fastening structures1012is configured to fasten one of the fastening structures1120, and the position of the blocking devices11can be fixed through the fastening structures1012,1120. In this embodiment, the fastening structures1012,1120are openings that can be overlapped by moving the blocking devices11, and the fastening structures1012,1120can be fastened through a fastener14. In some embodiment of the present disclosure, the fastening structures1012,1120can include magnet or snap fasteners, the present disclosure is not limited thereto.

In this embodiment, the wafer holder1includes the fasteners14. The fastening structures1012are openings, and the fastening structures1120are openings, and the fasteners14are configured to insert into the fastening structures1012,1120. While the blocking devices11are at the second position, the fasteners14are able to hold the position between the blocking devices11and the carrier plate10, and the wafer holder1can provide a safe package for wafers.

The wafer holder1of this embodiment further includes indicators16and indicators15. The indicators16are disposed on the blocking devices11, and the indicators15are disposed on the carrier plate10. The indicators16are configured to align with the indicators15.

In this embodiment, the indicators15are arrows pointing a plurality of positions on the guiding structure101, and the indicators16are arrows being disposed on the back of the curved walls110of the blocking devices11. By aligning the indicators15,16, users can move the blocking devices11to the second position, so that the fasteners14can fasten the fastening structures1012,1120.

FIG.5is a top view of a blocking device21according to some embodiments of the present disclosure. The wafer holder of this embodiment has four blocking devices21, and two of the blocking devices21have semicircle openings2121. Each of the semicircle openings2121is located on an edge of the guiding base212.

To be specific, a side elastic layer23is disposed on the curved wall210, and the curved wall210is disposed on the guiding base212, and the guiding base212and the curved wall210occupy the same circular angle. The straight edges of the curved wall210coincide with the straight edges of the guiding base212.

The semicircle opening2121can be aligned with part of the fastening structure of the guiding structure as shown inFIG.1, and the blocking devices21can be fix at the first position through fasteners14(as shown inFIG.3). In other words, the fastener14can pass through the fastening structure2120or the semicircle opening2121, and the fastening structure2120can be fastened while the blocking device is at the second location, and the semicircle opening2121can be fastened while the blocking device is at the first location.

FIG.6is a top view of a blocking device31according to some embodiments of the present disclosure. In this embodiment, a plurality of side elastic layers33are disposed on a curved wall310, and the curved wall310is disposed on the guiding base312. In this embodiment, the side elastic layers33are separated, and gaps g are form among the side elastic layers33.

In this embodiment, the touch area between the wafers and the side elastic layers33is reduced, and scratching can be further prevented. Also, in this embodiment, the side elastic layers33form into elastic strips. In some embodiment of the present disclosure, the side elastic layers33may form into small bumps.

FIG.7is a top view of a wafer holder4according to some embodiment of the present disclosure. In this embodiment, every guiding base of the blocking devices41has a plurality of fastening structure, and the guiding structure401of the carrier plate40has a plurality of fastening structures4012in every position. Therefore, the wafer holder4can provide a better protection with side elastic layers43and a bottom elastic layer42while every blocking device41is fastened by multiple fasteners.

The embodiments were chosen and described in order to best explain the principles of the disclosure and its practical application, thereby enabling others skilled in the art to understand the disclosure for various embodiments and with various modifications that are suited to the particular use contemplated.

As used herein and not otherwise defined, the terms “substantially,” “substantial,” “approximately” and “about” are used to describe and account for small variations. When used in conjunction with an event or circumstance, the terms can encompass instances in which the event or circumstance occurs precisely as well as instances in which the event or circumstance occurs to a close approximation. For example, when used in conjunction with a numerical value, the terms can encompass a range of variation of less than or equal to ±10% of that numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. The term “substantially coplanar” can refer to two surfaces within micrometers of lying along a same plane, such as within 40 μm, within 30 μm, within 20 μm, within 10 μm, or within 1 μm of lying along the same plane.

As used herein, the singular terms “a,” “an,” and “the” may include plural referents unless the context clearly dictates otherwise. In the description of some embodiments, a component provided “on” or “over” another component can encompass cases where the former component is directly on (e.g., in physical contact with) the latter component, as well as cases where one or more intervening components are located between the former component and the latter component.

While the present disclosure has been described and illustrated with reference to specific embodiments thereof, these descriptions and illustrations are not limiting. It should be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the true spirit and scope of the present disclosure as defined by the appended claims. The illustrations may not necessarily be drawn to scale. There may be distinctions between the artistic renditions in the present disclosure and the actual apparatus due to manufacturing processes and tolerances. Further, it is understood that actual devices and layers may deviate from the rectangular layer depictions of the FIGS. and may include angles surfaces or edges, rounded corners, etc. due to manufacturing processes such as conformal deposition, etching, etc. There may be other embodiments of the present disclosure which are not specifically illustrated. The specification and the drawings are to be regarded as illustrative rather than restrictive. Modifications may be made to adapt a particular situation, material, composition of matter, method, or process to the objective, spirit and scope of the present disclosure. All such modifications are intended to be within the scope of the claims appended hereto. While the methods disclosed herein have been described with reference to particular operations performed in a particular order, it will be understood that these operations may be combined, sub-divided, or re-ordered to form an equivalent method without departing from the teachings of the present disclosure. Accordingly, unless specifically indicated herein, the order and grouping of the operations are not limitations.