Patent ID: 12189063

DESCRIPTION OF EMBODIMENTS

(Underlying Knowledge Forming Basis of One Aspect of Present Disclosure)

In order to perform distance measurement accurately, a distance-measuring imaging device that performs distance measurement using a flight time for which light makes a round trip to a subject needs to determine light emission timings and exposure timings accurately.

Generally, a light emission timing or exposure timing varies due to a change in the surrounding environment (e.g., temperature) of a distance-measuring imaging device, a long-term degradation of the distance-measuring imaging device, etc.

For this reason, in order to perform distance measurement accurately, it is necessary to reduce a variation in light emission timing or exposure timing.

Patent Literature (PTL) 1 discloses a technique for reducing a variation in light emission timing or exposure timing using a digital circuit. However, since the technique disclosed by PTL 1 reduces the variation in light emission timing or exposure timing using the digital circuit, the technique can make the reduction using only a discrete value. Accordingly, a conventional distance-measuring imaging device using the technique disclosed by PTL 1 has certain limitations to accurate distance measurement.

In view of the above problem, the inventors have enthusiastically conducted examinations and experiments. As a result, the inventors have gained a new insight that distance measurement can be performed accurately by reducing a variation in light emission timing or exposure timing continuously using an analog feedback of a delay-locked loop (DLL) circuit.

The inventors have arrived at a distance-measuring imaging device according to one aspect of the present disclosure, based on the above-described new insight.

A distance-measuring imaging device according to one aspect of the present disclosure includes: a timing controller that outputs one or more timing signals; a light receiver that receives reflected light that is light emitted by a light source and reflected by a subject; a phase adjustment circuit that outputs at least one signal out of a light emission control signal and an exposure control signal, based on the one or more timing signals, the light emission control signal being used for causing the light source to emit light to the subject, the exposure control signal being used for causing the light receiver to start exposure. The phase adjustment circuit includes one or more delay-locked loop (DLL) circuits each of which determines, for at least one of the one or more timing signals, at least one of a phase of a rising edge or a phase of a falling edge of the at least one signal.

The distance-measuring imaging device thus configured can reduce a variation in light emission timing or exposure timing continuously using one or more analog feedbacks of the one or more DLL circuits. Accordingly, the distance-measuring imaging device thus configured can perform distance measurement accurately.

Moreover, the one or more DLL circuits may comprise a first DLL circuit that determines the phase of the rising edge of the at least one signal; and a second DLL circuit that determines the phase of the falling edge of the at least one signal, and the phase adjustment circuit may further include a first edge synthesis circuit that synthesizes the rising edge the phase of which has been determined by the first DLL circuit and the falling edge the phase of which has been determined by the second DLL circuit, to output the at least one signal.

Furthermore, the first DLL circuit may determine a phase of a rising edge of the light emission control signal, the second DLL circuit may determine a phase of a falling edge of the light emission control signal, the one or more DLL circuits may further comprise a third DLL circuit that determines a phase of a rising edge of the exposure control signal, and a fourth DLL circuit that determines a phase of a falling edge of the exposure control signal, the one or more timing signals may comprise a first timing signal, a second timing signal, a third timing signal, and a fourth timing signal, the phase adjustment circuit may further include: a first edge detection circuit that separates a first feedback signal outputted from a light source driver that drives the light source, into (i) a first edge detection signal synchronized with a rising edge of the first feedback signal and (ii) a second edge detection signal synchronized with a falling edge of the first feedback signal; and a second edge detection circuit that separates a second feedback signal outputted from an exposure driver that drives the light receiver, into (i) a third edge detection signal synchronized with a rising edge of the second feedback signal and (ii) a fourth edge detection signal synchronized with a falling edge of the second feedback signal, the first DLL circuit may compare the first timing signal and the first edge detection signal to determine the phase of the rising edge of the light emission control signal, the second DLL circuit may compare the second timing signal and the second edge detection signal to determine the phase of the falling edge of the light emission control signal, the third DLL circuit may compare the third timing signal and the third edge detection signal to determine the phase of the rising edge of the exposure control signal, the fourth DLL circuit may compare the fourth timing signal and the fourth edge detection signal to determine the phase of the falling edge of the exposure control signal, the first edge synthesis circuit may output the light emission control signal, and the phase adjustment circuit may further include a second edge synthesis circuit that synthesizes the rising edge the phase of which has been determined by the third DLL circuit and the falling edge the phase of which has been determined by the fourth DLL circuit, to output the exposure control signal.

Moreover, the distance-measuring imaging device may include the light source driver and the exposure driver.

Furthermore, the first DLL circuit may determine a phase of a rising edge of the light emission control signal, the second DLL circuit may determine a phase of a falling edge of the light emission control signal, the one or more DLL circuits may further comprise a third DLL circuit that determines a phase of a rising edge of the exposure control signal, and a fourth DLL circuit that determines a phase of a falling edge of the exposure control signal, the one or more timing signals may comprise a first timing signal, a second timing signal, a third timing signal, and a fourth timing signal, the phase adjustment circuit may further include: a first edge detection circuit that separates a first feedback signal outputted from a photoelectric converter that receives light directly from the light source, into (i) a first edge detection signal synchronized with a rising edge of the first feedback signal and (ii) a second edge detection signal synchronized with a falling edge of the first feedback signal; and a second edge detection circuit that separates a second feedback signal outputted from an exposure driver that drives the light receiver, into (i) a third edge detection signal synchronized with a rising edge of the second feedback signal and (ii) a fourth edge detection signal synchronized with a falling edge of the second feedback signal, the first DLL circuit may compare the first timing signal and the first edge detection signal to determine the phase of the rising edge of the light emission control signal, the second DLL circuit may compare the second timing signal and the second edge detection signal to determine the phase of the falling edge of the light emission control signal, the third DLL circuit may compare the third timing signal and the third edge detection signal to determine the phase of the rising edge of the exposure control signal, the fourth DLL circuit may compare the fourth timing signal and the fourth edge detection signal to determine the phase of the falling edge of the exposure control signal, the first edge synthesis circuit may output the light emission control signal, and the phase adjustment circuit may further include a second edge synthesis circuit that synthesizes the rising edge the phase of which has been determined by the third DLL circuit and the falling edge the phase of which has been determined by the fourth DLL circuit, to output the exposure control signal.

Moreover, the distance-measuring imaging device may include the photoelectric converter and the exposure driver.

Furthermore, at least one of the one or more DLL circuits may include a shift register that delays at least one of the one or more timing signals, and may output the at least one signal, based on the at least one of the one or more timing signals delayed by the shift register.

Moreover, at least one of the one or more DLL circuits may include: a loop filter; a charge pump that supplies voltage to the loop filter; and a switch that switches between electrically connecting and disconnecting the loop filter and the charge pump.

Furthermore, at least one of the one or more DLL circuits may include: a variable delay element; a fixed delay element that receives a signal received by the variable delay element; and a phase comparator that compares an output of the variable delay element and an output of the fixed delay element, and outputs a predetermined signal when a phase difference between the outputs satisfies a predetermined condition.

Moreover, the timing controller, the light receiver, and the phase adjustment circuit may be included in one semiconductor chip.

Hereinafter, specific examples of a distance-measuring imaging device according to one aspect of the present disclosure will be described with reference to the drawings. Each of the embodiments mentioned below shows a specific example of the present disclosure. The values, shapes, elements, the arrangement and connection of the elements, steps, the order of the steps, etc. are mere examples, and are not intended to limit the present disclosure. Moreover, the figures are schematic diagrams and are not necessarily precise illustrations.

Embodiment 1

FIG.1is a block diagram showing an exemplary configuration of distance-measuring imaging device1according to Embodiment 1.

As shown byFIG.1, distance-measuring imaging device1includes timing controller100, phase adjustment circuit2, light source driver201, exposure driver202, light source203, and light receiver204.

Light source203emits light by being driven by light source driver201. Light source203is realized by, for example, a light-emitting diode.

Light receiver204receives reflected light that is light emitted by light source203and reflected by a subject, and outputs a signal used for measuring a distance to the subject. The following description is based on an assumption that light receiver204is a pixel array configured by arranging, in a matrix, pixels each of which outputs an electrical signal corresponding to an exposure amount.

Timing controller100outputs: first timing signal101A that specifies a timing for a rising edge of light emission control signal104used for causing light source203to emit light to the subject; second timing signal101B that specifies a timing for a falling edge of light emission control signal104; third timing signal102A that specifies a timing for a rising edge of exposure control signal106used for causing light receiver204to start exposure; and fourth timing signal102B that specifies a timing for a falling edge of exposure control signal106.

Light source driver201outputs to light source203a signal that drives light source203, based on light emission control signal104.

Exposure driver202outputs to light receiver204a signal that drives light receiver204, based on exposure control signal106.

Phase adjustment circuit2outputs light emission control signal104, based on first timing signal101A and second timing signal101B outputted by timing controller100. Moreover, phase adjustment circuit2outputs exposure control signal106, based on third timing signal102A and fourth timing signal102B.

Phase adjustment circuit2obtains, as first feedback signal103, a signal that is outputted by light source driver201and drives light source203, and feeds back obtained first feedback signal103to light emission control signal104. Moreover, phase adjustment circuit2obtains, as second feedback signal105, a signal that is outputted by exposure driver202and drives light receiver204, and feeds back obtained second feedback signal105to exposure control signal106.

Phase adjustment circuit2includes first DLL circuit5A, second DLL circuit5B, third DLL circuit8A, fourth DLL circuit8B, first edge detection circuit4, second edge detection circuit7, first edge synthesis circuit3, and second edge synthesis circuit6.

First edge detection circuit4separates first feedback signal103into first edge detection signal111A synchronized with a rising edge of first feedback signal103, and second edge detection signal111B synchronized with a falling edge of first feedback signal103.

FIG.2is a block diagram showing an exemplary configuration of first edge detection circuit4.

As shown byFIG.2, first edge detection circuit4includes an inverter, outputs inputted first feedback signal103directly as first edge detection signal111A, and outputs an inversion signal of inputted first feedback signal103as second edge detection signal111B.

Referring back toFIG.1again, the description of distance-measuring imaging device1will continue.

Second edge detection circuit7separates second feedback signal105into third edge detection signal112A synchronized with a rising edge of second feedback signal105, and fourth edge detection signal112B synchronized with a falling edge of second feedback signal105.

Second edge detection circuit7has the same configuration as, for example, first edge detection circuit4shown byFIG.2.

First DLL circuit5A compares first timing signal101A and first edge detection signal111A to determine a phase of the rising edge of light emission control signal104.

Second DLL circuit5B compares second timing signal101B and second edge detection signal111B to determine a phase of the falling edge of light emission control signal104.

Third DLL circuit8A compares third timing signal102A and third edge detection signal112A to determine a phase of the rising edge of exposure control signal106.

Fourth DLL circuit8B compares fourth timing signal102B and fourth edge detection signal112B to determine a phase of the falling edge of exposure control signal106.

First edge synthesis circuit3synthesizes the rising edge the phase of which has been determined by first DLL circuit5A and the falling edge the phase of which has been determined by second DLL circuit5B, to output light emission control signal104.

Second edge synthesis circuit6synthesizes the rising edge the phase of which has been determined by third DLL circuit8A and the falling edge the phase of which has been determined by fourth DLL circuit8B, to output exposure control signal106.

FIG.3is a block diagram showing the exemplary configuration of distance-measuring imaging device1in a more detailed manner thanFIG.1. InFIG.3, part of the elements shown byFIG.1is omitted.

As shown byFIG.3, first DLL circuit5A includes shift register22A, phase comparator23A, charge pump24A, loop filter25A, and delay adjustment circuit26A. Moreover, second DLL circuit5B includes shift register22B, phase comparator23B, charge pump24B, loop filter25B, and delay adjustment circuit26B.

Shift register22A and shift register22B are similar circuits, charge pump24A and charge pump24B are similar circuits, loop filter25A and loop filter25B are similar circuits, and delay adjustment circuit26A and delay adjustment circuit26B are similar circuits. To put it another way, first DLL circuit5A and second DLL circuit5B are similar circuits. Moreover, though not shown byFIG.3, third DLL circuit8A and fourth DLL circuit8B are circuits similar to first DLL circuit5A.

On top of first timing signal101A, second timing signal101B, third timing signal102A, and fourth timing signal102B, timing controller100further outputs: first phase reference signal107A that is a clock signal; second phase reference signal107B that is a clock signal in the same clock period as first phase reference signal107A; a third phase reference signal (not shown) that is a clock signal; and a fourth phase reference signal (not shown) that is a clock signal in the same clock period as the third phase reference signal.

Shift register22A receives first timing signal101A and first phase reference signal107A, delays first timing signal101A by the k-th time of the clock period of first phase reference signal107A, k being an integer greater than or equal to 1, and outputs first delay timing signal113A synchronized with first phase reference signal107A. Shift register22A is realized by, for example, k flip-flops (FFs) connected in series as shown byFIG.3.

Phase comparator23A compares a phase of first edge detection signal111A and a phase of first delay timing signal113A. When the phase of first edge detection signal111A lags behind the phase of first delay timing signal113A, phase comparator23A outputs to charge pump24A an up signal indicating that the phase of first edge detection signal111A lags behind the phase of first delay timing signal113A; and when the phase of first edge detection signal111A is ahead of the phase of first delay timing signal113A, phase comparator23A outputs to charge pump24A a down signal Indicating that the phase of first edge detection signal111A is ahead of the phase of first delay timing signal113A.

When phase comparator23A outputs the up signal to charge pump24A, charge pump24A increases an output voltage; and when phase comparator23A outputs the down signal to charge pump24A, charge pump24A decreases an output voltage.

Loop filter25A smoothes an output voltage outputted by charge pump24A, and supplies the output voltage to delay adjustment circuit26A.

Delay adjustment circuit26A delays first timing signal101A in accordance with a supplied voltage so that a delay time decreases with an increase in supplied voltage, and a delay time increases with a decrease in supplied voltage.

With the above configuration, first DLL circuit5A delays first timing signal101A so that first edge detection signal111A is in phase with first delay timing signal113A. To put it another way, first DLL circuit5A determines a timing for a rising edge of light emission control signal104so that first timing signal101A is in phase with first delay timing signal113A.

As stated above, first DLL circuit5A and second DLL circuit5B are similar circuits. For this reason, as is the case in first DLL circuit5A, second DLL circuit5B delays second timing signal101B so that second edge detection signal111B is in phase with second delay timing signal113B. To put it another way, second DLL circuit5B determines a timing for a rising edge of light emission control signal104so that second timing signal101B is in phase with second delay timing signal113B.

FIG.4is a timing diagram showing exemplary operations of first DLL circuit5A and second DLL circuit5B. InFIG.4, first phase reference signal107A is in first phase p1that is a 1/64 phase of a clock period, and second phase reference signal107B is in twenty-third phase p23that is a 1/64 phase of the clock period.

As shown byFIG.4, first DLL circuit5A delays first timing signal101A so that a timing for a rising edge of first feedback signal103is synchronized with a timing for a rising edge of first delay timing signal113A.

Accordingly, even when a delay time from when light source driver201receives a rising edge of light emission control signal104to when light source driver201outputs a rising edge of a signal that drives light source203varies due to a change in the surrounding environment (e.g., temperature) of distance-measuring imaging device1, a long-term degradation of distance-measuring imaging device1, etc., phase adjustment circuit2can continuously reduce, using an analog feedback of first DLL circuit5A, a variation in delay time from when timing controller100outputs first timing signal101A to when light source driver201outputs the rising edge of the signal that drives light source203.

Here, a timing for the rising edge of the signal that drives light source203corresponds to a timing at which light source203starts to emit light.

Accordingly, distance-measuring imaging device1can reduce a variation in light emission timing, especially a variation in light emission start timing, accurately.

Moreover, as shown byFIG.4, second DLL circuit5B delays second timing signal101B so that a timing for a falling edge of first feedback signal103is synchronized with a timing for a rising edge of second delay timing signal113B.

Accordingly, even when a delay time from when light source driver201receives a falling edge of light emission control signal104to when light source driver201outputs a falling edge of a signal that drives light source203varies due to a change in the surrounding environment (e.g., temperature) of distance-measuring imaging device1, a long-term degradation of distance-measuring imaging device1, etc., phase adjustment circuit2can continuously reduce, using an analog feedback of second DLL circuit5B, a variation in delay time from when timing controller100outputs second timing signal101B to when light source driver201outputs the falling edge of the signal that drives light source203.

Here, a timing for the falling edge of the signal that drives light source203corresponds to a timing at which light source203stops emitting light.

Accordingly, distance-measuring Imaging device1can reduce a variation in light emission timing, especially a variation in light emission stop timing, accurately.

Though not shown byFIG.4, as is the case in first DLL circuit5A, third DLL circuit8A delays third timing signal102A so that a timing for a rising edge of second feedback signal105is synchronized with a timing for a rising edge of the third delay timing signal.

Accordingly, even when a delay time from when exposure driver202receives a rising edge of exposure control signal106to when exposure driver202outputs a rising edge of a signal that drives light receiver204varies due to a change in the surrounding environment (e.g., temperature) of distance-measuring imaging device1, a long-term degradation of distance-measuring imaging device1, etc., phase adjustment circuit2can continuously reduce, using an analog feedback of third DLL circuit8A, a variation in delay time from when timing controller100outputs third timing signal102A to when exposure driver202outputs the rising edge of the signal that drives light receiver204.

Here, a timing for the rising edge of the signal that drives light receiver204corresponds to a timing at which light receiver204starts exposure.

Accordingly, distance-measuring imaging device1can reduce a variation in exposure timing, especially a variation in exposure start timing, accurately.

Though not shown byFIG.4, as is the case in second DLL circuit5B, fourth DLL circuit8B delays fourth timing signal102B so that a timing for a falling edge of second feedback signal105is synchronized with a timing for a rising edge of the fourth delay timing signal.

Accordingly, even when a delay time from when exposure driver202receives a falling edge of exposure control signal106to when exposure driver202outputs a falling edge of a signal that drives light receiver204varies due to a change in the surrounding environment (e.g., temperature) of distance-measuring imaging device1, a long-term degradation of distance-measuring imaging device1, etc., phase adjustment circuit2can continuously reduce, using an analog feedback of fourth DLL circuit8B, a variation in delay time from when timing controller100outputs fourth timing signal102B to when exposure driver202outputs the falling edge of the signal that drives light receiver204.

Here, a timing for the rising edge of the signal that drives light receiver204corresponds to a timing at which light receiver204stops exposure.

Accordingly, distance-measuring imaging device1can reduce a variation in exposure timing, especially a variation in exposure stop timing, accurately.

As stated above, distance-measuring imaging device1thus configured can reduce a variation in light emission timing and a variation in exposure timing accurately. Accordingly, distance-measuring imaging device1thus configured can perform distance measurement accurately.

FIG.5is a block diagram showing a connection relationship between phase comparator23A, charge pump24A, and loop filter25A in first DLL circuit5A.

As shown byFIG.5, first DLL circuit5A further includes switch28A and mask signal generation circuit27A omitted fromFIG.3, and charge pump24A and loop filter25A are connected via switch28A.

Switch28A switches between electrically connecting and disconnecting loop filter25A and charge pump24A. More specifically, when a mask signal outputted by mask signal generation circuit27A becomes an on-state in a low level period, switch28A puts an electrical connection between loop filter25A and charge pump24A into a connection state; and when the mask signal becomes an off-state in a high level period, switch28puts an electrical connection between loop filter25A and charge pump24A into a non-connection state.

When the electrical connection between loop filter25A and charge pump24A is put into the non-connection state, leakage of electric charges from loop filter25A caused by charge pump24A is reduced. Accordingly, when the electrical connection between loop filter25A and charge pump24A is put into the non-connection state, the hold voltage of loop filter25A is maintained at high accuracy.

FIG.6is a timing diagram showing exemplary operations of mask signal generation circuit27A.

As shown byFIG.6, mask signal generation circuit27A changes a mask signal to a high level in a period for which light emission control signal104is not outputted continuously.

With this, when no first edge detection signal111A is inputted in a state in which a delay is locked, first DLL circuit5A can keep constant an output voltage that loop filter25A supplies to delay adjustment circuit26A. For this reason, first DLL circuit5A can reduce a variation in phase of a rising edge of light emission control signal104in a standby period for which no first edge detection signal111A is inputted.

As stated above, second DLL circuit5B is a circuit similar to first DLL circuit5A. For this reason, as is the case in first DLL circuit5A, second DLL circuit5B can reduce a variation in phase of a falling edge of light emission control signal104in a standby period for which no second edge detection signal111B is inputted.

As stated above, third DLL circuit8A is a circuit similar to first DLL circuit5A. For this reason, as is the case in first DLL circuit5A, third DLL circuit8A can reduce a variation in phase of a rising edge of exposure control signal106in a standby period for which no third edge detection signal112A is inputted.

As stated above, fourth DLL circuit8B is a circuit similar to first DLL circuit5A. For this reason, as is the case in first DLL circuit5A, fourth DLL circuit8B can reduce a variation in phase of a falling edge of exposure control signal106in a standby period for which no fourth edge detection signal112B is inputted.

FIG.7Ais a block diagram showing an exemplary configuration of delay adjustment circuit26A.

As shown byFIG.7A, delay adjustment circuit26A includes variable delay elements31A, fixed delay element32A, and phase comparator33A.

FIG.7Bis a block diagram showing an exemplary configuration of variable delay element31A.

As shown byFIG.7B, variable delay element31A includes buffer34, variable current source35, and variable current source36.

Variable current source35controls a current that flows into buffer34, in response to a voltage supplied from loop filter25A. More specifically, variable current source35controls a current that flows into buffer34so that the current increases with an increase in voltage supplied from loop filter25A, and decreases with a decrease in voltage supplied from loop filter25A.

Variable current source36controls a current that flows from buffer34, in response to a voltage supplied from loop filter25A. More specifically, variable current source36controls a current that flows from buffer34so that the current increases with an increase in voltage supplied from loop filter25A, and decreases with a decrease in voltage supplied from loop filter25A.

Buffer34decreases a delay time with an increase in inflowing current and outflowing current, and increases a delay time with a decrease in inflowing current and outflowing current.

FIG.7Cis a block diagram showing a configuration of fixed delay element32A.

As shown byFIG.7C, fixed delay element32A includes buffer34, fixed current source37, and fixed current source38.

Fixed current source37is a replica circuit of variable current source35. More specifically, fixed current source37is a replica circuit of variable current source35for which a current that flows into buffer34is fixed in a state in which the current that flows into buffer34is maximum or minimum.

Fixed current source38is a replica circuit of variable current source36. More specifically, fixed current source38is a replica circuit of variable current source35for which a current that flows from buffer34is fixed in a state in which the current that flows from buffer34is maximum or minimum.

With the above configuration, fixed delay element32A is a replica circuit of variable delay element31A that is fixed in a state in which a delay time is minimum or maximum.

Referring back toFIG.7Aagain, the description of delay adjustment circuit26A will continue.

As shown byFIG.7A, fixed delay element32A receives a signal received by variable delay element31A.

Phase comparator33A compares an output of variable delay element31A and an output of fixed delay element32A, and outputs a predetermined signal when a phase difference between the output of variable delay element31A and the output of fixed delay element32A satisfies a predetermined condition. More specifically, when there is no phase difference between the output of variable delay element31A and the output of fixed delay element32A, phase comparator33A outputs a first initialization signal for initializing determination of a phase of a rising edge of light emission control signal104by first DLL circuit5A.

When phase comparator33A outputs the first initialization signal, first DLL circuit5A initializes the determination of the rising edge of light emission control signal104by, for example, causing charge pump24A to output an initial value (e.g., an intermediate value between the maximum output voltage and the minimum output voltage) of an output voltage.

Generally, a delay lock of a DLL circuit may be released due to a disturbance such as noise contamination to an input signal and noise contamination to a power source. Moreover, generally, a state in which a delay time of a variable delay element included in the DLL circuit is minimum or maximum is a state in which the delay lock of the DLL circuit is released.

In contrast, when a delay time of variable delay element31A is minimum or maximum, that is, when a delay lock of first DLL circuit5A thus configured is released, first DLL circuit5A initializes determination of a phase of a rising edge of light emission control signal104. For this reason, when the delay lock is released by some sort of a factor, first DLL circuit5A can start sweeping of a delay lock operation over immediately.

As stated above, second DLL circuit5B is a circuit similar to first DLL circuit5A. For this reason, when a delay lock of second DLL circuit5B is released by some sort of a factor, second DLL circuit5B can start sweeping of a delay lock operation over immediately as is the case in first DLL circuit5A.

As stated above, third DLL circuit8A is a circuit similar to first DLL circuit5A. For this reason, when a delay lock of third DLL circuit8A is released by some sort of a factor, third DLL circuit8A can start sweeping of a delay lock operation over immediately as is the case in first DLL circuit5A.

As stated above, fourth DLL circuit8B is a circuit similar to first DLL circuit5A. For this reason, when a delay lock of fourth DLL circuit8B is released by some sort of a factor, fourth DLL circuit8B can start sweeping of a delay lock operation over immediately as is the case in first DLL circuit5A.

Embodiment 2

Hereinafter, a distance-measuring imaging device according to Embodiment 2 configured by changing part of the configuration of distance-measuring imaging device1according to Embodiment 1 will be described. In the following description, among elements of the distance-measuring imaging device according to Embodiment 2, elements similar to those of distance-measuring imaging device1according to Embodiment 1 are assigned the same reference signs, and the detailed description thereof will be omitted, as they have already been described. Moreover, the following description mainly focuses on differences between distance-measuring imaging device1according to Embodiment 1 and the distance-measuring imaging device according to Embodiment 2.

FIG.8is a block diagram showing an exemplary configuration of distance-measuring Imaging device1A according to Embodiment 2.

As shown byFIG.8, distance-measuring imaging device1A is configured by adding photoelectric converter205to distance-measuring imaging device1according to Embodiment 1, and is also configured in that phase adjustment circuit2obtains, as first feedback signal103, a light emission detection signal (to be described later) outputted by photoelectric converter205.

When light source203emits light, photoelectric converter205directly receives the light emitted by light source203, and outputs a light emission detection signal indicating that light source203has emitted the light. Here, a light emission detection signal changes to a high level in a period for which photoelectric converter205is directly receiving light emitted by light source203, and a light emission detection signal changes to a low level in other periods. Photoelectric converter205is realized by, for example, a photodiode.

Phase adjustment circuit2obtains, as first feedback signal103, a light emission detection signal outputted by photoelectric converter205.

Even when a delay time from when light source driver201and light source203receive a rising edge of light emission control signal104to when light source203starts to emit light varies due to a change in the surrounding environment (e.g., temperature) of distance-measuring imaging device1A, a long-term degradation of distance-measuring imaging device1A, etc., by obtaining a light emission detection signal as first feedback signal103, phase adjustment circuit2can continuously reduce, using an analog feedback of first DLL circuit5A, a variation in delay time from when timing controller100outputs first timing signal101to when light source203starts to emit light. Moreover, even when a delay time from when light source driver201and light source203receive a falling edge of light emission control signal104to when light source203stops emitting light varies due to a change in the surrounding environment (e.g., temperature) of distance-measuring imaging device1A, a long-term degradation of distance-measuring imaging device1A, etc., phase adjustment circuit2can continuously reduce, using an analog feedback of second DLL circuit5B, a variation in delay time from when timing controller100outputs second timing signal101B to when light source203stops emitting light.

Accordingly, distance-measuring imaging device1A can reduce a variation in light emission timing accurately.

Moreover, distance-measuring imaging device1A can reduce a variation in exposure timing accurately as is the case in distance-measuring Imaging device1according to Embodiment 1.

As stated above, distance-measuring imaging device1A thus configured can reduce a variation in light emission timing and a variation in exposure timing accurately. Accordingly, distance-measuring imaging device1A thus configured can perform distance measurement accurately.

Embodiment 3

Hereinafter, a distance-measuring imaging device according to Embodiment 3 configured by changing part of the configuration of distance-measuring imaging device1according to Embodiment 1 will be described. In the following description, among elements of the distance-measuring imaging device according to Embodiment 3, elements similar to those of distance-measuring imaging device1according to Embodiment 1 are assigned the same reference signs, and the detailed description thereof will be omitted, as they have already been described. Moreover, the following description mainly focuses on differences between distance-measuring imaging device1according to Embodiment 1 and the distance-measuring imaging device according to Embodiment 3.

FIG.9is a block diagram showing an exemplary configuration of distance-measuring imaging device1B according to Embodiment 3.

As shown byFIG.9, distance-measuring imaging device1B includes light source203, light source driver201, exposure driver202, and semiconductor chip300.

Phase adjustment circuit2, timing controller100A, light receiver204, vertical scanner210, column processor220, signal processor230, output interface240, and phase-locked loop (PLL)250are integrated into semiconductor chip300.

Timing controller100A is configured by adding Imaging controller110to timing controller100according to Embodiment 1.

Imaging controller110generates an imaging control signal that controls vertical scanner210, column processor220, signal processor230, and output interface240.

Vertical scanner210controls an operation of reading out, for each column, electrical signals from pixels included in light receiver204, and an operation of sequentially transmitting the read electrical signals to column processor220.

Column processor220generates an imaging signal in response to the electrical signals transmitted by light receiver204for each column.

Signal processor230performs arithmetic processing based on the imaging signal generated by column processor220, and generates a distance signal indicating a distance to a subject and a luminance signal indicating the luminance of the subject. Here, signal processor230is assumed to calculate a distance to a subject using a TOF distance measurement method.

Hereinafter, the calculation of a distance to a subject by the TOF distance measurement method performed by signal processor230will be described with reference to the drawings.

FIG.10is a timing diagram showing a relationship between a light emission timing of light source203and an exposure timing of light receiver204when signal processor230calculates a distance to a subject using the TOF distance measurement method.

InFIG.10, Tp indicates a light emission period for which light source203emits light to a subject, and Td indicates a delay time from when light source203emits light to the subject to when reflected light that is the light reflected by the subject returns to light receiver204. A first exposure period is the same timing as the light emission period for which light source203emits the light to the subject, and a second exposure period is a timing that ranges from the end of the first exposure period to the elapse of light emission period Tp.

InFIG.10, q1indicates an exposure amount of reflected light in one pixel included in light receiver204in the first exposure period, and q2indicates an exposure amount of reflected light in the one pixel in the second exposure period.

By performing light emission by light source203and exposure by light receiver204at timings shown byFIG.10, it is possible to represent distance d to a subject from each pixel included in light receiver204by the following equation (Equation 1) with c as the speed of light.
d=c×Tp/2×q1/(q1+q2)  Equation 1
In consequence, signal processing230can calculate a distance to a subject using Equation 1, based on an imaging signal generated by column processor220.

Referring back toFIG.9again, the description of distance-measuring imaging device1B will continue.

Output interface240outputs the distance signal and luminance signal generated by signal processor230to the outside.

PLL250appropriately performs frequency multiplication or frequency division on a clock inputted from outside, and provides the clock to timing controller100A.

Distance-measuring imaging device1C can reduce a variation in light emission timing and a variation in exposure timing accurately as is the case in distance-measuring imaging device1according to Embodiment 1. Accordingly, distance-measuring imaging device1C thus configured can perform distance measurement accurately.

It should be noted that distance-measuring imaging device1C has been described as including exposure driver202outside semiconductor chip300as shown byFIG.9. Distance-measuring imaging device1C, however, may have a configuration in which, for example, exposure driver202is integrated into semiconductor chip300as shown byFIG.11.

Supplement

Although the distance-measuring imaging device according to the present disclosure has been described based on each of Embodiment 1 to Embodiment 3, the present disclosure is not limited to these embodiments. The present disclosure encompasses formed obtained by making to the embodiments various modifications conceived by a person with an ordinary skill in the art as well as forms achieved by combining elements of different embodiments without departing from the gist of the present disclosure.

(1) In Embodiment 1, distance-measuring imaging device1has been described as including timing controller100, phase adjustment circuit2, light source driver201, exposure driver202, light source203, and light receiver204. However, distance-measuring imaging device1is not limited to a configuration containing all of these elements. As long as distance-measuring imaging device1has a configuration containing at least timing controller100, light receiver204, and phase adjustment circuit2, distance-measuring imaging device1may have a configuration in which light source203and light source driver201are disposed outside.

(2) In Embodiment 1, distance-measuring imaging device1has been described as including first DLL circuit5A and second DLL circuit5B and reducing a variation in light emission start timing and a variation in light emission stop timing accurately. In this respect, as another example, distance-measuring imaging device1may include at least one of first DLL circuit5A or second DLL circuit5B, and may be configured to reduce at least one of a variation in light emission start timing or a variation in light emission stop timing accurately.

Moreover, in Embodiment 1, distance-measuring imaging device1has been described as including third DLL circuit8A and fourth DLL circuit8B and reducing a variation in exposure start timing and a variation in exposure stop timing accurately. In this respect, as another example, distance-measuring imaging device1may include at least one of third DLL circuit8A or fourth DLL circuit8B, and may be configured to reduce at least one of a variation in exposure start timing or a variation in exposure stop timing accurately.

Furthermore, in Embodiment 1, distance-measuring imaging device1has been described as including first DLL circuit5A, second DLL circuit5B, third DLL circuit8A, and fourth DLL circuit8B and reducing a variation in light emission timing and a variation in exposure timing accurately. In this respect, as another example, distance-measuring imaging device1may include first DLL circuit5A and second DLL circuit5B, and may be configured to reduce a variation in light emission timing accurately, or may include third DLL circuit8A and fourth DLL circuit8B, and may be configured to reduce a variation in exposure timing accurately.

(3) In Embodiment 1, fixed delay element32A has been described as the replica circuit of variable delay element31A. However, as long as fixed delay element32A is a delay element for which a delay time is fixed to the minimum delay time or maximum delay time of variable delay element31A, fixed delay element32A need not always be limited to the replica circuit of variable delay element31A.

Although only some exemplary embodiments of the present disclosure have been described in detail above, those skilled in the art will readily appreciate that many modifications are possible in the exemplary embodiments without materially departing from the novel teachings and advantages of the present disclosure. Accordingly, all such modifications are intended to be included within the scope of the present disclosure.

INDUSTRIAL APPLICABILITY

The distance-measuring imaging device according to the present disclosure is widely applicable to, for example, apparatuses that measure a distance to a subject.