Patent ID: 12218784

DETAILED DESCRIPTION OF THE EMBODIMENTS

Preferred specific embodiments are given below to allow better understanding of the technical contents of the present invention.

Please refer toFIG.3, which shows a structural schematic diagram of a signal transmission circuit element of the present invention.

A signal transmission circuit element1of the present invention is connected among a plurality of electronic modules2so as to transmit an electrical signal among the plurality of electronic modules2. The plurality of electronic modules2may be categorized into input signal electronic modules and output signal electronic modules, and the signal transmission circuit element1can selectively input the electrical signal through the plurality of input signal electronic modules, respectively, and then output the electrical signal to the output signal electronic modules. Alternatively, after the electrical signal is inputted through the input signal electronic modules, the signal transmission circuit component1can selectively output the electrical signal to the plurality of output signal electronic modules, respectively. The numbers of the plurality of electronic modules2are not limited by the present invention. It should be noted that, although the terms “first” and “second” are used to describe various elements of the present invention, these terms are not to be construed as limitations of the elements. Such terms are merely for differentiating one element from another element. For example, without departing from the scope of the various embodiments described, a first input terminal may be referred to as a second terminal, and similarly, a second input terminal may be referred to as a first input terminal. Moreover, the first input terminal and the second input terminal are both input terminals but are not the same input terminal.

The signal transmission circuit element1includes an input terminal10, an input equalizer20, an output driver30and an output terminal40. The input terminal10is for inputting the electrical signal. The input equalizer20is electrically connected to the input terminal10. The output driver30is electrically connected to the input equalizer20. The output terminal is40electrically connected to the output driver30so as to output the electrical signal. Accordingly, the input equalizer20can perform gain compensation on the electrical signal, and then an output capacitance of the electrical signal is driven by the output driver30. The numbers of the input equalizer20and the output driver30are adjusted according to the numbers of the input signal electronic modules and output signal electronic modules, and the signal transmission circuit element1may be structured as having a many-to-one or one-to-many signal transmission path.

Please refer toFIG.4, which shows a structural schematic diagram of a multiplexer circuit element of the present invention.

In the first embodiment of the present invention, the signal transmission circuit element1is a multiplexer circuit element1ain a 2-to-1 form so as to be connected between two input signal electronic modules and one output signal electronic module; however, the present invention is not limited to the numbers above. The multiplexer circuit element1ais adapted to be connected between a first electronic module2a, a second electronic module2band a third electronic module2c, wherein the first electronic module2aand the second electronic module2bare input signal electronic modules and the third electronic module2cis an output signal electronic module. Thus, the multiplexer circuit element1ais capable of transmitting an electrical signal selectively from the first electronic module2aor the second electronic module2bto the third electronic module2c.

The multiplexer circuit element1aincludes a first input terminal11, a second input terminal12, an output terminal40, a first equalizer21, a second equalizer22, and an output driver30. The first input terminal11and the second input terminal12belong to input terminals10and are electrically connected to the first electronic module2aand the second electronic module2bso as to receive a first input signal A_IN and a second input signal B_IN, respectively. The first equalizer21and the second equalizer22belong to the input equalizer20, wherein the first equalizer21is electrically connected to the first terminal11and the second equalizer22is electrically connected to the second terminal12. The output driver30is electrically connected to the first equalizer21and the second equalizer22and further electrically connected to an output terminal40. Thus, the output terminal40is eventually electrically connected to the third electronic module2cso as to transmit an output signal C_OUT to the third electronic module2c.

In the first embodiment of the present invention, the first equalizer21and the second equalizer22use a first control signal c1and a second control signal c2for turning on or off, wherein the first control signal c1and the second control signal c2are complementary signals. When the first control signal c1is equal to 1 and the second control signal c2is equal to 0, the first equalizer21is turned on and the second equalizer22is turned off. When the first control signal c1is equal to 0 and the second control signal c2is equal to 1, the first equalizer21is turned off and the second equalizer22is turned on. Thus, the multiplexer circuit element1ais capable of selectively transmitting the first input signal A_IN or the second input signal B_IN to the output driver30. The output driver30is constantly in a turned-on state. Accordingly, the first equalizer21or the second equalizer22can perform gain compensation for the loss of the first input signal A_IN or the second input signal B_IN, and then an output capacitance of the output signal C_OUT is driven by the output driver30.

Please refer toFIG.5, which shows a structural schematic diagram of a demultiplexer circuit element of the present invention.

In the second embodiment of the present invention, the signal transmission circuit element1is a demultiplexer circuit element1bin a 1-to-2 form so as to be connected between one input signal electronic module and two output signal electronic modules; however, the present invention is not limited to the numbers above. The demultiplexer circuit element1bis adapted to be connected between a first electronic module2a, a second electronic module2band a third electronic module2c, wherein the first electronic module2ais an input signal electronic module and the second electronic module2band the third electronic module2care output signal electronic modules. Thus, the demultiplexer circuit element1bis capable of transmitting an electrical signal from the first electronic module2aselectively to the second electronic module2bor the third electronic module2c.

The demultiplexer circuit element1bincludes an input terminal10, an input equalizer20, a first driver31, a second driver32, a first output terminal41and a second output terminal42. The input terminal10is electrically connected to the first electronic module2aso as to receive an input signal C_IN. The input equalizer20is electrically connected to the input terminal10and then electrically connected to the first driver31and the second driver32. The first driver31and the second driver32belong to output driver30and are electrically connected to the first output terminal41and the second output terminal42, respectively. The first output terminal41and the second output terminal42are eventually electrically connected to the second electronic module2band the third electronic module2c, respectively, so as to transmit a first output signal A_OUT to the second electronic module2bor transmit a second output signal B_OUT to the third electronic module2c.

In the second embodiment of the present invention, the first driver31and the second driver32use a first control signal c1and a second control signal c2for turning on or off, wherein the first control signal c1and the second control signal c2are complementary signals. When the first control signal c1is equal to 1 and the second control signal c2is equal to 0, the first driver31is turned on and the second driver32is turned off. When the first control signal c1is equal to 0 and the second control signal c2is equal to 1, the first driver31is turned off and the second driver32is turned on. The input equalizer20is constantly in a turned-on state. Thus, selectively, the first output signal A_OUT can be transmitted to the second electronic module2bor the second output signal B_OUT can be transmitted to the third electronic module2c. Accordingly, the input equalizer20can perform gain compensation for the loss of the input signal C_IN, and then an output capacitance of the first output signal A_OUT or the second output signal B_OUT is driven by the first driver31or the second driver32.

In general, an input electrical signal encounters different input impedances and additional path loss, and an output electrical signal encounters additional path loss and a large capacitance. It can be understood from the description above that the active multiplexer circuit element1aor demultiplexer circuit element1bof the present invention is capable of easily satisfying the required input impedance or compensating for the additional loss. The first equalizer21, the second equalizer22or the input equalizer20is capable of compensating for any additional loss, and the output driver30, the first driver31or the second driver32is capable of driving an output capacitance. Thus, the active signal transmission circuit element1, multiplexer circuit element1aor demultiplexer circuit element1bresults in only a path capacitance added on a signal path without increasing the resistance on the signal path. Therefore, it actively meets all constantly varying border conditions and is suitable for environments needing high-speed data transmission, and it is apparently superior to designs of the prior art.

It should be noted that the embodiments given above are examples of the present invention rather than limitations of the present invention. Any variation without departing from the fundamental structure of the invention is to be encompassed within the scope of protection in accordance with the broadest interpretation of the appended claims.