Patent ID: 12243895

DETAILED DESCRIPTION

Like features have been designated by like references in the various figures. In particular, the structural and/or functional features that are common among the various embodiments may have the same references and may dispose identical structural, dimensional and material properties.

For the sake of clarity, only the operations and elements that are useful for an understanding of the embodiments described herein have been illustrated and described in detail. In particular, the usual CMOS integrated circuits of light sensors, in particular the CMOS integrated circuits for reading pixels, have not been described in detail, the described embodiments, modes of implementation and variants being compatible with the usual CMOS integrated circuits of light sensors.

Unless indicated otherwise, when reference is made to two elements connected together, this signifies a direct connection without any intermediate elements other than conductors, and when reference is made to two elements coupled together, this signifies that these two elements can be connected or they can be coupled via one or more other elements.

In the remainder of the disclosure, an operating wavelength of a light sensor or of a pixel of a light sensor refers to a wavelength of a ray of light, or electromagnetic ray, received by the sensor or the pixel for which the sensor or the pixel implements a conversion of the received photons into electron-hole pairs. A light sensor or a pixel of such a sensor can have several operating wavelengths, for example within a range of operating wavelengths.

In the following disclosure, unless indicated otherwise, when reference is made to absolute positional qualifiers, such as the terms “front,” “back,” “top,” “bottom,” “left,” “right,” etc., or to relative positional qualifiers, such as the terms “above,” “below,” “higher,” “lower,” etc., or to qualifiers of orientation, such as “horizontal,” “vertical,” etc., reference is made to the orientation shown in the figures.

Unless specified otherwise, the expressions “around,” “approximately,” “substantially” and “in the order of” signify within 10%, and preferably within 5%.

FIG.1shows, in partial schematic sectional view, one example of a pixel1of a light sensor, with the understanding that in practice, the sensor may have several identical pixels1, for example several hundred or several thousand pixels1.

The sensor comprises a semiconductor layer100, for example a semiconductor substrate or a layer of a semiconductor on insulator (SOI) structure. The layer100is for example a layer of silicon.

Various components made from CMOS technology are formed in and/or on the layer100. In other words, various CMOS components are formed from the layer100. InFIG.1, only one of these components is shown, in this example a transistor T whereof only the gate electrode G, also called gate stack or gate, is shown inFIG.1.

The layer100and the CMOS components formed in and/or on this layer100form an integrated circuit using CMOS technology of the sensor, or CMOS integrated circuit. As an example, the CMOS integrated circuit comprises circuits for reading pixels of the sensor.

The sensor comprises an interconnect structure102. The interconnect structure102covers the CMOS integrated circuit of the sensor, or in other words, covers the layer100and the CMOS components formed in and/or on this layer100. The upper face or surface110of the interconnect structure102is planar.

The interconnect structure102comprises electrically conductive layer portions104, for example metal layer portions, embedded in electrically insulating layers. In other words, these conductive layer portions104are separated from one another by these insulating layers. InFIG.1, the insulating layers of the interconnect structure102are shown by a single insulating layer106.

The interconnect structure102comprises electrically conductive vias108, for example metal vias, electrically connecting the conductive layer portions104to one another and/or to CMOS components of the integrated circuit of the sensor.

The conductive vias108and the conductive layer portions104make up electrically conductive elements of the interconnect structure102.

In addition to the interconnect structure102and the CMOS integrated circuit that it covers, the pixel1comprises an electrically conductive element108or104of the interconnect structure102that is flush with the upper face110of the interconnect structure102, that is to say, with the upper face of the insulating layer106.

Preferably, as shown inFIG.1, this conductive element is a conductive layer portion104. Preferably, this conductive element is electrically coupled to a read circuit of the pixel1comprising CMOS components such as the transistor T, by means of other conductive elements104,108of the interconnect structure100. For example, the conductive element104flush with the face110is electrically coupled to a doped zone or region105formed in the layer100and making up a storage area for photogenerated charges. Said differently, an upper surface of the conductive element104is coplanar with the surface110.

The pixel1comprises an electrode112. A central part of the electrode112rests on and in contact with the conductive element104flush with the face110. The electrode112constitutes a lower, first electrode of the pixel1. A lower surface of the electrode112is coplanar with the surface110.

A photosensitive film114rests on the interconnect structure102. The film114covers the interconnect structure102and the electrode112of the pixel1. More specifically, the film114rests on and in contact with the entire electrode112and on and in contact with all of the portions of the face110not covered with the electrode112.

The film114has a planar upper face or surface116. Between the face110and the face116, the film114has a thickness or dimension H.

The pixel1also comprises an upper, second electrode117resting on the face116of the film114.

During operation, when the light at the operating wavelength of the sensor is received by the pixel1, electron-hole pairs are photogenerated in the film114. The photogenerated holes or electrons are next collected by the electrode112in order to be transmitted to the CMOS integrated reading circuit of the pixel1. The reading circuit of the pixel then provides information representative of the quantity of light at the operating wavelength of the pixel1that is received by this pixel1.

The quantum efficiency QE of the pixel1corresponds to the ratio between the number of photogenerated holes or electrons collected by the pixel1and the number of photons received by the pixel1at the operating wavelength of the pixel1. In order to increase the quantum efficiency of the pixel1, it would be desirable to increase the thickness H of the film114.

However, increasing the thickness H of the film114raises various problems. Indeed, increasing the thickness of the film114causes an increase in the risk of delamination of the film114and/or an increase in the risk of cracks forming through all or part of the thickness of the film114. Furthermore, an increase in the thickness of the film114causes an increase in the number of steps to form the film114, for example because the film114is then formed by at least two successive depositions, resulting in an increase in the production cost of the pixel1, and more generally of a light sensor comprising one or several pixels1.

By locally increasing the thickness of the photosensitive film of a pixel of the type of the pixel1, above the electrode112, by keeping the upper face116planar of the film114, and by keeping, beyond the electrode112, a thickness of the film114for which the risk of delamination or cracking is nil or practically nil.

FIGS.2to5illustrate successive steps of one embodiment of a method for manufacturing a pixel of a light sensor, leading to obtaining a photosensitive film that is locally thicker above the lower electrode of the pixel. The pixel manufactured using this method comprises a CMOS integrated circuit similar or identical to that of the pixel1, and an interconnect structure102similar or identical to that of the pixel1, the interconnect structure102resting on the CMOS integrated circuit.

FIG.2is a schematic sectional or cross-sectional view illustrating a step of the manufacturing method.

InFIG.2, only a portion of the interconnect structure102is shown. The illustrated portion of the interconnect structure102comprises an electrically conductive element104or108flush with the upper face110of the interconnect structure102.

Preferably, as shown inFIG.2, the conductive element flush with the face110is a conductive layer portion104of the interconnect structure102. Preferably, the conductive element104is electrically coupled to the CMOS integrated circuit (not shown) on which the interconnect structure102rests, for example to a reading circuit of the pixel.

As an example, the conductive element104is made from a metal such as copper or aluminum, or from a metal alloy such as an aluminum/copper alloy.

In the step ofFIG.2, an insulating layer200has been deposited on and in contact with the face110of the interconnect structure102, with the understanding that, before the deposition of the layer200, the face110was an exposed face of the interconnect structure102. Preferably, the layer200is deposited on and in contact with the entire face110of the interconnect structure, or in other words, is blanket-deposited.

According to one embodiment, the deposition of the layer200corresponds to the deposition of a single layer of an electrically insulating material. Preferably, this material is a diffusion barrier material for the metal, the layer200then making up a diffusion barrier layer. In other words, preferably, the layer200comprises a diffusion barrier layer on and in contact with the face110.

According to another embodiment, the deposition of the layer200corresponds to successive deposits of layers each made from an electrically insulating material, optionally different between the layers. Preferably, the first layer deposited on and in contact with the face110of the interconnect structure102in order to form the layer200is made from a diffusion barrier material for the metal, the layer200then comprising a diffusion barrier layer on and in contact with the face110of the interconnect structure102.

As an example, the layer200is made from silicon nitride (for example SiN or Si3N4) or corresponds to a stack of a layer of silicon nitride resting on and in contact with the face110, and a layer of silicon oxide resting on and in contact with the layer of silicon nitride.

As an example, the thickness h of the layer200is inclusively between 50 nm and 500 nm, for example between 50 nm and 300 nm, for example equal to 200 nm.

In the step ofFIG.3, an opening300is etched through the layer200, to the conductive layer104flush with the face110. In other words, the etching of the opening300is stopped on the face110of the interconnect structure102. After the etching of the opening300, at least part of the conductive element104is exposed at the bottom of the opening300(at the bottom of the opening300inFIG.3) or, in other words, at the face110.

According to one embodiment, the opening300is etched so as to emerge only on the conductive element104flush with the face110. This element104can then advantageously serve as etching stop layer.

As an example, the opening300has lateral dimensions d, for example a diameter in the case where the opening300has a circular shape seen from above or a side in the case where the opening300has a square shape seen from above, that are smaller than or equal to one third of the lateral dimensions of the manufactured pixel. The lateral dimensions of the pixel and the opening300are for example measured in a plane parallel to the face110. For example, in a light sensor where the pixels are arranged regularly with a pitch in the order of 3 μm, that is to say that each pixel has lateral dimensions in the order of 3 μm, the opening300of each pixel of the sensor has lateral dimensions less than or equal to 1 μm.

In the step ofFIG.4, an electrode layer400is deposited or otherwise formed over the entire structure obtained at the end of the step described in relation withFIG.3, and an electrode402is defined in the layer400.

More particularly, the layer400is blanket-deposited, for example by chemical vapor deposition (CVD), or by atomic layer deposition (ALD), or by physical vapor deposition (PVD). In other words, the electrode layer is deposited on and in contact with the exposed part of the element104at the bottom of the opening300and on and in contact with the insulating layer200, in particular on and in contact with the side walls301,303of the opening300. The thickness or dimension e of the electrode layer400is less than the thickness h of the layer200, such that the layer400does not fill the opening300.

As an example, the thickness e of the layer400is ten times smaller than that of the layer200. As an example, the thickness e of the electrode layer400is inclusively between 5 and 100 nm.

According to one embodiment, the deposition of the layer400corresponds to the deposition of a single layer of an electrically conductive material, for example a metal or a metal alloy.

According to another embodiment, the deposition of the layer400corresponds to successive deposits of layers each made from an electrically conductive material, for example a metal or a metal alloy, optionally different between these successively deposited layers.

As an example, the electrode layer400comprises a layer of tantalum and/or a layer of titanium nitride and/or a layer of tantalum nitride.

In this embodiment, the electrode402is defined in the layer400by removing, by etching, portions of the layer400resting on the layer200, that is to say portions of the layer400resting on the upper face201of the layer200, the upper face of the layer200being parallel to the face110of the interconnect structure102and being opposite the face of the layer200resting on and in contact with the face110.

Thus, the electrode402is formed by a portion of the layer400left in place. The electrode402completely covers the surface107of the exposed conductive element104at the bottom of the opening300, that is to say the surface of the conductive element104that is not covered with the layer200. The electrode402also completely covers the side walls301,303of the opening300. Lastly, the electrode402overflows or overlaps on the layer200around the opening300. In other words, the electrode402comprises an annular portion extending laterally from the opening300, and resting on and in contact with the layer200.

In one embodiment, the conductive element104includes a first portion403and a second portion405that are covered by the layer200. The electrode402includes a first end407and a second end409. The first end is further from the sidewall303than an end or edge of the first portion403. The second end is further from the sidewall301than an end of the second portion405.

The electrode402includes a first portion402athat is along the conductive element or otherwise adjacent to the conductive element. A second portion402bis substantially parallel to the first portion and is on the surface201of the layer200. A third portion402cis substantially parallel to the first portion and is on the surface201of the layer200, opposite to the second portion. There is a fourth portion402dand a fifth portion402ethat are transverse to the first, second, and third portions.

In the step ofFIG.5, a photosensitive film500is deposited on the structure obtained at the end of the implementation of the steps described in relation withFIG.4.

The photosensitive film500is blanket-deposited, so as to cover the electrode402, and the exposed parts of the upper face of the layer200.

The deposition method of the film500leads to obtaining a film500having a planar upper face, or exposed face,502.

The film500is deposited such that its thickness or dimension H1, measured between the upper face of the layer200and the upper face502of the film500, is less than or equal to a maximum thickness beyond which the delamination and/or cracking may occur in the film500. This maximum thickness can be determined by the person skilled in the art, for example through routine tests, and in particular depends on the material of the film500and/or the implemented deposition method of the film500.

Furthermore, the thickness H1of the film500is greater than the thickness h of the layer200, such that the film500completely fills the opening300. Preferably, the thickness H1of the film500is greater than at least 2 times the thickness h of the layer200. As an example, the thickness H1of the film500is inclusively between 200 nm and 1 μm, for example equal to about 500 nm.

Depending on the material of the film500, the blanket deposition of the film500can be performed, for example, by liquid deposition, cathode sputtering deposition, evaporation deposition, spin coating, a spray coating, heliography, slot-dye coating, blade-coating, flexography or serigraphy. One example of spray coating is described in the article by Kramer et al., titled “Efficient Spray-Coated Colloidal Quantum Dot Solar Cells,” Adv. Mater., 27:116-121.

Depending on the targeted thickness H1and/or the shape in which the material of the film500is deposited, for example whether the material is deposited in the form of an ink or a colloidal solution stabilized by intermediate ligands, the deposition of the film500is carried out by a single deposition step, or by several successive depositions steps, each deposition step being able to be followed by a chemical treatment step and/or an annealing or drying step.

As an example, the material of the film500is deposited in the form of an ink, for example through several successive steps for deposition of the material of the film500.

Each step for deposition of the material of the film500in the form of ink leads to obtaining a layer of the material of the film500having a thickness for example inclusively between about ten nanometers and one or several hundred nanometers, the thickness for example depending on the concentration of the deposited ink.

Each step for depositing the material of the film500in ink form is for example implemented at a temperature inclusively between 0° C. and 50° C., preferably between 10° C. and 25° C.

As an example, no chemical treatment is carried out after each step for depositing the material of the film500in ink form.

As an example, each step for depositing the material of the film500in ink form is followed by an annealing, for example at a temperature between 40° C. and 150° C., for example at a temperature of 100° C. This annealing for example lasts between one or several tens of seconds and one or several hours. This annealing is for example carried out on a hot plate or in a furnace. This annealing is for example carried out under ambient atmosphere, under controlled atmosphere, or under vacuum.

As an example, the material of the film500is deposited in the form of a colloidal solution stabilized by intermediate ligands, for example by several successive steps for deposition of this stabilized colloidal solution.

Each step for depositing a layer of colloidal solution stabilized by intermediate ligands is for example implemented at a temperature inclusively between 0 and 50° C., for example at a temperature of 15, 25 or 30° C.

Each step for depositing the material of the film500in the form of a colloidal solution stabilized by intermediate ligands is for example followed by one or several steps for chemical treatments in order to modify the properties of the deposited film of solution, for example to modify the properties of conductivity of the film for the electrons and/or the holes. For example, each deposited layer of colloidal solution stabilized by intermediate ligands is placed in contact with chemical solutions that interact with the deposited layer, so as to cause solid phase exchanges of the intermediate ligands present around nanocrystals forming quantum dots, by molecules making it possible to improve properties of the film500. These molecules are for example chains of ligands shorter than those of the intermediate ligands, which makes it possible to increase the conductivity of the film500, and/or of inorganic molecules, which makes it possible to increase the strength and/or the stability of the film500relative to its environment (air, light). These solid-phase chemical exchanges are for example carried out by several successive steps of contact between a chemical solution and the deposited layer of colloidal solution, each chemical solution for example being a solution comprising ligands or inorganic molecules intended to be exchanged with intermediate ligands of the deposited layer of colloidal solution.

As an example, each chemical solution is placed in contact with the deposited layer of colloidal solution for a duration inclusively between one and ten seconds and one and ten minutes, for example for a duration of 90 s.

As an example, rinsing steps can be provided between two successive contacts of a chemical solution with the deposited layer.

As an example, one or several intermediate annealing steps (between two successive contacts of a solution with the deposited layer) and/or a final annealing step can be provided. The temperatures of the annealing steps are for example inclusively between 40° C. and 150° C. The duration of each annealing step is for example inclusively between about 10 s and one or several hours. Each annealing step is for example carried out on a hot plate, for example, under ambient atmosphere, under controlled atmosphere or under vacuum, or in a furnace, for example under controlled atmosphere.

The effectiveness of the solid-phase chemical exchanges limits the maximum thickness of each deposited layer of stabilized colloidal solution, this maximum thickness being determined so that the entire volume of the deposited layer of stabilized colloidal solution is subject to solid-phase chemical exchanges with the chemical elements of interest of the chemical solutions placed in contact with this layer. As an example, the thickness of each deposited layer of stabilized colloidal solution is inclusively between several nanometers, for example from 3 to 5 nm, and several hundreds of nanometers, for example from 300 to 500 nm. As an example, the thickness of each deposited layer of stabilized colloidal solution is equal to about 50 nm.

According to one embodiment, the film500is a colloidal quantum dot film, or in other words, the film500comprises colloidal quantum dots.

From the structure shown inFIG.5, a pixel2is obtained by implementing steps that are not illustrated.

In particular, one or several optional passivation layers (not shown inFIG.5) and/or one or several insulating layers (not shown inFIG.5) can be deposited on the exposed face502of the film500, preferably on the entire face502, preferably in contact with the face502.

Furthermore, an electrode504is formed on the film500. This electrode504, called upper electrode of the pixel2, is formed by depositing one or several conductive layers in which the upper electrode504is defined, for example by etching. Each component conductive layer of the upper electrode504is partially transparent to the operating wavelength(s) of the pixel2. As an example, the upper electrode is made from indium tin oxide (ITO).

Furthermore, conventionally, one or several passivation layers (not shown inFIG.5) and/or one or several insulating layers (not shown inFIG.5) and/or one or several color filters (not shown inFIG.5) and/or one or several lenses or microlenses (not shown inFIG.5) can next be formed above the film500and the upper electrode of the pixel2.

As shown inFIG.5, in the pixel2, above the portion of the electrode402that rests on the conductive element104, the total thickness of the film500is equal to H1+h−e. Thus, if the thickness H1of the film500is equal to the thickness H of the film114of the pixel1described in relation toFIG.1, the film500of the pixel2is locally thicker than the film114, while retaining a planar upper face502. This overthickness of the film500, localized above the electrode402, leads to an increase in the quantum efficiency of the pixel2relative to the pixel1.

According to one embodiment, the dimensions of the conductive element104of the pixel2that is flush with the face110are chosen as a function of the lateral dimensions of the opening300etched in the step ofFIG.3. For example, these dimensions are chosen such that, in the step illustrated in relation withFIG.3, by adapting the location of the opening300relative to the location of the conductive element104, the opening300emerges only on this electrically conductive element104.

The first end407and the second end409of the electrode402are covered by the film500.

However, in a variant, when the conductive element104flush with the face110has lateral dimensions, for example measured in a plane parallel to the face110, smaller than those of the opening300, the opening300then emerges partially on the conductive element104and partially on the layer106of the interconnect structure. In this variant, the electrode402formed in the step ofFIG.4completely covers the conductive element104and the exposed layer portions106at the bottom of the opening300.

Furthermore, according to one embodiment, in the step ofFIG.3, the opening300is etched in a central part of the pixel2seen from above. Thus, when the electromagnetic rays received by the pixel2are focused in a central part of the film500seen from above, for example by one or several lenses or microlenses, these rays are focused in a portion of the film500having a total thickness equal to H1+h-e.

According to one embodiment, the thickness h of the layer200is equal or substantially equal to half of the wavelength, in the film500, of an incident ray of the pixel2. Thus, when the pixel2receives electromagnetic rays at this wavelength, this makes it possible to obtain constructive interference between, on the one hand, an electromagnetic ray that has passed through the film500and that has been reflected on the portion of the electrode402arranged at the bottom of the opening300and, on the other hand, an electromagnetic ray that has passed through the film500and that has been reflected on a portion of the electrode402resting on the upper surface of the layer200.

According to one embodiment, one or several operating wavelengths of the pixel2are inclusively within the near infrared and are for example inclusively between 750 nm and 3000 nm. For example, the pixel2has an operating wavelength equal to 940 nm. The person skilled in the art is able to adapt the thicknesses e, H1and/or h, and/or the material(s) of the film500to the operating wavelength(s) of the pixel2. For example, in the case where the film500comprises colloidal quantum dots, based on the operating wavelength(s) of the pixel2, the person skilled in the art is able to adapt the dimensions and the composition in component nanocrystals of the colloidal quantum dots.

The inventors have noted that the quantum efficiency of a pixel2was up to 13% higher than the quantum efficiency of a corresponding pixel1, that is to say, a pixel1whose film114is made from the same material as the film500of the pixel2and has a thickness H equal to the thickness H1of the film500of the pixel2, and whose lower112and upper 117 electrodes are made from the same materials and have the same thicknesses as the lower402and upper 504 electrodes of the pixel2. For example, the inventors have measured a quantum efficiency in the order of 0.35 electrons per incident photon for a pixel2, and in the order of 0.31 electrons per incident photon for a corresponding pixel1.

Although embodiments and variants have been described above, in relation withFIGS.2to5, of a method for manufacturing a single pixel2, several identical pixels2, for example of the same light sensor or several light sensors, can be manufactured simultaneously from a single layer or semiconductor wafer100(FIG.1), by carrying out the described steps simultaneously for all of these pixels2. The pixels2thus manufactured can then share a same film500.

Various embodiments and modes of implementation have been described. Those skilled in the art will understand that certain features of these embodiments, modes of implementation and variants can be combined and other variants will readily occur to those skilled in the art. In particular, although a pixel2has been described in which the conductive element of the interconnect structure102that is in contact with the electrode402is a conductive layer portion104, the person skilled in the art is able to adapt the described method to the case where this conductive element is a via108.

Finally, the practical implementation of the embodiments, modes of implementation and variants described herein is within the capabilities of those skilled in the art based on the functional description provided hereinabove. In particular, the person skilled in the art is able to choose the material(s) of the film500based on the targeted application, and/or to determine, for a given film500, the maximum value of the thickness H1from which delamination and/or cracking may form in the film500. Furthermore, the person skilled in the art is able to provide that one of the upper and lower electrodes of the pixel2or each of these electrodes comprises at least one layer of a material making it possible to adapt the output work of the considered electrode based on the charges (electrons or holes) collected by this electrode. Furthermore, the person skilled in the art is able to produce the photolithography masks making it possible to produce etching masks in order to carry out the etching steps previously described.

The various embodiments described above can be combined to provide further embodiments. Aspects of the embodiments can be modified, if necessary to employ concepts of the various patents, applications and publications to provide yet further embodiments.

These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.