Patent ID: 12219698

DETAILED DESCRIPTION OF THE INVENTION

Referring toFIGS.1-15, embodiments of a printed circuit board (PCB) can be built for several purposes including those that require high current circuits (e.g.: several to tens of amperes) such as DC/DC, DC/AC, AC/DC or AC/AC power converters. AC/AC converters can be used to convert AC power, typically provided at frequencies such as 60 or 50 Hz, to AC power at a frequency suitable to operate an electric motor, for example. Other PCB structures can be configured to operate as a stator for an axial field rotary energy device, which can be similar to the devices described in U.S. Pat. Nos. 10,141,803, 10,135,310, 10,340,760, 10,141,804, 10,186,922 and 11,502,583, each of which is incorporated herein by reference in its entirety.

An embodiment of a PCB manufacturing process700is described inFIG.4, where in step701, a B-stage dielectric material made of a fiber-reinforced polymer, such as NEMA FR-4 glass epoxy laminate, for example, is molded to form a three-dimensional (3D) dielectric substrate800as shown inFIGS.5A and5B. The 3D dielectric substrate800comprises a first side801aand a second side801bopposite to side801a, and sides801aand801bcan be substantially flat and parallel to each other. The side801acan have a layout of channels802and pockets803, hereinafter referred to as “top side”, with a depth “D1” (FIG.5A) that is the same or substantially the same as the thickness “T1” (FIG.7B) of the conductive traces and pads of the PCB panel1000. The side801bcan have a layout of channels802and pockets803, hereinafter referred to as “bottom side”, with a depth “D2” (FIG.5B) that is the same or substantially the same as the thickness “T2” (FIG.7B) of the conductive traces and pads of the PCB panel. In some embodiments the depths “D1” and “D2”, and corresponding thicknesses “T1” and “T2”, can be the same or within 25 μm of each other, for example, and in others “D1” and “D2” can be different. AlthoughFIGS.5A and5Bdepict an embodiment of a 3D dielectric substrate800with two sides (e.g., top and bottom sides) and each side has a different layout, it should be understood that other embodiments of the 3D dielectric substrate800can have two sides with identical layouts, and others may have only one side.

In addition, the 3D dielectric substrate800can have openings804a,804band804c, hereinafter collectively referred to as “openings804”, to connect the two sides of the 3D dielectric substrate800. In addition to a NEMA FR-4 glass epoxy laminate, the 3D dielectric substrate800can also be formed from other fiber-reinforced polymers, such as a glass-reinforced polyimide laminate, or ceramic-reinforced polytetrafluorethylene resin based laminate, for example, to impart mechanical rigidity to the 3D dielectric substrate. While the 3D dielectric substrate800shown inFIGS.5A and5Bhas three openings804a-cto connect its two sides, other embodiments can have a different number of openings804, or no openings at all.

FIG.6Ashows an embodiment of a clamshell mold900that can be used to form the 3D dielectric substrate800shown inFIGS.5A and5B. The clamshell mold900can have two adjoining sections901aand901bmade of metal such as carbon steel, stainless steel, aluminum, or titanium, for example. It can have ridges902that can form the channels802, and pads903that can form pockets803in the 3D dielectric substrate800. The height “H1” of the ridges902and pads903in section901ais the same or substantially the same as the thickness “T1” (FIG.7B) of the conductive traces and pads of the PCB panel1000). The height “H2” of the ridges902and pads903in section901bis the same or substantially the same as the thickness “T2” of the conductive traces and pads of the PCB panel1000. In some embodiments the heights “H1” and “H2”, and corresponding thicknesses “T1” and “T2”, can be the same or within 25 μm of each other, and in others they can be different.

AlthoughFIGS.6A and6Bdepict an embodiment of clamshell mold900that corresponds to a two-sided 3D dielectric substrate800where the layouts in each side are different, it should be understood that in some embodiments the side layouts can be identical, so the mold sections901aand901bwould mirror each other. In other embodiments where the 3D dielectric substrate800has only one side, the corresponding mold900would have ridges and pads on only one section, while the other section can be a flat plate.

In addition, one section of the mold, section901afor example, can have pads904comprising protruding bosses906that abut against pads903in the opposite section of the mold, section901b, for example, so when the mold900is closed there is no gap between the boss906on pad904and the corresponding pad903, as shown inFIG.10B, which shows a sectional view of the closed clamshell mold900. The boss906on pads904can form the openings804in the 3D dielectric substrate800shown inFIGS.5A and5B.

When the mold900is closed (FIG.6B), its two sections901aand901bform a cavity905that can be filled with a fiber-reinforced polymer, such as NEMA FR-4 glass epoxy laminate, glass-reinforced polyimide laminate, or ceramic-reinforced polytetrafluorethylene resin based laminate, for example, to form the 3D dielectric substrate800shown inFIGS.5A and5B. While the mold900shown inFIGS.6A and6Bhas three pads904with protruding bosses906, other embodiments can have a different number of pads904with bosses906, or only pads903without bosses. As shown inFIG.6B, the clamshell mold900can be built in such way that when it is closed it can have a gap between opposing ridges902and/or pads903with a width “G” that can be filled with dielectric material. The height of the bosses906can be the same or substantially the same as the width “G”. Since pads904have bosses906, there can be no gap between portions of the opposing surfaces of the mold900where the pads906are located.

In some embodiments, the 3D dielectric substrate800can be formed by machining the channels802, pads803and openings804in a dielectric plate made of a fiber-reinforced polymer, such as NEMA FR-4 glass epoxy laminate, glass-reinforced polyimide laminate, or ceramic-reinforced polytetrafluorethylene resin based laminate, for example. In those cases, the mold900would not be required.

FIG.6Cshows an alternate embodiment of the mold900where the side walls of ridges902, pads903and904and bosses906can have a draft angle920, with a range between about 0 degrees and about 5 degrees, to facilitate removing the 3D dielectric substrate800from mold900after molding step701(FIG.4). The draft angle920also can facilitate the electrolytic metallization step707(FIG.4).

Once the 3D dielectric substrate800is formed, it can undergo an inspection step702(FIG.4) followed by metallization703, and then coated with a resist film704that can cover the surfaces of sides801aand801b(FIGS.5A-5B) of the 3D dielectric substrate800, except its channels802and pockets803. The resist can be exposed to UV light and developed (steps705and706). The 3D dielectric substrate800then can undergo an electrolytic metallization step707where the channels802and pads803and openings804can be completely filled with a highly conductive material805(FIGS.7A-7B), such as copper or aluminum, for example. After electrolytic metallization, the resist can be stripped out from the surfaces of sides801aand801bin step708, followed by a micro-etch step709intended to remove the metallization applied in step703on the surfaces of sides801aand801b. In some cases, the high conductive material applied in the electrolytic metallization step707can protrude above the surfaces of sides801aand801b(i.e., it can overfill them) of the 3D dielectric substrate800, which is undesirable because it creates an uneven surface that can cause voids in subsequent lamination steps such as step712(FIG.4), for example. Such voids can weaken the PCB structure and/or hinder thermal conductivity across the PCB layers. A planarization step710can take place to make the outer surfaces of the high conductive traces and pads deposited on the 3D substrate flush with the surfaces of sides801aand801b.

The resulting structure after the planarization step710(FIG.4) is a two-layer PCB panel1000shown inFIGS.7A and7B, where the 3D dielectric substrate800has its channels802and pockets803in sides801aand801b(FIGS.5A and5B) filled with a highly conductive material805(FIGS.7A and7B) forming the conductive layers of the PCB panel1000. The traces and pads805that form the conductive layers of PCB panel1000are flush with sides801aand801b(FIGS.5A and5B).FIG.7Bshows a sectional view where the openings804(FIGS.5A and5B) are filled with the highly conductive material805forming a connection806between the conductive layers of the PCB panel1000.

FIG.7Cshows an alternate embodiment of the two-layer PCB panel1000where the 3D dielectric substrate800is formed in a mold900(FIGS.6A-6C) where the side walls of ridges902, pads903and904and bosses906have a draft angle920(FIG.6C) between about 0 degrees and about 5 degrees. In these embodiments, the channels802, pockets803and openings804of the 3D dielectric substrate800can have corresponding draft angles820, and those channels802, pockets803and openings804can be completely filled with the highly conductive material805during the electrolytic metallization step707(FIG.4).

In some embodiments where the final PCB can have more than two conductive layers, a plurality of PCB panels can be inspected (step711inFIG.4), stacked and laminated together in step712.FIG.8shows an example of a PCB1100comprising six conductive layers built with three PCB panels1000a,1000band1000cinterleaved with dielectric layers1005. The dielectric layers1005can be made of a fiber-reinforced polymer, as described herein. The PCB panels1000a,1000band1000ccan have the same or different layouts. For example, the PCB panel1000acan have two layers with thicknesses “T1” and “T2” respectively, PCB panel1000bcan have two layers with thicknesses “T3” and “T4” respectively, and PCB panel1000ccan have two layers with thicknesses “T5” and “T6”.

Embodiments of the PCB1100can be built with a combination of two and one-layer PCB panels. Other embodiments can have panels comprising conductive layers having the same thickness. Other embodiments yet can have some or all conductive layers having the same layout. Some embodiments of the PCB1100can have a combination of multiple panels with one or two conductive layers, some of the conductive layers can have the same thickness, and/or some of the conductive layers can have the same layout.

After the lamination process712(FIG.4), the PCB structure can undergo via drilling, metallization and plating as per steps713through722. Some embodiments of the PCB1100where lamination and via drilling is not required, the PCB1100can go from panel inspection (step711inFIG.4) straight to solder mask application, step723through726, and proceed through finishing steps727through732(FIG.4). In other embodiments, like the one shown inFIG.9, the lamination step712of the PCB1100can include external dielectric layers1010. In this case, the PCB1100would not need application of solder mask, thus undergoing the via drilling, metallization, and plating steps713through722, then going straight to the finishing steps727through732(FIG.4).

Some embodiments of the PCB structure can have traces and pads with different thicknesses in the same conductive layer.FIGS.10A and10Bshow an embodiment1200of a 3D dielectric substrate were a first side1201a, also referred to as “top side,” can have at least one channel and/or pocket1203with a depth “D2” different from the depth “D1” of the other channels and/or pockets1202in the side1201a. The 3D dielectric structure1200can have a second side1201b(also referred to as “bottom side”) opposite to the side1201awith its respective channels and pockets, similar to the embodiment depicted inFIGS.5A and5B. In that case, the 3D dielectric structure1200can have openings1204to connect the two sides of the 3D dielectric structure1200. In some embodiments, the 3D dielectric structure1200can have channels and/or pockets1202,1203in only one side, in which case the other side can be flat. Although, the embodiment depicted inFIGS.10A and10Bhas channels and/or pockets1202,1203with different depths on one side, it should be understood that other embodiments can have traces and/or pockets with different depths on both sides. Furthermore, some embodiments can have channels and/or pockets with many different depths. The 3D dielectric substrate1200can be formed from a fiber-reinforced polymer, as described herein.

In the electrolytic metallization step707(FIG.4) the channels and pockets of the 3D dielectric structure1200can be completely filled with highly conductive material1205, such as copper or aluminum, for example, forming conductive layers in a PCB structure1300.FIGS.11A and11Bdepict a PCB structure1300after the planarization step710(FIG.4) where the channels and/or pockets1202(FIG.10A) are filled with the highly conductive material1205forming traces and/or pads with thickness “T1” and the channels and/or pockets1203are filled with the highly conductive material1205forming traces and/or pads with thickness “T2”. The thicknesses “T1” and “T2” (FIG.11B) correspond to the depths “D1” and “D2” (FIG.10B), respectively, of the 3D dielectric structure1200. As depicted inFIGS.11A and11B, some embodiments of the PCB structure1300can have a highly conductive material1205deposited on both sides1201aand1201bof the structure. Other versions can have the conductive material deposited on only one side. In all embodiments, the outer surfaces of traces and pads of highly conductive material can be flush with the top (1201a) and/or bottom (1201b) sides of the PCB structure1300.

FIG.12shows a partial view of a PCB stator2000employed in an axial field rotary energy device similar to the one described in U.S. Pat. Nos. 10,141,803, 10,135,310, 10,340,760, 10,141,804, 10,186,922, and 11,502,583, for example. The PCB stator1200can have a plurality of conductive layers and each conductive layer can have a plurality of coils2001.

FIG.13shows an isolated coil2001of PCB stator2000. Hereinafter, coil2001can be referred to as coil2001a. Although coil2001ashown inFIG.13has three turns2002aand each turn2002ahas three traces2003ain parallel, other embodiments of the PCB stator2000can have coils2001awith 1, 2, 4 or more turns, and each turn in those embodiments can have 1, 2, 4 or more traces in parallel. Each of the traces2003ain coil2001acan be terminated in a pad2004a, or can merge with other traces to form a terminal2005that can be connected to another PCB stator or to a power supply. AlthoughFIG.13shows a coil2001awith a terminal2005, other embodiments of coil2001acan have traces2003aterminated in pads2004aat both ends of each trace2003a. Pad2004acan be connected to another pad in another coil located in another layer of the PCB stator2000, in some examples.

FIG.14depicts a sectional side view A-A of PCB stator2000showing coil2001awith its turns2002a, traces2003a, and pads2004alocated in a layer2030aand an adjacent coil2001blocated in a different layer2030bof the PCB stator2000. Coil2001bcan have turns2002band pads2004b. Each turn of coil2001bcan have traces2003b. The pads2004aand2004bof coils2001aand2001b, respectively, can be interconnected. AlthoughFIG.14shows a coil2001bsubstantially similar to coil2001ahaving three turns2002band each turn having three traces2003bin parallel, other embodiments of the PCB stator2000can have coils2001bwith any number of turns and any number of traces in parallel. Moreover, some embodiments of the PCB stator2000can have coils2001aand2002bwith different numbers of turns, respectively. In the embodiment shown inFIG.14, layers2030a, bcan be formed in the same 3D dielectric substrate2010, which together with the conductive traces2003aand2003bform a PCB panel2020. The PCB panel2020can be formed by completely filling the channels and pockets of the 3D dielectric substrate2010with a highly conductive material in a electrolytic metallization step707, as described in the process700shown inFIG.4. The PCB panel2020can undergo a planarization step710to make the outer surfaces of the highly conductive traces2003aand2003band pads2004aand2004bflush with the surfaces2020aand2020bof the PCB panel2020.

In the PCB stator2000embodiment shown inFIG.14, the thickness “T1” of layer2030aand thickness “T2” of layer2030bare the same or substantially the same. In other embodiments, however, the thicknesses “T1” and “T2” can be different.

Embodiments of the PCB stator2000can have a plurality of PCB panels2020connected in parallel and/or assigned to different electrical phases. The example of a PCB stator2000shown inFIG.15depicts a sectional side view of a 3-phase PCB stator2000with three panels, where each panel2001a,2001b, and2001ccan be assigned to a respective electrical phase. The 3-phase PCB stator2000shown inFIG.15can be used in an axial field rotary energy device. The PCB stator2000can have three, two-layer panels2001a,2001band2001claminated together with interleaved layers of a dielectric material2005and with external dielectric layers2010. As an example, panel2001ahas layers2001a1and2001a2. Each panel2001a-2001ccan be formed by depositing an electrically conductive material2002(e.g., step707in process700shown inFIG.4), such as copper, for example, into the channels and pockets formed in a 3D dielectric substrate2003. Some pockets2004can be interconnected to a corresponding pocket in the other layer of the PCB panel2020. As an example, pocket2004a1in layer2001a1of panel2001ais connected to pocket2004a2of layer2001a2of the same panel2001a. In the embodiment depicted inFIG.15, the thickness of the two layers in each panel can be the same. As an example, the thickness “T1” of layer2001a1of panel2001ais the same or substantially the same as thickness “T2” of layer2001a2of the same panel2001a, and the thicknesses of the layers2001b1,2001b2,2001c1and2001c2of the panels2001band2001c, respectively, can be the same or substantially the same as “T1” or “T2”. However, other embodiments may have different thicknesses “T1” and “T2” or can have different thicknesses in each one of the layers of each panel. Some embodiments of PCB stator2000can have more than one PCB panel (e.g.,2001a,2001band2001c) assigned to each corresponding phase, and other embodiments of PCB stator2000can have 1, 2 or more than 3 phases with a plurality of PCB panels assigned to each phase.

Other embodiments can include one or more of the following items.1. A printed circuit board (PCB), comprising:a tridimensional (3D) dielectric substrate having opposite sides and made of fiber-reinforced polymer;each side comprises channels and pockets formed by molding a dielectric laminate, and the channels and pockets define a layout for conductive traces and pads of the PCB;the channels and pockets in a same side of the 3D dielectric substrate have a uniform depth;side walls of the channels and pockets have a draft angle in a range of greater than 0 degrees to about 5 degrees;the conductive traces and pads are formed into the channels and pockets by electrolytic metallization; andthe outer surface of conductive traces and pads are flush with the sides of the 3D dielectric substrate.2. The PCB wherein the channels and pockets of a first side of the sides of the 3D dielectric substrate have a first depth, the channels and pockets of a second side of the sides of the 3D dielectric substrate have a second depth.3. The PCB wherein the first and second depths are the same or within 25 μm of each other.4. The PCB wherein the sides have a same layout.5. The PCB wherein each side has a different layout.6. The PCB wherein the first depth differs from the second depth.7. The PCB wherein the sides have a same layout.8. The PCB wherein each side has a different layout.9. The PCB further comprising a plurality of 3D dielectric substrates, wherein each side of the 3D dielectric substrates has a different layout.10. The PCB wherein the channels and pockets in each side have a different depth from those in another side.11. The PCB wherein the uniform depth of the channels and pockets is equal to or greater than 140 μm.12. A printed circuit board (PCB), comprising:a tridimensional (3D) fiber-reinforced polymer dielectric substrate having opposite sides;each side comprises channels and pockets formed by molding a dielectric laminate, and the channels and pockets define a layout for conductive traces and pads of the PCB;the channels and pockets in a same side of the 3D dielectric substrate have non-uniform depths;side walls of the channels and pockets have a draft angle in a range of greater than 0 degrees to about 5 degrees;the conductive traces and pads are formed into the channels and pockets by electrolytic metallization; andthe outer surface of conductive traces and pads are flush with the sides of the 3D dielectric substrate.13. A printed circuit board (PCB) stator for an axial field rotary energy device, the PCB stator comprising:PCB panels, each comprising a tridimensional (3D) dielectric substrate with opposite sides and made of fiber-reinforced polymer;each side comprises channels and pockets comprising molded dielectric laminate, the channels and pockets in each side have a uniform depth, and the channels and pockets comprise a layout of conductive traces and pads that are plated therein and the outer surface of those conductive traces and pads are flush with the sides of the 3D dielectric substrate; andside walls of the channels and pockets have a draft angle in a range of greater than 0 degrees to about 5 degrees.14. The PCB stator wherein the channels and pockets of a first side of the sides of the PCB panels have a first depth, the channels and pockets of a second side of the sides of the PCB panels have a second depth.15. The PCB stator wherein the first and second depths are the same or within 25 μm of each other.16. The PCB stator wherein the sides of each PCB panel have a same layout.17. The PCB stator wherein the sides of each PCB panel have a different layout.18. The PCB stator wherein the first depth differs from the second depth.19. The PCB stator wherein the sides of each PCB panel have a same layout.20. The PCB stator wherein the sides of each PCB panel have a different layout.21. The PCB stator wherein the uniform depth of the channels and pockets is equal to or greater than 140 μm.22. A method of manufacturing a printed circuit board (PCB), the method comprising:forming a tridimensional (3D) dielectric substrate on a fiber-reinforced polymer with opposite sides;forming each side with channels and pockets by molding dielectric laminate, and the channels and pockets define a layout for conductive traces and pads of the PCB;forming the channels and pockets in a same side of the 3D dielectric substrate at a uniform depth;forming side walls of the channels and pockets of the 3D dielectric substrate with a draft angle in a range of greater than 0 degrees to about 5 degrees;depositing by electrolytic metallization the conductive traces and pads into the channels and pockets of the 3D dielectric substrate; andthe outer surface of those conductive traces and pads are flush with the sides of the 3D dielectric substrate.23. The method wherein the channels and pockets of a first side of the sides comprise a first depth, and the channels and pockets of a second side of the sides comprise a second depth.24. The method wherein the first and second depths are the same or within 25 μm of each other.25. The method wherein the sides of the 3D dielectric substrate are formed with a same layout.26. The method wherein each side of the 3D dielectric substrate is formed with a different layout.27. The method wherein the first depth differs from the second depth.28. The method wherein the sides of the 3D dielectric substrate are formed with a same layout.29. The method wherein each side of the 3D dielectric substrate is formed with a different layout.30 A method of manufacturing a printed circuit board (PCB), the method comprising:forming a tridimensional (3D) fiber-reinforced polymer dielectric substrate with opposite sides;forming each side with channels and pockets by molding dielectric laminate, and the channels and pockets define a layout for conductive traces and pads of the PCB;forming the channels and pockets in a same side of the 3D dielectric substrate with non-uniform depths;forming side walls of the channels and pockets of the 3D dielectric substrate with a draft angle in a range of greater than 0 degrees to about 5 degrees; anddepositing by electrolytic metallization the conductive traces and pads into the channels and pockets of the 3D dielectric substrate; andthe outer surface of those conductive traces and pads are flush with the sides of the 3D dielectric substrate.31. A method of manufacturing a printed circuit board (PCB) stator for an axial field rotary energy device, the method comprising:forming a PCB panel as a tridimensional (3D) fiber-reinforced polymer dielectric substrate with opposite sides;each side comprises channels and pockets formed by molding dielectric laminate, and the channels and pockets define a layout for conductive traces and pads of the PCB stator;the channels and pockets in a same side of the 3D dielectric substrate have a uniform depth;side walls of the channels and pockets of the 3D dielectric substrate have a draft angle in a range of greater than 0 degrees to about 5 degrees; anddepositing by electrolytic metallization and forming the conductive traces and pads into the channels and pockets of the 3D dielectric substrate; andthe outer surface of those conductive traces and pads are flush with the sides of the 3D dielectric substrate.32. The method wherein the channels and pockets of a first side of the sides of the 3D dielectric substrate are formed at a first depth, and the channels and pockets of a second side of the sides of the 3D dielectric substrate are formed at a second depth.33. The method wherein the first and second depths are the same or within 25 μm of each other.34. The method wherein the first depth differs from the second depth.35. The method wherein the channels and pockets are formed with the uniform depth equal to or greater than 140 μm.

The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting. As used herein, the singular forms “a,” “an,” and “the” may be intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms “comprises,” “comprising,” “including,” and “having,” are inclusive and therefore specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The method steps, processes, and operations described herein are not to be construed as necessarily requiring their performance in the particular order discussed or illustrated, unless specifically identified as an order of performance. It is also to be understood that additional or alternative steps may be employed.

When an element or layer is referred to as being “on,” “engaged to,” “connected to,” or “coupled to” another element or layer, it may be directly on, engaged, connected or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being “directly on,” “directly engaged to,” “directly connected to,” or “directly coupled to” another element or layer, there may be no intervening elements or layers present. Other words used to describe the relationship between elements should be interpreted in a like fashion (e.g., “between” versus “directly between,” “adjacent” versus “directly adjacent,” etc.). As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.

Although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms may be only used to distinguish one element, component, region, layer or section from another region, layer or section. Terms such as “first,” “second,” and other numerical terms when used herein do not imply a sequence or order unless clearly indicated by the context. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the example embodiments.

Spatially relative terms, such as “inner,” “outer,” “beneath,” “below,” “lower,” “above,” “upper,” “top”, “bottom,” and the like, may be used herein for ease of description to describe one element's or feature's relationship to another element(s) or feature(s) as illustrated in the figures. Spatially relative terms may be intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the example term “below” can encompass both an orientation of above and below. The device may be otherwise oriented (rotated degrees or at other orientations) and the spatially relative descriptions used herein interpreted accordingly.

This written description uses examples to disclose the embodiments, including the best mode, and also to enable those of ordinary skill in the art to make and use the invention. The patentable scope is defined by the claims, and can include other examples that occur to those skilled in the art. Such other examples are intended to be within the scope of the claims if they have structural elements that do not differ from the literal language of the claims, or if they include equivalent structural elements with insubstantial differences from the literal languages of the claims.

In the foregoing specification, the concepts have been described with reference to specific embodiments. However, one of ordinary skill in the art appreciates that various modifications and changes can be made without departing from the scope of the invention as set forth in the claims below. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of invention.

It can be advantageous to set forth definitions of certain words and phrases used throughout this patent document. The term “communicate,” as well as derivatives thereof, encompasses both direct and indirect communication. The terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation. The term “or” is inclusive, meaning and/or. The phrase “associated with,” as well as derivatives thereof, can mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, have a relationship to or with, or the like. The phrase “at least one of,” when used with a list of items, means that different combinations of one or more of the listed items can be used, and only one item in the list can be needed. For example, “at least one of: A, B, and C” includes any of the following combinations: A, B, C, A and B, A and C, B and C, and A and B and C.

Moreover, various functions described herein can be implemented or supported by one or more computer programs, each of which is formed from computer readable program code and embodied in a computer readable medium. The terms “application” and “program” refer to one or more computer programs, software components, sets of instructions, procedures, functions, objects, classes, instances, related data, or a portion thereof adapted for implementation in a suitable computer readable program code. The phrase “computer readable program code” includes any type of computer code, including source code, object code, and executable code. The phrase “computer readable medium” includes any type of medium capable of being accessed by a computer, such as read only memory (ROM), random access memory (RAM), a hard disk drive, a compact disc (CD), a digital video disc (DVD), solid state drive (SSD), or any other type of memory. A “non-transitory” computer readable medium excludes wired, wireless, optical, or other communication links that transport transitory electrical or other signals. A non-transitory computer readable medium includes media where data can be permanently stored and media where data can be stored and later overwritten, such as a rewritable optical disc or an erasable memory device.

Also, the use of “a” or “an” is employed to describe elements and components described herein. This is done merely for convenience and to give a general sense of the scope of the invention. This description should be read to include one or at least one and the singular also includes the plural unless it states otherwise.

The description in the present application should not be read as implying that any particular element, step, or function is an essential or critical element that must be included in the claim scope. The scope of patented subject matter is defined only by the allowed claims. Moreover, none of the claims invokes 35 U.S.C. § 112 (f) with respect to any of the appended claims or claim elements unless the exact words “means for” or “step for” are explicitly used in the particular claim, followed by a participle phrase identifying a function.

Benefits, other advantages, and solutions to problems have been described above with regard to specific embodiments. However, the benefits, advantages, solutions to problems, and any feature(s) that can cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, sacrosanct or an essential feature of any or all the claims.

After reading the specification, skilled artisans will appreciate that certain features which are, for clarity, described herein in the context of separate embodiments, can also be provided in combination in a single embodiment. Conversely, various features that are, for brevity, described in the context of a single embodiment, can also be provided separately or in any subcombination. Further, references to values stated in ranges include each and every value within that range.