Patent ID: 12254286

EMBODIMENTS OF INVENTION

Outline of Illustrative Embodiments

According to illustrative embodiments of the present invention, in the case of generating three states required for signal processing by using two random numbers, if the value of a first random number is a predetermined value, a second random number following the first random number is not used, and if the value of the first random number is not the predetermined value, the second random number is used. This method allows three states used for signal processing to be generated out of four states logically obtained by two sequences of random numbers. Since the second random number is not used if the first random number is the predetermined value, the overall consumption of random numbers can be reduced. This method can also be applied to the cases of three or more sequences of binary random numbers, as described below.

Illustrative embodiments of the present invention are described in detail below with reference to the drawings. However, components described in the following illustrative embodiments are merely examples and are not intended to limit the technical scope of the present invention to them.

1. FIRST ILLUSTRATIVE EMBODIMENT

According to the first illustrative embodiment of the invention, it is decided whether a first random number generated by a first random number generator is a predetermined value. If it is the predetermined value, a second random number generated by a second random number generator is not used, and if it is not the predetermined value, the second random number is used. Accordingly, if the first random number is the predetermined value, no random number is consumed, thus as a whole reducing consumption of random numbers. Since the second random number consumes less than the first random number, the second random number generator can operate at a speed lower than the first random number generator. Taking a binary a/b random number as an example, the first illustrative embodiment will be explained below. Note that if one of a and b is 0, the other takes the value of 1.

As illustrated inFIG.1, a random number supply device100according to the first illustrative embodiment inputs two sequences of random numbers, RN1and RN2, from the random number generator101and the random number generator102, respectively, and outputs O1and O2for indicating three states. The random number supply device100includes a decision section103and a memory104. The random number supply device100may have two systems of random number generators101and102inside. The random number generator101generates the random number RN1according to clock CLK1. The random number generator102generates the random number RN2according to clock CLK2having a clock speed lower than the clock CLK1. Although it is desirable that the random number generators101and102are hardware random number generators using thermal noise, photon detection, etc., the present illustrative embodiment may be also applicable to the case of pseudo-random number generators.

The random number RN1generated by the random number generator101is output as output O1of the random number supply device100and is entered into the decision section103. The random number RN2generated by the random number generator102is sequentially stored in the memory104and is sequentially read out from the top in response to the read signal.

The decision section103decides whether RN1is a predetermined value (here, the predetermined value a). If RN1is the predetermined value a, the decision section103does not output the read signal to the memory104but can output a value other than a random number (a predetermined, fixed value or Don't-Care bit) as output O2to the signal processing unit105. Hereinafter, the predetermined, fixed value or Don't-Care bit of the output O2shall be denoted as “X”. In other words, for the signal processing unit105, if output O1=a, the signal processing function is determined and the value of output O2has no effect.

If RN1is a value other than the predetermined value (here the value is b), the decision section103outputs the read signal to the memory104. The memory104, each time the read signal is input, sequentially reads the accumulated random numbers RN2from the top and outputs them as output O2of the random number supply device100. The read random numbers RN2are sequentially deleted from the memory104. In this embodiment, the memory104does not read the accumulated random numbers when inputting no read signal. Instead of the decision section103outputting X, the processor including the decision section103or the memory104may output O2as X at the timing of the output O1.

As described above, the random number supply device100can generate three states S1, S2, and S3depending on outputs O1and O2and output them to the signal processing unit105, as illustrated in a conversion table T inFIG.1. In other words, when RN1=O1=a, state S1can be indicated regardless of the value of O2, and when RN1=O1=b, state S2can be indicated if RN2=O2=a, and state S3can be indicated if RN2=O2=b. The signal processing unit105executes signal processing according to any of the states S1to S3identified by the outputs O1and O2of the random number supply device100, depending on the state concerned. In particular, the signal processing unit105always executes the signal processing according to the state S1if the value of the output O1is a.

In the configuration illustrated inFIG.1, the random number RN1input from the random number generator101is output as output O1. Alternatively, the random number RN1may be temporarily stored in a memory (not shown). In other words, the random number supply device100may be configured to have a first memory for storing the random number RN1and a second memory (the memory104mentioned above) for storing the random number RN2. The random number RN1stored in the first memory may be read according to the clock of the random number supply device100and is subjected to decision by the decision section103.

The functions of the random number supply device100can be realized by hardware of the decision unit103and the memory104, or by hardware of a processor having the functions of the decision section103and the memory104. Alternatively, the functions shown in the conversion table T can be implemented by software executing programs on the processor. Next, with reference toFIG.2, the case will be described where the processor reads the random number supply control program from the memory and executes the program.

As illustrated inFIG.2, the processor, when inputting a single random number RN1from the random number generator101(Operation201), decides whether the RN1is equal to a predetermined value a (Operation202; operation of the decision section103). If the value of RN1is equal to the value a (YES in operation202), the processor sets the output O2to X (Operation203). If the value of RN1is not the value a (NO in Operation202), the processor reads the stored random number RN2as output O2from the memory104(Operation204). Thus, the processor outputs the RN1input from the random number generator101and the RN2or X read from the memory104as output O1and output O2, respectively (Operation205). By sequentially inputting the random numbers RN1according to the clock CLK1and repeating the above operations201to205, the processor can supply the signal processing unit105with two sequences of random numbers for randomly selecting the three states S1to S3.

As described above, according to the first illustrative embodiment of the present invention, it is decided whether the random number RN1is the predetermined value, and if RN1is the predetermined value, then the random number stored in the memory104is not consumed. If RN1is not the predetermined value, then the random number RN2stored in the memory104is used. In this manner, the random number RN1and the stored random number RN2are output to the signal processing unit105as random numbers O1and O2for signal processing. If RN1is the predetermined value, the random number RN2stored in the memory104is not used, enabling reductions in consumption of the stored random number RN2in the memory104. Accordingly, the random number generator102having an operation speed lower than the random number generator101can be used to generate the random number RN2.

2. SECOND ILLUSTRATIVE EMBODIMENT

According to the second embodiment of the present invention, it is possible to generate three states similar to the first illustrated embodiment by pooling random numbers generated by a random number generator in a memory and controlling the reading of random numbers from the random number pool. That is, it is decided whether the value of a first random number read from the random number pool is a predetermined value. If it is the predetermined value, no random number is read from the random number pool, and if it is not the predetermined value, a second random number is read from the random number pool. Accordingly, if the first random number is the predetermined value, no random numbers are consumed, thus reducing the amount of consumed random number. Taking a binary a/b random number as an example, the second illustrative embodiment will be explained below. Note that if one of a and b is 0, the other takes the value of 1.

As illustrated inFIG.3, a random number supply device100according to the second illustrative embodiment inputs random numbers RN from one or more random number generators and stores them in a random number pool301provided within a memory. The random number generator is preferably a hardware random number generator using thermal noise, photon detection, or the like. However, the present embodiment is applicable even to the case of a pseudo-random number generator. The random number pool301is subjected to read control by a control section functioning as a decision section302, and outputs random number RNOUTto a signal processing unit303, which identifies one of the three states according to the random number RNOUT. It is assumed that the random number pool301, the decision section302, and the signal processing unit303operate according to clock CLK.

When a random number RN1is read from the random number pool301, the decision section302decides whether the value of the input random number RN1is a predetermined value a. If RN1=a, the decision section302sends an X notification indicating Don't Care to the signal processing unit303. If RN1is a value b other than a, the decision section302outputs a read signal to the random number pool301. The random number pool301, each time inputting the read signal, sequentially reads random numbers RN2while deleting the read RN2. Thus, only a set of RN1and RN2following RN1or RN1with X notification is output as random number RNOUTto the signal processing unit303.

Therefore, as in the case of the conversion table T illustrated inFIG.1, the random number supply device100can generate three states S1, S2, and S3by using the random number RNOUTinstead of the outputs O1and O2. In other words, when RN1=a, state S1is indicated unconditionally, when RN1=b, state S2is indicated if the subsequent random number RN2=a, and state S3is indicated if RN2=b.

The functions of the random number supply device100illustrated inFIG.3can be implemented by hardware such as a memory of the random number pool301and the decision section302. Alternatively, the same functions can be implemented by executing programs on a processor. Hereinafter, referring toFIG.4, the case where the processor reads and execute a random number supply control program from the memory will be described.

As illustrated inFIG.4, the processor reads a random number RN1from the random number pool301(Operation401) and decides whether the value of the random number RN1is a predetermined value a (Operation402). The random number RN1is output as a random number RNOUTto the signal processing unit303. Then, if RN1=a (YES in Operation402), the processor sends an X notification indicating Don't Care to the signal processing unit303so as to indicate that there is no random number following the RN1(Operation403). If RN1is a value b other than a (NO in Operation402), the processor reads a random number RN2following the random number RN1from the random number pool301and outputs it to the signal processor303(Operation404). The read random number RN2is deleted from the random number pool301.

Thus, if RN1=b, the state S2or S3is determined depending on the value of RN2that follows RN1and is notified to the signal processing unit303. If RN1=a, an X notification indicating that there is no random number that follows it is output to the signal processing unit303. The signal processing unit303, when receiving the X notification, executes the signal processing for the state S1identified by O1=RN1=a and O2=RN2=X in the conversion table T shown inFIG.1. By repeating the above operations401to404according to the clock CLK, the processor can supply the signal processing section303with a random number sequence that randomly selects the three states S1to S3.

As described above, according to the second illustrative embodiment of the present invention, if the random number RN1read from the random number pool301is the predetermined value, the subsequent random number RN2is not read from the random number pool301. If the random number RN1is not the predetermined value, the subsequent random number RN2is read from the random number pool301. This reduces the amount of consumed random number in the random number pool because the random number RN2is consumed only when the random number RN1is not the predetermined value.

3. THIRD ILLUSTRATIVE EMBODIMENT

According to the third illustrative embodiment of the present invention, the number of logical states, 4 (=22), in the first and second illustrative embodiments is generalized to 2nstates (n is an integer greater than or equal to 2), and random numbers are supplied to signal processing that uses only the number of states greater than 2n-1and smaller than 2nout of the 2nstates. In this method, the consumption of random numbers can be saved by focusing on the unused states. The basic method of the present embodiment will be briefly explained with reference toFIG.5.

A table shown inFIG.5illustrates eight logical states generated by the random number supply device100when n=3. According to the present embodiment, a set of RN1, RN2and RN3is regarded as a 3-bit binary number. By comparing the first 1 bit (RN1) or the first 2 bits (RN1, RN2) to a designated value, the consumption of random numbers in unused states can be avoided. For example, by using “1” as the designated value for the first 1 bit, 5 (=23−3) states can be generated. By using “10” or more as the designated value for the first 2 bits, i.e. the designated values of “10” and “11”, 6 (=23−2) states can be generated. By using “11” as the designated value for the first 2 bit, 7 (=23−1) states can be generated. In the case of n=4 or more, a desired number of states greater than 2n-1and smaller than 2ncan be easily generated by setting multiple designated values greater than or equal to n-bit value RN1. . . RNn corresponding to the desired number of states.

In the following, an integer m greater than 0 and smaller than n (an integer of 2 or more) is used to denote a m-bit designated value as “b1 . . . bm”. For example, in the case of n=3 shown inFIG.5, if the number of designated states is 6, the corresponding most significant 2-bit designated value “b1b2” is “10”. Accordingly, it is sufficient to set the designated value “10” and the larger designated value “11”.

3.1) Configuration

As illustrated inFIG.6, a random number supply device100according to the third illustrative embodiment inputs random numbers RN from one or more random number generators and stores them in a memory501. The random number generator is preferably a hardware random number generator using thermal noise, photon detection, or the like. However, the present embodiment is applicable even to the case of a pseudo-random number generator. The memory501is subjected to read control by a processor502to generate n-bit random number RNOUTfor identifying any one of designated states the number of which is greater than 2n-1and smaller than 2n. The n-bit random number RNOUTmay be output in series to the signal processing unit504as in the second illustrative embodiment. Alternatively, as illustrated inFIG.6, the n-bit random number RNOUTmay be output sequentially to a shift register503, which outputs n-bit parallel output O1-On to the signal processing unit504.

The processor502implements the random number supply function according to the present embodiment by executing programs read from a program memory505. As described below, the processor502each time reading a random number RN from the memory501, compares the random number RN with an m-bit designated value, and decides whether to use random numbers for the remaining bits. The random number supply operation in the present embodiment will be described below with reference toFIG.7.

3.2) Random Number Supply Operation

As illustrated inFIG.7, the processor502sets one or more m-bit designated value (Operation601). Then, the processor502sequentially reads random numbers RN from the memory501(Operation602), and decides whether a read random number sequence “RN1. . . RNm” matches the one or more m-bit designated value (Operation603). If a match is found (YES in Operation603), the processor502fills the (n-m) bits following the random number sequence “RN1. . . RNm” with X indicating Don't Care, and outputs n-bit output n-RN=“RN1. . . RNmXX . . . X,” to the signal processing unit504(Operation604). If no match is found (NO in Operation603), the processor502sequentially reads random numbers from the memory501and puts each read random number into a bit position from the mismatch bit position on down, thereby outputting n-bit output n-RN=“RN1. . . RNn” to the signal processing unit504(Operation605). Note that the read random numbers are sequentially deleted from the memory501.

As described above, according to the third illustrative embodiment of the present invention, if a random number sequence read from the memory501matches the designated value, the subsequent random numbers are not used, thus suppressing the consumption of random numbers.

4. EXAMPLE

According to an example of the present invention, a communication device will be described below, in which a random number supply device100according to the first to third illustrative embodiments described above supplies random numbers to an intensity modulator that modulates the intensity of optical pulses. The intensity modulator of the communication device corresponds to the signal processing unit105,303or504in the first to third illustrative embodiments. In this example, the case where the intensity of an optical pulse is changed among three levels will be described. Therefore, the random number supply device100supplies the intensity modulator with three-state random number output O1and O2corresponding respectively to the three intensity levels.

Referring toFIG.8, the intensity modulator of the communication device includes a dual-electrode intensity modulator701and a drive circuit702. The random number supply device100inputs random number RN from a hardware random number generator703and supplies random numbers O1and O2indicating the three states to the drive circuit702. Since the functions and operations of the random number supply device100are as described in the first to third illustrative embodiments above, detailed descriptions are omitted.

The dual-electrode intensity modulator701has a configuration such that phase shifters701A and701B are provided on respective ones of branched optical paths. The amounts of phase shift at the phase shifters701A and701B are determined depending on drive voltages supplied by the drive circuit702, respectively. In the dual-electrode intensity modulator701, a transmission optical pulse P is branched into two branched pulses, which are phase-shifted respectively by the phase shifters701A and701B before combined. By controlling the amounts of phase shift by the phase shifters701A and701B, the intensity of the combined pulse can be set at any one of the three levels. InFIG.8, the combined pulse can be set at “High” intensity when the phase shift amount Φ1of the phase shifter701A and the phase shift amount Φ2of the phase shifter701B are (0, 0), at “Medium” intensity when (θ, 0), and at “Weak” intensity when (0, 180°). Note that 0<θ<180°, where θ is the value at which the predetermined “Medium” intensity is obtained.

The drive circuit702varies the drive voltage applied to each electrode of the phase shifters701A and701B according to the state S1, S2or S3identified by the random numbers O1and O2supplied from the random number supply unit100. As shown inFIG.8, the phase shift amounts Φ1and Φ2are changed so that the intensity of the combined pulse becomes “High” when the random numbers O1and O2indicate the state S1, “Medium” when they indicate the state S2, and “Weak” when they indicate the state S3.

In the present example, the random number supply device100according to the first and second illustrative embodiments described above is used to generate three states for signal processing to change the intensity of optical pulses in three levels. Alternatively, the random number supply device according to the third illustrative embodiment may be applied to the case of a signal processing unit that is operable in any of states, the number of which is more than 2n-1and less than 2n. For example, the random number supply device100with n=3 in the third illustrative embodiment may be employed in the case of a modulator that changes the phase or intensity of optical pulses in five levels.

The three-level intensity modulation may also be implemented by a configuration in which two intensity modulators each controlling the amount of phase shift are connected in series, in place of a dual-electrode intensity modulator701. In addition, a dual-electrode Mach-Zehnder (MZ) modulator may be employed as the dual-electrode intensity modulator701. An MZ modulator can perform both or one of intensity modulation and phase modulation for optical pulses by controlling drive voltages.

5. QKD SYSTEM

The first to third illustrative embodiments and the example as described above may be applicated to random number supply in quantum key distribution (QKD) systems. In particular, a decoy method which is designed to vary the intensity of optical pulses is capable of detecting the presence or absence of a PNS attack. Accordingly, it is considered that the decoy system is essential for the practical application of QKD systems.

In decoy systems, it is common to use a 3-level intensity. The optical pulse of “High” intensity is used as signal, and information obtained from a sequence of such optical pulses is used as a quantum cryptographic key. On the other hand, the optical pulses of “Medium” and “Weak” intensities are used as decoy pulses to detect eavesdropping. In a QKD system using the decoy method, most of the transmission pulses are used as signal, and some are used as decoy pulses of “Medium” or “Weak” intensity.

Hereinafter, a unidirectional QKD system using the above example for decoy intensity modulation will be described below with reference toFIGS.9-11. The above example can be applied not only to unidirectional but also to bidirectional QKD systems as well.

As illustrated inFIG.9, a unidirectional QKD system includes a transmitter (Alice) and a receiver (Bob) connected by an optical fiber. Quantum keys can be distributed from Alice to Bob using various quantum key distribution algorithms.

Alice includes a laser source801, an intensity modulator802, an asymmetric interferometer803, an intensity and phase modulator804, an attenuator805, a random number supply unit806, a hardware random number generator807, and other synchronization and control units (not shown). Bob includes a phase modulator811, an asymmetric interferometer812, photon detectors813and814, and other synchronization and control units (not shown). Alice's asymmetric interferometer803and Bob's asymmetric interferometer812have the same configuration.

The random number supply unit806inputs random numbers from the hardware random number generator807, outputs random numbers O1and O2for decoy to the intensity modulator802, and outputs random numbers for basis and information bits to the intensity and phase modulator804. The random numbers O1and O2for decoy represent three states and can be generated by the random number supply device according to the first to third illustrative embodiments or the example as described above. According to the above-mentioned embodiments and example of the present invention, the random numbers O1and O2representing the three states can suppress the consumption of hardware random numbers, compared to the case where two sequences of random numbers are used as they are.

InFIG.9, an optical pulse sequence output from the laser source801is modulated in three levels of optical intensity (High, Medium, and Weak) by the intensity modulator802according to the random numbers O1and O2. An example of a decoy pulse sequence is shown inFIG.10. In the decoy pulse sequence, the “High” intensity pulse μ is used for signal and the “Medium” intensity pulse μ′ is used for decoy.

Each optical pulse in the decoy pulse sequence is split in time into two pulses P1and P2(double pulse) by passing through the asymmetric interferometer803. A double pulse sequence is phase-modulated by the intensity and phase modulator804according to random numbers for basis and information bits: 0 and π for binary phase; 0, π/2, π and 3π/2 for phase quadrature; and so on.

As an example, it is assumed that a double pulse DP1of “High” intensity optical pulse μ is followed by a double pulse DP2of “Medium” intensity optical pulse μ′. The intensity phase modulator804performs phase modulation (φA) on the leading pulse P1of a double pulse DP1, and phase modulation (φA) on the leading pulse P1of the subsequent double pulse DP2. The double pulses DP1, DP2. . . are phase-modulated in this way and then sent out to Bob through the attenuator805.

Bob's phase modulator811performs phase modulation (φB) on an arriving double pulse, for instance its trailing pulse P2, according to a random number for the basis. Accordingly, the leading pulse of the arriving double pulse has been phase modulated (φA) at Alice, and the trailing pulse thereof is phase modulated (φB) at Bob. Therefore, as this double pulse pass through the interferometer812, the leading and trailing pulses interfere with each other, and the interference result is detected by the photon detectors813and814. In other words, for each double pulse, information can be detected from the phase difference between the leading and trailing pulses. Furthermore, since the intensity is randomly varied for each double pulse by Alice's intensity modulator802, PNS attacks can be detected by monitoring a statistical change in the number of received photons caused by a PNS attack.

Decoy pulses can be generated according to a specification as illustrated inFIG.11. As an example, regarding the intensity of a pulse, a decoy pulse μ′ is 0.4, and the weak pulse (vacuum) is 0 in reference to a signal pulse μ. In general, the mixing ratio in a decoy pulse sequence is 90% for signal pulse μ, 6% for decoy pulse μ′, and 4% for vacuum.

6. SUPPLEMENTARY NOTES

The whole or part of the example embodiments disclosed above can be described as, but not limited to, the following supplementary notes.

(Supplementary Note 1)

A random number supply device that generates three states required for operation of a signal processing unit from two-bit random number, the device comprising:a decision section configured to decide whether a first random number matches a predetermined value, the first random number is generated by a first random number generator; anda control section configured to supply the signal processing unit with the two-bit random number including the first random number by not using a second random number generated by a second random number generator when the first random number matches the predetermined value, and by using the second random number when the first random number does not match the predetermined value.
(Supplementary Note 2)

The random number supply device according to supplementary note 1, wherein the control section is configured to:supply the signal processing unit with the first random number and an arbitrary value when the first random number matches the predetermined value; andsupply the signal processing unit with the first random number and the second random number generated by the second random number generator when the first random number does not match the predetermined value.
(Supplementary Note 3)

The random number supply device according to supplementary note 1 or 2, further comprising a memory unit that stores second random numbers generated by the second random number generator, wherein the control section is configured to read the second random number from the memory unit when the first random number does not match the predetermined value.

(Supplementary Note 4)

The random number supply device according to any one of supplementary notes 1-3, wherein a random number generation rate of the second random number generator is lower than that of the first random number generator.

(Supplementary Note 5)

A random number supply device that supplies a n-bit random number to a signal processing unit that operates according to the n-bit random number (n is an integer equal to or greater than 2), the device comprising:a memory unit that stores random numbers generated by at least one random number generator;a decision section configured to decide whether at least one random number read from the memory unit matches at least one predetermined value; anda control section configured to: when the at least one random number matches the at least one predetermined value, supply the signal processing unit with n-bit random number consisting of the at least one random number and an arbitrary value stored at remaining bit positions following the at least one random number; and when the at least one random number does not match the at least one predetermined value, supply the signal processing unit with n-bit random number consisting of matched random numbers of the at least one random number and further random numbers read from the memory stored at bit positions from a mismatch bit position on down.
(Supplementary Note 6)

The random number supply device according to supplementary note 5, wherein the signal processing unit is controlled according to a number of states greater than 2n-1but smaller than 2nby 1 or more, wherein 2nstates are logically indicated by the n-bit random number.

(Supplementary Note 7)

The random number supply device according to supplementary note 5 or 6, wherein the decision section is configured to decide whether a first random number of one bit read from the memory unit matches one predetermined value; andthe control section is configured to: when the first random number matches the one predetermined value, supply the signal processing unit with the first random number and an arbitrary value; and when the first random number does not match the one predetermined value, read a second random number from the memory unit to supply the signal processing unit with the first random number and the second random number.
(Supplementary Note 8)

The random number supply device according to supplementary note 5 or 6, wherein the decision section is configured to decide whether a m-bit random number sequence read from the memory unit matches a plurality of m-bit predetermined values, wherein m is an integer and 0<m<n; andthe control section is configured to: when the m-bit random number sequence matches any one of the plurality of m-bit predetermined values, supply the signal processing unit with n-bit random number consisting of the m-bit random number sequence and an arbitrary value stored at remaining bit positions following the m-bit random number sequence; and when the m-bit random number sequence does not match any one of the plurality of m-bit predetermined values, supply the signal processing unit with n-bit random number consisting of matched random numbers of the m-bit random number sequence and further random numbers read from the memory stored at bit positions from a mismatch bit position on down.
(Supplementary Note 9)

The random number supply device according to any one of supplementary notes 1-8, wherein the signal processing unit is a modulator that performs modulation in at least one of intensity and phase of a transmission signal.

(Supplementary Note 10)

A communication device performs signal processing using random numbers supplied by the random number supply device according to any one of supplementary notes 1-9.

(Supplementary Note 11)

A communication device at transmitting side in a quantum key distribution (QKD) system, the communication device performing intensity modulation on transmission optical pulses according to random numbers supplied by the random number supply device according to any one of supplementary notes 1-9.

(Supplementary Note 12)

A random number supply method that generates three states required for operation of a signal processing unit from two-bit random number, the method comprising:by a decision section, deciding whether a first random number matches a predetermined value, the first random number is generated by a first random number generator; andby a control section, supplying the signal processing unit with the two-bit random number including the first random number by not using a second random number generated by a second random number generator when the first random number matches the predetermined value, and by using the second random number when the first random number does not match the predetermined value.
(Supplementary Note 13)

A random number supply method for supplying a n-bit random number to a signal processing unit that operates according to the n-bit random number (n is an integer equal to or greater than 2), the method comprising:storing random numbers generated by at least one random number generator in a memory unit;by a decision section, deciding whether at least one random number read from the memory unit matches at least one predetermined value; andby a control section,when the at least one random number matches the at least one predetermined value, supplying the signal processing unit with n-bit random number consisting of the at least one random number and an arbitrary value stored at remaining bit positions following the at least one random number; andwhen the at least one random number does not match the at least one predetermined value, supplying the signal processing unit with n-bit random number consisting of matched random numbers of the at least one random number and further random numbers read from the memory stored at bit positions from a mismatch bit position on down.
(Supplementary Note 14)

The random number supply method according to supplementary note 13, wherein the signal processing unit is controlled according to a number of states greater than 2n-1but smaller than 2nby 1 or more, wherein 2nstates are logically indicated by the n-bit random number.

(Supplementary Note 15)

The random number supply method according to supplementary note 13 or 14, wherein by the decision section, it is decided whether a first random number of one bit read from the memory unit matches one predetermined value; andby the control section,when the first random number matches the one predetermined value, the signal processing unit is supplied with the first random number and an arbitrary value; andwhen the first random number does not match the one predetermined value, a second random number is read from the memory unit to supply the signal processing unit with the first random number and the second random number.
(Supplementary Note 16)

The random number supply method according to supplementary note 13 or 14, wherein by the decision section, it is decided whether a m-bit random number sequence read from the memory unit matches a plurality of m-bit predetermined values, wherein m is an integer and 0<m<n; andby the control section,when the m-bit random number sequence matches any one of the plurality of m-bit predetermined values, the signal processing unit is supplied with n-bit random number consisting of the m-bit random number sequence and an arbitrary value stored at remaining bit positions following the m-bit random number sequence; andwhen the m-bit random number sequence does not match any one of the plurality of m-bit predetermined values, the signal processing unit is supplied with n-bit random number consisting of matched random numbers of the m-bit random number sequence and further random numbers read from the memory stored at bit positions from a mismatch bit position on down.
(Supplementary Note 17)

The random number supply method according to any one of supplementary notes 13-16, wherein the signal processing unit is a modulator that performs modulation in at least one of intensity and phase of a transmission signal.

(Supplementary Note 18)

A communication device at transmitting side in a quantum key distribution (QKD) system, comprising:a decoy intensity modulator that performs intensity modulation on optical pulses according to random numbers;a decision section configured to decide whether a first random number matches a predetermined value, the first random number is generated by a first random number generator; anda control section configured to: supply the decoy intensity modulator with the first random number and an arbitrary value when the first random number matches the predetermined value; and supply the decoy intensity modulator with the first random number and a second random number generated by a second random number generator when the first random number does not match the predetermined value.
(Supplementary Note 19)

A communication device at transmitting side in a quantum key distribution (QKD) system, comprising:a decoy intensity modulator that performs intensity modulation on optical pulses according to random numbers;a memory unit that stores random numbers generated by at least one random number generator;a decision section configured to decide whether a first random number read from the memory unit matches the predetermined value; anda control section configured to: when the first random number matches the predetermined value, supply the decoy intensity modulator with the first random number and an arbitrary value; and when the first random number does not match the predetermined value, read a second random number from the memory unit to supply the decoy intensity modulator with the first random number and the second random number.
(Supplementary Note 20)

A program for functioning a computer as a device for supplying a random number to a signal processing unit that operates according to the random numbers, the program implementing functions of:deciding whether a first random number matches a predetermined value, the first random number is generated by a first random number generator; andsupplying the signal processing unit with the two-bit random number including the first random number by not using a second random number generated by a second random number generator when the first random number matches the predetermined value, and by using the second random number when the first random number does not match the predetermined value.
(Supplementary Note 21)

A program for functioning a computer as a device for supplying n-bit (n is an integer equal to or greater than 2) random number to a signal processing unit that operates according to the n-bit random numbers, the program implementing functions of:storing random numbers generated by at least one random number generator in a memory unit;deciding whether at least one random number read from the memory unit matches at least one predetermined value; andwhen the at least one random number matches the at least one predetermined value, supplying the signal processing unit with n-bit random number consisting of the at least one random number and an arbitrary value stored at remaining bit positions following the at least one random number; and when the at least one random number does not match the at least one predetermined value, supplying the signal processing unit with n-bit random number consisting of matched random numbers of the at least one random number and further random numbers read from the memory stored at bit positions from a mismatch bit position on down.

INDUSTRIAL APPLICABILITY

The present invention is generally applicable to random number supply devices such as information processing devices and communication devices that need random numbers for signal processing.

EXPLANATION OF SIGNS

100Random number supply device101,102Random number generator103Decision section104Memory105Signal processing unit301Random number pool302Decision section303Signal processing unit501Memory502Processor503Shift register504Signal processing unit505Program memory701Dual-electrode intensity modulator701A,701B Phase shifter702Drive circuit703Hardware random number generator801Laser source802Intensity modulator (Decoy)803Asymmetric interferometer804Intensity and phase modulator805Attenuator806Random number supply unit807Hardware random number generator811Phase modulator (Basis)812Asymmetric interferometer813,814Photon detector