Patent ID: 12203871

DESCRIPTION OF THE EMBODIMENTS

FIG.1is a block diagram of elements in a detecting apparatus100according to an embodiment of the disclosure. With reference toFIG.1, the detecting apparatus100includes (but is not limited to) a memory110and a processor130.

The memory110may be any type of fixed or removable random access memory (RAM), read only memory (ROM), flash memory, a hard disk drive (HDD), a solid-state drive (SSD), or the like. In an embodiment, the memory110is configured to store codes, software modules, configuration, data (e.g., defect information, a center-of-gravity position, uniformity, an evaluation value, or a grade), or files, and will be described in detail in subsequent embodiments.

The processor130is coupled to the memory110. The processor130may be a central processing unit (CPU), a graphic processing unit (GPU), or any other programmable general-purpose or special-purpose microprocessor, digital signal processor (DSP), programmable controller, field programmable gate array (FPGA), application-specific integrated circuit (ASIC), or other similar elements or a combination of the above elements. In an embodiment, the functions of the processor130may be realized in a stand-alone device, an integrated circuit (IC), or software. In an embodiment, the processor130is configured to execute all or some operations of the detecting apparatus100, and may load and execute the software modules, files, and data stored in the memory110.

The method according to embodiments of the disclosure accompanied with the elements and modules in the detecting apparatus100will be described below. Each process of the method may be adjusted depending on the implementation circumstances, and is not limited by the disclosure.

FIG.2is a flowchart of an ingot evaluation method according to an embodiment of the disclosure. With reference toFIG.2, the processor130obtains defect information of a wafer from an ingot (step S210). Specifically, the ingot may be produced from silicon carbide or other semiconductor materials. The ingot may be cut to produce one or more wafers to be tested. It is worth noting that the wafer may contain multiple crystal defects, for example, basal plan dislocation (BPD), threading edge dislocation (TED), and threading screw dislocation (TSD). An optical detection apparatus (e.g., an automated optical inspection (AOI) apparatus or a wafer detection apparatus) may detect defects on dies in the wafer to generate defect information. In an embodiment, the defect information may include a position of one or more defects identified by optical detection. The position may be coordinates, a relative position, or other position representative values. In another embodiment, the defect information may include a defect type of the detected defect, for example, basal plan dislocation, threading edge dislocation, threading screw dislocation, and so on.

The processor130determines a center-of-gravity position of one or more defects according to the defect information (step S230). Specifically, the processor130may reconstruct each of the various detected defects on a surface of an imaginary wafer according to the position of the defect, and calculate the overall center of gravity of the position of the defect of each type. For example, assuming that the wafer is complete, the processor130may obtain the center-of-gravity position by adding up positions of all defects of a certain type relative to a center of the wafer and dividing the sum by the number thereof (i.e., obtaining an average position). For another example, if the wafer to be tested has a flat edge or a notch, the processor130may obtain the center-of-gravity position by averaging positions of defects within a range whose radius is from the center to the flat edge or the notch. It should be noted that the center of the wafer may be a geometric center of the wafer or other specified positions.

The processor130evaluates uniformity of the one or more defects according to the center-of-gravity position (step S250). Specifically, with the center of the wafer, the origin of the coordinate system, or other designated centers taken as a reference point, the uniformity increases as a distance between the center-of-gravity position and the reference point decreases; the uniformity decreases as a distance between the center-of-gravity position and the reference point increases. Experiments show that the uniformity is related to quality of a processed wafer. If the uniformity is higher, the quality of the processed wafer may higher. If the uniformity is lower, the quality of the processed wafer may be lower.

For example,FIG.3AandFIG.3Bare schematic diagrams exemplarily illustrating defect distribution of wafers to be tested of different qualities for basal plan dislocation (BPD). With reference toFIG.3AandFIG.3B, defects are indicated by black dots, the horizontal axis is the X-axis, and the vertical axis is the Y-axis. Some of the defects shown inFIG.3Bare concentrated in the lower left part, and the distribution of the defects shown inFIG.3Ais relatively uniform. Therefore, the processor130may evaluate that the quality of the processed ingot ofFIG.3Ashould be higher than that of the ingot ofFIG.3B. To be specific, indication of the position of the defect may have different designs depending on requirements. The position may be coordinates, a relative position, or other position representative value.FIGS.3A and3Bserve for exemplary description, but the disclosure is not limited thereto.

FIG.4AandFIG.4Bare schematic diagrams exemplarily illustrating defect distribution of wafers to be tested of different qualities for threading edge dislocation (TED). With reference toFIG.4AandFIG.4B, defects are indicated by black dots. Some of the defects shown inFIG.4Bare concentrated on the right side, and the distribution of the defects shown inFIG.4Ais relatively uniform. Therefore, the processor130may evaluate that the quality of the processed ingot ofFIG.4Ashould be higher than that of the ingot ofFIG.4B.

FIG.5AandFIG.5Bare schematic diagrams exemplarily illustrating defect distribution of wafers to be tested of different qualities for threading screw dislocation (TSD). With reference toFIG.5AandFIG.5B, defects are indicated by black dots. Therefore, the processor130may evaluate that the quality of the processed ingot ofFIG.5Ashould be higher than that of the ingot ofFIG.5B.

In an embodiment, an index of the uniformity may be quantified by one or more evaluation values (e.g., 1 to 5 points), grades (e.g., grades A, B, and C), or other quantitative units. The processor130may determine a classification range where the center-of-gravity position is located. Each evaluation value/grade corresponds to one classification range, and a center of the classification range is the same as the center of the wafer. The wafer is divided into one or more classification ranges. The processor130may determine an evaluation value/grade of the defect of the corresponding type according to the classification range where the center-of-gravity position is located. In other words, if the center-of-gravity position is located within one of the classification ranges, the processor130may take the evaluation value/grade corresponding to the classification range where the center-of-gravity position is located as the evaluation result of the uniformity of the defect type.

For example,FIG.6is a schematic diagram of classification ranges according to an embodiment of the disclosure. With reference toFIG.6, two concentric circular ranges R1and R2are formed on the coordinate system in the diagram. Distances from the center to the boundaries of the two ranges R1and R2are different. If the center-of-gravity position is located within the range R1, uniformity of the corresponding defect type belongs to grade A. If the center-of-gravity position is located between the range R1and the range R2, uniformity of the corresponding defect type belongs to grade B. If the center-of-gravity position is located outside the range R2, uniformity of the corresponding defect type belongs to grade C. Since the center-of-gravity positions of basal plan dislocation BPD, threading edge dislocation TED, and threading screw dislocation TSD are all located within the range R1, the uniformity of these defect types all belong to grade A.

In an embodiment, for the same evaluation value/grade, the processor130may further subdivide the evaluation value/grade of the types of defects. For example,FIG.7is a partially enlarged view ofFIG.6. With reference toFIG.7, a distance D1between the center-of-gravity position of basal plan dislocation BPD and the reference point is smaller than a distance D2between the center-of-gravity position of threading screw dislocation TSD and the reference point, and the distance D2is smaller than a distance D3between the center-of-gravity position of threading edge dislocation TED and the reference point. Therefore, the processor130determines that basal plan dislocation BPD belongs to grade AAA, threading screw dislocation TSD belongs to grade AA, and threading edge dislocation TED belongs to grade A.

In an embodiment, the processor130may determine distances between boundaries of one or more classification ranges, such as the ranges R1and R2, and the center of the wafer according to an estimated bow of the processed wafer. TakingFIG.6as an example, if the processor130reduces the radius of the range R1, it can be predicted that the bow of the wafer within the range R1is relatively low. For another example, if a relatively high bow of the wafer is allowable, the processor130may expand the range R2.

In an embodiment, the processor130may determine a plurality of evaluation values/grades, for example, evaluation values 1 to 5, or grades A to C. In addition, the processor130may obtain a center-of-gravity position of defects of a plurality of defect types, and compare a first evaluation value/grade with a second evaluation value/grade among the evaluation values/grades to generate a comparison result. The first evaluation value/grade corresponds to a first center-of-gravity position formed by a defect of a first type among the defect types, and the second evaluation value/grade corresponds to a second center-of-gravity position formed by a defect of a second type among the defect types. For example, the comparison result shows that the first evaluation value is lower than the second evaluation value, where a higher evaluation value indicates higher uniformity, and a lower evaluation value indicates lower uniformity. For another example, the comparison result shows that the first grade is higher than the second grade, where a higher grade indicates higher uniformity, and a lower grade indicates lower uniformity. For another example, the comparison result shows that the grades/evaluation values are the same.

It should be noted that, in some embodiments, it is also possible that a higher evaluation value indicates lower uniformity, and a lower evaluation value indicates higher uniformity.

In an embodiment, the processor130may compare a distance between the first center-of-gravity position and the center of the wafer with a distance between the second center-of-gravity position and the center of the wafer to determine the comparison result between the two evaluation values/grades. For example, if the distance between the first center-of-gravity position and the center of the wafer is shorter than the distance between the second center-of-gravity position and the center of the wafer, the comparison result shows that the first grade is higher than the second grade, or the comparison result shows that the first evaluation value is higher than the second evaluation value.

The processor130may determine the (total/final) evaluation value/grade of the defects of these types (or the evaluation value/grade of the wafer) according to the comparison result between the first evaluation value/grade and the second evaluation value/grade. In an embodiment, if the comparison result shows that a plurality of evaluation values/grades are all the same, the processor130may determine that the evaluation value/grade of any defect type is the (total/final) evaluation value/grade of the defects of these defect types.

In an embodiment, if a lowest one among a plurality of evaluation values/grades is obtained from the comparison result, the processor130may determine a lowest evaluation value/grade among the first evaluation value/grade and the second evaluation value/grade to be the evaluation value/grade of the defects of these types. For example, if basal plan dislocation BPD belongs to grade A and threading screw dislocation TSD belongs to grade B, the wafer belongs to grade B.

It should be noted that two defect types are taken as examples in the above description, but people applying the same may accordingly make analogy to more defect types. In addition, in the embodiments above, uniformity is evaluated for the defect of the wafer as a whole, but uniformity may be evaluated by regions to improve the accuracy.

In an embodiment, the processor130may divide the wafer into a plurality of regions, and determine a center-of-gravity position of one or more defects in each of the regions. The regions do not overlap. A range between a boundary of one of the regions and the center of the wafer is different from a range between a boundary of another one of the regions and the center of the wafer. For example, the wafer has a radius of 65 millimeters (mm), a first region ranges from 0 mm to 35 mm from the center, a second region ranges from 35 mm to 50 mm from the center, and a third region ranges from 50 mm to 60 mm from the center.

FIG.8Ais a schematic diagram exemplarily illustrating defect distribution within 0 mm to 65 mm of a wafer with a highest evaluation value/grade, andFIG.8Bis a schematic diagram of a center of gravity ofFIG.8A;FIG.9Ais a schematic diagram exemplarily illustrating defect distribution within 50 mm to 65 mm of a wafer with a highest evaluation value/grade, and FIG.9B is a schematic diagram of a center of gravity ofFIG.9A;FIG.10Ais a schematic diagram exemplarily illustrating defect distribution within 35 mm to 50 mm of a wafer with a highest evaluation value/grade, andFIG.10Bis a schematic diagram of a center of gravity ofFIG.10A;FIG.11Ais a schematic diagram exemplarily illustrating defect distribution within 0 mm to 35 mm of a wafer with a highest evaluation value/grade, andFIG.11Bis a schematic diagram of a center of gravity ofFIG.11A. With reference toFIG.8AtoFIG.11B, center-of-gravity positions in different regions may be different. For example, a distance between each center-of-gravity position and the center shown inFIG.11Bis shorter than a distance between each center-of-gravity position and the center shown inFIG.9B.

FIG.12Ais a schematic diagram exemplarily illustrating defect distribution within 0 mm to 65 mm of a wafer with a lowest evaluation value/grade, andFIG.12Bis a schematic diagram of a center of gravity ofFIG.12A;FIG.13Ais a schematic diagram exemplarily illustrating defect distribution within 50 mm to 65 mm of a wafer with a lowest evaluation value/grade, andFIG.13Bis a schematic diagram of a center of gravity ofFIG.13A;FIG.14Ais a schematic diagram exemplarily illustrating defect distribution within 35 mm to 50 mm of a wafer with a lowest evaluation value/grade, andFIG.14Bis a schematic diagram of a center of gravity ofFIG.14A;FIG.15Ais a schematic diagram exemplarily illustrating defect distribution within 0 mm to 35 mm of a wafer with a lowest evaluation value/grade, andFIG.15Bis a schematic diagram of a center of gravity ofFIG.15A. With reference toFIG.12AtoFIG.15B, similarly, center-of-gravity positions in different regions may be different. For example, a distance between each center-of-gravity position and the center shown inFIG.15Bis shorter than a distance between each center-of-gravity position and the center shown inFIG.13B.

In an embodiment, the processor130may compare with a third lowest evaluation value/grade of the regions with a fourth lowest evaluation value/grade of the defect types, and determine a lowest evaluation value/grade among the third lowest evaluation value/grade and the fourth lowest evaluation value/grade to be the (total/final) evaluation value/grade of the defects of the types (or to be the evaluation value/grade of the wafer). In other words, the processor130may take the lowest evaluation value/grade of all defect types in all regions to be the evaluation value/grade of the wafer.

For example, Table (1) is an example of uniformity evaluation:

TABLE 1Initial evaluationRe-evaluationGradeAAABBCCBABBBCCCACBCCC
In Table (1), the initial evaluation is for defects of all defect types in the wafer as a whole, and the re-evaluation is for defects of all defect types in each region of the wafer. If the initial evaluation grade is grade A and the re-evaluation grade is grade C, the final grade is grade C, and so on and so forth (i.e., taking whichever being the lowest). It is worth noting that if the initial evaluation grade is already the lowest grade (e.g., grade C), the processor130may omit the re-evaluation and directly take the lowest grade as the final grade. Alternatively, if the initial evaluation grade is lower than the re-evaluation grade, the processor130may also take the initial evaluation grade as the final grade. By analogy, if the initial evaluation grade is higher than the re-evaluation grade, the processor130takes the re-evaluation grade as the final grade. It should be noted that the grade is taken as an example in this embodiment, but the evaluation value or other quantified values of uniformity may also be applicable, which will not be repeatedly described here.

In summary of the foregoing, in the ingot evaluation method and the detecting apparatus of the embodiments of the disclosure, the uniformity of defect distribution is determined according to the center-of-gravity position of the defect, and is further taken as a basis for evaluating quality of an ingot. Accordingly, the quality of an ingot can be judged early, which not only saves the cost, but also improves the quality, yield, and time in subsequent processing.

It will be apparent to those skilled in the art that various modifications and variations can be made to the disclosed embodiments without departing from the scope or spirit of the disclosure. In view of the foregoing, it is intended that the disclosure covers modifications and variations provided that they fall within the scope of the following claims and their equivalents.