Patent ID: 12218775

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

Embodiments of the present disclosure are described more fully hereinafter with reference to the accompanying drawings. Elements that are identified using the same or similar reference characters refer to the same or similar elements. The various embodiments of the present disclosure may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art.

FIGS.1and2are simplified diagrams of an example of a process measurement or control system100that includes an industrial process legacy field device102, in accordance with the prior art. The field device102may interact with an industrial process104. In some embodiments, the process104involves a material, such as a fluid, transported through pipes, such as pipe106(FIG.1), and/or contained in tanks, for example. The system100may perform processes that transform the material from a less valuable state into more valuable and useful products, such as petroleum, chemicals, paper, food, etc. For example, an oil refinery performs industrial processes that can process crude oil into gasoline, fuel oil, and other petrochemicals.

The field device102communicates with a computerized control unit108that controls the field device102. The control unit108may be remotely located from the field device102, such as in a control room110for the system100, as shown inFIG.1.

The field device102may be coupled to the control unit108over a process control loop112, such as a 2-wire 4-20 milliamp (mA) process control loop, which may power the field device102. Additionally, communications between the control unit108and the field device102may be performed over the control loop112in accordance with analog and/or digital communication protocols used by legacy field devices102. For example, a process variable may be represented by an analog signal, such as a level of a loop current I (FIG.2) flowing through the process control loop112. Legacy digital communication protocols, such as the HART® communication standard, generally modulate digital signals onto the analog current level of the 2-wire process control loop112. Other examples legacy digital communication protocols that may be used include Modbus, PROFIBUS, Foundation™ Fieldbus, IO-Link, and other communication protocols. These communication protocols used by legacy field devices102do not include Ethernet communication protocols.

In some embodiments, the field device102includes a controller114, an active component in the form of one or more sensors or control devices116, measurement or control circuitry118, a digital-to-analog converter (DAC)120, a communications circuit122, and/or a terminal block124, as shown in the simplified diagram ofFIG.2. The controller114may represent one or more processors (i.e., microprocessor, central processing unit, etc.) that control components of the field device102to perform one or more functions described herein in response to the execution of instructions, which may be stored locally in non-transitory, patent subject matter eligible, computer readable media or memory126of the device102. In some embodiments, the processors of the controller114are components of one or more computer-based systems. In some embodiments, the controller114includes one or more control circuits, microprocessor-based systems, one or more programmable hardware components, such as a field programmable gate array (FPGA), that are used to control components of the device102to perform one or more functions described herein. The controller114may also represent other conventional legacy field device circuitry.

The field device102may be used to sense or measure a parameter of the process104, such as a temperature, a level, a pressure, a flow rate, or another parameter of the process104using one or more sensors represented by block116inFIG.2. Exemplary sensors116include pressure sensors, temperature sensors, level sensors, flow rate sensors, and/or other sensors used to sense or measure a process parameter.

The field device102may also be configured to control an aspect of the process104using one or more control devices represented by block116inFIG.2. Exemplary control devices116include actuators, solenoids, valves, and other conventional process control devices used in field devices to control a process.

The measurement or control circuitry118represents circuitry that interacts with the sensor or the control device116. For instance, the circuitry118may include measurement circuitry that translates an output from a sensor116for use by the controller114of the field device102. The DAC120may be used by the controller114to convert digital signals into analog signals that are communicated to the control unit108using the communications circuit122, such as over the 2-wire process control loop112by adjusting the loop current I to indicate a value of a process parameter sensed by the sensor116, for example. The circuitry118may also be used to control a control device116, such as in response to commands from the control unit108that are received by the controller114through the communications circuit122, for example.

As mentioned above, legacy field devices102are not configured to communicate using Ethernet communication protocols. However, such communications will be available with the implementation of Ethernet-APL in the next generation of industrial process measurement and control systems and field devices. This will provide significant improvements over their legacy counterparts by providing high power and high data communication bandwidth over 2-wire links while satisfying intrinsic safety requirements.

Embodiments of the present disclosure are generally directed to the adaptation of legacy field devices102to operate in Ethernet-APL systems and take advantage of the benefits such systems offer. Thus, embodiments of the present disclosure allow process control and measurement systems to be updated to Ethernet-APL while utilizing existing legacy field devices102, for which counterpart field devices configured for Ethernet-APL systems may not be available, for example.

FIG.3is a simplified block diagram of an example of a process control or measurement system130, in accordance with embodiments of the present disclosure. The system130includes a control unit or host132, which may take the form of the legacy control unit108described above and may be located in a control room134. The system130also includes an APL power switch136, and one or more APL field switches138. The control unit132may be connected to the APL power switch136through Ethernet wiring (e.g., standard IEEE 802.3)140. The APL power switch136handles data communications and powers the APL field switches138through an Ethernet-APL trunk (2-wire)142. Each of the field switches138may provide data communication and power for one or more legacy field devices102over an APL spur (2-wire)144. Each of the APL power switches136, the APL trunks142, the APL field switches138, and the APL spurs144are formed in accordance with IEEE and IEC Ethernet-APL standards.

Embodiments of the present disclosure include an APL adapter150that adapts the power received over the spur144to power one or more legacy field devices102and facilitates communications using Ethernet-APL system standards between the control unit132and the legacy field devices102, which utilize legacy industrial communication protocols (e.g., HART®, Modbus, PROFIBUS, Foundation™ Fieldbus, IO-Link, etc.). The adapter150may take on various forms. For example, the adapter150may take the form of an external adapter150A that connects to the legacy field device102, an adapter150B that is incorporated into the legacy field device102(e.g., into the terminal block124), a single adapter150C that is connected to multiple legacy field devices102, such as through a HART® field multiplexer152that facilitates a multidrop mode for the field devices102, or another form.

FIG.4is a simplified block diagram of an example of an adapter150, in accordance with embodiments of the present disclosure. In some embodiments, the adapter150includes power extraction circuitry160, a regulator162, device specific circuitry164, connectivity circuitry166and/or APL physical layer (PHY) circuitry168(e.g., the ADIN1100 integrated circuit produced by Analog Devices).

The power extraction circuitry160includes a pair of terminals170and172that connect to the spur144extending from an APL field switch138(FIG.3). The circuitry160generally operates to extract power from the spur power (e.g., minimum of 500 milliwatt (mW)) delivered over the spur144and received through the terminals170and172. This extracted power is used to power the adapter150and the connected legacy field devices102. Data may also be received and transmitted through the terminals170and172in accordance with Ethernet-APL standards.

The power extraction circuitry160may include transient suppression circuitry174, a common mode choke (CMC)176, and/or current steering circuitry178. The transient suppression circuitry174operates to suppress voltage transients. The CMC176operates to suppress common mode voltage noise to a desired level. The current steering circuitry178directs the current of the extracted power along a desired circuit path, providing polarity insensitivity.

FIG.5is a circuit diagram of an example of power extraction circuitry160along with an APL PHY circuitry168interface, in accordance with the prior art. In this example, the transient suppression circuitry174includes a transient voltage suppression diode182connected in parallel with the terminals170/172. Other suitable techniques for suppressing voltage transients may also be used.

The CMC176may operate to reduce the common mode noise between the terminals170and172to a desired voltage level.

An example of the current steering circuitry178includes diodes184,186,188and190that route the current to flow through the diode192. Other suitable current steering techniques may also be used. The current steering circuitry178and additional protection diode192prevent capacitance internal to the adaptor and legacy field device from appearing at the APL power load terminals170and172in accordance with intrinsic safety standards.

The transmitter pins (Tx) and the receiver pins (Rx) of the APL PHY circuitry168may be coupled to nodes194and196through capacitors198and200and suitable resistors, which allow the communication signals (e.g., 10BASE-T1L signals) to pass, while blocking direct current (DC) signals. The capacitors198and200may each represent two or more capacitors in series to meet intrinsic safety DC blocking requirements.

Inductors202and204connected between the nodes194and196and the terminals206and208operate to block communication signals (e.g., 10BASE-TIL signals) while passing through DC signals to extract power from the spur144.

Diodes210A-D and212A-D, which are respectively connected in parallel with the inductors202and204operate to prevent inductive flyback and reduce the inductive ignition hazard in accordance with intrinsic safety standards.

The regulator162receives the extracted power from the power extraction circuitry160at the pair of terminals206and208. In one example, the regulator162may include current limiting circuitry214that operates to ensure that the adapter150meets the 2-Wire Intrinsically Safe Ethernet (2-WISE) standard for operation in hazardous environments by limiting the current through the adapter150and/or the current I through the legacy field device102to a level that is below a threshold maximum.

The regulator162may include a voltage regulator216that is generally configured to output a DC device voltage (VSUB), such as 12 VDC for supplying 48 mW (e.g., HART® field device configured for multidrop mode with fixed 4 mA in the loop, 4 mA at 12 VDC) for powering connected field devices102through a pair of terminals217and218(FIG.4). The voltage regulator216may also be configured to output a DC main voltage (VMAIN) (e.g., 3.3 VDC) for powering circuitry of the adapter150, such as the device specific circuitry164, the connectivity circuitry166, and/or the APL PHY circuitry168, for example.

As mentioned above, the adapter150(150A) may be configured as an external device that is coupled to a legacy field device102, or the adapter150(150B) may be integrated into the terminal block of the legacy field device102, as shown inFIG.1. When the adapter takes the form of adapter150A, the terminals217and218are terminals of the terminal block124(FIG.2), and when the adapter takes the form of adapter150B, the terminals170and172are terminals of the terminal block124.

FIG.6is a simplified circuit diagram of an example of the regulator162, in accordance with embodiments of the present disclosure. In one embodiment, the voltage regulator216comprises dual voltage shunt regulators219and220with the voltage shunt regulator219providing the voltage source VSUB to the field device load222of the field devices102and the voltage shunt regulator220providing the voltage source VMAIN to circuitry224of the adapter150. The voltage regulator216may take on other forms while extracting the desired VSUB and VMAIN DC voltages from the extracted power.

Referring back toFIG.4, when necessary, the adapter150may include the device specific circuitry164, which may include device communications circuitry300and/or hardware interface circuitry302. The device communications circuitry300may be used to handle some forms of data communications (e.g., HART® data communications) between the adapter150and a connected legacy field device102. The hardware interface circuitry302provides power and signal conditioning between the communications circuitry300and the connected legacy field device102, such as an interface between the 4-20 mA loop112connected to the terminals217and218and the legacy field device102and the device communications circuitry300, for example. These components may be considered as components of the regulator216and/or components of the connectivity circuitry166.

FIG.7is an example of the device specific circuitry164in accordance with embodiments of the present disclosure. The device communications circuitry300may include a HART® modem303, or another type of data communication device (e.g., Foundation Fieldbus, etc.) whose transmitter and receiver ports (Tx and Rx) are capacitively coupled to the terminal218through capacitors304and305, which block the 4-20 mA DC signal I (FIG.4) while allowing the passage of high frequency data communications signals.

The hardware interface302may include a boost converter306configured to increase the voltage VSUB to ensure that the supply to the 4-20 mA loop meets the minimum operating specification (typically 12 VDC) of the connected legacy field device(s)102(e.g., HART® field device).

Accordingly, the device specific circuitry164may be configured to provide an analog signaling mode, in which the legacy field device102communicates information using the 4-20 mA current I, and/or a mixed signaling mode, in which data may be communicated using the 4-20 mA current I and digital communication signals (e.g., HART® Frequency Shift Key signals) that are superimposed over the 4-20 mA current I.

In the 4-20 mA current I and digital communication signal mode or 4-20 mA current I analog signaling mode, when the digital communications circuitry includes the HART® modem, the voltage VSUB (FIGS.4and6) may be boosted to 17.3 VDC at the terminal217to account for the voltage drop across the minimum loop load resistor308(e.g., 230 Ohms) for HART® communications (e.g., 12 VDC+23 mA*230 Ohms). The device specific circuitry164may be adjusted to accommodate other digital communication protocols.

The hardware interface circuitry302may optionally include an analog-to-digital converter (ADC)310that operates to convert the analog 4-20 mA current I corresponding to the voltage at node218into a digital signal for processing/monitoring by the connectivity circuitry (FIG.4). The ADC310may be considered as a component of the connectivity circuitry166.

In some embodiments, the hardware interface302of the adapter150provides a HART® field multiplexor that accommodates a multidrop mode allowing for the connection of multiple legacy field devices102configured for HART® communications to the adapter150, such as indicated by adapter150C inFIG.2. This effectively converts multiple legacy field devices102into APL devices without the need for replacing the instruments or extending additional cabling back to the corresponding field switch138(FIG.3). For the multidrop configuration, the loop current I is substantially fixed, such as at 4 mA (+/−1 mA) at 12 VDC, to provide approximately 48 mW to power the connected legacy field devices102.

In some embodiments, the device specific circuitry164includes terminals312and314that may be used to configure a connected legacy field device102and the adapter150(e.g., device communications circuitry300, connectivity circuitry166, APL PHY circuitry168, etc.). In one example, the adapter150may be connected as a HART® device that is multidropped off the same HART® bus as the connected legacy field device(s)102.

The connectivity circuitry166(FIG.4) may include at least one processor320that is configured to perform one or more functions described herein in response to the execution of program instructions stored in memory322. The at least one processor320may comprise components of computer-based systems, and may include control circuits, microprocessor-based control systems, and/or programmable hardware components, such as a field programmable gate array (FPGA). The memory322comprises any suitable patent subject matter eligible computer readable media that do not include transitory waves or signals. Examples of suitable forms of the memory include ferroelectric random access memory (FRAM), hard disks, CD-ROMs, optical storage devices, and/or magnetic storage devices. The connectivity circuitry166may include circuitry for use by the at least one processor320to receive and transmit data signals, such as in response to the execution of the instructions stored in the memory322.

In some embodiments, the functions performed by the processor320of the connectivity circuitry166generally support the operation of the adapter150and the connected legacy field device(s)102. For example, the connectivity circuitry166may operate to support media access control (MAC)324as well as other conventional transport and application layers needed for the Ethernet protocols that the APL PHY circuitry168and/or the legacy field device(s)102support (e.g., TCP, UDP, HTTP, EtherNet/IP, PROFINET, HART-IP, etc.). Accordingly, the connectivity circuitry166operates to facilitate Ethernet data communications between the control unit132(FIG.3) or another connected control device (e.g., handheld unit) and the APL PHY circuitry168, and between the APL PHY circuitry168and the connected legacy field device(s)102.

In some embodiments, the connectivity circuitry166includes a communications client326, which may represent software that is executable by the processor320and configured to handle a target communication protocol (e.g., HART®) of the connected legacy field devices102. The communications client326may also be responsible for identifying and gathering relevant information about the connected legacy field devices102. For example, the communications client326may operate to gather (e.g., through a poll-response or burst communications) data from each connected legacy field device102that is necessary to respond to upper-level requests (e.g., from the control unit132through the APL PHY circuitry168) for static and dynamic instrument data. The gathered legacy field device data may be stored in the memory322, and may include, for example, configuration, status, and dynamic variable data. The connectivity circuitry166may provide rapid responses to requests for the information from the control unit132or another control device through the APL PHY circuitry168.

The connectivity circuitry166may be configured to store legacy field device specific information in the memory322. Such information may include device specific commands for controlling aspects of the connected field devices102, such as diagnostic features. Thus, the processor320may control the connected legacy devices102through the issuance of commands, and relay information, such as diagnostic information, to the control unit132or another control device.

When the adapter150is configured to provide the multidrop mode for connecting multiple legacy field devices102(FIG.1), the connectivity circuitry166may cache information on each connected legacy field device102in the memory322and provide higher level host systems the ability to individually address each legacy field device102.

Embodiments of the adapter150may also provide a Hypertext Transfer Protocol (HTTP) web interface, such as through the PHY circuitry168and/or connectivity circuitry166, proxying for the connected legacy field devices102to facilitate configuring the adapter150and/or the connected legacy field devices102. Thus, configuration, diagnostic, and other information relating to the connected legacy field devices may be accessible through the web interface of the adapter150.

The connectivity circuitry166may also receive, translate, and/or forward writes and configuration changes directed by the control unit132or another control device to any connected legacy field device102. The connectivity circuitry166may also translate acknowledgements received from the connected legacy field devices102and communicate the acknowledgements back to the control unit132via the APL PHY circuitry168using an Ethernet communication protocol.

The adapter150may provide diagnostic functions. In one embodiment, certain diagnostics may be performed when the adapter150is configured in the mixed signaling mode, in which both digital communications (e.g., HART®) and analog communications (e.g., 4-20 mA current I) are used. The mixed signaling mode allows for the monitoring of a value represented by the digital signal and the analog signal after it is converted by the ADC310. These values may be made available through the interface of the APL PHY circuitry168and compared to each other to determine whether a fault condition exists with the connected legacy field device102and/or the adapter150. For example, if the digital value of a process variable measured by the legacy field device102communicated via a digital communication protocol differs from the corresponding value represented by the current I of the loop112by a threshold amount, the control unit132, adapter150, or another control device may detect an abnormal condition in the legacy field device102or the adapter150. Upon detection of such an abnormal condition a suitable notification or alarm may be triggered.

In some embodiments, the adapter150is configured to implement one or more security functions, such as a security function that prevents unauthorized access to any connected legacy field devices102. Such security functions may be implemented by the processor320of the connectivity circuitry166. For example, the connectivity circuitry166may be configured to implement basic firewall functionality that allows or prevents certain types of access to the connected legacy field devices102, such as the prevention of configuration writes to the legacy field devices102, to the memory322, etc., while allowing for data reads. Such a firewall may also allow read/write access on a command-by-command or object-by-object basis providing highly granular security control based on a user's access rights. Thus, the adapter may be configured to allow different users or different user roles to have varying levels of access to the connected legacy field devices102.

The adapter150, such as through the connectivity circuitry166, may be configured to host applications stored in the memory322, such as, for example, applications for process parameter (e.g., flow, level, pressure, etc.) measurement compensation, discrete and analog control, user interfaces using the web user interface, and other field centered applications. Such applications could involve a single connected legacy field device102or multiple multidropped legacy field devices102. For example, a flow or level control application implemented by the adapter150could be configured to utilize multiple process parameter measurement values (e.g., pressure and temperature) received from one or more connected legacy field devices102to calculate a compensated measurement (e.g., flow) or to control a control device (e.g., a valve).

In one embodiment, the adapter150includes an application that presents a virtual field device to the control unit132or another host system. The virtual field device may have its own address, data and/or parameter settings that can be read and controlled from a host application of the control unit132, such as through a web interface implemented by the processor320of the connectivity circuitry166. In one example, the virtual field device may be an aggregation of two or more connected legacy field devices102.

The applications implemented by the adapter150may include user applications that implement a scripting language or a graphical programming tool. Such functionalities may be accessed via the adapter's web interface or a REST Application Program Interface (API) with aggregated and calculated values made available to host applications through the APL PHY circuitry168using standard Ethernet protocols.

Although the embodiments of the present disclosure have been described with reference to preferred embodiments, workers skilled in the art will recognize that changes may be made in form and detail without departing from the spirit and scope of the present disclosure.