Patent ID: 12199850

DETAILED DESCRIPTION

A communication system, a master device, a slave device and a communication method according to embodiments of the present invention will be described below with reference to the attached drawings.

[1] First Embodiment

(1) Overall Configuration of Communication System

FIG.1shows the overall configuration of the communication system10according to a first embodiment. The communication system10includes a master device1and a plurality of slave devices3. In the example ofFIG.1, the communication system10includes the three slave devices3A,3B,3C. Transmission-reception switches4A,4B,4C are connected to the slave devices3A,3B,3C, respectively. The slave device3A and the transmission-reception switch4A constitute a gateway5A, the slave device3B and the transmission-reception switch4B constitute a gateway5B, and the slave device3C and the transmission-reception switch4C constitute a gateway5C. In the following description, when the configurations and operations common among the slave devices3A to3C, the transmission-reception switches4A to4C and the gateways5A to5C are described, they are suitably described as a slave device3, a transmission-reception switch4and a gateway5.

The master device1and the slave devices3A to3C are connected to each other through a control network6for transmission of control signals. While the control network6uses a network that transmits electrical signals in the present embodiment, an optical network that transmits optical signals may be used as the control network6. The control network6branches at a plurality of branch points and is connected to each of the slave devices3A to3C. With such a configuration, a control signal transmitted by the master device1through the control network6is received by all of the slave devices3A to3C.

The master device1and the transmission-reception switches4A to4C are connected to each other through an optical network7for transmission of data signals. That is, the master device1and the transmission-reception switches4A to4C are connected to each other through an optical fiber. In this manner, in the communication system10of the present embodiment, the master device1and the plurality of slave devices3A to3C share one optical fiber.

InFIG.1, the control network6through which a control signal is transmitted is indicated by the thin lines, and the optical network7through which a data signal is transmitted is indicated by the thick lines.

The communication system10is used as an in-vehicle network installed in an automobile, for example. In this case, the slave devices3A to3C can be used as electronic control units (ECUs) that control respective components of the automobile. With the development of electronic control technology for automobiles, a large number of electronic control units are installed in an automobile. In this case, the large number of slave devices3corresponding to electronic control units are installed in an automobile and are connected to the control network6and the optical network7.

(2) Functional Configurations of Master Device and Slave Device

FIG.2is a block diagram showing the functional configurations of the master device1and the slave device3according to the first embodiment. The master device1includes a TDMA control circuit11, a control transmission circuit12, a data transmission circuit13and a data reception circuit14.

The TDMA control circuit11controls the control transmission circuit12, the data transmission circuit13and the data reception circuit14to perform control for performing TDMA in the communication system10. The control transmission circuit12transmits a control signal to the slave device3through the control network6. The data transmission circuit13transmits a data signal to the slave device3or the master device1through the optical network7. The data reception circuit14receives a data signal transmitted from the slave device3or the master device1through the optical network7.

The slave device3includes a TDMA control circuit31, a control reception circuit32, a switch control transmission circuit33, a data reception circuit34and a data transmission circuit35.

The TDMA control circuit31controls the control reception circuit32, the switch control transmission circuit33, the data reception circuit34and the data transmission circuit35to perform control for performing TDMA in the communication system10. The control reception circuit32receives a control signal transmitted by the master device1through the control network6. The switch control transmission circuit33controls the switching of the transmission-reception switch4. The data reception circuit34receives a data signal transmitted by the master device1through the optical network7. The data transmission circuit35transmits a data signal to the master device1through the optical network7.

In accordance with a switch signal provided from the switch control transmission circuit33, the transmission-reception switch4are switched among three types of states which are a data transmittable state (Talk), a data receivable state (Listen) and a pass state (Thru). When the transmission-reception switch4is switched to the transmittable state, a data signal provided from the data transmission circuit35can be written into the optical network7as an optical signal. When the transmission-reception switch4is switched to the receivable state, an optical signal read out from the optical network7is provided to the data reception circuit34. When the transmission-reception switch4is switched to the pass state, the transmission-reception switch4causes an optical signal flowing through the optical network7to pass. The optical signal that has passed through the transmission-reception switch4is sent toward the transmission-reception switch4of the next slave device3.

(3) Round-Trip Delay Time Between Master Device and Slave Device

Next, the round-trip delay time between the master device and the slave device (hereinafter referred to as a first round-trip delay time RTTs) will be described.FIG.3is a diagram for explaining the first round-trip delay time RTTs. The first round-trip time RTTs is the delay period of time from the time when the master device1instructs the slave device3to transmit a data signal to the time when the master device1receives the data signal transmitted by the slave device3.

As shown inFIG.3, the first round-trip delay time RTTs includes three elements which are delay times Tc, Tstx and Tmrx. The delay time Tc is the delay period of time during which a control signal is transmitted from the master device1to the slave device3, and the processing periods of time in the control transmission circuit12and the control reception circuit32are a dominant term. The delay time Tstx is the delay period of time during which a switch signal is transmitted from the slave device3to the transmission-reception switch4, and the processing period of time in the switch control transmission circuit33is a dominant term. Further, the delay time Tmrx+Tstx is the delay period of time during which a data signal is transmitted from the slave device3to the master device1, and the processing time Tstx in the data transmission circuit35and the processing time Tmrx in the data reception circuit14are dominant terms. In the present embodiment, the processing period of time in the data transmission circuit35and the processing period of time in the switch control transmission circuit33are presumed as the same time Tstx.

FIG.4is a time chart showing the first round-trip delay time RTTs. At a point T0(S) in time, the master device1transmits a control signal to the slave device3. Specifically, the TDMA control circuit11instructs the control transmission circuit12to transmit a control signal including a time stamp TS0(S) of the point T0(S) in time. The control transmission circuit12generates the frame of the control signal including the time stamp TS0(S) and transmits the control signal to the slave device3. The control signal is sent out to the control network6. The control reception circuit32of the slave device3provides the received control signal to the TDMA control circuit31. When receiving the control signal, the TDMA control circuit31sets the local point in time in the slave device3to the TO (S). At this time, the sum of the processing periods of time in the control transmission circuit12and the control reception circuit32is the delay time Tc. That is, the local point in time in the slave device3is delayed by Tc from the point in time in the master device1.

Subsequently, at a point T1(S) in time, the TDMA control circuit31provides a state switching instruction to the switch control transmission circuit33. The point T1(S) in time is the local point in time in the slave device3. In response to this instruction, the switch control transmission circuit33provides a control signal for switching the transmission-reception switch4to the transmittable state (Talk) to the transmission-reception switch4. A waiting time Tw from the point T0(S) to the point T1(S) in time is the processing period of time in the TDMA control circuit31. At the point T1(S) in time, the TDMA control circuit31instructs the data transmission circuit35to transmit a data signal including the time stamp TS1(S) of the point T1(S) in time. In response to this instruction, the data transmission circuit35generates the frame of the data signal including the time stamp TS1(S) and provides the data signal to the transmission-reception switch4. At this time, the processing period of time in the data transmission circuit35is the delay time Tstx. Further, the processing period of time in the switch control transmission circuit33is also the delay time Tstx.

In response to the instruction provided from the switch control transmission circuit33, the transmission-reception switch4switches the state of the transmission-reception switch4to the transmittable state (Talk). Then, the transmission-reception switch4transmits the data signal provided from the data transmission circuit35to the optical network7.

The data reception circuit14of the master device1receives the data signal transmitted from the data transmission circuit35. The data reception circuit14provides the received data signal to the TDMA control circuit11. The TDMA control circuit11acquires a point T2(S) in time at which the data signal is received and its time stamp TS2(S). At this time, the processing period of time in the data reception circuit14is the delay time Tmrx.

The TDMA control circuit11obtains the first round-trip delay time RTTs by performing the operation in the final line of the following formula.

RTTs=Tc+Tstx+Tmrx=TS⁢2⁢(S)-TS⁢0⁢(S)-Tw=TS⁢2⁢(S)-TS⁢0⁢(S)-(TS⁢1⁢(S)-TS⁢0⁢(S))=TS⁢2⁢(S)-TS⁢1⁢(S)

The TDMA control circuit11saves the obtained first round-trip delay time RTTs in a storage included in the master device1.

(4) Round-Trip Delay Time from Master Device to Master Device

Next, the round-trip delay time from the master device to the master device (hereinafter referred to as a second round-trip delay time RTTm) will be described. FIG. is a diagram for explaining the second round-trip delay time RTTm. The second round-trip delay time RTTm is the delay period of time from the time when the master device1transmits a data signal to the master device1itself to the time when the master device1receives the transmitted data signal. In order to measure the second round-trip delay time RTTm, the transmission-reception switches4of all of the slave devices3are switched to the pass state (Thru). Thus, the data signal transmitted by the master device1passes through the transmission-reception switches4of all of the gateways5and returns to the master device1.

As shown inFIG.5, the second round-trip delay time RTTm includes two elements which are a delay time Tmtx and the delay time Tmrx. The delay time Tmtx is the delay period of time required for the master device1to transmit a data signal, and the processing period of time in the data transmission circuit13is a dominant term. Further, the delay time Tmrx is the delay period of time required for the master device1to receive a data signal, and the processing period of time in the data reception circuit14is a dominant term.

FIG.6is a time chart showing the second round-trip delay time RTTm. At a point T0(M) in time, the master device1transmits a data signal to the master device1itself. Specifically, the TDMA control circuit11instructs the data transmission circuit13to transmit a data signal including a time stamp TS0(M) of the point T0(M) in time. The data transmission circuit13generates the frame of the data signal including the time stamp TS0(M) and transmits the data signal to the master device1. At this time, the processing period of time in the data transmission circuit13is the delay time Tmtx.

The data signal transmitted from the data transmission circuit13is sent out to the optical network7. The data signal passes through all of the transmission-reception switches4and returns to the master device1. The data reception circuit14of the master device1provides the received data signal to the TDMA control circuit11. The TDMA control circuit11acquires a point T1(M) in time at which the data signal is received and its time stamp TS1(M). At this time, the processing period of time in the data reception circuit14is the delay time Tmrx.

The TDMA control circuit11obtains the second round-trip delay time RTTm by performing the following operation.
RTTm=Tmtx+Tmrx=TS1(M)−TS0(M)

The TDMA control circuit11saves the obtained second round-trip delay time RTTm in the storage included in the master device1.

(5) Control Procedure of Upstream Communication

Next, the control procedure of upstream communication in which a data signal is transmitted from the slave device3to the master device1will be described.FIG.7is a time chart showing the timing for transmission in upstream communication. InFIG.7, a symbol SA indicates a data signal transmitted by the slave device3A, and a symbol SB indicates a data signal transmitted by the slave device3B.

First, the TDMA control circuit11of the master device1allocates a point in time at which transmission of a data signal is permitted to each slave device3. In the example ofFIG.7, the TDMA control circuit11allocates the period from a point t1 to a point t2 in time to the slave device3A and allocates the period from the point t2 to a point t3 in time to the slave device3B. Specifically, in response to an instruction provided by the TDMA control circuit11, the control transmission circuit12transmits a control signal designating the period from the point t1 to the point t2 in time during which transmission is permitted to the slave device3A. Similarly, in response to an instruction provided by the TDMA control circuit11, the control transmission circuit12transmits a control signal designating the period from the point t2 to the point t3 in time during which transmission is permitted to the slave device3B.

Next, the TDMA control circuit31of the slave device3A provides an instruction for switching to the transmittable state (Talk) to the switch control transmission circuit33at a point t1−RTTsa in time that is obtained when a first round-trip delay time RTTsa of the slave device3A is subtracted from the point t1 in time. Further, the TDMA control circuit31of the slave device3A instructs the data transmission circuit35to transmit a data signal at the point t1−RTTsa in time. The point t1−RTTsa in time is the local point in time in the slave device3A. Similarly, the TDMA control circuit31of the slave device3B provides an instruction for switching to the transmittable state (Talk) to the switch control transmission circuit33at a point t2−RTTsb in time that is obtained when a first round-trip delay time RTTsb of the slave device3B is subtracted from the point t2 in time. Further, the TDMA control circuit31of the slave device3B instructs the data transmission circuit35to transmit a data signal at the point t2−RTTsb. The point t2−RTTsb in time is the local time in the slave device3B.

The above-mentioned first round-trip delay time RTTs is measured for each slave device3. Here, the first round-trip delay times RTTs of the slave devices3A,3B are RTTsa, RTTsb, respectively. When transmitting a control signal for making notification of a point in time at which transmission is permitted to the slave devices3A,3B, the TDMA control circuit11of the master device1may also make notification of the first round-trip delay times RTTsa, RTTsb measured in regard to the respective slave devices3A,3B. Alternatively, the TDMA control circuit11may transmit the first round-trip delay times RTTsa, RTTsb to the slave devices3A,3B in advance. Alternatively, the TDMA control circuit11may notify the slave devices3A,3B of the points t1−RTTsa, t2−RTTsb in time that are obtained when the first round-trip delay times RTTsa, RTTsb are respectively subtracted as points in time at which transmission is permitted.

Next, in response to a switch instruction of the switch control transmission circuit33of the slave device3A, after a delay time Tstxa elapses from the point t1−RTTsa in time, the transmission-reception switch4A is switched to the transmittable state (Talk). Further, after the delay time Tstxa elapses from the point t1−RTTsa in time, the data signal transmitted from the data transmission circuit35of the slave device3A is sent out to the optical network7. Here, the delay time Tstxa is the delay period of time in the data transmission circuit35of the slave device3A. The delay period of time in the switch control transmission circuit33of the slave device3A is also the delay time Tstxa.

Similarly, in response to a switch instruction of the switch control transmission circuit33of the slave device3B, after a delay time Tstxb elapses from the point t2−RTTsb in time, the transmission-reception switch4B is switched to the transmittable state (Talk). Further, after the delay time Tstxb elapses from the point t2−RTTsb in time, the data signal transmitted from the data transmission circuit35of the slave device3B is sent out to the optical network7. Here, the delay time Tstxb is the delay period of time in the data transmission circuit35of the slave device3B. The delay period of time in the switch control transmission circuit33of the slave device3B is also the delay time Tstxb.

Next, the data reception circuit14of the master device1receives the data signal transmitted from the slave device3A. Subsequently, the data reception circuit14of the master device1receives the data signal transmitted from the slave device3B. Any delay period of time in a reception process of the data reception circuit14is Tmrx. Thus, the master device1receives the data signal transmitted by the slave device3A, after a time Tstxa+Tmtx elapses from the local point t1−RTTsa in time of the slave device3A. That is, the data signal is sent out to the optical network7at a point t1−Tmrx in time, which is the point in time in the master device1, and the master device1receives the data signal transmitted by the slave device3A at the point t1 in time. Further, the master device1receives the data signal transmitted by the slave device3B, after a time Tstxb+Tmrx elapses from the local point t2−RTTsb in time of the slave device3B. That is, the data signal is sent out to the optical network7at a point t2−Tmrx in time, which is the point in time in the master device1, and the master device1receives the data signal transmitted by the slave device3B at the point t2 in time. Because the period from the point t1 to the point t2 in time is provided to the slave device3A as a period of time during which data is transmittable, the data signal transmitted from the slave device3A is sent out to the optical network7in the period from the point t1−Tmrx to the point t2−Tmrx in time and is received in the master device1in the period from the point t1 to the point t2 in time. Because the period from the point t2 to the point t3 in time is provided to the slave device3B as a period of time during which data is transmittable, the data signal transmitted from the slave device3B is sent out to the optical network7in the period from the point t2−Tmrx to the point t3−Tmrx in time and is received in the master device1in the period from the point t2 to the point t3 in time. Therefore, when it is scheduled such that there is no collision in the master device1, data signals transmitted from the slave devices3A,3B are received in the master device1without collision in the optical network7.

(6) Control Procedure of Downstream Communication

Next, the control procedure of downstream communication in which a data signal is transmitted from the master device1to the slave device3will be described.FIG.8is a time chart showing the timing for transmission in downstream communication. First, the TDMA control circuit11of the master device1allocates a point in time at which a data signal is to be received to each slave device3. In the example ofFIG.8, the TDMA control circuit11allocates the point t1 in time to the slave device3. Specifically, in response to an instruction provided by the TDMA control circuit11, the control transmission circuit12transmits a control signal designating the point t1 in time at which a data signal is to be received to the slave device3.

Next, the TDMA control circuit31of the slave device3provides an instruction for switching to the receivable state (Listen) to the switch control transmission circuit33at a point t1−RTTs in time that is obtained when the first round-trip delay time RTTs of the slave device3is subtracted from the point t1 in time. The point t1−RTTs in time is the local point in time in the slave device3. In response to this switch instruction, the switch control transmission circuit33switches the transmission-reception switch4to the receivable state (Listen). The delay period of time of the process in the switch control transmission circuit33is Tstx. When transmitting a control signal for making notification of a point in time at which a data signal is to be received to the slave device3, the TDMA control circuit11of the master device1may also make notification of the first round-trip delay time RTTs measured in regard to the slave device3. Alternatively, the TDMA control circuit11may transmit the first round-trip delay time RTTs to the slave device3in advance. Alternatively, the TDMA control circuit11may notify the slave device3of the point t1−RTTs in time that is obtained when the first round-trip delay time RTTs is subtracted as a point in time at which transmission is permitted.

Further, the TDMA control circuit11of the master device1instructs the data transmission circuit13to transmit a data signal at a point t1−RTTm in time that is obtained when the second round-trip delay time RTTm is subtracted from the point t1 in time. In response to this transmission instruction, the data transmission circuit13transmits the data signal to the slave device3. The delay period of time of the process in the data transmission circuit13is Tmtx.

The transmission-reception switch4is switched to the receivable state (Listen) after the time Tstx elapses from the point t1−RTTs in time which is the local point in time in the slave device3. As can be seen fromFIGS.4and8, the transmission-reception switch4is switched to the receivable state (Listen) at the point t1−Tmrx in time, which is the point in time in the master device1. On the other hand, the data signal transmitted from the master device1arrives at the transmission-reception switch4after the time Tmtx elapses from the point t1−RTTm in time, which is the point in time in the master device1. As can be also seen fromFIGS.6and8, the data signal arrives at the transmission-reception switch4at the point t1−Tmrx in time, which is the point in time in the master device1. Thus, the slave device3can receive the data signal transmitted by the master device1. InFIG.8, Tsrx is the processing period of time in the data reception circuit34of the slave device3.

(7) Control Procedure in Case in Which Upstream Communication and Downstream Communication Coexist

FIG.9is a time chart showing the timing for transmission in a case in which upstream communication and downstream communication coexist. In the example ofFIG.9, the TDMA control circuit11of the master device1allocates the period from the point t1 to the point t2 in time to the slave device3A as a data transmittable period of time. Further, the TDMA control circuit11of the master device1allocates the period from the point t2 to the point t3 in time to the slave device3A as a period of time during which a data signal is to be received. Further, the TDMA control circuit11of the master device1allocates the period from the point t3 to the point t4 in time to the slave device3B as a data transmittable period of time. InFIG.9, a symbol SA indicates a data signal transmitted by the slave device3A to the master device1, a symbol MA indicates a data signal transmitted by the master device1to the slave device3A, and a symbol SB indicates a signal transmitted by the slave device3B to the master device.

As described with reference toFIG.7, in a case in which the slave device3A is permitted to transmit data in the period from the point t1 to the point t2 in time, the data signal transmitted from the slave device3A is sent out to the optical network7in the period from the point t1−Tmrx to the point t2−Tmrx in time. Similarly, in a case in which the slave device3B is permitted to transmit data in the period from the point t3 to the point t4 in time, the data signal transmitted from the slave device3B is sent out to the optical network7in the period from the point t3−Tmrx to the point t4−Tmrx in time. Further, as described with reference toFIG.8, in a case in which the period from the point t2 to the point t3 in time is allocated to the slave device3A as a period in which a data signal is received, the data signal transmitted to the slave device3A is sent out to the optical network7in the period from the point t2−Tmrx to the point t3−Tmrx in time. In this manner, even in a case in which upstream communication and downstream communication coexist, data signals do not collide with each other with the control in the present embodiment.

[2] Second Embodiment

Next, a communication system10A according to a second embodiment of the present invention will be described.FIG.10shows the overall configuration of the communication system10A according to the second embodiment. Unlike the communication system10of the first embodiment, a control network6A included in the communication system10A is configured to have a loop shape and is connected to each slave device3and then reconnected to a master device1A. Thus, the master device1A can receive a control signal transmitted by the master device1A itself.

FIG.11is a block diagram showing the functional configurations of the master device1A and a slave device3according to the second embodiment. Unlike the first embodiment, a TDMA control circuit11A included in the master device1A includes a first TDMA control circuit111and a second TDMA control circuit112. Further, unlike the first embodiment, the master device1A includes a control reception circuit15. The first TDMA control circuit111serves to execute TDMA control as a master device, and the second TDMA control circuit112serves to execute TDMA control as a slave device. The control reception circuit15receives a control signal transmitted by a control transmission circuit12.

Also in the communication system10A of the second embodiment, the method of measuring a first round-trip delay time RTTs between a master device and a slave device is similar to the method described in “(3) Round-Trip Delay Time Between Master Device and Slave Device” in the first embodiment. In the second embodiment, the method of measuring a second round-trip delay time RTTm from the master device to the master device is different from the method described in the first embodiment.

Next, the second round-trip delay time RTTm from the master device to the master device will be described.FIG.12is a diagram for explaining the second round-trip delay time RTTm. The second round-trip delay time RTTm is the delay period of time from the time when the master device1A instructs the master device1A itself to transmit a data signal to the time when the master device1A receives the data signal transmitted by the master device1A itself. In order to measure the second round-trip delay time RTTm, the transmission-reception switches4of all of the slave devices3are switched to the pass state (Thru).

As shown inFIG.12, the second round-trip delay time RTTm includes three elements which are delay times Tc, Tmtx, Tmrx. The delay time Tc is the delay period of time during which a control signal transmitted from the master device1A is received in the master device1A, and the processing periods of time in the control transmission circuit12and the control reception circuit15are dominant terms. The delay time Tmtx is the delay period of time required for the master device1A to transmit a data signal, and the processing period of time in the data transmission circuit13is a dominant term. Further, the delay time Tmrx is the delay period of time required for the master device1A to receive a data signal, and the processing period of time in the data reception circuit14is a dominant term.

FIG.13is a time chart showing the second round-trip delay time RTTm. At a point T0(M) in time, the master device1A transmits a control signal to the master device1A. Specifically, the first TDMA control circuit111instructs the control transmission circuit12to transmit the control signal including a time stamp TS0(M) of the point T0(M) in time. The control transmission circuit12generates the frame of the control signal including the time stamp TS0(M) and transmits the control signal to the master device1A. The control signal is sent out to the control network6A. The control reception circuit15of the master device1A provides the received control signal to the second TDMA control circuit112. When receiving the control signal, the second TDMA control circuit112sets the local point in time in the second TDMA control circuit112to the TS0(M). At this time, the sum of the processing periods of time in the control transmission circuit12and the control reception circuit15is the delay time Tc. That is, the local point in time in the second TDMA control circuit112is delayed by the Tc from the point in time in the master device1(the first TDMA control circuit111).

Subsequently, at a point T1(M) in time, the second TDMA control circuit112transmits a data signal to the master device1A itself. The point T1(M) in time is the local point in time in the second TDMA control circuit112. Specifically, the second TDMA control circuit112instructs the data transmission circuit13to transmit the data signal including a time stamp TS1(M) of the point T1(M) in time. A waiting time Tw from the point T0(M) to the point T1(M) in time is the processing period of time in the second TDMA control circuit112. The data transmission circuit13generates the frame of the data signal including the time stamp TS1(M) and transmits the data signal to the master device1A. At this time, the processing period of time in the data transmission circuit13is the delay time Tmtx.

The data signal transmitted from the data transmission circuit13is sent out to the optical network7. The data signal passes through all of the transmission-reception switches4and returns to the master device1A. The data reception circuit14of the master device1A provides the received data signal to the first TDMA control circuit111. The first TDMA control circuit111acquires a point T2(M) in time at which the data signal is received and its time stamp TS2(M). At this time, the processing period of time in the data reception circuit14is the delay time Tmrx.

The first TDMA control circuit111obtains the second round-trip delay time RTTm by performing the operation in the final line of the following formula.

RTTm=Tc+Tmtx+Tmrx=TS⁢2⁢(M)-TS⁢0⁢(M)-Tw=TS⁢2⁢(M)-TS⁢0⁢(M)-(TS⁢1⁢(M)-TS⁢0⁢(M))=TS⁢2⁢(M)-TS⁢1⁢(M)

The first TDMA control circuit111saves the obtained second round-trip delay time RTTm in the storage included in the master device1A.

In this manner, since having the second TDMA control circuit112serving as a slave device therein, the master device1A in the second embodiment can measure the second round-trip delay time RTTm. Also in the second embodiment, the control procedure of upstream communication is similar to the procedure described in “(5) Control Procedure of Upstream Communication” in the first embodiment. The TDMA control circuit31of the slave device3provides an instruction for switching to the transmittable state (Talk) to the switch control transmission circuit33at a point in time that is obtained when the first round-trip time RTTs of the slave device3itself is subtracted from a point in time that is in the period allocated as a transmittable period of time. Further, the TDMA control circuit31of the slave device3instructs the data transmission circuit35to transmit a data signal at a point in time that is obtained when the first round-trip delay time RTTs of the slave device3itself is subtracted from a point in time that is in the period allocated as a transmittable period of time. Thus, in the communication system10A of the second embodiment, it is also possible to control the upstream communication without an occurrence of collision of optical signals.

Further, in the second embodiment, the control procedure of downstream communication is similar to the procedure described in “(6) Control Procedure of Downstream Communication” in the first embodiment. The TDMA control circuit31of the slave device3provides an instruction for switching to the receivable state (Listen) to the switch control transmission circuit33at a point in time that is obtained when the first round-trip delay time RTTs of the slave device3is subtracted from a point in time that is allocated as a point in time at which a data signal is to be received. Further, the second TDMA control circuit112of the master device1A instructs the data transmission circuit13to transmit a data signal at a point in time that is obtained when the second round-trip delay time RTTm is subtracted from a point in time that is allocated as a point in time at which a data signal is to be received in the slave device3. Thus, in the communication system10A of the second embodiment, it is also possible to control the downstream communication in the similar manner as described in the first embodiment.

In this manner, in the second embodiment, it is also possible to control the upstream communication and the downstream communication in the similar manner as described in the first embodiment. Therefore, even in a case in which upstream communication and downstream communication coexist, it is possible to control the upstream communication and the downstream communication in the similar manner as described in “(7) Control Procedure in Case in Which Upstream Communication and Downstream Communication Coexist” of the first embodiment.

[3] Correspondences Between Constituent Elements in Claims and Parts in Preferred Embodiment

In the following paragraphs, non-limiting examples of correspondences between various elements recited in the claims below and those described above with respect to various preferred embodiments of the present disclosure are explained. In the above-mentioned embodiment, the TDMA control circuit11and the TDMA control circuit11A are examples of a master TDMA control circuit, the control transmission circuit12is an example of a master control transmission circuit, and the data transmission circuit13is an example of a master data transmission circuit. Further, in the above-mentioned embodiment, the TDMA control circuit31is an example of a slave TDMA control circuit, and the data transmission circuit35is an example of a slave data transmission circuit. Further, in the above-mentioned embodiment, the control reception circuit15is an example of a master control reception circuit.

As each of various elements recited in the claims, various other elements having configurations or functions described in the claims can be also used.

The functionality of the elements disclosed herein may be implemented using circuitry or processing circuitry which includes general purpose processors, special purpose processors, integrated circuits, ASICs (“Application Specific Integrated Circuits”), conventional circuitry and/or combinations thereof which are configured or programmed to perform the disclosed functionality. Processors are considered processing circuitry or circuitry as they include transistors and other circuitry therein. In the disclosure, the circuitry, units, or means are hardware that carry out or are programmed to perform the recited functionality. The hardware may be any hardware disclosed herein or otherwise known which is programmed or configured to carry out the recited functionality. When the hardware is a processor which may be considered a type of circuitry, the circuitry, means, or units are a combination of hardware and software, the software being used to configure the hardware and/or processor.

[4] Modified Example

While the three gateways5A to5C are connected as the gateway5in the above-mentioned embodiment by way of example, the number of the gateways5is not limited to this. The number of the gateways5may be equal to or larger than four, or may be one or two.

In “(7) Control Procedure in Case in Which Upstream Communication and Downstream Communication Coexist” in the above-mentioned embodiment, the time frames allocated to the respective slave devices3are close to each other as described inFIG.9. This is merely one example, and an interval may be provided between the time frames allocated to the respective slave devices3.

[5] Aspects of Present Invention

The communication system, the master device, the slave device and the communication method described in the above-mentioned embodiments will be clarified by the following features.

(Aspect 1) A communication system according to aspect 1 performs communication between a master device and a slave device with use of TDMA, and includes a control network for transmission of a control signal that connects the master device and the slave device to each other, and an optical network for transmission of a data signal that is reconnected from the master device to the master device through the slave device, wherein the master device includes a master TDMA control circuit, a master control transmission circuit that transmits a first control signal including a time stamp TS0(S) of a point T0(S) in time to the slave device with use of the control network, and a master data transmission circuit that transmits a first data signal including a time stamp TS0(M) of a point T0(M) in time to the master device with use of the optical network, the slave device includes a slave TDMA control circuit that sets a point in time in the slave device to the T0(S) when receiving the first control signal, and a slave data transmission circuit that, at a point T1(S) in time, transmits a second data signal including a time stamp TS1(S) of the point T1(S) in time to the master device with use of the optical network, the master TDMA control circuit acquires a point T2(S) in time at which the second data signal is received and its time stamp TS2(S) and subtracts the time stamp TS1(S) from the time stamp TS2(S) to calculate a first round-trip delay time, and acquires a point T1(M) in time at which the first data signal is received and its time stamp TS1(M) and subtracts the time stamp TS0(M) from the time stamp TS1(M) to calculate a second round-trip delay time, the master data transmission circuit transmits a data signal to the slave device at a point in time that is obtained when the second round-trip delay time is subtracted from a point TA in time that is allocated by the master TDMA control circuit, and the slave device puts the slave device in a data receivable state at a point in time that is obtained when the first round-trip delay time is subtracted from the point TA in time.

With the communication system according to aspect 1, the timing for transmission is accurately controlled in the communication mode in which a data signal is transmitted from the master device to the slave device, so that it is possible to avoid collision and loss of signals.

(Aspect 2) The communication system according to aspect 1, wherein the slave device may include a switch control transmission circuit that, at the point T1(S) in time, provides a control signal for switching the slave device to a data transmittable state to a transmission-reception switch, and the switch control transmission circuit may provide a control signal for switching the slave device to a data receivable state to the transmission-reception switch at a point in time that is obtained when the first round-trip delay time is subtracted from the point TA in time.

Because the transmission-reception switch is switched to the receivable state with use of the first round-trip delay time, the slave device can receive data.

(Aspect 3) A communication system according to aspect 3 performs communication between a master device and a slave device with use of TDMA, and includes a control network for transmission of a control signal that is reconnected from the master device to the master device through the slave device, and an optical network for transmission of a data signal that is reconnected from the master device to the master device through the slave device, wherein the master device includes a master TDMA control circuit, a master control transmission circuit that transmits a first control signal including a time stamp TS0(S) of a point T0(S) in time to the slave device with use of the control network and transmits a second control signal including a time stamp TS0(M) of a point T0(M) in time to the master device with use of the control network, a master control reception circuit that receives the second control signal, and a master data transmission circuit that transmits a first data signal including a time stamp TS1(M) of a point T1(M) in time to the master device with use of the optical network in response to reception of the second control signal by the master control reception circuit, the slave device includes a slave TDMA control circuit that sets a point in time in the slave device to the T0(S) when receiving the first control signal, and a slave data transmission circuit that transmits a second data signal including a time stamp TS1(S) of a point T1(S) in time to the master device with use of the optical network at the point T1(S) in time, the master TDMA control circuit acquires a point T2(S) in time at which the second data signal is received and its time stamp TS2(S) and subtracts the time stamp TS1(S) from the time stamp TS2(S) to calculate a first round-trip delay time, and acquires a point T2(M) in time at which the first data signal is received and its time stamp TS2(M) and subtracts the time stamp TS1(M) from the time stamp TS2(M) to calculate a second round-trip delay time, the master data transmission circuit transmits a data signal to the slave device at a point in time that is obtained when the second round-trip delay time is subtracted from a point TA in time that is allocated by the master TDMA control circuit, and the slave device puts the slave device in a data receivable state at a point in time that is obtained when the first round-trip delay time is subtracted from the point TA in time.

With the communication system according to aspect 3, the timing for transmission is accurately controlled in the communication mode in which a data signal is transmitted from the master device to the slave device, so that it is possible to avoid collision and loss of signals.

(Aspect 4) The communication system according to aspect 3, wherein the slave device may include a switch control transmission circuit that provides a control signal for switching the slave device to a data transmittable state to a transmission-reception switch at the point T1(S) in time, and the switch control transmission circuit may provide a control signal for switching the slave device to a data receivable state to the transmission-reception switch at a point in time that is obtained when the first round-trip delay time is subtracted from the point TA in time.

Because the transmission-reception switch is switched to the receivable state with use of the first round-trip delay time, the slave device can receive data.

(Aspect 5) The communication system according to aspect 1 or 3, wherein the slave device may put the slave device in a data transmittable state at a point in time that is obtained when the first round-trip delay time is subtracted from a point TB in time that is allocated by the master TDMA control circuit.

With the communication system according to aspect 5, the timing for transmission is accurately controlled in the communication mode in which a data signal is transmitted from the slave device to the master device, so that it is possible to avoid collision and loss of signals.

(Aspect 6) The communication system according to aspect 2 or 4, wherein the switch control transmission circuit may provide a control signal for switching the slave device to a data transmittable state at a point in time that is obtained when the first round-trip delay time is subtracted from a point TB in time that is allocated by the slave TDMA control circuit, and the slave data transmission circuit may transmit a data signal to the master device with use of the optical network at a point in time that is obtained when the first round-trip delay time is subtracted from the point TB in time.

With the communication system according to aspect 6, the timing for transmission is accurately controlled in the communication mode in which a data signal is transmitted from the slave device to the master device, so that it is possible to avoid collision and loss of signals.

(Aspect 7) A master device that is used in the communication system according to aspect 1 or 3.

(Aspect 8) A slave device that is used in the communication system according to aspect 1 or 3.

(Aspect 9) A communication method according to aspect 9 of performing communication between a master device and a slave device with use of TDMA in a communication system comprising a control network for transmission of a control signal that connects the master device and the slave device to each other and an optical network for transmission of a data signal that is reconnected from the master device to the master device through the slave device includes, in the master device, transmitting a first control signal including a time stamp TS0(S) of a point TO in time to the slave device with use of the control network, in the master device, transmitting a first data signal including a time stamp TS0(M) of a point T0(M) in time to the master device with use of the optical network, setting a point in time in the slave device to the T0(S) when the slave device receives the first control signal, in the slave device, transmitting a second data signal including a time stamp TS1(S) of a point T1(S) in time to the master device with use of the optical network at the point T1(S) in time, in the master device, acquiring a point T2(S) in time at which the second data signal is received and its time stamp TS2(S) and subtracting the time stamp TS1(S) from the time stamp TS2(S) to calculate a first round-trip delay time, and acquiring a point T1(M) in time at which the first data signal is received and its time stamp TS1(M) and subtracting the time stamp TS0(M) from the time stamp TS1(M) to calculate a second round-trip delay time, in the master device, allocating a point TA in time to the slave device when a data signal is transmitted to the slave device, in the master device, transmitting a data signal to the slave device at a point in time that is obtained when the second round-trip delay time is subtracted from the point TA in time, and in the slave device, putting the slave device in a data receivable state at a point in time that is obtained when the first round-trip delay time is subtracted from the point TA in time.

With the communication method according to aspect 9, the timing for transmission is accurately controlled in the communication mode in which a data signal is transmitted from the master device to the slave device, so that it is possible to avoid collision and loss of signals.

(Aspect 10) A communication method according to aspect 10 of performing communication between a master device and a slave device with use of TDMA in a communication system comprising a control network for transmission of a control signal that is reconnected from the master device to the master device through the slave device and an optical network for transmission of a data signal that is reconnected from the master device to the master device through the slave device, includes, in the master device, transmitting a first control signal including a time stamp TS0(S) of a point TO in time to the slave device with use of the control network, in the master device, transmitting a second control signal including a time stamp TS0(M) of a point T0(M) in time to the master device with use of the control network, in the master device, receiving the second control signal, in the master device, transmitting a first data signal including a time stamp TS1(M) of a point T1(M) in time to the master device with use of the optical network in response to reception of the second control signal, setting a point in time in the slave device to the T0(S) when the slave device receives the first control signal, in the slave device, transmitting a second data signal including a time stamp TS1(S) of a point T1(S) in time to the master device with use of the optical network at the point T1(S) in time, in the master device, acquiring a point T2(S) in time at which the second data signal is received and its time stamp TS2(S) and subtracting the time stamp TS1(S) from the time stamp TS2(S) to calculate a first round-trip delay time, and acquiring a point T2(M) in time at which the first data signal is received and its time stamp TS2(M) and subtracting the time stamp TS1(M) from the time stamp TS2(M) to calculate a second round-trip delay time, in the master device, allocating a point TA in time to the slave device when a data signal is transmitted to the slave device, in the master device, transmitting a data signal to the slave device at a point in time that is obtained when the second round-trip delay time is subtracted from the point TA in time, and in the slave device, putting the slave device in a data receivable state at a point in time that is obtained when the first round-trip delay time is subtracted from the point TA in time.

With the communication system according to aspect 10, the timing for transmission is accurately controlled in the communication mode in which a data signal is transmitted from the master device to the slave device, so that it is possible to avoid collision and loss of signals.

While preferred embodiments of the present disclosure have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing the scope and spirit of the present disclosure. The scope of the present disclosure, therefore, is to be determined solely by the following claims.