Patent ID: 12232266

LIST OF REFERENCE NUMERALS

100: Circuit board;110: Lead-in part;111: First insulation layer;112: Metal layer;113: Second insulation layer;114,114a,114b: Through hole;115: First positioning hole;120: Cable;130: Stimulation end;131: Stimulation electrode;200: Chip;201: Contact;300: Mask;301: Opening;302: Second positioning hole;310: Substrate;311: First photoresist layer;312: Mask layer;313: Shielding layer;314: Second photoresist layer;400: Conductive adhesive;500: Operating station;501: Accommodating slot;502: Guiding slot;503: Vacuum pump joint.

DETAILED DESCRIPTION OF EMBODIMENTS

Embodiments of the present disclosure will be described in detail with reference to the drawings in the following. Throughout the drawings, same or similar elements are represented using same or similar reference numerals. For purpose of clearness, various parts in the drawings are not drawn to scale.

The detailed description of embodiments of the present disclosure will be given in the follows in conjunction with the drawings and the embodiments.

FIG.1ato FIG. if illustrate sectional views showing stages in a connection method for a chip and a circuit board according to an embodiment of the present disclosure, which are taken along the AA line inFIG.5a.FIG.2atoFIG.2cillustrate top views showing one or more stages in a connection method for a chip and a circuit board according to an embodiment of the present disclosure.FIG.3illustrates a schematic diagram showing an operating station according to an embodiment of the present disclosure.

As illustrated inFIG.1a, a chip200is placed, with one surface of the chip200on which a contact201is provided facing upward. For simplicity,FIG.1aillustrates only one contact201. However, an arbitrary number of contact(s)201may be provided on the chip200. Optionally, more than 60 contacts201may be provided. For example, 256, 512 or more contacts201may be provided (referring toFIG.2a).

Optionally, an operation station500illustrated inFIG.3may be configured to fix the chip200. The operation station500includes an accommodating slot501, a guiding slot502and a vacuum pump joint503. The step of placing the one surface of the chip200on which the contact201is provided as facing upward as described above is performed as follows. Particularly, the chip200is pushed into the accommodating slot501along a front-rear direction of the guiding slot502which is an extending direction of the guiding slot502, with one surface of the chip200with contacts201facing upward. The accommodating slot501is connected with a vacuum pump tube (not shown in the drawings). The vacuum pump tube is connected with a vacuum pump via the vacuum pump joint503, and the vacuum pump generates a negative pressure so as to fix the chip200into the accommodating slot501. It should be noted that, the accommodating slot501may be connected with a vacuum tube (including but not limited to the vacuum pump tube), and the chip200can be fixed via a negative pressure caused by the vacuum environment so as to realize the technical effect of the present disclosure.

Further, as illustrated inFIG.1B, a circuit board100is placed on the chip200. The circuit board100has a first surface in contact with the chip200and has a plurality of through holes114aligned with a plurality of contacts201respectively.

Optionally, after the circuit board100is placed and the through holes114in the circuit board100are aligned with the contacts201of the chip200, the circuit board100is fixed onto the chip200. For example, a first adhesive is injected into a first positioning hole115(as illustrated inFIG.2b) in the circuit board100. The first positioning hole115extends through the circuit board100and is located in a non-metal region of the circuit board100. Alternatively, the circuit board100is fixed on the chip200using an adhesive tape.

Further, as illustrated inFIG.1c, a mask300is placed on a second surface of the circuit board100, and the mask300has a plurality of openings301aligned with the plurality of through holes114respectively. The mask300may be a thin film formed of one of several kinds of available polymers and/or metal materials, for example, a polyimide mask. The mask300may be optionally a mask of parylene. The mask300may be manufactured for example using the manufacturing method as illustrated inFIG.4atoFIG.4f.

Optionally, after the mask300is placed and the openings301in the mask300are aligned with the through holes114of the circuit board100, the mask300is fixed onto the circuit board100. For example, a second adhesive is injected into a second positioning hole302(as illustrated inFIG.2c) in the mask300. The second positioning hole302extends through the mask300, and the second adhesive is connected with a non-metal region of the circuit board100. Alternatively, the mask300is fixed onto the circuit board100using an adhesive tape.

Further, as illustrated inFIG.1d, a surface of the mask300is covered by a conductive adhesive400to fill the plurality of through holes114and the plurality of openings301with the conductive adhesive400. For example, the conductive adhesive400is dripped onto the mask300, and sequentially flows through the opening301and the through hole114to the contact201from up to down due to the liquidity of the conductive adhesive400, so as to form an electrical connection between the contact201and the metal layer112in the through hole114. The conductive adhesive400may be any one of silver-based conductive adhesive, gold-based conductive adhesive, platinum-based conductive adhesive, copper-based conductive adhesive and carbon-based conductive adhesive or any combination thereof. Optionally, the conductive adhesive400may be silver-based conductive adhesive, for example, silver-carbon-epoxy adhesive.

In an optional embodiment, as illustrated in a partial enlarged diagram inFIG.2c, the opening301has a cross-sectional area greater than that of the through hole114, and the through hole114has a cross-sectional area greater than that of the contact201. In this way, the conductive adhesive400could completely cover the contact201, so as to guarantee the reliability of the electrical connection between the metal layer112and the contact201.

Further, as illustrated inFIG.1e, portions of the conductive adhesive400in the plurality of through holes114are kept spaced apart from each other. The portions of the conductive adhesive400that fill the plurality of through holes114remain to provide an electrical connection between the circuit board100and the chip200. In this step, the conductive adhesive400on the surface of the mask300is removed to keep the portions of the conductive adhesive400in the plurality of through holes114spaced apart from each other. Optionally, before removing the conductive adhesive400on the surface of the mask300, a first baking process is performed on the conductive adhesive400to reduce the fluidity of the conductive adhesive400, so as to facilitate removing the conductive adhesive400on the surface of the mask300by a scraping method.

Further, as illustrated inFIG.1f, the mask300is removed. For example, the mask300is removed through mechanical peeling or by immersion in a chemical agent. Optionally, after removing the mask300, a second baking process is performed on the conductive adhesive400to cure and solidify the conductive adhesive400.

In some other optional embodiments, the first baking process may be performed on the conductive adhesive400at a different time. For example, before performing the step illustrated in theFIG.1d, the first baking process is performed on the conductive adhesive400to reduce the fluidity of the conductive adhesive400, and then the steps illustrated inFIG.1dtoFIG.1fare performed sequentially. That is, after the surface of the mask300is covered by the conductive adhesive400which has been subject to the first baking process, portions of the conductive adhesive400on the surface of the mask300and the mask300are sequentially removed, and then, the second baking process is performed on the conductive adhesive400to cure and solidify the conductive adhesive400.

In the above embodiment, the mask300is covered by the conductive adhesive400, so as to form an electrical connection between the plurality of contacts201and the circuit board100in one time. In this way, the manufacturing process can be simplified and the reliability in the electrical connection between the chip200and the circuit board100can be guaranteed, thereby avoiding occurrence of short circuiting or open circuiting. In addition, the method is simple in process, can increase yield rate of the process and can guarantee a normal operation of the chip200under a size constraint. Furthermore, the connection method is especially suitable for miniaturized electronic devices.

FIG.4atoFIG.4fillustrate sectional views showing various stages in the manufacturing method for an mask according to an embodiment of the present disclosure.

As illustrated inFIG.4a, the manufacturing method starts from a substrate310and a first photoresist layer311on the substrate310. The substrate310is configured to provide mechanical support. The first photoresist layer311is configured to protect the substrate310in an etching process and to serve as a sacrificial layer in the step of releasing the mask300. In some other optional embodiments of the present disclosure, the first photoresist layer311may be omitted to lower the cost and to simplify the manufacturing process.

Optionally, in the above step, the substrate310may be a wafer. Firstly, the wafer is cleaned. Then, a surface of the wafer is coated with a negative photoresist through spin coating, and a hard baking process is performed on the negative photoresist to form the first photoresist layer311.

Further, as illustrated inFIG.4b, a mask layer312is formed on the first photoresist layer311. Taking the mask layer312made from parylene as an example, the mask layer312is formed through a chemical vapor deposition (CVD) process. The CVD device for depositing parylene includes a vaporization system and a deposition system. The vaporization system includes two stages. In a first stage, parylene in a powdered form is heated in vacuum to be vaporized; and in a second stage, the vaporized parylene is transferred into a furnace chamber and is pyrolyzed into monomers (paraxylene as free radicals) at a preset temperature. Next, the monomers (paraxylene as free radicals) are provided into the deposition system. In the deposition system, the monomers are cooled and are deposited to form a parylene layer.

Further, as illustrated inFIG.4c, an etch shielding layer313is formed on the mask312. In this step, optionally, the etch shielding layer313is made from metal such as aluminium, titanium, gold, chromium, nickel and so on. For example, the etch shielding layer313is an aluminium layer which may be formed through vaporization or spraying.

Further, as illustrated inFIG.4d, a second patterned photoresist layer314is formed on the etch shielding layer313to expose parts of a surface of the etch shielding layer313. For example, when the etch shielding layer313is an aluminium layer, a surface of the aluminium layer is subject to a spin coating process to form the second photoresist layer314and then the second photoresist layer314is patterned through exposure and development.

Further, as illustrated inFIG.4e, the etch shielding layer313is patterned. An exposed surface of the etch shielding layer313is subject to a surface treatment by a plasma etching process, and openings are formed on the exposed surface using an etching solution. Optionally, after forming an opening of the etch shielding layer313, the etch shielding layer313is cleaned and dried by spin-drying to remove residue etching solution and the second photoresist layer314.

Optionally, the steps illustrated inFIG.4ctoFIG.4emay be omitted. That is, the etch shielding layer313may be omitted, and the surface of the mask layer312is directly covered by a second patterned photoresist layer314which serves as an etch shielding layer.

Further, as illustrated inFIG.4f, the mask layer312is patterned. In this step, an opening is formed in the mask layer312using an anisotropic dry etching process. After the opening is formed in the mask layer312, the etch mask layer313is removed, the first photoresist layer311is dissolved, and the substrate310is removed, and then water washing and baking processes are performed, and the mask layer312is left, forming a mask having an opening.

FIG.5aandFIG.5billustrate a three dimensional view and an exploded view showing a portion of a circuit board assembly according to an embodiment of the present disclosure. The circuit board assembly includes the circuit board100, the chip200and the conductive adhesive400.

The circuit board100has a plurality of through holes114extending through the circuit board100. The chip200includes a plurality of contacts201aligned with the plurality of through holes114. The chip200is connected to a first surface of the circuit board100via a conductive adhesive400. At least a portion of the conductive adhesive400is filled into each of the plurality of through holes114, and extends over a preset height from a second surface of the circuit board100towards a direction that faces away from the second surface so as to form a free end. The free end of the conductive adhesive400has a flat surface, the second surface is opposite to the first surface, and the conductive adhesive400provides an electrical connection between the circuit board100and the chip200.

In this embodiment, the above free end of the conductive adhesive400has a cross-sectional area greater than that of the conductive adhesive in the through hole114. A cross section of the conductive adhesive400is taken along the AA line in the vertical direction, the conductive adhesive400has a T-shaped cross section, thereby enlarging the contact area between the conductive adhesive400and the circuit board100, and enhancing the bonding strength between the chip200and the circuit board100.

Optionally, the circuit board100includes a first insulation layer111, a metal layer112and a second insulation layer113. The metal layer112is located between the first insulation layer111and the second insulation layer113. Each through hole114extends through the first insulation layer111, the metal layer112and the second insulation layer113. A through hole114ain the second insulation layer113has a cross-sectional area that is greater than that of a through hole114bin the first insulation layer111to expose a part of a surface of the metal layer112. The exposed surface of the metal layer112is configured for electrical connection. Optionally, the first insulation layer111and the second insulation layer113may be made from any of poly(methyl methacrylate) (PMMA), Teflon, silicon resin, polyimide, polyethylene terephthalate, or poly-p-xylylene (parylene).

In the embodiments of the present disclosure, the chip200and the mask300are positioned on two opposite sides of the through holes114of the circuit board100. Optionally, the exposed surface of the first insulation layer111is the first surface of the circuit board100, and the exposed surface of the second insulation layer113is the second surface of the circuit board100, facilitating the flow of the conductive adhesive400into the through holes114.

In this embodiment, the above free end of the conductive adhesive400has a cross-sectional area greater than that of the portion of the conductive adhesive400in the through hole114a, and the portion of the conductive adhesive400in the through hole114ahas a cross-sectional area greater than that of the portion of the conductive adhesive400in the through hole114b. A cross section of the conductive adhesive400is taken along the AA line in the vertical direction, the conductive adhesive400has a step-shaped cross section, enlarging the contact area between the conductive adhesive400and the circuit board100, enhancing the bonding strength between the chip200and the circuit board100and reducing the contact resistance between the chip200and the circuit board100.

FIG.6illustrates a schematic diagram of a circuit board100according to an embodiment of the present disclosure. The circuit board100includes a lead-in part110, a cable120and a stimulation end130. Optionally, the circuit board100may be a flexible electrode, which may be applied in an implantable device, such as an artificial cochlea implant, a retina stimulation based-visual prosthesis, a cerebral cortex stimulation based-visual prosthesis, a spinal cord stimulator, a brain stimulator and other implantable devices, to realize a corresponding functional recovery such as for visual sense or auditory sense or pain relief and others. A flexible electrode may avoid possible damages to a tissue when being in contact with the tissue, and can guarantee high biological compatibility and reliability. In an alternative embodiment, the circuit board100may be any kind of circuit board having through holes114.

The lead-in part110is provided with a plurality of through holes114. Each of the through holes114is configured to be filled with conductive material to allow the lead-in part110to be connected with a chip. The cable120may include, at its surface or in its interior, a metal layer (not illustrated) corresponding to the stimulation end130. The stimulation end130is provided thereon with a plurality of stimulation electrodes131which are connected to the lead-in part110via the cable120, and then are connected to the chip via the through holes114to form a complete stimulation circuit. As an embodiment, the plurality of stimulation electrodes131may be configured as an array of electrodes arranged in rows and columns.

A circuit board in an implantable device is taken as an example in this embodiment. However, the circuit board in the present disclosure is not limited to a flexible electrode, and the electronic device is not limited to an implantable device. The circuit board100may be an arbitrary-shaped circuit board made of an insulation layer and a metal layer, to realize connection with the chip to form various kinds of electronic devices.

Optionally, in an embodiment of the present disclosure, a protection film (not illustrated in the drawings) integrally encapsulating the surfaces of the circuit board assembly is further included. The protection film may be one or more of a parylene film, a polyimide film, a polypropylene film, a polyethylene terephthalate film, and a silicone film. The protection film can provide protection against mechanical damage, erosion by water vapor and chemical corrosion, improving the reliability and stability of the circuit board assembly.

The above description has been given with respect to some embodiments of the present disclosure in which not all the details are specifically described. However, the present disclosure is not limited to the description of the above embodiments. Apparently, based on the above description, various amendments and changes may be made. The above embodiments in the present disclosure are selected and described in detail for better explaining the principle and practical application of the present disclosure, so as to allow a person skilled in the art to better utilize the present disclosure and amendments based on the present disclosure. The present disclosure is limited to only the scope of claims and their equivalents.