Patent ID: 12218592

DETAILED DESCRIPTION

Outline of Embodiments

A summary of several example embodiments of the disclosure follows. This summary is provided for the convenience of the reader to provide a basic understanding of such embodiments and does not wholly define the breadth of the disclosure. This summary is not an extensive overview of all contemplated embodiments and is intended to neither identify key or critical elements of all embodiments nor to delineate the scope of any or all aspects. Its sole purpose is to present some concepts of one or more embodiments in a simplified form as a prelude to the more detailed description that is presented later. For convenience, the term “one embodiment” may be used herein to refer to a single embodiment or multiple embodiments of the disclosure.

1. One embodiment disclosed in the present description relates to a control circuit for a DC/DC converter that boosts an input voltage VINand generates an output voltage VOUT. The control circuit includes a main comparator that compares a feedback voltage corresponding to an output voltage of the DC/DC converter with a reference voltage and asserts a turn-on signal when the feedback voltage falls below the reference voltage, and a timer circuit that generates a turn-off signal transitioning in level after an on time proportional to (VOUT−VIN)/VOUThas elapsed from the assertion of the turn-on signal.

According to this embodiment, a switching frequency can be stabilized by adaptively changing the ON time according to the input voltage and the output voltage.

The timer circuit may include a first capacitor, a current source that is connected to the first capacitor and generates a current proportional to VOUT, and a comparator that detects that a voltage change proportional to (VOUT−VIN) occurs in the first capacitor.

The current generated by the current source is I=α×VOUT. Time TONrequired for the voltage change ΔV=β×(VOUT−VIN) proportional to (VOUT−VIN) to occur in the first capacitor is expressed as
TON=ΔV/I=β×(VOUT−VIN)/(α×VOUT)=(β/α)×(VOUT−VIN)/VOUT,and the ON time proportional to (VOUT−VIN)/VOUTcan be generated.

One end of the first capacitor may be grounded. The timer circuit may further include a threshold voltage generation circuit that generates a threshold voltage according to (VOUT−VIN). The comparator may compare a voltage at the other end of the first capacitor with the threshold voltage.

The threshold voltage generation circuit may include a second capacitor. The threshold voltage generation circuit may charge the second capacitor with (VOUT−VIN) in the OFF state of the switching transistor, apply the switching voltage of a connection node between the inductor and the switching transistor to one end of the second capacitor in an ON period of the switching transistor, and set the voltage at the other end of the second capacitor as the threshold voltage. The switching voltage during the ON period is I×RON1. I is a current flowing through the switching transistor, and RON1is an ON resistance of the switching transistor. Therefore, according to this configuration, it is possible to generate the ON time in consideration of the ON resistance of the switching transistor.

The threshold voltage generation circuit may include a second capacitor, a first selector that applies an input voltage VINto one end of the second capacitor in the OFF state of the switching transistor and connects the one end of the second capacitor with the inductor of the DC/DC converter and the connection node of the switching transistor during an ON period of the switching transistor, and a second selector that applies an output voltage VOUTto the other end of the second capacitor in the OFF state of the switching transistor and connects the other end of the second capacitor with the comparator during the ON period of the switching transistor. According to this configuration, it is possible to generate the ON time in consideration of the ON resistance of the switching transistor.

The threshold voltage generation circuit may include an inverter that inverts a switching voltage generated at an inductor of the DC/DC converter and a connection node of the switching transistor, and a filter that smooths an output of the inverter and generates a threshold voltage. According to this configuration, the ON time can be generated in consideration of the influence of the ON resistances of the switching transistor and the synchronous rectification transistor as well as the equivalent series resistance of the inductor.

The filter may be an RC filter. The threshold voltage generation circuit may charge the capacitor of the RC filter with VOUT−VINwhile operating in the discontinuous current mode. According to this configuration, when returning from the discontinuous current mode to the continuous current mode, the operation can be resumed from an appropriate ON time.

The filter may be an RC filter including a resistor and a capacitor. The threshold voltage generation circuit may further include a third selector that applies an output voltage of the inverter to one end of the resistor during the continuous current mode and applies the output voltage VOUTto one end of the resistor during the discontinuous current mode, and a fourth selector that applies a ground voltage to the other end of the capacitor during the continuous current mode and applies the input voltage VINto the other end of the capacitor during the discontinuous current mode. According to this configuration, when returning from the discontinuous current mode to the continuous current mode, the operation can be resumed from an appropriate ON time.

The input voltage VINmay be applied to one end of the first capacitor. The comparator may compare the voltage at the other end of the first capacitor with the output voltage VOUT. Since the ON resistance of the transistor and the equivalent series resistance of the inductor are ignored, the ON time can be generated with a simple configuration although the frequency at a heavy load becomes faster.

The control circuit may be integrally integrated on one semiconductor substrate. The term “integrally integrated” includes a case where all components of a circuit are formed on a semiconductor substrate and a case where main components of the circuit are integrally integrated, and some resistors, capacitors, and the like may be provided outside the semiconductor substrate for adjusting a circuit constant. By integrating the circuits on one chip, a circuit area can be reduced, and the characteristics of circuit elements can be kept uniform.

2. One embodiment disclosed in the present description relates to a control circuit for a DC/DC converter including a switching transistor. A control circuit includes a main comparator that compares a feedback voltage corresponding to an output voltage of a DC/DC converter with a reference voltage, and asserts a turn-on signal when the feedback voltage falls below the reference voltage; an ON time generation circuit that asserts a turn-off signal after a lapse of an ON time from the assertion of the turn-on signal; an overcurrent detection circuit that asserts an overcurrent detection signal when a current flowing through a switching transistor exceeds an overcurrent threshold in an ON period of the switching transistor; a turn-on inhibition circuit that generates a turn-on inhibition signal to be asserted in a period from the turn-on of the switching transistor to the lapse of a predetermined time; a logic circuit that generates a pulse signal that transitions to an on-level when the turn-on signal is asserted in a period in which the turn-on inhibition signal is negated, and transitions to an OFF level when the turn-off signal or the overcurrent detection signal is asserted; and a driver that drives the switching transistor according to the pulse signal.

According to this embodiment, the output voltage can be lowered in the overcurrent state.

The DC/DC converter may be a boost type that boosts the input voltage VINand generates an output voltage VOUT.

The ON time may be proportional to (VOUT−VIN)/VOUT. A switching frequency can be stabilized by adaptively changing the ON time according to the input voltage and the output voltage.

The ON time generation circuit may include a first capacitor, a current source that is connected to the first capacitor and generates a current proportional to VOUT, and a comparator that detects that a voltage change proportional to (VOUT−VIN) occurs in the first capacitor.

The current generated by the current source is I=α×VOUT. The time TONrequired for the voltage change ΔV=β×(VOUT−VIN) proportional to (VOUT−VIN) to occur in the first capacitor is expressed as

TON=Δ⁢V/I=β×(VOUT-VIN)/(α×VOUT)=(β/α)×(VOUT-VIN)/VOUT,

and the ON time proportional to (VOUT−VIN)/VOUTcan be generated.

One end of the first capacitor may be grounded. The ON time generation circuit may further include a threshold voltage generation circuit that generates a threshold voltage according to (VOUT−VIN). The comparator may compare a voltage at the other end of the first capacitor with the threshold voltage.

The threshold voltage generation circuit may include a second capacitor. The threshold voltage generation circuit may charge the second capacitor with (VOUT−VIN) in the OFF state of the switching transistor, apply the switching voltage of a connection node between the inductor and the switching transistor to one end of the second capacitor in an ON period of the switching transistor, and set the voltage at the other end of the second capacitor as the threshold voltage. The switching voltage during the ON period is I×RON1. I is a current flowing through the switching transistor, and RON1is an ON resistance of the switching transistor. Therefore, according to this configuration, it is possible to generate the ON time in consideration of the ON resistance of the switching transistor.

The threshold voltage generation circuit may include a second capacitor, a first selector that applies an input voltage VINto one end of the second capacitor in the OFF state of the switching transistor and connects the one end of the second capacitor with the inductor of the DC/DC converter and the connection node of the switching transistor during an ON period of the switching transistor, and a second selector that applies an output voltage VOUTto the other end of the second capacitor in the OFF state of the switching transistor and connects the other end of the second capacitor with the comparator during the ON period of the switching transistor. According to this configuration, it is possible to generate the ON time in consideration of the ON resistance of the switching transistor.

The threshold voltage generation circuit may include an inverter that inverts a switching voltage generated at an inductor of the DC/DC converter and a connection node of the switching transistor, and a filter that smooths an output of the inverter and generates a threshold voltage. According to this configuration, the ON time can be generated in consideration of the influence of the ON resistances of the switching transistor and the synchronous rectification transistor as well as the equivalent series resistance of the inductor.

The filter may be an RC filter. The threshold voltage generation circuit may charge the capacitor of the RC filter with VOUT−VINwhile operating in the discontinuous current mode. According to this configuration, when returning from the discontinuous current mode to the continuous current mode, the operation can be resumed from an appropriate ON time.

The filter may be an RC filter including a resistor and a capacitor. The threshold voltage generation circuit may further include a third selector that applies an output voltage of the inverter to one end of the resistor during the continuous current mode and applies the output voltage VOUTto one end of the resistor during the discontinuous current mode, and a fourth selector that applies a ground voltage to the other end of the capacitor during the continuous current mode and applies the input voltage VINto the other end of the capacitor during the discontinuous current mode. According to this configuration, when returning from the discontinuous current mode to the continuous current mode, the operation can be resumed from an appropriate ON time.

The input voltage VINmay be applied to one end of the first capacitor. The comparator may compare the voltage at the other end of the first capacitor with the output voltage VOUT. Since the ON resistance of the transistor and the equivalent series resistance of the inductor are ignored, the ON time can be generated with a simple configuration although the frequency at a heavy load becomes faster.

The control circuit may be integrally integrated on one semiconductor substrate. The term “integrally integrated” includes a case where all components of a circuit are formed on a semiconductor substrate and a case where main components of the circuit are integrally integrated, and some resistors, capacitors, and the like may be provided outside the semiconductor substrate for adjusting a circuit constant. By integrating the circuits on one chip, a circuit area can be reduced, and the characteristics of circuit elements can be kept uniform.

EMBODIMENTS

Hereinafter, the present disclosure will be described based on preferred embodiments with reference to the drawings. The same or equivalent components, members, and processes illustrated in the drawings are denoted by the same reference numerals, and redundant description will be omitted as appropriate. Furthermore, the embodiments are not intended to limit the invention but are examples, and all features described in the embodiments and combinations thereof are not necessarily essential to the invention.

In the present description, “a state in which a member A is connected to a member B” includes not only a case where the member A and the member B are physically and directly connected to each other, but also a case where the member A and the member B are indirectly connected to each other via another member that does not substantially affect an electrical connection state between the member A and the member B or that does not impair a function or an effect exhibited by coupling between the two members.

Similarly, “a member C is provided between the member A and the member B” includes not only a case where the member A and the member C, or the member B and the member C are directly connected to each other, but also a case where the members are indirectly connected to each other via another member that does not substantially affect an electrical connection state between the members or that does not impair a function or an effect exhibited by the connection between the members.

In addition, “a signal A (voltage, current) is corresponding to a signal B (voltage, current)” means that the signal A has a correlation with the signal B. Specifically, it means (i) when the signal A is the signal B, (ii) when the signal A is proportional to the signal B, (iii) when the signal A is obtained by level-shifting the signal B, (iv) when the signal A is obtained by amplifying the signal B, (v) when the signal A is obtained by inverting the signal B, (vi) or any combination thereof, or the like. It is understood by a person skilled in the art that a range of “corresponding to” is determined according to types and applications of the signals A and B.

A vertical axis and a horizontal axis of a waveform diagram and a time chart referred to in the present description are appropriately enlarged and reduced for easy understanding, and each waveform shown is simplified or exaggerated or emphasized for easy understanding.

First Embodiment

FIG.1is a circuit diagram of a DC/DC converter100according to the first embodiment. The DC/DC converter100is a boost converter, boosts an input voltage VINof an input line (an input terminal)102, stabilizes the input voltage to a predetermined voltage level, and supplies the voltage to a load4connected to an output line (output terminal)104.

The DC/DC converter100includes an output circuit110and a control circuit300. The output circuit110includes an inductor L1, a switching transistor (a low-side transistor) M1, a synchronous rectification transistor (a high-side transistor) M2, and an output capacitor C1.

The control circuit300is a controller of a ripple control method, more specifically, a bottom detection method, and includes a switching pin SW and an output pin OUT. An external inductor L1is connected to the switching pin SW, and an external output capacitor C1and the output line104are connected to the output pin OUT.

The control circuit300includes a voltage dividing circuit302, a main comparator308, a logic circuit312, a first driver314, a second driver316, a timer circuit320, a switching transistor M1, and a synchronous rectification transistor M2, and is an integrated circuit (IC) integrated on one semiconductor substrate.

The voltage dividing circuit302includes the resistors R11and R12and divides the output voltage VOUTto generate the feedback voltage VFB.

The main comparator308compares the feedback voltage VFBcorresponding to the output voltage VOUTof the DC/DC converter100with a reference voltage VREFand asserts a turn-on signal S1when the feedback voltage VFBfalls below the reference voltage VREF. The turn-on signal S1is a pulse signal indicating a magnitude relationship between VFBand VREF, and one of a positive edge and a negative edge can be associated with assertion.

The logic circuit312generates pulse signals Sp1and Sp2instructing on and off of the switching transistor M1and the synchronous rectification transistor M2based on the turn-on signal S1.

The logic circuit312changes a start signal STARTX with assertion of the turn-on signal S1as a trigger to operate the timer circuit320. The timer circuit320generates a turn-off signal S2that transitions in level after a lapse of an ON time TONproportional to (VOUT−VIN)/VOUTfrom assertion of the turn-on signal S1. The turn-off signal S2indicates a turn-off timing of the switching transistor M1.

The first pulse signal Sp1is at the ON level (for example, high) during the on time TONfrom assertion of the turn-on signal S1to assertion of the turn-off signal S2, and is at an OFF level (for example, low) until assertion of the next turn-on signal S1.

In the continuous current mode (CCM), the logic circuit312complementarily changes the second pulse signal Sp2with the first pulse signal Sp1. In the discontinuous current mode (DCM), the zero crossing of the current flowing through the synchronous rectification transistor M2is detected, and the OFF levels of both the first pulse signal Sp1and the second pulse signal Sp2are maintained from the current zero crossing to the assertion of the next turn-on signal S1.

FIG.2is the equivalent circuit diagram of the output circuit110of the DC/DC converter100. RDCis an equivalent series resistance such as the inductor L1and wiring. RON1represents the ON resistance of the switching transistor M1, and RON2represents the ON resistance of the synchronous rectification transistor M2.

A switching cycle is defined as T. In an ON state φONof the switching transistor M1, IL=IM1, and the voltage across the inductor L1is {VIN−(RON1+RDC)×IL}. Accordingly, an increase in width ΔIONof an inductor current ILin the ON state φONis expressed by Equation (1). TONis a length of the ON state and is referred to as the ON time.
ΔION=TON/L×{VIN−(RON1+RDC)×IL}  (1)

In the OFF state (PUFF of the switching transistor M1, IL=IM2, and the voltage across the inductor L1is {VOUT+(RON1+RDC)×IL−VIN}. Accordingly, a decrease in width ΔIOFFof the inductor current ILin the OFF state (PUFF is expressed by Equation (2).
ΔIOFF=(T−TON)/L×{VOUT−(RON2+RDC)×IL−VIN}  (2)

When the output voltage VOUTis stabilized in the continuous current mode, ΔION=ΔIOFFholds. Accordingly, a duty cycle d is expressed by Equation (3).

d=TON/T={VOUT-VIN+(RON⁢2+RDC)×IL}/{VOUT-(RON⁢1-RON⁢2)×IL}(3)

Assuming RON1=RON2=RDC=0, Equation (4) is obtained.

d=TON/T={VOUT-VIN}/VOUT(4)

According to the control circuit300ofFIG.1, in the boost converter, the switching frequency can be kept constant by adaptively changing the ON time TONaccording to the input voltage VINand the output voltage VOUTin such a way to satisfy Equation (4).

The present disclosure extends to various apparatuses and methods understood as a block diagram or a circuit diagram ofFIG.1or derived from the description above and is not limited to a specific configuration. Hereinafter, more specific configuration examples and embodiments will be described not in order to narrow the scope of the present invention but to be of help in understanding the essence and operation of the invention and to clarify them.

Next, a configuration of the timer circuit320will be described based on some embodiments.

FIG.3is a circuit diagram illustrating a basic configuration of the timer circuit320. The timer circuit320includes a first capacitor C11, a current source CS1, a comparator322, and a threshold voltage generation circuit330.

The current source CS1is connected to the first capacitor C11and generates a current I (∝VOUT) proportional to VOUT. For example, the current source CS1may be a V/I conversion circuit. The comparator322monitors the voltage VC11between both ends of the first capacitor C11and detects that a voltage change proportional to (VOUT−VIN) has occurred.

InFIG.3, one end of the first capacitor C11is grounded. The threshold voltage generation circuit330generates a threshold voltage VTH∝(VOUT−VIN) proportional to (VOUT−VIN). The comparator322compares the voltage VC11at the other end of the first capacitor C11with the threshold voltage VTH. A switch SW1is connected in parallel with the first capacitor C11and is controlled according to the start signal STARTX.

FIG.4is an operation waveform diagram of the timer circuit320ofFIG.3. Before time t0, the start signal STARTX is high, and the voltage VC11of the first capacitor C11is 0 V. When the start signal STARTX transitions from high to low at the time t0, the first capacitor C11is charged by the current I generated by the current source CS1, and the voltage VC11of the first capacitor C11rises with a slope proportional to the current I.
I=αVOUT

The voltage VC11of the capacitor after a lapse of time t from the time t0is expressed by Equation (5).
VC11=αVOUT×t/C11  (5)

It is assumed that the threshold voltage VTHis VTH=β×(VOUT−VIN). When the time until a capacitor voltage VC11reaches the threshold voltage VTHis represented by τ, Equation (6) holds.
αVOUT×τ/C11=β×(VOUT−VIN)  (6)

When this is solved for τ, Equation (7) is obtained.
τ=α/β×C11×(VOUT−VIN)/VOUT(7)

Therefore, according to the timer circuit320ofFIG.2, it is possible to generate the turn-off signal S2that changes after a time T proportional to (VOUT−VIN)/VOUTelapses after the start signal STARTX changes. By driving the DC/DC converter100with the time T as the ON time TON, the switching frequency can be stabilized.

Example 1.1

FIG.5is a circuit diagram of a timer circuit320A according to Example 1.1. The threshold voltage generation circuit330A includes a second capacitor C12.

The threshold voltage generation circuit330A charges the second capacitor C12with (VOUT−VIN) in the OFF state φOFFof the switching transistor M1. In addition, in the ON state φONof the switching transistor M1, the threshold voltage generation circuit330A applies the voltage (switching voltage) VSWof the switching pin SW, which is the connection node between the inductor L1and the switching transistor M1, to one end of the second capacitor C12, and supplies the voltage at the other end of the second capacitor C12to the comparator322as the threshold voltage VTH.

For example, the threshold voltage generation circuit330incudes a first selector332and a second selector334in addition to the second capacitor C12. The first selector332applies the input voltage VINto one end of the second capacitor C12in the OFF state φOFFof the switching transistor M1and connects one end of the second capacitor C12to the switching pin SW of the DC/DC converter100in the ON state φONof the switching transistor M1.

The second selector334applies the output voltage VOUTto the other end of the second capacitor C12in the OFF state of the switching transistor M1and connects the other end of the second capacitor C12to the comparator322in the ON state φONof the switching transistor M1.

The above is the configuration of the timer circuit320A.FIG.6is an operation waveform diagram of the timer circuit320A ofFIG.5. Before the time t0, the OFF state φOFFis set, and the second capacitor C12is charged with (VOUT−VIN).

At the time t0, the state changes to the ON state φON. When the switch SW1is turned off in response to the start signal STARTX, charging of the first capacitor C11is started, and the capacitor voltage VC11rises with a slope proportional to the output voltage VOUT.

Since a potential difference of the second capacitor C12is maintained during the ON state φON, the threshold voltage VTHis calculated as

VTH=(VOUT-VIN)+VSW=(VOUT-VIN)+RON⁢1·IL.(8)

Therefore, the ON time TONgenerated by the timer circuit320A is expressed as
TON=C11/α×{(VOUT−VIN)+RON1·IL}/VOUT(9).

As described above, according to the timer circuit320A ofFIG.5, the ON time TONin consideration of a coil current IL(that is, a load current) and an ON resistance RON1of the switching transistor M1can be generated.

Furthermore, since a low-pass filter is unnecessary as in Example 1.2 and Example 1.3 to be described later, mounting can be performed in a small circuit area.

Example 1.2

FIG.7is a circuit diagram of a timer circuit320B according to Example 1.2. The timer circuit320B is different from the threshold voltage generation circuit330A ofFIG.5in the configuration of a threshold voltage generation circuit330B.

The threshold voltage generation circuit330B includes an inverter336and a low-pass filter338. The inverter336inverts the switching voltage VSWgenerated in the switching pin SW. The output voltage VOUTis supplied to the power supply terminal of the inverter336, and thus an amplitude of the output signal of the inverter336is equal to the output voltage VOUT.

The low-pass filter338smooths the output of the inverter336and generates the threshold voltage VTH. For example, the low-pass filter338can be configured by an RC filter.

FIG.8is an operation waveform diagram of the timer circuit320B ofFIG.7. The output of the low-pass filter338is expressed by Equation (10).
VTH=VOUT×d(10)

d is the duty cycle of the first pulse signal Sp1. Since Equation (4) is established in the steady state of the continuous current mode, Equation (11) is obtained from Equations (4) and (10).
VTH=VOUT×{VOUT−VIN}/VOUT=VOUT−VIN

In other words, the threshold voltage VTHproportional to VOUT−VINcan be generated.

Example 1.3

In Example 1.2, during the continuous current mode, Equation (4) holds, but in the discontinuous current mode in which Equation (4) does not hold, the threshold voltage VTHdeviates from an appropriate voltage level. Accordingly, a frequency fluctuation rises immediately after the transition from the discontinuous current mode to the continuous current mode. In Embodiment 1.3, a configuration for solving this problem will be described.

FIG.9is a circuit diagram of a timer circuit320C according to Example 1.3. A threshold voltage generation circuit330C is configured to charge a capacitor C of an RC filter338with VOUT−VINwhile operating in the discontinuous current mode. Specifically, during the discontinuous current mode, VOUTis applied to one end of the capacitor C, and the input voltage VINis applied to the other end thereof. For example, the threshold voltage generation circuit330C includes a third selector340and a fourth selector342in addition to the inverter336and the low-pass filter338.

The third selector340applies the output voltage of the inverter336to one end of the resistor R during a continuous current mode φCCMand applies the output voltage VOUTto one end of the resistor R during a discontinuous current mode φDCM. Also, the fourth selector342applies a ground voltage of 0 V to the other end of the capacitor C during the continuous current mode φCCMand applies an input voltage VINto the other end of the capacitor C during the discontinuous current mode φDCM.

Accordingly, the voltage between both ends of the capacitor C is maintained at VOUTVINduring the discontinuous current mode φDCM, so that the operation can be resumed from the appropriate threshold voltage VTHwhen the mode is transitioned to the continuous current mode φCCMnext.

Example 1.4

FIG.10is a circuit diagram of a timer circuit320D according to Example 1.4. The timer circuit320D includes the comparator322, the current source CS1, the capacitor C11, and the switch SW1. An input voltage VINis applied to one end of the capacitor C11.

When the switch SW1is in the ON state, the capacitor voltage VC11is equal to the input voltage VIN. When the switch SW1is turned off, the capacitor voltage VC11rises with a slope proportional to the output voltage VOUTwith the input voltage VINas an initial value. The comparator322compares the capacitor voltage VC11with the output voltage VOUT. An output S2of the comparator322transitions in level when the capacitor voltage VC11changes by VOUTVIN.

In this configuration, since RONand RDCare ignored, the switching frequency becomes faster in a heavy load state where ILis large, but the switching frequency can be stabilized with a simple configuration.

Modifications related to the first embodiment will be described.

Modification 1.1

In the first embodiment, the switching transistor M1and the synchronous rectification transistor M2are integrated in the control circuit300, but the present invention is not limited thereto, and the switching transistor M1and the synchronous rectification transistor M2may be external discrete elements. In addition, the synchronous rectification transistor M2may be an N-channel MOSFET, and in that case, a bootstrap circuit may be added to the second driver316.

Second Embodiment

As a result of studying overcurrent protection in a converter of the ripple control of bottom detection and constant on time (COT), the present inventors have recognized the following problems.

The overcurrent protection monitors a current flowing through the switching transistor (or the inductor) during an ON period of the switching transistor and turns off the switching transistor when a threshold value of the overcurrent is exceeded.

In general, in the overcurrent state, a drooping characteristic in which an output voltage decreases is required. However, in the COT method of bottom detection, since the bottom of the output voltage is maintained at the reference voltage even in the overcurrent state, the drooping characteristic cannot be obtained.

In the second embodiment, a DC/DC converter capable of lowering the output voltage in the overcurrent state and a control circuit thereof will be described.

FIG.11is a circuit diagram of the DC/DC converter100according to the second embodiment. The DC/DC converter100is a boost converter, boosts an input voltage VINof an input line (an input terminal)102, stabilizes the input voltage to a predetermined voltage level, and supplies the voltage to a load4connected to an output line (output terminal)104.

The DC/DC converter100includes the output circuit110and a control circuit400. The output circuit110includes an inductor L1, a switching transistor (a low-side transistor) M1, a synchronous rectification transistor (a high-side transistor) M2, and an output capacitor C1.

The control circuit400is a controller of a ripple control method, more specifically, a bottom detection method, and includes the switching pin SW and the output pin OUT. An external inductor L1is connected to the switching pin SW, and an external output capacitor C1and the output line104are connected to the output pin OUT.

The control circuit400includes a voltage dividing circuit402, a main comparator408, a logic circuit412, a first driver414, a second driver416, an ON time generation circuit420, an overcurrent detection circuit450, a turn-on inhibition circuit460, the switching transistor M1, and the synchronous rectification transistor M2, and is an integrated circuit (IC) integrated on one semiconductor substrate.

The voltage dividing circuit402includes the resistors R11and R12and divides the output voltage VOUTto generate the feedback voltage VFB.

The main comparator408compares the feedback voltage VFBcorresponding to the output voltage VOUTof the DC/DC converter100with the reference voltage VREFand asserts the turn-on signal TURN_ON when the feedback voltage VFBfalls below the reference voltage VREF. The turn-on signal TURN_ON is a pulse signal indicating a magnitude relationship between VFBand VREF, and one of the positive edge and the negative edge can be associated with the assertion.

The ON time generation circuit420generates a turn-off signal TURN_OFF to be asserted after the elapse of the ON time TONfrom the turn-on of the switching transistor M1. The ON time TONmay be a predetermined constant time or may be adaptively controlled according to the state of the DC/DC converter100. The turn-off signal TURN_OFF is a trigger for turning off the switching transistor M1.

The turn-on inhibition circuit460asserts a turn-on inhibition signal TURNON_DIS_B for a period until a predetermined time (referred to as the minimum period) Tp(MIN)elapses from the assertion of a start signal START indicating the turn-on of the switching transistor M1. In the present description, _B represents a negative logic, where assertion is assigned low, and negation is assigned high. For example, the start signal START is a signal indicating that the first pulse signal Sp1instructing on/off of the switching transistor M1has transitioned to the ON level.

The ON time generation circuit420and the turn-on inhibition circuit460can be constituted by a timer circuit. The logic circuit412supplies the start signal START that triggers operation start to the ON time generation circuit420and the turn-on inhibition circuit460. The start signal START is a signal indicating a turn-on of the switching transistor M1. The start signal START may be the first pulse signal Sp1.

When the current flowing through the switching transistor M1exceeds an overcurrent threshold value IOCPin the ON period of the switching transistor M1, the overcurrent detection circuit450asserts (for example, high) an overcurrent detection signal OCP.

The logic circuit412generates the pulse signals Sp1and Sp2instructing on and off of the switching transistor M1and the synchronous rectification transistor M2based on the turn-on signal TURN_ON, the turn-off signal TURN_OFF, the turn-on inhibition signal TURNON_DIS_B, and the overcurrent detection signal OCP.

When the turn-on signal TURN_ON is asserted in a period in which the turn-on inhibition signal TURNON_DIS_B is negated (high), the logic circuit412causes the first pulse signal Sp1to transition to the ON level (high). During a period in which the turn-on inhibition signal TURNON_DIS_B is asserted (low), even when the turn-on signal TURN_ON is asserted, the first pulse signal Sp1maintains the OFF level (low).

When the turn-off signal TURN_OFF or the overcurrent detection signal OCP is asserted, the logic circuit412causes the first pulse signal Sp1to transition to the OFF level (low).

In the continuous current mode (CCM), the logic circuit412complementarily changes the second pulse signal Sp2with the first pulse signal Sp1. In the discontinuous current mode (DCM), the zero crossing of the current flowing through the synchronous rectification transistor M2is detected, and the OFF levels of both the first pulse signal Sp1and the second pulse signal Sp2are maintained from the current zero crossing to the assertion of the next turn-on signal TURN_ON.

The above is the configuration of the control circuit400. Next, the operation will be described.

FIG.12is an operation waveform diagram of the DC/DC converter100ofFIG.11in the normal state (the non-overcurrent state). Here, the operation is performed in the continuous mode. The ON time TONgenerated by the ON time generation circuit420is determined such that the switching cycle in the normal state is longer than the minimum cycle Tp(MIN)generated by the turn-on inhibition circuit460.FIG.12illustrates a waveform in which a circuit delay is ignored.

When the feedback voltage VFBdecreases to the reference voltage VREFat the time t0, the turn-on signal TURN_ON is asserted. At this timing, since the turn-on inhibition signal TURNON_DIS_B is negated (high), the first pulse signal Sp1transitions to the ON level in response to the assertion of the turn-on signal TURN_ON. The second pulse signal Sp2transitions complementarily with the first pulse signal Sp1.

When the switching transistor M1is turned on at the time t0, the ON time generation circuit420starts clocking, and the turn-off signal TURN_OFF is asserted at time t1after the ON time TONhas elapsed. In this way, the first pulse signal Sp1transitions to the OFF level, and the switching transistor M1is turned off. Thereafter, when the feedback voltage VFBdecreases to the reference voltage VREFat time t2, the turn-on signal TURN_ON is asserted. This operation is repeated in the normal state.

FIG.13is an operation waveform diagram of the DC/DC converter100ofFIG.11in the overcurrent state. When the feedback voltage VFBfalls below the reference voltage VREFat the time t0, the turn-on signal TURN_ON is asserted (low). At this timing, since the turn-on inhibition signal TURNON_DIS_B is negated (high), the first pulse signal Sp1transitions to the ON level in response to the assertion of the turn-on signal TURN_ON. The second pulse signal Sp2transitions complementarily with the first pulse signal Sp1.

When the switching transistor M1is turned on at the time t0, the ON time generation circuit420and the turn-on inhibition circuit460start clocking, and the turn-on inhibition signal TURNON_DIS_B is asserted (low). In the overcurrent state, the overcurrent detection signal OCP is asserted at the time t1before the ON time TONelapses, the first pulse signal Sp1transitions to the OFF level in response to the overcurrent detection signal OCP, and the switching transistor M1is turned off. This provides pulse-by-pulse overcurrent protection.

The feedback voltage VFBincreases immediately after the switching transistor M1is turned off, and then decreases with time. When the voltage falls below the reference voltage VREFat the time t2, the turn-on signal TURN_ON is asserted. However, at the time t2, since the minimum period Tp(MIN)has not elapsed from the time t0at which the immediately preceding switching transistor M1is turned on, the turn-on inhibition signal TURNON_DIS_B is asserted. Therefore, the first pulse signal Sp1maintains the OFF level.

Thereafter, when the turn-on inhibition signal TURNON_DIS_B is negated at time t3after the minimum period Tp(MIN)has elapsed from the time t1, the first pulse signal Sp1transitions to the ON level in response to the turn-on signal TURN_ON already asserted (low) at that time, and the switching transistor M1is turned on.

When the first pulse signal Sp1transitions to the ON level at the time t3, the turn-on inhibition signal TURNON_DIS_B is asserted (low), and the turn-on inhibition circuit460starts clocking. When the overcurrent detection signal OCP is asserted at time t4, the first pulse signal Sp1becomes the OFF level, and the switching transistor M1is turned off.

In the overcurrent state, the operations from t1to t4are repeated. The above is the operation of the DC/DC converter100.

According to the DC/DC converter100, in the overcurrent state, the switching frequency can be maintained at1/Tp(MIN)while the pulse-by-pulse overcurrent protection is performed. In addition, in the overcurrent state, the feedback voltage VFB, that is, the output voltage VOUTcan be decreased with time, and the drooping characteristic can be realized.

The present invention extends to various apparatuses and methods understood as the block diagram or cross-sectional diagram ofFIG.11or derived from the description above and is not limited to a specific configuration. Hereinafter, more specific configuration examples and embodiments will be described not in order to narrow the scope of the present invention but to be of help in understanding the essence and operation of the invention and to clarify them.

A specific configuration example of the control circuit400will be described.

FIG.14is an equivalent circuit diagram of the output circuit110of the DC/DC converter100. RDCis an equivalent series resistance such as the inductor L1and wiring. RON1represents the ON resistance of the switching transistor M1, and RON2represents the ON resistance of the synchronous rectification transistor M2.

A switching cycle is defined as T. In an ON state φONof the switching transistor M1, IL=IM1, and the voltage across the inductor L1is {VIN−(RON1+RDC)×IL}. Accordingly, an increase in width ΔIONof an inductor current ILin the ON state φONis expressed by Equation (1). TONis a length of the ON state and is referred to as the ON time.
ΔION=TON/L×{VIN−(RON1+RDC)×IL}  (1)

In the OFF state φOFFof the switching transistor M1, IL=IM2, and the voltage across the inductor L1is {VOUT+(RON1+RDC)×VIN}. Accordingly, a decrease in width ΔIOFFof the inductor current ILin the OFF state φOFFis expressed by Equation (2).
ΔIOFF=(T−TON)/L×{VOUT+(RON2+RDC)×IL−VIN}  (2)

When the output voltage VOUTis stabilized in the continuous current mode, ΔION=ΔIOFFholds. Accordingly, a duty cycle d is expressed by Equation (3).

d=TON/T={VOUT-VIN+(RON⁢2+RDC)×IL}/{VOUT-(RON⁢1-RON⁢2)×IL}(3)

Assuming RON1=RON2=RDC=0, Equation (4) is obtained.

d=TON/T={VOUT-VIN}/VOUT(4)

Therefore, when a target period in a non-overcurrent state is Tp(REF), the ON time generation circuit420of the control circuit400calculates to generate the ON time TONsatisfying the equation below
TON={VOUT−VIN}/VOUT×TREF.

This makes it possible to keep the switching frequency of the DC/DC converter100constant.

Next, a configuration of the ON time generation circuit420will be described based on some embodiments.

FIG.15is a circuit diagram illustrating a basic configuration of the ON time generation circuit420. The ON time generation circuit420includes the first capacitor C11, the current source CS1, a comparator422, and a threshold voltage generation circuit430.

The current source CS1is connected to the first capacitor C11and generates a current I (∝VOUT) proportional to VOUT. For example, the current source CS1may be a V/I conversion circuit. The comparator422monitors the voltage VC11between both ends of the first capacitor C11and detects that the voltage change proportional to (VOUT−VIN) has occurred.

InFIG.15, one end of the first capacitor C11is grounded. The threshold voltage generation circuit430generates the threshold voltage VTH∝(VOUT−VIN) proportional to (VOUT−VIN). The comparator422compares the voltage VC11at the other end of the first capacitor C11with the threshold voltage VTH. The switch SW1is connected in parallel with the first capacitor C11and is controlled according to a start signal START_B.

FIG.16is an operation waveform diagram of the ON time generation circuit420ofFIG.15. Before time t0, the start signal START_B is high, and the voltage VC11of the first capacitor C11is 0 V. When the start signal START_B transitions from high to low at the time to, the first capacitor C11is charged by the current I generated by the current source CS1, and the voltage Von of the first capacitor C11rises with a slope proportional to the current I.
I=αVOUT

The voltage VC11of the capacitor after a lapse of time t from the time t0is expressed by Equation (5).
VC11=αVOUT×t/C11  (5)

It is assumed that the threshold voltage VTHis VTH=β×(VOUT−VIN). When the time until a capacitor voltage VC11reaches the threshold voltage VTHis represented by τ, Equation (6) holds.
αVOUT×τ/C11=β×(VOUT−VIN)  (6)

When this is solved for τ, Equation (7) is obtained.
τ=α/β×C11×(VOUT−VIN)/VOUT(7)

Therefore, according to the ON time generation circuit420inFIG.15, it is possible to generate the turn-off signal TURN_OFF that changes after the lapse of the time T proportional to (VOUT−VIN)/VOUTafter the start signal START_B changes. By driving the DC/DC converter100with the time T as the ON time TON, the switching frequency can be stabilized.

Example 2.1

FIG.17is a circuit diagram of an ON time generation circuit420A according to Example 2.1. The threshold voltage generation circuit430A includes the second capacitor C12.

The threshold voltage generation circuit430A charges the second capacitor C12with (VOUT−VIN) in the OFF state φOFFof the switching transistor M1. In addition, in the ON state φONof the switching transistor M1, the threshold voltage generation circuit430A applies the voltage (switching voltage) VSWof the switching pin SW, which is the connection node between the inductor L1and the switching transistor M1, to one end of the second capacitor C12, and supplies the voltage at the other end of the second capacitor C12to the comparator422as the threshold voltage VTH.

For example, the threshold voltage generation circuit430includes a first selector432and a second selector434in addition to the second capacitor C12. The first selector432applies the input voltage VINto one end of the second capacitor C12in the OFF state φOFFof the switching transistor M1and connects one end of the second capacitor C12to the switching pin SW of the DC/DC converter100in the ON state φONof the switching transistor M1.

The second selector434applies the output voltage VOUTto the other end of the second capacitor C12in the OFF state of the switching transistor M1and connects the other end of the second capacitor C12to the comparator422in the ON state φONof the switching transistor M1.

The above is the configuration of the ON time generation circuit420A.FIG.18is an operation waveform diagram of the ON time generation circuit420A inFIG.17. Before the time t0, the OFF state φOFFis set, and the second capacitor C12is charged with (VOUT−VIN).

At the time t0, the state changes to the ON state φON. When the switch SW1is turned off in response to the start signal START_B, charging of the first capacitor C11is started, and the capacitor voltage VC11rises with a slope proportional to the output voltage VOUT.

Since a potential difference of the second capacitor C12is maintained during the ON state φON, the threshold voltage VTHis calculated as

VTH=(VOUT-VIN)+VSW=(VOUT-VIN)+RON⁢1·IL.(8)

Therefore, the ON time TONgenerated by the ON time generation circuit420A is expressed as follows.
TON=C11/α×{(VOUT−VIN)+RON1·IL}/VOUT(9).

As described above, according to the ON time generation circuit420A ofFIG.17, the ON time TONin consideration of the coil current IL(that is, the load current) and an ON resistance RON1of the switching transistor M1can be generated.

In addition, since a low-pass filter is unnecessary as in Example 2.2 and Example 2.3 to be described later, mounting can be performed in a small circuit area.

Example 2.2

FIG.19is a circuit diagram of an ON time generation circuit420B according to Example 2.2. The ON time generation circuit420B is different from the threshold voltage generation circuit430A ofFIG.17in the configuration of the threshold voltage generation circuit430B.

The threshold voltage generation circuit430B includes an inverter436and a low-pass filter438. The inverter436inverts the switching voltage VSWgenerated in the switching pin SW. The output voltage VOUTis supplied to the power supply terminal of the inverter436, and thus an amplitude of the output signal of the inverter436is equal to the output voltage VOUT.

The low-pass filter438smooths the output of the inverter436and generates the threshold voltage VTH. For example, the low-pass filter438can be configured by the RC filter.

FIG.20is an operation waveform diagram of the ON time generation circuit420B inFIG.19. The output of the low-pass filter438is expressed by Equation (10).
VTH=VOUT×d(10)

d is the duty cycle of the first pulse signal Sp1. Since Equation (4) is established in the steady state of the continuous current mode, Equation (11) is obtained from Equations (4) and (10).
VTH=VOUT×{VOUT−VIN}/VOUT=VOUT−VIN

In other words, the threshold voltage VTHproportional to VOUT−VINcan be generated.

Example 2.3

In Example 2.2, Equation (4) holds during the continuous current mode, but in the discontinuous current mode in which Equation (4) does not hold, the threshold voltage VTHdeviates from an appropriate voltage level. Accordingly, a frequency fluctuation rises immediately after the transition from the discontinuous current mode to the continuous current mode. In Example 2.3, a configuration for solving this problem will be described.

FIG.21is a circuit diagram of an ON time generation circuit420C according to Example 2.3. A threshold voltage generation circuit430C is configured to charge the capacitor C of an RC filter438with VOUT−VINwhile operating in the discontinuous current mode. Specifically, during the discontinuous current mode, VOUTis applied to one end of the capacitor C, and the input voltage VINis applied to the other end thereof. For example, the threshold voltage generation circuit430C includes a third selector440and a fourth selector442in addition to the inverter436and the low-pass filter438.

The third selector440applies the output voltage of the inverter436to one end of the resistor R during a continuous current mode φCCMand applies the output voltage VOUTto one end of the resistor R during a discontinuous current mode φDCM. Also, the fourth selector442applies a ground voltage of 0 V to the other end of the capacitor C during the continuous current mode φCCMand applies an input voltage VINto the other end of the capacitor C during the discontinuous current mode φDCM.

Accordingly, the voltage between both ends of the capacitor C is maintained at VOUTVINduring the discontinuous current mode φDCM, so that the operation can be resumed from the appropriate threshold voltage VTHwhen the mode is transitioned to the continuous current mode φCCMnext.

Example 2.4

FIG.22is a circuit diagram of an ON time generation circuit420D according to Example 2.4. The ON time generation circuit420D includes the comparator422, the current source CS1, the capacitor C11, and the switch SW1. An input voltage VINis applied to one end of the capacitor C11.

When the switch SW1is in the ON state, the capacitor voltage VC11is equal to the input voltage VIN. When the switch SW1is turned off, the capacitor voltage VC11rises with a slope proportional to the output voltage VOUTwith the input voltage VINas an initial value. The comparator422compares the capacitor voltage VC11with the output voltage VOUT. The output TURN_OFF of the comparator422transitions in level when the capacitor voltage VC11changes by VOUT−VIN.

In this configuration, since RONand RDCare ignored, the switching frequency becomes faster in a heavy load state where ILis large, but the switching frequency can be stabilized with a simple configuration.

Hereinafter, modifications related to the second embodiment will be described.

Modification 2.1

In the second embodiment, the switching transistor M1and the synchronous rectification transistor M2are integrated in the control circuit400, but the present invention is not limited thereto, and the switching transistor M1and the synchronous rectification transistor M2may be external discrete elements. In addition, the synchronous rectification transistor M2may be an N-channel MOSFET, and in that case, a bootstrap circuit may be added to the second driver416.

Modification 2.2

Although the boost converter has been described in the second embodiment, the present invention is also applicable to a buck converter and a boost-buck converter.

The embodiments merely illustrate the principle and application of the present invention, and many modifications and changes in configuration can be made to the embodiments without departing from the gist of the present invention defined in the claims.