Patent ID: 12240751

MODE FOR CARRYING OUT THE INVENTION

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Positional relationships such as upper, lower, left, and right will be based on those in the drawings unless otherwise noted. Further, the dimensional proportions in the drawings are not limited to those illustrated in the drawings. The following embodiments are provided for illustrative purposes only, and the invention is not limited to the following embodiments. Further, the present invention can be variously modified without departing from the gist of the invention.

FIG.1is a schematic cross-sectional view for explaining the structure of a sensor package substrate100according to an embodiment of the present invention.

As illustrated inFIG.1, the sensor package substrate100according to the present embodiment includes four insulating layers111to114and wiring layers L1to L4positioned on the surfaces of the insulating layers111to114. Although not particularly limited, the insulating layer111positioned in the lowermost layer and the insulating layer114positioned in the uppermost layer may each be a core layer obtained by impregnating a core material such as glass fiber, with a resin material such as glass epoxy. On the other hand, the insulating layers112and113may each be made of a resin material not containing a core material such as glass cloth. In particular, the thermal expansion coefficient of the insulating layers111and114is preferably smaller than that of the insulating layers112and113.

The insulating layer114positioned in the uppermost layer and the wiring layer L4formed on the surface of the insulating layer114are partially covered by a solder resist121. On the other hand, the insulating layer111positioned in the lowermost layer and the wiring layer L1formed on the surface of the insulating layer111are partially covered by a solder resist122. The solder resist121constitutes one surface101of the sensor package substrate100, and the solder resist122constitutes the other surface102of the sensor package substrate100.

The wiring layers L1to L4have wiring patterns131to134, respectively. An external terminal130is formed at a part of the wiring pattern131that is not covered with the solder resist122. The external terminal130serves as a connection terminal to a motherboard to be described later. A part of the wiring pattern134that is not covered with the solder resist121is used as a bonding pad. The wiring patterns131to134are mutually connected through hole conductors141to144penetrating the insulating layers111to114.

In the present embodiment, sensor chip mounting areas A and B are defined on the surface101of the sensor package substrate100. Further, through holes V1and V2penetrating the sensor package substrate100from the surface101to the surface102are formed at a position overlapping the sensor chip mounting area A in a plan view. The through holes V1and V2are not closed but opened to both the surfaces101and102, allowing air to circulate through the through holes V1and V2. Although only the two through holes V1and V2are illustrated inFIG.1, three or more through holes may be formed at a position overlapping the sensor chip mounting area A. As described above, in the sensor package substrate100according to the present embodiment, not a single through hole having a large diameter, but a plurality of through holes each having smaller diameter are formed at a position overlapping the sensor chip mounting area A. This makes foreign matters unlikely to enter the inside of the substrate through the through holes. Further, in this case, when the depth positions at which the diameters of the through holes V1and V2become minimum are located at different depth levels, a reduction in the strength of the substrate is suppressed.

As illustrated inFIG.1, the diameter of the through hole V1at the surface101is ϕ11, and the diameter of the through hole V1at the surface102is ϕ12. Further, the inner diameter of the through hole V1becomes minimum at a predetermined depth position D1. The diameter of the through hole V1at the depth position D1is ϕ10. The depth position D1is not the center position in the thickness direction of the substrate but is offset to the surface102side. The diameters ϕ10 to ϕ12 satisfies the following relation:
ϕ11>ϕ12>ϕ10.
The through hole V1has a tapered shape whose inner diameter increases from the depth position D1toward the surfaces101and102.

Similarly, the diameter of the through hole V2at the surface101is ϕ21, and the diameter of the through hole V2at the surface102is ϕ22. Further, the inner diameter of the through hole V2becomes minimum at a predetermined depth position D2. The diameter of the through hole V2at the depth position D2is ϕ20. The depth position D2is not the center position in the thickness direction of the substrate but is offset to the surface101side. The diameters ϕ20 to ϕ22 satisfies the following relation:
ϕ22>ϕ21>ϕ20.

The through hole V2has a tapered shape whose inner diameter increases from the depth position D2toward the surfaces101and102.

Although not particularly limited, in the present invention,

ϕ11>ϕ21 and ϕ22>ϕ12 are both satisfied. Alternatively,

ϕ11=ϕ22 and ϕ12=ϕ21 may be both satisfied.

As illustrated inFIG.1, the depth position D1at which the diameter of the through hole V1becomes minimum and the depth position D2at which the diameter of the through hole V2becomes minimum are located at different depth levels. In the example ofFIG.1, D1>D2is satisfied. Thus, despite the tapered shapes of the through holes V1and V2, a change in the thickness (width in the x-direction) of a part of the sensor package substrate100that is positioned between the through holes V1and V2relative to the thickness direction (z-direction) is small.

That is, when the depth positions D1and D2are located at the same depth position, the thickness (width in the x-direction) of a part of the sensor package substrate100that is positioned between the through holes V1and V2significantly changes in the thickness direction (z-direction), so that the strength of the sensor package substrate100may become insufficient. In this case, the thickness in the vicinities of the surfaces101and102is significantly reduced, which may make it likely to cause cracks and breakage at these portions in the sensor package substrate100. To prevent this, in the present embodiment, the depth positions D1and D2are located at different depth levels, thereby making it possible to sufficiently maintain the strength of the sensor package substrate100.

The sensor package substrate100according to the present embodiment has a controller chip150which is embedded between the insulating layers112and113. The controller chip150is an electronic component connected to sensor chips mounted in the sensor chip mounting areas A and B. As a matter of course, the controller chip150is disposed so as to avoid the through holes V1and V2. However, the controller chip150and the sensor chip mounting areas A and B may partially overlap each other in a plan view. In the present invention, the electronic component such as the controller chip150is not particularly limited in type and may be a digital IC having a very high operating frequency (MEMS (Micro Electro Mechanical Systems), a CPU (Central Processing Unit), a DSP (Digital Signal Processor), a GPU (Graphics processing Unit), an ASIC (Application Specific Integrated Circuit), etc.), a memory-based IC (an F-Rom, an SDRAM, etc.), an active element such as an analog IC (an amplifier, an antenna switch, a high-frequency oscillation circuit, etc.) or a passive element (a varistor, a resistor, a capacitor, etc.).

In the present specification, the “sensor package substrate” does not indicate only an individual substrate (individual piece, individual product) that is a unit substrate incorporating therein or mounting thereon electronic components, but may refer to an aggregate substrate (work board, work sheet) that includes a plurality of the individual substrates.

FIG.2is a schematic cross-sectional view for explaining the structure of a sensor module100A according to a first embodiment using the sensor package substrate100.

In the sensor module100A illustrated inFIG.2, a sensor chip160is mounted in the sensor chip mounting area A of the sensor package substrate100, and a sensor chip170is mounted in the sensor chip mounting area B.

The sensor chip160is a sensor for detecting, e.g., air vibration, air pressure, air temperature or air composition, i.e., it is a microphone, a pressure sensor, a temperature sensor, a gas sensor, or the like. A detection part161of the sensor chip160is provided at a position facing the through holes V1and V2formed in the sensor package substrate100. When the sensor chip160is, e.g., a microphone, the detection part161includes a vibration plate having a membrane structure. Although the position of the detection part161in the sensor chip160is not particularly limited, at least a part of the detection part161is exposed to the through holes V1and V2. It follows that the detection part161of the sensor chip160is exposed to atmosphere through the through holes V1and V2and can thus detect air vibration, air pressure, air temperature or air composition.

The sensor chip170is also a sensor for detecting air vibration, air pressure, air temperature or air composition, i.e., it is a microphone, a pressure sensor, a temperature sensor, a gas sensor, or the like and may be a sensor that measures a physical quantity different from that measured by the sensor chip160.

Output signals from the sensor chips160and170are connected to the wiring pattern134through a bonding wire181. The sensor chips160and170may be directly connected to each other through a bonding wire182. However, the method for connecting the sensor package substrate100and the sensor chips160and170is not limited to this, but flip-chip connection may be used. In the example illustrated inFIG.2, the sensor chips160and170are attached to the surface101of the sensor package substrate100by a die attach film183. Further, the sensor chips160and170overlap the controller chip150in a plan view.

The surface101of the sensor package substrate100is covered with a cap190. The cap190plays a role of protecting the sensor chips160and170and enhancing detection characteristics of the sensor chips160and170. In particular, when at least one of the sensor chips160and170is a microphone, the volume of a space191formed by the cap190has a great influence on acoustic characteristics.

As illustrated inFIG.2, the sensor module100A according to the present embodiment can be mounted on a motherboard200. As illustrated inFIG.2, a through hole V3is formed in the motherboard200, and the sensor module100A is mounted on the motherboard200such that the through holes V1, V2and the through hole V3overlap each other in a plan view. It follows that the detection part161of the sensor chip160is exposed to atmosphere through the through holes V1to V3. As a result, as dented by the arrow S, air vibration, air pressure, air temperature or air composition is transmitted to the sensor chip160, allowing the physical quantity thereof to be detected. Further, in the present embodiment, electronic components and the like are not mounted on the back surface of the sensor module100A, so that it is possible to make the gap between the sensor module100A and the motherboard200very small. This can enhance the sensitivity of the sensor. The gap between the sensor module100A and the motherboard200may be filled with an underfill.

The following describes a manufacturing method for the sensor package substrate100according to the present embodiment.

FIGS.3to11are process views for explaining the manufacturing method for the sensor package substrate100according to the present embodiment.

As illustrated inFIG.3, a base material (a work board) formed by attaching metal films131aand132asuch as Cu foils to both surfaces of the insulating layer111including a core material such as glass fiber, i.e., a double-sided CCL (Copper Clad Laminate) is prepared. In order to facilitate the formation of the through holes V1and V2in the subsequent process and to ensure an appropriate degree of rigidity for easy handling, the thickness of the core material included in the insulating layer111is preferably equal to or less than 40 μm. The material forming the metal films131aand132ais not particularly limited, and examples thereof include metal conductive materials such as Au, Ag, Ni, Pd, Sn, Cr, Al, W, Fe, Ti, and SUS in addition to above-mentioned Cu and, among them, Cu is preferable in terms of conductivity and cost. The same is applied to other metal films to be described later.

The resin material for forming the insulating layer111is not particularly limited as long as it can be formed into a sheet shape or a film shape, and examples thereof include: a single element selected from the group consisting of vinyl benzyl resin, polyvinyl benzyl ether compound resin, bismaleimide triazine resin (BT resin), polyphenylene ether (polyphenylene ether oxide) resin (PPE, PPO), cyanate ester resin, epoxy+activated ester curing resin, polyphenylene ether resin (polyphenylene oxide resin), curable polyolefin resin, benzo cyclobutene resin, polyimide resin, aromatic polyester resin, aromatic liquid crystal polyester resin, polyphenylene sulfide resin, polyether imide resin, polyacrylate resin, polyetheretherketone resin, fluororesin, epoxy resin, phenolic resin, and benzoxazine resin in addition to glass epoxy; a material obtained by adding, to one of the above-listed resins, silica, talc, calcium carbonate, magnesium carbonate, aluminum hydroxide, magnesium hydroxide, aluminum borate whiskers, potassium titanate fiber, alumina, glass flakes, glass fiber, tantalum nitride, aluminum nitride, or the like; and a material obtained by adding, to one of the above-listed resins, metal oxide powder containing at least one metal selected from the group consisting of magnesium, silicon, titanium, zinc, calcium, strontium, zirconium, tin, neodymium, samarium, aluminum, bismuth, lead, lanthanum, lithium and tantalum, and these examples may be selectively used as appropriate from the viewpoints of electrical characteristics, mechanical characteristics, water absorption properties, reflow durability, etc. Further, examples of the core material included in the insulating layer111include a material blended with, e.g., resin fiber such as glass fiber or aramid fiber.

Next, as illustrated inFIG.4, a known method such as photolithography is used to pattern the metal film132ato form the wiring pattern132. At this time, the metal film132ais wholly removed at a position where the through holes V1and V2are ultimately to be formed. Further, for example, an uncured (B stage) resin sheet is laminated by vacuum pressure bonding or the like so as to embed therein the wiring pattern132to thereby form the insulating layer112.

Then, as illustrated inFIG.5, the controller chip150is placed on the insulating layer112. The controller chip150is, e.g., a bare chip semiconductor IC and is face-up mounted such that a substantially rectangular plate-like main surface151faces upward. Not-shown many external terminals are provided on the main surface151of the controller chip150. The controller chip150is polished at its back surface and thus has a thickness smaller than that of ordinary semiconductor ICs. Specifically, the thickness of the controller chip150is, e.g., equal to or less than 200 μm, preferably, about 50 μm to about 100 μm. In terms of cost, it is preferable to simultaneously apply machining to many controller chips150in a wafer state and, in this case, the back surface is first ground, and then the wafer is diced to obtain individual controller chips150. Alternatively, when the wafer is diced into individual controller chips150or cut in half before thinning by means of polishing, the back surface can be polished while the main surface151of the controller chip150is covered with a thermosetting resin or the like. Thus, the processing order among the insulating film grinding, the electronic component back surface grinding and the dicing can be varied. As the grinding technique for the back surface of the controller chip50, the back surface can be roughened by etching, plasma processing, laser processing, blast processing, polishing with a grinder, buffing, chemical treatment, or the like. With these methods, it is possible to not only achieve the thinning of the controller chip150, but also to enhance adhesion to the insulating layer112.

Then, as illustrated inFIG.6, the insulating layer113and a metal film133aare formed so as to cover the controller chip150. Preferably, the insulating layer113is formed as follows: after application of an uncured or semi-cured thermosetting resin, the resin (when it is an uncured resin) is semi-cured by heating, and then the semi-cured resin and the metal film133aare pressed together by a pressing means to obtain a cured insulating layer113. The insulating layer113is preferably a resin sheet not containing fiber that prevents the controller chip150from being embedded. This enhances adhesion among the insulating layer113, metal film133a, insulating layer112and controller chip150.

Then, as illustrated inFIG.7, a part of the metal film133ais etching-removed by using a known method such as photolithography, and then known laser or blast processing is applied to a predetermined location where the metal film133ahas been removed to form through holes in the insulating layers112and113. After that, electroless plating and electrolytic plating are applied, followed by patterning of the metal film133aby a known method, to thereby form the wiring pattern133and through hole conductors142and143. At this time, at a position where the through holes V1and V2are ultimately to be formed, the metal film133ais preferably removed. The through hole conductor142penetrates the insulating layers113and112to connect the wiring patterns132and133, and the through hole conductor143penetrates the insulating layer113to connect the wiring pattern133and the controller chip150.

Then, as illustrated inFIG.8, a sheet having the insulating layer114and a metal film134alaminated thereon is hot-pressed under vacuum so as to embed therein the wiring pattern133. The material and thickness of the insulating layer114may be the same as those of the insulating layer111.

Then, as illustrated inFIG.9, a part of the metal film131aand a part of the metal film134aare etching-removed by using a known method such as photolithography, and then known laser or blast processing is applied to predetermined locations where the metal films131aand134ahave been removed to form through holes in the insulating layers111and114. After that, electroless plating and electrolytic plating are applied to form through hole conductors141and144. The through hole conductor141penetrates the insulating layer111to connect the wiring patterns131and132, and the through hole conductor144penetrates the insulating layer114to connect the wiring patterns133and134. After that, photosensitive dry films171and172are formed on the surfaces of the metal films131aand134a, respectively.

Then, as illustrated inFIG.10, the dry films171and172are removed by photolithography at a planar position where the through holes V1and V2are to be formed, and the metal films131aand134aare removed at positions where they are exposed respectively through the dry films171and172to thereby form openings A11, A12, A21, and A22. The dry films171and metal film131ain which the openings A12and A22are formed constitute a metal mask. Similarly, the dry films172and metal film134ain which the openings A11and A21are formed constitute a metal mask.

At this time, for the dry film172positioned on the upper surface side, the diameter of the opening A11corresponding to the through hole V1is set to ϕ11, and the diameter of the opening A21corresponding to the through hole V2is set to ϕ21 (<ϕ11). For the dry film171positioned on the lower surface side, the diameter of the opening A12corresponding to the through hole V1is set to ϕ12, and the diameter of the opening A22corresponding to the through hole V2is set to ϕ22 (>ϕ12). Accordingly, the diameters of the openings formed in the metal film134aare ϕ11 and ϕ21, and the diameters of the openings formed in the metal film131aare ϕ12 and ϕ22. The opening diameters of the dry films171and172are increased by way of blast processing to be described later; therefore these opening diameters may be set slightly smaller than a designed value in the initial state, where the blast processing is yet to be performed, but show the design value ultimately after going through the blast processing.

In this state, as illustrated inFIG.11, one or both of laser processing and blast processing are applied to the front and back sides to form the through holes V1and V2penetrating the insulating layers111to114. In the blast processing, the larger the diameter of the opening is, the higher the processing speed tends to be, and the larger the depth from the surfaces101and102is, the smaller the diameter to be formed tends to be. Accordingly, in the blast processing from the surface101side, the processing speed for a part corresponding to the opening A11is slightly higher than that for a part corresponding to the opening A21. Similarly, in the blast processing from the surface102side, the processing speed for a part corresponding to the opening A22is slightly higher than that for a part corresponding to the opening A12. As a result, the depth position D1at which the inner diameter of the through hole V1becomes minimum and the depth position D2at which the inner diameter of the through hole V2becomes minimum are located at different depth levels. The through holes V1and V2may be formed after removal of the dry films.

Then, the dry films171and172are removed, and then the metal films131aand134aare patterned by a known method such as photolithography to thereby form the wiring patterns131and134. Then, as illustrated inFIG.1, the solder resists121and122are formed on the surfaces of the insulating layers114and111, respectively, and surface treatment for component mounting is applied at positions where the wiring patterns134and131are exposed respectively through the solder resists121and122. The surface treatment may be Cu—OSP, Ni/Au plating, ENEPIG, or solder leveler treatment, but not limited thereto as long as it aims to prevent oxidation of the wiring pattern and to improve quality in component mounting in the subsequent process.

Thus, the sensor package substrate100according to the present embodiment is completed.

As described above, in the present embodiment, blast processing is performed in a state where the diameters of the openings A11and A12formed in the dry film171are made different in size from each other and where the diameters of the openings A12and A22formed in the dry film172are made different in size from each other, so that it is possible to locate the depth position D1at which the inner diameter of the through hole V1becomes minimum and the depth position D2at which the inner diameter of the through hole V2becomes minimum at different depth levels.

However, in the present invention, the openings for forming the through holes V1and V2need not necessarily be set in the above-described way. When the through holes V1and V2are formed by laser processing, the intensity of the laser beam to be irradiated onto the opening A11may be made higher than that of the laser beam to be irradiated onto the opening A21, and the intensity of the laser beam to be irradiated onto the opening A22may be made higher than that of the laser beam to be irradiated onto the opening A12. That is, the processing depth changes according to a difference in the intensity of the laser beam, allowing the depth positions D1and D2to be located at different depth levels.

FIG.12is a schematic cross-sectional view for explaining the structure of a sensor module100B according to a second embodiment.

The sensor module100B according to the second embodiment differs from the sensor module100A according to the first embodiment in that the inner walls of the through holes V1and V2are covered with a protective film C. The protective film C may be made of an inorganic insulating material such as SiN, an organic insulating material such as polyimide, or a metal material. When the inner walls of the through holes V1and V2are thus covered with the protective film C, detachment of filler, glass cloth, or the like exposed to the inner walls of the through holes V1and V2can be prevented. In particular, when an insulating material is used as the material of the protective film C, a short-circuit failure can be prevented even when a part of the wiring pattern is exposed to the inner walls of the through holes V1and V2. On the other hand, when a metal material is used as the material of the protective film C, the acoustic characteristics of the through holes V1and V2can be enhanced.

The protective film C may be formed by a CVD method when an inorganic insulating material such as SiN is selected and may be formed by a plating method when a metal material is selected.

It is apparent that the present invention is not limited to the above embodiments, but may be modified and changed without departing from the scope and spirit of the invention.

REFERENCE SIGNS LIST

100sensor package substrate100A,100B sensor module101one surface102other surface111-114insulating layer121,122solder resist130external terminal131-134wiring pattern131a-134ametal film141-144through hole conductor150controller chip151main surface160,170sensor chip161detection part171,172dry film181,182bonding wire183die attach film190cap191space200motherboardA, B sensor chip mounting areaA11, A12, A21, A22openingC protective filmD1,D2depth positionL1-L4wiring layerV1-V3through hole