Patent ID: 12192215

In the figures, like reference numerals refer to the same figure elements.

DETAILED DESCRIPTION

The following description is presented to enable any person skilled in the art to make and use the embodiments, and is provided in the context of a particular application and its requirements. Various modifications to the disclosed embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present disclosure. Thus, the embodiments described herein are not limited to the embodiments shown, but are to be accorded the widest scope consistent with the principles and features disclosed herein.

Overview

The embodiments described herein solve the problem of efficiently incorporating a watermarking process into a cyber-physical system by designing the controller of the system and the watermarking process in conjunction with each other. The watermarking process integrated with the cyber-physical system can be referred to as a watermarked system. An integrated design architecture (or framework) can support the design of the watermarked system by allowing the development of the controller and the watermarking process together. This integrated design architecture can provide a high detection rate for the watermarking process with a reduced impact on the controller.

With existing technologies, a watermarking signal can be infused with the input signal of the system. Typically, the watermarking signal can include randomness for ensuring that the signal is untraceable and unrepeatable. As a result, the watermarking signal can be used to detect replay attacks. In these attacks, a malicious actor, such as the attacker, can record the output signal for a duration and can replay the recording for the attack. Without the discrepancy provided by watermarking, an observer or user of the system may remain oblivious to the ongoing attack based on the replay. However, the watermarking signal is injected as added noise. Consequently, even though a strong watermarking signal can support a quick detection of the attack, such a signal can degrade the output signal of the system, thereby causing performance degradation for the system.

Since the controller generates the states of the system based on the output signal, a degraded output signal can adversely affect the operations of the controller. As a result, as the watermarking process becomes more effective, the performance degradation can become more significant. For example, the watermarking process for an existing controller can be adverse effects on the performance. Due to the competing nature of the controller and the watermarking process, the sequential integration of these two components may yield degraded performance of the system or an ineffective detection rate for the watermarking process.

To solve this problem, embodiments described herein provide an integrated design architecture (or framework) for developing the controller and the watermarking process in conjunction with each other. The design architecture allows a development system to jointly design and configure the controller and the watermarking process such that the watermarking process can facilitate a high detection rate while the controller can maintain a target performance level. In this way, the design architecture can ensure that an efficient watermarking process can be co-designed with the controller for the cyber-physical system.

However, if the controller is already designed for an existing system for a predefined strength of the watermarking signal, the controller cannot be co-designed for the system. The design architecture can then facilitate the enhancement of the watermarking signal without degrading the performance of the system. To do so, the design architecture can determine the performance level of the system. Subsequently, the design architecture can determine whether the watermarking signal can be further enhanced while maintaining the performance level.

During operation, the design architecture can obtain the system description, which can include the underlying system dynamics associated with the system. For example, if the system is a discrete-time linear time-invariant (LTI) system, the design architecture can determine the state of the system, the control input, which is the control signal from the controller based on the previous state of the system, a representation (or model) of the system noise (e.g., the noise associated with an actuator of the system), and the output of the system. The design architecture can also determine the attack model that can be mitigated with watermarking. The attack model can incorporate the properties of a replay attack, such as access to the output of the system and the capability to replay a previously recorded sequence of desired output of the system.

Based on the system dynamics and the attack model, the design architecture can determine a watermarking process that can generate a watermarking signal. The watermarking signal can be a signal injectable into the input of the system through one or more available channels associated with the system. The design architecture can determine the strength of the watermarking signal and the channels through which the signal can be added. The design architecture can also support the co-design of a dynamic and robust controller with a target control performance level. For example, the design architecture can design a dynamic controller to bound the H2norm, thereby ensuring that the controller is a stable dynamic feedback controller. The design architecture, thus, can facilitate the co-design of the controller and the watermarking process, thereby ensuring a high detection rate with a low-performance loss for the combined design.

Exemplary Watermarked System

FIG.1illustrates an exemplary watermarking environment that includes a watermarked system provided by an integrated design, in accordance with an embodiment of the present application. In this example, a watermarking environment100can include a cyber-physical system110. A controller112can manage and control system110to generate an output based on a control or reference signal. In some embodiments, controller112can be a closed-loop low-level controller, such as proportional-integral-derivative (PID), model predictive control (MPC), and Linear Quadratic Gaussian (LQG) controller. Controller112can also be based on a trained AI model (e.g., a trained neural network).

With existing technologies, a watermarking system114can generate a watermarking system and infuse the watermarking signal with the output signal of system110. Watermarking system114can be a hardware- or software-based signal generator that may generate a signal that may follow a distribution while being untraceable and unrepeatable. As a result, the watermarking signal can be used to detect replay attacks on system110. In these attacks, a malicious actor can record the output signal of system110and can replay the recording for the attack. System110, when deployed with watermarking system114for watermarking the output, can be referred to as watermarked physical system120(or watermarked system120for short).

Without the discrepancy provided by watermarking system114, an observer or user of system110may remain oblivious to the ongoing attack based on the replay. Even though watermarking system114may provide robust protection against a replay attack, the watermarking signal generated by watermarking system114is injected as added noise to the output of system110. Consequently, if watermarking system114can generate a strong watermarking signal for quick detection of the attack, such a signal can degrade the output signal of system110, thereby causing performance degradation for system110.

Since controller112generates the states of system110based on the output signal, a degraded output signal can adversely affect the operations of controller112. As a result, as watermarking system114becomes more effective, system110's performance degradation can become more significant. Due to the competing nature of controller112and watermarking system114, the sequential integration of these two components may yield degraded performance of system110or an ineffective detection rate for watermarking system114.

To solve this problem, an integrated design architecture150of a development system160can support the development of controller112and watermarking system114in conjunction with each other. Design architecture150can facilitate combined design140of controller112and watermarking system114. Development system160can run on an application server104reachable via a network106. Here, network106can be a local or wide area network, such as a virtual local area network (VLAN) or the Internet, respectively. Design architecture150allows development system160to jointly design and configure controller112and watermarking system114such that watermarking system114can facilitate a high detection rate while controller112can maintain a target performance level.

Subsequently, development system160can deploy controller112and watermarking system114, developed based on combined design140, for system110(via network106). However, if controller112is already designed for system110for a predefined strength of a watermarking signal, controller112cannot be co-designed for system110. Design architecture150can then facilitate the enhancement of the watermarking signal without degrading the performance of system110. To do so, design architecture150can determine whether watermarking system114can be designed to further strengthen the watermarking signal while maintaining the performance level of system110.

During operation, design architecture150can obtain the description of system110, which can include the underlying system dynamics associated with system110. For example, if system110is a discrete-time linear time-invariant (LTI) system, design architecture150can determine the state of system110, the control input from controller112at a time instance. a representation of the actuator noise of system110, and the output of system110. The control signal from controller112can be based on the previous state (e.g., at a previous time instance) of system110. Even though the examples described herein are based on linearized chemical processes, design architecture150can also be used for security, fault detection, and fault mitigation for general uncertainty or nonlinear systems, temperature control, SCADA and industrial systems, power grids, etc.

Design architecture150can also determine the attack model that can be mitigated by watermarking. For example, the attack model can incorporate the capabilities of an attacker130inflicting a replay attack. Such capabilities can include access to the output of system100, the capability of recording the output, and the capability to replay a previously recorded output to achieve a sequence of desired malicious output of system110. Based on the system dynamics and the attack model, design architecture150can determine a watermarking system114that can generate a watermarking signal. The watermarking signal can be a signal injectable into the input of system110through one or more available channels of system110.

Design architecture150can determine the strength of the watermarking signal and the channels of system110through which the signal can be added. The design architecture can also support the co-design of controller112with a target control performance level. For example, design architecture150can design controller112to bound the H2norm, thereby ensuring that controller112is a stable dynamic feedback controller for system110. Design architecture150can also design a separate information manager116(e.g., an estimator of a control system) and a detector118for system110to ensure robust control performance and detection of the attack.

In some embodiments, information manager116can operate as a state manager for system110and use a Kalman filter to calculate the states of system110based on the output of system110. Furthermore, detector118can include a χ2detector (i.e., a chi-square detector) for fault detection in system110. Design architecture150, thus, can facilitate the co-design of controller112and watermarking system114with a high detection rate with a low-performance loss for watermarked system120.

System Architecture

FIG.2Aillustrates an exemplary watermarked system provided by an integrated design, in accordance with an embodiment of the present application. In this example, system110is designed to produce an output signal214based on a combined signal226. Here, combined signal226can be a combination (e.g., an addition) of control signal222(denoted as Uk) from controller112and watermarking signal224(denoted as Δuk) from watermarking system114. System110's output signal214can be detected and used by sensors202to generate sensor measurements218(denoted as yk).

Here, system110can be exposed to system noise212(denoted as wk), which indicates imperfections associated with the operating mechanism of system110. System noise212can also be referred to as process noise or actuator noise. Furthermore, the measurements from sensors202can also be impacted by noise216(denoted as vk) produced by sensors202. Here, a respective sensor may include fundamental inaccuracy due to noise sources (e.g., Gaussian noise).

Accordingly, if system110includes an LTI system, design architecture150can represent the state of system110at time k+1 based on xk+1=Axk+Buk+Dwkand yk=CXk+vk, where x is the state of system110, u is control signal222, and w indicates system noise212with known statistics, and y is output signal214. Design architecture150can also determine a representation (or model) for a malicious action, such as a replay attack, that can be performed by attacker130to harm system110. Design architecture150can incorporate the properties of the attack.

For example, attacker130can have access to measured signal218in real-time and the capability to record measurements218over a period. Attacker130can also have the capability of replaying previously recorded measurements218(i.e., recorded data yk) while attacking by adding malicious data232(denoted by yk) to measurements218for achieving a sequence of desired control signal234(denoted as uka). Here, the addition of malicious data232to measurements218can lead to modified measurements220. Upon receiving modified measurements220instead of measurements218, controller112can generate control signal222instead of control signal234, respectively.

Based on the attack model, design architecture150can determine the system dynamics for watermarked system120as xk+1=Axk+Buk+Bauka+Dwkand yk=Cxk+Dayka+vk. To mitigate the attack, design architecture150can design watermarking system114that can inject a physical watermark (e.g., a watermarking signal224) as a random noise and determine whether system110responds to watermarking signal224in accordance with the system dynamics.

Design architecture150can then determine the state of system110in the presence of watermarking signal224as xk+1=Axk+Buk+BΔuk+Dwkand yk=Cxk+vk. In some embodiments, watermarking signal224(i.e., signal Δuk) can be determined based on Gaussian random variable with zero mean and a predefined covariance. Subsequently, design architecture150can determine the strength of watermarking signal224and identify the channels of system110through which watermarking signal224can be injected to control signal222. Accordingly, watermarking signal224can be used to determine watermarking system114. Upon injection, combined signal226can be used for controlling system110.

Design architecture150can also co-design controller112to bound the H2norm. Controller112can be represented by xk+1c=Acxkc+Bcykand uk=Ccxkc+Dcyk. Design architecture150ensures that the values of Ac, Bc, Cc, and Dcsuch that the H2norm is bounded. In addition, design architecture150can determine information manager116and detector118. Information manager116can obtain modified measurements220to determine the system states. Residue230(denoted as r) from information manager116can be obtained by detector118to determine the attack. Residue230can be represented by r=y−c{circumflex over (x)}, wherein {circumflex over (x)} can be the system states.

In some embodiments, information manager116determine the system states, {circumflex over (x)}, based on a Kalman filter, and detector118can include a χ2detector. Here, information manager116can operate as the state manager of system110. Design architecture150can represent the output of the Kalman filter as {circumflex over (x)}k+1|k+1={circumflex over (x)}k+1|k+1+(yk−{circumflex over (x)}k+1|k+1). The corresponding Kalman gain can then be determined as=T(T+)−1. Based on the Kalman filter of information manager116, the χ2detector of detector118can be represented at a time k as gk=Σi=k−T+1k(yi−C{circumflex over (x)}i|i−1)Tχ−1(yi−C{circumflex over (x)}i|i−1) with respect to

gk≶ℋ0ℋ1⁢η.
Here, T can indicate the window size of detection and η can be the threshold indicates the false alarm rate (e.g., the false positive rate for attack detection). For example, gk<η can indicate that system110is under normal operation while gk>η can indicate a triggered alarm for an attack on system110.

FIG.2Billustrates an exemplary integrated design for facilitating a watermarked system, in accordance with an embodiment of the present application. For an existing deployment262, an already-designed system can have an existing controller232. Here, controller232can be designed for enhancing the performance based on a pre-defined watermarking strength (step252). Design architecture150can be used for the development of controller232and a Kalman filter for the system with a watermarking signal of a predetermined strength. Because of existing deployment262, controller232may not be redesigned.

Design architecture150can then be used to further enhance the watermarking signal for controller232. Accordingly, design architecture150can develop a watermarking system234for operating with controller232. The watermarking signal from watermarking system234can increase the detection rate compared to the already deployed watermarking signal of the predetermined strength. Here, design architecture150can ensure that the performance level of controller232is maintained (step254). In other words, the performance loss for controller232is not further degraded by watermarking system234.

On the other hand, for a new deployment264for a system, design architecture150can enhance both the detection rate and the performance using an integrated design of a controller and a watermarking system (step256). For example, the integrated design140of controller112and watermarking system114can enhance the detection rate and the performance. To facilitate the simultaneous design of watermarking system112and controller114, design architecture150can develop a controller (e.g., by determining Ac, Bc, Cc) for a predetermined watermarking signal. Subsequently, for the developed controller, design architecture150can develop a watermarking signal. Design architecture150can then iterate this process until a convergence is reached.

FIG.3illustrates an exemplary watermarked water supply system, in accordance with an embodiment of the present application. In this example, a watermarked water supply system300that can facilitate a controlled chemical process. System300can be controlled by a Linear Quadratic Gaussian controller330that generates control signal324for regulating the output of system300. A watermarking system340can be embedded into system300for injecting watermarking signal326into control signal324.

System300can include water tanks302,304, and306for hot water, adjusted water, and cold water, respectively. Hence, the system state, xk, can indicate the level of water in tanks304and306, and the temperature of water in tank304at time instance k. The control inputs, uk, can be respective control signals to flow pumps312and314, valve316, and heater310from controller330. The objective of controller330is to regulate state vector around a reference value that dictates the target level of water in tanks304and306, and the target temperature of water in tank304.

System300can include a sensor module320that can provide sensor measurements322indicative of water levels in tanks304and306, and water temperature of tank304. In some embodiments, system300can be over-observed by s sensors in sensor module320. An attacker can record measurements322over a period and replay the recorded measurements while attacking system300by adding malicious data to measurements322for achieving a sequence of desired control signal from controller. Watermarking signal326allows a detector to determine the replayed measurements and detect the attack on system300.

Operations

FIG.4presents a flowchart400illustrating a method of an integrated design architecture facilitating a controller and a watermarking process in conjunction with each other for a cyber-physical system, in accordance with an embodiment of the present application. During operation, the design architecture can determine an attack model of an attacker that can inject malicious data into the output (e.g., sensor measurements) of the cyber-physical system (operation402). The design architecture can then determine a first set of parameters representing a controller for the system and a second set of parameters representing a watermarking system for the controller (operation404).

The design architecture can determine the system dynamics for the system with respect to the determined parameters (operation406). Subsequently, the design architecture can enhance the respective values of the first and second sets of parameters in conjunction with each other (operation408). For example, the design architecture can enhance the respective values of the first set of parameters for a set of values for the second sets of parameters. The design architecture can then enhance respective values of the second set of parameters for the enhanced values for the second sets of parameters.

The design architecture can then determine whether convergence has been achieved for the first and second sets of parameters (operation410). The convergence can be detected if the performance and the detection rate are not further enhanced by the first and second sets of parameters within a threshold level. If convergence has not been achieved, the design architecture can continue to enhance the respective values of the first and second sets of parameters in conjunction with each other (operation408). On the other hand, if convergence has been achieved, the design architecture can produce and/or configure the controller and the watermarking system (operation412). The design architecture can also deploy the controller and the watermarking system for the cyber-physical system (operation414).

FIG.5presents a flowchart500illustrating a method of a detector of a cyber-physical system determining an anomaly using watermarking, in accordance with an embodiment of the present application. During operation, the detector can determine the control signal and the system noise of the cyber-physical system at a point of time (operation502). The detector can then determine the combined signal of the watermarking signal incorporated into the control signal at the point of time (operation504).

Subsequently, the detector can determine the states of the cyber-physical system based on the measurements at sensors at the point of time (operation506). The detector can determine the subsequent state of the cyber-physical system based on the determined information at a subsequent point of time (operation508) and compare the states at the time interval for anomaly (operation510). The detector can then determine whether anomaly is detected (operation512).

If anomaly is detected, the detector can determine whether the anomaly is present for threshold period (operation514). If anomaly is not detected (operation514) for a threshold period (operation514), the detector can continue to determine the control signal and the system noise of the cyber-physical system at a subsequent point of time (operation502). On the other hand, if the anomaly is present for threshold period, the detector can report the anomaly for the cyber-physical system (operation516).

Exemplary Computer System and Apparatus

FIG.6illustrates an exemplary computer system that facilitates an integrated design framework for providing a watermarked system, in accordance with an embodiment of the present application. Computer system600includes a processor602, a memory device604, and a storage device608. Memory device604can include a volatile memory device (e.g., a dual in-line memory module (DIMM)). Furthermore, computer system600can be coupled to a display device610, a keyboard612, and a pointing device614. Storage device608can store an operating system616, an enhanced designing system618, and data636. Enhanced designing system618can facilitate the operations of design architecture150.

Enhanced designing system618can include instructions, which when executed by computer system600can cause computer system600to perform methods and/or processes described in this disclosure. Specifically, enhanced designing system618can include instructions for obtaining system dynamics of a cyber-physical system (system module620). Here, the cyber-physical system can be a watermarked system. Enhanced designing system618can also include instructions for determining an attack model that can represent an attack on the cyber-physical system by a malicious actor (attack model module622). Enhanced designing system618can also include instructions for incorporating the properties of the attack and the capabilities of the malicious actor into the attack model (attack model module622).

Furthermore, enhanced designing system618includes instructions for determining a controller that can control the operations of the cyber-physical system for a predetermined watermarking signal strength (controller module624). Enhanced designing system618can also include instructions for enhancing the watermarking signal strength for the determined controller (watermarking module626). Moreover, enhanced designing system618can include instructions for co-designing the controller and the watermarking signal by iterating the determination process until a convergence is reached (i.e., the performance and the detection rate are not further enhanced within a threshold level) (design module628).

Enhanced designing system618can further include instructions for determining an information manager that can determine the states of the cyber-physical system (e.g., using a Kalman filter) (information module630). Enhanced designing system618can also include instructions for detecting an attack on the cyber-physical system based on the watermarking signal, such as a χ2detector (detection module632). Enhanced designing system618may further include instructions for sending and receiving messages (communication module634). Data636can include any data that can facilitate the operations of design architecture150ofFIG.1. Data636may include respective values of the sets of parameters corresponding to a controller and a watermarking system.

FIG.7illustrates an exemplary apparatus that facilitates an integrated design framework for providing a watermarked system, in accordance with an embodiment of the present application. Enhanced designing apparatus700can comprise a plurality of units or apparatuses which may communicate with one another via a wired, wireless, quantum light, or electrical communication channel. Apparatus700may be realized using one or more integrated circuits, and may include fewer or more units or apparatuses than those shown inFIG.7. Further, apparatus700may be integrated in a computer system, or realized as a separate device that is capable of communicating with other computer systems and/or devices. Specifically, apparatus700can comprise units702-716, which perform functions or operations similar to modules620-634of computer system600ofFIG.6, including: a system unit702; an attack model unit704; a controller unit706; a watermarking unit708; a design unit710; an information unit712, a detection unit714, and a communication unit716.

The data structures and code described in this detailed description are typically stored on a computer-readable storage medium, which may be any device or medium that can store code and/or data for use by a computer system. The computer-readable storage medium includes, but is not limited to, volatile memory, non-volatile memory, magnetic and optical storage devices such as disks, magnetic tape, CDs (compact discs), DVDs (digital versatile discs or digital video discs), or other media capable of storing computer-readable media now known or later developed.

The methods and processes described in the detailed description section can be embodied as code and/or data, which can be stored in a computer-readable storage medium as described above. When a computer system reads and executes the code and/or data stored on the computer-readable storage medium, the computer system performs the methods and processes embodied as data structures and code and stored within the computer-readable storage medium.

Furthermore, the methods and processes described above can be included in hardware modules. For example, the hardware modules can include, but are not limited to, application-specific integrated circuit (ASIC) chips, field-programmable gate arrays (FPGAs), and other programmable-logic devices now known or later developed. When the hardware modules are activated, the hardware modules perform the methods and processes included within the hardware modules.

The foregoing embodiments described herein have been presented for purposes of illustration and description only. They are not intended to be exhaustive or to limit the embodiments described herein to the forms disclosed. Accordingly, many modifications and variations will be apparent to practitioners skilled in the art. Additionally, the above disclosure is not intended to limit the embodiments described herein. The scope of the embodiments described herein is defined by the appended claims.