Patent ID: 12257902

DESCRIPTION OF EMBODIMENTS

For better illustrating technical solutions of the present disclosure, embodiments of the present disclosure will be described in detail as follows with reference to the accompanying drawings.

It should be noted that, the described embodiments are merely exemplary embodiments of the present disclosure, rather than all embodiments of the present disclosure. All other embodiments obtained by those skilled in the art according to the embodiments of the present disclosure fall within the scope of the present disclosure.

The terms used in the embodiments of the present disclosure are merely for the purpose of describing particular embodiments but not intended to limit the present disclosure. Unless otherwise noted in the context, the singular form expressions “a”, “an”, “the” and “said” used in the embodiments and appended claims of the present disclosure are also intended to represent plural form expressions thereof.

It should be understood that the term “and/or” used herein is merely an association relationship describing associated objects, indicating that there may be three relationships, for example, A and/or B may indicate that three cases, i.e., A alone, A and B, and B alone. The character “/” herein generally indicates that the related objects before and after the character form an “or” relationship.

Usually, at least one functional circuit is provided in a bezel area of the display panel, and the functional circuit includes multiple circuit units with a same circuit structure, and the circuit units are connected to signal lines located in a display area and configured to transmit the driving signals for display to the signal lines.

When the display panel has an irregular design, in a related design, a certain angular bend is formed between two panel edges adjacent to and connected to each other in the display panel. It is found in the research that the circuit units in this type of display panel are arranged in a poor manner, which in turn can adversely affect the display performance of the display panel.

FIG.1is a schematic diagram of a display panel in the related art. As shown inFIG.1, the display panel includes a first panel edge101and a second panel edge102that are connected to and adjacent to each other, the first panel edge101and the second panel edge102each extend along a straight line, and a bend with a certain angle is formed between the first panel edge101and the second panel edge102. Based on such structure, in the related design, when circuit units104in the functional circuit103are arranged in a part of the bezel area105where the first panel edge101and the second panel edge102are located, some circuit units104are arranged in a straight line along the first panel edge101at a side of the first panel edge101, and some other circuit units104are arranged in a straight line along the second panel edge102at a side of the second panel edge102.

However, since a bend with a certain angle is formed between the first panel edge101and the second panel edge102, when the circuit units104are arranged in the above-mentioned arrangement, the circuit units104located at the side of the first panel edge101and other circuit units104located at the side of the second panel edge102will have an abrupt change in the setting direction at the intersection of the two panel edges.

In the process of the display panel, when the setting direction of the circuit units104differs significantly, the circuit units104located at the side of the first panel edge101and other circuit units104located at the side of the second panel edge102may have different layout designs, which may lead to that the transistors playing a same role in the circuit units104located at the side of the first panel edge101and other circuit units104located at the side of the second panel edge102have different aspect ratios, thus leading to different device performances. Such configuration will also result in a larger gap formed between two adjacent circuit units104at the intersection of the first panel edge101and the second panel edge102, and the larger the gap between the two circuit units104, the greater the risk of differences in device performance between the two circuit units104. All of the above reasons can lead to differences in the driving signals output by different circuit units104, which can have an adverse effect on the display performance, such as causing the display panel to have a split screen phenomenon.

In view of the above, some embodiments of the present disclosure provide a display panel, as shown inFIG.2that is a schematic diagram of a display panel provided by some embodiments of the present disclosure, the display panel includes a first panel edge1and a second panel edge2that are connected to and adjacent to each other, and the first panel edge1and the second panel edge2extend linearly in different directions, respectively. That is, a bend with a certain angle is formed between the first panel edge1and the second panel edge2. In some embodiments of the present disclosure, an angle formed between the first panel edge1and the second panel edge2can be an acute angle, a right angle, or an obtuse angle.

The display panel has a display area3and a bezel area4surrounding the display area3.

The display panel includes a first functional circuit5disposed in the bezel area4, the first functional circuit5includes first functional circuit units6, and the first functional circuit units6includes first circuit units61, second circuit units62, and at least one third circuit unit63.

The first circuit units61are located at a side of the first panel edge1and arranged in a straight line along the first panel edge1, the second circuit units62are located at a side of the second panel edge2and arranged in a straight line along the second panel edge2, and at least one third circuit unit63is located between the first circuit unit61and the second circuit unit62and close to a position where the first panel edge1is connected to the second panel edge2. The third circuit unit63is arranged in a direction that is inclined with respect to each of a direction along which the first circuit unit61is arranged and a direction along which the second circuit unit62is arranged.

FIG.3is a partial schematic diagram of a display panel provided in an embodiment of the present disclosure. As shown inFIG.3, the third circuit unit63is inclined as follows. The first functional circuit unit6includes a first edge7close to a side of the display area3and a second edge8intersecting with the first edge7. A first angle A is formed between an extension direction of the second edge8of the third circuit unit63and an extension direction of a second edge8of the first circuit unit61, and a second angle B is formed between an extension direction of the second edge8of the third circuit unit63and an extension direction of a second edge8of the second circuit unit62, and both the first angle A and the second angle B are smaller than a third angle C formed between the extension direction of the second edge8of the first circuit unit61and the extension direction of the second edge8of the second circuit unit62.

In the embodiments of the present disclosure, the third circuit unit63is provided at the position where the first panel edge1and the second panel edge2are connected to each other, and a setting direction of the third circuit unit63is inclined relative to both the setting direction of the first circuit unit61and the second circuit unit62, so that the setting direction of the overall first functional circuit unit6can be uniformly transitioned from an angle perpendicular to the first panel edge1to an angle perpendicular to the second panel edge2, which prevents the setting direction of the circuit units at a side of the two panel edges from rotating abruptly, and in turn prevents the layout difference caused by the abrupt change in the setting direction and weakens the difference in the device performance of transistors in different first functional circuit units6. With such configuration, the spacing between the first functional circuit units6close to the position where the two panel edges are connected to each other can be reduced, thus effectively weakening the performance difference of the transistors in different first functional circuit units6.

In summary, the technical solution provided by the embodiments of the present disclosure can improve the arrangement of the first functional circuit units6, thus reducing the differences in the signals output by different first functional circuit units6and improving the display performance of the display panel, such as improving the split screen phenomenon of the display panel. The technical solution is suitable for irregular display panels, for example, more suitable for on-vehicle display panels with more diverse designs.

FIG.4is another partial schematic diagram of a display panel according to an embodiment of the present disclosure. In some embodiments, as shown inFIG.4, the first functional circuit unit6includes multiple third circuit units63arranged in the virtual annulus9along an edge of the virtual annulus9. The virtual annulus9has a circle center O located in the display area3, and an outer edge tangential to both the first panel edge1and the second panel edge2.

In the above configuration, multiple third circuit units63are rotatably arranged along the virtual annulus9at the position where the first panel edge1and the second panel edge2are connected to each other. The difference between a direction along which two adjacent first circuit units61and the third circuit unit63are arranged and a direction along which two adjacent third circuit units63and the second circuit unit62are arranged is small, so that the setting direction of first circuit units61, the setting direction of the third circuit units63, and the setting direction of the second circuit units62transition more uniformly without a sudden change in setting directions.

When the center of the virtual annulus9is located in the display area3, the outer edge of the virtual annulus9is spaced at a certain distance from a top corner of the intersection of the first panel edge1and the second panel edge2intersect, so that the space between the outer edge of the virtual annulus9and the corner of the display area3is reduced. In this regard, by making the outer edge of the virtual annulus9tangent to both the first panel edge1and the second panel edge2, the embodiments of the present disclosure can make the outer edge of the virtual annulus9closer to the panel edge to a greater extent, reduce the distance between the outer edge of the virtual annulus9and the top corner of the intersection of the two panel edges, and then leave enough space between the outer edge of the virtual annulus9and a corner of the display area3to accommodate the third circuit unit63, which enhances the arrangement of the third circuit unit63.

When multiple third circuit units63are arranged in the virtual annulus9along the edge of the virtual annulus9, in some embodiments, referring toFIG.4again, at least one first circuit unit61close to the third circuit unit63is located in the virtual annulus9, and at least one second circuit unit62close to the third circuit unit63is located in the virtual annulus9.

With such configuration, the difference between the distance between the first circuit unit61and the first panel edge1. Further, the distance between the third circuit unit63and the outer edge of the virtual annulus9will be not too large, and the setting position of the first circuit unit61in the direction of the bezel width of the first panel edge1and the setting position of the third circuit unit63in the direction of the bezel width of the first panel edge1will be not suddenly changed. At the same time, a difference between the distance between the second circuit unit62and the second panel edge2and the distance between the third circuit unit63and the outer edge of the virtual annulus9will be not too large, and the setting position of the third circuit unit63in the direction of the bezel width of the second panel edge2and the setting position of the second circuit unit62in the direction of the bezel width of the second panel edge2will be not suddenly changed.

FIG.5is another partial schematic diagram of a display panel provided in an embodiment of the present disclosure, andFIG.6is another partial schematic diagram of a display panel provided in an embodiment of the present disclosure. The above configuration can avoid some situations, such as situations as shown inFIG.5andFIG.6, so that a gentler transition is achieved between the setting positions of the first circuit unit61and the third circuit unit63, and a gentler transition is achieved between the setting positions of the third circuit unit63and the second circuit unit62.

When multiple third circuit units63are arranged in the virtual annulus9along the edge of the virtual annulus9, in some embodiments, referring toFIG.4again, the first circuit unit61is spaced apart from the first panel edge1, the second circuit unit62is spaced apart from the second panel edge2, and the third circuit unit63is spaced apart from the outer edge of the virtual annulus9. Such a configuration avoids the first circuit unit61and the second circuit unit62being aligned with the panel edge of the display panel, the third circuit unit63being too close to the panel edge of the display panel, avoids erosion of the first functional circuit unit6caused by water and oxygen, and reduces the risk of performance failure of the device in the first functional circuit unit6.

In some embodiments, to achieve a smoother transition between the first circuit unit61, the second circuit unit62, and the third circuit unit63, referring toFIG.4again, a distance d1between the first circuit unit61and the first panel edge1, a distance d2between the second circuit unit62and the second panel edge2, and a distance d3between the third circuit unit63and the outer edge of the virtual annulus9are equal to each other.

In some embodiments, referring toFIG.4again, multiple third circuit units63are arranged at an equal interval. In this case, an angle between the setting directions of every two adjacent third circuit units63tends to be a same value, the third circuit units63rotate uniformly in the virtual annulus9along the edge of the virtual annulus9, and the transition between the first circuit unit61, the second circuit unit62, and the third circuit unit63is gentler.

FIG.7is another partial schematic diagram of a display panel provided in an embodiment of the present disclosure. In some embodiments, as shown inFIG.7, the bezel area4has a first linear bezel10, a corner bezel11, and a second linear bezel12that are defined by the first panel edge1and the second panel edge2, the first circuit unit61is located in the first linear bezel10, the second circuit unit62is located in the second The first circuit unit61is located at the first straight edge10, the second circuit unit62is located at the second straight edge12, and the third circuit unit63is located at the corner edge11.

A bezel width L1of the first linear bezel10and a bezel width L2of the second linear bezel12are equal to each other, and a distance d4between the first circuit unit61and the display area3and a distance d5between the second circuit unit62and the display area3are equal to each other.

For a panel structure with two linear bezel having a same width, when the distance between the first circuit unit61and the display area3and the distance between the second circuit unit62and the display area3are equal to each other, a relative position relationship between the first circuit unit61in the first linear bezel10and the panel edge of the display panel and a relative position relationship between the first circuit unit61and the edge of the display area3are the same as a relative position relationship between the second circuit unit62in the second linear bezel12and the panel edge of the display panel and a relative position relationship between the second circuit unit62in the second linear bezel12and the edge of the display area3, and both the first circuit units61and the second circuit units62can be arranged in a sequence along the third circuit unit63in the virtual annulus9, and the transition of the setting position of the first functional circuit unit6is gentler.

FIG.8is another partial schematic diagram of a display panel provided in an embodiment of the present disclosure. In another embodiment, as shown inFIG.8, the bezel area4includes a first linear bezel10, a corner bezel11, and a second linear bezel12that are defined by the first panel edge1and the second panel edge2, the first circuit unit61is located at the first linear bezel10, the second circuit unit62located at the second linear edge12, and the third circuit unit63is located at the corner edge11.

A width L2of the second linear bezel12is greater than a width L1of the first linear bezel10, and a distance d5between the second circuit unit62and the display area3is greater than a distance d4between the first circuit unit61and the display area3.

For a panel structure with two linear bezels having different widths, when the width of the second linear bezel12is larger and the distance between the second circuit unit62and the display area3is larger, both the first circuit unit61and the second circuit unit62are closer to the panel edge of the display panel, and both the first circuit units61and the second circuit units62can be arranged in sequence along the third circuit unit63in the dummy circle9, the transition of the setting positions of the first functional circuit units6are gentler.

FIG.9is another partial schematic diagram of a display panel provided in an embodiment of the present disclosure. In some embodiments, as shown inFIG.9, the display panel includes a second functional circuit13located in the bezel area4, the second functional circuit13includes multiple second functional circuit units14, at least one second functional circuit unit14is located between the display area3and the first functional circuit unit6located at a side of a first sub-unit15, and the first sub-unit15is one of the third circuit units63that is closest to the display area3.

Since the first sub-unit15is the third circuit unit63closest to the display area3, a spacing between the first sub-unit15and the display area3is small. When at least one second functional circuit unit14is arranged between the display area3and the first functional circuit unit6next to the first sub-unit15. In this way, it can be avoided that the second functional circuit unit14occupies the space between the first sub-unit15and the display area3. Thus, when designing the bezel width, there is no need to enlarge the bezel width in order to accommodate the second functional circuit unit14between the first sub-unit15and the display area3, which helps to enhance the narrow bezel design.

FIG.10is another schematic diagram of a partial structure of a display panel according to an embodiment of the present disclosure. As shown inFIG.10, the first functional circuit unit6also includes a second sub-unit16and multiple third sub-units17, the second sub-unit16is adjacent to the first sub-unit15, and the third sub-unit17is located at a side of the second sub-unit16away from the first sub-unit15. A spacing between the first sub-unit15and the second sub-unit16is greater than a distance between the remaining adjacent third circuit units63. It can be understood that the second sub-unit16can be the third circuit unit63, the first circuit unit61, or the second circuit unit62, which depends on the location of the first sub-unit15.

The multiple second functional circuit units14include a fourth circuit unit141and a fifth circuit unit142, at least part of the fourth circuit unit141is located between the first sub-unit15and the second sub-unit16, and the fifth circuit units142are located at a side of the second sub-unit16close to the display area3and a side of at least one third sub-unit17close to the display area3, respectively.

When the first sub-unit15is the third circuit unit63closest to the display area3, the spacing between the display area3and the second sub-unit16adjacent to the first sub-unit may also be relatively small, and the above configuration can provide a space for accommodating the fourth circuit unit141between the first sub-unit15and the second sub-unit16by increasing the spacing between the first sub-unit15and the second sub-unit16, so that at least part of the fourth circuit unit141is inserted into the space between the first sub-unit15and the second sub-unit16. In this way, when designing the bezel width, there is no need to increase the spacing between the second sub-unit16and the display area3for the fourth circuit unit141, and the narrow bezel design can be enhanced.

In some embodiments, referring toFIG.10again, the display panel also includes driving signal lines18connected to the first functional circuit unit6, and the driving signal lines18may include a frame start signal line, a clock signal line, etc. The driving signal lines18include at least one first signal line19, and the first signal line19is located at a side of the second functional circuit13away from the display area3and extends close to the second functional circuit13. The first signal line19includes a bending portion20disposed between the first sub-unit15and the second sub-unit16, the bending portion20is bent away from the display area3, and at least part of the fourth circuit unit141is disposed at a side of the bending portion20close to the display area3.

The part of the first signal line19located between the first sub-unit15and the second sub-unit16is bent, so that this part can avoid the fourth circuit unit141to free up more setting space for the fourth circuit unit141.

FIG.11is a partial schematic diagram of a display panel provided in an embodiment of the present disclosure, andFIG.12is a partial schematic diagram of a display panel provided in an embodiment of the present disclosure. In an embodiment, as shown inFIG.11andFIG.12, the display panel includes dummy sub-pixels21, at least some of which are located between the fourth circuit unit141and the display area3.

Generally, the third circuit unit63(first sub-unit15) closest to the display area3is located near the corner of the display area3, and the number of display sub-pixels22connected to the data line Data near the corner of the display area3is usually smaller, resulting in a smaller load. When at least part of the fourth circuit unit141is accommodated between the first sub-unit15and the second sub-unit16, the space occupied by the fourth circuit unit141can be used to set dummy sub-pixels21, so that these dummy sub-pixels21are connected to the data lines Data at the corners of the display area3, which in turn improves the load uniformity of the data line Data at different locations.

FIG.13is another partial schematic diagram of a display panel according to an embodiment of the present disclosure. In an embodiment, as shown inFIG.13, the second functional circuit13includes a first-type second functional circuit13_1, the second sub-unit16includes a first-type second sub-unit16_1, and the third sub-unit17includes a first-type third sub-unit17_1. The first-type second sub-unit16_1and the first-type third sub-unit17_1are located at a side of the first sub-unit15, and the first-type third sub-unit17_1includes the first circuit unit61.

In the first-type second functional circuit13_1, at least a part of the fourth circuit unit141is located between the first sub-unit15and the first-type second sub-unit16_1, and the fifth circuit units142are located at a side of the first-type second sub-unit16_1close to the display area3and a side of the first-type third sub-unit17_1close to the display area3, respectively.

When the first-type third sub-unit17_1includes the first circuit unit61, it indicates that the first-type second functional circuit13_1is located in the bezel at a side of the first panel edge1. Depending on the location of the first sub-unit15, the first-type third sub-unit17_1may also include a third circuit unit63.

In another embodiment, the second functional circuit13includes a second-type second functional circuit13_2, the second sub-unit16includes a second-type second sub-unit16_2, and the third sub-unit17includes a second-type third sub-unit17_2. The second-type second sub-unit16_2and the second-type third sub-unit17_2are located at another side of the first sub-unit15, and the second-type third sub-unit17_2includes a second circuit unit62.

In the second-type second functional circuit13_2, at least part of the fourth circuit unit141is located between the first sub-unit15and the second-type second sub-unit16_2, and the fifth circuit units142are located at a side of the second-type second sub-unit16_2close to the display area3and a side of the second-type third sub-unit17_2close to the display area3.

When the second-type third sub-unit17_2includes the second circuit unit62, it indicates that the second-type second functional circuit13_2is located in the bezel at a side of the second panel edge2. Depending on the location of the first sub-unit15, the second-type third sub-unit17_2may also include a third circuit unit63.

In the above configuration, the second functional circuits13may be provided at a side of the first panel edge1and a side of the second panel edge2, respectively, and such configuration is suitable for panel structures with a large number of types and numbers of second functional circuits13.

In some embodiments, with reference toFIG.14andFIG.15, the display panel also includes a data line Data located in the display area3. The bezel area4also includes a bonding area23, and the bonding area23can be used to bind a driver chip, a printed circuit board, and other structures. A distance between the first circuit unit61and the bonding area23is greater than a distance between the second circuit unit62and the bonding area23.

In view of the above, the first-type second functional circuit13_1may include a protection circuit24connected to the data line Data (not shown in the figure), and the protection circuit24is used to protect the data line Data from electrostatic breakdown. The second-type second functional circuit13_2includes a selector circuit25connected to the data line Data (not shown in the figure), and the selector circuit25is configured to transmit a data voltage to the data line Data in a time-division manner, to reduce the number of pins in the bonding area23.

Since the selector circuit25needs to receive the data voltage supplied by the driver chip or the printed circuit board, the second-type second functional circuit13_2that is closer to the bonding area23is reused as the selector circuit25, which reduces the connection distance between the selector circuit25and the bonding area23, facilitating wiring and reducing the voltage drop.

FIG.14is a partial schematic diagram of a display panel according to an embodiment of the present disclosure. In an embodiment, as shown inFIG.14, the display panel includes a third panel edge26, and the third panel edge26extends in a direction perpendicular to an extension direction of the data lines Data. The bonding area23is located at a side of the third panel edge26, and the second-type second functional circuit13_2is connected to the pins in the bonding area23by connection leads29.

Since the selector circuit25needs to receive the data voltage provided by the driver chip or the printed circuit board, when the bonding area23and the second-type second functional circuit13_2(selector circuit25) are located at different sides of the edge, the second-type second functional circuit13_2(selector circuit25) can be connected to the pins in the bonding area23through the connection lead29, thus realizing the connection with the driver chip or the printed circuit board. The second-type second functional circuit13_2(selector circuit25) can be connected to the pins in the bonding area23through the connection lead29to achieve connection with the driver chip or the printed circuit board.

In view of the above configuration, the second-type second functional circuit13_2(selector circuit25) is located closer to the bonding area23, so that the extension length of the connection lead29can be shortened to reduce the attenuation of the data voltage during transmission.

FIG.15is another partial schematic diagram of a display panel according to an embodiment of the present disclosure. In some embodiments, as shown inFIG.15, the bonding area23is located between the second circuit unit62and the second panel edge2, and the second-type second functional circuit13_2is connected to the pin located in the bonding area23via the connection lead29.

Since the selector circuit25needs to receive the data voltage provided by the driver chip or the printed circuit board, when the bonding area23and the second-type second functional circuit13_2(selector circuit25) are located at a same side of the bezel, the second-type second functional circuit13_2(selector circuit25) can be connected to the pin in the bonding area23through the connection lead29, thus realizing the connection with the driver chip or the printed circuit board.

Based on the above configuration, the second-type second functional circuit13_2(selector circuit25) is closer to the bonding area23, the extension length of the connection lead29can be shortened to reduce the attenuation of the data voltage during transmission.

The display panel may have no lower bezel when the bonding area23and the second-type second functional circuit13_2(selector circuit25) are located at a same side of the bezel, and the display panel may be in a shape such as a diamond. In some embodiments, the display panel may have a lower bezel, for example, the second panel edge2extends in a direction perpendicular to the extension direction of the data line Data, and the side at which the second circuit unit62is located is the lower bezel, and the display panel may be in a shape, such as a parallelogram.

FIG.16is another partial schematic diagram of a display panel provided in an embodiment of the present disclosure, andFIG.17is a schematic diagram illustrating a panel edge, a data line Data, and a pixel row28provided in an embodiment of the present disclosure. In some embodiments, as shown inFIG.16andFIG.17, the first functional circuit5includes a shift register circuit27. The data line Data is provided in the display area3, and an angle θ1between the extension direction of the first panel edge1and the extension direction of the data line Data is greater than an angle θ2between the extension direction of the second panel edge2and the extension direction of the data line Data, and a spacing h1between adjacent first circuit units61is greater than a spacing h2between adjacent second circuit units62.

The reference sign1_1inFIG.17indicates a straight line parallel to the first panel edge1, and an angle between the straight line and the data line Data is the angle θ1between the extension direction of the first panel edge1and the extension direction of the data line Data, and the reference sign2_1indicates a straight line parallel to the second panel edge2, and the angle between the straight line and the data line Data is the angle θ2between the extension direction of the second panel edge2and the extension direction of the data line Data.

The shift register circuit27is usually electrically connected to the pixel row28through the scan signal line, the light-emitting control signal line, etc. Referring toFIG.17, when the angle between the panel edge and the extension direction of the data line Data is larger, the angle between the panel edge and the extension direction of the pixel row28is smaller, then the number of the first functional circuit units6corresponding to a side of the panel edge is smaller over a same length, and thus the first functional circuit units6at a side of the panel edge are arranged in a sparsely. In this configuration, there is a correlation between an arrangement density of the first functional circuit units6at a side of the panel edge and the angle between the extension direction of the first panel edge1and the extension direction of the data line Data, and the arrangement of the first functional circuit units6at different sides of the panel edge can be enhanced.

FIG.18is another partial schematic diagram of a display panel according to an embodiment of the present disclosure. In an embodiment, as shown inFIG.18, the spacing between adjacent third circuit units63is smaller than the spacing between adjacent first circuit units61and is larger than the spacing between adjacent second circuit units62, so that the arrangement density of the third circuit units63is between the arrangement density of the first circuit units61and the arrangement density of the third circuit units63to achieve a uniform transition.

In some embodiments, referring toFIG.18again, the spacing between adjacent first circuit units61decreases along a direction pointing toward the third circuit unit63, and/or the spacing between adjacent third circuit units63decreases along a direction pointing toward the second sub-circuit, and/or the spacing between adjacent second circuit units62decreases along a direction away from the third circuit unit63. In this case, the arrangement densities of the circuit units decrease from the first circuit unit61to the third circuit unit63and then to the second circuit unit62, and are gradually changed to better achieve a uniform transition.

FIG.19is another partial schematic diagram of a display panel according to an embodiment of the present disclosure. In some embodiments, as shown inFIG.19, the first functional circuit5includes a shift register circuit27. A data line Data is provided in the display area3, an angle θ1between the extension direction of the first panel edge1and the extension direction of the data line Data is equal to an angle θ2between the extension direction of the second panel edge2and the extension direction of the data line Data, and a spacing h1between adjacent first circuit units61is equal to a spacing h2between adjacent second circuit units62.

In combination with the previous analysis, when the angle between the extension direction of the first panel edge1and the first direction is equal to the angle between the extension direction of the second panel edge2and the first direction, angles between the panel edges and the extension direction of the pixel row28are equal to each other, and the numbers of the first functional circuit units6corresponding to one side of the panel edge are equal to each other over a same length, and thus the circuit units at a side of the two panel edges can be arranged in equal density.

In an embodiment, a scan signal line is provided in the display area3, the first functional circuit5includes a first shift register circuit, the first circuit function unit6in the first shift register circuit is electrically connected to the scan signal line, and the first circuit function unit6is configured to sequentially output a scan signal to the scan signal line. In another embodiment, a light-emitting control signal line is provided in the display area3, the first functional circuit5includes a second shift register circuit, the first circuit functional unit6in the second shift register circuit is electrically connected to the light-emitting control signal line, and the first circuit functional unit6is configured to sequentially output light-emitting control signals to the light-emitting control signal line. In some embodiments, a data line Data is provided in the display area3, the first functional circuit5includes a selector circuit, the first circuit functional unit6in the selector circuit is electrically connected to the data line Data, and the first circuit functional unit6is configured to transmit the data voltage to different data lines Data in a time-division manner.

Exemplarily, in one configuration, when the display panel is a liquid crystal display panel, the first functional circuit5may include at least one of a first shift register circuit or a selector circuit. When the display panel is an organic light-emitting diode display panel, the first functional circuit5may include at least one of a first shift register circuit, a second shift register circuit, or a selector circuit.

The structure and the function of the first shift register circuit, the second shift register circuit, and the selector circuit are the same as those in the related art, and will not be repeated herein.

The extension direction of the first panel edge1and the second panel edge2in the drawings provided in the embodiments of the present disclosure is only a schematic illustration, and the technical solution provided in the embodiment of the present disclosure can be applied to display panels with various shapes such as rhombus, parallelogram, regular polygon, irregular polygon, etc. The embodiments of the present disclosure will not be illustrated exemplarily one by one.

An embodiment of the disclosure also provides a display device.FIG.20is a schematic diagram of a display device according to an embodiment of the disclosure. In some embodiments, as shown inFIG.20, the display device includes the above display panel100. The specific structure of the display panel100has been described in detail in the above embodiments, and will not be repeated herein. The display device shown inFIG.20is only a schematic illustration, and the display device can be, for example, an on-vehicle display screen, a phone, a tablet computer, a laptop computer, an electric paper book or a television set, and any other electronic device with a display function.

The above-described embodiments are merely exemplary embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent substitutions, and improvements made within the principle of the present disclosure shall fall into the protection scope of the present disclosure.

Finally, it should be noted that, the above embodiments are merely for illustrating the present disclosure but not intended to provide any limitation. Although the present disclosure has been described in detail with reference to the above embodiments, it should be understood by those skilled in the art that, it is still possible to modify the technical solutions described in the above embodiments or to equivalently replace some or all of the technical features therein, but these modifications or replacements do not cause the essence of corresponding technical solutions to depart from the scope of the present disclosure.