Patent ID: 12206337

DETAILED DESCRIPTION OF DISCLOSED EMBODIMENTS

Some exemplary embodiments of the disclosure will be described in detail hereinafter with reference to the accompanying drawings. Regarding the reference numerals mentioned in the following description, the same reference numerals shown in different drawings will be regarded as representing the same or similar elements. These embodiments are merely part of the disclosure and do not disclose all possible embodiments of the disclosure. To be more specific, these embodiments are merely examples within the scope of the claims.

Referring toFIG.1,FIG.1is a schematic diagram of the power conversion device according to the first embodiment of the disclosure. In this embodiment, the power conversion device100includes a power conversion circuit110and a control circuit120. The power conversion circuit110at least includes an input capacitor CX, a rectifier circuit RC, and a power switch SP. The input capacitor CX is coupled to the input terminal of the power conversion device100. In this embodiment, the input capacitor CX is a safety capacitor, such as an X capacitor. The input capacitor CX is coupled between two input pins of the input terminal. The rectifier circuit RC is coupled to the input terminal. The rectifier circuit RC converts an input AC power VAC into a rectified power VR. The first terminal of the power switch SP is coupled to the rectifier circuit RC. The second terminal of the power switch SP is coupled to a reference low voltage (for example, ground).

In this embodiment, the control circuit120includes a first controller121and a second controller122. The first controller121is coupled to the control terminal of the power switch SP. The first controller121operates the power switch SP to cause the power conversion circuit110to convert the rectified power VR into an output power VOUT. The second controller122is coupled to the input terminal and the first controller121. The second controller122detects a signal waveform at the input terminal. The second controller122also controls the first controller121in response to the signal waveform at the input terminal, so as to utilize the power switch SP to discharge the charge stored in the input capacitor CX.

It is worth mentioning that the second controller122detects the signal waveform at the input terminal, and controls the first controller121in response to the signal waveform at the input terminal, so as to utilize the power switch SP to discharge the charge stored in the input capacitor CX. Thus, compared to the conventional input capacitor discharge function, the control circuit120can reduce power consumption and maintain high efficiency and high power factor of the power conversion device100. In addition, the power conversion circuit110discharges the charge stored in the input capacitor CX through the existing loop or power conversion function of the power conversion circuit110. Thus, the design of the power conversion circuit110does not need to be changed.

In this embodiment, the power conversion circuit110is implemented by, for example, a boost power conversion circuit. The power conversion circuit110further includes a boost inductor LB, an output diode DO, and an output capacitor CO. The boost inductor LB is coupled between the rectifier circuit RC and the first terminal of the power switch SP. The anode of the output diode DO is coupled to the first terminal of the power switch SP. The cathode of the output diode DO serves as the output terminal of the power conversion circuit110. The output capacitor CO is coupled between the cathode of the output diode DO and the reference low voltage. In this embodiment, the rectifier circuit RC includes, for example, a full-bridge rectifier circuit FBC and a rectifier capacitor CR. The power conversion circuit of the disclosure is not limited to this embodiment. In some embodiments, the power conversion circuit110may be implemented by the rectifier circuit RC and a power conversion circuit with a power switch. The power conversion circuit may be, for example, a flyback converter, a buck power conversion circuit or an LLC resonant converter.

Referring toFIG.2,FIG.2is a schematic diagram of the power conversion device according to the second embodiment of the disclosure. In this embodiment, the power conversion device200includes a power conversion circuit210and a control circuit220. The power conversion circuit210includes an input capacitor CX, a rectifier circuit RC, a power switch SP, a boost inductor LB, an output diode DO, an output capacitor CO, and a current value sensing circuit211. The input capacitor CX is coupled to the input terminal of the power conversion device200. In this embodiment, the input capacitor CX is a safety capacitor, such as an X capacitor. The input capacitor CX is coupled between two input pins of the input terminal. The rectifier circuit RC is coupled to the input terminal. The rectifier circuit RC converts an input AC power VAC into a rectified power VR. The first terminal of the power switch SP is coupled to the rectifier circuit RC. The boost inductor LB is coupled between the rectifier circuit RC and the first terminal of the power switch SP. The current value sensing circuit211is coupled between the second terminal of the power switch SP and the reference low voltage. The current value sensing circuit211provides a feedback signal SCS in response to the current value of the current flowing through the power switch SP. In other words, the power conversion circuit provides the feedback signal SCS based on the current value of the current flowing through the power switch SP. The anode of the output diode DO is coupled to the first terminal of the power switch SP. The cathode of the output diode DO serves as the output terminal of the power conversion circuit210. The output capacitor CO is coupled between the cathode of the output diode DO and the reference low voltage.

In this embodiment, the control circuit220includes a first controller221and a second controller222. The first controller221is coupled to the current value sensing circuit211and the power switch SP. The first controller221generates a driving signal SD1in response to a pulse-width modulation (PWM) signal SPWM. The duty cycle of the driving signal SD1is determined by the pulse width of the pulse-width modulation (PWM) signal SPWM. The power switch SP operates in response to the driving signal SD1. Therefore, based on the driving signal SD1, the power conversion circuit210converts the rectified power VR into an output power VOUT. In addition, the first controller221adjusts the duty cycle of the driving signal SD1according to the feedback signal SCS. Therefore, the first controller221can support the constant current control of the power conversion circuit210. For example, the current value sensing circuit211includes a sensing resistor RCS (the disclosure is not limited thereto). The sensing resistor RCS is coupled between the second terminal of the power switch SP and the reference low voltage. The current value sensing circuit211converts the current flowing through the power switch SP into the feedback signal SCS. Therefore, the voltage value of the feedback signal SCS is positively correlated with the current value of the current flowing through the power switch SP. When the voltage value of the feedback signal SCS rises to a first preset voltage value, the first controller221reduces the duty cycle of the driving signal SD1. On the other hand, when the voltage value of the feedback signal SCS drops to a second preset voltage value, the first controller221increases the duty cycle of the driving signal SD1. In this embodiment, the first preset voltage value is set to be greater than or equal to the second preset voltage value.

In this embodiment, the second controller222includes a detection circuit2221and a discharge control circuit2222. The detection circuit2221is coupled to the input terminal. The detection circuit2221detects a signal waveform at the input terminal, and generates a state signal according to the signal waveform at the input terminal. When the waveform of the input AC power VAC is detected, it means that the power conversion device200is connected to the input AC power VAC. Therefore, the detection circuit2221generates a state signal SSX having a first voltage value. On the other hand, when the waveform of the input AC power VAC is not detected within a preset time length, it means that the power conversion device200has been disconnected from the input AC power VAC. Therefore, the detection circuit2221generates a state signal SSX having a second voltage value. The first voltage value is different from the second voltage value. For example, the first voltage value is a low voltage value. The second voltage value is a high voltage value.

It should be noted that the above-mentioned preset time length is equal to a plurality of cycles of the input AC power VAC. That is to say, the state signal SSX having the second voltage value is generated when the detection circuit2221does not detect the voltage sine wave waveform of the input AC power VAC within the plurality of cycles of the input AC power VAC. Thus, the malfunction of the control circuit220due to the unstable transient state of the input AC power VAC can be avoided.

In this embodiment, the state signal SSX may be a flag signal. The first voltage value corresponds to a first state flag value. The second voltage value corresponds to a second state flag value different from the first state flag value.

In this embodiment, the discharge control circuit2222is coupled to the detection circuit2221and the first controller221. The discharge control circuit2222is disabled in response to the state signal SSX having the first voltage value. The discharge control circuit2222is enabled in response to the state signal SSX having the second voltage value to control the power switch SP, so as to discharge the charge stored in the input capacitor CX. The discharge control circuit2222provides a driving signal SD2to control the power switch SP to discharge the charge stored in the input capacitor CX.

That is, when the power conversion device200is connected to the input AC power VAC, the second controller222disables the discharge control circuit2222in response to the state signal SSX having the first voltage value. The power conversion circuit210converts the rectified power VR into the output power VOUT. When the power conversion device200is disconnected from the input AC power VAC, the second controller222disables the first controller221in response to the state signal SSX having the second voltage value. In addition, the second controller222also controls the power switch SP in response to the state signal SSX having the second voltage value, so as to cause the charge stored in the input capacitor CX to flow through the first terminal of the power switch SP and the second terminal of the power switch SP. Thus, the power conversion device200can discharge the charge stored in the input capacitor CX to the reference low voltage through the boost inductor LB and the discharge loop LDIS of the power switch SP.

Referring toFIG.2andFIG.3.FIG.3is a schematic diagram of the discharge control circuit and the first controller according to an embodiment of the disclosure. The first controller221includes a driver DRV. The driver DRV uses the PWM signal SPWM to generate the driving signal SD1in response to a complementary state signal SSXB. In this embodiment, the driver DRV may be implemented by a buffer or a follower. In this embodiment, the discharge control circuit2222includes an operational amplifier OP. The operational amplifier OP is coupled to the power switch SP and the detection circuit2211. The operational amplifier OP is enabled in response to the state signal SSX having the second voltage value, and controls the power switch SP according to the comparison result between the feedback signal SCS and a reference signal SREF. The operational amplifier OP is disabled in response to the state signal SSX having the first voltage value. In this embodiment, the reference signal SREF is a voltage signal having a preset voltage value.

In this embodiment, the complementary state signal SSXB and the state signal SSX are mutually inverted. The first controller221may receive the state signal SSX, and use an inverter (not shown) to invert the state signal SSX to generate the complementary state signal SSXB. When the state signal SSX has the first voltage value, the driver DRV is enabled to generate the driving signal SD1according to the complementary state signal SSXB having the second voltage value. The operational amplifier OP is disabled in response to the state signal SSX having the first voltage value, and stops generating the driving signal SD2. When the state signal SSX has the second voltage value, the driver DRV is disabled according to the complementary state signal SSXB having the first voltage value. For example, the driver DRV is disabled to enter a high impedance (Hi-Z) state to stop generating the driving signal SD1. The operational amplifier OP is enabled in response to the state signal SSX having the second voltage value to generate the driving signal SD2.

In this embodiment, the operational amplifier OP has an inverting input terminal, a non-inverting input terminal, and an output terminal. The inverting input terminal of the operational amplifier OP is used to receive the feedback signal SCS. The non-inverting input terminal of the operational amplifier OP is used to receive the reference signal SREF. The output terminal of the operational amplifier OP is coupled to the control terminal of the power switch SP. The operational amplifier OP compares the voltage value of the feedback signal SCS with the reference voltage value of the reference signal SREF. The reference voltage value of the reference signal SREF is constant. The operational amplifier OP and the power switch SP together form a voltage regulation circuit, such as a low dropout (LDO) regulation circuit. When the voltage value of the feedback signal SCS is higher than the reference voltage value of the reference signal SREF, the operational amplifier OP reduces the voltage level of the driving signal SD2. When the voltage value of the feedback signal SCS is lower than or equal to the reference voltage value of the reference signal SREF, the operational amplifier OP increases the voltage level of the driving signal SD2. Thus, the operational amplifier OP can provide a stable input capacitor discharge function. The discharge current value on the discharge loop LDIS is substantially constant.

Referring toFIG.4,FIG.4is a schematic diagram of the power conversion device according to the third embodiment of the disclosure. In this embodiment, the power conversion device300includes a power conversion circuit210and a control circuit320. The configuration of the power conversion circuit210has been clearly explained in the embodiment ofFIG.2, and therefore, will not be repeated here. In this embodiment, the control circuit320includes a first controller321and a second controller322. The second controller322detects the signal waveform at the input terminal of the power conversion device300to determine whether the power conversion circuit210receives the input AC power VAC. When the power conversion circuit210does not receive the input AC power VAC, the second controller322controls the first controller321to cause the power conversion circuit210to convert the charge stored in the input capacitor CX into the output power VOUT, so as to consume the charge stored in the input capacitor CX. Thus, the power conversion device300can discharge the charge stored in the input capacitor CX through the boost inductor LB and the output diode DO and the discharge loop LDIS of the output terminal of the power conversion device300.

Taking this embodiment as an example, the second controller322includes a detection circuit3221. The detection circuit3221is coupled to the input terminal to detect the signal waveform at the input terminal of the power conversion device300. When the waveform of the input AC power VAC is detected, the detection circuit3221generates the state signal SSX having the first voltage value. On the other hand, when the waveform of the input AC power VAC is not detected within the preset time length, the detection circuit3221generates the state signal SSX having the second voltage value. Based on the control of the second controller322, the first controller321generates the PWM signal SPWM according to the fluctuation of the feedback signal SCS and the second voltage value of the state signal SSX. The first controller321also generates the driving signal SD according to the PWM signal SPWM, and provides the driving signal SD to the control terminal of the power switch SP. The duty cycle of the driving signal SD is related to the voltage value of the feedback signal SCS. Thus, the first controller321can provide a stable input capacitor discharge function. The discharge power on the discharge loop LDIS is substantially constant.

Referring toFIG.4andFIG.5,FIG.5is a schematic diagram of the first controller according to an embodiment of the disclosure. The first controller321includes a PWM signal generator3211and a driver DRV. The PWM signal generator3211is coupled to the second controller322and the current value sensing circuit211. The PWM signal generator3211receives the state signal SSX from the detection circuit3221and the feedback signal SCS from the current value sensing circuit211. When receiving the state signal SSX having the first voltage value (low voltage value), the PWM signal generator3211generates the PWM signal SPWM according to the fluctuation of the voltage value of the feedback signal SCS. The driver DRV generates the driving signal SD according to the PWM signal SPWM. Therefore, the power conversion circuit210can provide a stable output power VOUT according to the fluctuation of the voltage value of the feedback signal SCS.

When receiving the state signal SSX having the second voltage value (for example, a preset voltage value higher than the low voltage value), the PWM signal generator3211dynamically determines the duty cycle of the PWM signal SPWM according to the fluctuation of the voltage value of the feedback signal SCS and the second voltage value of the state signal SSX. The voltage value of the feedback signal SCS at this time is related to the average current value of the current flowing through the power switch SP.

For example, the time length during which the voltage value of the feedback signal SCS is less than the second voltage value is positively correlated with the duty cycle of the PWM signal SPWM. Once the voltage value of the feedback signal SCS is less than the second voltage value, it means that the power in the boost inductor LB is insufficient. The duty cycle of the PWM signal SPWM is increased (the disclosure is not limited to the adjustment method of this embodiment). Therefore, the time length during which the power switch SP is turned on is increased to enable the boost inductor LB to accumulate sufficient power. Therefore, the first controller321can precisely adjust the duty cycle of the driving signal SD based on the fluctuation of the voltage value of the feedback signal SCS and the second voltage value of the state signal SSX. Thus, the power conversion circuit210can convert the charge stored in the input capacitor CX into a stable output power VOUT, so as to consume the charge stored in the input capacitor CX.

In some embodiments, the PWM signal generator3211may include a comparator. The comparator provides the PWM signal SPWM according to a voltage value comparison result between the voltage value of the feedback signal SCS and the second voltage value of the state signal SSX.

Referring toFIG.6,FIG.6is a schematic diagram of the power conversion device according to the fourth embodiment of the disclosure. In this embodiment, the power conversion device400includes a power conversion circuit410and a control circuit220. The power conversion circuit410includes an input capacitor CX, a rectifier circuit RC, a power switch SP, a boost inductor LB, an output diode DO, an output capacitor CO, and a current value sensing circuit411. The input capacitor CX is coupled to the input terminal of the power conversion device200. The rectifier circuit RC converts an input AC power VAC into a rectified power VR. The first terminal of the power switch SP is coupled to the rectifier circuit RC. The boost inductor LB is coupled between the rectifier circuit RC and the first terminal of the power switch SP. The second terminal of the power switch SP is coupled to the reference low voltage. The control terminal of the power switch SP is coupled to the control circuit220. The anode of the output diode DO is coupled to the first terminal of the power switch SP. The cathode of the output diode DO serves as the output terminal of the power conversion circuit210. The output capacitor CO is coupled between the cathode of the output diode DO and the reference low voltage.

The current value sensing circuit411of this embodiment is coupled in a manner different from the current value sensing circuit211shown inFIG.2. In this embodiment, the current value sensing circuit411is coupled between the low voltage terminal of the bridge rectifier FBC of the rectifier circuit and the reference low voltage. The current value sensing circuit411provides the feedback signal SCS in response to the current value of the current flowing through the power switch SP. The current value sensing circuit211includes a sensing resistor RCS. The first terminal of the sensing resistor RCS is coupled to the low voltage terminal of the bridge rectifier FBC of the rectifier circuit. The second terminal of the sensing resistor RCS is coupled to the reference low voltage. The second terminal of the sensing resistor RCS is used to provide the feedback signal SCS.

The configuration of the control circuit220in this embodiment has been clearly explained in the embodiment ofFIG.2, and therefore, will not be repeated here.

To sum up, the power conversion device and the control circuit according to the disclosure use the second controller to detect the signal waveform at the input terminal, and control the first controller in response to the signal waveform at the input terminal, so as to utilize the power switch to discharge the charge stored in the input capacitor. Thus, compared to the conventional input capacitor discharge function, the disclosure can reduce power consumption and maintain high efficiency and high power factor for the power conversion device. The disclosure discharges the charge stored in the input capacitor through the existing loop or power conversion function of the power conversion circuit. Thus, the design of the power conversion circuit does not need to be changed. In addition, the disclosure can dynamically adjust the duty cycle of the driving signal through the feedback signal. Thus, based on the duty cycle of the driving signal, the discharge current value or the discharge power for discharging the charge stored in the input capacitor is substantially constant.

Although the disclosure has been described with reference to the embodiments above, they are not intended to limit the disclosure. Those skilled in the art can make some changes and modifications without departing from the spirit and scope of the disclosure. Therefore, the protection scope of the disclosure should be determined by the appended claims.