Patent ID: 12224182

DETAILED DESCRIPTION

Examples of different light illumination systems and/or light emitting diode (“LED”) implementations will be described more fully hereinafter with reference to the accompanying drawings. These examples are not mutually exclusive, and features found in one example may be combined with features found in one or more other examples to achieve additional implementations. Accordingly, it will be understood that the examples shown in the accompanying drawings are provided for illustrative purposes only and they are not intended to limit the disclosure in any way. Like numbers refer to like elements throughout.

It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms may be used to distinguish one element from another. For example, a first element may be termed a second element and a second element may be termed a first element without departing from the scope of the present invention. As used herein, the term “and/or” may include any and all combinations of one or more of the associated listed items.

It will be understood that when an element such as a layer, region, or substrate is referred to as being “on” or extending “onto” another element, it may be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” or extending “directly onto” another element, there may be no intervening elements present. It will also be understood that when an element is referred to as being “connected” or “coupled” to another element, it may be directly connected or coupled to the other element and/or connected or coupled to the other element via one or more intervening elements. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present between the element and the other element. It will be understood that these terms are intended to encompass different orientations of the element in addition to any orientation depicted in the figures.

Relative terms such as “below,” “above,” “upper,”, “lower,” “horizontal” or “vertical” may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the figures. It will be understood that these terms are intended to encompass different orientations of the device in addition to the orientation depicted in the figures.

Further, whether the LEDs, LED arrays, electrical components and/or electronic components are housed on one, two or more electronics boards may also depend on design constraints and/or application.

Semiconductor light emitting devices (LEDs) or optical power emitting devices, such as devices that emit ultraviolet (UV) or infrared (IR) optical power, are among the most efficient light sources currently available. These devices (hereinafter “LEDs”), may include light emitting diodes, resonant cavity light emitting diodes, vertical cavity laser diodes, edge emitting lasers, or the like. Due to their compact size and lower power requirements, for example, LEDs may be attractive candidates for many different applications. For example, they may be used as light sources (e.g., flash lights and camera flashes) for hand-held battery-powered devices, such as cameras and cell phones. They may also be used, for example, for automotive lighting, heads up display (HUD) lighting, horticultural lighting, street lighting, torch for video, general illumination (e.g., home, shop, office and studio lighting, theater/stage lighting and architectural lighting), augmented reality (AR) lighting, virtual reality (VR) lighting, as back lights for displays, and IR spectroscopy. A single LED may provide light that is less bright than an incandescent light source, and, therefore, multi-junction devices or arrays of LEDs (such as monolithic LED arrays, micro LED arrays, etc.) may be used for applications where more brightness is desired or required.

FIG.1Ais a top view of an example LED array102. In the example illustrated inFIG.1A, the LED array102is an array of emitters120. LED arrays may be used for any application, such as those requiring precision control of LED array emitters. Emitters120in the LED array102may be individually addressable or may be addressable in groups/subsets.

An exploded view of a 3×3 portion of the LED array102is also shown inFIG.1A. As shown in the 3×3 portion exploded view, the LED array102may include emitters120that each have a width w1. In embodiments, the width w1may be approximately 100 μm or less (e.g., 40 μm). Lanes122between the emitters120may be a width, w2, wide. In embodiments, the width w2may be approximately 20 μm or less (e.g., 5 μm). The lanes122may provide an air gap between adjacent emitters or may contain other material. A distance d1from the center of one emitter120to the center of an adjacent emitter120may be approximately 120 μm or less (e.g., 45 μm). It will be understood that the widths and distances provided herein are examples only and that actual widths and/or dimensions may vary.

It will be understood that, although rectangular emitters arranged in a symmetric matrix are shown inFIG.1A, emitters of any shape and arrangement may be applied to the embodiments described herein. For example, the LED array102ofFIG.1Amay include over 20,000 emitters in any applicable arrangement, such as a 200×100 matrix, a symmetric matrix, a non-symmetric matrix, or the like. It will also be understood that multiple sets of emitters, matrixes, and/or boards may be arranged in any applicable format to implement the embodiments described herein.

As mentioned above, LED arrays, such as the LED array102, may include up to 20,000 or more emitters. Such arrays may have a surface area of 90 mm2or greater and may require significant power to power them, such as 60 watts or more. An LED array such as this may be referred to as a micro LED array or simply a micro LED. A micro LED may include an array of individual emitters provided on a substrate or may be a single silicon wafer or die divided into segments that form the emitters. The latter type of micro LED may be referred to as a monolithic LED.

To individually drive or control the individual LEDs in the array, a silicon backplane may be provided in close proximity to the LED array and may become extremely hot during operation. Accordingly, heat dissipation can be challenging for such devices. While some solutions are known for heat dissipation for semiconductor devices, such solutions often include structures that dissipate heat through the top of the device. Due to light-emission, however, LED arrays, such as the LED array102ofFIG.1A, may not be able to dissipate heat through the top of the device.

Additionally, LED arrays, such as the LED array102, may be used in applications, such as for vehicle headlamp systems, which may include passive elements, such as resistors and capacitors, which may form drivers, controllers and other circuits. It may be desirable to package at least some passive elements with the LED array.

Embodiments described herein may provide for a low profile LED array package that may accommodate one or more passive elements and enable dissipation of heat generated by the silicon backplane and the LED array.

FIG.1Bis a diagram of a cross-sectional view of an example LED lighting system100. In the example illustrated inFIG.1B, the LED lighting system100includes a silicon backplane104. The silicon backplane104has a top surface101, a bottom surface103and side surfaces105. The side surfaces105of the silicon backplane104are surrounded by a substrate106formed from a molding material. The substrate106has a top surface107, a bottom surface109and side surfaces190. One or more metal layers110or redistribution layers (RDL) (shown in the alternative embodiment inFIG.6E) are provided on the bottom surface103of the silicon backplane104and the bottom surface109of the substrate106. RDL117may be formed on at least a portion of the top surface101of the silicon backplane104and a top surface107of the substrate106. In the example illustrated inFIG.1B, the RDL117includes two layers116aand116bof a dielectric material116and a single metal layer112. One or more vias108may extend through the substrate106and may be filled with a metal material. The vias may thus form a continuous electrical connection between the silicon backplane104, the RDL117and the metallization/RDL110. An LED array, such as the LED array102ofFIG.1A, may be provided on the top surface101of the silicon backplane104and electrically coupled thereto via an array of metal connectors (not shown inFIG.1B). In embodiments, electronic components114may be provided on the RDL117and electrically coupled to the LED lighting system100via the metal layer112.

The LED array102may be a micro LED, such as described above with respect toFIG.1A. The LED array102may have a depth d1. In embodiments, the depth d1may be, for example, between 5 and 250 μm.

The silicon backplane104may include the circuitry and connectors that make individually addressable connections to the emitters in the LED array102. In embodiments, the silicon backplane may be a complementary metal-oxide semiconductor (CMOS) integrated circuit, which, in embodiments, may be an application specific integrated circuit (ASIC). The silicon backplane104may have a depth d3. In embodiments, the depth d3may be, for example, between 100 μm and 1 mm.

A structure made up of the silicon backplane104, the substrate106, the metallization/RDL110, the RDL117and the vias108may have a depth d2. In embodiments, the depth d2may be, for example, between 100 μm and 1 mm. Since the silicon backplane104is integrated into the substrate, and the LED array102is provided on top of the silicon backplane104, the LED lighting system100may have a lower profile relative to systems that vertically stack one or more of these elements.

In the example illustrated inFIG.1B, the RDL117includes two layers116aand116bof the dielectric material116and a single metal layer112. The first layer116aof the two layers of the dielectric material116may be on the top surface107of the substrate106and at least a portion of the top surface101of the silicon backplane104. The metal layer112may be patterned on the first layer116aof the dielectric material116, such as by copper plating and copper etching. The second layer116bof the dielectric material116may be on top of the patterned metal layer112and exposed portions of the first layer116aof the dielectric material116. Although RDL consisting of two layers of dielectric material and a single layer of metal are shown inFIG.1B, one of ordinary skill in the art will recognize that the RDL117may include more or less layers of the dielectric material and/or more metal layers, depending on design constraints. The dielectric material116may be any suitable dielectric material. In embodiments, the dielectric material may be a polymer dielectric material, such as polyimide.

The RDL117may extend from a perimeter region of the silicon backplane104towards the side surfaces190of the substrate106. This may both accommodate the LED array102attached to the top surface101of the silicon backplane104in a central region and help with heat dissipation by containing the dielectric materials that may further insulate the LED lighting system100to areas away from the highest heat areas in the center of the LED lighting system100. The metal layer112may have portions that are exposed from the dielectric material116to form bond pads. The metal layer112may include portions that extend between the perimeter region of the silicon backplane104and the bond pads to create a continuous electrical connection therebetween. The bond pads may be electrically coupled to the vias108to create a continuous electrical connection between top and bottom surfaces of the LED lighting system100. The bond pads may be placed in the perimeter region of the substrate or spaced apart from but closer to the array (as shown inFIG.10, for example).

The metallization/RDL110may be formed in a number of different ways. In the example illustrated inFIG.1B, the metallization/RDL110is a metal layer including a first portion that is electrically and thermally coupled to the bottom surface103of the silicon backplane104in a central region and second portions that fan out from a perimeter region of the silicon backplane104toward the side surfaces190of the substrate106. The first portion and the second portions may be electrically insulated from one another in embodiments. Although not visible inFIG.1B, the second portions may extend from the silicon backplane104and join with individual vias108at bond pads, electrically coupling the silicon backplane104to the metal layer112on the top surface. Both the first and second portions of the metal layer110may be coupled to an external circuit board (not shown), such as by soldering. This may enable a direct connection between the LED lighting system100and the external circuit board, which provides improved heat sinking through the bottom of the LED lighting system. Additionally, this structure may enable communication between the silicon backplane104, the LED array102, the passive components114on the substrate106and any electronic components on the external circuit board.

In another example, which will be described in more detail later with respect toFIGS.6E and7, the metallization/RDL110may be a combination of a metal layer and RDL. As with the embodiment illustrated inFIG.1B, a metal layer may be electrically and thermally coupled to the bottom surface103of the silicon backplane104in a central region. The fanout, however, may be accomplished using RDL instead of the metal layer. In such embodiments, the LED lighting device100may have RDL on both the top and bottom surfaces.

In both cases, the metallization/RDL110may be a thin structure compared to conventional silicon device packages and may include considerably less dielectric material than conventional silicon device packages. For example, the metal layer100in the embodiment shown inFIG.1Bmay be a single metal layer, and the RDL may include as few dielectric layers as possible. This may increase the efficiency of the heat dissipation in such packages and enable packaging for micro-LEDs and CMOS backplanes that may emit substantial heat.

In the LED lighting system100illustrated inFIG.1B, the top surface101of the silicon backplane104and the top surface107of the substrate106are co-planar. Similarly, the bottom surface103of the silicon backplane104and the bottom surface109of the substrate106are co-planar. This arrangement may allow for the slimmest possible packaging and ease of manufacture. However, one of ordinary skill in the art will recognize that because the substrate106is molded, the substrate106may take any shape, such as, for example, where the substrate has a top surface107that is higher than the top surface101of the silicon backplane104to further distance the electronic components114from the high heat regions of the LED lighting system100. Thus, in embodiments, these surfaces may not be co-planar.

FIG.1Cis a top view showing a top surface130of the example LED lighting system100ofFIG.1B. In the example illustrated inFIG.1C, the top surface130of the LED lighting system includes the top-most layer116bof the dielectric material116in the RDL117. Electronic components114are electrically coupled to the metal112in the RDL and exposed from the dielectric material116. In embodiments, an electronic component114may not be electrically coupled to all regions of the metal112and, thus, the top surface130may, in embodiments, also include some regions of the metal112exposed from the dielectric material116. A top surface of at least a portion of the silicon backplane104is shown inFIG.10and includes the portion of the top surface of the silicon backplane104that is not covered by the LED array102or the dielectric material116. A top surface of the LED array102is also shown mounted on the top surface of the silicon backplane104.

As shown inFIG.10, the LED lighting system100has a length l1and a width w1. In embodiments, the length l1may be approximately 20 mm and the width w1may be approximately 15 mm. The silicon backplane104may have a length l2and a width w2. In embodiments, the length l2may be approximately 15.5 mm and the width w2may be approximately 6.5 mm. The LED array102may have a length l3and a width w3. In embodiments, the length l3may be approximately 11 mm and the width w3may be approximately 4.4 mm.

Given these example dimensions, an LED array package may be provided that has a relatively large surface area (300 mm2in the above example) with a relatively large amount of the surface area not taken up by the LED array (which has a surface area of approximately 100 mm2in the above example). Accordingly, this design provides ample space for attachment of electronic components on the LED array package.

FIG.1Dis a bottom view showing a bottom surface140of the example LED lighting system100ofFIG.1B. In the example illustrated inFIG.1D, the bottom surface140includes regions of the substrate106and regions of the metal110or solder pads coupled thereto that are exposed from the molding material106. In embodiments, some regions of the substrate may be covered by metallization and/or portions of the RDL that interconnect the silicon backplane and the bond pads, although these are not shown inFIG.1D. In some embodiments, the interconnecting metal regions and/or RDL may be covered by a dielectric material or other encapsulating or protective material (not shown inFIG.1D).

FIG.2is a cross-sectional view of an application system200that incorporates the LED lighting system100ofFIG.1B. The application system200may include a circuit board150that has a number of bond pads152. In the example illustrated inFIG.2, exposed metal regions/bond pads of the RDL/metallization110of the LED lighting system100are bonded directly to the bond pads152of the circuit board150. As mentioned above, the direct bond between the metal layer110on the bottom surface of the silicon backplane104and the circuit board150enables efficient heat transfer from the LED lighting system100to the circuit board150for heat sinking purposes without need for additional heat dissipating structures over the top of the LED lighting system100(or elsewhere) that may, for example, otherwise block light emission from the LED array102. The circuit board150may be part of a larger system used in specific applications, such as vehicle lighting or flash applications (example vehicle lighting systems are described below with respect toFIGS.3and4). In such systems, some of the passive components used in the application may be the components114and may be provided directly on the LED lighting system100before attachment to the circuit board150. The circuit board150may include other circuit elements required for the larger system in addition to a heat sink. The RDL117, the RDL/metallization110and the vias108may provide a continuous electrical connection between the components114, the silicon backplane104and the circuit board150.

FIG.3is a diagram of an example vehicle headlamp system300that may incorporate the LED lighting system100ofFIG.1B. The example vehicle headlamp system300illustrated inFIG.3includes power lines302, a data bus304, an input filter and protection module306, a bus transceiver308, a sensor module310, an LED direct current to direct current (DC/DC) module312, a logic low-dropout (LDO) module314, a micro-controller316and an active head lamp318. In embodiments, the active head lamp318may include an LED lighting system, such as the LED lighting system100ofFIG.1B. As mentioned above, the LED lighting system100provides ample space and bond pads on the top surface of the substrate such that one, more, or all of the modules illustrated inFIG.3may be accommodated on the top surface of the LED lighting system100. Modules not provided on the top surface of the LED lighting system100may be provided on the circuit board150(as shown inFIG.2). In some embodiments, some electronic components of some or all of the modules in the vehicle lighting system300may be accommodated on the top surface of the LED lighting system100and some may be provided on the circuit board150(shown inFIG.2).

The power lines302may have inputs that receive power from a vehicle, and the data bus304may have inputs/outputs over which data may be exchanged between the vehicle and the vehicle headlamp system300. For example, the vehicle headlamp system300may receive instructions from other locations in the vehicle, such as instructions to turn on turn signaling or turn on headlamps, and may send feedback to other locations in the vehicle if desired. The sensor module310may be communicatively coupled to the data bus304and may provide additional data to the vehicle headlamp system300or other locations in the vehicle related to, for example, environmental conditions (e.g., time of day, rain, fog, or ambient light levels), vehicle state (e.g., parked, in-motion, speed of motion, or direction of motion), and presence/position of other objects (e.g., vehicles or pedestrians). A headlamp controller that is separate from any vehicle controller communicatively coupled to the vehicle data bus may also be included in the vehicle headlamp system300. InFIG.3, the headlamp controller may be a micro-controller, such as micro-controller (pc)316. The micro-controller316may be communicatively coupled to the data bus304.

The input filter and protection module306may be electrically coupled to the power lines302and may, for example, support various filters to reduce conducted emissions and provide power immunity. Additionally, the input filter and protection module306may provide electrostatic discharge (ESD) protection, load-dump protection, alternator field decay protection, and/or reverse polarity protection.

The LED DC/DC module312may be coupled between the filter and protection module306and the active headlamp318to receive filtered power and provide a drive current to power LEDs in the LED array in the active headlamp318. The LED DC/DC module312may have an input voltage between 7 and 18 volts with a nominal voltage of approximately 13.2 volts and an output voltage that may be slightly higher (e.g., 0.3 volts) than a maximum voltage for the LED array (e.g., as determined by factor or local calibration and operating condition adjustments due to load, temperature or other factors).

The logic LDO module314may be coupled to the input filter and protection module306to receive the filtered power. The logic LDO module314may also be coupled to the micro-controller314and the active headlamp318to provide power to the micro-controller314and/or the silicon backplane (e.g., CMOS logic) in the active headlamp318.

The bus transceiver308may have, for example, a universal asynchronous receiver transmitter (UART) or serial peripheral interface (SPI) interface and may be coupled to the micro-controller316. The micro-controller316may translate vehicle input based on, or including, data from the sensor module310. The translated vehicle input may include a video signal that is transferrable to an image buffer in the active headlamp module318. In addition, the micro-controller316may load default image frames and test for open/short pixels during startup. In embodiments, an SPI interface may load an image buffer in CMOS. Image frames may be full frame, differential or partial frames. Other features of micro-controller316may include control interface monitoring of CMOS status, including die temperature, as well as logic LDO output. In embodiments, LED DC/DC output may be dynamically controlled to minimize headroom. In addition to providing image frame data, other headlamp functions, such as complementary use in conjunction with side marker or turn signal lights, and/or activation of daytime running lights, may also be controlled.

FIG.4is a diagram of another example vehicle headlamp system400. The example vehicle headlamp system400illustrated inFIG.4includes an application platform402, two LED lighting systems406and408, and optics410and412. The two LED lighting systems406and408may be LED lighting systems, such as the LED lighting system100ofFIG.1B, or may include the LED lighting system100plus some of all of the other modules in the vehicle headlamp system300ofFIG.3. In the latter embodiment, the LED lighting systems406and408may be vehicle headlamp sub-systems.

The LED lighting system408may emit light beams414(shown between arrows414aand414binFIG.4). The LED lighting system406may emit light beams416(shown between arrows416aand416binFIG.4). In the embodiment shown inFIG.4, a secondary optic410is adjacent the LED lighting system408, and the light emitted from the LED lighting system408passes through the secondary optic410. Similarly, a secondary optic412is adjacent the LED lighting system412, and the light emitted from the LED lighting system412passes through the secondary optic412. In alternative embodiments, no secondary optics410/412are provided in the vehicle headlamp system.

Where included, the secondary optics410/412may be or include one or more light guides. The one or more light guides may be edge lit or may have an interior opening that defines an interior edge of the light guide. LED lighting systems408and406(or the active headlamp of a vehicle headlamp sub-system) may be inserted in the interior openings of the one or more light guides such that they inject light into the interior edge (interior opening light guide) or exterior edge (edge lit light guide) of the one or more light guides. In embodiments, the one or more light guides may shape the light emitted by the LED lighting systems408and406in a desired manner, such as, for example, with a gradient, a chamfered distribution, a narrow distribution, a wide distribution, or an angular distribution.

The application platform402may provide power and/or data to the LED lighting systems406and/or408via lines404, which may include one or more or a portion of the power lines302and the data bus304ofFIG.3. One or more sensors (which may be the sensors in the system300or other additional sensors) may be internal or external to the housing of the application platform402. Alternatively or in addition, as shown in the example LED lighting system300ofFIG.3, each LED lighting system408and406may include its own sensor module, connectivity and control module, power module, and/or LED array.

In embodiments, the vehicle headlamp system400may represent an automobile with steerable light beams where LEDs may be selectively activated to provide steerable light. For example, an array of LEDs (e.g., the LED array102) may be used to define or project a shape or pattern or illuminate only selected sections of a roadway. In an example embodiment, infrared cameras or detector pixels within LED systems406and408may be sensors (e.g., similar to sensors in the sensor module310ofFIG.3) that identify portions of a scene (e.g., roadway or pedestrian crossing) that require illumination.

FIG.5is a flow diagram of an example method500of manufacturing an LED lighting system, such as the LED lighting system100ofFIG.1B.FIGS.6A,6B,6C,6D,6E,6F,6G,6H,6I and6Jare cross-sectional views of the LED lighting system at various stages in the manufacturing method. In embodiments, the method500may produce a panel level packaged high-density LED lighting system.

In the example method500ofFIG.5, the silicon backplane may be attached to a first carrier (502) to form a first structure. In embodiments, the silicon backplane may be attached to a temporary (e.g., plastic) carrier via an adhesive material, such as a tape or temporary adhesive. An example600A of the first structure is illustrated inFIG.6Aand includes the silicon backplane104, the first carrier602and the optional adhesive material604.

The silicon backplane, attached to the first carrier, may be molded (504) to form a second structure. An example600B of the second structure is illustrated inFIG.6Band includes the first structure600A ofFIG.6Awith the molding material surrounding sides of the silicon backplane104. The molding material forms a substrate106with an embedded silicon backplane104. In embodiments, a mold may be placed over the structure600A, filled with the molding material and cured. Any excess molding material may be removed from the top surface of the silicon backplane if needed. In embodiments, the molding may be panel level molding, the molding material may be a polymer material, and the second structure600B may be a plastic substrate with an embedded silicon backplane on a temporary substrate.

One or more vias may be formed through the substrate (506) to form a third structure. In embodiments, the one or more vias may be formed using lasers or drills. An example600C of the third structure is illustrated inFIG.6Cand includes the silicon backplane104embedded in the substrate106with two vias108formed therethrough. At this stage, the silicon backplane104and substrate106with vias108may remain attached to the first temporary carrier602. The vias108may be filled with a metal material.

At least one metal layer may be formed on one surface of the silicon backplane and the substrate (508). This may be done in a number of different ways.

In some embodiments, a metal layer may be patterned or plated on the one surface of the silicon backplane and substrate to form a fourth structure.FIG.6Dillustrates an example600D of the fourth structure, which includes the third structure with the metal layer110. As can be seen inFIG.6D, the metal layer110forms bond pads over the vias and regions that extend from a perimeter region of the silicon backplane104. A metal layer is also provided on a central region of the one surface of the silicon backplane104. The bottom view of the LED lighting system100illustrated inFIG.1Dshows an example of this.

In other embodiments, a metal layer may be formed on the one surface of the silicon backplane in a central region, and redistribution layers may be formed on the one surface of the silicon backplane and substrate adjacent the single metal layer to form a fifth structure.FIG.6Eillustrates an example600E of the fifth structure, which includes the third structure with the single metal layer618and the redistribution layers616. In the example illustrated inFIG.6E, the redistribution layers616include layers of a dielectric material614and metal layers612. While three metal layers are shown inFIG.6E, one, two, or more than three metal layers may be used if needed due to design constraints. The redistribution layers may be formed, for example, by alternating deposition of layers of the dielectric material, selective removal of portions of the dielectric material (if needed), and patterning a layer of metal on top. As can be seen inFIG.6E, the metal layers612begin in a perimeter region of the one surface of the silicon backplane and extend toward the side surfaces of the substrate. The metal layers612are electrically coupled between the silicon backplane104and the vias. A portion of the metal layers612is exposed from the dielectric material614to form a solder pad or separate solder pads may be formed on the outer-most surface of the outer-most dielectric layer.

FIG.7is a bottom view representing a bottom surface700of the LED lighting system ofFIG.6E. The line702represents the outer-most perimeter of the substrate. The line104represents the outer-most perimeter of a region occupied by the silicon backplane104relative to the outer-most perimeter of the substrate. The dashed line704denotes a border of a region between the line704and the outer-most perimeter of the silicon backplane104, which may be referred to herein as the perimeter region of the silicon backplane104. The metal layers612of the redistribution layers616may begin in the perimeter region and extend toward the side surfaces of the substrate (delineated by the line702). There is a gap between the border704of the perimeter region of the silicon backplane and the single metal layer618formed on the one surface of the silicon backplane. This gap may be filled with the dielectric material, for example, as reflected inFIG.6E.

The structure formed as a result of508(e.g., the fourth or fifth structure) may be flipped and attached to a second carrier (510) to form a sixth structure. In embodiments, the structure (e.g., fourth or fifth structure) may be attached to a temporary (e.g., plastic) carrier via an adhesive material, such as a tape or temporary adhesive. The structure may be placed with the at least one metal layer adjacent the second carrier. An example600G of the sixth structure is illustrated inFIG.6Gand includes the second carrier608and the optional adhesive material606. Once the structure is attached to the second carrier, the first carrier may be removed (512) to form a seventh structure. An example600G of the seventh structure is shown inFIG.6G.

Redistribution layers and an array of metal connectors may be formed on the surface exposed by removal of the second carrier (514) to form an eighth structure. In embodiments, the array of metal connectors may be formed by plating or otherwise patterning or forming an array of copper pillar bumps on the surface. An example600H of the eighth structure is illustrated inFIG.6Hand includes the metal connectors640and the redistribution layers117, including the at least one metal layer112and the dielectric material116. As described above with respect toFIG.6E, the redistribution layers may be formed by alternating deposition of layers of the dielectric material, selective removal of portions of the dielectric material (if needed), and patterning a layer of metal on top. In embodiments, over 20,000 (e.g., approximately 28,000) metal connectors may be formed on the surface.

An LED array may be attached to the silicon backplane via the electrical connectors (516) to form a ninth structure. In embodiments, this may be performed by aligning the silicon backplane with the electrical connectors and heating to reflow the solder copper material in the copper pillar bumps. The reflow may create an underfill under the LED array. In embodiments, the LED array may be a monolithic LED array. An example600I of the ninth structure is illustrated inFIG.6Iand includes the LED array102and the underfill.

The LED array may undergo a laser liftoff (LLO) process and phosphor integration (518). Any passive components may be mounted on the exposed metal regions in the redistribution layers117to form a tenth structure. An example600J of the tenth structure is illustrated inFIG.600Jand includes the LED array102with the phosphor material610and passive components114.

Optionally, the tenth structure, which may be an LED lighting system such as the LED lighting system100ofFIG.1B, may be mounted on an external circuit board (520) so as to, for example, incorporate the LED lighting system100into a vehicle headlamp or other application system.

Having described the embodiments in detail, those skilled in the art will appreciate that, given the present description, modifications may be made to the embodiments described herein without departing from the spirit of the inventive concept. Therefore, it is not intended that the scope of the invention be limited to the specific embodiments illustrated and described.