Patent ID: 12203979

DETAILED DESCRIPTION

Reference will now be made in detail to various embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention will be described in conjunction with these embodiments, it is understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the invention, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, it will be recognized by one of ordinary skill in the art that the invention may be practiced without these specific details. In other instances, well known methods, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure aspects of the invention.

Some portions of the detailed descriptions which follow (e.g., methods600,900) are presented in terms of procedures, steps, logic blocks, processing, and other symbolic representations of operations on data bits that may be performed on computer memory. These descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. A procedure, computer executed step, logic block, process, etc., is here, and generally, conceived to be a self-consistent sequence of steps or instructions leading to a desired result. The steps are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated in a computer system. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, data, or the like.

It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise as apparent from the following discussions, it is appreciated that throughout the present invention, discussions utilizing terms such as “disposing” or “receiving” or “performing” or “testing” or “heating” or “cooling” or “maintaining temperature” or “bringing” or “capturing” or “storing” or “reading” or “analyzing” or “generating” or “resolving” or “accepting” or “selecting” or “determining” or “displaying” or “presenting” or “computing” or “sending” or “receiving” or “reducing” or “detecting” or “setting” or “accessing” or “placing” or “forming” or “mounting” or “removing” or “ceasing” or “stopping” or “coating” or “processing” or “generating” or “adjusting” or “creating” or “executing” or “continuing” or “indexing” or “translating” or “calculating” or “measuring” or “gathering” or “running” or the like, refer to the action and processes of, or under the control of, a computer system, or similar electronic computing device, that manipulates and transforms data represented as physical (electronic) quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system memories or registers or other such information storage, transmission or display devices.

The meaning of “non-transitory computer-readable medium” should be construed to exclude only those types of transitory computer-readable media which were found to fall outside the scope of patentable subject matter under 35 U.S.C. § 101 inIn re Nuijten,500 F.3d 1346, 1356-57 (Fed. Cir. 2007). The use of this term is to be understood to remove only propagating transitory signals per se from the claim scope and does not relinquish rights to all standard computer-readable media that are not only propagating transitory signals per se.

The following description of exemplary embodiments of the present invention is generally presented with respect to an advanced thermal interposer device or ATI. However, embodiments in accordance with the present invention are not limited to use with or on ATIs. Rather, embodiments in accordance with the present invention are well suited to any thermal control application.

Multi-Input Multi-Zone Thermal Control for Device Testing

FIG.1Aillustrates an exemplary block diagram of elements of an automated test system environment100that may serve as a platform for embodiments in accordance with the present invention. Test system100comprises a device under test (DUT)110, for example, an integrated circuit device, a system in a package (SIP), and/or a multi-chip module (MCM). The device under test is typically packaged, but that is not required. A socket105is coupled to device under test110, e.g., utilizing package leads on the DUT110, to send and receive test signals and power to device under test110. Socket105is typically coupled to, and tests, a single device under test110at a time, although that is not required. Socket105may be mounted to, or coupled to, a load board (not shown) for electrically coupling the socket105to a test controller, e.g., for electrical testing of DUT110.

In accordance with embodiments of the present invention, a novel active thermal interposer device120is coupled to the backside or top of device under test110. Active thermal interposer device120may be customized for a specific design of device under test110, in some embodiments. In some embodiments, there may be a thermal interface material122between active thermal interposer device120and device under test110. Such a thermal interface material, if present, is designed to improve thermal coupling between active thermal interposer device120and device under test110.

Active thermal interposer device120is further coupled to a cold plate130. In some embodiments, there may be a thermal interface material124between active thermal interposer device120and cold plate130. Such a thermal interface material, if present, is designed to improve thermal coupling between active thermal interposer device120and cold plate130.

In an embodiment, a cooling fluid, e.g., comprising glycol, although other fluids, including air, may be used, is generally circulated through cold plate130. To adjust the temperature of the cold plate130, the temperature of the cooling fluid may be adjusted, in some embodiments. In some embodiments, as illustrated inFIG.1A, the flow of the cooling fluid may also be adjusted, e.g., increased, reduced, started, and/or stopped. As illustrated, chiller135cools the cooling fluid, e.g., to −60 degrees C. The cooling fluid flows137to valve132. Valve132, under the control of thermal controller145via control signal146, regulates the flow133of cooling fluid to cold plate130, based on one or more temperature measurements134. After cycling through cold plate130, the cooling fluid is returned136to the chiller135. Cold plate130may also be air or gas cooled, in some embodiments.

In some embodiments, cold plate130may comprise an evaporator and/or phase change cooling system. In such embodiments, chiller135may comprise a compressor and/or radiator, for example. In some embodiments, changes to a duty cycle of a phase change cooling system may be utilized to adjust an amount of heat extracted from cold plate130.

Active thermal interposer device120functions to apply heat energy to one or more temperature regions of device under test110. For example, each die of a multi-chip module device under test may be individually temperature controlled. To accomplish such heating, active thermal interposer device120comprises one or more heating elements, as further described below. The heating elements of active thermal interposer device120define the temperature regions of device under test110. In some embodiments, the heating elements may comprise resistive traces on a ceramic substrate. In some embodiments, the heating elements may comprise cooling elements, e.g., Peltier devices or other forms of thermoelectric coolers (TEC), capable of cooling as well. However, any suitable heating and/or cooling technology, in any combination, is well suited to embodiments in accordance with the present invention. Active thermal interposer device120also functions to couple heat energy from device under test110to cold plate130and/or to cooling elements within active thermal interposer device120, in some embodiments.

Active thermal interposer device120further comprises one or more temperature measurement devices, e.g., resistance temperature detectors and/or thermocouples. The one or more temperature measurement devices are configured to measure a temperature of a region of device under test110. The one or more temperature measurement devices may be located within or in close proximity to the heating elements of active thermal interposer device120. In some embodiments, active thermal interposer device120may comprise temperature measurement devices characterized as not within or in close proximity to the heating elements of active thermal interposer device120. In some embodiments, a load board may comprise temperature measurement devices. Each of the one or more temperature measurement devices sends a temperature signal121to thermal controller145. Socket105, device under test110, active thermal interposer device120, and cold plate130may be collectively known as or referred to as a test stack when coupled together as illustrated inFIG.1A.

Test system100further comprises a thermal controller145. Thermal controller145sends control signals1477to power supply140to supply electrical power141to one or more heating elements of active thermal interposer device120. Each heating element of active thermal interposer device120may be individually controlled. Accordingly, there are typically more power signals141than illustrated. There may be more than one power supply, in some embodiments. Based on temperature signal121from one or more of the plurality of temperature measurement devices, thermal controller may control power supply140to change the power supplied to a heating element. Power supply140may change a voltage level and/or pulse width modulate a voltage supplied to a heating element, in some embodiments. Thermal controller145also controls the amount of heat energy extracted136from cold plate130. For example, thermal controller145controls the temperature of cold plate130. Thermal controller145controls value132based on temperature signal121.

It is to be appreciated that cold plate130extracts heat, through active thermal interposer device120, from substantially all of device under test110. In addition, cold plate130typically has a large thermal mass, and does not change temperature quickly. Accordingly, heating elements of active thermal interposer device120may often be required to overcome the cooling effect of cold plate130, during DUT testing, for example. In some embodiments, different regions of a device under test110may be heated and/or cooled to different temperatures. For example, one region of device under test110may be heated to 100 degrees C., e.g., via a heater within active thermal interposer device120, while another region of device under test110may be allowed to cool toward the temperature of cold plate130with no heat applied to such region by active thermal interposer device120. Such differential heating and/or cooling of different regions of device under test110may produce a thermal gradient across or between regions of device under test110, in some embodiments.

It is appreciated that active thermal interposer device120is a separate device from cold plate device130and socket device105. Active thermal interposer device120is typically customized for a particular device under test and/or socket combination, but that is not required. In this novel manner, since the active thermal interposer device is a stand alone device, different active thermal interposer devices may be utilized with standard cold plates and/or a variety of sockets in various combination to test a variety of devices. For example, a functionally similar multi-chip module may have multiple versions with similar or identical pin layouts but a different physical arrangement of chips. Testing of such a family could be performed with the same socket with different active thermal interposer devices to account for a different physical arrangement of chips.

FIG.1Billustrates a perspective view of an exemplary test system150, in accordance with embodiments of the present invention. Test system150comprises a plurality of test sleds, for example, exemplary test sled156. Test sled156comprises a plurality, e.g., six, cold plates130. Test sled156is configured to accept a test board drawer153, which may be inserted into the main body of test sled156. Test board drawer153comprises a test board152. Test board152comprises a plurality, e.g., six, of stacks154. Each of stacks154comprises a socket105, a device under test110and an active thermal interposer device120. Stack154may also include thermal interface materials122and/or124, in some embodiments. Test sled156further comprises power distribution, and couplings to power, electrical test signals, and cooling fluids. Test sled156is configured to couple the plurality of cold plates to the stacks154when test board drawer153is inserted into the test sled156. It is appreciated that the perspective of a test stack as illustrated inFIG.1Bis reversed with respect to the test stack as illustrated inFIG.1A. For example, the cold plate130is on the top inFIG.1B, while the cold plate130is illustrated on the bottom inFIG.1A.

A plurality of test sleds156, e.g.,12, is configured to be placed in trolley158, for insertion into a test rack159. When inserted into test rack159, the necessary electrical power, test signals, and cooling are supplied to each test stack comprising a cold plate130, an active thermal interposer device120, a device under test110and a socket105to be asynchronously tested by test system150. In this novel manner, up to, for example, 72, devices may be heated and/or cooled, and electrically tested at the same time in a single test system150.

FIG.1Cillustrates an exemplary testing system170including the robotic mechanisms for automatically picking and placing a DUT into the socket and also for picking an active thermal interposer device and placing it into the socket with the DUT, in accordance with embodiments of the present invention. After placement into the socket, the DUT and the active thermal interposer device are passed to a thermal head. For example, the thermal head comprises a cold plate, e.g., cold plate130. In one embodiment, the thermal head contains 12 slots; each slot containing 6 sockets, therefore 72 DUTs with corresponding active thermal interposer devices can be tested simultaneously. After testing, the active thermal interposer devices may be reused to test other DUTs. Within the thermal head is contained the cold plates which come into contact with the active thermal interposer device during testing.

Within embodiments of the present invention, the active thermal interposer device is known as or referred to as a “stand alone” device because it is not permanently attached to any other device within the testing system, as with the prior art testing systems and environments. In other words, the active thermal interposer device, being custom designed for the DUT, is actively picked and placed, as a stand alone part, and inserted into the socket as described above. Therefore, in order to redesign the testing system for use with another type of DUT, only the active thermal interposer device, the DUT and the socket need to be redesigned, while the remainder of the testing system, including a cold plate, may be reused.

RegardingFIG.1C, a first pick and place arm171retrieves a device under test, e.g., DUT110ofFIG.1A, from a tray of DUTs173, and places it into a socket, e.g., socket105(FIG.1A) on a test board176. The test board176may correspond to test board152ofFIG.1B. A second pick and place arm172retrieves an active thermal interposer device, e.g., active thermal interposer device120ofFIG.1A, from a tray of active thermal interposer devices174, and places the active thermal interposer device on top of the DUT, which is already on test board176. The pick and place arms171,172may grasp the DUT and/or active thermal interposer device via any suitable means, including, for example, by grasping on sides and/or above and below, and/or via vacuum suction, in some embodiments.

FIG.2illustrates an exemplary block diagram of a novel active thermal interposer device200, in accordance with embodiments of the present invention. Active thermal interposer device200comprises a frame205upon which other elements may be attached or mounted. Frame205may comprise any suitable materials, for example, thermoplastics. Frame205comprises tabs235. Tabs235are configured for handling and/or manipulation of active thermal interposer device200, for example, by automated grasping equipment and/or pick and place equipment. A plurality of contact pads240may be located on tabs235for making electrical contact to active thermal interposer device200. For example, contact pads240may be configured to mechanically and electrically couple with pogo pins (not shown) to couple electrical power and/or thermal sensor signals to/from active thermal interposer device200. In some embodiments, the contact pads240may comprise pads of different sizes and/or shapes, for example, to correspond to different current capacities. In accordance with embodiments of the present invention, the ambient atmosphere near any pogo pins should be kept above the dew point in order to minimize and/or reduce condensation, which may have a deleterious effect on contact reliability. In accordance with embodiments of the present invention, active thermal interposer device200may comprise one or more compressed dry air (CDA) ports260, which may be coupled to a source of dry air, and utilized to inject dry air into the test stack in order to prevent condensation. Active thermal interposer device200may comprise an insulative cover (not shown) to help prevent condensation, in some embodiments.

Active thermal interposer device200may comprise latches255, in some embodiments. Latches255are configured to securely couple a device under test (not shown) to the active thermal interposer device200. For example, latches255may extend over a device under test and/or its socket, and lock it into place. Active thermal interposer device200may comprise alignment features250, in some embodiments. Alignment features250may comprise fiducial alignment markings and/or receptacles, for example, micro-alignment bushings, e.g., alignment pin sockets251, to assist and/or ensure alignment of active thermal interposer device200into a test stack, as described with respect toFIG.1A.

In accordance with embodiments of the present invention, the socket, e.g., socket105ofFIG.1A, and/or active thermal interposer device200comprise features to prevent the active thermal interposer device200from making undesired electrical contact with electrical contacts of the socket if a device under test is not present. Such undesired contact may lead to detrimental voltages and/or currents from the active thermal interposer device200coupled into test equipment via the socket and/or physical damage to socket contacts. Locating contact pads240outside of a footprint of a DUT, e.g., outside of a socket, may help to prevent such undesired contact, in some embodiments.

In some embodiments, active thermal interposer device200may comprise a barcode245, e.g., for identification purposes. Barcode245may comprise any suitable encoding, including two-dimensional barcodes, in accordance with embodiments of the present invention. Barcode245may uniquely identify a particular active thermal interposer device200, in some embodiments. Uniquely identifying a particular active thermal interposer device200may allow calibration information for the particular active thermal interposer device200to be retried from a database and utilized during testing with the particular active thermal interposer device200, in some embodiments. In some embodiments, barcode245may be utilized to record and track which particular active thermal interposer device200is used for testing with a particular socket, e.g., socket105ofFIG.1A, and/or is used for testing a particular device under test, e.g., DUT110ofFIG.1A.

In some embodiments, barcode245may encode calibration parameters, e.g., for thermal sensors, corresponding to a particular active thermal interposer device200. For example, such encoding may eliminate a need to access a database to retrieve such information. Barcode245may be utilized to ensure that a correct active thermal interposer device200is selected, installed, and/or used for a particular test. For example, barcode245may be utilized to authorize and/or authenticate a particular active thermal interposer device for use in particular equipment and/or for use in a particular test. Barcode245may be read when an active thermal interposer device is picked up for placement, e.g., from a storage location, and/or when placed in a test stack. In some embodiments, the information encoded on barcode245may be encrypted. For example, information may be encrypted and then encoded by a standard barcode encoding.

Active thermal interposer device200may comprise a plurality of active thermal regions or zones210,215,220,225,230, in some embodiments. In some embodiments, there may be a single thermal region. Each thermal region may correspond to a region of a device under test. For example, active thermal region210may correspond to a large die of a multi-chip module, which active thermal regions215,220,225, and230correspond to other and/or smaller chips of the multi-chip module. In some embodiments, multiple thermal regions may correspond to a single die or chip.

Each of active thermal regions215,220,225, and230are configured to selectively apply thermal energy to a device under test, e.g., DUT110ofFIG.1A. The active thermal regions215,220,225, and230are also configured to selectively extract thermal energy from a device under test. The extraction of thermal energy may be via a coupling to a cold plate, e.g., cold plate130ofFIG.1A, and/or via a Peltier device within the active thermal regions215,220,225, and230. Each active thermal region may be independently controlled to a different temperature.

FIG.3illustrates an exemplary block diagram cross sectional view of a novel active thermal interposer device300, in accordance with embodiments of the present invention. In the embodiment ofFIG.3, a device under test110is illustrated at the top of the active thermal interposer device300. Device under test110is included for illustration, and is not a part of active thermal interposer device300. Active thermal interposer device300comprises a heating element layer350, mounted to or on an active thermal interposer device base305. Heating element layer350comprises a plurality of heating elements configured to apply heat energy to device under test110. The heating elements may comprise resistive traces or other suitable types of heaters. Active thermal interposer device300may also comprise cooling elements, e.g., Peltier devices, within heating element layer350, in some embodiments. The plurality of heating and/or cooling elements are coupled to a plurality of electrical signals355, for providing controlled power to the heating and/or cooling elements. Heating element layer350may include low resistance traces, e.g., from electrical signals355to the actual heating elements, in some embodiments. Heating element layer350also comprises one or more temperature measurement devices, e.g., thermocouples, (not shown), which are coupled to control elements via temperature a plurality of sense signals352.

In accordance with embodiments of the present invention, active thermal interposer device300may comprise a novel electromagnetic interference (EMI) shield layer320. Each of the plurality of heating elements in layer350may utilize currents of many tens of amperes, e.g., to generate heating of hundreds of watts during testing of a DUT. In accordance with embodiments of the present invention that utilize switching such currents to control temperature, e.g., pulse width modulation, such switching may induce unwanted electromagnetic noise signals that are deleterious to the operation and/or test of integrated circuits, e.g., device under test110ofFIG.1A, coupled to the active thermal interposer device300. In some embodiments, EMI shield layer320comprises a solid layer of conductor, e.g., conductive traces similar to those utilized in heating element layer350. In some embodiments, EMI shield layer320comprises a grid of conductive elements. The grid may be sized to attenuate desired wavelength(s) of electromagnetic interference. EMI shield layer320may have an electrical connection325, e.g., to ground, in some embodiments.

Referring now toFIG.5,FIG.5illustrates a schematic of an exemplary heating element500, in accordance with embodiments of the present invention. Heating element500is well suited to use in active thermal interposer device120(FIG.1A). Heating element500may be powered by a voltage/current drive signal, and comprises two resistive heating elements510and520. Heating elements510and520may comprise resistive traces on a ceramic substrate, in some embodiments. Heating elements510and520comprise resistive traces in a generally serpentine pattern, although the straight traces illustrated are not required. The traces may have a substantially curved nature, in some embodiments. Heating elements510and520are close together, for example, as close as allowed by design rules for the technology, including current carrying capacity and insulative separation requirements. Heating elements510and520may be operated together while phase reversed. For example, in the illustration ofFIG.5, current may flow from top to bottom in heating element510, and from bottom to top in heating element520. In this novel arrangement, electromagnetic fields generated by switching of currents within heating element510may be substantially canceled by inverted electromagnetic fields generated by switching of currents within heating element520, reducing deleterious electromagnetic interference. If elements of heating elements510and520comprise parallel elements, capacitive coupling may be beneficial as well, e.g., reducing inductance in the resistive heating elements.

Referring once again toFIG.3, active thermal interposer device300comprises a top thermal layer340. Thermal layer340functions to couple heat energy from heating element layer350to a device under test and vice versa. Thermal layer340is non conductive, in some embodiments. Thermal layer340should have a high degree of co-planarity in order to facilitate good thermal conduction to a device under test, in some embodiments.

Active thermal interposer device300should be compatible and complementary with conventional elements of integrated circuit test equipment. In some embodiments, active thermal interposer device300may comprise a blowoff line passthrough port370. Blowoff line passthrough port370couples to a conventional blowoff line, as is typically used to break a seal or kick off a device under test, prior to removing the device under test from the test system. For example, blowoff line passthrough port370mates with a blowoff line port of a conventional cold plate, e.g., cold plate130ofFIG.1A. There may be a plurality of blowoff line passthrough ports370in an instance of active thermal interposer device300, for example three arranged in an equilateral triangle, in some embodiments. A blowoff line passthrough port370typically extends through active thermal interposer device300.

Active thermal interposer device300may also or alternatively comprise a device under test pin lift port330, in some embodiments. Device under test pin lift port330may be aligned with a similar port or channel in a cold plate, e.g., cold plate130ofFIG.1A. Device under test pin lift port330enables a device under test lift pin335to raise a device under test above the top of the active thermal interposer device300. The lift pin335typically extends from or through a cold plate, e.g., cold plate130ofFIG.1A, and/or from a chuck mechanism (not shown). In accordance with some embodiments of the present invention, the lift pin335may be lengthened, in contrast to a conventional lift pin, to account for the thickness of active thermal interposer device300. There may be a plurality of pin lift ports330in an instance of active thermal interposer device300, for example three arranged in an equilateral triangle, in some embodiments. A pin lift port330typically extends through active thermal interposer device300.

Active thermal interposer device300may also or alternatively comprise a device under test air-powered kick off device360. Kick off device360comprises a kick off piston364that selectively pushes against DUT110in response to pressure applied via compressed dry air (CDA) port366. Active thermal interposer device300may also or alternatively comprise a device under test spring loaded kick off device380. Device under test spring loaded kick off device380comprises a spring382that pushes piston384to push against DUT110. A force exerted by spring382may be controlled, in some embodiments. For example, spring382may be constrained by a releasable latch mechanism, in some embodiments. In other embodiments, spring382may comprise memory wire, for example, which expands in response to an applied voltage. In some embodiments, spring382may not be controlled. For example, spring382may always apply a force against DUT110. When, for example, a retention latch, e.g., latch255ofFIG.2, is released, spring382may act, forcing piston384against DUT110, providing sufficient force to dislodge DUT110from active thermal interposer device300.

It is appreciated that multi-chip modules often comprise integrated circuit devices of differing heights or thickness.FIG.4illustrates an exemplary block diagram cross sectional view of a thermal management system including a novel active thermal interposer device400, in accordance with embodiments of the present invention. Active thermal interposer device400is configured to mechanically and thermally couple to a multi-chip module comprising integrated circuit devices of differing heights or thickness.FIG.4illustrates a multi-chip module device under test comprising a substrate410, for example a printed wiring board or a ceramic substrate, an integrated circuit packaged in a ball grid array (BGA)420, and another integrated circuit430packaged in a lower profile package, e.g., a plastic-leaded chip carrier (PLCC) or a “glop top” conformal coating. Package420is the tallest structure of the multi-chip module. Elements410,420and430are illustrated for context, and are not a part of active thermal interposer device400.

Elements305,350,320and340are as previously described with respect toFIG.3, and may be described as or referred to as a test stack and/or thermal stack. Elements350,320and340may correspond to thermal region210ofFIG.2, for example. Elements350′,320′, and340′ have corresponding functions to elements350,320and340, and may be described as or referred to as a (different) thermal stack. Elements350′,320′, and340′ may correspond to thermal region230ofFIG.2, for example. In general, elements350′,320′, and340′ may be the same thickness as the corresponding elements350,320and340, but that is not required. In contrast to elements350,320and340, elements350′,320′, and340′ are mounted on top of button440. Button440comprises a plurality of pogo pins460and optional retention mechanism450. Button440is configured to raise (in the configuration ofFIG.4) elements350′,320′ and340′ so that top thermal layer340′ is in good thermal contact with integrated circuit package430.

The plurality of pogo pins460push heating element layer350′, EMI shield layer320′ and top thermal layer340′ up so that top thermal layer340′ is in good thermal contact with integrated circuit package430. The plurality of pogo pins460also couple electrical signals to heating element350′ and EMI shield layer320′. Optional retention mechanism450may keep elements350′,320′, and340′ from rising too far, for example, when a DUT is removed. It is appreciated that heating element layer350′ may comprise contact pads to couple with pogo pins460. Heating element layer350may comprise similar pads, or may utilize a different mechanism to make electrical coupling(s) with a test apparatus, in embodiments. In accordance with embodiments of the present invention, a single active thermal interposer device may comprise multiple thermal stacks on multiple buttons at different heights.

FIG.6illustrates an exemplary computer-controlled method600for testing circuits of an integrated circuit semiconductor wafer, in accordance with embodiments of the present invention. Method600may be practiced by test system170as described inFIG.1C, in some embodiments. In610, a handler device places a device under test, e.g., DUT110ofFIG.1A, into a socket, e.g., socket105ofFIG.1A, and checks if the DUT is aligned via an out of position (OOP) sensor. In620, the handler places the active thermal interposer device, e.g., active thermal interposer device120ofFIG.1A, on top of the DUT. The alignment features in the socket and on the active thermal interposer device, e.g.,250ofFIG.2, assist in placing the active thermal interposer device on top of the DUT. In630, after the active thermal interposer device is placed, a second OOP check is performed to ensure that the active thermal interposer device is placed in a planar fashion and is not tilted or otherwise misaligned.

FIG.7is an exemplary block diagram of a control system700for thermal control of a plurality of devices under test, in accordance with embodiments of the present invention. The control elements of control system700, e.g., active thermal interposer device heating/cooling control740and/or cold plate control750, may correspond to thermal controller145ofFIG.1A, in some embodiments. Device under test (DUT)710may have multiple zones of varying heights for temperature control, for example, zone1712, zone2714, and zone3715. An on-chip and/or in-package temperature measurement718is accessed, if available. In some embodiments, a temperature measurement from one or more temperature sensors on a load board may be accessed. It is desirable to access an on-chip, in-package, and/or load board temperature measurement corresponding to each zone. Any suitable on-chip, in-package, and/or load board temperature measurement device(s) may be utilized, e.g., a band gap, a ring oscillator, and/or a thermocouple.

Active thermal interposer device720is thermally coupled to device under test710. Active thermal interposer device720comprises multiple heating and/or cooling zones to correspond to the multiple zones of device under test710. In some embodiments, some heating and/or cooling zones of active thermal interposer device720may be mounted on buttons to account for different heights of the multiple zones of device under test710, as previously described with respect toFIG.4. A temperature measurement of cold plate730and one or more temperature measurements of each active thermal interposer device zone may be accessed at738,728, and/or718.

Active thermal interposer device720is thermally coupled to a cold plate, e.g., cold plate130ofFIG.1A, e.g., via thermal interface material732. A temperature measurement738of cold plate730made by cold plate temperature sensor731is accessed.

The several temperature measurements, e.g.,718,728,738are inputs to active thermal interposer device heating/cooling control740. Control740generates one or more control outputs for each zone of active thermal interposer device720to achieve a desired temperature for each of such zones. Control740also produces an output744that is input to cold plate control750. Cold plate control750is configured to achieve a desired temperature of cold plate730. Cold plate control750outputs a control signal752that controls operation of fan speed and/or coolant valve754.

In accordance with embodiments of the present invention, one or both of active thermal interposer device heating/cooling control740and/or cold plate control750may utilize dual loop proportional-integral-derivative (PID) algorithms that are configured to utilize both heating and cooling elements to control a desired temperature for each zone of the device under test710. For example, a first control loop may control a fan speed (for air control) and/or a fluid regulation valve (for liquid/refrigerant control) of the cold plate to control a temperature of the cold plate730as measured by cold plate temperature sensor731. A second control loop may operate relatively faster than the first control loop to control temperatures of each zone of active thermal interposer device720. As previously presented, each zone of active thermal interposer device720may comprise heating and cooling elements, in some embodiments.

In accordance with embodiments of the present invention, a temperature zone may comprise an individual packaged or unpackaged die, or a portion of a die. For example, some integrated circuits are characterized as relatively large and/or designed to operate at relatively high power levels. Examples of such integrated circuits may include central processing units (CPUs), graphics processing units (GPUs), Network Processing Units (NPUs), multi-core processing units, power semiconductors, and the like. Due to their large size and/or high power operational characteristics, such integrated circuits may require application of large amounts of heat energy and/or cooling to achieve desired test temperatures.

Large and complex integrated circuits frequently comprise a plurality of functional units, e.g., multiple processing cores, which are physically distinct. It may be desirable to test such functional units in whole or in partial isolation from other function units of a die. For example, a GPU comprising multiple floating point units may be designed to utilize a single floating point unit at times during operation, and turn off other floating point units, e.g., those that are not currently required, in order to reduce power consumption. It may be desirable to test the GPU under similar thermal conditions. For example, it may be desirable to run functional tests on a portion of the GPU corresponding to an operational floating point unit at a high temperature, while other portions of the GPU are at a different, e.g., lower, temperature, simulating non-operation.

In addition, the heat energy and/or cooling required to achieve a desirable test temperature for large and/or high-powered die may exceed the capacity of a single heating element of an active thermal interposer device. For example, conductive traces of an active thermal interposer device may have current capacity limitations. Further, other components of a single heating element and/or an active thermal interposer device may limit an amount of heat energy generated to be less than required to supply sufficient heat energy to achieve a desired temperature of a die under test.

Other types of integrated circuits may be characterized as relatively small and/or designed to operate at relatively low power levels. Examples of such integrated circuits may include microcontrollers, dynamic RAMs, application-specific integrated circuits, analog and mixed signal devices, and the like. Due to their small size and/or low power operational characteristics, such integrated circuits may not require application of large amounts of heat energy and/or cooling to achieve desired test temperatures.

A variety of temperature measurements for devices under test may be available for any give device under test. A measurement of an integrated circuit junction temperature, Tj, is a good input as a measured process variable to a temperature control loop. A direct external measurement of the case or die temperature is typically available from an active thermal interposer device system, and may be used as a measured process variable.

Junction temperature is a function of power consumption of an integrated circuit, and may be approximated by Relation 1 below:
Tjunction=Tcase+Pθi(Relation 1)

where Tcase is case or package temperature, P is power consumed by the integrated circuit. The value “θi” is the lumped thermal resistance of the integrated circuit package comprising, for example, a thermal resistance from the integrated circuit to a coupled heatsink to ambient and/or a thermal resistance from the integrated circuit to a circuit board.

A thermal resistance of an integrated circuit package, θi, is highly consistent among similar integrated circuits under test, and may be treated as a constant for a given device within a DUT.

Accordingly, a good approximation of junction temperature may be obtained by measuring, or controlling, power supplied to a portion, e.g., an integrated circuit, of a device under test. Alternatively, power alone, e.g., without estimating junction temperature, may be used directly. Accordingly, power supplied to a thermal domain of a device under test may be utilized as a measured process variable in a thermal control loop, in accordance with embodiments of the present invention. Highly complex integrated circuits often have multiple power rails, and power may be measured and/or controlled by power rail for such devices as well.

In accordance with embodiments of the present invention, advance knowledge of a test profile may be used in a thermal control loop to adjust, or initiate adjustment, of a temperature of a DUT thermal zone. For example, with foreknowledge that a particular test profile will cause a thermal zone of a DUT to change to a very high power consumption mode, a thermal control loop may initiate a high rate of cooling in advance of an actual measured increase in DUT temperature and/or an increase in DUT power consumption. Similarly, with foreknowledge that a particular test profile will cause a thermal zone of a DUT to change to a very low power consumption mode, a thermal control loop may initiate a high rate of heating in advance of an actual measured decrease in DUT temperature and/or an decrease in DUT power consumption. Such advanced or anticipatory changes, known as or referred to as a “pre-trigger,” to thermal control devices, e.g., cooling plates and/or heating elements, may help to maintain a desired temperature for one or more thermal zones of a DUT, in accordance with embodiments of the present invention. A pre-trigger may not be a physical measurement, or correspond to a contemporaneous physical measurement, in some embodiments. U.S. Pat. No. 9,291,667 entitled “Adaptive Thermal Control,” incorporated herein in its entirety by reference, provides further disclosures of advanced or anticipatory pre-trigger events and responses.

The available temperature measurements often vary according to the complexity of the integrated circuits that make up a device under test, e.g., a multi-chip module. For example, highly complex integrated circuits frequently comprise a junction temperature sensor for one or more sections of the integrated circuit. Other types of integrated circuits such as bulk memory may not have a junction temperature sensor. In such cases, other control inputs, including, for example, case temperature measurements, power consumption and/or pre-triggers may be used to control temperature zone(s) of a device under test.

Table 1, below, illustrates common types of integrated circuits and commonly available types of temperature measurements available for such integrated circuits:

TABLE 1Tsense(Case tempPowerPre-triggerDie inTypicalmeasure-Sensor (fromsignal (fromMCM/SIPplacementment)Die Tjtester)tester)CoreBare DieYUsuallyUsuallyUsually availableProcessorPresentavailableon Advantest(Typicallytestersseparatepower supply)GraphicsBare DieYUsuallyUsuallyUsually availableProcessorPresentavailableon Advantest(Typicallytestersseparatepower supply)Analog/EncapsulatedYRarelySometimesCan be available-Mixedor barepresentavailablenot typically doneSignaldie(could bein the pastganged withother supplies)MemoryPackagedYUsuallySometimesCan be available-notavailablenot typically donepresent(could bein the pastganged withother supplies)

FIG.8illustrates a block diagram of an exemplary electronic automatic thermal control (ATC) system800, in accordance with embodiments of the present invention. Automatic thermal control system800may incorporate active thermal interposer device heating/cooling control function740and/or cold plate control function750, as illustrated inFIG.7, in some embodiments.

Automatic thermal control (ATC) system800accesses a plurality of control inputs for each thermal zone of a device under test, including, for example, cold plate temperature810, a junction temperature, Tj,820of a thermal zone of a device under test, a device under test case temperature, Tcase,830, an indication of power consumption of a thermal zone of a device under test840, and/or a pre-trigger signal for a thermal zone of a device under test850.

Responsive to the control inputs810,820,830,840and/or850, automatic thermal control system800produces a plurality of control outputs, based on one or more control inputs. In some embodiments, more than one control input may be utilized by automatic thermal control system800to produce its control outputs. In some embodiments, thermal control of different thermal control zones may utilize different control inputs. For example, thermal control system800may utilize control inputs cold plate temperature810, junction temperature820, power consumption840and pre-trigger850while thermally controlling a graphics processor, and utilize cold plate temperature810and case temperature830while thermally controlling an associated bulk memory device.

In addition, in some embodiments, different thermal zones of a single integrated circuit may be controlled according to different control inputs. For example junction temperature may be beneficially used to thermally control a processor core of an integrated circuit, while case temperature measurement(s) may be of greater benefit to thermal control of other portions of the integrated circuit. Such variations in use of control inputs may arise over time and/or processing load as well.

Further, in accordance with embodiments of the present invention, pre-trigger information may change which control inputs are utilized to implement thermal control of a thermal control zone of a device under test. For example, pre-trigger information may indicate that a first thermal zone of a DUT is about to have a heavy workload, and hence increase power consumption, while other thermal zones of the DUT may have a decreased workload and decreased power consumption. Responsive to such indications, thermal control of the first thermal zone may utilize junction temperature as a controlling input, while thermal control of the other thermal zones may utilize power consumption as a controlling input.

Automatic thermal control system800produces a control signal752that controls operation of fan speed and/or coolant valve754(FIG.7). In some embodiments, a cold plate, e.g., cold plate730(FIG.7) may be thermally coupled to all thermal zones of a device under test. In some embodiments, control signal752may be functionally summed from control loops for all thermal zones of a device under test. In some embodiments, a desired temperature for a cold plate, e.g., cold plate730, may be controlled based on a single thermal zone of a device under test, for example, a thermal zone producing a greatest amount of heat. Such a cold plate temperature may be utilized as an input to control loops for the remaining thermal zones of a device under test. However, in some embodiments, such control loops may not control and/or affect the cold plate temperature.

Automatic thermal control system800produces a control signal742for each thermal zone of a device under test that controls heating element(s) for each heating zone of an active thermal interposer device, e.g., an active thermal interposer device120(FIG.1). In some embodiments, one or more zones of an active thermal interposer device may have a cooling element, e.g., a Peltier device, separate from a cold plate, e.g., cold plate730. In such embodiments, automatic thermal control system800produces a control signal742afor each thermal zone of a device under test that controls cooling element(s) for each thermal zone of an active thermal interposer device. In some embodiments, control signal(s)742amay be a part of control signal(s)742.

In accordance with embodiments of the present invention, automatic thermal control system800may utilize dual loop proportional-integral-derivative (PID) processes that access and utilize multiple control inputs, including “pre-trigger” inputs, from a test system and are configured to utilize both heating and cooling elements to control a desired temperature for each zone of a device under test.

FIG.9illustrates an exemplary computer-controlled method900for performing thermal management of a device under test, in accordance with embodiments of the present invention. In some embodiments, method900is operable in a tester system comprising a thermal management head, e.g., active thermal interposer device120as described inFIG.1, and an automatic thermal control system, e.g., automatic thermal control system800as described with respect toFIG.8. In some embodiments, the device under test may be a multi-chip module (MCM) and/or a system in a package (SIP).

In910, a first side of an active thermal interposer device, e.g., active thermal interposer device120(FIG.1), of the thermal management head is placed on the DUT, and a cold plate, e.g., cold plate130(FIG.1) is placed on a second side of the active thermal interposer device. The DUT may comprise a plurality of modules, e.g., different integrated circuits and/or integrated circuit packages, e.g., zone1712, zone2714, zone3716ofFIG.7. The active thermal interposer device may comprise a plurality of zones. Each zone of the plurality of zones of the active thermal interposer device corresponds to a respective module of the plurality of modules of the DUT, and is operable to be selectively heated. For example, a first zone of the active thermal interposer device may be heated while a second zone of the active thermal interposer device is not heated, or is heated to a different amount of added heat. One or more of the zones of the active thermal interposer device may optionally be selectively cooled.

In920, a respective set of inputs corresponding to each zone of the plurality of zones of the thermal interposer device is received by the tester system, e.g., automatic thermal control system800(FIG.8). The inputs may include, for example, one or more of a temperature of the cold plate, and/or a temperature of the zone of the active thermal interposer device. Additional information received by the tester system may include a case temperature, a junction temperature of a die of a module corresponding to the zone, an amount of power supplied to the module corresponding to the zone, and/or a current position within a predetermined thermal control profile of the module corresponding to the zone. The amount of power may include power supplied from a plurality of power supplies respectively coupled to the plurality of modules within a device under test.

In930, thermal management of the plurality of modules of the DUT is performed. A temperature of each zone of the plurality of zones of the active thermal interposer device is separately controlled by multiple operations, based on a variety of zone and/or module specific information. In one operation, a supply of coolant to the cold plate is controlled. For example, automatic thermal control system800(FIG.8) may receive a temperature738(FIG.7) of cold plate730. Responsive to the temperature738of the cold plate730, and in consideration of a temperature of each zone of the plurality of zones of the active thermal interposer device, automatic thermal control system800(FIG.8) may control valve754(FIG.7) to increase or decrease the cooling capacity of cold plate730.

Each zone of the plurality of zones of the active thermal interposer device is further controlled (742ofFIG.7) by individually controlling heating and/or cooling of each zone of the plurality of zones of the active thermal interposer device. For example, temperature728(FIG.7) of each zone (zone1, zone2, zone3) of the plurality of zones of the active thermal interposer is received by automatic thermal control system800(FIG.8). Automatic thermal control system800(FIG.8) may also receive module temperature-related information, e.g., junction temperature, case temperature, power consumption, and/or pre-trigger information from modules of the device under test, e.g., DUT Zone 1712, Zone 2714, and/or Zone 3716(FIG.7). Thus, the automatic thermal control system800(FIG.8) may receive temperature information, and other temperature-related information, from modules of the device under test as well as from temperature zones of the active thermal interposer device corresponding to such modules of the device under test.

The thermal management of the device under test is further implemented by a plurality of thermal processes, wherein each thermal process controls a temperature of a respective zone of the plurality of zones of the active thermal interposer device based on a respective set of inputs for the respective zone of the active thermal interposer device and/or module of the device under test.

The thermal management may include implementing power following heuristics within a respective thermal process, of the plurality of thermal processes, which utilizes inputs pertaining to an amount of power supplied to a module corresponding to a zone regulated by said respective thermal process, in some embodiments.

In some embodiments, the thermal management may include pre-trigger heuristics within a respective thermal process, of the plurality of thermal processes, which utilizes inputs pertaining to amount of work expected to be performed by a module corresponding to a zone regulated by said respective thermal process.

In optional940, the device under test is tested using the tester processor. For example, a series of test patterns may stimulate the device under test, and resulting outputs are observed. Thermal management of the plurality of modules of the DUT is performed contemporaneously with the testing.

FIG.10illustrates a block diagram of an exemplary electronic system1000, which may be used as a platform to implement and/or as a control system for embodiments of the present invention. For example, automatic thermal control system800(FIG.8) may comprise electronic system1000. For example, system1000may implement and/or control some or all elements of process600(FIG.6) and/or process900(FIG.9). Electronic system1000may be a “server” computer system, in some embodiments. Electronic system1000includes an address/data bus1050for communicating information, a central processor complex1005functionally coupled with the bus for processing information and instructions. Bus1050may comprise, for example, a Peripheral Component Interconnect Express (PCIe) computer expansion bus, industry standard architecture (ISA), extended ISA (EISA), MicroChannel, Multibus, IEEE 796, IEEE 1196, IEEE 1496, PCI, Computer Automated Measurement and Control (CAMAC), MBus, Runway bus, Compute Express Link (CXL), and the like.

Central processor complex1005may comprise a single processor or multiple processors, e.g., a multi-core processor, or multiple separate processors, in some embodiments. Central processor complex1005may comprise various types of well known processors in any combination, including, for example, digital signal processors (DSP), graphics processors (GPU), complex instruction set (CISC) processors, reduced instruction set (RISC) processors, and/or very long word instruction set (VLIW) processors. Electronic system1000may also includes a volatile memory1015(e.g., random access memory RAM) coupled with the bus1050for storing information and instructions for the central processor complex1005, and a non-volatile memory1010(e.g., read only memory ROM) coupled with the bus1050for storing static information and instructions for the processor complex1005. Electronic system1000also optionally includes a changeable, non-volatile memory1020(e.g., NOR flash) for storing information and instructions for the central processor complex1005which can be updated after the manufacture of system1000. In some embodiments, only one of ROM1010or Flash1020may be present.

Also included in electronic system1000ofFIG.10is an optional input device1030. Device1030can communicate information and command selections to the central processor1000. Input device1030may be any suitable device for communicating information and/or commands to the electronic system1000. For example, input device1030may take the form of a keyboard, buttons, a joystick, a track ball, an audio transducer, e.g., a microphone, a touch sensitive digitizer panel, eyeball scanner, and/or the like.

Electronic system1000may comprise a display unit1025. Display unit1025may comprise a liquid crystal display (LCD) device, cathode ray tube (CRT), field emission device (FED, also called flat panel CRT), light emitting diode (LED), plasma display device, electro-luminescent display, electronic paper, electronic ink (e-ink) or other display device suitable for creating graphic images and/or alphanumeric characters recognizable to the user. Display unit1025may have an associated lighting device, in some embodiments.

Electronic system1000also optionally includes an expansion interface1035coupled with the bus1050. Expansion interface1035can implement many well known standard expansion interfaces, including without limitation the Secure Digital Card interface, universal serial bus (USB) interface, Compact Flash, Personal Computer (PC) Card interface, CardBus, Peripheral Component Interconnect (PCI) interface, Peripheral Component Interconnect Express (PCI Express), mini-PCI interface, IEEE 10394, Small Computer System Interface (SCSI), Personal Computer Memory Card International Association (PCMCIA) interface, Industry Standard Architecture (ISA) interface, RS-232 interface, and/or the like. In some embodiments of the present invention, expansion interface1035may comprise signals substantially compliant with the signals of bus1050.

A wide variety of well-known devices may be attached to electronic system1000via the bus1050and/or expansion interface1035. Examples of such devices include without limitation rotating magnetic memory devices, flash memory devices, digital cameras, wireless communication modules, digital audio players, and Global Positioning System (GPS) devices.

System1000also optionally includes a communication port1040. Communication port1040may be implemented as part of expansion interface1035. When implemented as a separate interface, communication port1040may typically be used to exchange information with other devices via communication-oriented data transfer protocols. Examples of communication ports include without limitation RS-232 ports, universal asynchronous receiver transmitters (UARTs), USB ports, infrared light transceivers, ethernet ports, IEEE 10394, and synchronous ports.

System1000optionally includes a network interface1060, which may implement a wired or wireless network interface. Electronic system1000may comprise additional software and/or hardware features (not shown) in some embodiments.

Various modules of system1000may access computer readable media, and the term is known or understood to include removable media, for example, Secure Digital (“SD”) cards, CD, DVD ROMs, and/or Blu-Ray ROMs, diskettes and the like, as well as non-removable or internal media, for example, hard drives, solid state drives (SSD), RAM, ROM, flash, and the like.

Embodiments in accordance with the present invention provide systems and methods for multi-input multi-zone thermal control. In addition, embodiments in accordance with the present invention provide systems and methods for multi-input multi-zone thermal control operable to control different portions of a device under test to different temperatures. Further, embodiments in accordance with the present invention provide systems and methods for multi-input multi-zone thermal control operable to control different portions of a device under test at different heights to different temperatures based on different temperature inputs. Still further, embodiments in accordance with the present invention provide systems and methods for multi-input multi-zone thermal control that are compatible and complementary with existing systems and methods of testing integrated circuits.

Although the invention has been shown and described with respect to a certain exemplary embodiment or embodiments, equivalent alterations and modifications will occur to others skilled in the art upon the reading and understanding of this specification and the annexed drawings. In particular regard to the various functions performed by the above described components (assemblies, devices, etc.) the terms (including a reference to a “means”) used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary embodiments of the invention. In addition, while a particular feature of the invention may have been disclosed with respect to only one of several embodiments, such feature may be combined with one or more features of the other embodiments as may be desired and advantageous for any given or particular application.

Various embodiments of the invention are thus described. While the present invention has been described in particular embodiments, it should be appreciated that the invention should not be construed as limited by such embodiments, but rather construed according to the below claims.