Patent ID: 12206374

DETAILED DESCRIPTION

A power amplifying circuit according to embodiments will be described in detail below on the basis of the drawings. The embodiments do not limit the present disclosure. Components of the embodiments include those that are easily replaceable by those skilled in the art or those that are substantially identical to each other. The embodiments are exemplary, and configurations in different embodiments may be replaced or combined partially. Points common to those in a first embodiment will not be described in a second embodiment and its subsequent embodiments. Only different points will be described. Substantially the same effects caused by substantially the same configurations will not be particularly described in each embodiment.

First Embodiment

FIGS.1A and1Bare diagrams illustrating exemplary configurations of a power amplifying circuit according to a first embodiment. A power amplifying circuit100according to the first embodiment performs amplification operations, on received radio-frequency input signals RFin, for obtaining a first gain (low gain) that is relatively low and for obtaining a second gain (high gain) that is relatively high, and outputs radio-frequency output signals RFout. The mode, in which an amplification operation for obtaining the first gain is performed, is referred to as the “first mode”. The mode, in which an amplification operation for obtaining the second gain is performed, is referred to as the “second mode”.FIG.1Aillustrates the state in the first mode.FIG.1Billustrates the state in the second mode.

As illustrated inFIGS.1A and1B, the power amplifying circuit100according to the first embodiment includes a single-ended amplifier1, a differential amplifier2, a first balun transformer3, a second balun transformer4, and a first switching circuit5.

The single-ended amplifier1operates in the first mode and the second mode by using the first power supply voltage Vcc1which is input through an inductance device Lp1.

The single-ended amplifier1may be formed, for example, of a bipolar transistor, or may be formed, for example, of a field effect transistor (FET). In the case where the single-ended amplifier1is formed of a bipolar transistor, for example, a heterojunction bipolar transistor (HBT) may be used. The configuration of the single-ended amplifier1does not limit the present disclosure.

The first balun transformer3includes an input-side winding31and an output-side winding32.

The single-ended amplifier1amplifies radio-frequency input signals RFin which are single-ended signals. Unbalanced output signals, which are output from the single-ended amplifier1, are input to an input terminal51aof the first switching circuit5through a capacitor C1pand an inductance device L1p. Unbalanced output signals, which are output from the single-ended amplifier1, are input to a first end of the input-side winding31of the first balun transformer3through a capacitor C1(first capacitor). The input-side winding31of the first balun transformer3is connected, at its second end, to a reference potential through a second switching circuit6in the second mode (seeFIG.1B). The reference potential is the ground potential, but this is not limiting.

The first balun transformer3converts unbalanced output signals, which are received from the single-ended amplifier1, from unbalanced to balanced to obtain differential signals. The output-side winding32of the first balun transformer3is connected between the input INP and the input INN of the differential amplifier2.

The input-side winding31of the first balun transformer3is coupled to the output-side winding32electromagnetically. Thus, unbalanced output signals, which are output from the single-ended amplifier1, are converted from unbalanced to balanced by the first balun transformer3.

The second balun transformer4includes an input-side winding41and an output-side winding42.

The input-side winding41is connected between the output OUTP and the output OUTN of the differential amplifier2. A center tap is provided at the midpoint of the input-side winding41. The second power supply voltage Vcc2is applied through an inductance device Lp2to the center tap. The input-side winding41is connected to a capacitor Cb1in parallel.

The output-side winding42is connected, at its first end, to the reference potential. The output-side winding42is connected to a capacitor Cb2in parallel.

The differential amplifier2operates in the second mode by using the second power supply voltage Vcc2which is input through the inductance device Lp2and the input-side winding41of the second balun transformer4.

The differential amplifier2includes two amplifiers21and22which amplify differential signals which are output from the first balun transformer3. The amplifiers21and22may be formed, for example, of bipolar transistors, or may be formed, for example, of FETs. In the case where the amplifiers21and22are formed of bipolar transistors, for example, HBTs may be used. The configuration of the amplifiers21and22does not limit the present disclosure.

The input-side winding41of the second balun transformer4is coupled to the output-side winding42electromagnetically. Thus, balanced output signals, which are output from the differential amplifier2, are converted from balanced to unbalanced by the second balun transformer4.

Unbalanced output signals, which are output from the second balun transformer4, are input to an input terminal51bof the first switching circuit5.

The first switching circuit5switches, for output, between unbalanced output signals from the single-ended amplifier1and unbalanced output signals from the second balun transformer4. Specifically, in the first mode, the first switching circuit5connects the input terminal51ato an output terminal52electrically (seeFIG.1A). In the second mode, the first switching circuit5connects the input terminal51bto the output terminal52electrically (seeFIG.1B).

The configuration according to the first embodiment described above enables implementation of a power amplifying circuit, with a simple configuration, which is capable of switching between an amplification operation for obtaining the first gain (low gain), which is relatively low, in the first mode and an amplification operation for obtaining the second gain (high gain), which is relatively high, in the second mode.

FIG.2Ais a diagram illustrating the equivalent circuit of the first balun transformer, in the first mode, of the power amplifying circuit according to the first embodiment.FIG.2Bis a diagram illustrating the equivalent circuit of a first balun transformer, in the first mode, of a power amplifying circuit according to a comparison example of the first embodiment.FIG.3is a diagram illustrating an exemplary simulation result of frequency-gain characteristics, in the first mode, of the power amplifying circuit according to the first embodiment. InFIG.3, the solid line indicates the simulation result, in the first mode, of the power amplifying circuit according to the first embodiment. The broken line indicates the simulation result, in the first mode, of the power amplifying circuit according to the comparison example of the first embodiment which is illustrated inFIG.2B.

In the comparison example illustrated inFIG.2B, the capacitor C1(first capacitor) and inductance devices L1and L3form a series resonant circuit. Thus, as indicated by the broken line inFIG.3, a dip may occur at the resonant frequency of the series resonant circuit, which is formed of the capacitor C1and the inductance devices L1and L3, in the transmit frequency band (in the example inFIG.3, at and near 2 GHz).

As described above, the first embodiment employs the configuration in which the input-side winding31of the first balun transformer3is provided, at its second end, with the second switching circuit6, and in which the input-side winding31of the first balun transformer3is separated from the reference potential in the first mode. Thus, as indicated by the solid line inFIG.3, such a dip as occurs in the comparison example and as is indicated by the broken line inFIG.3does not occur in the transmit frequency band when an amplification operation for obtaining the first gain (low gain), which is relatively low, in the first mode is performed.

Second Embodiment

FIGS.4A and4Bare diagrams illustrating an exemplary configuration of a power amplifying circuit according to a second embodiment.FIG.4Aillustrates the state in the first mode.FIG.4Billustrates the state in the second mode. Components identical to those in the first embodiment are designated with identical reference characters, and will not be described.

FIG.5is a diagram illustrating the equivalent circuit of the first balun transformer, in the first mode, of the power amplifying circuit according to the second embodiment.FIG.6is a diagram illustrating an exemplary simulation result of frequency-gain characteristics, in the first mode, of the power amplifying circuit according to the second embodiment. InFIG.6, the solid line indicates the simulation result, in the first mode, of the power amplifying circuit according to the second embodiment. The broken line indicates the simulation result, in the first mode, of the power amplifying circuit according to the comparison example of the first embodiment which is illustrated inFIG.2B.

As illustrated inFIGS.4A and4B, in a power amplifying circuit100aaccording to the second embodiment, the single-ended amplifier1is connected to the first end of the input-side winding31of the first balun transformer3. The input-side winding31is supplied, at its second end, with the first power supply voltage Vcc1. Thus, as illustrated inFIG.5, the series resonant circuit described in the comparison example of the first embodiment is not formed. Thus, as indicated by the solid line inFIG.6, such a dip as occurs in the comparison example and as is indicated by the broken line inFIG.6does not occur in the transmit frequency band (in the example illustrated inFIG.6, at and near 2 GHz).

FIG.7is a diagram illustrating a simulation result of frequency-gain characteristics, in the second mode, of the power amplifying circuit according to the second embodiment. InFIG.7, the solid line indicates the simulation result, in the second mode, of the power amplifying circuit according to the second embodiment. The broken line indicates the simulation result, in the second mode, of the power amplifying circuit according to the first embodiment.

Also in the second mode, as indicated by the solid line inFIG.7, good gain characteristics, which are similar to those in the configuration of the first embodiment indicated by the broken line inFIG.7, may be obtained.

The configuration according to the second embodiment described above enables implementation of a power amplifying circuit, with a simpler configuration, which is capable of switching between an amplification operation for obtaining the first gain (low gain), which is relatively low, in the first mode and an amplification operation for obtaining the second gain (high gain), which is relatively high, in the second mode.

Third Embodiment

FIGS.8A and8Bare diagrams illustrating an exemplary configuration of a power amplifying circuit according to a third embodiment.FIG.8Aillustrates the state in the first mode.FIG.8Billustrates the state in the second mode. Components identical to those in the second embodiment are designated with identical reference characters, and will not be described.

As illustrated inFIGS.8A and8B, in a power amplifying circuit100baccording to the third embodiment, a first switching circuit5ais a single pole single throw (SPST) switch. Specifically, in the first mode, the unbalanced-output path of the single-ended amplifier1and the unbalanced-output path of the second balun transformer4are short-circuited. Thus, an increase in consumption current caused by power loss due to a switching circuit may be suppressed in an amplification operation for obtaining the second gain (high gain), which is relatively high, in the second mode.

Fourth Embodiment

FIGS.9A and9Bare diagrams illustrating an exemplary configuration of a power amplifying circuit according to a fourth embodiment.FIG.9Aillustrates the state in the first mode.FIG.9Billustrates the state in the second mode. Components identical to those in the third embodiment are designated with identical reference characters, and will not be described.

As illustrated inFIGS.9A and9B, in a power amplifying circuit100caccording to the fourth embodiment, a capacitor C2(second capacitor) is disposed on the unbalanced-output path of the second balun transformer4. Specifically, the capacitor C2is connected, at its first end, to the first end of the output-side winding42of the second balun transformer4, and is connected, at its second end, to a first end of the first switching circuit5a.

FIG.10is a diagram illustrating the equivalent circuit of a second balun transformer, in the first mode, of the power amplifying circuit according to the fourth embodiment.FIG.11is a diagram illustrating the equivalent circuit of a second balun transformer, in the first mode, of a power amplifying circuit according to a comparison example of the fourth embodiment.FIG.12is a diagram illustrating an exemplary simulation result of frequency-gain characteristics, in the first mode, of the power amplifying circuit according to the fourth embodiment. InFIG.12, the solid line indicates the simulation result, in the first mode, of the power amplifying circuit according to the fourth embodiment. The broken line indicates the simulation result, in the first mode, of the power amplifying circuit according to the comparison example of the fourth embodiment which is illustrated inFIG.11.

In the comparison example illustrated inFIG.11, the capacitor Cb1and inductance devices L4and L5form a series resonant circuit. Thus, as indicated by the broken line inFIG.12, a dip may occur at the resonant frequency of the series resonant circuit, which is formed of the capacitor Cb1and the inductance devices L4and L5, in the transmit frequency band (in the example illustrated inFIG.12, at and near 2 GHz).

In the fourth embodiment, the capacitor C2is disposed on the unbalanced-output path of the second balun transformer4. Thus, as indicated by the solid line inFIG.12, the resonant frequency of the series resonant circuit may be shifted from the transmit frequency band. Thus, a dip in the gain characteristics may occur at a frequency outside the transmit frequency band in an amplification operation for obtaining the first gain (low gain), which is relatively low, in the first mode.

Fifth Embodiment

FIG.13is a diagram illustrating an exemplary configuration of a power amplifying circuit according to a fifth embodiment. Components identical to those in the second embodiment are designated with identical reference characters, and will not be described.

As illustrated inFIG.13, a power amplifying circuit100daccording to the fifth embodiment includes a matching circuit7, matching circuits8aand8b, a third switching circuit9, and matching circuits10a,10b, and10cin addition to the components in the second embodiment.

The third switching circuit9switches the output from the first switching circuit5, for output, to any of multiple output paths.

The input terminal51aof the first switching circuit5is connected to the matching circuit8a. The input terminal51bof the first switching circuit5is connected to the matching circuit8b.

The matching circuit8ais disposed on the unbalanced-output path of the single-ended amplifier1. The matching circuit8amatches impedance between the output from the single-ended amplifier1and the input terminal51aof the first switching circuit5. The matching circuit8aforms a part of a matching circuit for matching impedance between the output from the single-ended amplifier1and the input terminal51aof the first switching circuit5.

The matching circuit8bis disposed on the unbalanced-output path of the second balun transformer4. The matching circuit8bmatches impedance between the output from the second balun transformer4and the input terminal51bof the first switching circuit5. The matching circuit8bforms a part of a matching circuit for matching impedance between the output from the second balun transformer4and the input terminal51bof the first switching circuit5.

An output terminal92aof the third switching circuit9is connected to the matching circuit10a. An output terminal92bof the third switching circuit9is connected to the matching circuit10b. An output terminal92cof the third switching circuit9is connected to the matching circuit10c.

The matching circuits10a,10b, and10cmatch impedance between the output terminals92a,92b, and92c, respectively, of the third switching circuit9and the outside connected through the respective output paths.

The matching circuit7is connected between the output terminal52of the first switching circuit5and an input terminal91of the third switching circuit9.

The matching circuit7matches impedance between the output terminal52of the first switching circuit5and the input terminal91of the third switching circuit9. The matching circuit7in combination with the matching circuit8aor the matching circuit8bmatches impedance between the unbalanced output of the single-ended amplifier1or the unbalanced output of the second balun transformer4and the input terminal91of the third switching circuit9.

The matching circuit7may include a matching device provided commonly for impedance matching performed by the matching circuit8aand impedance matching performed by the matching circuit8b. For example, in impedance matching performed by the matching circuit8a, assume that an inductance device, which is connected to the unbalanced-output path of the single-ended amplifier1, is used in adjustment of impedance. The inductance device may be used also in impedance matching performed by the matching circuit8b. In this case, without necessarily individual inductance devices included in the matching circuit8aand the matching circuit8b, the matching circuit7may include an inductance device corresponding to such inductance devices. Thus, the matching device may be used commonly. The matching device that is commonly used may be a capacitor, not an inductance device. Common use of the matching device may decrease the area of the circuit necessary for matching.

The matching circuit7may include a matching device which is provided commonly for impedance matching performed by the matching circuit10a, impedance matching performed by the matching circuit10b, and impedance matching performed by the matching circuit10c. That is, like the example described above, the matching device may be used commonly, resulting in a decrease of the area of the circuit.

Sixth Embodiment

FIG.14is a diagram illustrating an exemplary configuration of a power amplifying circuit according to a sixth embodiment. Components identical to those in the fifth embodiment are designated with identical reference characters, and will not be described.

As illustrated inFIG.14, a power amplifying circuit100eaccording to the sixth embodiment includes a variable matching circuit7ainstead of the matching circuit7in the fifth embodiment.

The variable matching circuit7aincludes, for example, a variable capacitor (digital tunable capacitor (DTC)) as an exemplary variable device. The variable capacitor is capable of changing the capacitance on the basis of a control signal which is input from the outside. Not only a variable capacitor but also a variable device (a variable resistor, a variable phase shifter, or a variable inductor) may be used. The variable matching circuit7a, which has a variable device, is capable of adjusting characteristics in impedance matching.

For example, the variable matching circuit7aadjusts the capacitance of the variable capacitor. Thus, impedance with the outside connected through an output path is matched. When the variable device is not a device which adjusts its capacitance like a variable capacitor, adjustment of parameters of the variable device enables adjustment of characteristics in impedance matching.

Use of the variable matching circuit7aeliminates necessity of use of the matching circuits10a,10b, and10cin the fifth embodiment, achieving a further decrease of the area of the circuit necessary for matching. Optimization of matching enables individual impedance optimization in the first mode and the second mode, achieving a smaller consumption current.

The embodiments described above facilitate understanding of the present disclosure, and are not for limited interpretation of the present disclosure. The present disclosure may be changed/improved without necessarily departing from the gist of the present disclosure. The present disclosure also encompasses its equivalence.

The present disclosure may have configurations described below.

(1) A power amplifying circuit according an aspect of the present disclosure includes a single-ended amplifier, a differential amplifier, a first balun transformer, a second balun transformer, and a first switching circuit. The single-ended amplifier operates in a first mode and a second mode different from the first mode. The differential amplifier operates in the second mode. The first balun transformer converts an unbalanced output signal from the single-ended amplifier into a differential signal, and outputs the differential signal to the differential amplifier. The second balun transformer converts a balanced output signal from the differential amplifier into an unbalanced output signal. The first switching circuit outputs the unbalanced output signal from the single-ended amplifier in the first mode, and outputs the unbalanced output signal from the second balun transformer in the second mode.

This configuration enables implementation of a power amplifying circuit, with a simple configuration, which is capable of switching between an amplification operation for obtaining the first gain (low gain), which is relatively low, in the first mode and an amplification operation for obtaining the second gain (high gain), which is relatively high, in the second mode.

(2) The power amplifying circuit according to (1) may further include a first capacitor and a second switching circuit. The first capacitor is disposed between the single-ended amplifier and a first end of an input-side winding of the first balun transformer. The second switching circuit connects a second end of the input-side winding of the first balun transformer to a reference potential in the second mode.

This configuration enables a dip not to occur in the transmit frequency band of the power amplifying circuit in the first mode.

(3) In the power amplifying circuit according to (1), the single-ended amplifier may be connected to a first end of an input-side winding of the first balun transformer. A power supply voltage of the single-ended amplifier may be supplied to a second end of the input-side winding of the first balun transformer.

This configuration enables implementation of a power amplifying circuit, with a simpler configuration, which is capable of switching between an amplification operation for obtaining the first gain (low gain), which is relatively low, in the first mode and an amplification operation for obtaining the second gain (high gain), which is relatively high, in the second mode.

(4) In the power amplifying circuit according to (2) or (3), the first switching circuit may switch, for output, between the unbalanced output signal from the single-ended amplifier and the unbalanced output signal from the second balun transformer.

(5) In the power amplifying circuit according to (2) or (3), the first switching circuit may short-circuit an unbalanced-output path of the single-ended amplifier and an unbalanced-output path of the second balun transformer in the first mode.

This configuration may suppress a decrease of gain due to power loss caused by the switching circuit in an amplification operation for obtaining the second gain (high gain), which is relatively high, in the second mode.

(6) In the power amplifying circuit according to (5), a second capacitor may be disposed on the unbalanced-output path of the second balun transformer. A first end of the second capacitor may be connected to a first end of an output-side winding of the second balun transformer, and a second end of the second capacitor may be connected to a first end of the first switching circuit.

This configuration enables a dip in the gain characteristics in the first mode to occur at a frequency outside the transmit frequency band.

(7) The power amplifying circuit according to (4) may further include a third switching circuit and a matching circuit. The third switching circuit switches, for output, output of the first switching circuit to any of output paths. The matching circuit is disposed between the first switching circuit and the third switching circuit.

This configuration enables a matching device to be used commonly, achieving a decrease of the area of the circuit.

(8) In the power amplifying circuit according to (7), the matching circuit may be a variable matching circuit that is capable of adjusting characteristics.

This configuration enables the area of the circuit necessary for matching to be further decreased. Optimization of matching enables individual impedance optimization in the first mode and the second mode, achieving a small consumption current.

The present disclosure enables a power amplifying circuit, which is capable of switching gain, to be obtained with a simple configuration.

While embodiments of the disclosure have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without necessarily departing from the scope and spirit of the disclosure. The scope of the disclosure, therefore, is to be determined solely by the following claims.