Patent ID: 12227867

DETAILED DESCRIPTION

The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.

FIG.1AtoFIG.1Dare schematic cross-sectional views illustrating various stages of forming a conductive feature12on a semiconductor structure10in accordance with some embodiments of the disclosure. Referring toFIG.1A, a base layer11of a semiconductor structure10is provided with an opening OP. Moreover, a seed material layer121is formed on the base layer11in a conformal manner. In some embodiments, the base layer11is a semiconductor wafer (e.g., silicon wafer) or is part of a semiconductor wafer. For example, the base layer11includes a semiconductor substrate, such as a bulk semiconductor or the like, which may be doped or undoped. Under this scenario, the subsequently formed conductive feature12(shown inFIG.1D) may act as a through substrate via (TSV) in the semiconductor structure10. However, the disclosure is not limited thereto. In some alternative embodiments, the base layer11is a dielectric layer formed over a semiconductor substrate. Under this scenario, the conductive feature12(shown inFIG.1D) may be formed as a part of interconnect circuitry in the semiconductor structure10.

In some embodiments, the opening OP is formed by acceptable removal techniques (e.g., lithography and etching, drilling, and/or the like). The depth of the opening OP may range from about 1 μm to about 100 μm. Although the opening OP is illustrated as not penetrating through the base layer11inFIG.1A, the disclosure is not limited thereto. In some alternative embodiments, the opening OP may penetrate through the base layer11to expose element(s) underneath the base layer11. It should be noted that the cross-sectional shape of the opening OP inFIG.1Ais merely an example, and a dual damascene opening including a via hole connecting a trench may be formed in the base layer11according to some alternative embodiments.

In some embodiments, a material of the seed material layer121includes Cu, Ni, Co, Ru, a combination thereof, etc. For example, the seed material layer121may include the same conductive material (e.g., Cu) as that used in the subsequent plating process. In some embodiments, the opening OP is initially lined with a barrier liner (not shown), and then the seed material layer121is deposited on the barrier liner. The barrier liner may bond the conductive material to the base layer11(e.g., the dielectric layer) or may prevent interaction between the conductive material and the base layer11(e.g., silicon substrate). In some embodiments, a material of the barrier liner includes Ta, TaN, Ti, TiN, or a combination thereof.

Referring toFIG.1B, a pre-wetting process20is performed on the semiconductor structure10. For example, the seed material layer121is treated with the pre-wetting process20to increase wetting ability. The wettability of the seed material layer121may be critical for the subsequent plating process. If the seed material layer121cannot wet the plating fluid, no plated material can be deposited on that area of the seed material layer121, thereby forming defects. The pre-wetting process20may involve wetting the semiconductor structure10with fluids.

Referring toFIG.1C, a conductive material layer122is formed on the seed material layer121through a plating process30. The conductive material layer122may be a metallic material including a metal or a metal alloy such as copper, silver, gold, tungsten, cobalt, aluminum, or alloys thereof. In some embodiments, the plating process30includes electrochemical plating (ECP) or the like. For example, after the pre-wetting process20, ECP is performed to fill the opening OP with the conductive material layer122. In some cases, undesirable air bubbles may generate during the plating process30. These air bubbles may be located in the opening OP to create blocking spots and inhibit the conductive material layer122from forming on these blocking spots. A plating apparatus40(shown inFIG.4) and the plating process30(shown inFIG.3) which may remove the air bubbles will be described later.

Referring toFIG.1D, the excess material of the conductive material layer122and the seed material layer121formed over a major surface11aof the base layer11is removed to form the semiconductor structure10having the conductive feature12embedded in the base layer11. For example, the remaining seed material layer121and the remaining conductive material layer122are collectively referred to as the conductive feature12. In some embodiments, a planarization (e.g., chemical mechanical polishing, etching, grinding, a combination thereof, etc.) is performed to remove the excess material. In some embodiments, after the planarization, surfaces of the conductive material layer122and the seed material layer121form a major surface12aof the conductive feature12. As illustrated inFIG.1D, the major surface12aof the conductive feature12is substantially level with the major surface11aof the base layer11. In some embodiments, the barrier liner formed between the base layer11and the seed material layer121is also removed by the planarization.

FIG.2is a schematic cross-sectional view illustrating a plating apparatus40in accordance with some embodiments of the disclosure. Referring toFIG.2, the plating apparatus40includes a tilting mechanism410, a connector420, a rotating mechanism430, a workpiece holder440, a clamp ring450, and a plating bath460. In some embodiments, the tilting mechanism410includes a robotic arm, a gear, a controller, or a combination thereof. In some embodiments, the tilting mechanism410is configured to tilt a semiconductor workpiece W during the plating process30. In some embodiments, the rotating mechanism430includes a motor, a shaft, a controller, or a combination thereof. In some embodiments, the rotating mechanism430is configured to rotate or spin the semiconductor workpiece W during the plating process30.

As illustrated inFIG.2, the connector420physically connects the tilting mechanism410and the rotating mechanism430. That is, the tilting mechanism410is connected to the rotating mechanism430through the connector420. The connector420may be any connecting mechanism that is able to physically connect the tilting mechanism410and the rotating mechanism430. For example, the connector420may be a metal block, a plastic block, or the like that is able to lift the rotating mechanism430, the workpiece holder440, and the clamp ring450.

In some embodiments, the workpiece holder440is connected to the rotating mechanism430and the clamp ring450is connected to the workpiece holder440. For example, the rotating mechanism430is able to drive the movement of the workpiece holder440and the clamp ring450together. In some embodiments, the clamp ring450is engaged to the workpiece holder440. For example, the clamp ring450is detachable from the workpiece holder440. In some embodiments, the workpiece holder440includes a metal block or the like that is able to provide support for the clamp ring450and the semiconductor workpiece W during the plating process30. In some embodiments, the clamp ring450is made of inert materials. For example, the clamp ring450is made of ceramics, polypropylene (PP), polyvinyl chloride (PVC), polyvinylidene difluoride (PVDF), fiber reinforced plastics, stainless steel, polytetrafluoroethene (PTFE), or the like. The detailed configuration of the clamp ring450will be described below.

The plating bath460is located underneath the workpiece holder440and the clamp ring450. In some embodiments, the plating bath460is filled with a plating solution PS. In some embodiments, the plating solution PS is referred to as electrolyte. As illustrated inFIG.2, the semiconductor workpiece W is fixed onto the workpiece holder440through the clamp ring450. In some embodiments, the semiconductor workpiece W is the semiconductor structure10inFIG.1B. That is, the semiconductor workpiece W may be a semiconductor wafer. As such, in some embodiments, the workpiece holder440is referred to as a wafer holder. In some embodiments, the semiconductor workpiece W is placed in a face down manner. That is, a surface of the semiconductor workpiece W that is to be plated faces the plating bath460and the plating solution PS. For example, as illustrated inFIG.2, the seed material layer121faces the plating bath460and the plating solution PS. The plating method30will be described below in conjunction withFIG.2andFIG.3.

FIG.3is a flowchart illustrating a plating process30of a semiconductor workpiece W in accordance with some embodiments of the disclosure. Referring toFIG.2andFIG.3, in step S1, the semiconductor workpiece W is placed on the workpiece holder440of the plating apparatus40. Thereafter, in step S2, the semiconductor workpiece W is fixed to the workpiece holder440by the clamp ring450. In some embodiments, a portion of the clamp ring450is pressed against a portion of the semiconductor workpiece W such that the semiconductor workpiece W is securely fixed onto the workpiece holder440.

In step S3, the semiconductor workpiece W is tilted to a first angle. In some embodiments, the tilting of the semiconductor workpiece W may be achieved by the tilting mechanism410. For example, since the clamp ring450, the workpiece holder440, the rotating mechanism430, and the connector420are connected to the tilting mechanism410, the tilting mechanism410may drive the clamp ring450, the workpiece holder440, the rotating mechanism430and the connector420to tilt to the first angle, thereby allowing the semiconductor workpiece W that is clamped to the workpiece holder440to tilt to the first angle. In some embodiments, the first angle is about 3° with respect to a fluid level of the plating solution PS. In some embodiments, after the semiconductor workpiece W is tilted, the rotating mechanism430is utilized to rotate/spin the semiconductor workpiece W. In some embodiments, a spinning speed of the semiconductor workpiece W ranges from about 10 rpm (revolutions per minute) to about 120 rpm in step S3.

Subsequently, in step S4, the semiconductor workpiece W is immersed into the plating solution PS within the plating bath460. For example, the tilting mechanism410lowers the connector420, the rotating mechanism430, the workpiece holder440, the clamp ring450, and the semiconductor workpiece W such that the semiconductor workpiece W, the workpiece holder440, and the clamp ring450are immersed into the plating solution PS. In some embodiments, the semiconductor workpiece W enters the plating solution PS in a tilting manner. That is, the semiconductor workpiece W is kept to be tilted with the first angle while entering the plating solution PS. In some embodiments, when clamping the semiconductor workpiece W onto the workpiece holder440in step S2, air bubbles may generate on a surface of the semiconductor workpiece W due to the clamping pressure. However, by using angled immersion in step S4, air bubbles on the surface of the semiconductor workpiece W are pushed by the wave advancing from the leading immersion edge toward the trailing immersion edge. As such, the tilted semiconductor workpiece W allows some of the air bubbles to discharge to the atmosphere. After the semiconductor workpiece W is immersed into the plating solution PS, the semiconductor workpiece W is tilted to a second angle. In some embodiments, the second angle is about 0° with respect to the fluid level of the plating solution PS. For example, after the semiconductor workpiece W is immersed into the plating solution PS, the semiconductor workpiece W is tilted back to extend horizontally.

In step S5, the semiconductor workpiece W is plated. In some embodiments, the semiconductor workpiece W is plated by electrodeposition of a conductive material onto the semiconductor workpiece W. The electrodeposition occurs by positioning an anode and the semiconductor workpiece W (the cathode) in the plating solution PS and applying a current such that metal ions in the plating solution PS is plated onto the semiconductor workpiece W. In step S5, the rotating mechanism430is utilized to rotate/spin the semiconductor workpiece W. In some embodiments, a spinning speed of the semiconductor workpiece W ranges from about 30 rpm to about 200 rpm in step S5.

After the electrodeposition of the conductive material onto the semiconductor workpiece W is completed, the plated semiconductor workpiece W is retrieved from the plating bath460in step S6. For example, the tilting mechanism410pulls the semiconductor workpiece W out of the plating solution PS. Thereafter, the rotating mechanism430spins the semiconductor workpiece W to spin dry the semiconductor workpiece W. That is, the plating solution PS left on the semiconductor workpiece W is removed from the semiconductor workpiece W through spinning the semiconductor workpiece W. In some embodiments, a spinning speed of the semiconductor workpiece W ranges from about 250 rpm to about 350 rpm in step S6. In some embodiments, the process in step S6is referred to as reclaim spin.

In step S7, the plated semiconductor workpiece W is rinsed. In some embodiments, the plated semiconductor workpiece W is rinsed by jetting the plated surface of the semiconductor workpiece W with distill water, so as to remove the plating solution PS left on the plated surface of the semiconductor workpiece W. In some embodiments, during step S7, the rotating mechanism430also spins the semiconductor workpiece W. In some embodiments, a spinning speed of the semiconductor workpiece W ranges from about 450 rpm to about 550 rpm in step S7. Thereafter, in step S8, the plated semiconductor workpiece W is dried. In some embodiments, the plated semiconductor workpiece W is dried through spin dry. In some embodiments, a spinning speed of the semiconductor workpiece W ranges from about 700 rpm to about 800 rpm in step S8. In step S9, after the plated semiconductor workpiece W is dried, the plated semiconductor workpiece W is removed from the plating apparatus40, so as to complete the plating process30.

As mentioned above, by immersing the semiconductor workpiece W into the plating solution PS in a tilting manner, some of the air bubbles generated may be discharged. However, depending on the number of air bubbles generated, the angled immersion in step S4may not be sufficient to remove all of the air bubbles. Moreover, during the immersion of the semiconductor workpiece W into the plating solution PS, additional air bubbles may be generated on the surface of the semiconductor workpiece W. The air bubbles on the surface of the semiconductor workpiece W would create blocking spots and inhibits the conductive material from forming on these blocking spots. Therefore, it is crucial to remove the air bubbles on the surface of the semiconductor workpiece W before the conductive material is plated onto the semiconductor workpiece W. In some embodiments, by forming channels in the clamp ring450, the air bubbles may be sufficiently removed through these channels by spinning the semiconductor workpiece W before the semiconductor workpiece W is plated. Various configurations of the clamp ring450having channels will be described below.

FIG.4Ais a schematic bottom view of the semiconductor workpiece W and the clamp ring450inFIG.2.FIG.4Bis a schematic cross-sectional view of the workpiece holder440, the semiconductor workpiece W, and the clamp ring450inFIG.2.FIG.4Cis a partial side view of the clamp ring450inFIG.2. Referring toFIG.4AtoFIG.4C, the clamp ring450is connected to the workpiece holder440. On the other hand, the semiconductor workpiece W is placed over the workpiece holder440and is clamped to the workpiece holder440by the clamp ring450. In some embodiments, the clamp ring450is engaged to the workpiece holder440and is detachable from the workpiece holder440.

As illustrated inFIG.4AandFIG.4B, the clamp ring450includes a body portion452, a protruding portion454, and channels456. In some embodiments, the body portion452is engaged/connected to the workpiece holder440. In some embodiments, the body portion452has an inner surface IS1and an outer surface OS1opposite to the inner surface IS1. In some embodiments, the inner surface IS1of the body portion452is parallel to the outer surface OS1of the body portion452. As illustrated inFIG.4B, the outer surface OS1of the body portion452is aligned with a lateral surface LS440of the workpiece holder440. On the other hand, the inner surface IS1of the body portion452is coplanar with a lateral surface LSWof the semiconductor workpiece W. That is, the body portion452covers the lateral surface LSWof the semiconductor workpiece W. In some embodiments, a bottom surface BS452of the body portion452is substantially coplanar with a bottom surface BSWof the semiconductor workpiece W. In some embodiments, the body portion452has a rectangular cross-sectional view, as shown inFIG.4B.

In some embodiments, the protruding portion454of the clamp ring450is connected to the body portion452of the clamp ring450. For example, the protruding portion454protrudes from the bottom surface BS452of the body portion452. In some embodiments, the protruding portion454and the body portion452of the clamp ring450are integrally formed. For example, the protruding portion454and the body portion452are made of a same material. In some embodiments, the protruding portion454has an inner surface IS2and an outer surface OS2. In some embodiments, the inner surface IS2of the protruding portion454is not parallel to the outer surface OS2of the protruding portion454. In some embodiments, the inner surface IS2of the protruding portion454is an inclined surface. That is, the protruding portion454has an inclined inner surface IS2. In some embodiments, the inclined inner surface IS2of the protruding portion454is connected to the outer surface OS2of the protruding portion454. In some embodiments, the protruding portion454further has a top surface TS454which connects the outer surface OS2and the inclined inner surface IS2. In some embodiments, the protruding portion454has a triangular cross-sectional view, as shown inFIG.4B. In some embodiments, the top surface TS454of the protruding portion454is coplanar with the bottom surface BS452of the body portion452and the bottom surface BSWof the semiconductor workpiece W. That is, a portion of the protruding portion454extends horizontally to cover a portion of the bottom surface BSWof the semiconductor workpiece W. In some embodiments, the outer surface OS2of the protruding portion454is aligned with the outer surface OS1of the body portion452. In some embodiments, the protruding portion454is a continuous pattern. For example, as illustrated in the bottom view ofFIG.4A, the protruding portion454is a continuous ring.

In some embodiments, the inner surface IS1of the body portion452and the inner surface IS2of the protruding portion454are collectively referred to as an inner surface IS of the clamp ring450. Similarly, the outer surface OS1of the body portion452and the outer surface OS2of the protruding portion454are collectively referred to as an outer surface OS of the clamp ring450. As illustrated inFIG.4AandFIG.4B, the channels456penetrate through the clamp ring450to communicate the inner surface IS and the outer surface OS of the clamp ring450. Since the channels456communicate the inner surface IS and the outer surface OS of the clamp ring450, the channels456may serve as discharging mechanisms for the air bubbles trapped on the bottom surface BSWof the semiconductor workpiece W during the plating process30. For example, the air bubbles are removed through the channels456of the clamp ring450by spinning the semiconductor workpiece W before the semiconductor workpiece W is plated (i.e. between step S4and step S5inFIG.3). In some embodiments, the undesired air bubbles on the bottom surface BSWof the semiconductor workpiece W can be expelled through the channels456of the clamp ring450by the forced centrifugal direction flow, which is generated by the pressure difference between the inner surface IS and the outer surface OS of the clamp ring450when the semiconductor workpiece W is spinning in the plating bath460according to Bernoulli's principle. For example, since the velocity at the inner surface IS is smaller than the velocity at the outer surface OS, the pressure at the inner surface IS is larger than the pressure at the outer surface OS. The larger pressure at the inner surface IS would push the air bubbles to the outer surface with lower pressure, and the channels456provide paths for the air bubbles to travel from the inner surface IS to the outer surface OS of the clamp ring450. As such, the undesired air bubbles may be expelled from the semiconductor workpiece W, and the plating quality may be sufficiently enhanced. In some embodiments, since the channels456provide the paths for air to travel, the channels456are referred to as vents.

In some embodiments, the channels456penetrate through the protruding portion454of the clamp ring450to communicate the inner surface IS2and the outer surface OS2of the protruding portion454. As illustrated inFIG.4B, since the channels456are located within the protruding portion454of the clamp ring450, the channels456(i.e. the vents) are also located below the bottom surface BSWof the semiconductor workpiece W. As illustrated inFIG.4AandFIG.4B, each channel456has a first end located at the inner surface IS of the clamp ring450and a second end located at the outer surface OS of the clamp ring450. In some embodiments, the first end is referred to as an inlet IL and the second end is referred as an outlet OL. For example, each vent has an inlet IL and an outlet OL. In some embodiments, the inlets IL of the channels456(i.e. the vents) are located on the inclined inner surface IS2of the protruding portion454while the outlets OL of the channels456(i.e. the vents) are located on the outer surface OS2of the protruding portion454. Moreover, the inlets IL are closer to the semiconductor workpiece W than the outlets OL.

As illustrated inFIG.4AtoFIG.4C, the channels456are circular channels. That is, the inlets IL and the outlets OL of the channel456are circular openings. However, the disclosure is not limited thereto. In some alternative embodiments, the channels456may be rectangular channels, triangular channels, or may have other geometries. In some embodiments, a size of the first end (i.e. the inlet IL) of the channel456is substantially equal to a size of the second end (i.e. the outlet OL) of the channel456. For example, a radius R1of the inlet IL of the channel456is substantially equal to a radius R2of the outlet OL of the channel456. In some embodiments, the radius R1and the radius R2range from about 3 μm to about 10 μm. In some embodiments, a distance d between two adjacent channels456ranges from about 5 μm to about 10 μm. As illustrated inFIG.4A, each channel456is curved along a counterclockwise direction from the bottom view. In some embodiments, when the semiconductor workpiece W is spun along the counterclockwise direction, the arrangement of the channels456may further aid the air bubbles to travel from the inner surface IS to the outer surface OS of the clamp ring450rapidly.

FIG.5Ais a schematic cross-sectional view of a workpiece holder440, a semiconductor workpiece W, and a clamp ring450ain accordance with some alternative embodiments of the disclosure.FIG.5Bis a partial side view of the clamp ring450ain accordance with some alternative embodiments of the disclosure. Referring toFIG.5AandFIG.5B, the workpiece holder440, the semiconductor workpiece W, and the clamp ring450ainFIG.5AandFIG.5Bare respectively similar to the workpiece holder440, the semiconductor workpiece W, and the clamp ring450inFIG.4AtoFIG.4C, so similar elements are denoted by the same reference numeral and the detailed descriptions thereof are omitted herein. However, in the clamp ring450aofFIG.5AandFIG.5B, multiple rows of channels456are provided in the protruding portion454. For example, as illustrated inFIG.5B, multiple channels456are aligned along a vertical (i.e. z-axis) direction. That is, each channel456is aligned with a corresponding channel456in the adjacent row. In some embodiments, each channel456is parallel with another channel456that is located directly above or directly underneath it.

FIG.6is a schematic bottom view of a semiconductor workpiece W and a clamp ring450bin accordance with some alternative embodiments of the disclosure. Referring toFIG.6, the semiconductor workpiece W and the clamp ring450binFIG.6are respectively similar to the semiconductor workpiece W and the clamp ring450inFIG.4AtoFIG.4C, so similar elements are denoted by the same reference numeral and the detailed descriptions thereof are omitted herein. However, in the clamp ring450bofFIG.6, a size of the first end (i.e. the inlet IL) of the channel456is different from a size of the second end (i.e. the outlet OL) of the channel456. In some embodiments, a radius R1of the inlet IL of the channel456is smaller than a radius R2of the outlet OL of the channel456. For example, the size of each channel456gradually increases from the inner surface IS of the clamp ring450btoward the outer surface OS of the clamp ring450b. In some embodiments, each channel456is a horn shape. In some embodiments, the radius R1ranges from about 3 μm to about 7 μm and the radius R2ranges from about 8 μm to about 15 μm.

FIG.7is a schematic bottom view of a semiconductor workpiece W and a clamp ring750cin accordance with some alternative embodiments of the disclosure. Referring toFIG.7, the semiconductor workpiece W and the clamp ring450cinFIG.7are respectively similar to the semiconductor workpiece W and the clamp ring450inFIG.4AtoFIG.4C, so similar elements are denoted by the same reference numeral and the detailed descriptions thereof are omitted herein. However, in the clamp ring450cofFIG.7, a size of the first end (i.e. the inlet IL) of the channel456is different from a size of the second end (i.e. the outlet OL) of the channel456. In some embodiments, a radius R1of the inlet IL of the channel456is larger than a radius R2of the outlet OL of the channel456. For example, the size of each channel456gradually decreases from the inner surface IS of the clamp ring450ctoward the outer surface OS of the clamp ring450c. In some embodiments, each channel456is a horn shape. In some embodiments, the radius R1ranges from about 8 μm to about 15 μm and the radius R2ranges from about 3 μm to about 7 μm.

FIG.8is a schematic bottom view of a semiconductor workpiece W and a clamp ring450din accordance with some alternative embodiments of the disclosure. Referring toFIG.8, the semiconductor workpiece W and the clamp ring450dinFIG.8are respectively similar to the semiconductor workpiece W and the clamp ring450inFIG.4AtoFIG.4C, so similar elements are denoted by the same reference numeral and the detailed descriptions thereof are omitted herein. However, in the clamp ring450dofFIG.8, each channel456is curved along a clockwise direction from the bottom view. In some embodiments, when the semiconductor workpiece W is spun along the clockwise direction, the arrangement of the channels456may further aid the air bubbles to travel from the inner surface IS to the outer surface OS of the clamp ring450drapidly.

FIG.9Ais a schematic bottom view of a semiconductor workpiece W and a clamp ring450ein accordance with some alternative embodiments of the disclosure.FIG.9Bis a partial perspective view of the semiconductor workpiece W and the clamp ring450ein accordance with some alternative embodiments of the disclosure.FIG.9Cis a partial side view of the clamp ring450ein accordance with some alternative embodiments of the disclosure. For simplicity in visualization, orientations of the semiconductor workpiece W and the clamp ring450einFIG.9Bare flipped as compared toFIG.9AandFIG.9C. Referring toFIG.9AtoFIG.9C, the semiconductor workpiece W and the clamp ring450einFIG.9AtoFIG.9Care respectively similar to the semiconductor workpiece W and the clamp ring450inFIG.4AtoFIG.4C, so similar elements are denoted by the same reference numeral and the detailed descriptions thereof are omitted herein. However, the channels456in the clamp ring450ofFIG.4AtoFIG.4Care omitted in the clamp ring450eofFIG.9AtoFIG.9C. In some embodiments, the clamp ring450eincludes a body portion454, a protruding portion545, and channels458. The body portion452of the clamp ring450einFIG.9AtoFIG.9Cis similar to the body portion452inFIG.4AtoFIG.4C, so the detailed description thereof is omitted herein.

In some embodiments, the protruding portion454of the clamp ring450einFIG.9AtoFIG.9Cis similar to the protruding portion454of the clamp ring450inFIG.4AtoFIG.4C. However, the protruding portion454of the clamp ring450eis not a continuous pattern. For example, the protruding portion454of the clamp ring450eincludes a plurality of protruding patterns454adisconnected from one another. That is, the protruding patterns454aare spatially separated from one another. In some embodiments, the protruding portion454of the clamp ring450eis connected to the body portion452of the clamp ring450e. For example, the protruding patterns454aof the protruding portion454protrude from the bottom surface BS452of the body portion452. In some embodiments, the protruding patterns454aand the body portion452of the clamp ring450eare integrally formed. However, the disclosure is not limited thereto. In some alternative embodiments, the protruding patterns454amay be installed on the body portion452and may be detachable from the body portion452. A material of the protruding patterns454amay be the same as or different from the material of the body portion452. In some embodiments, each protruding pattern454ahas an inner surface IS2and an outer surface OS2. In some embodiments, the inner surface IS2of the protruding pattern454ais not parallel to the outer surface OS2of the protruding pattern454a. In some embodiments, the inner surface IS2of the protruding pattern454ais an inclined surface. That is, the protruding pattern454ahas an inclined inner surface IS2. In some embodiments, the inclined inner surface IS2of the protruding pattern454ais connected to the outer surface OS2of the protruding pattern454a. In some embodiments, each of the protruding patterns454ais a triangular prism, as shown inFIG.9B. In some embodiments, a portion of each protruding pattern454aextends horizontally to cover a portion of the bottom surface BSWof the semiconductor workpiece W. In some embodiments, the outer surface OS2of the protruding pattern454ais aligned with the outer surface OS1of the body portion452.

In some embodiments, the inner surface IS1of the body portion452and the inner surfaces IS2of the protruding patterns454a(i.e. the protruding portion454) are collectively referred to as an inner surface IS of the clamp ring450e. Similarly, the outer surface OS1of the body portion452and the outer surface OS2of protruding patterns454a(i.e. the protruding portion454) are collectively referred to as an outer surface OS of the clamp ring450e. As illustrated inFIG.9AandFIG.9B, each channel458is located between two adjacent protruding patterns454ato communicate the inner surface IS and the outer surface OS of the clamp ring450e. For example, each channel458is defined by a space between two adjacent protruding patterns454a. Since the channels458communicate the inner surface IS and the outer surface OS of the clamp ring450e, the channels458may serve as discharging mechanisms for the air bubbles trapped on the bottom surface BSWof the semiconductor workpiece W during the plating process30. For example, the air bubbles are removed through the channels458of the clamp ring450eby spinning the semiconductor workpiece W before the semiconductor workpiece W is plated. In some embodiments, the undesired air bubbles on the bottom surface BSWof the semiconductor workpiece W can be expelled through the channels458of the clamp ring450eby the forced centrifugal direction flow when the semiconductor workpiece W is spinning in the plating bath460. As such, the plating quality may be sufficiently enhanced. In some embodiments, since the channels458provide the paths for air to travel, the channels458are referred to as vents.

As illustrated inFIG.9BandFIG.9C, since the channels458are located between two adjacent protruding patterns454aof the clamp ring450e, the channels458(i.e. the vents) are also located below the bottom surface BSWof the semiconductor workpiece W. As illustrated inFIG.9A, each channel458has a first end located at a same plane as the inner surface IS of the clamp ring450eand a second end located at a same plane as the outer surface OS of the clamp ring450e. In some embodiments, the first end is referred to as an inlet IL and the second end is referred as an outlet OL. For example, each vent has an inlet IL and an outlet OL. In some embodiments, the inlets IL of the channels458(i.e. the vents) are located at a same plane as the inclined inner surfaces IS2of the protruding patterns454awhile the outlets OL of the channels458(i.e. the vents) are located at a same plane as the outer surfaces OS2of the protruding patterns454a. Moreover, the inlets IL are closer to the semiconductor workpiece W than the outlets OL.

As illustrated inFIG.9AtoFIG.9C, the channels458are open channels. In some embodiments, a size of the each channel458is substantially equal to a distance between two adjacent protruding patterns454a. In some embodiments, a size of the first end (i.e. the inlet IL) of the channel458is substantially equal to a size of the second end (i.e. the outlet OL) of the channel458. For example, a width w1of the inlet IL of the channel458is substantially equal to a width w2of the outlet OL of the channel458. In some embodiments, the width w1and the width w2range from about 5 μm to about 15 μm. In some embodiments, a width w3of each protruding pattern454ais not uniform. For example, the width w3of the protruding pattern454agradually increases or decreases from the inner surface IS2of the protruding pattern454atoward the outer surface OS2of the protruding pattern454a. However, the disclosure is not limited thereto. In some alternative embodiments, the width w3of each protruding pattern454ais uniform. In some embodiments, the width w3of each protruding pattern454aranges from about 5 μm to about 15 μm. As illustrated inFIG.9A, each channel458is curved along a counterclockwise direction from the bottom view. In some embodiments, when the semiconductor workpiece W is spun along the counterclockwise direction, the arrangement of the channels458may further aid the air bubbles to travel from the inner surface IS to the outer surface OS of the clamp ring450frapidly.

FIG.10is a schematic bottom view of a semiconductor workpiece W and a clamp ring450fin accordance with some alternative embodiments of the disclosure. Referring toFIG.10, the semiconductor workpiece W and the clamp ring450finFIG.10are respectively similar to the semiconductor workpiece W and the clamp ring450einFIG.9AtoFIG.9C, so similar elements are denoted by the same reference numeral and the detailed descriptions thereof are omitted herein. However, in the clamp ring450fofFIG.10, a size of the first end (i.e. the inlet IL) of the channel458is different from a size of the second end (i.e. the outlet OL) of the channel458. In some embodiments, a width w1of the inlet IL of the channel458is smaller than a width w2of the outlet OL of the channel458. For example, the size of each channel458gradually increases from the inner surface IS of the clamp ring450ftoward the outer surface OS of the clamp ring450f. In some embodiments, each channel458is a horn shape. In some embodiments, the width w1ranges from about 3 μm to about 7 μm and the width w2ranges from about 8 μm to about 12 μm. In some embodiments, a width w3of each protruding pattern454ais not uniform. For example, the width w3of the protruding pattern454agradually decreases from the inner surface IS2of the protruding pattern454atoward the outer surface OS2of the protruding pattern454a. However, the disclosure is not limited thereto. In some alternative embodiments, the width w3of each protruding pattern454ais uniform. In some embodiments, the width w3of each protruding pattern454aranges from about 5 μm to about 15 μm.

FIG.11is a schematic bottom view of a semiconductor workpiece W and a clamp ring450gin accordance with some alternative embodiments of the disclosure. Referring toFIG.11, the semiconductor workpiece W and the clamp ring450ginFIG.11are respectively similar to the semiconductor workpiece W and the clamp ring450einFIG.9AtoFIG.9C, so similar elements are denoted by the same reference numeral and the detailed descriptions thereof are omitted herein. However, in the clamp ring450gofFIG.11, a size of the first end (i.e. the inlet IL) of the channel458is different from a size of the second end (i.e. the outlet OL) of the channel458. In some embodiments, a width w1of the inlet IL of the channel458is larger than a width w2of the outlet OL of the channel458. For example, the size of each channel458gradually decreases from the inner surface IS of the clamp ring450gtoward the outer surface OS of the clamp ring450g. In some embodiments, each channel458is a horn shape. In some embodiments, the width w1ranges from about 8 μm to about 12 μm and the width w2ranges from about 3 μm to about 7 μm. In some embodiments, a width w3of each protruding pattern454ais not uniform. For example, the width w3of the protruding pattern454agradually increases from the inner surface IS2of the protruding pattern454atoward the outer surface OS2of the protruding pattern454a. However, the disclosure is not limited thereto. In some alternative embodiments, the width w3of each protruding pattern454ais uniform. In some embodiments, the width w3of each protruding pattern454aranges from about 5 μm to about 15 μm.

FIG.12is a schematic bottom view of a semiconductor workpiece W and a clamp ring450hin accordance with some alternative embodiments of the disclosure. Referring toFIG.12, the semiconductor workpiece W and the clamp ring450hinFIG.12are respectively similar to the semiconductor workpiece W and the clamp ring450einFIG.9AtoFIG.9C, so similar elements are denoted by the same reference numeral and the detailed descriptions thereof are omitted herein. However, in the clamp ring450hofFIG.10, each channel458is curved along a clockwise direction from the bottom view. In some embodiments, when the semiconductor workpiece W is spun along the clockwise direction, the arrangement of the channels458may further aid the air bubbles to travel from the inner surface IS to the outer surface OS of the clamp ring450hrapidly.

FIG.13Ais a schematic bottom view of a semiconductor workpiece W and a clamp ring450iin accordance with some alternative embodiments of the disclosure.FIG.13Bis a partial side view of the clamp ring450iin accordance with some alternative embodiments of the disclosure. Referring toFIG.13AandFIG.13B, the semiconductor workpiece W and the clamp ring450iinFIG.13AandFIG.13Bare respectively similar to the semiconductor workpiece W and the clamp ring450einFIG.9AtoFIG.9C, so similar elements are denoted by the same reference numeral and the detailed descriptions thereof are omitted herein. However, the clamp ring450iinFIG.13AandFIG.13Bfurther includes a plurality of channels456. In some embodiments, the channels456of the clamp ring450iinFIG.13AandFIG.13Bare similar to the channels456of the clamp ring450inFIG.4AtoFIG.4C, so the detailed descriptions thereof are omitted herein. As illustrated inFIG.13B, the channels456penetrate through the protruding patterns454aof the protruding portion454. In some embodiments, each protruding pattern454acorrespond to one channel456. However, the disclosure is not limited thereto. In some alternative embodiments, multiple channels456may penetrate through a same protruding pattern454a. Since the channels456and the channels458communicate the inner surface IS and the outer surface OS of the clamp ring450i, the channels456and the channels458may serve as discharging mechanisms for the air bubbles trapped on the bottom surface BSWof the semiconductor workpiece W during the plating process30. In some embodiments, the undesired air bubbles on the bottom surface BSWof the semiconductor workpiece W can be expelled through the channels456and the channels458of the clamp ring450i. As such, the plating quality may be sufficiently enhanced.

In accordance with some embodiments of the disclosure, a plating apparatus includes a workpiece holder, a plating bath, and a clamp ring. The plating bath is underneath the workpiece holder. The clamp ring is connected to the workpiece holder. The clamp ring includes channels communicating an inner surface of the clamp ring and an outer surface of the clamp ring.

In accordance with some alternative embodiments of the disclosure, a plating apparatus for plating a semiconductor wafer includes a wafer holder, a plating bath, and a clamp ring. The plating bath is underneath the wafer holder. The clamp ring is connected to the wafer holder. The clamp ring includes a body portion, a protruding portion connected to the body portion, and vents. The protruding portion covers a portion of a bottom surface of the semiconductor wafer and has an inclined inner surface. The vents are located below the bottom surface of the semiconductor wafer. The vents has inlets and outlets, and the inlets are closer to the semiconductor wafer than the outlets.

In accordance with some embodiments of the disclosure, a plating method includes at least the following steps. A semiconductor workpiece is placed on a workpiece holder. The semiconductor workpiece is fixed to the workpiece holder by a clamp ring. The clamp ring is connected to the workpiece holder. The clamp ring includes channels communicating an inner surface of the clamp ring and an outer surface of the clamp ring. The semiconductor workpiece is tilted to a first angle. The semiconductor workpiece is immersed into a plating solution within a plating bath and the semiconductor workpiece is tilted to a second angle. The semiconductor workpiece is plated.

The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.