Patent ID: 12237272

DETAILED DESCRIPTION

Common reference numerals are used throughout the drawings and the detailed description to indicate the same or similar components. Embodiments of the present disclosure will be readily understood from the following detailed description taken in conjunction with the accompanying drawings.

The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to explain certain aspects of the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed or disposed in direct contact, and may also include embodiments in which additional features may be formed or disposed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

FIG.1Ais a cross-sectional view of an electronic device1, in accordance with an embodiment of the present disclosure. Referring toFIG.1, the electronic device1includes a carrier10, an electronic component14, an encapsulant15, and an element16.

In some embodiments, the electronic device1may be or include, for example, an antenna device or an antenna package. In some embodiments, the electronic device1may be or include, for example, a wireless device, such as an user equipment (UE), a mobile station, a mobile device, an apparatus communicating with the Internet of Things (IoT), etc.

In some embodiments, the carrier10(or a supporting element) may be or include, for example, a substrate. In some embodiments, the carrier10may be or include, for example, a printed circuit board, such as a paper-based copper foil laminate, a composite copper foil laminate, or a polymer-impregnated glass-fiber-based copper foil laminate.

The carrier10may have a surface101, a surface102opposite to the surface101, and a surface103extending between the surface101and the surface102. In some embodiments, the surface101and/or the surface102may be substantially parallel to a first direction or a first orientation (such as an x-axis as shown inFIG.1A). In some embodiments, the surface101and/or the surface102may be substantially perpendicular to a second direction or a second orientation (such as a y-axis as shown inFIG.1A). In some embodiments, the surface103may be substantially parallel to the second direction (e.g., the y-axis).

In some embodiments, the carrier10may include conductive pad(s), trace(s), via(s), or other interconnection(s). For example, the carrier10may include one or more transmission lines (e.g., communications cables) and one or more grounding lines and/or grounding planes. For example, the carrier10may include one or more conductive pads10ain proximity to, adjacent to, or embedded in and exposed at the surface101and/or the surface102of the carrier10. The carrier10may include a solder resist (such as at regions102aand102bof the surface102) on the surface101and/or the surface102to fully expose or to expose at least a portion of the conductive pads10afor electrical connections.

In some embodiments, the carrier10may include recesses (or openings)10rand10r′. In some embodiments, the recess10rmay be recessed from the surface102to the surface101. In some embodiments, the recess10rmay be recessed from the surface103into the carrier10.

In some embodiments, the recess10rmay include a ladder or a stepped structure at a periphery of the carrier10. For example, the recess10rmay be adjacent to the surface103. For example, the recess10rmay include a sidewall10rsangled with or non-parallel to the surface102and a bottom surface10rbangled with or non-parallel to the sidewall10rs. The sidewall10rsmay connect the surface102and the bottom surface10rb. The bottom surface10rbmay connect the sidewall10rsand the surface103. In some embodiments, the bottom surface10rbmay be substantially parallel to the surface102. However, in some other embodiments, the bottom surface10rbmay be non-parallel to the surface102.

In some embodiments, the recess10r′ may be recessed from the surface102to the surface101. In some embodiments, the recess10r′ may be recessed from the surface103into the carrier10. The recess10r′ may have the same or similar configuration as the recess10rand the same or similar details of the recess10r′ are not repeated here for conciseness. In some embodiments, the encapsulant15and the carrier10may define a ladder or a stepped structure.

In some embodiments, the carrier10may include a radiating region11and a non-radiating region13. In some embodiments, the radiating region11may be spaced apart from the non-radiating region13. In some embodiments, the radiating region11may be disposed adjacent to the surface101of the carrier10and the non-radiating region13may be disposed adjacent to the surface102of the carrier10. In some embodiments, the radiating region11may be referred to as a region configured for signal transmission and reception and the non-radiating region13may be referred to as a region configured to route, signal, power, ground, clock, or the like.

In some embodiments, for enhancing antenna performance, a dimension (such as a thickness) of the radiating region11measured along the first direction (such as the x-axis as shown inFIG.1A) may be greater than a dimension (such as a thickness) of the non-radiating region13measured along the first direction. In some embodiments, the radiating region11may have a thickness greater than about 70 micrometers (μm), such as about 700 μm or more. In some embodiments, the non-radiating region13may have a thickness between about 30 μm and about 60 μm.

In some embodiments, the radiating region11and the non-radiating region13may be electrically connected through, for example, a conductive element12. In some embodiments, the radiating region11may be physically spaced apart from the non-radiating region13through the conductive element12. For example, the conductive element12may be disposed between the radiating region11and the radiating region13.

In some embodiments, the radiating region11may be or include, for example, an antenna layer. For example, the radiating region11may include one or more conductive layers11aand one or more dielectric layers11b. In some embodiments, the conductive layers11amay be embedded in the radiating region11. In some embodiments, a part of the conductive layers11amay be covered by the dielectric layers11bwhile another part of the conductive layers11amay be exposed from the dielectric layers11b. For example, the conductive layers11amay be exposed from the surface101. In some embodiments, the conductive layer11amay define a patterned antenna, such as a directional antenna, an omnidirectional antenna, an antenna array. For example, the conductive layer11amay define a patch antenna. In some embodiments, the conductive layer11amay be or include one or more light emitting devices or sensors. In some embodiments, the conductive layer11amay support fifth generation (5G) and/or millimeter (mm) wave communications. For example, the conductive layer11amay be configured for transmission and reception using millimeter wave signals. In some embodiments, the conductive layer11amay be operated at 27.5-29.5 GHz.

In some embodiments, the conductive layer11amay include, a conductive material such as a metal or metal alloy. Examples of the conductive material include gold (Au), silver (Ag), copper (Cu), platinum (Pt), Palladium (Pd), other metal(s) or alloy(s), or a combination of two or more thereof. In some embodiments, the dielectric layer11bmay include pre-impregnated composite fibers (e.g., pre-preg), Borophosphosilicate Glass (BPSG), silicon oxide, silicon nitride, silicon oxynitride, Undoped Silicate Glass (USG), any combination thereof, or the like. Examples of a pre-preg may include, but are not limited to, a multi-layer structure formed by stacking or laminating a number of pre-impregnated materials/sheets. In some embodiments, the radiating region11(such as the dielectric layer11b) may include liquid crystal polymers (LCPs).

In some embodiments, the non-radiating region13may be or include, for example, a circuit layer or a building-up circuit. For example, the non-radiating region13may include one or more conductive layers and one or more dielectric layers13b. The conductive layers may include routing traces to route, signal, power, ground, clock, or the like. For example, a grounding layer13amay be disposed in the dielectric layers13b. A part of the grounding layer13amay be covered by the dielectric layers13bwhile another part of the grounding layer13amay be exposed from the dielectric layers13b.

For example, a part of the grounding layer13amay be exposed from the recess10r. For example, a part of the grounding layer13amay be exposed from the bottom surface10rband/or the sidewall10rs. In some other embodiments, more grounding layers13amay be exposed from the recess10r. For example, two, three, four, or more grounding layers13amay be exposed from the recess10r. The multiple grounding layers13amay be at least partially overlapped along the second direction (e.g., the y-axis). In some embodiments, a dielectric constant (Dk) of the non-radiating region13(such as the dielectric layers13b) may be greater than a Dk of the radiating region11(such as the dielectric layers11b).

In some embodiments, the conductive element12may include a controlled collapse chip connection (C4) bump, a ball grid array (BGA) or a land grid array (LGA). In some embodiments, a connection layer12umay be disposed between the radiating region11and the non-radiating region13to cover the conductive element12. In some embodiments, the connection layer12umay include an underfill or an adhesive layer. However, in other embodiments, the connection layer12umay be omitted. In some embodiments, a dielectric constant (Dk) of the connection layer12umay be equal to or less than 13, such as between about 11 and about 13. In some embodiments, the connection layer12umay include a soldering material, such as solder or conductive paste.

In some embodiments, the conductive element12may be considered as a portion of the radiating region11or a portion of the non-radiating region13. For example, the conductive element12may be a conductive terminal of the radiating region11and at least partially exposed from the dielectric layer11b. Alternatively, the conductive element12may be a conductive terminal of the non-radiating region13and at least partially exposed from the dielectric layer13b.

In some embodiments, the electronic component14may be disposed on the surface102of the carrier10. The electronic component14may be electrically connected to one or more other electrical components (if any) and to the carrier10(e.g., to the interconnection(s)), and the electrical connection may be attained by way of flip-chip, wire-bond techniques, metal to metal bonding (such as Cu to Cu bonding), or hybrid bonding.

In some embodiments, the electronic component14may be a chip or a die including a semiconductor substrate, one or more integrated circuit devices and one or more overlying interconnection structures therein. The integrated circuit devices may include active devices such as transistors and/or passive devices such as resistors, capacitors, inductors, or a combination thereof. In some embodiments, the electronic component14may be integrated circuit (IC) dies, radio frequency ICs (RFICs), power management ICs (PMICs), surface mount devices (SMDs), etc.

In some embodiments, the encapsulant15may be formed on the surface102of the carrier10to encapsulate the electronic component14. In some embodiments, the encapsulant15may include a surface151facing the carrier10, a top surface152opposite to the surface151, and multiple lateral surfaces (such as the lateral surfaces153and155) extending between the surface151and the top surface152. The lateral surface155may be opposite to the lateral surface153from a cross-sectional perspective.

In some embodiments, the surface102of the carrier10may include the region102aand the region102bconnected with the region102b. The region102bof the surface102may be covered or overlapped with the electronic component14and the encapsulant15in the second direction (e.g., the y-axis). The region102aof the surface102may be spaced apart from (or non-overlapping with) the electronic component14and the encapsulant15in the second direction (e.g., the y-axis). In some embodiments, the region102amay include a dielectric material, such as a solder resist.

The lateral surface153of the encapsulant15may face the region102aof the surface102. For example, from a cross-sectional perspective, the lateral surface153may be closer to the region102athan the lateral surface155.

In some embodiments, a slope of the lateral surface153of the encapsulant15and a slope of the lateral surface155of the encapsulant15may be different. In some embodiments, the lateral surface153of the encapsulant15may define an angle “θ1” with the surface102of the substrate10and the lateral surface155of the encapsulant15may define an angle “θ2” with the surface102of the substrate10. In some embodiments, the angle θ1and the angle θ2may be different. For example, the angle θ1may be greater than the angle θ2. For example, the angle θ1may be substantially greater than about 90 degrees, and the angle θ2may be substantially equal to about 90 degrees.

In some embodiments, a roughness of the lateral surface153of the encapsulant15and a roughness of the lateral surface155of the encapsulant15may be different. For example, a roughness of the lateral surface153of the encapsulant15may be substantially greater than a roughness of the lateral surface155of the encapsulant15.

During a manufacturing process of the electronic device1according to some embodiments of the present disclosure, the lateral surface155of the encapsulant15is cut or sawed substantially along the second direction (e.g., the y-axis) while the lateral surface153of the encapsulant15is not (such as shown inFIG.2D-1andFIG.2D-2). After the cutting or sawing operation, the slopes of the lateral surface153and the lateral surface155may be different. In addition, the roughness values of the lateral surface153and the lateral surface155may be different.

In some embodiments, the lateral surface155of the encapsulant15may be substantially coplanar with the sidewall (not labelled in the figures) of the recess10rs′.

In some embodiments, the encapsulant15may include an epoxy resin having fillers, a molding compound (e.g., an epoxy molding compound or other molding compound), a polyimide, a phenolic compound or material, a material with a silicone dispersed therein, or a combination thereof.

In some embodiments, the element16may be configured to provide an electromagnetic interference (EMI) shielding protection for the non-radiating region13of the carrier10. For example, the element16may be configured to provide an EMI shielding to prevent the electronic component14from being interfered with by other electronic components, and vice versa. In some embodiments, the element16may be configured to allow a gain of the radiating region11to be greater than 20 dB.

In some embodiments, the element16may include copper (Cu) or other conductive materials, such as aluminum (Al), chromium (Cr), tin (Sn), gold (Au), silver (Ag), nickel (Ni) or stainless steel, another metal, or a mixture, an alloy, or other combinations of two or more thereof. In some embodiments, the element16may be or include a conductive layer or a conductive thin film. In some embodiments, the element16may be implemented using a conformal molding with a sputtered shield (such as shown inFIG.2E-1andFIG.2E-2). In some embodiments, the element16may be or include a multi-layered structure. For example, layers of the element16from the inside to the outside may include a seed layer (such as porous stainless steel, SUS), a conductive layer (such as Cu), and a protection layer (such as SUS).

In some embodiments, the element16may be disposed on the surface102of the carrier10and physically spaced apart from the surface101of the carrier10. For example, the element16may be disposed on the non-radiating region13and physically spaced apart from the radiating region11. For example, the element16may be physically spaced apart from the radiating region11through the non-radiating region13. For example, the element16may be physically spaced apart from the conductive layer11a(e.g., the antenna layer) in the radiating region11. For example, the element16may not contact the conductive layer11a(e.g., the antenna layer) in the radiating region11.

In some embodiments, the surface102of the carrier10may be partially covered by or overlapped with the element16in the second direction (e.g., the y-axis). For example, the element16may be disposed on the region102bof the surface102of the carrier10. For example, the region102bof the surface102of the carrier10may be at least partially covered by or overlapped with the element16. On the other hand, the region102aof the surface102of the carrier10may be at least partially exposed from the element16.

Specifically, for example, the element16may be disposed on the encapsulant15. For example, the element16may be disposed on the external surfaces (e.g., the top surface152and the lateral surfaces including the lateral surfaces153and155) of the encapsulant15.

In some embodiments, the element16may be disposed within the recess10r. For example, the element16may be disposed on and contact the bottom surface10rband/or the sidewall10rsof the recess10r.

In some embodiments, the element16may contact the grounding layer13a. For example, the element16may contact a part of the grounding layer13aexposed from the bottom surface10rband/or the sidewall10rs. For example, the element16may be electrically connected with the grounding layer13aand thus be grounded.

Similarly, the element16may be disposed within the recess10r′. In some embodiments, the element16may be disposed on a planar surface defined by the lateral surface155of the encapsulant15and the sidewall (not labelled in the figures) of the recess10rs′.

In some embodiments, the surface103of the substrate10may be at least partially exposed from the element16. For example, the surface103of the substrate10may include a lateral surface131of the non-radiating region13and a lateral surface111of the radiating region11.

The recess10rmay be recessed from the lateral surface131of the non-radiating region13into the radiating region13. Therefore, the element16may be overlapping with the sidewall10rsof the recess10rand be non-overlapping with the surface131of the non-radiating region13in the first direction (e.g., the x-axis). In addition, the element16may be overlapping with the bottom surface10rbof the recess10rin the second direction (e.g., the y-axis).

In some embodiments, the lateral surface111of the radiating region11may be at least partially exposed from the element16. In some embodiments, the lateral surface111of the radiating region11may be entirely exposed from the element16. For example, the element16and the lateral surface111of the radiating region11may be non-overlapping in the first direction (e.g., the x-axis). For example, the element16and the conductive layer11a(e.g., the antenna layer) in the radiating region11may be non-overlapping in the first direction (e.g., the x-axis). In some embodiments, the signal transmission and reception of the conductive layer11a(e.g., the antenna layer) in the radiating region11may not be blocked or interrupted by the element16.

In some embodiments, the element16and the radiating region11may be at least partially overlapping in the second direction (e.g., the y-axis). For example, the element16and the conductive layer11a(e.g., the antenna layer) in the radiating region11may be at least partially overlapping in the second direction (e.g., the y-axis).

In some embodiments, the conductive element12may be at least partially exposed from the element16. In some embodiments, the conductive element12may be entirely exposed from the element16. For example, the element16and the conductive element12may be non-overlapping in the first direction (e.g., the x-axis). In some embodiments, the element16and conductive element12may be at least partially overlapping in the second direction (e.g., the y-axis).

FIG.1Bis a cross-sectional view of an electronic device2, in accordance with an embodiment of the present disclosure. The electronic device2is similar to the electronic device2as shown inFIG.1A, and the differences therebetween are described below.

Referring toFIG.1B, the electronic device2further includes an electronic component21disposed on the region102aof the surface102and can provide electrical connections between the electronic device2and external components (e.g., external circuits or circuit boards). In some embodiments, the electronic component21may be exposed from the element16. In some embodiments, the electronic component21may include a connector, such as a board-to-board connector or a connector for HotBar soldering.

FIG.1Cis a cross-sectional view of a part of an electronic device, in accordance with an embodiment of the present disclosure. In some embodiments, the electronic device1and/or the electronic device2may include a structure shown inFIG.1C. For example, the grounding layer13amay be partially exposed from the recess10r. The element16may be in contact with the grounding layer13a.

FIG.2A-1,FIG.2B-1,FIG.2C-1,FIG.2D-1,FIG.2E-1,FIG.2F-1,FIG.2G-1, andFIG.2H-1illustrate perspective views in one or more stages of a method of manufacturing an electronic device in accordance with an embodiment of the present disclosure.FIG.2A-2,FIG.2B-2,FIG.2C-2,FIG.2D-2,FIG.2E-2,FIG.2F-2,FIG.2G-2, andFIG.2H-2illustrate cross-sectional views of the perspective views inFIG.2A-1,FIG.2B-1,FIG.2C-1,FIG.2D-1,FIG.2E-1,FIG.2F-1,FIG.2G-1, andFIG.2H-1, respectively. At least some of these figures have been simplified to better understand the aspects of the present disclosure. In some embodiments, the electronic device1and/or the electronic device2may be manufactured through the operations described with respect toFIG.2A-1throughFIG.2H-1andFIG.2A-2throughFIG.2H-2.

Referring toFIG.2A-1andFIG.2A-2, the carrier10is provided. The carrier10may include the radiating region11disposed adjacent to the surface101, the non-radiating region13disposed adjacent to the surface102, and the conductive element12connected between the radiating region11and the non-radiating region13. The electronic component14(and another electronic component14′, if any) may be disposed on the surface102of the carrier10. The surface102of the carrier10may include the region102aand the region102bconnected with the region102b. The electronic component14may be disposed on the region102b.

In the present embodiment, the carrier10may include a copper clad laminate (CCL) substrate, which includes several carrier units that one may be separable from another by a scribe line (not shown). Since each of the carrier units is subjected to similar or identical processes in the manufacturing method, for convenience, only one exemplary carrier unit is detailed described as followings.

Referring toFIG.2B-1andFIG.2B-2, the encapsulant15is formed on the surface102of the carrier10to cover or encapsulate the electronic component14. Another encapsulant15′ may be formed on the surface102of the carrier10to cover or encapsulate the electronic component14′, if any. In some embodiments, the encapsulant15may be formed by a molding technique, such as transfer molding or compression molding.

Referring toFIG.2C-1andFIG.2C-2, a protection layer20(and another protection layer20′, if any) may be disposed on the region102aof the surface102. In some embodiments, the protection layer20may protect the region102afrom being covered by the element16in the following operations. In some embodiments, the protection layer20may be or include, for example, a thermally stable tape, such as Polyimides (PI).

Referring toFIG.2D-1andFIG.2D-2, a first cutting or sawing operation may be performed to form the recesses10rand10r′. The first cutting or sawing operation may be a half-cutting operation such that the radiating region11is not exposed from the recesses10rand10r′.

The first cutting or sawing operation may include cutting or sawing four sides of the carrier units. The recesses10rand10r′ may be formed on four sides of the carrier units. After the first cutting or sawing operation, the encapsulant15may be partially removed. The lateral surfaces (including the lateral surfaces154,155, and156) of the encapsulant15may define the angle θ2with the surface102of the substrate10. The angle θ2may be substantially equal to about 90 degrees. The lateral surface153of the encapsulant15may not be cut or sawed and thus the slope and the angle θ1thereof may be different from the slope and the angle θ2the lateral surfaces154,155, and156. In addition, the roughness value of the lateral surface153may be substantially greater than the roughness values of the lateral surfaces154,155, and156.

A part of the non-radiating region13may be exposed from the recesses10rand10r′. For example, the grounding layer13aof the non-radiating region13may be exposed from the bottom surface10rband/or the sidewall10rsof the recess10r.

Referring toFIG.2E-1andFIG.2E-2, the element16may be disposed on the exposed surfaces of the encapsulant15and the protection layer20. The element16may be disposed on the bottom surface10rband/or the sidewall10rsof the recess10r. The element16may contact the grounding layer13aof the non-radiating region13.

In some embodiments, the element16may be disposed through, for example, a physical vapor deposition (PVD), such as sputtering or spray coating. In some embodiments, the element16may be disposed through a chemical vapor deposition (CVD) or plating.

Referring toFIG.2F-1andFIG.2F-2, the protection layer20(and the protection layer20′, if any) may be removed from the region102aof the surface102.

Referring toFIG.2G-1andFIG.2G-2, an electronic component21(and another electronic component21′, if any) may be disposed on the region102aof the surface102to provide electrical connections with external components.

Referring toFIG.2H-1andFIG.2H-2, a second cutting or sawing operation may be performed to separate the carrier10into several carrier units. The second cutting or sawing operation may be a full-cutting operation to fully penetrate the carrier10.

After the second cutting or sawing operation, a part (such as the surface131) of the non-radiating region13may be exposed and a part (such as the surface111) of the radiating region11may be exposed.

In some embodiments, a thickness of a saw blade used to perform the second cutting or sawing operation may be controlled so as not to damage the element16.

In some existing approaches of forming an EMI shielding layer (such as the element16), a thermally stable tape may be utilized to protect the antenna layer (such as the conductive layer11a). For example, a thermally stable tape may be utilized to cover the surface101and a part of the surface103during the sputtering operation of the element16.

However, the thermally stable tape may not be thick enough to control the sputtering depth, which may cause issues (such as overflow or burn marking). In addition, the antenna layer may laterally overlap or be covered by the EMI shielding layer, which may hinder the signal transmission and reception of the antenna layer.

In comparison, in the present disclosure, a first cutting or sawing operation is performed to form the recess10rand to expose the grounding layer13a. The conductive layer11ais formed on the exposed surfaces. Then, a second cutting or sawing operation is performed to fully penetrate the carrier10. The sputtering depth can be carefully controlled. Therefore, element16may be selectively sputtered without overlapping or covering the conductive layer11ain the first direction (e.g., the x-axis) as shown inFIG.1A.

FIG.3A,FIG.3B-1,FIG.3C,FIG.3D, andFIG.3Eillustrate perspective views in one or more stages of a method of manufacturing an electronic device in accordance with an embodiment of the present disclosure.FIG.3B-2illustrate a cross-sectional view of the perspective view inFIG.3B-1. At least some of these figures have been simplified to better understand the aspects of the present disclosure. In some embodiments, the electronic device1and/or the electronic device2may be manufactured through the operations described below with respect toFIG.3A,FIG.3B-1,FIG.3B-2,FIG.3C,FIG.3D, andFIG.3E.

Referring toFIG.3A, a supporting carrier30may be provided. The supporting carrier30may include a blocking structure31to define an area30a. For example, the blocking structure31may have an opening exposing the area30a.

Referring toFIG.3B-1andFIG.3B-2, the carrier10may be placed on the supporting carrier30and within the area30a. The carrier10may be surrounded by the blocking structure31. In some embodiments, a height31hof the blocking structure31may be substantially greater or larger than a height11hof an antenna layer (such as the radiating region11inFIG.1A) in the carrier10. The lateral surface111of an antenna layer (such as the radiating region11inFIG.1A) in the carrier10may be laterally overlapped with or covered by the blocking structure31.

In some embodiments, a gap may be defined between the surface103of the carrier10and the blocking structure31. In some embodiments, the gap may be controlled to be small enough such that conductive elements (such as the element16inFIG.1A) may not be disposed within the gap in the following operations.

In some embodiments, an electronic component32may be disposed on the region102aof the surface102of the carrier10to provide electrical connections with external components. The electronic component32may be the same as or similar to the electronic component21. The encapsulant15may be formed on the region102bof the surface102of the carrier10to encapsulate the electronic component14.

Referring toFIG.3C, a protection layer33may be disposed on the region102aof the surface102to cover the electronic component32. In some embodiments, the protection layer33may prevent the electronic component32from being covered by conductive elements (such as the element16inFIG.1A) in the following operations. In some embodiments, the protection layer33may be or include, for example, a thermally stable tape, such as PI.

Referring toFIG.3D, the element16may be disposed on the exposed surfaces of the encapsulant15. In some embodiments, the element16may also be disposed on the exposed surfaces of the protection layer33.

Referring toFIG.3E, the protection layer33may be removed from the region102aof the surface102. The carrier10may be removed from the supporting carrier30. The surface103of the carrier10may be covered by the element16. The lateral surface111of an antenna layer (such as the radiating region11inFIG.1A) in the carrier10may be exposed from the element16.

In comparison with the existing approaches, in the present disclosure, the supporting carrier30is used to protect the antenna layer (e.g., the conductive layer11a). The sputtering depth can be carefully controlled through the height31hof the blocking structure31and the gap between the carrier10and the blocking structure31. Therefore, element16may be selectively sputtered without overlapping or covering the conductive layer11ain the first direction (e.g., the x-axis) as shown inFIG.1A.

Spatial descriptions, such as “above,” “below,” “up,” “left,” “right,” “down,” “top,” “bottom,” “vertical,” “horizontal,” “side,” “higher,” “lower,” “upper,” “over,” “under,” and so forth, are indicated with respect to the orientation shown in the figures unless otherwise specified. It should be understood that the spatial descriptions used herein are for purposes of illustration only, and that practical implementations of the structures described herein can be spatially arranged in any orientation or manner, provided that the merits of embodiments of this disclosure are not deviated from by such an arrangement.

As used herein, the terms “approximately,” “substantially,” “substantial” and “about” are used to describe and account for small variations. When used in conjunction with an event or circumstance, the terms can refer to instances in which the event or circumstance occurs precisely as well as instances in which the event or circumstance occurs to a close approximation. For example, when used in conjunction with a numerical value, the terms can refer to a range of variation less than or equal to ±10% of that numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, two numerical values can be deemed to be “substantially” the same or equal if a difference between the values is less than or equal to ±10% of an average of the values, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%.

Two surfaces can be deemed to be coplanar or substantially coplanar if a displacement between the two surfaces is no greater than 5 μm, no greater than 2 μm, no greater than 1 μm, or no greater than 0.5 μm.

As used herein, the singular terms “a,” “an,” and “the” may include plural referents unless the context clearly dictates otherwise.

As used herein, the terms “conductive,” “electrically conductive” and “electrical conductivity” refer to an ability to transport an electric current. Electrically conductive materials typically indicate those materials that exhibit little or no opposition to the flow of an electric current. One measure of electrical conductivity is Siemens per meter (S/m). Typically, an electrically conductive material is one having conductivity greater than approximately 104 S/m, such as at least 105 S/m or at least 106 S/m. The electrical conductivity of a material can sometimes vary with temperature. Unless otherwise specified, the electrical conductivity of a material is measured at room temperature.

Additionally, amounts, ratios, and other numerical values are sometimes presented herein in a range format. It is to be understood that such range format is used for convenience and brevity and should be understood flexibly to include numerical values explicitly specified as limits of a range, but also to include all individual numerical values or sub-ranges encompassed within that range as if each numerical value and sub-range is explicitly specified.

While the present disclosure has been described and illustrated with reference to specific embodiments thereof, these descriptions and illustrations are not limiting. It should be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the true spirit and scope of the present disclosure as defined by the appended claims. The illustrations may not be necessarily drawn to scale. There may be distinctions between the artistic renditions in the present disclosure and the actual apparatus due to manufacturing processes and tolerances. There may be other embodiments of the present disclosure which are not specifically illustrated. The specification and drawings are to be regarded as illustrative rather than restrictive. Modifications may be made to adapt a particular situation, material, composition of matter, method, or process to the objective, spirit and scope of the present disclosure. All such modifications are intended to be within the scope of the claims appended hereto. While the methods disclosed herein have been described with reference to particular operations performed in a particular order, it will be understood that these operations may be combined, sub-divided, or re-ordered to form an equivalent method without departing from the teachings of the present disclosure. Accordingly, unless specifically indicated herein, the order and grouping of the operations are not limitations of the present disclosure.