Patent ID: 12218109

Identical, similar, or similar-acting elements are indicated in the figures with the same reference numerals. The figures and the proportions of the elements shown in the figures with respect to each other are not to be considered as to scale.

Rather, individual elements may be shown exaggeratedly large for better representability and/or for better comprehensibility.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

FIG.1Ashows a schematic top view of a plurality of arrangements1described herein according to a first exemplary embodiment. Each arrangement1extends to a parting line marked with T. The parting line T delimits an arrangement1in its lateral extent. A separation of a plurality of arrangements1takes place, for example, along the parting line T. An arrangement1comprises in each case a plurality of optoelectronic semiconductor components10with connection structures40. The connection structures40of a semiconductor component10are in each case electrically conductively connected with connection bodies50. By means of the connection bodies50, for example, the arrangement1can be easily mounted on a printed circuit board. Each of the arrangements1comprises a connection body50which does not comprise an electrical connection to any of the connection structures40. With other words, each of the arrangements1comprises at least one connection body50which is not electrically contacted. This non-electrically contacted connection body50may serve to provide mechanical stabilization when the arrangement1is mounted on a printed circuit board.

The optoelectronic semiconductor components10are each laterally spaced from one another, arranged in a common plane and configured to emit electromagnetic radiation. Each optoelectronic semiconductor component10is configured to emit electromagnetic radiation with a different wavelength. For example, the optoelectronic semiconductor components10are each configured to emit light in a red, green, or blue spectral range. Each arrangement1represents, for example, a pixel of a visual display apparatus, or display. In particular, each of the arrangements1serves as a pixel of a video wall. In particular, the semiconductor components10are flip chips comprising semiconductor layer sequences1000grown on a substrate1001formed with sapphire.

FIG.1Bshows a sectional view of a plurality of arrangements1described herein according to the first exemplary embodiment. The sectional view corresponds to a section along a cut line Z of the schematic top view of arrangements1described herein shown inFIG.1A. Each arrangement1comprises an optoelectronic semiconductor component10comprising a semiconductor body100and a plurality of contact structures101. The semiconductor body100includes a radiation outlet side100A provided for coupling out electromagnetic radiation and a rear face100B opposite to the radiation outlet side100A. The semiconductor component10is delimited in its lateral extent by a side face10A. The contact structures101are located on the rear face100B of the semiconductor component10. The contact structures101are each electrically conductively connected with the connection structures40.

The semiconductor component10is applied with the radiation outlet side100A to a carrier600. An electrically insulating insulation layer30is applied to the carrier600and extends between the side faces10A of the semiconductor components10. The insulation layer30is made absorbent to electromagnetic radiation generated in the semiconductor component10. Consequently, the insulation layer30gives a dark or black impression to an observer. Disturbing reflections of ambient light can thus be advantageously reduced.

The connection structures40are arranged on the insulation layer30and electrically conductively connected with the connection bodies50. Consequently, each semiconductor component10is supplied with an operating current by means of the connection structures40. The connection structures40are manufactured by means of a planar interconnect method and applied to the insulation layer30. The planar interconnect method is similar to a redistribution layer (RDL) method. The connection structures40are formed with Cu. The width of the connection structures40is between 30 μm and 60 μm.

FIGS.2A to2Fshow schematic sectional views of a plurality of arrangements1described herein, and an enlarged section of an arrangement1according to a second exemplary embodiment. The sectional views shown herein are taken at various stages of a method for producing the arrangements1.

FIG.2Ashows the provision of a carrier600. The carrier600is formed with a radiation permeable material. The thickness of the carrier600is 250 μm.

FIG.2Bshows a schematic sectional view of a plurality of arrangements1in a further step of a method for producing them, as well as an enlarged section of an arrangement1. The elements shown in the enlarged section may be partially avoided in the further figures for better clarity.

In the enlarged section, the structure of the optoelectronic semiconductor component10is shown. The optoelectronic semiconductor component10comprises contact structures101and a semiconductor body100. The semiconductor body100comprises a substrate1001and a semiconductor layer sequence1000. The semiconductor layer sequence1000is grown on the substrate1001. An active region2000is arranged in the semiconductor layer sequence1000, which is configured to emit electromagnetic radiation. The semiconductor body100comprises a radiation outlet side100A and a rear face100B opposite to the radiation outlet side100A. The contact structures101are arranged on the rear face100B of the semiconductor body100. Consequently, unobstructed emission of electromagnetic radiation generated in the active region2000during operation is possible on the radiation outlet side100A opposite to the rear face100B. The optoelectronic semiconductor component10comprises side faces10A laterally delimiting the optoelectronic semiconductor component10. The side faces10A extend from the contact structures101to the substrate1001of the semiconductor layer sequence1000. The lateral dimensions of the semiconductor components10are typically in a region of 10 μm to 200 μm, in particular in a region of 80 μm to 150 μm and is, for example, 90 m×130 μm. The thickness of the semiconductor components10is 80 μm.

The semiconductor components10are mounted on the carrier600by means of a joining layer601with their side facing the radiation outlet side100A. The joining layer601is formed with an acrylate, an epoxy, a silicone, or a hybrid material. The joining layer601is formed to be permeable to the electromagnetic radiation generated in the active region2000. In particular, the joining layer601is made permeable, in particular transparent, to the generated radiation. The joining layer601is applied over the entire surface of the carrier600. For example, the joining layer601is applied to the carrier600by means of spin coating, printing or dispensing. Alternatively, the joining layer601may be applied to the carrier600only at those locations where a semiconductor component10is placed.

FIG.2Cshows a schematic sectional view of a plurality of arrangements1described herein according to the second exemplary embodiment in a further step of a method for producing them. An optically insulating insulation layer30is applied to the carrier600, extending from the side faces10A of a semiconductor component10to the side face10A of an adjacent semiconductor component10. In other words, the insulation layer30completely covers the carrier600, with the exception of the lateral extent of the semiconductor components10. The side faces10A of the semiconductor components10are also completely covered by the insulation layer30. Advantageously, an impression of the arrangement1that is black to an observer can thus be formed, and undesired reflections on the arrangement1are reduced. The insulation layer30is formed with an epoxy or a silicone. In particular, the material of the insulation layer30is filled with particles of an absorbing material.

FIG.2Dshows a schematic sectional view of a plurality of arrangements1described herein according to the second exemplary embodiment in a further step of a method for producing them, as well as an enlarged section of an arrangement1. Connection structures40are applied to the insulation layer30. From the enlarged section of the arrangement1, the exact layer structure of the connection structures40can be seen. The elements shown in the enlarged section may be partially avoided in the further figures for better clarity.

First, an adhesive layer400is applied to the contact structures101, which is formed, for example, by means of palladium, nickel, chromium or titanium. The adhesive layer is preferably applied by means of sputtering. The thickness of the adhesive layer is 5 nm to 500 nm. A further growth layer401is applied to the adhesive layer400, which is formed, for example, with copper. The growth layer401is preferably applied by means of sputtering. The thickness of the growth layer401is 0.5 μm to 2 μm. A connection layer402is applied to the growth layer401, for example by means of electrodeposition. A connection structure40applied in this way can be referred to as a planar interconnect. From the enlarged section of the optoelectronic semiconductor component10, the complete coverage of the side faces10A of the optoelectronic semiconductor component10by the insulation layer30can also be seen. The insulation layer30may also be located between the contact structures101. The insulation layer30may provide enhanced protection against a short circuit between the contact structures. For clarity, it may not be shown in the further figures.

FIG.2Eshows a schematic sectional view of a plurality of arrangements1described herein according to the second exemplary embodiment in a further step of a method for producing them. A protective layer32is applied to the connection structures40. For example, the protective layer32is formed with an electrically insulating material. For example, the protective layer32is formed with an epoxy, a silicone, or an acrylate. The protective layer32has a solder stopping effect, and thus can prevent an undesirable lateral spread of a liquid solder on the surface of the connection structures40. Connection bodies50are arranged at the recesses of the protective layer32. For example, the connection bodies50are applied in the form of solder balls and are electrically conductively connected with the connection structure40. The connection bodies50comprise a diameter of 150 μm to 200 μm.

FIG.2Fshows a schematic sectional view of a plurality of arrangements1described herein according to the second exemplary embodiment in a further step of a method for producing them. The surface of the carrier600is structured on the side facing away from the optoelectronic semiconductor components10. For example, the structuring is in the form of roughening by means of sandblasting or in an etching process with hydrofluoric acid. Such a structured surface advantageously increases the coupling out efficiency of electromagnetic radiation emitted from the optoelectronic semiconductor components10. The carrier600forms an output element20for coupling out electromagnetic radiation from the arrangements1.

FIG.3shows a schematic sectional view of a plurality of arrangements1described herein according to a third exemplary embodiment. The third exemplary embodiment is substantially the same as the second exemplary embodiment. In the third exemplary embodiment, the connection bodies50each comprise a core500and a shell501.

The core500is formed with nickel or copper, for example. In particular, the shell501is formed with a solder material. The core500comprises a higher melting point than the surrounding material of the shell501. Advantageously, a defined distance of the optoelectronic semiconductor component10from a further mounting surface can thus be ensured in a soldering process. The minimum distance corresponds to the diameter of the core500. Further advantageously, a connection body50constructed in this way tends less to crack formation and thus increases the reliability of the optoelectronic semiconductor component10.

FIG.4shows a schematic sectional view of a plurality of arrangements1described herein according to a fourth exemplary embodiment. The fourth exemplary embodiment is substantially the same as the second exemplary embodiment.

The connection bodies50comprise a copper structure and a solder material applied to the copper structure. The copper structure is applied to the connection structures40and comprises a cylindrical shape. The axis of rotation of this cylinder is perpendicular to the main extension plane of the arrangement1. A solder material is arranged on the side of the copper structure facing away from the connection structures40, which solder material is provided for electrical contacting of the connection bodies50. Advantageously, the height of the copper structure can be used to set a distance of the optoelectronic semiconductor component10from a subsequent mounting surface.

FIG.5shows a schematic sectional view of a plurality of arrangements1described herein according to a fifth exemplary embodiment. A carrier600comprises a plurality of recesses21, into each of which both a semiconductor component10and a part of an insulation layer30are introduced. In other words, the semiconductor components10are each embedded in the carrier600. For example, the carrier600may be formed with a glass substrate in which a plurality of cavities are etched.

A connection structure40is arranged on the insulation layer30, which is electrically conductively connected with connection bodies50. The connection bodies50are adapted as flat, pillow-shaped regions made of a solder material. The connection bodies50are limited in their lateral extent by a protective layer32. By embedding the optoelectronic semiconductor components10in the carrier600, a planar surface advantageously results on the side of the carrier600facing the semiconductor components10. A planar surface advantageously facilitates further contacting by means of the connection bodies50. A spacer is advantageously no longer required due to the already planar surface.

FIG.6shows a schematic sectional view of a plurality of arrangements1described here according to a sixth exemplary embodiment. The sixth exemplary embodiment corresponds essentially to the fifth exemplary embodiment. In the sixth exemplary embodiment shown herein, the insulation layer30comprises a thickness equal to the thickness of the optoelectronic semiconductor component10, and the carrier600does not comprise any recesses21. Thus, the thickness of the insulation layer D completely balances the height of the optoelectronic semiconductor component10. This advantageously facilitates the further arrangement of connection structures40and connection bodies50. The connection bodies50are adapted as flat, cushion-shaped solder regions.

FIG.7shows a schematic sectional view of a plurality of arrangements1described herein in accordance with a seventh exemplary embodiment. The seventh exemplary embodiment is substantially the same as the sixth exemplary embodiment. The insulation layer30is applied to the carrier600by a lamination process. In this case, the insulation layer30comprises recesses in advance whose position and size, within a certain tolerance, correspond to the position and size of the optoelectronic semiconductor components10. Any empty space remaining between the applied optoelectronic semiconductor components10and the insulation layer30due to the tolerance is filled by means of a shaped body33. The shaped body33is formed with an electrically insulating material which comprises an optical absorption. The side faces10A of the semiconductor components10are completely covered by the shaped body33. Thus, lateral emission of electromagnetic radiation from the side faces10A by the shaped body33is advantageously reduced or prevented.

FIG.8shows a schematic sectional view of a plurality of arrangements1described herein according to an eighth exemplary embodiment. The eighth exemplary embodiment corresponds substantially to the sixth exemplary embodiment. In the eighth exemplary embodiment shown herein, the thickness D of the optoelectronic semiconductor components10is reduced such that the thickness of the insulation layer30in its is sufficient to fully compensate for the thickness of the optoelectronic semiconductor components10. In other words, the thickness D of the insulation layer30is equal to the thickness of the semiconductor components10. The thickness of the optoelectronic semiconductor components10is between 3 μm and 30 μm. The thickness of the insulation layer D thus fully compensates for the height of the optoelectronic semiconductor components10. This advantageously facilitates the further arrangement of connection structures40and connection bodies50. The connection bodies50are adapted as flat, cushion-shaped solder areas.

FIG.9shows a schematic sectional view of a plurality of arrangements1described herein according to a ninth exemplary embodiment. In the ninth exemplary embodiment, the contacting of optoelectronic semiconductor components10is carried out in each case by means of connection structures40in the form of a bonding wire. In particular, the connection structure50is designed as a ball, stich on ball reverse bond connection, since particularly low loop heights of the bonding wire are thus possible. A low loop height advantageously reduces the minimum thickness of the arrangement1. An insulation layer30is applied partially to a carrier600. Connection bodies50are arranged on the insulation layer30. The connection bodies50comprise a copper structure and a solder material applied thereto. The copper structure comprises a cylindrical shape with its axis of rotation oriented perpendicular to the main extension plane of the arrangement1. An under bump metallization (UBM) in the form of an ENEPIG (electroless Ni, electroless Pd, immersion gold) coating is arranged on the copper structure. The copper structures are electrically conductively connected with the contact structures101by means of the connection structures40, in the form of bonding wires.

For mechanical stabilization of the connection structures40, the side of the carrier600facing the semiconductor components10is molded with a shaped body33. The shaped body33is designed to be electrically insulating and optically absorbing. For example, the shaped body33is formed with an epoxy or a silicone into which particles of a filling material are introduced. The carrier600comprises a patterning on the side facing away from the semiconductor components10, and a peripherally extending trench22. The trench22reduces a waveguide effect in the carrier600and reduces visual crosstalk from adjacent arrangements1. The structuring of the carrier600results in improved coupling out of electromagnetic radiation from the arrangement1.

FIG.10shows a schematic sectional view of a plurality of arrangements1described herein according to a tenth exemplary embodiment. The tenth exemplary embodiment is substantially the same as the second exemplary embodiment. In the tenth exemplary embodiment shown herein, an output coupling layer602is applied to the carrier600. The output coupling layer602may comprise, for example, a film or another radiation permeable carrier that comprises a patterning for coupling out electromagnetic radiation. Together with the carrier600, the output coupling layer602forms an output element20.

FIG.11shows a schematic sectional view of a plurality of arrangements1described herein according to an eleventh exemplary embodiment. The eleventh exemplary embodiment of a plurality of arrangements1shown herein comprises a plurality of semiconductor components10which comprise a radiation outlet side100A and a rear face100B opposite to the radiation outlet side100A, and which are laterally delimited by side faces10A. The side faces10A are completely covered by an insulation layer30, which is made to be optically absorbent. The insulation layer30is arranged laterally between the semiconductor components10. Connection structures40, a protective layer32and connection bodies50are applied to the insulation layer.

A joining layer601is arranged on the side of the insulation layer30facing away from the semiconductor components10. For example, a carrier600is again detached from joining layer601after mounting the semiconductor components10and the insulation layer30on the carrier600. Advantageously, a waveguide effect occurring in the carrier600is thus eliminated. As a result, the visual crosstalk of adjacent arrangements1can be reduced. The remaining joining layer601can subsequently be patterned to further improve coupling out of electromagnetic radiation. The joining layer601is used as output element20.

FIG.12shows a schematic sectional view of a plurality of arrangements1described herein according to a twelfth exemplary embodiment. The twelfth exemplary embodiment is substantially the same as the eleventh exemplary embodiment. In the twelfth exemplary embodiment of an arrangement1shown herein, a second insulation layer31is applied to the side of the insulation layer30opposite to the output coupling layer602. The second insulation layer is introduced in the region between the connection bodies50and the protective layer32. The second insulation layer may be formed with an epoxy or an acrylate, for example. The second insulation layer31further contributes to the mechanical stabilization of the arrangement1.

FIG.13shows a schematic sectional view of a plurality of arrangements1described herein according to a 13th exemplary embodiment. The 13th exemplary embodiment corresponds substantially to the second exemplary embodiment. The embodiment of arrangements1shown herein comprises a structured carrier600, with a structure for coupling out electromagnetic radiation emitted in the optoelectronic semiconductor components10. Furthermore, a trench22is introduced into the carrier600peripherally extending at the edge. The trench22may be introduced into the carrier600, for example, by means of sawing, scribing, or glass molding. The trench22reduces a waveguide effect in the carrier600and thus contributes to a reduction of the visual crosstalk of adjacent arrangements1.

FIG.14shows a schematic sectional view of a plurality of arrangements1described herein according to a 14th exemplary embodiment. The 14th exemplary embodiment corresponds substantially to the second exemplary embodiment. The 14th exemplary embodiment shown herein includes a carrier600into which a plurality of scattering centers603are introduced. The scattering centers603may vary in location and size and may be arranged, for example, at the edge sides of the arrangements1. For example, a desired radiation pattern can be achieved or the visual crosstalk of adjacent arrangements1can be reduced in this way. Alternatively, scattering centers603could also be arranged directly above the region of the optoelectronic semiconductor components10, for example to ensure better color mixing and more homogeneous radiation of the various semiconductor components10. For example, scattering centers603can be generated by means of an internal laser engraving.

FIG.15shows a schematic sectional view of a plurality of arrangements1described herein according to a 15th exemplary embodiment. The 15th exemplary embodiment is substantially the same as the second exemplary embodiment. The 15th exemplary embodiment illustrated herein includes trenches22formed in the carrier600peripherally extending around the edges of each arrangement1. The trenches22are filled with an optically absorbing material to further reduce crosstalk between adjacent arrangements1. The absorbing material may comprise, for example, a silicone or epoxy filled with absorbing particles.

FIG.16shows a schematic sectional view of a plurality of arrangements1described herein according to a 16th exemplary embodiment. The 16th exemplary embodiment is substantially the same as the second exemplary embodiment. The shown 16th embodiment example comprises cavities71on the side faces10A of the semiconductor components10. The cavities71are formed, for example, by introducing a thermally unstable material and a subsequent temperature cycle. The cavities71are voids filled with air, for example, and comprise a lower refractive index than the material surrounding them. The cavities71can thus reduce or prevent, by means of total internal reflection, a coupling out of electromagnetic radiation from the side faces10A of the optoelectronic semiconductor components10. Radiation that is coupled out of the side faces10A is at least partially reflected back into the semiconductor components10. This can advantageously increase the efficiency of the semiconductor components10.

FIG.17shows a schematic sectional view of a plurality of arrangements1described herein according to a 17th exemplary embodiment. The 17th exemplary embodiment corresponds substantially to the second exemplary embodiment. In the 17th embodiment shown herein, the side faces10A of the semiconductor components10and the interface between the carrier600and the insulation layer30are covered by a reflective coating70. For example, the reflective coating70may be a thin metal layer or a layer formed with an electrically insulating material. For example, the reflective coating comprises a silicone layer filled with titanium dioxide. The reflective coating70serves to reflect light laterally exiting the optoelectronic semiconductor components10back into the optoelectronic semiconductor component10. Further, the coating of the insulation layer30with the reflective coating70may create a bright or specular impression for an arrangement1to an observer.

FIG.18shows a schematic sectional view of a plurality of arrangements1described herein according to an 18th exemplary embodiment. The 18th exemplary embodiment corresponds substantially to the second exemplary embodiment. In the exemplary embodiment shown herein, a reflective coating70in the form of a silicone filled with a titanium dioxide is provided on the side faces10A of the optoelectronic semiconductor components10. The reflective coating70completely covers the side faces10A of the optoelectronic semiconductor components10and extends to the carrier600and the insulation layer30.

FIG.19shows a schematic sectional view of a plurality of arrangements1described herein according to a 19th exemplary embodiment. The 19th exemplary embodiment is substantially the same as the second exemplary embodiment. The 19th exemplary embodiment shown inFIG.19illustrates a simple way of separating different arrangements1from a continuous carrier600. The arrangements1are each separated from each other at the separation point marked with a T by a separation trench. A joining layer601, which can be thermally or visually dissolved, is provided between the arrangements1and the carrier600. When the arrangements1are detached from the carrier600by dissolving the joining layer601, the arrangements1are automatically separated.

FIG.20shows a schematic top view of a plurality of arrangements1described herein according to an exemplary embodiment 20. The 20th exemplary embodiment is substantially the same as the first exemplary embodiment. In the top view of the 20th exemplary embodiment shown inFIG.20, the wiring of the arrangements1can be seen. Each arrangement1comprises a plurality of optoelectronic semiconductor components10and a plurality of connection structures40. The connection structures40each provide an electrical connection of the optoelectronic semiconductor components10to the connection bodies50. A cathode and an anode of each semiconductor component10are connected with one of the connection bodies50. Four arrangements1form a module which can be mounted together, for example, on a printed circuit board. The edge length of an arrangement1is preferably 0.9375 mm. This wiring allows easy interchanging of anodes and cathodes by a lateral rotation of the arrangement1by 180°.

FIG.21shows a schematic top view of a plurality of arrangements1described herein according to a 21st exemplary embodiment. The 21st exemplary embodiment is substantially the same as the 20th exemplary embodiment. According to the 21st embodiment, the wiring of the optoelectronic semiconductor components10is such that the cathodes of all the optoelectronic semiconductor components10are looped through. A plurality of semiconductor components10share a connection body50for connecting their cathodes. The number of connection bodies50is thus advantageously reduced. This can result in a larger spacing of the optoelectronic semiconductor components10on the carrier600. Furthermore, one level of wiring can be omitted during subsequent assembly.

FIG.22shows a schematic top view of a plurality of arrangements1described herein according to a 22nd exemplary embodiment. The arrangements1are arranged laterally next to one another in one plane and are electrically contacted by means of first and second connection leads51,52. First connection leads51extend in the vertical direction while second connection leads52extend in the horizontal direction. The connection leads grant an electrical connection of all optoelectronic semiconductor components10of all arrangements1. Each semiconductor component10can be controlled individually. For example, pixel-precise control of arrangements1in a visual display unit can thus be achieved.

FIG.23shows a schematic top view of a plurality of arrangements1described herein according to a 23rd exemplary embodiment. The 23rd exemplary embodiment is substantially the same as the 22nd exemplary embodiment. The 23rd exemplary embodiment shown herein shows a plurality of arrangements1comprising wiring according to the 21st exemplary embodiment. By looping through the cathodes, a second connection lead52is advantageously omitted and a complete contacting of all optoelectronic semiconductor components10can be performed by means of a single layer of connection leads51. Each semiconductor component10can be controlled individually. For example, pixel-precise control of arrangements1in a visual display unit can thus be achieved.

FIG.24shows a schematic top view of an arrangement1described herein according to an exemplary embodiment 24. The 24th exemplary embodiment corresponds substantially to the 20th exemplary embodiment. The arrangement1comprises three semiconductor components10, each of which is electrically conductively connected by means of contact structures40and connection structures50. The arrangement can be applied to a mounting carrier and used, for example, as a pixel of a video wall.

FIG.25shows a schematic top view of a plurality of arrangements1described herein according to a 25th exemplary embodiment. The 25th exemplary embodiment is substantially the same as the 24th exemplary embodiment. The 25th exemplary embodiment shows a module formed by a total of 24 arrangements1. Advantageously, such a module can facilitate the assembly of a visual display unit.

FIG.26shows a schematic sectional view of a plurality of arrangements1described herein according to a 26th exemplary embodiment. The 26th exemplary embodiment corresponds substantially to the second exemplary embodiment. A visual reflection layer34is arranged between the carrier600and the insulation layer30. The optical reflection layer34completely covers the interface between the carrier600and the insulation layer30, with the exception of a region around the optoelectronic semiconductor components10. For example, the reflection layer34is formed with a metal or a titanium dioxide. Thus, a specular or bright impression may be created for an observer of the arrangement1.

FIG.27shows a schematic sectional view of a plurality of arrangements1described herein according to a 27th exemplary embodiment. The 27th exemplary embodiment corresponds substantially to the second exemplary embodiment. Here, the insulation layer30is adapted with a colored reflective material. For example, a red appearance of the arrangement1in its off-state can thus be achieved. Such an arrangement1can be used particularly advantageously, for example, in a rear light of a motor vehicle.

FIG.28shows a schematic sectional view of a plurality of arrangements1described herein according to a 28th exemplary embodiment. The 28th exemplary embodiment corresponds substantially to the second exemplary embodiment. A reflection layer34is applied to the carrier600on the side opposite to the optoelectronic semiconductor components10. Such an applied reflective layer is comparable with a semi-transparent mirror and thus gives the viewer the impression of a specular surface in the off-state of the arrangements1.

FIG.29Ashows a schematic top view of a plurality of arrangements1described herein according to an exemplary embodiment 29. The 29th exemplary embodiment corresponds substantially to the eighth exemplary embodiment. An integrated circuit8is arranged between four arrangements1. The arrangements1are driven together by the integrated circuit8. The integrated circuit8is electrically connected by means of connection bodies50. The integrated circuit8is connected with each of the optoelectronic semiconductor components10, and can provide a single pixel-precise driving of the optoelectronic semiconductor components10. In particular, the integrated circuit8is an active matrix IC.

FIG.29Bshows a schematic sectional view of a plurality of arrangements1described herein according to the 29th exemplary embodiment. In the schematic sectional view, it can be seen that the integrated circuit8is arranged in the same plane as the optoelectronic semiconductor components10. The positioning of the connection bodies50can, for example, be next to or even directly above the optoelectronic semiconductor components10.

FIG.30Ashows a schematic sectional view of a plurality of arrangements1described herein according to a 30th exemplary embodiment in a first stage of a method for producing the same. A plurality of arrangements1with semiconductor components10are arranged on a carrier60oand electrically contacted by means of connection structures40. Arranged directly above the semiconductor components10are connection bodies50connected with the connection structures40. The connection structures40comprise several layers, each of which is separated from the other by a layer of a protective layer32.

FIG.30Bshows a schematic sectional view of a plurality of arrangements1described herein according to the 30th exemplary embodiment in a further step of a method for producing the same. An integrated circuit8is applied to the connection bodies50. The integrated circuit is used for driving all semiconductor components10. A packing80spaces the integrated circuit8from the connection bodies50and the optoelectronic semiconductor components10. The packing is formed with a silicone, an epoxy or an acrylate.

FIG.31shows a schematic sectional view of a plurality of arrangements1described herein according to an exemplary embodiment 31. The 31st exemplary embodiment corresponds substantially to the eleventh exemplary embodiment. The arrangements1shown herein include an insulation layer30and a second insulation layer31, as well as a joining layer601and an output coupling layer602. The second insulation layer is provided on the side of the insulation layer30opposite to the output coupling layer602. The second insulation layer31is introduced between the insulation layer30and the connection structures40to provide planarization and mechanical stabilization of the arrangement1. The second insulation layer is formed with a silicone, an epoxy or an acrylate. The connection bodies50are flat, cushion-shaped regions formed with a solder material.

FIG.32shows a schematic sectional view of a plurality of arrangements1described herein according to a 32nd exemplary embodiment. The 32nd exemplary embodiment is substantially the same as the 31st exemplary embodiment. The 32nd exemplary embodiment comprises connection bodies50in the form of solder balls. A shaped body33is provided on the side of the protective layer32facing away from the optoelectronic semiconductor component10for planarizing the connection bodies50. The shaped body33serves for further mechanical stabilization and planarization of the arrangements1. The shaped body33is formed, for example, with an acrylate, an epoxy or a silicone.

FIG.33shows a schematic sectional view of a plurality of arrangements1described herein according to a 33rd exemplary embodiment. The 33rd exemplary embodiment corresponds substantially to the twelfth exemplary embodiment. The arrangements1shown herein are arranged on a common printed circuit board9. The printed circuit board9includes a plurality of connection areas90and serves as an electrically conductive carrier for the arrangements1.

FIG.34Ashows a schematic sectional view of a plurality of arrangements1described herein according to a 34th exemplary embodiment. The 34th exemplary embodiment corresponds substantially to the second exemplary embodiment. In addition to the carrier600and a joining layer601, the arrangements1shown herein include a release layer604. The release layer604is arranged between the joining layer601and the carrier600. The release layer604is a layer that can be released or dissolved, for example, by means of thermally or visually induced radiation. For example, the carrier600can thus be easily detached from the arrangement1in a subsequent detachment step.

The carrier600shown here comprises a structuring on its side facing the joining layer601. The structuring of the carrier600is imprinted as a negative shape in the joining layer601. After the carrier600has been detached, the negative form of the structuring remains in the joining layer601, whereby the joining layer601already comprises a structuring for coupling out radiation.

FIG.34Bshows a schematic sectional view of a plurality of arrangements1described herein according to the 34th exemplary embodiment. By mounting a plurality of arrangements1with their side of the carriers600facing away from the optoelectronic semiconductor components10on a temporary carrier610, good handling and easy transportation of a plurality of arrangements1is possible. After mounting the arrangements1on a printed circuit board9, the carrier600can be detached from each of the arrangements1, for example, by means of mechanical traction on the temporary carrier610. For example, the temporary carrier610is formed with a tear-resistant polymer film.

FIG.35shows a schematic sectional view of a plurality of arrangements1described herein according to a 35th exemplary embodiment. The 35th exemplary embodiment is substantially the same as the eleventh exemplary embodiment. In the exemplary embodiment of arrangements1shown herein, the connection bodies50are copper column structures. Advantageously, a protective layer32can be dispensed with. The copper column structures comprise in particular a high thermal conductivity and a high mechanical stability. Furthermore, an exact distance of the optoelectronic semiconductor components10from a subsequent mounting surface can be set. For further stabilization of the arrangements1, a second insulation layer31is applied to the insulation layer30, which is electrically insulating and fills the space between the connection bodies50.

FIG.36shows a schematic sectional view of a plurality of arrangements1described herein according to a 36th exemplary embodiment. The 36th exemplary embodiment corresponds substantially to the eleventh exemplary embodiment. The connection bodies50are configured as vias through a second insulation layer31. The vias are formed with Cu, for example. A protective layer32can advantageously be dispensed with. The second insulation layer can be used to planarize the arrangements1.

FIG.37shows a schematic sectional view of a plurality of arrangements1described herein according to a 37th exemplary embodiment. The 37th exemplary embodiment is substantially the same as the 36th exemplary embodiment. The connection bodies50shown here are configured as vias by conductive filling material502. The vias extend through the second insulation layer31to the connection structures40. By way of example, the conductive filling material502is formed with an electrically conductive paste, in particular a paste containing silver.

FIG.38shows a schematic sectional view of a plurality of arrangements1described herein according to a 38th exemplary embodiment. The 38th exemplary embodiment corresponds substantially to the second exemplary embodiment. The 38th exemplary embodiment illustrated herein comprises a carrier600that has cutouts22on the side facing the insulation layer30. The cutouts22are filled with the material of the insulation layer30and extend peripherally around each of the arrangements1. The cutouts22reduce or avoid visual crosstalk from adjacent arrangements1.

FIG.39shows a schematic sectional view of a plurality of arrangements1described herein according to a 39th exemplary embodiment. The 39th exemplary embodiment corresponds substantially to the second exemplary embodiment. The output element20of the arrangements1includes a plurality of radiation permeable regions210and a plurality of absorbing regions220. The radiation permeable regions210are respectively aligned with the lateral positioning of the optoelectronic semiconductor components10. Thus, unobstructed emission of radiation emitted from the optoelectronic semiconductor components10is possible. At the same time, an absorbing region220is located between each two arrangements1. The absorbing region220prevents or reduces optical crosstalk of adjacent arrangements1and thus advantageously increases the contrast. For example, such an output element20is formed with a plastic.

FIG.40shows a schematic sectional view of a plurality of arrangements1described herein according to a 40th exemplary embodiment. The 40th exemplary embodiment corresponds substantially to 39th exemplary embodiment. Second radiation permeable regions211are additionally introduced in the radiation permeable regions210of the output element20. The second radiation permeable regions211differ from the first radiation permeable regions210in their refractive index. For example, the shape of the second radiation permeable regions211is that of a convex lens. The second radiation permeable region211can thus contribute to a beam shaping, in particular to a reduction of the divergence, of the electromagnetic radiation emitted by the optoelectronic semiconductor components10.

FIG.41shows a schematic sectional view of a plurality of arrangements1described herein according to a 41st exemplary embodiment. The 41st exemplary embodiment corresponds substantially to the fifth exemplary embodiment. The optoelectronic semiconductor components10are embedded in the carrier600and advantageously comprise a planar side on the side facing away from the carrier600. A mounting of the arrangement1on a subsequent mounting carrier is thus advantageously facilitated. The insulation layer30extends only in the lateral direction on the carrier600, but not on the side faces10A of the semiconductor components10. The insulation layer30is applied to the carrier600by means of molding.

FIG.42shows a schematic sectional view of a plurality of arrangements1described herein according to a 42nd exemplary embodiment. The 42nd exemplary embodiment is substantially the same as the eleventh exemplary embodiment. In the arrangements1shown in the 42nd exemplary embodiment, a further plane of the connection structure40is arranged on the protective layer32to allow free positioning of the connection bodies50in the lateral direction. The second plane of the connection structure40is also applied by means of a planar interconnect method and is spaced from the first plane by an insulation material35. The insulation material is electrically insulating and is formed, for example, with a polymer.

FIG.43shows a schematic sectional view of a plurality of arrangements1described herein according to a 43rd exemplary embodiment. The 43rd exemplary embodiment is substantially the same as the 33rd exemplary embodiment. The 43rd exemplary embodiment shows the mounting of an arrangement1on a printed circuit board9with a plurality of connection areas90, wherein the carrier600is not yet detached. A joining layer601and a release layer604are arranged between the carrier600and the insulation layer, allowing the carrier600to be easily detached. The carrier600comprises a patterning that is imprinted in the joining layer601.

FIG.44shows a schematic sectional view of a plurality of arrangements1described herein according to a 44th exemplary embodiment. The 44th exemplary embodiment is substantially the same as the 43rd exemplary embodiment. In the 44th exemplary embodiment shown herein, a release layer604is arranged between the carrier600and the insulation layer30. Advantageously, a joining layer601may be omitted. The release layer604is used to remove the carrier600from the arrangement1by means of a thermally or visually induced release process. Possible combinations of materials for the release layer and a suitable release process are listed below: SiNx+laser release, polyimide+laser release, thermal release film+thermal release, non-stick layer+mechanical release (GHT).

The invention is not limited by the description based on the exemplary embodiments. Rather, the invention encompasses any new feature as well as any combination of features, which particularly includes any combination of features in the patent claims, even if that feature or combination itself is not explicitly specified in the patent claims or exemplary embodiments.