Patent ID: 12231055

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS OF THE INVENTION

First Embodiment

The present embodiment relates to a semiconductor module including busbars, and a power converter including the semiconductor module.

FIG.1is a circuit diagram showing the power converter including the semiconductor module according to the first embodiment, and is a configuration diagram showing a three-phase inverter circuit for driving a three-phase AC motor. The power converter according to the present embodiment includes a DC power supply101and a three-phase AC motor106. The DC power supply101is connected to a smoothing capacitor102for smoothing DC voltage to be applied to the semiconductor module. The three-phase inverter circuit composed of a U phase arm103in which switching elements103aand103bare connected in series, a V phase arm104in which switching elements104aand104bare connected in series, and a W phase arm105in which switching elements105aand105bare connected in series, is connected at a stage subsequent to the smoothing capacitor102. The three-phase AC motor106is connected at a stage subsequent to the three-phase inverter circuit. The switching elements103ato105bin the arms103to105for the respective phases are controlled to be turned on/off in a predetermined order, whereby three-phase AC current is generated to drive the three-phase AC motor106.

Each of the switching elements103ato105bis formed by, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET). Alternatively, as each of the switching elements103ato105b, a self-arc-extinguishing semiconductor switching element such as an insulated gate bipolar transistor (IGBT) to which a diode is connected in antiparallel may be used, and a wide-bandgap semiconductor made from silicon carbide (SiC), gallium nitride (GaN), or the like may be used. In the present embodiment, a case in which an MOSFET is used as each of the switching elements103ato105bwill be described.

The U phase arm103, the V phase arm104, and the W phase arm105are configured by, for example, semiconductor modules each having a 2-in-1 structure in which the switching elements in upper and lower arms and the busbars are integrated with one another by resin-molding. Alternatively, the U phase arm103, the V phase arm104, and the W phase arm105may be configured by a semiconductor module having a 6-in-1 structure in which all of the switching elements in the upper and lower arms for the three phases are integrated with one another by resin-molding. In the present embodiment, a case in which each semiconductor module having the 2-in-1 structure is used will be described.

Next, the relationship between wire inductance and surge voltage will be described.FIG.2is a circuit diagram showing, for simplification, a switching operation in the U phase arm103of the three-phase inverter circuit inFIG.1, and shows a circuit in which the three-phase AC motor106is substituted with an inductance load113. The principle of generation of surge voltage is the same as that in the three-phase inverter circuit inFIG.1and will be described with reference toFIG.2. It is noted that, inFIG.2, a wire inductance on a positive electrode side of the smoothing capacitor102is denoted by107, and a wire inductance on a negative electrode side of the smoothing capacitor102is denoted by108.

A wire inductance on a drain side of the switching element (first semiconductor element)103ais denoted by109, a wire inductance on a source side (a drain side of the switching element103b) of the switching element103ais denoted by110, a wire inductance on a source side of the switching element103b(second semiconductor element) is denoted by ill, and a wire inductance between the load inductance113and a connection point X between the switching element103aand the switching element103bis denoted by112. Specifically, the wire inductances109to112are wire inductances caused by busbars in the semiconductor module.

An OFF surge voltage ΔVs applied when the state of the switching element103ais changed from an ON state to an OFF state, will be described. InFIG.2, a current path indicated by solid-line arrows is formed when the switching element103ais turned ON, and a current path indicated by alternate-long-and-short-dash-line arrows is formed when the switching element103ais turned OFF. Since switching between the current paths is performed when the state of the switching element103ais changed from an ON state to an OFF state, current flowing through the wires changes at a slope of di/dt. Here, if the magnitude of the wire inductance107is defined as L107, the magnitude of the wire inductance108is defined as L109, the magnitude of the wire inductance109is defined as L110, the magnitude of the wire inductance110is defined as L111, and the magnitude of the wire inductance111is defined as Lu, the OFF surge voltage ΔVs can be expressed by the following expression (1).
ΔVs=(L107+L108+L109+L110+L111)×di/dt(1)

As expressed by expression (1), the OFF surge voltage ΔVs is proportionate to the sum of the wire inductances L107, L108, L109, L110, and L111. Therefore, if these wire inductance components can be reduced, the surge voltage can be reduced.

FIG.3is a cross-sectional plane view showing the semiconductor module according to the first embodiment, andFIG.4is a cross-sectional view taken along a line A-A inFIG.3. InFIG.3andFIG.4, the height direction of the semiconductor module is defined as a Z direction, and directions perpendicular to the Z direction are defined as an X direction and a Y direction. That is, the X direction and the Y direction are the horizontal directions of the semiconductor module.FIG.3is a plane view spreading in the X direction and the Y direction, andFIG.4is a cross-sectional view spreading in the X direction and the Z direction. In the drawings, the switching elements103aand103b, a P busbar201, an N busbar202a, an N busbar202b, an AC busbar203, and a load busbar204are molded by resin to form a semiconductor module (first semiconductor module)200. A mold resin208is made from an insulation resin material such as epoxy resin and is molded by, after disposing the constituent components to be molded by resin inside a mold, injecting the resin into the mold so as to seal the constituent components.

InFIG.3andFIG.4, a busbar to which a positive electrode side of the switching element103ain the upper arm is connected is defined as the P busbar (first busbar)201, busbars to which a negative electrode side of the switching element103bin the lower arm is connected are defined as the N busbars (second busbars)202aand202b, and a busbar to which a negative electrode side of the switching element103ain the upper arm and a positive electrode side of the switching element103bin the lower arm are connected is defined as the AC busbar (third busbar)203. Inside the mold resin208, the P busbar201and a heat dissipation plate205are connected to each other via a joining member213a, the heat dissipation plate205and a drain terminal of the switching element103aare connected to each other via a joining member213b, a source terminal of the switching element103aand the AC busbar203are connected to each other via a joining member213c, the AC busbar203and a heat dissipation plate206are connected to each other via a joining member213d, the heat dissipation plate206and a drain terminal of the switching element103bare connected to each other via a joining member213e, a source terminal of the switching element103band the N busbar202are connected to each other via a joining member213f, and the heat dissipation plate206and the load busbar204are connected to each other via a joining member213g. Each of the heat dissipation plates205and206is made of a metal conductor such as copper, the heat dissipation plate205has the same potential as that of the drain terminal of the switching element103a, and the heat dissipation plate206has the same potential as that of the drain terminal of the switching element103b. Each of the joining members213ato213gis made of solder or the like. Each of the heat dissipation plates205and206is connected to a metal plate212made of copper or the like by an insulation sheet207interposed therebetween, and is insulated from the outside of the module.

Here, a wire inductance caused by the P busbar201corresponds to the wire inductance109inFIG.2, a wire inductance caused by the N busbar202corresponds to the wire inductance111inFIG.2, a wire inductance caused by the AC busbar203corresponds to the wire inductance110inFIG.2, and a wire inductance caused by the load busbar204corresponds to the wire inductance112inFIG.2. A connection terminal between the P busbar201and a positive-electrode-side wire of the smoothing capacitor102is denoted by209, connection terminals between a negative-electrode-side wire of the smoothing capacitor102and the respective N busbars202aand202bare denoted by210aand210b, and a connection terminal between the load busbar204and the load wire is denoted by211. It is noted that control circuit wires such as gate wires of the switching elements103aand103bare not shown.

InFIG.3, the N busbars202aand202bare disposed such that the P busbar201and the AC busbar203are interposed therebetween. Specific descriptions are as follows. In the semiconductor module200, the P busbar201and the AC busbar203are disposed between the N busbars202aand202b(having planar cross sections forming a U shape) which are disposed so as to be branched into two parts, in the direction (X direction) in which the positive-electrode-side connection terminal209of the P busbar201and the negative-electrode-side connection terminals210aand210bof the N busbars202aand202bprotrude. It is noted that, in an X-Y plane defined by the X direction and the Y direction orthogonal thereto, the P busbar201, the N busbars202aand202b, and the AC busbar203are disposed such that at least one part of surfaces thereof is substantially flush with one another and parallel to one another. Specifically, as shown inFIG.4, even though step portions203A and203B are present at, for example, parts of the AC busbar203, the surfaces of the P busbar201, the N busbars202aand202b, and the other parts of the AC busbar203are substantially flush with one another and parallel to one another.

Next, the effect of enabling reduction in the wire inductances109,110, and111caused by the P busbar201, the N busbars202aand202b, and the AC busbar203achieved by the configuration of the semiconductor module200shown inFIG.3, will be described. Current paths generated when surge voltage is generated are indicated by dotted line arrows inFIG.3. The direction of current flowing through the P busbar201and the AC busbar203interposed between the N busbars202aand202bis opposite to the directions of currents flowing through the N busbars202aand202b. That is, the N busbars202aand202bthrough which current flows in a direction opposite to the direction of current flowing through the P busbar201and the AC busbar203, are disposed on both sides adjacent to the P busbar201and the AC busbar203. Consequently, a magnetic flux generated from each of the P busbar201and the AC busbar203and a magnetic flux generated from each of the N busbars202aand202bcan be effectively canceled out. Therefore, the wire inductances109,110, and111caused by the P busbar201, the N busbars202aand202b, and the AC busbar203can be reduced. Further the P busbar201, the N busbars202aand202b, and the AC busbar203are disposed so as to be flush with one another (on an X-Y plane). Thus the distance between the P busbar201and each of the N busbars202aand202band the distance between the AC busbar203and each of the N busbars202aand202bcan be set to be shorter than the case in which the P busbar201, the N busbars202aand202b, and the AC busbar203are disposed so as not to be flush with one another. Therefore the magnetic flux cancellation effect can become higher

FIG.5is a cross-sectional plane view showing another semiconductor module according to the first embodiment, andFIG.6is a cross-sectional view taken along a line B-B inFIG.5. Although the case in which the N busbars202aand202bare disposed such that the P busbar201and the AC busbar203are interposed therebetween has been described with reference toFIG.3andFIG.4, a configuration may be used in which P busbars301aand301bare disposed such that an N busbar302and an AC busbar303are interposed therebetween as shown inFIG.5.

InFIG.5andFIG.6, the switching elements103aand103b, the P busbars301aand301b, the N busbar302, and the AC busbar303are molded by resin. A mold resin308is made from an insulation resin material such as epoxy resin and is molded by, after disposing the constituent components to be molded by resin inside a mold, injecting the resin into the mold so as to seal the constituent components.

Inside the mold resin308, the P busbar301aand a heat dissipation plate306are connected to each other via a joining member313a, the P busbar301band the heat dissipation plate306are connected to each other via a joining member313b, the heat dissipation plate306and the drain terminal of the switching element103aare connected to each other via a joining member313c, the source terminal of the switching element103aand the AC busbar303are connected to each other via a joining member313d, the AC busbar303and a heat dissipation plate305are connected to each other via a joining member313e, the heat dissipation plate305and the drain terminal of the switching element103bare connected to each other via a joining member313f, the source terminal of the switching element103band the N busbar302are connected to each other via a joining member313g, and the source terminal of the switching element103aand a load busbar304are connected to each other via the joining member313d.

Each of the heat dissipation plates305and306is made of a metal conductor such as copper, the heat dissipation plate306has the same potential as that of the drain terminal of the switching element103a, and the heat dissipation plate305has the same potential as that of the drain terminal of the switching element103b. Each of the heat dissipation plates305and306is connected to a metal plate312made of copper or the like via an insulation sheet307, and is insulated from the outside of the module.

Here, a wire inductance caused by each of the P busbars301aand301bcorresponds to the wire inductance109inFIG.2, a wire inductance caused by the N busbar302corresponds to the wire inductance111inFIG.2, a wire inductance caused by the AC busbar303corresponds to the wire inductance110inFIG.2, and a wire inductance caused by the load busbar304corresponds to the wire inductance112inFIG.2.

Connection terminals between the positive-electrode-side wire of the smoothing capacitor102and the respective P busbars301aand301bare denoted by309aand309b, a connection terminal between the N busbar302and the negative-electrode-side wire of the smoothing capacitor102is denoted by310, and a connection terminal between the load busbar304and the load wire is denoted by311. It is noted that control circuit wires such as the gate wires of the switching elements103aand103bare not shown.

InFIG.5andFIG.6, the P busbars301aand301bare disposed such that the N busbar302and the AC busbar303are interposed therebetween. Specific descriptions are as follows. In a semiconductor module (a second semiconductor module)300, the N busbar302and the AC busbar303are disposed between the two P busbars301aand301b, in the direction (X direction) in which the terminals309aand309bof the P busbars301aand301band the terminal310of the N busbar302protrude. It is noted that, in an X-Y plane defined by the X direction and the direction (Y direction) orthogonal to the x direction, the P busbars301aand301b, the N busbar302, and the AC busbar303are disposed such that at least one part of surfaces thereof is substantially flush with one another and parallel to one another.

Next, the effect of reducing the wire inductances caused by the P busbars301aand301b, the N busbar302, and the AC busbar303achieved by the configuration of the semiconductor module300shown inFIG.5andFIG.6, will be described. Current paths generated when surge voltage is generated are indicated by dotted line arrows inFIG.5. The direction of current flowing through the N busbar302and the AC busbar303interposed between the two P busbars301aand301bis opposite to the directions of currents flowing through the P busbars301aand301b. That is, the two P busbars301aand301bthrough which current flows in a direction opposite to the direction of current flowing through the N busbar302and the AC busbar303, are disposed on both sides adjacent to the N busbar302and the AC busbar303. Consequently, a magnetic flux generated from each of the P busbars301aand301band a magnetic flux generated from each of the AC busbar303and the N busbar302can be effectively canceled out. Therefore, the wire inductances109,110, and111caused by the P busbars301aand301b, the N busbar302, and the AC busbar303can be reduced. Further the P busbars301aand301b, the N busbar302, and the AC busbar303are disposed so as to be flush with one another (on an X-Y plane). Thus the distance between the N busbar302and each of the P busbars301aand301band the distance between the AC busbar303and each of the P busbars301aand301bcan be set to be shorter than the case in which the P busbars301aand301b, the N busbar302, and the AC busbar303are disposed so as not to be flush with one another. Therefore the magnetic flux cancellation effect can become higher.

In addition, in the semiconductor modules in which the switching elements in the upper and lower arms constitute a 2-in-1 structure as shown inFIG.3toFIG.6, the length of each busbar for connecting the upper arm and the lower arm to each other can be set to be shorter and the wire inductance caused by the busbar can be set to be smaller than the case in which the upper and lower arms are formed as separate modules. That is, inFIG.3toFIG.6, the first semiconductor element and the second semiconductor element are packaged in the same module.

In addition, as shown inFIG.3toFIG.6, the connection terminal (first terminal portion)209,309between the positive-electrode-side wire of the smoothing capacitor102and the P busbar of the semiconductor module200,300, and the connection terminal (second terminal portion)210,310between the negative-electrode-side wire of the smoothing capacitor102and the N busbar of the semiconductor module200,300are disposed in the same direction. Consequently, the wire inductance of the smoothing capacitor102can be reduced.

FIG.7is a cross-sectional plane view showing a state in which the smoothing capacitor102is connected to components of the semiconductor module200shown inFIG.3, andFIG.8is a cross-sectional view taken along a line C-C inFIG.7. A positive-electrode-side busbar214of the smoothing capacitor102is connected at the positive-electrode-side connection terminal209to the P busbar201of the semiconductor module200. Further, negative-electrode-side busbars215aand215bof the smoothing capacitor102are connected at the negative-electrode-side connection terminals210aand210bto the N busbars202aand202bof the semiconductor module200. It is noted that connection between the busbars is performed by means of arc welding such as welding by tungsten inert gas (TIG). Here, a wire inductance caused by the positive-electrode-side busbar214of the smoothing capacitor102corresponds to the wire inductance107inFIG.2, and a wire inductance caused by each of the negative-electrode-side busbars215aand215bof the smoothing capacitor102corresponds to the wire inductance108inFIG.2.

If the smoothing capacitor102is disposed at a position adjacent to the positive-electrode-side connection terminal209and the negative-electrode-side connection terminals210aand210bdisposed in the same direction as shown inFIG.7, the positive-electrode-side busbar214and the negative-electrode-side busbars215aand215bof the smoothing capacitor102can be made so as to be short. Therefore, the wire inductances107and108caused by the positive-electrode-side busbar214and each of the negative-electrode-side busbars215aand215bcan be reduced.

In the present embodiment, two P busbars are disposed such that an N busbar and an AC busbar are interposed therebetween, or two N busbars are disposed such that a P busbar and the AC busbar are interposed therebetween, in a semiconductor module having switching elements. Therefore it is possible to cancel out magnetic fluxes generated by busbars through which currents for phases opposite to each other flow. Consequently, not only a magnetic flux generated by each of the P busbar(s) and the N busbar(s) but also a magnetic flux generated by the AC busbar can be canceled out, and thus the wire inductance of the entire semiconductor module can be reduced. Further, two busbars are disposed such that busbars through which current flows in a direction opposite to the directions of currents flowing through the two busbars are interposed between the two busbars. Consequently, magnetic fluxes can be canceled out between the adjacent busbars. Thus, it is possible to provide a semiconductor module in which the magnetic flux cancellation effect is higher and wire inductances are lower than the case in which a semiconductor module is configured by a pair of busbars as shown in the power converter of Patent Document 1. Therefore, surge voltage based on a wire inductance can be reduced. Further switching loss in the switching elements and heat generated by the switching elements can be reduced. Whereby the number of accessory parts such as a heat dissipation member can be reduced. Further, the entire device can be downsized, and thus device downsizing and cost reduction can be realized.

FIG.9is a cross-sectional plane view showing the semiconductor modules in another mode. In the case in which a plurality of semiconductor modules are used in parallel, the wire inductance caused by each busbar can be further reduced by arranging the semiconductor module (first semiconductor module)200and the semiconductor module (second semiconductor module)300adjacently to each other.FIG.9shows an arrangement example for realizing such a configuration. Current paths in the case in which surge voltage is generated are indicated by dotted line arrows inFIG.9. If the semiconductor module200and the semiconductor module300are disposed adjacently to each other, currents flow in directions opposite to each other through respective adjacent ones of the busbars. Thus, magnetic fluxes generated by the respective busbars can be effectively canceled out. Therefore, the wire inductances109,110, and111caused by the P busbar201, the N busbar202, the AC busbar203, the P busbars301aand301b, the N busbar302, and the AC busbar303can be reduced. Although the case in which two semiconductor modules are disposed in parallel has been described with reference toFIG.9, the same effect is obtained by alternately disposing the semiconductor modules (first semiconductor modules)200and the semiconductor modules (second semiconductor modules)300in accordance with the number of the semiconductor modules to be disposed in parallel.

Second Embodiment

Next, the widths of busbars, the intervals between the busbars, and the rate of reduction in inductance will be described with reference toFIG.10,FIG.11, andFIG.12.FIG.10is a simplified plane view showing the shapes of the busbars in either of the semiconductor module200and the semiconductor module300. Busbars402aand402bare disposed such that a busbar401is interposed therebetween. The self-inductances in the busbars401,402a, and402bare respectively defined as L401, L402a, and L402b, and the coupling coefficient between L401and L402ais defined as Ka, and the coupling coefficient between L401and L402bis defined as Kb. Whereby a mutual inductance Mabetween L401and L402aand a mutual inductance Mbbetween L401and L402bcan be expressed by the following expressions (2).
Ma=Ka×√{square root over (L401×L402a)}  [Numeral 1]
Mb=Kb×√{square root over (L401×L402b)}  (2)

From expression (2), it is found that larger coupling coefficients Kaand Kbbetween the respective inductances lead to larger mutual inductances Maand Mb. If currents flow such that the direction thereof is opposite between the busbar401and each of the busbars402aand402b, magnetic fluxes generated by adjacent ones of the busbars are canceled out, and the combined inductance L402Mof the busbar401can be expressed by the following expression (3).
L401M=L401−Ma−Mb(3)

According to expression (3), lager mutual inductances Maand Mbcan lead to a smaller combined inductance L401Mof the busbar401.FIG.11shows a result of performing, through analysis, calculation for a relationship of the ratio of the combined inductance L401Mto the self-inductance L401. Where: the width of the busbars401,402a, and402bis defined as “a” [mm]; each of the intervals between adjacent ones of the busbars is defined as “b” [mm]. And current is caused to flow such that the direction thereof is opposite between the busbar401and each of the busbars402aand402b, the width “a” [mm] of the busbar is fixed, and the interval “b” [mm] between the busbars is varied. Specifically, inFIG.11, the horizontal axis indicates the ratio of the interval “b” [mm] between the busbars to the width “a” [mm] of the busbar, and the vertical axis indicates the ratio of the combined inductance L401Mto the self-inductance L401. According to expressions (2), expression (3), and this result, a smaller interval “b” [mm] between the busbars leads to larger coupling coefficients Kaand Kbbetween the inductances, and thus leads to a smaller combined inductance L401M.

If the ratio of the interval “b” [mm] between the busbars to the width “a” [mm] of the busbar is set to be equal to or smaller than 1, the combined inductance L401Mcan be reduced so as to be equal to or smaller than 30% of the self-inductance L401. That is, if the width “a” [mm] of the busbar is set to be equal to or larger than the interval “b” [mm] between the busbars, the inductance reduction effect can be sufficiently obtained.

In actuality, control terminals214aand214bwhich are a gate wire and a source wire are required in order to drive the switching elements103aand103b, as shown inFIG.12. The control terminals214aand214bare not shown inFIG.3and the like. In the arrangement example shown inFIG.12, the P busbar201, the N busbar202, and the AC busbar203are disposed such that, at locations excluding the location at which the control terminals214aand214bare disposed, the width “a” [mm] of the busbar is equal to or larger than the interval “b” [mm] between the busbars, whereby the inductances can be reduced. As Judged from above, if a width of any of the first busbar, the second busbar, and the third busbar is defined as “a” [mm], and each of intervals between the busbars is defined as “b” [mm], “a” and “b” are set so as to satisfy b≤a in at least one part of the first busbar, the second busbar, and the third busbar.

FIG.13is a cross-sectional plane view showing another semiconductor module according to the second embodiment, andFIG.14is an equivalent circuit diagram thereof.FIG.13andFIG.14respectively show a configuration of a semiconductor module500in which switching elements of the semiconductor module200shown inFIG.3are disposed in parallel to each other. Switching elements501aand501bform an upper arm, and switching elements502aand502bform a lower arm. An N busbar504is disposed such that a P busbar503and an AC busbar505are sandwiched by the N busbar504, in the same manner as in the semiconductor module200shown inFIG.3. More specific descriptions are as follows. In the semiconductor module500, the P busbar503and the AC busbar505are disposed between two parts branched off from the N busbar504, in the direction (X direction) in which a terminal512of the P busbar503, and terminals513a,513bof the N busbar504protrude.

InFIG.14, a wire inductance on a drain side of the switching element sola is denoted by506a, a wire inductance on a drain side of the switching element501bis denoted by506b, a wire inductance on a source side of the switching element sola is denoted by507a, a wire inductance on a source side of the switching element501bis denoted by507b, a wire inductance on a drain side of the switching element502ais denoted by508a, a wire inductance on a drain side of the switching element502bis denoted by508b, a wire inductance on a source side of the switching element502ais denoted by509a, and a wire inductance on a source side of the switching element502bis denoted by509b.

Here, if, at the time of using the plurality of switching elements in parallel, there are differences between the respective wire inductances, unevenness in current division between the switching elements increases. Consequently, more heat is generated from a switching element through which more current flows. Considering this, it is preferable that the wire inductances506aand506b, the wire inductances507aand507b, the wire inductances508aand508b, and the wire inductances509aand509bare equal to each other. As shown inFIG.13, a branch point510of the P busbar503and branch points511aand511bof the AC busbar505are located at equal distances from the switching elements disposed in parallel. Further, the N busbar504is disposed so as to be symmetric with respect to a center line of the module. By configuring the module as described above, wires can be disposed so as to be symmetric with respect to the center line of the module, and the lengths of the wires can be set to be equal to each other on both sides of the center line of the module. Therefore, the wire inductances506aand506b, the wire inductances507aand507b, the wire inductances508aand508b, and the wire inductances509aand509bcan be set to be equal to each other.

Although each switching element has been described as an MOSFET in the above embodiments, the switching element may be formed by using a wide-bandgap semiconductor made from SiC, GaN, or the like. The wide-bandgap semiconductor can be driven at high frequency, has a high switching speed (dv/dt, di/dt), and enables reduction in loss. A higher switching speed (di/dt) leads to a larger surge voltage. Thus, if the present embodiment is configured by using the wide-bandgap semiconductor, surge voltage and heat generated by each switching element can be reduced. Consequently, downsizing of the power converter and increase in the efficiency of the power converter can be further realized.

Although the disclosure is described above in terms of various exemplary embodiments and implementations, it should be understood that the various features, aspects, and functionality described in one or more of the individual embodiments are not limited in their applicability to the particular embodiment with which they are described, but they can be applied, alone or in various combinations to one or more of the embodiments of the disclosure.

It is therefore understood that numerous modifications which have not been exemplified can be devised without departing from the scope of the specification of the present disclosure. For example, at least one of the constituent components may be modified, added, or eliminated. At least one of the constituent components mentioned in at least one of the preferred embodiments may be selected and combined with the constituent components mentioned in another preferred embodiment.