Patent ID: 12261026

DETAILED DESCRIPTION

The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows includes embodiments in which the first and second features are formed in direct contact, and also includes embodiments in which additional features are formed between the first and second features, such that the first and second features are not in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus/device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. In addition, the term “made of” may mean either “comprising” or “consisting of.” In the present disclosure, a phrase “one of A, B and C” means “A, B and/or C” (A, B, C, A and B, A and C, B and C, or A, B and C), and does not mean one element from A, one element from B and one element from C, unless otherwise described.

In plasma etching and/or deposition processes, contaminant particles reduce the yield of the processes by, for example, undesirably shielding portions of a mask pattern or contaminating a workpiece. In some plasma process apparatuses having a chamber made of aluminum, a surface coating is employed to prevent particles from being generated. Some surface coatings of the aluminum-based and FC parts, such as yttrium-based ceramics or coatings, make it possible to extend operational time, compared to others, such as anodized aluminum (Al) alone. Also, some surface coatings of the aluminum-based parts generate contaminant particles more easily than others. The surface change of the aluminum-based part's coatings over time adversely affects the radio frequency (RF) current return of wafer stages, as well as plasma characteristics including radical concentrations, plasma density and other parameters, which in turn detrimentally causes significant etch rate drift and the like. It is therefore desirable to maintain a clean and a stable surface in locations and routes where wafers and other tools pass through during the plasma process, such as tool grippers, chambers, substrate holders, and the like. In particular, the ability to produce high quality microelectronic devices and reduce yield losses is dependent upon maintaining the surfaces of critical components substantially defect-free. This would include maintaining the surfaces free of particulate matter, e.g., maintaining an ultra-clean surface, thereby ensuring that particulate matter is not deposited on the surface of the wafer, the reticle or mask, or other critical components. This is of particular concern as finer features are required on the microelectronic device. The types of particulate matter are any arbitrary combination depending on the environment and the vacuum condition of the plasma apparatus employed. The particulate matter is introduced from etching byproducts in the semiconductor manufacturing process, organic hydrocarbon contaminants, any kind of fall-on dust, outgassing from coatings, and the like.

Previously, plasma process equipment has been cleaned using a vacuum and an isopropyl alcohol/ethanol wipe-down after removal from the processing apparatus. In other instances, a wet clean process is employed. Particle counters are then used to monitor and verify cleanliness. However, such manual and wet cleaning operations are not preferable for certain delicate or small components. For purposes of cleaning a peeling weakness surface (PWS) layer that builds up on protective coatings of plasma processing tools, such as wafer holding tools as described herein, it has been discovered that manual and wet clean processes are simply not effective in removing the PWS layer. Plasma processing tools will then eventually contaminate the other semiconductor wafer processing apparatus over time during operational use. Thus, alternate methods of maintaining cleanliness of plasma-exposed components is required.

FIG.1is a schematic view of a semiconductor wafer processing system100in accordance with various embodiments. In some embodiments, the semiconductor wafer processing system100includes an etch system, such as a plasma etching system. The processing system100comprises, in various embodiments, a plasma processing chamber120for etching a substrate116, and at least one chamber surface108including a surface coating132having an yttrium compound, such as YxOyFzor YF3. The substrate116is disposed on an electrostatic chuck (ESC)112inside the semiconductor wafer processing system100. Coupled to the plasma processing chamber120are a radio frequency (RF) or microwave power source124and a low pressure vacuum system128. The RF or microwave power generator124provides power to create a plasma136inside the plasma processing chamber120. Direct current (DC) power is used in addition to or in place of the RF or microwave sources. Process gas140is introduced into the plasma processing chamber120to create the plasma136. Process gases140include oxygen-containing gases such as O2, CO, CO2, H2O or H2O2. Process gases also include gasses such as CF4, C4F8, C5F8, F2, SF6, HBr, NH3, NF3, H2, HCl, Cl2and others in various embodiments.

It should be appreciated that while the processing system100is described herein as a plasma etching system, the embodiments of the disclosure should not be limited thereto. The processing apparatus100is configured to perform any manufacturing procedure on a semiconductor wafer, such as substrate116. For example, the processing apparatus100is configured to perform manufacturing procedures that include deposition processes such as plasma-enhanced chemical vapor deposition (PECVD), sputtering, and/or other deposition processes. Alternately, processing system100includes a cleaning system, a developing system, a chemical treatment system, a thermal processing system, a coating system, a chemical vapor deposition (CVD) system, a physical vapor deposition (PVD) system, an ionized physical vapor deposition system (i-PVD), an atomic layer deposition (ALD) system, and/or combinations thereof. The disclosures herein are not limited to such devices and include, thermal process devices, cleaning apparatus, testing apparatus, or any other procedure involved in the processing of the semiconductor wafers, and/or any combination of such procedures.

Turning now toFIG.2, therein is depicted exemplary internal components of a semiconductor wafer processing system100, which will now be described in more detail. Processing system100includes elements for controlling the chamber wall temperature. As shown, a wall temperature control element266is coupled to a wall temperature control unit265, and the wall temperature control element266is coupled to the processing chamber120. The temperature control element includes a heater element, cooling element and/or temperature sensing element. For example, the heater element includes a resistance heater or a carbon heater element. The temperature of the processing chamber120is monitored using a temperature-sensing device such as a thermocouple. Furthermore, a chamber temperature controller (not shown) utilizes the temperature measurement as feedback to the wall temperature control unit265in order to control the temperature of the processing chamber120. In additional embodiments, the substrate holder240includes temperature control elements260for controlling the temperature of the substrate116. Control/power source262provides signals and/or energy to the control elements260, and heat or cool the substrate holder240and the substrate116. In addition, the processing system100further includes a pressure control system250coupled to the processing chamber120to control the pressure in the processing chamber120. The pressure control system250, in various embodiments, is a vacuum pump128with a gate valve254for controlling the chamber pressure, and a pressure sensor (not shown). For example, the vacuum pump128is capable of a pumping speed up to five thousand liters per minute. Vacuum pumps128are useful for low pressure processing, typically less than 50 mTorr. For high pressure (i.e., greater than 100 mTorr) or low throughput processing (i.e., no gas flow), a mechanical booster pump and dry roughing pump is used. Although the pressure control system250is shown coupled to the bottom of the processing chamber120, this is not required. In alternate embodiments, a pressure control system250is coupled to the top, and/or side of the processing chamber120. Furthermore, a controller300(described below with respect toFIG.3) utilizes a pressure measurement as feedback to the pressure control system250in order to control the pressure of the plasma processing chamber120. The processing chamber120facilitates the formation of processing plasma136in a process space adjacent to substrate116. Alternately, the plasma processing chamber120facilitates the introduction of a process gas140in a process space adjacent to substrate116. The processing system100is configured to process two or three hundred millimeter (mm) substrates, or larger substrates. In an alternate embodiment, processing system100includes multiple processing chambers120, and the processing system100operates by generating plasma136in one or more processing chambers120.

In various embodiments, the processing system100further includes an upper assembly220coupled to the processing chamber120. For example, the upper assembly220includes a gas distribution plate275that is coupled to a gas distribution system270for introducing a process gas140into a process space within the processing chamber120in some embodiments. The gas distribution plate275further comprises a plurality of orifices276configured to distribute one or more gasses from the gas distribution system270to the process space of the processing chamber120. The process gas140includes at least one of NH3, HF, H2, O2, CO, CO2, Ar, He, and N2. For example, during a poly and/or nitride processes the process gas140is at least one of dichlorosilane (DCS), trichlorosilane (TCS), SiH4, Si2H6, hexachlorodisilane (HCD), and NH3in some embodiments. During a CVD oxide process, the process gas140includes at least one of tetraethoxysilane (TEOS) and bistertiarybutylaminosilane (BTBAS). During an ALD process the process gas140includes at least one of H2O, trimethylaluminum (TMA), hafnium tertbutoxide (HTB), NO, or N2O. During a metal CVD process the process gas140includes at least one of tungsten carbonyl, rhenium carbonyl, and t-amylimidotris(dimethylamido)tantalum (V) (taimata) in some embodiments.

In various embodiments, the upper assembly220is configured to perform at least one of the following functions: provide a capacitively coupled plasma (CCP) source, provide an inductively coupled plasma (ICP) source, provide a transformer-coupled plasma (TCP) source, provide a microwave powered plasma source, provide an electron cyclotron resonance (ECR) plasma source, and provide a surface wave plasma source.

In various embodiments, the upper assembly220includes an upper electrode230and/or magnet system components (not shown). In some embodiments, the upper assembly220includes supply lines, injection devices, and/or other gas supply system components (not shown). Furthermore, the upper assembly220includes a housing, a cover, sealing devices, and/or other mechanical components (not shown).

As shown inFIG.2, the processing system100, in various embodiments, further includes an inner deposition shield229, a shutter231, an inner shutter232, a bottom cover233, an exhaust plate234, and a lower wall cover235. In various embodiments, the inner deposition shield229, the shutter231, the inner shutter232, the bottom cover233, the exhaust plate234, the lower wall cover235, and/or the substrate holder240include a protective barrier or surface coating132formed on one or more exposed surfaces to prolong life and prevent decay of the components due to plasma exposure.

In various embodiments, the processing chamber120includes a monitoring device215connected to a monitoring port (not shown), in order to permit optical or sensor monitoring of the plasma processing chamber120and used for end point detection, contamination detection and or other alerting of process operations.

In various embodiments, the substrate116is transferred into and out of the processing chamber120through an opening294that is controlled by a gate valve assembly290. In addition, the substrate116is transferred on and off the substrate holder using a robotic substrate transfer system (not shown). In addition, the substrate116is received by substrate lift pins (not shown) housed within the substrate holder240and mechanically translated by devices housed therein. Once the substrate116is received from substrate transfer system, it is lowered to an upper surface of substrate holder240.

In some embodiments, the substrate116is affixed to the substrate holder240via an electrostatic clamping system, but passive wafer restraints are also used. Moreover, the process gas140is delivered to the backside of the substrate116via a backside gas system (not shown) to improve the gas-gap thermal conductance between the substrate116and the substrate holder240. Such a system is utilized when temperature control of the substrate116is required at elevated or reduced temperatures. In other embodiments, heating elements, such as resistive heating elements, or thermoelectric heaters/coolers are included.

In alternate embodiments, wafer holding tools such as a substrate holder240, further include a vertical translation device (not shown) that is surrounded by a bellows (not shown) coupled to the substrate holder240and the processing chamber120, which is configured to seal the vertical translation device from the reduced pressure atmosphere in the processing chamber120. Additionally, a bellows shield (not shown) is coupled to the substrate holder240and configured to protect the bellows.

As shown inFIG.2, the substrate holder240, for example, further includes a focus ring241, a focus ring base242, an ESC enclosure243, an insulator ring244, an electrostatic chuck112, and a lower electrode247. The focus ring241, the focus ring base242, the ESC enclosure243, and/or the insulator ring244, in various embodiments, include a surface coating or protective barrier (not shown) formed on one or more exposed surfaces to prolong life and prevent decay of the components due to plasma. Alternatively, the substrate holder240is configured in any of a variety of known manners.

In various embodiments, the substrate holder240includes a lower electrode247through which RF power is coupled to the process gas140in the process space of the plasma processing chamber120. For example, substrate holder240is electrically biased at an RF voltage via the transmission of RF power from, for example, a first RF or microwave source124. In some cases, an RF bias is used to heat electrons to form and maintain the plasma136. A frequency for the RF bias ranges from one megahertz (MHz) to one hundred MHz in some embodiments, for example, 13.56 MHz. In addition, in other embodiments, the substrate holder240includes a surface coating132(i.e., a protective barrier) formed on one or more exposed surfaces of the substrate holder240.

Again referring toFIG.2, some embodiments of the upper assembly220include an upper electrode body221, a top baffle assembly222, a temperature control plate223, an electrode cover224, an inner shield ring225, and an outer shield ring226. In various embodiments, the electrode cover224, the inner shield ring225, and the outer shield ring226include a surface coating or protective barrier (not shown) formed on one or more exposed surfaces. In alternate embodiments, a protective barrier (not shown) is formed on one or more interior surfaces of the upper assembly220.

In various embodiments, the processing system100includes a second RF system285that is coupled to the upper electrode221and used to provide additional RF power to the process gas140in the process space of the plasma processing chamber120. In various embodiments, the upper electrode221is electrically biased at an RF voltage via the transmission of RF power from the second RF system285. In some cases, this RF signal is used to form and/or control plasma. The frequency for the second RF system285ranges from one MHz to one hundred MHz, for example, 60 MHz.

Protective barriers, when used to protect components in processing system100, are created in a number of different ways. In one case, a protective barrier is created by anodizing a metal, and impregnating the anodized surface with a fluoropolymer, such as polytetrafluoroethylene (PTFE). For example, a protective barrier is formed by hard anodizing aluminum or hard anodizing an aluminum alloy and impregnating the hard-anodized surface with PTFE. In other cases, a protective barrier is created using at least one of Al2O3, yttria (Y2O3), Sc2O3, Sc2F3, YF3, La2O3, CeO2, Eu2O3, and DyO3. In addition, a protective barrier is at least one of a Group III element (Group III of the periodic table) and a lanthanide element; the Group III element includes at least one of yttrium, scandium, and lanthanum in some embodiments. The lanthanide element includes at least one of cerium, dysprosium, and europium in some embodiments. In some embodiments, a protective barrier is formed in the processing chamber120as part of a pre-process coating, such as a silicon nitride or Si coating before forming the desired process film. In some embodiments, a sensor299, such as an x-ray photoelectron spectrometer (XPS) is provided within the plasma processing chamber120, or in operable proximity thereto, to monitor the level of contaminants on FC parts, plasma processing parts or tools or otherwise inside the chamber (i.e., airborne contaminants). The sensor299senses spectra corresponding to yttrium-based compounds or other pertinent contaminants that are generated by the plasma processing parts and tools over time due to plasma exposure.

As shown inFIG.2, a processing module100includes an upper assembly220and a processing chamber120having a substantially cylindrical electrically conductive unit including an open top in various embodiments. The upper assembly220is detachably fixed to the processing chamber assembly120by a locking mechanism205, and thus, the processing chamber assembly120is opened and/or closed freely. This facilitates the replacement or cleaning of components and/or the cleaning of the chamber.

A gas supply system270is coupled to the upper assembly220. In some embodiments, a two-zone gas distribution configuration is used. A first gas supply line271is coupled to a first distribution zone (not shown), and a second gas supply line272is coupled to a second distribution zone (not shown). For example, the first distribution zone is located in a center portion of the chamber, and the second distribution zone is located in a peripheral portion of the chamber. A plurality of gas outlet holes276are formed in the upper assembly220to provide a process gas into a plasma processing space212. The outlet holes (orifices)276are connected to the gas supply system270through the baffle222. Thus, one or more different process gasses are supplied from the gas supply source270at different rates into different zones of the plasma processing space212via the outlet holes276.

In various embodiments, an exhaust plate234is provided around the bottom portion of the substrate holder220. The exhaust plate234is used to separate the plasma processing space202from an evacuation space204, and the exhaust plate234includes a plurality of holes239formed in the exhaust plate234. For example, the plurality of holes239include a plurality of through holes and a plurality of blind holes (non-through holes). The plasma processing space above the exhaust plate234and the evacuation space204below the exhaust plate234communicate with each other through the through holes239. Thus, the process gas140inside the plasma processing chamber120travels through the through holes239in the exhaust plate234and is then evacuated as necessary by the pressure control system250.

The system ofFIG.2is used for etching, for example, a gate stack for a semiconductor device. Specifically, a gate stack originates from a multilayer structure including a layer of undoped polysilicon, a layer of doped polysilicon, and an antireflective coating layer. This multilayer structure is then masked and etched to provide a gate stack structure having desired critical dimensions, such as a vertical height critical dimension (CD). Other semiconductor devices are readily contemplated as well.

Over time, the repeated performance of etching processes leads to conditions within the processing chamber120that are undesirable for further performance of the etched process. For example, the etching process leads to particle buildup on chamber components, which break away to contaminate the substrate116being processed. Thus, periodic cleaning of the plasma processing chamber120must be performed.

FIG.3andFIG.4illustrate a computer system300for controlling the processing system100and its components in accordance with some embodiments of the present disclosure.FIG.3is a schematic view of a computer system300that controls the plasma processing system100ofFIG.1. In some embodiments, the computer system300is programmed to initiate a process for monitoring contamination levels of chamber components, wafer holding tools or airborne contamination arising from the same and provide an alert that cleaning is required. In some embodiments, manufacturing of semi-conductor devices is halted in response to such an alarm. In some embodiments, a clean in place (CIP) process is initiated in response to the activation of such an alarm. As shown inFIG.3, the computer system300is provided with a computer301including an optical disk read only memory (e.g., CD-ROM or DVD-ROM) drive305and a magnetic disk drive306, a keyboard302, a mouse303(or other similar input device), and a monitor304.

FIG.4is a diagram showing an internal configuration of the computer system300. InFIG.4, the computer301is provided with, in addition to the optical disk drive305and the magnetic disk drive306, one or more processors311, such as a micro-processor unit (MPU) or a central processing unit (CPU); a read-only memory (ROM)312in which a program such as a boot up program is stored; a random access memory (RAM)313that is connected to the processors311and in which a command of an application program is temporarily stored, and a temporary electronic storage area is provided; a hard disk314in which an application program, an operating system program, and data are stored; and a data communication bus315that connects the processors311, the ROM312, and the like. Note that the computer301, in some embodiments, includes a network card (not shown) for providing a connection to a computer network such as a local area network (LAN), wide area network (WAN) or any other useful computer network for communicating data used by the computer system300and the plasma processing system100.

The program for causing the computer system300to execute the process for controlling the plasma processing system100ofFIG.1, and components thereof and/or to execute the process for the method of manufacturing a semiconductor device according to the embodiments disclosed herein are stored in an optical disk321or a magnetic disk322, which is inserted into the optical disk drive305or the magnetic disk drive306, and transmitted to the hard disk314. Alternatively, the program is transmitted via a network (not shown) to the computer system300and stored in the hard disk314. At the time of execution, the program is loaded into the RAM313. The program is loaded from the optical disk321or the magnetic disk322, or directly from a network. The program includes, in various embodiments, a cleaning program for periodically cleaning chamber surfaces, wafer holding components and the like, which has protective coatings or barriers to protect from plasma exposure. In various embodiments, cleaning program is run after detection of yttrium or yttrium compounds that are generated as protective coatings or barriers decay over time. In various embodiments, the detection occurs during operation of the processing system100. In various embodiments, the cleaning program is run during a maintenance period when the processing system100is not operating.

The stored programs do not necessarily have to include, for example, an operating system (OS) or a third party program to cause the computer301to execute the methods disclosed herein. The program only includes a command portion to call an appropriate function (module) in a controlled mode and obtain desired results in some embodiments. In various embodiments described herein, the controller300is in communication with the processing system100to control various functions thereof. In various embodiments, the controller300automatically directs when to start and/or stop a cleaning process, for example, when contaminants are detected within the processing system100.

The controller300is coupled to the chamber120, monitoring device215, upper assembly220, substrate holder240, pressure control system250, control source262, temperature control unit265, gas supply system (gas distribution system)270, first RF or microwave source124, second RF source285, and gate valve290. The controller300is configured to provide control data to those system components and receive process and/or status data from those system components. For example, the controller300includes a microprocessor, a memory (e.g., volatile or non-volatile memory), and a digital I/O port capable of generating control voltages sufficient to communicate and activate inputs to the processing system100, as well as monitor outputs from the processing system100. Moreover, the controller300exchanges information with chamber120, monitoring device215, upper assembly220, substrate holder240, pressure control system250, control source262, temperature control unit265, gas supply system270, first RF source124, second RF source285, and gate valve290in some embodiments. In addition, in some embodiments, a program stored in the memory is utilized to control the aforementioned components of a processing system100according to a process recipe. Furthermore, the controller300is configured to analyze the process and/or status data, to compare the process and/or status data with target process and/or status data, and to use the comparison to change a process and/or control a system component. In addition, the controller300is configured to analyze the process and/or status data, to compare the process and/or status data with historical process and/or status data, and to use the comparison to predict, prevent, and/or declare a fault or alarm.

It has been found that with aluminum-based coatings used in semiconductor fabrication devices, yttrium particle accumulation occurs from aging parts and tools, especially after fifteen hundred RF-hours of plasma exposure time. Such particle accumulation has been discovered to arise from a fragile layer of yttrium-containing compounds that build up over time on a surface of the protective coating of such parts and tools. Such fragile layer, referred to herein as a peeling weakness surface (PWS), cannot be removed by prior cleaning processes, as described previously above. The components include, but are not limited to exhaust plates, bottom rings, deposition shields, shutters, deposition rings and the like. In various embodiments, the body of such components and chamber surfaces is made of aluminum. The surfaces of such aluminum-based components are protected by a protective or surface coating that includes CO2and yttrium based compounds, such as Y2O3or YF3. Initially, such a protective coating protects the components from decay without impacting the composition and distribution of plasma136within the plasma chamber120. However, such coatings will age and generate contaminant particles during exposure to plasma after a period of operation.

The Y2O3coating found in processing chambers themselves (i.e. chamber walls) is usually very stable to ambient conditions and has very high melting temperature, namely up to two hundred sixty-eight degrees Celsius. However, under HBr/O2high density plasma conditions, OH ions or hydrogen (H) and oxygen (O) atoms are generated. These species react with Y2O3to form Y(OH)3as follows: Y2O3+3H2O=2Y(OH)3. This yttrium hydroxide is very brittle and forms airborne contaminant particles from the Y2O3coating surface. After plasma etching or other processes using a plasma136, coated FC parts also age to form YOF, which in turn causes the formation of a PWS layer163that generates excessive yttrium element peeling and airborne contaminant particles502during plasma exposure, as now described below.

FIG.5depicts plasma impact on a surface coating132of plasma processing parts and tools (i.e., FC parts) over time according to various embodiments, where the surface coating is YOxFy. In the operation of some plasma chambers, mixed high-frequency (HF) and low-frequency (LF) power conditions are employed. As shown in graph500, the etch amount on a substrate116increases with the addition of LF power. Namely, at four hundred watts (W) of HF and 0 W of LF (i.e., a first condition in which HF is used but LF is not), the etch amount is about thirty nanometers (nm). In this first condition, the surface damage is less than that of mixed RF conditions, however, a higher quantity of contaminant particles502may fall on the substrate. The contaminant particles502that drift from the PWS layer163generated over time on the surface coating132therefore causes contamination of the substrate116during wafer processing. At 400 W of HF and 400 W of LF (i.e., a second condition with mixed HF and LF usage), on the other hand, the etch amount is about fifty nm. Concomitantly, such a mixed power condition has higher parts damage that yields a low yttrium particle count. The plasma sheath504generated within the plasma processing chamber120protects from some drift of yttrium particle contaminants, but such contaminant particles502are not completely contained. Contaminant particles502do not fall on the substrate, as in the first condition, but instead are directed back to the PWS layer163, creating more severe surface damage on the FC parts. Plasma etching using high power trim will thus deteriorate the surface coating132of FC parts after a sufficient period of high RF time. In aluminum tools with yttrium-based surface coatings exposed to the plasma136, this causes an yttrium particle source defect. There are also full-spectrum defects in the yttrium-coated parts of the plasma etching chamber.

Yttrium-based coatings, such as Y2O3coatings, have been used in plasma process tools as a coating material due to its high resistance to erosion and corrosion, especially in metal or gate etch processes which involve NF3, Cl2/O2or HBr/O2plasmas. However, in some processes, particles originating from Y2O3coatings are increasingly problematic, especially as the lines and structures of manufactured semiconductor devices become smaller and smaller. These particles cause device and process failure. YF3coating is used instead of Y2O3in an attempt to suppress the generation of contaminant particles. However it has been found that the etch rate drifts or decreases significantly with fresh or cleaned parts, and extended dummy runs are required to season the parts in order to have an acceptable and stable etch rate. Contamination is also generated from an unexpected source.FIG.6schematically illustrates the progression of the development of a PWS layer163on a surface coating132comprising YF3according to some embodiments. When FC parts are new or newly used (i.e., initial condition), the YF3surface coating has no irregularities. It has been discovered that after being exposed to plasma over a period of time, the surface of the YF3coating slowly develops an irregular fragile PWS layer163of YOXFYthrough processes that are presently not well understood. It has been observed that this PWS layer163grows over time. As aging progresses and plasma exposure continues, this PWS layer will generate contaminant particles502that can be peeled off from the surface and drift into the plasma chamber, thereby causing defects in workpieces. Wafer-less dry clean or wet clean processes are not sufficient to eliminate particle generation or to remove any portion of the PWS layer163.

Plasma etching with high power trim will consume parts after high RF time due, at least in part, to fall-on particle residue. This, in turn, adversely affects the defect level of workpieces.FIG.7depict charts700of three different defect levels of contaminant concentration over time under partial etch conditions, according to some embodiments. As shown in segment710, an etch amount of seven nm is yielded after one hundred seventy hours of RF exposure. As shown in segment720, this yields an etch amount of residue in the amount of fourteen nm. As shown in segment730, this results in a fall on contamination level of five nm.

In some embodiments, the coated parts and Y-coated parts described herein refer to FC parts. Examination of Y-coated parts in the plasma processing chamber120by full spectra sensing found defects caused by Y particle accumulation, originating from the fragile PWS layer163of aging plasma processing parts after RF usage greater than fifteen hundred RF-hours. It has further been determined that such PWS layer163cannot be effectively removed by standard cleaning operations.

In order to reduce the defect issue and achieve superior performance by and extended lifetime of plasma processing parts, an optimized etch amount of approximately ten nm is performed by embodiments of the new cleaning processes for such parts and tools as disclosed herein. Examination by a particle monitor, such as an XPS that searches for the spectral wavelength of Y, shows that the weaker bonding energy of the PWS layer163on plasma processing part surfaces is overcome by the new cleaning methods disclosed herein, and the altered PWS layer163that yields Y contaminant particles is completely removed.

FIG.8illustrates the effects of the cleaning processes according to embodiments of the disclosure. A high-power fine-tuning process is used to modify the plasma etching depth on a substrate116. In some embodiments, more than fifteen hundred watts RF is employed. The cleaning processes of the present disclosure is effective in removing the weaker-bonding energy PWS layer163on plasma processing parts and tools. In particular, instead of a water washing, the cleaning process uses sand blasting. The “surface treatment” method of sand punching and cutting objects, also referred to herein as a sand blasting or a bead beating method is a destructive processing method for removing an unwanted surface of the material. Fine abrasive sand particles or glass beads are used to impact the surface of the material, so that the surface produces a grain-like depression, thereby forming a matte surface or an eroded surface. Bead beating is used in embodiments of the disclosure as a new method to treat plasma processing parts in a manner not heretofore contemplated. In various embodiments, a bead beating apparatus includes a compressor (not shown) for supplying compressed air, a tank which contains an abrasive (not shown) to be used for the bead beating, a mixer that mixes the abrasive, as supplied from, for example, an external supply pipe (not shown) with the compressed air supplied from the compressor, and a nozzle (not shown) which sprays the abrasive from the mixer onto the surface of the material using the compressed air. In some embodiments, the compressed air includes a carrier fluid the carrier fluid, for example, CDA (clean dry air), nitrogen, argon, and other suitable fluids. In some embodiments, the abrasive includes glass beads, sand or other suitable particulates of appropriate size in the range of 1-5 nm. After a certain number of bead beating operations, or a certain amount of time, the abrasive is removed after use by a vacuum pump and filtered to remove impurities and contaminants and reused in a subsequent bead beating operation.

Diagram800ofFIG.8displays the effects of the improved cleaning process on a protective coating or surface layer132on plasma processing components, parts and tools. Segment801shows a surface layer132with a PWS layer163that generates contaminant particles502after extended exposure to RF and plasma and before any cleaning process is applied. Segment802displays the effects of wet cleaning processes on the surface layer132, in which the PWS layer163and contaminant particles502are partially mitigated but largely remain. Segment803displays the results of the bead beating process applied to the surface layer132in which the PWS layer163is largely removed and the generation of airborne contaminants is minimized.

Chart900ofFIG.9further illustrates the difference in efficacy between a wet clean process and a bead beating process according to some embodiments. Segment901displays an initial condition of a protective barrier, such as surface layer132, where the top line represents an amount of fluorine (F), the middle line represent the amount of yttrium and the bottom line represents an amount of oxygen (O) present. Segment902shows the composition of the same surface layer132after 2600 hours of RF and plasma exposure followed by a wet clean process, in which elevated amounts of Y and F are observed to remain. Segment903shows the results of a beat beating clean process on the surface layer132also performed after 2600 hours of RF and plasma exposure, in which the levels of F, Y and O have been comparatively restored to their initial conditions and stabilized due to the PWS layer163being largely removed.

FIG.10is a chart illustrating the condition of the PWS layer163over time and after cleaning according to some embodiments. As shown in segment1001, which represents the characteristics of the surface layer132after bead beating is applied, in-line defects improve 36%-50% below the average (shown by the dotted line) and the peek highs observed in previous cycles are eliminated.

FIG.11shows a second chart1100illustrating the characteristics of the PWS layer163after cleaning and then after additional exposure to RF and plasma during wafer manufacturing operations, according to various embodiments. As demonstrated above, the bead beating cleaning processes restore the surface layer132to the initial operating conditions (as illustrated by segment1101), but over time, the depth and roughness of the surface layer132increases again with increased RF and plasma exposure (as illustrated in segment1102). This will lead to more airborne contaminant particles over time and the bead beating cleaning process will need to be applied again.

FIG.12depicts a chart1200of coating thickness and roughness after the bead beating cleaning processes are applied, according to various embodiments. Segment1210shows the initial thickness (in micrometers) of a typical PWS layer163after plasma exposure, where the thickness control limit is 110 μm. Segment1220shows roughness data the peeling weakness surface. Each application of the bead beating process removes about 10 micrometers (um) of the PWS surface layer132. In some embodiments, the thickness control limit of the surface layer132is between 110 μm and 150 μm. In some embodiments, the bead beating process is safely employed up to three times during the lifecycle of the part to revitalize the protective surface layer132without eliminating too much of its depth. After one cleaning, the data on the surface of the object was measured by x-ray photoelectron spectroscopy (XPS). Segment1220shows the thickness result from one such cleaning and demonstrates that the coating depth remains within specifications. Segment1230shows that roughness of the surface layer caused by buildup of the PWS layer163over time is likewise returned to specification.

FIG.13is a flowchart of a process1300for detecting a PWS condition and initiating a cleaning and revitalizing process in accordance with the embodiments disclosed herein. At operation1302, during a wafer manufacturing process, a sensor, such as sensor299monitors the plasma processing chamber for airborne particle contamination. In some embodiments, this operation is performed when the processing system100is offline in addition to or instead of being performed during the processing system operation.

At operation1304, the controller300determines whether sufficient contamination levels are present based on the readings of sensor299to require cleaning contamination. In various embodiments, any detectable amount of airborne yttrium contamination particles502justifies cleaning. If particle contamination remains below a threshold value, the process1300continues to operation1306. If contamination levels at or above the threshold value are instead detected, the process1300continues to operation1310.

At operation1306, the sensor299is used to monitor the thickness and/or roughness of the PWS layer163on any plasma processing parts, tools or components within the processing chamber120. At operation1308, the controller300, based on the measurements from the sensor299, determines whether a threshold amount of thickness or roughness is present on the plasma processing parts, tools and components to justify an alarm condition. In various embodiments, the thickness threshold is 10 um.

At operation1310, the controller300generates an alarm condition in response to threshold levels of contamination present within the plasma processing chamber120. In response to the alarm condition, when the processing system is online, the wafer manufacturing process is halted at operation1312.

Next, at operation1314, a bead beating cleaning process is initiated to remove the PWS layer163from the surface layer132on plasma processing parts, tools and components. In some embodiments, the bead beating cleaning process is performed as a clean-in-place (CIP) process where the parts, tools or components are left in place in the processing system100while the cleaning process is performed. In such embodiments, after the cleaning process is performed, vacuum pumps and the like are used to remove any loose residue generated by the cleaning process form the plasma processing chamber120before it is placed back into operation. In other embodiments, the plasma processing parts, tools and components are removed from the processing system100for cleaning and then re-placed back in the plasma processing chamber120before operation is re-commenced.

Then, at operation1316, the sensor299is used to confirm removal of sufficient depth of the PWS layer163, and that the thickness and/or roughness of the surface layer132is within specifications. If so, the process returns to operation1302above and semiconductor processing operations are resumed by the processing system100. In various embodiments, the sensor299performs its operation during processing, during bead blast cleaning, after cleaning, during an offline time of the processing system100, and inside or outside of the plasma processing chamber120.

Benefits of the present disclosure include the removal of a PWS layer from tools and components that were not affected by wet clean methods. In various embodiments, the PWS layer is completely removed with each application. At the same time, the protective surface coatings of the tools and components are preserved. This in turn allows the tools and components to be used for extended lifetime when compared to the same tools and components not so cleaned. The cleaning of the PWS layer163in the embodiments described herein further prevent contamination of wafer processing equipment and workpieces, which, in turn, increases production yields and reduces the downtime of such equipment.

According to various embodiments hereinabove, a method for cleaning components of a plasma processing apparatus includes: (1) disposing a wafer holding tool having a surface coating132within a chamber120of the plasma processing apparatus100; (2) initiating a wafer manufacturing process; (3) detecting, by a sensor299, a presence of an airborne contaminant within the chamber, the airborne contaminant originating from a peeling weakness surface (PWS)163on the surface coating132; (4) halting the wafer manufacturing process; and (5) initiating a revitalizing process that removes a depth of the PWS163from the surface coating132.

In some embodiments, a thickness of the PWS163is measured after initiating the revitalizing process and when the thickness is within an acceptable range, the revitalizing process ends and the wafer manufacturing process is resumed. In some embodiments, a roughness of the PWS163is measured after initiating the revitalizing process and when the roughness is within an acceptable range, the revitalizing process ends and the wafer manufacturing process resumes. In some embodiments, the sensor299is activated after a threshold number of hours of operation of the plasma processing apparatus100. In some embodiments, the sensor299comprises an x-ray photoelectron spectroscopy sensor. In some embodiments, the plasma processing apparatus100is a plasma etching apparatus and the chamber is a plasma chamber. In some embodiments, the plasma processing apparatus100is a plasma deposition apparatus having a plasma generation stage including the chamber120. In some embodiments, the PWS163is yttrium hydroxide. In some embodiments, the airborne contaminant comprises yttrium. In some embodiments, a depth of the PWS163removed is at least 10 micrometers. In some embodiments, the cleaning process is a bead beating process or a sandblasting process.

In various embodiments, a method for prolonging the life of plasma processing tools, parts and components includes: (1) disposing a wafer holding tool within a chamber120of a plasma processing apparatus100; (2) initiating a wafer manufacturing process; and (3) disposing a sensor299within the chamber120for measuring a thickness of a peeling weakness surface163on a coating132of the wafer holding tool. When the thickness exceeds a threshold value the wafer manufacturing process is halted and a revitalizing process for removing at least a portion of the peeling weakness surface163from the coating132is initiated.

In some embodiments, at least one of a depth and a roughness of the peeling weakness surface163is measured and when the at least one of the depth and the roughness is within an acceptable range the revitalizing process ends and the wafer manufacturing process commences. In some embodiments, at most ten micrometers of a thickness of the peeling weakness surface is removed from the coating. In some embodiments, the wafer manufacturing process is at least one of a plasma deposition process and a plasma etching process. In some embodiments, the revitalizing process is a bead blasting process.

In various embodiments, a plasma processing method includes measuring at least one of: (i) a thickness of a peeling weakness layer163on a surface coating132of the wafer holding tool, and (ii) a level of airborne contaminant within the chamber120. A revitalization process to remove substantially all of the peeling weakness layer163from the surface coating132using bead beating is initiated when at least one of: (i) the thickness of the depleted layer exceeds a threshold thickness value, and (ii) an airborne contaminant originating from the PWS layer163is detected.

In some embodiments, the revitalization process is a CIP process. In some embodiments, the wafer holding tool is at least one of a bottom ring, an exhaust plate, a deposition shield, a shutter and a deposition ring. In some embodiments, the wafer holding tool is aluminum and the surface coating132is at least one of Y2O3and YF3.

The foregoing outlines features of several embodiments or examples so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments or examples introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.