Patent ID: 12226799

DESCRIPTION OF THE EMBODIMENTS

Like features have been designated by like references in the various figures. In particular, the structural and/or functional features that are common among the various embodiments may have the same references and may dispose identical structural, dimensional and material properties.

For the sake of clarity, only the steps and elements that are useful for an understanding of the embodiments described herein have been illustrated and described in detail. In particular, the various possible applications of the described transducers have not been detailed, the described embodiments being compatible with usual applications of ultrasound transducers, particularly in ultrasound imaging devices. Further, the circuits for controlling the described transducers have not been detailed, the described embodiments being compatible with all or most known CMUT control circuits.

Unless indicated otherwise, when reference is made to two elements connected together, this signifies a direct connection without any intermediate elements other than conductors, and when reference is made to two elements coupled together, this signifies that these two elements can be connected or they can be coupled via one or more other elements.

In the following disclosure, unless indicated otherwise, when reference is made to absolute positional qualifiers, such as the terms “front”, “back”, “top”, “bottom”, “left”, “right”, etc., or to relative positional qualifiers, such as the terms “above”, “below”, “higher”, “lower”, etc., or to qualifiers of orientation, such as “horizontal”, “vertical”, etc., reference is made to the orientation shown in the figures.

Unless specified otherwise, the expressions “around”, “approximately”, “substantially” and “in the order of” signify within 10%, and preferably within 5%.

FIG.1is a cross-section view schematically showing an example of a CMUT100(also referred to as transducer100).

Transducer100comprises a doped semiconductor layer101, for example, made of silicon, defining a lower electrode E1of the transducer.

Semiconductor layer101is coated, on its upper surface side, with a rigid support layer103made of a dielectric material, for example, silicon oxide. In the example, layer103is in contact, by its lower surface, with the upper surface of semiconductor layer101.

Transducer100further comprises a cavity105formed in layer103. Cavity105extends vertically from the upper surface of layer103, towards its lower surface. In the shown example, cavity105is non-through, that is, it does not emerge on the lower surface side of layer103. In other words, a lower portion of the thickness of layer103coats the upper surface of electrode101at the bottom of cavity101. As an example, the depth of cavity105(vertical dimension in the orientation ofFIG.1) is in the range from 20 nm to 5 μm, for example in the range from 50 nm to 1 μm. The lateral dimensions of cavity105are for example in the range from 5 μm to 500 μm.

Transducer100further comprises a flexible membrane107suspended above cavity105. In this example, membrane107is made of a semiconductor material, for example, of silicon. Membrane107extends above cavity105and is attached, at the periphery of cavity105, by its lower surface, to the upper surface of dielectric layer103. As an example, the lower surface of membrane107is directly in contact with the upper surface of dielectric layer103at the periphery of cavity105.

Transducer100further comprises, above membrane107, a conductive layer109, for example, a metal layer, defining an upper electrode E2of the transducer. Conductive layer109for example extends over substantially the entire upper surface of membrane107. In the shown example, conductive layer109is in contact, by its lower surface, with the upper surface of membrane107.

Transducer100may be coupled to an electronic control circuit CTRL, not detailed, connected to its lower and upper electrodes E1and E2, configured to, during a transmission phase, apply an excitation voltage between electrodes E1and E2and, during a reception phase, read a voltage between electrodes E1and E2. As an example, the control circuit may be configured to, during transmission and/or reception phases, apply a DC bias voltage between electrodes E1and E2. During transmission phases, the control circuit further applies between electrodes E1and E2an AC excitation voltage superposed to the DC bias voltage, to cause a vibration of membrane107resulting in the transmission of an ultrasound acoustic wave. During reception phases, an AC voltage superposed to the DC bias voltage appears between electrodes E1and E2under the effect of the received acoustic wave. The AC voltage is read by the control circuit.

When the voltage applied between electrodes E1and E2of the transducer exceeds, in absolute value, a given threshold, called collapse threshold, collapse voltage or pull-in voltage, flexible membrane107is capable of coming into contact, by its lower surface, with the bottom of cavity105, in a central region (in top view) of cavity105. In this position, called collapsed, of the membrane, the portion of dielectric layer103located at the bottom of cavity105enables to avoid a short-circuit between electrodes E1and E2of the transducer (via semiconductor membrane107).

A limitation of the structure ofFIG.1is that, in collapsed position of membrane107, a strong electric field, for example an electric field of around 2 MV/cm or above, is generated in the portion of dielectric layer103in contact with membrane107at the bottom of cavity105. This may cause an injection of electric charges in dielectric layer103at the bottom of cavity105. The charges may induce a modification of the bias voltages required to drive the transducer. In certain conditions, this electric field may result in causing a breakdown of dielectric layer103at the bottom of cavity105.

Another limitation of the structure ofFIG.1is due to the fact that semiconductor membrane107and conductive layer109extend not only above cavity105, but also above the periphery of cavity105. This results in an unwanted parasitic capacitive coupling between layers109and101, at the periphery of cavity105. This may result in degrading the quality of the measurements performed by means of the transducer.

FIG.2is a cross-section view schematically showing an example of a CMUT200(also referred to as transducer200) according to an embodiment.

The transducer200ofFIG.2comprises elements common with the transducer100ofFIG.1. These elements will not be detailed again hereafter. In the rest of the description, only the differences with respect to the transducer100ofFIG.1will be highlighted.

The transducer200ofFIG.2differs from the transducer100ofFIG.1in that, in transducer200, the semiconductor membrane107of transducer100is replaced with a membrane207made of a dielectric material, for example, silicon oxide. As the membrane107of transducer100, the membrane207of transducer200extends above cavity105and is attached, at the periphery of cavity105, by its lower surface, to the upper surface of dielectric layer103. The lower surface of membrane207is for example directly in contact with the upper surface of dielectric layer103at the periphery of cavity105. The thickness of dielectric membrane207is for example in the range from 100 nm to 10 μm.

Transducer200further comprises, above membrane207, to replace the conductive layer109of transducer100, a stack of a layer209made of a first conductive material and of a layer211made of a second conductive material different from the first material. Layer209is in contact, by its lower surface, with the upper surface of membrane207. Layer211is in contact, by its lower surface, with the upper surface of layer209. It should in particular be noted that, in this example, layer211is not directly in contact with membrane207.

The stack of conductive layers209and211defines an upper electrode E2of the transducer.

In this example, layers209and211are located opposite a central portion of membrane207, located opposite cavity105. In other words, at least a portion of the upper surface of the peripheral walls of suspension of membrane207, formed by the region of dielectric layer103located at the periphery of cavity105, is not topped with conductive layers209and211.

The transducer200ofFIG.2may be controlled identically or similarly to what has been previously described in relation withFIG.1.

It should be noted that as a variation (not shown), the dielectric layer portion103remaining at the bottom of cavity105may be removed. In other words, cavity105may be a through cavity and emerge onto the upper surface of layer101. Indeed, in the embodiment ofFIG.2, membrane207being made of a dielectric material, the risk of short-circuit between electrodes E1and E2in collapsed position of the membrane is avoided.

Preferably, layer209is made of a metal having a high work function, for example a work function higher than 4.2 eV, to maximize the potential barrier between conductive layer209and dielectric membrane207, and thus avoid charge injections into membrane207, particularly in the collapsed position of the membrane. Preferably, layer209is made of a metal having a higher work function than the metal of layer211. In a preferred embodiment, layer209is made of an alloy of titanium and tungsten (TiW). As a variation, layer209can be made of silver (Ag), nickel (Ni), palladium (Pd), gold (Au), platinum (Pt), or of an alloy of one or a plurality of these metals.

Layer211may be made of a metal selected to increase the electrical conductivity of the upper electrode. Preferably, layer211is made of a metal having a higher electrical conductivity (lower resistivity) than the metal of layer209. As an example, layer211is made of an alloy of aluminum and copper (AlCu). As a variation, layer211can be made of gold silver (Ag), gold (Au), aluminum (Al), copper (Cu), (nickel (Ni), palladium (Pd), or of an alloy of one or a plurality of these metals.

As a variation (not shown), an intermediate layer made of a metal having a work function lower than the work function of the metal of layer209and higher that the work function of the metal of layer211can be provided between layer209and layer211.

An advantage of the transducer200ofFIG.2over the transducer100ofFIG.1is that the electric nature of the flexible membrane207of transducer200enables to avoid phenomena of charge injection at the bottom of cavity105, in the collapsed position of the membrane.

Another advantage, due to the location of upper electrode E2opposite cavity105and to the dielectric nature of membrane207, is a significant decrease, or even a suppression, of the lateral parasitic capacitance between electrodes E1and E2of the transducer at the periphery of cavity105. This also reduces the parasitic capacitance between adjacent cavities. This enables to improve the quality of the measurements performed by means of the transducer.

FIGS.3A to3Eare cross-section views illustrating successive steps of an example of a method of manufacturing a CMUT of the type described in relation withFIG.2. Although a single CMUT is shown in the drawings, in practice, a plurality of identical or similar transducers may be simultaneously monolithically formed on a same chip.

FIG.3Aillustrates the structure obtained at the end of the successive steps of:forming dielectric layer103on the upper surface side of semiconductor layer101; andforming cavity105on the upper surface side of layer103.

Layer101for example corresponds to a first substrate made of a semiconductor material, for example, a silicon substrate.

Layer103may be formed by oxidation of an upper portion of substrate101, for example, according to a dry thermal oxidation method. As a variation, layer103may be formed by deposition of a dielectric material, for example, silicon oxide, on the upper surface of substrate101.

Cavity105may be formed by local etching from the upper surface of dielectric layer103, for example, by plasma etching. As indicated hereabove in relation withFIG.2, cavity105may be through, that is, emerge onto the upper surface of layer101, or non-through, as shown inFIG.3A.

FIG.3Billustrates the structure obtained at the end of a step of forming of a dielectric layer207, corresponding to the future flexible membrane of the transducer, on the upper surface side of a second substrate301.

Substrate301may be a semiconductor substrate, for example, a silicon substrate. Layer207may be formed by oxidation of an upper portion of substrate301, for example, according to a dry thermal oxidation method. As a variation, layer207may be formed by deposition of a dielectric material, for example, silicon oxide, on the upper surface of substrate301.

FIG.3Cillustrates the structure obtained at the end of a step of transferring the structure ofFIG.3Bonto the structure ofFIG.3A. During the transfer, the surface of dielectric layer207opposite to substrate301(that is, its lower surface in the orientation ofFIG.3C) faces the surface of dielectric layer103opposite to substrate101(that is, its upper surface in the orientation ofFIG.3C). The structure ofFIG.3Bis attached to the structure ofFIG.3Aby direct bonding or molecular bonding of the surface of dielectric layer207opposite to substrate301to the surface of dielectric layer103opposite to substrate101. The bonding can be performed under vacuum, or under any atmosphere. Cavity105is thus closed, on its upper surface side, by dielectric layer207.

FIG.3Dillustrates the structure obtained at the end of a subsequent step of removal of substrate301. Substrate301is for example removed by grinding from its surface opposite to dielectric layer207. At the end of this step, only dielectric layer207is kept above the structure ofFIG.3A, forming the flexible membrane of the transducer.

FIG.3Eillustrates the structure obtained at the end of the successive steps of:depositing conductive layer209on top of and in contact with the upper surface of dielectric membrane207; anddepositing conductive layer211on top of and in contact with the upper surface of layer209.

As an example, each of layers209and211is deposited continuously and with a uniform thickness over substantially the entire upper surface of the structure (non-local depositions).

A subsequent step of local removal of layers209and211, for example, by photolithography and etching, may then be implemented to delimit upper electrode E2, to obtain a structure such as illustrated inFIG.2.

As a variation (not shown), the cavity105may be formed by etching part of the thickness of the dielectric layer207coating the substrate301at the step ofFIG.3B, before the bonding step ofFIG.3C.

Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these various embodiments and variants may be combined, and other variants will occur to those skilled in the art. In particular, the described embodiments are not limited to the examples of dimensions or to the examples of materials mentioned in the present disclosure.