Patent ID: 12237163

DETAILED DESCRIPTION

The detailed description set forth below in connection with the appended drawings or figures is intended as a description of various configurations or implementations and is not intended to represent the only configurations or implementations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of various concepts. However, it will be apparent to those skilled in the art that these concepts may be practiced without these specific details or with variations of these specific details. In some instances, well known components are shown in block diagram form, while some blocks may be representative of one or more well known components.

For some traps used in QIP systems it would be helpful to get electrodes into the center or the middle of the trap because the outer electrodes are far from where the ions are positioned and may not look that different from each other to a faraway ion. By bringing electrodes nearby (e.g., underneath) where the ions are located it may be possible to have better control of the ions, and thus, a better operation of the overall QIP system. However, this is hard to do for single metal layer traps or traps with limited connectivity.

Solutions to the issues described above are explained in more detail in connection withFIGS.1-7, withFIGS.1-3providing a background of QIP systems or quantum computers, and more specifically, of atomic-based QIP systems or quantum computers.

FIG.1illustrates a diagram100with multiple atomic ions or ions106(e.g., ions106a,106b, . . . ,106c, and106d) trapped in a linear crystal or chain110using a trap (not shown; the trap can be inside a vacuum chamber as shown inFIG.2). The trap may be referred to as an ion trap. The ion trap shown may be built or fabricated on a semiconductor substrate, a dielectric substrate, or a glass die or wafer (also referred to as a glass substrate). Several features of ion traps related to this disclosure are described below in connection withFIGS.4-7. The ions106may be provided to the trap as atomic species for ionization and confinement into the chain110. Some or all of the ions106may be configured to operate as qubits in a QIP system.

In the example shown inFIG.1, the trap includes electrodes for trapping or confining multiple ions into the chain110laser-cooled to be nearly at rest. The number of ions trapped can be configurable and more or fewer ions may be trapped. The ions can be Ytterbium ions (e.g.,171Yb+ions), for example. The ions are illuminated with laser (optical) radiation tuned to a resonance in171Yb+and the fluorescence of the ions is imaged onto a camera or some other type of detection device (e.g., photomultiplier tube or PMT). In this example, ions may be separated by a few microns (μm) from each other, although the separation may vary based on architectural configuration. The separation of the ions is determined by a balance between the external confinement force and Coulomb repulsion and does not need to be uniform. Moreover, in addition to Ytterbium ions, neutral atoms, Rydberg atoms, or other types of atomic-based qubit technologies may also be used. Moreover, ions of the same species, ions of different species, and/or different isotopes of ions may be used. The trap may be a linear RF Paul trap, but other types of confinement devices may also be used, including optical confinements. Thus, a confinement device may be based on different techniques and may hold ions, neutral atoms, or Rydberg atoms, for example, with an ion trap being one example of such a confinement device. The ion trap may be a surface trap, for example.

FIG.2illustrates a block diagram that shows an example of a QIP system200. The QIP system200may also be referred to as a quantum computing system, a quantum computer, a computer device, a trapped ion system, or the like. The QIP system200may be part of a hybrid computing system in which the QIP system200is used to perform quantum computations and operations and the hybrid computing system also includes a classical computer to perform classical computations and operations. The quantum and classical computations and operations may interact in such a hybrid system.

Shown inFIG.2is a general controller205configured to perform various control operations of the QIP system200. These control operations may be performed by an operator, may be automated, or a combination of both. Instructions for at least some of the control operations may be stored in memory (not shown) in the general controller205and may be updated over time through a communications interface (not shown). Although the general controller205is shown separate from the QIP system200, the general controller205may be integrated with or be part of the QIP system200. The general controller205may include an automation and calibration controller280configured to perform various calibration, testing, and automation operations associated with the QIP system200. These calibration, testing, and automation operations may involve, for example, all or part of an algorithms component210, all or part of an optical and trap controller220and/or all or part of a chamber250.

The QIP system200may include the algorithms component210mentioned above, which may operate with other parts of the QIP system200to perform or implement quantum algorithms, quantum applications, or quantum operations. The algorithms component210may be used to perform or implement a stack or sequence of combinations of single qubit operations and/or multi-qubit operations (e.g., two-qubit operations) as well as extended quantum computations. The algorithms component210may also include software tools (e.g., compilers) that facility such performance or implementation. As such, the algorithms component210may provide, directly or indirectly, instructions to various components of the QIP system200(e.g., to the optical and trap controller220) to enable the performance or implementation of the quantum algorithms, quantum applications, or quantum operations. The algorithms component210may receive information resulting from the performance or implementation of the quantum algorithms, quantum applications, or quantum operations and may process the information and/or transfer the information to another component of the QIP system200or to another device (e.g., an external device connected to the QIP system200) for further processing.

The QIP system200may include the optical and trap controller220mentioned above, which controls various aspects of a trap270in the chamber250, including the generation of signals to control the trap270. For example, the optical and trap controller220may be configured to control the generation of radio frequency (RF) signals to be applied to RF electrodes in the trap270and direct current (DC) signals to be applied to DC electrodes in the trap270. Several features of ion traps related to this disclosure that may be used as the trap270are described below in connection withFIGS.4-7.

The optical and trap controller220may also control the operation of lasers, optical systems, and optical components that are used to provide the optical beams that interact with the atoms or ions in the trap. Optical systems that include multiple components may be referred to as optical assemblies. The optical beams are used to set up the ions, to perform or implement quantum algorithms, quantum applications, or quantum operations with the ions, and to read results from the ions. Control of the operations of laser, optical systems, and optical components may include dynamically changing operational parameters and/or configurations, including controlling positioning using motorized mounts or holders. When used to confine or trap ions, the trap270may be referred to as an ion trap. The trap270, however, may also be used to trap neutral atoms, Rydberg atoms, and other types of atomic-based qubits. The lasers, optical systems, and optical components can be at least partially located in the optical and trap controller220, an imaging system230, and/or in the chamber250.

The QIP system200may include the imaging system230. The imaging system230may include a high-resolution imager (e.g., CCD camera) or other type of detection device (e.g., PMT) for monitoring the ions while they are being provided to the trap270and/or after they have been provided to the trap270(e.g., to read results). In an aspect, the imaging system230can be implemented separate from the optical and trap controller220, however, the use of fluorescence to detect, identify, and label ions using image processing algorithms may need to be coordinated with the optical and trap controller220.

In addition to the components described above, the QIP system200can include a source260that provides atomic species (e.g., a plume or flux of neutral atoms) to the chamber250having the trap270. When atomic ions are the basis of the quantum operations, that trap270confines the atomic species once ionized (e.g., photoionized). The trap270may be part of what may be referred to as a processor or processing portion of the QIP system200. That is, the trap270may be considered at the core of the processing operations of the QIP system200since it holds the atomic-based qubits that are used to perform or implement the quantum operations or simulations. At least a portion of the source260may be implemented separate from the chamber250.

It is to be understood that the various components of the QIP system200described inFIG.2are described at a high-level for ease of understanding. Such components may include one or more sub-components, the details of which may be provided below as needed to better understand certain aspects of this disclosure.

Aspects of this disclosure may be implemented at least partially using the trap270. Additional aspects may be implemented using the optical and trap controller220and/or the chamber250.

Referring now toFIG.3, an example of a computer system or device300is shown. The computer device300may represent a single computing device, multiple computing devices, or a distributed computing system, for example. The computer device300may be configured as a quantum computer (e.g., a QIP system), a classical computer, or to perform a combination of quantum and classical computing functions, sometimes referred to as hybrid functions or operations. For example, the computer device300may be used to process information using quantum algorithms, classical computer data processing operations, or a combination of both. In some instances, results from one set of operations (e.g., quantum algorithms) are shared with another set of operations (e.g., classical computer data processing). A generic example of the computer device300implemented as a QIP system capable of performing quantum computations and simulations is, for example, the QIP system200shown inFIG.2.

The computer device300may include a processor310for carrying out processing functions associated with one or more of the features described herein. The processor310may include a single processor, multiple set of processors, or one or more multi-core processors. Moreover, the processor310may be implemented as an integrated processing system and/or a distributed processing system. The processor310may include one or more central processing units (CPUs)310a, one or more graphics processing units (GPUs)310b, one or more quantum processing units (QPUs)310c, one or more intelligence processing units (IPUs)310d(e.g., artificial intelligence or AI processors), or a combination of some or all those types of processors. In one aspect, the processor310may refer to a general processor of the computer device300, which may also include additional processors310to perform more specific functions (e.g., including functions to control the operation of the computer device300). Quantum operations may be performed by the QPUs310c. Some or all of the QPUs310cmay use atomic-based qubits, however, it is possible that different QPUs are based on different qubit technologies.

The computer device300may include a memory320for storing instructions executable by the processor310to carry out operations. The memory320may also store data for processing by the processor310and/or data resulting from processing by the processor310. In an implementation, for example, the memory320may correspond to a computer-readable storage medium that stores code or instructions to perform one or more functions or operations. Just like the processor310, the memory320may refer to a general memory of the computer device300, which may also include additional memories320to store instructions and/or data for more specific functions.

It is to be understood that the processor310and the memory320may be used in connection with different operations including but not limited to computations, calculations, simulations, controls, calibrations, system management, and other operations of the computer device300, including any methods or processes described herein.

Further, the computer device300may include a communications component330that provides for establishing and maintaining communications with one or more parties utilizing hardware, software, and services. The communications component330may also be used to carry communications between components on the computer device300, as well as between the computer device300and external devices, such as devices located across a communications network and/or devices serially or locally connected to computer device300. For example, the communications component330may include one or more buses, and may further include transmit chain components and receive chain components associated with a transmitter and receiver, respectively, operable for interfacing with external devices. The communications component330may be used to receive updated information for the operation or functionality of the computer device300.

Additionally, the computer device300may include a data store340, which can be any suitable combination of hardware and/or software, which provides for mass storage of information, databases, and programs employed in connection with the operation of the computer device300and/or any methods or processes described herein. For example, the data store340may be a data repository for operating system360(e.g., classical OS, or quantum OS, or both). In one implementation, the data store340may include the memory320. In an implementation, the processor310may execute the operating system360and/or applications or programs, and the memory320or the data store340may store them.

The computer device300may also include a user interface component350configured to receive inputs from a user of the computer device300and further configured to generate outputs for presentation to the user or to provide to a different system (directly or indirectly). The user interface component350may include one or more input devices, including but not limited to a keyboard, a number pad, a mouse, a touch-sensitive display, a digitizer, a navigation key, a function key, a microphone, a voice recognition component, any other mechanism capable of receiving an input from a user, or any combination thereof. Further, the user interface component350may include one or more output devices, including but not limited to a display, a speaker, a haptic feedback mechanism, a printer, any other mechanism capable of presenting an output to a user, or any combination thereof. In an implementation, the user interface component350may transmit and/or receive messages corresponding to the operation of the operating system360. When the computer device300is implemented as part of a cloud-based infrastructure solution, the user interface component350may be used to allow a user of the cloud-based infrastructure solution to remotely interact with the computer device300.

In connection with the systems described inFIGS.1-3, it would be helpful to get electrodes into the center or the middle of the trap (e.g., the trap270) to have better control of the ions, and thus, a better operation of the overall QIP system.

FIG.4shows a diagram400that illustrates an isometric view of an ion trap. The ion trap shown may be built or fabricated on a glass die or wafer410, also referred to as a glass substrate. As shown, the glass substrate410may be an elongated device, where one direction may be along the length of the device and another direction may be along the width of the device. Although shown to have a rectangular shape in this example, the glass substrate410need not be limited to such a shape. An example of a material used for such glass substrates is fused silica, but other glass-like materials may also be used.

The ion trap may be fabricated by evaporating, sputtering, or otherwise depositing a metal layer or metal layers425over a surface or surfaces420of the glass substrate410, where the surface or surfaces420are appropriately etched or shaped to produce grooves and undercuts that provide isolation between electrodes formed by the metal layer425. The surface420may be referred to as a top surface when it is the topmost surface of the glass substrate410, for example. This metal layer425may be a single metal layer, however, multiple metal layers may also be used. The metal layer425may be made of pure metals or alloys. The electrodes that are formed over surface420are routed from both ends of the ion trap (e.g., the distal ends of the ion trap) to a center or middle region430of the ion trap. As shown, at the distal ends of the trap the electrodes may be angled to facilitate wire bonding between the electrodes on the ion trap and electrical traces on a substrate or interposer onto which the ion trap is placed. It is in the region430that the other end of the electrodes terminate and where the ions106in the linear crystal or chain110illustrated inFIG.1are trapped. When the ion traps described herein are made by evaporation of the metal layer425the ion traps may be referred to as evaporated glass traps or EGTs.

As a variation of the structure described above, rather than using a layer of metal425, a layer of a non-metallic conductive coating425may be used instead. An example of a non-metallic conductive material is indium tin oxide (ITO), but other such materials may also be used.

The shaped central electrode described herein may be implemented on the glass substrate traps described herein; however, it may also be implemented in other types of traps made by other methods and of other materials. For example, the shaped central electrode may also be implemented on traps that are fabricated from patterned metal layers on glass or silicon substrates. Moreover, the features of the shaped central electrode are not only applicable to traps that use ion-based qubits but also to traps that use any type of atomic-based qubits.

The ion trap shown in the diagram400inFIG.4includes features for electrodes with metalized trenches and open light access. These ion traps may be fabricated by shaping the glass substrate410(e.g., by using laser writing and etching techniques) and then evaporating one or more metal layers425on top (see e.g., process details provided inFIG.7). Regions shadowed by overhangs in the glass shape form disconnects between regions of metal, allowing for many isolated electrodes on a single device. Further shaping of the trap may be achieved by, for example, forming beveled, slanted, or angled cutout regions, which may provide light access improvements over that of a flat surface. For example, better access by a focused laser or optical beam can be provided to the trapped ions by removing portions of the trap that could otherwise interfere with the focused laser or optical beam. The metallization used in the evaporation process to form the electrodes can include a single metal (e.g., gold (Au)) or a layering of different metals (e.g., chromium (Cr) then Au). As mentioned above, metal alloys that provide the appropriate mechanical and electrical properties may also be used in the metal evaporation process. Ion traps that rely on features or fabrication methods different from those described above may also be used to implement the shaped central electrode described in this disclosure.

FIG.5Ashows a diagram500that illustrates a top view of a portion of the center or middle region430of the ion trap inFIG.4. The diagram500shows arrays of outer direct current (DC) electrodes530to either side (e.g., top and bottom of the figure) of a pair of radio frequency (RF) rails520(i.e., first and second RF rails or electrodes). The pair of RF rails520are shown with a dashed fill lines for ease of identification. The ions that the trap holds for use in quantum operations are positioned above the central electrode510, with the central electrode510being positioned between the top outer DC electrodes530and the bottom outer DC electrodes530and also between a pair of RF rails520.

As noted above, it would be helpful to get DC electrodes into the center or the middle of the trap because the outer DC electrodes530are far from where the ions are positioned and may not look that different from each other to a faraway ion. For example, more specific trap functionality such as the tight control of anharmonic potentials for uniform ion spacing in chain of ions would be difficult to achieve by solely using the outer DC electrodes530because they may be far from the ions. By bringing DC electrodes underneath (e.g., nearby) where the ions are positioned it may be possible to have better control of the ions. Because bringing several electrodes to achieve this functionality into the middle or center of the trap is hard to do, particularly in single metal layer traps or traps with limited connectivity, this disclosure proposes using a single central electrode that is shaped to provide the appropriate functionality such as a particular component of the confining potential, for example. By using this approach, it may be possible to generate the desired potentials for ion control even with a limited number of control signals and electrodes.

Traps are generally designed as general-purpose devices and are not customized to handle specific functionalities such as the tight control of the confining potentials. The proposed use of a shaped central electrode allows the trap to become a specialty device while keeping the general-purpose features such as the arrays of outer DC electrodes530. That is, the use of a shaped central electrode is a specialty electrode that allows for the control of designer potentials while everything else in the trap supports the uniform and repetitive features of a general-purpose device.

Returning toFIG.5A, the top view offered by the diagram500shows a central electrode510, which is an implementation of the shaped central electrode proposed by this disclosure. The central electrode510is a DC electrode and may also be referred to as the DC electrode510or the DC central electrode510. The central electrode510is shaped to enable some of the functionality described above that allows better control the ions confined by the trap. The shaping of the DC electrode510is illustrated by a “pinching”515of the electrode's width, which is this case is shown near or at the middle of the central electrode510although the positioning of the pinching515need not be so limited. This pinching is shown by a curvature in the electrode that provides a smooth narrowing of the width and a similarly smooth return to the original width. The remaining portions of the central electrode510are typically of a uniform, constant width, although there may be additional shaping in parts of the central electrode510. Because of the placement between the outer DC electrodes530and the pair of RF rails520, and because of the shaping (e.g., the pinching515), the central electrode510may also be referred to as a shaped central electrode.

As noted above, the pair of RF rails520includes two RF rails or electrodes (e.g., a first RF rail/electrode and a second RF rail/electrode) that are used to provide confinement of the ions above the surface of the trap perpendicular to the lengths of the RF rails (e.g., radial confinement). The outer DC electrodes530provide confinement and transport potentials parallel to the RF rails (e.g., axial confinement).

FIG.5Bshows a diagram550that simply illustrates an isometric view of the shaping of the central electrode510. The pinching or pinched region515is shown where the central electrode510changes its width to provide the specific components to the potential that are desired for the trap operation. The diagram550also shows the outer DC electrodes530and the pair of RF rails520, as well as the spacing or physical isolation (e.g., trenches, grooves) between different electrodes on the trap.

FIG.6illustrates examples of different types of shaping that may be applied to the central electrode510described above. A diagram600inFIG.6shows shaping by using pinching of the electrode width. This is similar to the shaping (e.g., the pinching515) described in connection with the diagrams500and550inFIGS.5A and5B, respectively.

A diagram610inFIG.6shows a different type of shaping. This shaping is produced by varying or changing the width of the central electrode510in steps. In this example, the width of the central electrode510is increased in a small region by means of a first step change, then the width decreases to the original width for another region by means of a second step change, then the width is increased again by means of a third step change, and finally the width decreases to the original width for another region by means of a fourth step change. Other than in the region where the shaping occurs, the width of the central electrode generally remains substantially uniform along its length.

It is to be understood that the examples in the diagrams600and610are provided by way of illustration and not of limitation. Moreover, while these examples show shaping in the middle of the central electrode510, there may be shaping in more than one location or region of the central electrode510to achieve the desired potential. Moreover, when the central electrode510is shaped in multiple locations or regions, the shaping need not be the same in all of the regions and could be different types of shaping in different regions.

FIG.7shows a diagram700that illustrates a cross section of an ion trap with different types of electrode or shadow structures that may be formed to produce the trap's electrodes. Each of the structures shown may be used in the trap fabrication for a particular use. Moreover, one or more of these structures may be used to implement the trap's electrodes, including the shaped central electrode described above in connection with the diagrams400,500,550, and600inFIGS.4-6.

The glass substrate410is processed by appropriately shaping the top surface. For example, the top surface may be shaped by using one or more different types of etching techniques to produce the different electrode or shadow structures. The glass substrate410is shaped first and then a metal coating (e.g., the metal layer425) is evaporated over the glass substrate410. As mentioned above, the metal coating may include a single metal (e.g., Au) or a layering of different metals (e.g., Cr then Au).

The metal coating may be deposited (e.g., via evaporation) at various angles (e.g., see different evaporation angles EVAP 1, EVAP 2, and EVAP 3) to coat the top surface, the exposed bottom surfaces, the sidewalls, and the angled wings or sloped walls that result from the shaping of the top surface. The coating may either occur in steps with discrete angles to the deposition source, by continuous movement during the deposition process, or by a combination of both techniques. The approach described herein may form isolated trap electrodes by, for example, implementing one or more of the following features: undercuts710, undercut on both sides720, undercut on one side730, no undercut740, and a sloped wall750. In some cases, two undercut features may result in a complete undercut of a portion of the central electrode510(e.g., in the region of the pinch) or surrounding structures, with that portion bridging over the complete undercut to form a continuous electrode.

Notwithstanding the prior descriptions, the shaped central electrode may be split into two or more parallel electrodes, each shaped to produce the desired potential or potentials.

The shaped central electrode may also be implemented in trap that include electrical routing layers below the top metal layer. In this case, the shaped central electrode might not extend all the way to the wire bond pads of the ion trap solely via surface metallization and may instead be routed through the electrical routing layers.

The previous description of the disclosure is provided to enable a person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the common principles defined herein may be applied to other variations without departing from the scope of the disclosure. Furthermore, although elements of the described aspects may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated. Additionally, all or a portion of any aspect may be utilized with all or a portion of any other aspect, unless stated otherwise. Thus, the disclosure is not to be limited to the examples and designs described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.