Patent ID: 12255068

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

FIGS.1A to1Cshow a schematic illustration of a method for forming an electrical contact16according to various exemplary embodiments.

FIG.1Ashows a silicon carbide substrate (“substrate” for short)10, with a surface101. The silicon carbide substrate10may be for example an SiC wafer. The substrate10may have a thickness T, for example a thickness of between approximately 250 μm and approximately 450 μm or more. The surface101may be a first principal surface101of the silicon carbide substrate10. The silicon carbide substrate10may include a second principal surface102, on the opposite side to the first principal surface101. The text below describes forming the electrical contact16on the entire surface101. In various exemplary embodiments, the electrical contact16may be formed on a partial region or a plurality of mutually connected or mutually separated partial regions of the surface101. In various exemplary embodiments, the electrical contact16may, as an alternative or in addition, be formed on the second principal surface102, for example on the entire second principal surface102or on a partial region or a plurality of mutually connected or mutually separated partial regions of the second principal surface102.

According to various exemplary embodiments of the present invention, an electronic semiconductor component11may be formed in the substrate10(indicated schematically inFIG.1A; see alsoFIG.4). The semiconductor component11may take the form, for example, of a vertical component in the substrate10such that it extends from the second principal surface102, into the substrate10, and to an electrode to be formed on the first principal surface101. For example, the electronic semiconductor component11may be a vertical transistor, and the electrical contact16on the first principal surface101may be a drain electrode or a contact layer for a drain electrode. The transistor may be for example a (power) MOSFET, or another suitable vertical component. In various exemplary embodiments, the method for forming an electrical contact16may be used to form at least one electrical contact16, for example at least one electrode, for a lateral electronic semiconductor component.FIG.1Bshows the substrate10after its surface101has been ground. The ground surface is accordingly provided with the reference character101g.

The grinding allows the thickness T of the substrate10to be reduced to the smaller thickness Tg. In various exemplary embodiments, the grinding may substantially include a grinding process that is in any case typically performed for the purpose of thinning the substrate10. In this case, the silicon carbide substrate10may be thinned to a smaller thickness Tg of approximately 50 μm to approximately 200 μm. In various exemplary embodiments, the grinding may be a process serving to form the electrical contact16, for example in cases where the electric contact16is formed on the principal surface101or102which includes the electronic component.

Grinding may be carried out with the aid of a grinding disk or other suitable grinding tool. In its grinding face, the grinding disk may include nickel and/or a nickel compound, such as a nickel alloy. A nickel content of the grinding disk may be between approximately 0.1 weight % and 100 weight %. In other words, the grinding disk may be made entirely or only partly of nickel. Where the grinding disk is made only partly of nickel, it may for example furthermore include a glass or ceramic material, such as SiO2, ZnO and/or CaO. The nickel may be embedded in the glass or ceramic material, for example in the form of nickel particles.

The nickel-containing grinding face may be configured, for example in respect of its roughness, such that the grinding roughens the surface101, and a crystal structure of the silicon carbide is damaged. Furthermore, nickel particles12may be incorporated into the surface101or101gduring the grinding. To put it another way, the grinding may form recesses13and damage14to the crystal lattice (such as microcracks, displacements and/or pores) in the surface101g, and furthermore the nickel particles12may be incorporated on and/or in the surface101gof the substrate10. The nickel particles12may, for example, be arranged in the recesses13and at points where there is damage14to the crystal lattice. The grinding may be performed such that the recesses13, the crystal lattice damage14, and the nickel particles12extend into the substrate10to a depth d of from approximately 10 nm to approximately 500 nm. The region close to the surface, where the crystal lattice damage14, the recesses13and the incorporated nickel12are present, is also called the region of damage.

In order to achieve a predetermined depth of the region of damage, and a desired quantity of nickel12embedded in it, parameters relating to the grinding process can be adjusted, such as the nickel content and the roughness of the grinding disk, the duration of grinding, contact pressure during the grinding process, etc. In various exemplary embodiments, the objective may be a greater depth of the region of damage (for example between 200 nm and 500 nm), for example, if there is provision to utilize the electrical contact16that is formed directly as an electrode, and/or if the electrical contact16forms the rear-side electrode of the semiconductor component. Conversely, the objective may be a smaller depth (for example between 10 nm and 200 nm) of the region of damage if there is provision for the electrical contact16that is formed to serve merely as a seed layer for depositing a further electrically conductive layer, and/or if the electrical contact16forms at least one front-side electrode.

An average roughness Ra of the ground surface101gmay be between approximately 10 nm and approximately 500 nm, for example between approximately 10 nm and approximately 50 nm.

In various exemplary embodiments, after the grinding the substrate10may simultaneously have all the properties mentioned above, namely a thickness Tg of the substrate10of approximately 50 μm<Tg<200 μm, an average roughness Ra of approximately 10 nm<Ra<500 nm and a region of damage having a thickness of between approximately 10 nm and approximately 500 nm, and nickel and/or nickel compounds12that are arranged on the ground surface101gand/or in the region of damage.

FIG.1Cshows the silicon carbide substrate10with the ground surface101gduring a hardening process. The hardening may be performed by a laser, of which the laser light18irradiates the ground surface101g. Irradiation with the laser light18—the hardening—may be performed such that the defects (the recesses13and the damage14to the crystal lattice) are lessened or reduced, such that at least some of the nickel or nickel compounds12reacts with the silicon of the silicon carbide substrate10(for example forming nickel silicide), and an ohmic contact16is formed at the surface101g, it being possible for the contact16to have a contact resistance of less than 1 mΩcm2. The surface that is obtained after hardening, with the ohmic contact16, is indicated inFIG.1Cby the reference character101gt.

The left-hand side ofFIG.1Cshows that, after irradiation of the ground surface101gby the laser light18, the defects can be reduced or eliminated. In various exemplary embodiments, the laser light18may have a wavelength of less than 400 nm, and an energy density of more than 2 J/cm2.

During the laser hardening, recrystallization may take place. This may result in a change (reduction) in the surface roughness. For example, the average roughness Ra after hardening may be less than half the average roughness Ra before hardening.

Furthermore, laser hardening may have the result that the nickel12in the layer close to the surface forms a chemical compound with the silicon (for example forming nickel silicide), and furthermore that some of the silicon vaporizes. The nickel silicide compound formed by the laser hardening may form an electrically conductive layer and hence the electrical connection (the contact)16. The thickness of the electrically conductive connection16may be in a range of from approximately 10 nm to approximately 500 nm, for example between approximately 10 nm and approximately 50 nm.

If, as described above, the electrical connection is formed only on a partial region of the surface of the substrate10, this may be achieved in that only the partial region of the surface101is ground and then irradiated with the laser light18, and/or in that, although the entire surface101is ground, hardening is only performed on the partial region of the surface101. In the event that the entire surface101has been ground but the electrical connection is/was only formed in a partial region of the surface101, it is possible to arrange a protective layer (not illustrated) on the ground, non-irradiated region.

In various exemplary embodiments, the electrically conductive contact16may directly form the electrode of the electronic semiconductor component. In various exemplary embodiments, the electrically conductive contact16may be a bottom layer of a stack of layers forming the electrode. To put it another way, the electrically conductive contact16may be utilized as the ground layer or seed layer for applying (for example, galvanically) at least one further electrically conductive layer.

FIG.2shows a flow diagram of a method200for forming an electrical contact, according to various exemplary embodiments.

The method may include grinding a silicon carbide surface with a grinding disk that has a grinding face containing nickel or a nickel compound, such that particles of the nickel or nickel compound from the grinding disk are embedded in the ground silicon carbide surface (210), and hardening the ground silicon carbide surface with the aid of a laser, such that at least some of the embedded nickel particles form a nickel silicide with silicon from the silicon carbide (220).

FIG.3shows a flow diagram of a method300for forming a semiconductor device, according to various exemplary embodiments.

The method may include forming a semiconductor component in a silicon carbide substrate (310), where formation of an electrode of the semiconductor component includes the method for forming an electrical contact according to one of the exemplary embodiments above (320).

The method may be performed at wafer level. This likewise applies to the method for forming the electrical contact according to various exemplary embodiments.

In various exemplary embodiments, the semiconductor component may be a transistor.

FIG.4shows a semiconductor device400that was manufactured by a method for forming a semiconductor device according to various exemplary embodiments, for example as set forth in detail above.

The semiconductor device400includes a silicon carbide substrate10with an electrical contact16which is formed on it and forms a surface101gtof the semiconductor device400.

Furthermore, the semiconductor device400includes a semiconductor component11which is formed in the substrate10and extends for example from a second surface102into the substrate10. The electrical contact16may for example be a rear-side electrode of the semiconductor component11.