Patent ID: 12224038

In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the disclosed embodiments. It will be apparent, however, that one or more embodiments may be practiced without these specific details. In other instances, well-known structures and devices are schematically shown in order to simplify the drawing.

DETAILED DESCRIPTION

Please refer toFIG.1, which shows a block diagram of a memory device100according to one embodiment. The memory device100includes, for example, a memory array110, a signal generating circuit120, an environment detecting circuit130, an artificial intelligence (AI) circuit140, an address latch150, an input/output (I/O) buffer160, a command logic register170, a data latch180, a X-decoder191and a Y-decoder192. The memory array110is used to store data. For example, the memory array110is a flash array. Data could be written into the memory array110. The data stored in the memory array110could be read out. Or, data stored in the memory array110could be erased.

The signal generating circuit120is used to generate an inputting signal SN, such as a program voltage, a read voltage or an erase voltage. In one embodiment, the inputting signal SN is directly inputted to the memory array110. However, the current-voltage characteristic curve (I-V curve) of the memory array110may be changed due to the environment condition, the usage time, or the manufacturing process. In case of the I-V curve of the memory array110is changed, the memory array110will not function properly based on the unchanged inputting signal SN. For example, after a period of time, written data may be easily lost; or, some data may not be completely erased.

The environment detecting circuit130is used to detect at least one environment information, such as a thermal information, a pressure information or a humidity information, etc. The environment detecting circuit130is, for example, a micro-electro-mechanical device, which can detect one or more types of environment information.

The AI circuit140is connected among the memory array110, the signal generating circuit120and the environment detecting circuit130. In this embodiment, the AI circuit140at least receives the inputting signal SN from the signal generating circuit120, receives the environment information EV from the environment detecting circuit130, receives a first performance information PF1from the memory array110, receives a second performance information PF2from the AI circuit140, and outputs an ideal signal SN′ to the memory array110according to the inputting signal SN, the environment information EV and the performance information PF. The first performance information PF1is, for example, a read cycle, a retention or a leakage current of the memory array110. The second performance information PF2is, for example, a voltage, a current or a percentage of the AI circuit140. Whether the performance information PF is higher or lower than a target is used to adjust the ideal SN′.

Please refer toFIG.2, which shows the AI circuit140. The AI circuit140is, for example, an Affine Layer circuit, a ReLU circuit, a sigmoid circuit, a neural network (NN) circuit, a Recurrent neural network (RNN) circuit or a Convolutional neural network (CNN) circuit. The AI circuit140is trained based on a large amount of training data. After training, the AI circuit140is fixedly embedded in the memory device100. When the AI circuit140is executed, the input information includes, for example, the inputting signal SN, the environment information EV, the first performance information PF1and the second performance information PF2; after calculation, the output information is, for example, the ideal signal SN′. The ideal signal SN′ can be provided to the memory array110for program, read, erase and other operations.

In one embodiment, the AI circuit140may have multiple different modules. Different inputting signals SN, such as the input voltage, the read voltage, the erase voltage, etc., can be processed by different modules to output appropriate ideal signals SN′ accordingly.

Please refer toFIG.3, which shows a circuit diagram of the AI circuit140according to an embodiment. For example, the AI circuit140includes a plurality of word lines WL1, . . . , WLi−1, WLi, a plurality of bit lines BL1, BL2, BL3, . . . , BLj, and a plurality of weighting elements W11, W12, . . . , W1j, . . . , Wi1, Wi2, . . . , Wij. The weighting elements W11, W12, . . . , W1j, . . . , Wi1, Wi2, . . . , Wij, for example, are non-volatile memories, which can store different weight values by modulating the threshold voltage. Alternatively, the weighting elements W11, W12, . . . , W1j, . . . , Wi1, Wi2, . . . , Wij can also be resistive memory, which can store different weight values by adjusting the resistance value. The AI circuit140can adopt various architectures, and the present invention is not limited to a specific architecture. For example, the word lines WL1, . . . , WLi−1, WLi of the AI circuit140can be used to input information, such as the inputting signal SN, the environment information EV, the first performance information PF1and the second performance information PF2. The bit lines BL1, BL2, BL3, . . . , BLj can be used to output predicting result RS1, RS2, RS3, . . . , RSj of various modulation signals SN1, SN2, SN3, . . . , SNj. The modulation signal with the best predicting result can be used as the ideal signal SN′ (shown inFIG.2).

The above-mentioned AI circuit140inFIG.3is explained with a single-layer structure as an example. In another embodiment, the AI circuit140can also be a multi-layer structure. The present invention is not limited to the example structure inFIG.3.

The original value of the inputting signal SN mentioned above is, for example, a value of the voltage; the original value of the environment information EV is, for example, a value of the temperature; and the original value of the first performance information PF1is, for example, a value of the cycle time, a value of the time or a value of the current; the original value of the second performance information PF2is, for example, a value of the voltage, a value of the current or a value of the percentage. The grade distances and variances of these original values are not the same, so it is difficult to use these original values for prediction and analysis. As shown inFIG.3, the AI circuit140may further include a shifting element141, a shrinking element142, a normalizing element143and an adjusting element144.

The shrinking element142is used to reduce the values of the inputting signal SN, the environment information EV, the first performance information PF1and the second performance information PF2. For example, the shrinking element142is a logarithmic operation circuit, which uses logarithmic operation to reduce the value.

The shifting element141is used to shift the value of the inputting signal SN, the environment information EV and the performance information PF. For example, the shifting element141, for example, uses a subtractor to perform numerical shifting.

For example, the operations performed by the shifting element141and the shrinking element142on the circuit are equivalent to the operation of the following equation (1).

y=log⁡(x-❘"\[LeftBracketingBar]"xmin❘"\[RightBracketingBar]"+1)(1)

x represents the original value, y is the calculated value of the equation (1), and xminis the minimum value among all of the original value. In the above equation (1), subtraction is the shifting action, and log is the shrinking action. Subtracting |xmin| can improve the situation that there is no value below xmin. Adding 1 is used to avoid negative values generated by the log operation. log(x−|xmin|+1) completes the above numerical shifting and numerical shrinking.

The normalizing element143is used to normalize the values of the inputting signal SN, the environment information EV, the first performance information PF1and the second performance information PF2to a predetermined range. The predetermined range is, for example, 0 to 1. For example, the action performed by the normalizing element143on the circuit is equivalent to the operation of the following equation (2).

y0=(y-ymin)(ymax-ymin)2+1⁢0-1⁢4(2)

y is the calculated value of the above equation (1), yminis the minimum value among all of the calculated values of the above equation (1), ymaxis the maximum value among all of the calculated values of the above equation (1), y0is the calculated value of the equation (2). The above equation (2) can calculate the percentile of y in its distribution, which is standardized to the range of 0 to 1.

The adjusting element144is used to adjust the distribution and position of the inputting signal SN, the environment information EV, the first performance information PF1and the second performance information PF2. For example, the action performed by the adjusting element144on the circuit is equivalent to the operation of the following equation (3).

y′=γ*y0+β(3)

y′ is the calculated value of the equation (3), γ is the distribution adjustment coefficient, and B is the position adjustment coefficient. The distribution adjustment coefficient can adjust the shape and the slope of the distribution, and the position adjustment coefficient can adjust the position of all values.

As shown in theFIG.3, after the above-mentioned numerical adjustment procedure, the inputting signal SN, the environment information EV, the first performance information PF1and the second performance information PF2are adjusted to be an inputting signal SN0, an environment information EV0, a first performance information PF10and a second performance information PF20respectively.

Please refer toFIG.4, which illustrates the adjustment of numerical values. Before the above numerical adjustment procedure, the inputting signal SN has a distribution curve CV1, the environment information EV has a distribution curve CV2, the first performance information PF1has a distribution curve CV3, and the second performance information PF2has a distribution curve CV4. After processing by the shifting element141, the shrinking element142, the normalizing element143and the adjusting element144, the distribution curves CV1, CV2, CV3, and CV4are, for example, adjusted to be similar distribution curves CV1′, CV2′, CV3′, and CV4′ respectively. In this way, the prediction of the AI circuit140will not cause prediction error due to the different grade distances and different variances of the original value.

In addition, the above-mentioned shifting element141, the shrinking element142, the normalizing element143, the adjusting element144and the numerical adjustment procedure thereof can also be applied to the pre-training of the AI circuit140, so that the training data will not have a significant difference in the grade distance and the variances, to obtain the AI circuit140with higher accuracy.

According to the above description, the memory array110of this embodiment does not directly receive the inputting signal SN, but receives the ideal signal SN′ outputted by the AI circuit140. The operation of the memory device100is described in detail below with a flow chart. Please refer toFIG.1andFIG.5.FIG.5shows a flow chart of the intelligent operation method of the memory device100according to an embodiment.

In step S110, the signal generating circuit120generates the inputting signal SN. When performing a program procedure, the inputting signal SN is, for example, a program voltage; when performing a read procedure, the inputting signal SN is, for example, a read voltage; when performing a programming and erase procedure, the inputting signal SN is, for example, a programming and erase voltage. The inputting signal SN will be input to AI circuit140instead of directly input to memory array110.

Then, in step S120, the environment detecting circuit130detects the environment information EV. The environment detecting circuit130can provide the temperature information, the pressure information, or the humidity information and other environment information EV to the AI circuit140.

Then, in step S130, the artificial intelligence (AI) circuit140obtains the ideal signal SN′ according to the inputting signal SN, the environment information EV, the first performance information PF1and the second performance information PF2. In this step, the AI circuit140can use machine learning operations to obtain the ideal signal SN′ even if the inputting signal SN, the environment information EV, the first performance information PF1and the second performance information PF2change. The AI circuit140will also perform the above-mentioned numerical adjustment procedure to reduce the prediction error caused by the difference in the original values.

Then, in step S140, the AI circuit140inputs the ideal signal SN′ to the memory array110. Under the influence of memory array110due to excessive use, temperature, humidity and other factors, even if the current-voltage characteristic curve has changed, the adjusted ideal signal SN′ can still properly perform its due function. Under the influence of excessive usage times, temperature, humidity and other factors, even if the current-voltage characteristic curve of the memory array110has changed, the memory array110receiving the ideal signal SN′ can still properly perform its due function.

For example, please refer toFIG.6, which illustrates different current-voltage characteristic curves IVC, IVC′. Under the current-voltage characteristic curve IVC, the voltage V1can be inputted to get the corresponding current C1. But after a period of operation, the current-voltage characteristic curve IVC of the memory array110may become the current-voltage characteristic curve IVC′. Under current-voltage characteristic curve IVC′, the corresponding current C1cannot be obtained after inputting the voltage V1. In this embodiment, the voltage V1can be adjusted to a voltage V1′ through the AI circuit140. Under current-voltage characteristic curve IVC′, the corresponding current C1can be obtained after inputting the voltage V1′. Therefore, the memory array110can still properly function as it should.

According to the above embodiment, the memory device100can adjust the inputting signal SN to be the ideal signal SN′ through the embedded AI circuit140. Even if the current-voltage characteristic curve of the memory array110may be affected by the environment or the usage time, the functional performance of the memory array110can still be effectively maintained.

It will be apparent to those skilled in the art that various modifications and variations can be made to the disclosed embodiments. It is intended that the specification and examples be considered as exemplary only, with a true scope of the disclosure being indicated by the following claims and their equivalents.