Patent ID: 12197262

DETAILED DESCRIPTION

FIG.1shows a dual-input power supply10that provides a first power path12and a second power path14. The first power path12receives ac power from a first ac source16. The second power path14receives ac power from a second ac source18. Both the first power path12and the second power path14ultimately deliver power to a load20in a data center22. Examples of a load20include a server, including a stand-alone server, a router, a switcher, and combinations thereof.

The power supply10includes a first converter24along the first power path12and a second converter26along the second power path14. Each of the first and second converters24,26is an ac/dc power converter.

The first converter24includes a first stage28and a second stage30.

The first stage28, which is often referred to as a “power-factor correction stage, converts ac received from the first ac source16into dc, which it then provides to the second stage30. The second stage30transforms the dc that it receives from the first stage28into a dc voltage having the value required by the load20. In the embodiments described herein, the second stage30comprises a dc/dc converter.

The second converter26includes first and second stages like the first converter24. Accordingly, only the first and second stages28,30of the first converter24are illustrated inFIG.1. The first and second power paths12,14share at least the same second stage30.

In the embodiment shown inFIG.1, the first and second stages28,30are inside a first package32.

In an alternative embodiment, shown inFIG.2, the first stage28of the first power path12is within the first package32and the first stage of the second power path14is also within the first package32. The shared second stage30of the first and second power paths12,14is within a second package34. This configuration is advantageous because the expected lifetime of the second stage30is much greater than that of the first stage28.

In another embodiment, shown inFIG.3, the first stage28of the first power path12is within the first package32and the first stage28of the second power path14is also within the first package32. The shared second stage30of the first and second power paths12,14is on a motherboard35that also holds circuitry37of the load20. This offers the advantages of the architecture shown inFIG.2but with the additional advantage of avoiding loss due to connectors between the second package34and the load20.

In another embodiment, shown inFIG.4, the first stage28of the first power path12, and the shared second stage30of the first and second power paths12,14are all on a motherboard35that also holds circuitry37of the load20. This offers the advantages of the architecture shown inFIG.3with the additional advantage of avoiding loss due to connectors between the first package32and the second package34.

FIG.5shows a power supply10having first and second inputs36,38for connection to the first and second ac sources16,18, respectively. The power supply10further includes an output40for connection to the load20(not shown). The first and second converters24,26each have a first stage28. The two first stages28are isolated from each other. As a result, it is not possible for a short circuit to develop between the first and second ac sources16,18.

The first and second converters24,26share a second stage30and a hold-up capacitor C1. In some embodiments, a single controller connects to the gate terminals through an isolated driver of first and second transistors Q1, Q2. In other embodiments, each of the first and second transistors Q1, Q2has its own gate controller. In either case, current flow through corresponding first and second transformers T1, T2is controlled.

In the illustrated embodiment, and in all other embodiments described herein, the hold-up capacitor is an electrolytic capacitor.

Throughout this specification, reference will be made to operation of the circuitry in response to failure of one of the first and second ac sources16,18. In each case, because of the symmetry of the circuits, operation will proceed in an analogous manner upon failure of the other of the first and second ac sources16,18.

InFIG.5, the first stage28comprises a power-factor correction circuit having a flyback topology. However, alternative topologies are possible. For example,FIG.6shows a power supply10similar to that shown inFIG.5but with the first stage28having a fly-forward topology instead of a flyback topology.FIG.7shows a power supply10similar to that shown inFIG.5but with its first stage28having a forward topology instead of a flyback topology.

When both the first and second ac sources16,18are operational, the power supply10sees both voltages. In effect, each ac source16,18offers the power supply10some power. The power supply10cannot, however, accept both offers. To do so would result in too much power at the load20. Thus, the power supply10must have a way to accept one offer and reject the other. For ease of discussion, it is assumed that power is being drawn from the first ac source16.

If the second ac source18were to fail, the power supply10would simply continue to draw from the first ac source16just as it has all along.

If, on the other hand, the first ac source16were to fail, then the first ac source16would no longer offer the higher of the two voltages. Thus, the power supply10would begin drawing current from the second power supply22. This happens automatically, simply as a result of the circuit's topology. Accordingly, in principle it would not be necessary to have transistors Q1, Q2.

The first and second converters24,26shown inFIGS.5-7share only a second stage30and a hold-up capacitor C1. They continue to have separate first and second transformers T1, T2. These transformers T1, T2are physically large and consume significant area in the actual circuit.

The embodiments shown inFIGS.8-10overcome this disadvantage by providing a way to, in effect, share the first and second transformers T1, T2. Instead of each power path12,14having its own transformer T1, T2, each power path12,14has a primary winding44,46that couples to a common transformer T1. This shared transformer T1couples both of the first stages30to the shared second stage30. Since the transformers T1, T2are physically quite large, sharing a transformer T1as shown inFIGS.5-7offers a significant savings in space.

A byproduct of sharing the transformer T1is that the first stages30of the first and second converters24,26are no longer isolated from each other. As a result, it is no longer possible to automatically rely on small voltage differences at the first and second ac sources16,18as a basis for choosing which of the first and second ac sources16,18current will be drawn from for an extended period. Accordingly, this embodiment requires a slightly different approach to control.

The embodiment shown inFIG.8features a first transistor Q1that controls current in a first primary winding44and a second transistor Q2that controls current through a second primary winding46. A single gate controller41controls both the first and second transistors Q1, Q2. As a result, the first and second transistors Q1, Q2receive control signals concurrently. This is an important feature because it enables the first and second transistors Q1, Q2to change state concurrently. As used herein, “concurrently” means an interval that is short enough so that the effect of a time difference is undetectable at the output40. Since the first and second transistors Q1, Q2work concurrently, the voltages on the hold-up capacitors C1, C2are same, regardless of the input sources' conditions. As a result, the hold-up capacitors C1and C2work together and function effectively as a single large hold-up capacitance, regardless of the input sources' respective conditions.

Within the first stage28, an element that is particularly likely to fail is the input electrolytic capacitor C1, which can be seen inFIG.8as being connected in parallel to the primary winding44and as also sustaining a maximum voltage that is equal to that of the first ac source16.

To promote reliability, it is useful to replace the input electrolytic capacitor C1with plural input capacitors C1-C7, each of which is connected to a primary winding of corresponding transformer T1-T7with the primary windings cascaded and with the secondary windings of the transformers T1-T7tied together.

Each capacitor C1-C7sustains a voltage that is a fraction of the maximum voltage of the first ac source16, the fraction being the reciprocal of the number of such capacitors C1-C7. As a result, the capacitors C1-C7need not be rated to sustain a particularly high voltage.

An advantage of electrolytic capacitors is that the capacitor plates are highly variegated and thus offer considerable surface area for storage of charge within a small volume. This makes them particularly useful for power supplies, in which a space is at a premium and considerable amounts of charge must be stored. However, electrolytic capacitors are notoriously short-lived in part because the insulation between the plates dries out over time.

The configuration shown inFIG.9permits the notoriously unreliable electrolytic capacitors C1, C2shown inFIG.8to be replaced with more reliable ceramic capacitors. This results in a more reliable and long-lived first stage28.

An additional advantage of the first stage28shown inFIG.9is that individual transformers T1-T7are much smaller than the transformer T1shown inFIG.8. This is useful because machines that pick and place components onto a printed-circuit board are better suited for manipulating smaller components.

FIGS.10and11shows a configuration similar to that shown inFIG.8but with the circuitry between the transformer T1and the second stage30having a flyback topology and a forward topology, respectively, instead of the fly-forward topology shown inFIG.8.

In all embodiments shown inFIGS.8,10, and11, the respective states of the first and second input transistors Q1, Q2will depend on the availability of the first and second ac sources16,18. If both the first and second ac sources16,18are available, the first and second transistors Q1, Q2will be in opposite states, with one being conductive and the other being non-conductive will be in a conducting state while the other will be in a non-conductive state.

FIG.12shows various components that are associated with but not part of a power path12. A number of these components are susceptible to being shared between first and second power paths12,14. By sharing one or more of these components, it is possible to reduce part count of the overall power supply10as well as to increase its power density.

In some embodiments, the power supply10comprises internal components that are not along the power path itself. These include various controllers, such as the gate controller41and a PWM controller54, input monitoring circuitry56, output monitoring circuitry58, surge-protection circuitry60, a fan power supply62for providing a dc voltage, usually twelve volts, to power a fan motor, a bias power supply64for providing a constant dc voltage, usually five volts, for use by any other digital circuitry that may be used within the data center, feedback circuitry66that connects to the load20, a thermal sensor68for monitoring the fan's operating temperature and providing an input for adjusting the fan motor's duty cycle, and overload protection circuitry70connected to the output40.

In some embodiments, the first and second power paths12,14share the housekeeping circuitry52that provides power to one or more of the foregoing components. Embodiments include those in which the housekeeping circuitry52is split between primary and secondary sides of a transformer that couples the first and second stages28,30.

In the embodiments ofFIGS.13-15, the first and second power paths12,14share a common transformer T1and a common second stage30. Depending on the topology of diodes D1, D2between the transformer T1and the second stage30, the first stage28has a forward topology, as shown inFIG.13, a fly-forward topology, as shown inFIG.14, or a flyback topology, as shown inFIG.15.

In the embodiments shown inFIGS.13-15, the respective states of the first and second input transistors Q1, Q2will depend on the availability of the first and second ac sources16,18. If both the first and second ac sources16,18are available, the first and second transistors Q1, Q2will be in opposite states, with one being conductive and the other being non-conductive will be in a conducting state while the other will be in a non-conductive state.

FIG.16shows a first ac source16that is coupled to a first power path12and a second ac source18that is coupled to a second power path14. Each of the first and second power paths12,14has a corresponding first stage28to which a corresponding one of the first and second ac sources16,18is coupled. An inductor L1couples the first stages28of the first and second power paths12,14to each other. As a result, the first stages28are not isolated from each other.

The first power path's first stage28has a first power-path primary winding44and a corresponding first-power-path output capacitor C1. The first power-path output capacitor C1is connected parallel to the first-power-path primary winding44.

The first power path's first stage28also has a first power-path input transistor Q1and a first-power-path output transistor Q3. The first power-path input transistor Q1connects to the negative side of the first-power-path primary winding44by way of the first-power-path output transistor Q3and to the positive side of the first-power-path primary winding44by way of a first power-path diode D1that is biased to permit current from the inductor L1to the first-power-path primary winding46.

The second power path's first stage28has a second power-path primary winding46and a corresponding second-power-path output capacitor C2. The second power-path output capacitor C2is connected parallel to the second-power-path primary winding46.

The second power path's first stage28also has a second power-path input transistor Q2and a second-power-path output transistor Q4. The second power-path input transistor Q2connects to the negative terminal of the second-power-path primary winding46by way of the second-power-path output transistor Q4and to the positive terminal of the second-power-path primary winding46by way of a second-power-path diode D2that is biased to permit current from the inductor L1to the second-power-path primary winding46.

A first controller41controls the gate of the first power-path input transistor Q1and the gate of the second-power-path input transistor Q2. The respective states of the first-power-path input transistor Q1and the second-power-path input transistor Q2depend on the availability of the first and second ac sources16,18. If both the first and second ac sources16,18are available, the first-power-path input transistor Q1and the second-power-path input transistor Q2will be in opposite states in which one is in a conducting state and the other is in a non-conducting state. Since the first controller41controls the gates of both transistors Q1, Q2, it is possible to reliably cause both transistors Q1, Q2to transition between conductive and non-conductive states at substantially the same time.

A second controller50controls the gate of the first power-path output transistor Q3and the gate of the second-power-path output transistor Q4. This permits concurrent control of the first power-path output transistor Q3and of the second-power-path output transistor Q4.

In the embodiments ofFIGS.16-19, two first stages28of the first and second power paths12,14share a common inductor core L1, and a transformer T1. While it may not be immediately apparent, the novel topology of the first and second power paths12,14, and in particular, the concurrent operation of the output transistors Q3, Q4, causes the first power-path output capacitor C1and the second-power-path output capacitor C2to work together to form what is effectively a single hold-up capacitor that is shared by both of the two first stages28. This shared hold-up capacitor is formed by the combination of the first power-path output capacitor C1and the second-power-path output capacitor C2.

The illustrated topology forms a shared hold-up capacitor by clamping the voltages across the first power-path output capacitor C1and the second-power-path output capacitor C2to each other. This causes the first and second power paths12,14to, in effect, share what is electrically the equivalent of a single hold-up capacitor that is formed by the first power path's output capacitor C1and the second power path's output capacitor C2. This virtual hold-up capacitor holds enough charge to support current during the brief interval required to transition from the state in which both of the first and second ac sources16,18are available and the state in which power is available from only one of the first and second ac sources16,18.

Because the output capacitors C1, C2effectively form a single capacitor, the first stages28of the first and second power paths12,14effectively share a common hold-up capacitor. As a result, the output capacitors C1, C2can be made half as large as they would have had to be had they not been configured to cooperate as a single hold-up capacitor.

FIG.18also shows downstream circuitry72that extends between the secondary winding48of the transformer T1and the power supply's output40. InFIG.18, the downstream circuitry72is configured with a forward topology.FIG.19shows an embodiment identical to that ifFIG.18but with the downstream circuitry72having been configured with a fly-forward topology.FIG.20shows an embodiment identical to that ifFIG.18but with the downstream circuitry72instead having been configured with a fly-flyback topology.

FIG.19shows an embodiment similar to that shown inFIG.18but with the first controller41controlling only the second power-path input transistor Q2. A third controller74controls the first-power-path input transistor Q1.

In the embodiment shown inFIG.19, the states of the first-power-path input transistor Q1and the second power-path input transistor Q2depend on the availability of the first and second ac sources16,18. If only one the first ac source16is available, then only the first-power-path input transistor Q1will be in a conducting state. If only the second ac source18is available, then only the second power-path input transistor Q2will be in a conducting state. If both the first and second ac sources16,18are available, the first-power-path input transistor Q1and the second power-path input transistor Q2will be in opposite states with one being in a conducting state and the other being in a non-conducting state. The choice of which one is in a conducting state and which one is in a non-conducting state is arbitrary.

The architectural principles set forth in connection withFIGS.1-4are applicable to a dual-input power supply10in which both inputs are connected to the same ac power source16. As an example,FIG.20shows a stand-alone server76with two power supplies operating in tandem, each of which connects to the same ac power source16. The two power supplies continue to define first and second power paths12,14, each of which comprises first and second stages28,30as already described above. The main distinction is that the first and second power paths12,14connect to the same ac source16.

Because the lifetime of a conventional power supply is less than that of the stand-alone server76to which it supplies power, it is expected that at some point, the first power path12will fail. In such cases, the second power path14can carry the burden of supplying power by itself, but only for a limited period. Failure of the first power path12thus triggers an alert to a human operator, who then hot-swaps the failed first power path12with a new first power path12.

Within a power supply10, the expected lifetimes of the various components are not identical. In fact, the second stage30, which comprises the dc/dc converter, has a much longer expected lifetime than the first stage28, which comprises the power-factor correction circuit.

Given the differential in expected lifetimes, it is useful to provide the stand-alone server76with an architecture along the lines of that shown inFIG.21, in which the first stage28is within its own first package32and the second stage30is within its own second package34. This permits the first package32to be hot-swapped independently of the second package34.

Because the expected lifetime of the second package34is comparable to that of the stand-alone server76, it is useful to modify the architecture shown inFIG.21to place the second stage30directly on the motherboard35of the stand-alone server76, as shown inFIG.22. In this case, only the first stage28is in its own package32since it is only the first stage28that may need to be replaced.

In a passively-cooled power supply10, the expected lifetime of the first stage28approaches that of the stand-alone server76to which it supplies power.

As used herein, a passively-cooled power supply10is one that relies, in normal operation, primarily on conduction of heat from power-handling units rather than from a fan. Such a power supply10can include a fan for use in emergencies, with the fan being controlled by a controller that receives a temperature signal from a heat sensor. However, in such a power supply10, years can go by without the fan ever having to be turned on.

In such cases, where the expected lifetime of the first stage28is sufficiently long, an architecture similar to that shown inFIG.23is useful. In this architecture, the first stage28and second stage30are both on the motherboard35of the stand-alone server76.

An isometric view of a typical motherboard35with a power supply10mounted thereon can be seen inFIG.24. Since the power supply10generates considerable heat during operation, it is useful to provide a first heat sink78in thermal communication with the switches80and transformers82of the first stage28and a second heat sink84in thermal communication with the second stage30.

An embodiment as shown inFIGS.23and24is particularly useful because the power supply10no longer needs to be designed as a hot-swappable module. Placement of the first and second stages28,30on the motherboard35thus reduces space required to accommodate the circuitry and also reduces costs.

A motherboard35normally contains circuitry37that does not operate at high temperatures. As a result, those who handle motherboards35do so with the expectation that the circuitry37is relatively safe to handle.

The inclusion of the power supply10on the motherboard35as shown inFIG.23changes this. Circuitry associated with a power supply10operates at elevated temperatures and at high voltages, thereby raising the average operating temperature of circuitry on the motherboard35. Moreover, a power supply's rapid switching and high current levels combine to cause considerable electromagnetic interference. This can interfere with nearby circuitry37on the motherboard35. As a result, it is useful to include additional components to provide some protection against both of these hazards.

FIG.25shows the motherboard35shown inFIG.24but with the first stage28and second stage30having been shielded by corresponding first and second shields86,88. In the illustrated embodiment, the first shield86is a grounded EMI shield that protects the load circuitry37against interference and also protects service personnel from shock and from inadvertently touching the components of the first stage28. The second shield86is a heat shield that protects service personnel from inadvertently touching the components of the second stage30.

In the foregoing embodiments, the power supply10has been shown to receive power from one or more ac sources16,18. However, in some embodiments, the power supply10receives dc power from one or more dc sources. Such dc sources are typically maintained at a high voltage, such as two hundred to four hundred volts. In such embodiments, the dc power essentially passes through the first stage28and maintains a voltage at a hold-up capacitor that provides a voltage for the second stage30, which comprises the dc/dc converter.

It is to be understood that the foregoing description is intended to illustrate and not to limit the scope of the invention, which is defined by the scope of the appended claims. Other embodiments are within the scope of the following claims.