Patent ID: 12206329

The same reference numerals are used to represent the same elements throughout the drawings.

MODE FOR CARRYING OUT THE INVENTION

The following description with reference to the accompanying drawings is provided to assist in a comprehensive understanding of various embodiments of the disclosure as defined by the claims and their equivalents. It includes various specific details to assist in that understanding but these are to be regarded as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the various embodiments described herein can be made without departing from the scope and spirit of the disclosure. In addition, descriptions of well-known functions and constructions may be omitted for clarity and conciseness.

The terms and words used in the following description and claims are not limited to the bibliographical meanings, but, are merely used by the inventor to enable a clear and consistent understanding of the disclosure. Accordingly, it should be apparent to those skilled in the art that the following description of various embodiments of the disclosure is provided for illustration purpose only and not for the purpose of limiting the disclosure as defined by the appended claims and their equivalents.

It is to be understood that the singular forms “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to “a component surface” includes reference to one or more of such surfaces.

FIG.1illustrates elements of a DC/DC converter (e.g., a 3-level buck converter) according to an embodiment of the disclosure.

Referring toFIG.1, according to various embodiments of the disclosure, a DC/DC converter100may include multiple switches101, a first capacitor103(e.g., a flying capacitor), a first inductor105, and/or a second capacitor107.

According to various embodiments of the disclosure, the multiple switches101may include a first switch101a(Q1), a second switch101b(Q2), a third switch101c(Q3), and/or a fourth switch101d(Q4). According to various embodiments of the disclosure, each of the multiple switches101may be implemented as a metal-oxide-semiconductor field-effect transistor (MOSFET). According to an embodiment of the disclosure, at least some of the multiple switches101may be implemented as diodes.

According to various embodiments of the disclosure, each of the multiple switches101may be controlled to be on state or off state under the control of a controller (not shown) (e.g., a gate driver or a driving circuit) (or according to a control signal to be output (or a gate voltage)). For example, the controller (not shown) may generate a control signal (e.g., a pulse width modulation (PWM) signal). The controller (not shown) may be connected to each of the multiple switches101, and may input a control signal to each of the multiple switches101(e.g., apply a voltage to a gate terminal of each of the multiple switches101). According to various embodiments of the disclosure, the control of the on/off state of the multiple switches101may include application and/or non-application of a control signal (or gate voltage) to the switches101. In various embodiments of the disclosure, controlling the on/off state of the switches101by the controller (not shown) may be understood as including outputting the gate voltage and/or refraining from outputting the gate voltage by the controller (not shown). According to various embodiments of the disclosure, the controller (not shown) may control the on/off state of each of the multiple switches101based on an input voltage of the DC/DC converter100(e.g., voltage Vinof the input power source1), a switch node voltage Vx(e.g., voltage at the input terminal of the first inductor105), a current flowing through the first inductor105(or output current ILof the first inductor105), and/or the output voltage Voof the DC/DC converter100. For example, the controller (not shown) may include at least one comparator. The controller (not shown) may compare the inductor current ILwith at least one threshold current, may compare the output voltage Vowith at least one threshold voltage, or may compare the switch node voltage Vxwith at least one threshold voltage, and based on a result of the comparison, the controller may control the on/off state of each of the multiple switches101. According to an embodiment of the disclosure, the controller (not shown) may be implemented as a micro controller unit (MCU), and the MCU may control the gate driver to control the on/off state of each of the multiple switches101. According to various embodiments of the disclosure, the above-described controller (not shown) may be included in the DC/DC converter100. According to an embodiment of the disclosure, the above-described controller (not shown) may be disposed outside the DC/DC converter100without being included in the DC/DC converter100, and thus may be operatively connected with the DC/DC converter100.

According to various embodiments of the disclosure, one end of the first switch101amay be connected to the input power source1, and the other end thereof may be connected to one end of the first capacitor103and one end of the second switch101b. According to various embodiments of the disclosure, when the first switch101ais in on state, one end of the first capacitor103may be connected to the input power source1. According to various embodiments of the disclosure, when the first switch101ais in off state, one end of the first capacitor103may be disconnected from the input power source1.

According to various embodiments of the disclosure, one end of the second switch101bis connected to the other end of the first switch101aand one end of the first capacitor103, and the other end of the second switch is connected to one end of the first inductor105and one end of the third switch101c. According to various embodiments of the disclosure, when the second switch101bis in on state, one end of the first capacitor103may be connected to one end of the first inductor105. According to various embodiments of the disclosure, when the second switch101bis in off state, one end of the first capacitor103may be disconnected from one end of the first inductor105.

According to various embodiments of the disclosure, one end of the third switch101cmay be connected to the other end of the second switch101band one end of the first inductor105, and the other end of the third switch may be connected to the other end of the first capacitor103and one end of the fourth switch101d. According to various embodiments of the disclosure, when the third switch101cis in on state, the other end of the first capacitor103may be connected to one end of the first inductor105. According to various embodiments of the disclosure, when the third switch101cis in off state, the other end of the first capacitor103may be disconnected from the other end of the first inductor105.

According to various embodiments of the disclosure, one end of the fourth switch101dmay be connected to the other end of the first capacitor103and the other end of the third switch101c, and the other end of the fourth switch may be connected to the ground. According to various embodiments of the disclosure, when the fourth switch101dis in on state, the other end of the first capacitor103may be connected to the ground. According to various embodiments of the disclosure, when the fourth switch101dis in off state, the other end of the first capacitor103may be disconnected from the ground.

According to various embodiments of the disclosure, one end of the first capacitor103may be connected to the other end of the first switch101aand one end of the second switch101b, and the other end of the first capacitor may be connected to the other end of the third switch101cand one end of the fourth switch101d. According to various embodiments of the disclosure, one end of the first inductor105may be connected to the other end of the second switch101band one end of the third switch101c, and the other end of the inductor may be connected to the output terminal (e.g., the second capacitor107) of the DC/DC converter100. According to various embodiments of the disclosure, when the first switch101aand the third switch101care in on state or the second switch101band the fourth switch101dare in on state, the first capacitor103and the first inductor105may be connected in series to configure a resonance circuit.

According to various embodiments of the disclosure, the states of the DC/DC converter100may be defined according to the on/off state of the multiple switches101, and this will be described below with reference to the drawings below.

FIG.2illustrates states of a DC/DC converter according to an on/off state of multiple switches according to an embodiment of the disclosure.

Parts (a) to (h) ofFIG.3are equivalent circuit diagrams illustrating states of the DC/DC converter according to various embodiments of the disclosure.

Referring toFIG.2, according to various embodiments of the disclosure, the DC/DC converter100may be in multiple states, and the multiple states may include, for example, the states of Table 1.

TABLE 1StateQ1Q2Q3Q4S1_RDOFFONONOFFS1_LRONONDon't careOFFS1_RESONOFFONOFFS1_LFDon't careOFFONONS2_RDONOFFOFFONS2_LRONONOFFDon't careS2_RESOFFONOFFONS2_LFOFFDon't careONON

In Table 1, “Don't care” indicates a state in which a corresponding switch can be in any one of on state and off state, and may be marked as “−” in the drawing to be described later.

Hereinafter, for convenience of explanation, controlling the multiple switches101to be on/off state corresponding to any one state by the DC/DC converter100may be understood as that the DC/DC converter100enters a state corresponding to the on/off state of the multiple switches101or is maintained in a state corresponding to the on/off state of the multiple switches101.

Referring to part (a) ofFIG.3, an equivalent circuit diagram of the DC/DC converter100in the state 1 ready (S1_RD state) of Table 1 is shown. The S1_RD state may be a waiting period in a state in which voltage Vcflyacross both ends of the first capacitor103(hereinafter, the voltage of the first capacitor103) is 0 V. Referring toFIG.2, in the S1_RD state, the first capacitor103may not be connected to the input power source1and the first inductor105, and the first inductor105may not be connected to the input power source1and the first capacitor103. Based on the first capacitor103not being connected to the input power source1and the first inductor105, the voltage Vcflyof the first capacitor103may be 0 V, and based on the first inductor105not being connected to the input power source1and the first capacitor103, the current ILof the inductor105(hereinafter, the inductor current) may be 0 A.

Referring to part (b) ofFIG.3, an equivalent circuit diagram of the DC/DC converter100in a state 1 linear rising (S1_LR state) of Table 1 is shown. The S1_LR state may be a period in which the inductor current ILlinearly increases while the voltage Vcflyacross the first capacitor103is 0 V. Referring toFIG.2, in the S1_LR state, the first capacitor103may not be connected to the input power source1and the first inductor105, and the first inductor105may be connected to the input power source1. Based on the first capacitor103not being connected to the input power source1and the first inductor105, the voltage Vcflyof the first capacitor103may be 0 V. Based on the first inductor105being connected to the input power source1, the switch node voltage Vxmay increase to the voltage Vin(hereinafter, the input voltage) of the input power source1. Based on the first inductor105being connected to the input power source1, the inductor current ILmay increase linearly.

Referring to part (c) ofFIG.3, an equivalent circuit diagram of the DC/DC converter100in the state 1 resonance (S1_RES state) of Table 1 is shown. The S1_RES state may be a period in which the first capacitor103and the first inductor105are connected to configure a series resonance circuit in a state where the voltage Vcflyof the first capacitor103is 0 V. Referring toFIG.2, in the S1_RES state, the first capacitor103may be connected to the input power source1and the first inductor105, and the first inductor105may be connected to the first capacitor103. Based on the connection to the input power source1, the first capacitor103is charged based on the input voltage Vin, and thus the voltage Vcflyof the first capacitor103may increase and the switch node voltage Vxmay fall. Based on the connection between the first inductor105and the first capacitor103, the inductor current ILmay increase and then fall due to resonance with the first capacitor103.

Referring to part (d) ofFIG.3, an equivalent circuit diagram of the DC/DC converter100in the state 1 linear falling (S1_LF state) of Table 1 is shown. The S1_LF state may be a period in which the inductor current ILlinearly falls while the voltage Vcflyof the first capacitor103is Vin(V). Referring toFIG.2, in the S1_LF state, the first capacitor103may be connected to the input power source1, the first inductor105may be connected to the ground, and the first capacitor103and the first inductor105may not be connected to each other. Based on the first capacitor103being connected to the input power source1without being connected to the first inductor105, the voltage Vcflyof the first capacitor103may be maintained at Vin(V). Based on the inductor105being connected to the ground without being connected to the first capacitor103, the switch node voltage Vxmay be maintained at 0 V and the inductor current ILmay drop linearly.

Referring to part (e) ofFIG.3, an equivalent circuit diagram of the DC/DC converter100in the state 2 ready (S2_RD state) of Table 1 is shown. The S2_RD state may be a waiting period in a state in which the voltage Vcflyof the first capacitor103is Vin(V). Referring toFIG.2together, in the S2_RD state, the first capacitor103may be connected to the input power source1without being connected to the first inductor105, and the first inductor105may not be connected to the input power source1and the first capacitor103. Based on the connection between the first capacitor103and the input power source1, the voltage Vcflyof the first capacitor103may be maintained at Vin(V). Based on the first inductor105not being connected to the first capacitor103, the inductor current ILmay be about 0 A, and the switch node voltage Vxmay be maintained at about Vin/2 (V).

Referring to part (f) ofFIG.3, an equivalent circuit diagram of the DC/DC converter100in a state 2 linear rising (S2_LR state) of Table 1 is shown. The S2_LR state may be a period in which the inductor current ILlinearly increases while the voltage Vcflyof the first capacitor103is Vin(V). Referring toFIG.2, in the S2_LR state, the first capacitor103may be connected to the input power source1and the first inductor105, and the first inductor105may be connected to the input power source1and the first capacitor103. Based on the first capacitor103being connected to the input power source1, the voltage Vcflyof the first capacitor103may be maintained at Vin(V). Based on the first inductor105being connected to the first capacitor103and the input power source1, the switch node voltage Vxmay increase to the input voltage Vin, and the inductor current ILmay increase linearly.

Referring to part (g) ofFIG.3, an equivalent circuit diagram of the DC/DC converter100in the state 2 resonance (S2_RES state) of Table 1 is shown. The S2_RES state may be a period in which the first capacitor103and the first inductor105are connected to configure a series resonance circuit while the voltage Vcflyof the first capacitor103is Vin(V). Referring toFIG.2, in the S2_RES state, the first capacitor103may be connected to the first inductor105without being connected to the input power source1, and the first inductor105may be connected to the first capacitor103. Based on being connected to the first inductor105without being connected to the input power source1, the first capacitor103is discharged and thus the switch node voltage Vxand the voltage Vcflyof the first capacitor103may fall. Based on the connection between the first inductor105and the first capacitor103, the inductor current ILmay increase and then fall due to resonance with the first capacitor103.

Referring to part (h) ofFIG.3, an equivalent circuit diagram of the DC/DC converter100in the state 2 linear falling (S2_LF state) of Table 1 is shown. The S2_LF state may be a period in which the inductor current ILlinearly falls while the voltage Vcflyof the first capacitor103is 0 V. Referring toFIG.2together, in the S2_LF state, the first capacitor103may not be connected to the input power source1, the first inductor105may be connected to the ground, and the first capacitor103and the first inductor105may not be connected to each other. Based on the first capacitor103not being connected to the first inductor105and the input power source1, the voltage Vcflyof the first capacitor103may be maintained at 0 V. Based on the first inductor105being connected to the ground without being connected to the first capacitor103, the switch node voltage Vxmay be maintained at 0 V and the inductor current ILmay drop linearly.

According to various embodiments of the disclosure, the DC/DC converter100(e.g., a controller (not shown)) may control the on/off state of each of the multiple switches101based on an input voltage Vin, a switch node voltage Vx, an inductor current IL, and/or the output voltage Voof the DC/DC converter100. For example, the DC/DC converter100may maintain an Sx_RD state (e.g., S1_RD state or S2_RD state) while the output voltage Voof the DC/DC converter100is equal to or greater than a first threshold voltage Vo_REFto be described later, and if the output voltage Vois decreased to the first threshold voltage Vo_REFor less, the DC/DC converter100may enter another state (e.g., Sx_LR state or the Sx_RES state) from the Sx_RD state. For example, if the switch node voltage Vxis decreased to a second threshold voltage (e.g., 0 V) or less to be described later, the DC/DC converter100may enter the Sx_LF state (or Sx_RD state) from the Sx_RES state. For example, if the output voltage Vois decreased less than the first threshold voltage Vo_REFand then the inductor current ILis decreased less than a first threshold current IL_Bto be described later, the DC/DC converter100may control the on/off state of the multiple switches101so as to increase the inductor current ILbefore entering the Sx_RES state, and then may enter the Sx_RES state. More specifically, in the Sx_RD state, if the output voltage Vois decreased less than the first threshold voltage Vo_REFand then the inductor current ILis less than the first threshold current IL_Bto be described later (e.g., when the inductor current is decreased less than the first threshold current IL_Bto be described later), the DC/DC converter100may enter the Sx_LR state, and then if the inductor current ILincreases above the first threshold current IL_B, the DC/DC converter100may enter the Sx_RES state. According to various embodiments of the disclosure, the length of period of the Sx_LR state may be determined according to the value of the first threshold current IL_B, and the value of the first threshold current IL_Bmay be changed. For example, in the Sx_RES state, if the switch node voltage Vxis decreased to a second threshold voltage (e.g., 0 V) or less and then the inductor current ILis decreased to the second threshold current (e.g., 0 A) or less, the DC/DC converter100may decrease the value of the first threshold current IL_B. For example, in the Sx_RES state, if the inductor current ILis decreased to the second threshold current (e.g., 0 A) or less (or if the switch node voltage Vxexceeds the second threshold voltage when the inductor current ILis decreased to the second threshold current or less) before the switch node voltage Vxdecreases to the second threshold voltage (e.g., 0 V) or less (e.g., in a state where the switch node voltage Vxexceeds the second threshold voltage), the DC/DC converter100may increase the value of the first threshold current IL_B.

According to various embodiments of the disclosure, when the inductor current ILis decreased to the second threshold current (e.g., 0 A) or less in the Sx_RES or Sx_LF state, if the output voltage Vois less than the first threshold voltage Vo_REF, the DC/DC converter100may increase the value of the first threshold current IL_B. For example, when the inductor current ILis decreased to a second threshold current (e.g., 0 A) or less in the Sx_RES or Sx_LF state, if the output voltage Vois greater than the first threshold voltage Vo_REF, the DC/DC converter100may decrease the value of the first threshold current IL_B.

FIG.4Aillustrates switching control of a DC/DC converter according to a change in load current Iowhile an input voltage Vinof the DC/DC converter is greater than twice (2Vo_REF) an output reference voltage (Vo_REF) according to an embodiment of the disclosure.FIG.4Billustrates switching control of a DC/DC converter when an output current Iois fixed to Io1while an input voltage Vinof the DC/DC converter is greater than, equal to, or less than twice (2Vo_REF) an output reference voltage according to an embodiment of the disclosure.FIG.4Cillustrates switching control of a DC/DC converter through an added technique while an input voltage Vinof a DC/DC converter is greater than twice (2Vo_REF) an output reference voltage according to an embodiment of the disclosure.FIG.4Dillustrates switching control of a DC/DC converter through an added technique while an input voltage Vinof a DC/DC converter100is greater than, equal to, or less than twice (2Vo_REF) an output reference voltage (Vo_REF) according to an embodiment of the disclosure.

Referring toFIGS.4A,4B,4C,4D, the output reference voltage Vo_REFmay indicate a reference voltage required at the output terminal of the DC/DC converter100, and may be described as a first threshold voltage in the drawings to be described later.

Referring toFIG.4A, in the S1_RD state (e.g., Q1(off), Q2(on), Q3(on), and Q4(off) states inFIG.1), when the output voltage Vois decreased less than the output reference voltage Vo_REFat time point t1, the DC/DC converter100may enter the S1_RES state (e.g., Q1(on), Q2(off), Q3(on), and Q4(off) inFIG.1). At time point t2, when the voltage Vcflyof the first capacitor103is to be equal to the input voltage Vin(e.g., if a switch node voltage (Vx) (e.g., Vin−Vcfly) is decreased to a second threshold voltage (e.g., 0 V) or less before the inductor current ILdecreases to the second threshold current (e.g., 0 A) or less), the DC/DC converter100may enter the S1_LF state (e.g., Q2(off), Q3(on), and Q4(on) states inFIG.1) from the S1_RES state. In the S1_LF state, the inductor current ILmay decrease linearly. At time point t3(e.g., after the switch node voltage Vxis decreased to a second threshold voltage (e.g., 0 V) or less), if the inductor current ILis decreased a second threshold current (e.g., 0 A) or less, the DC/DC converter100may enter the S2_RD state (e.g., Q1(on), Q2(off), Q3(off), and Q4(on) states inFIG.1). If the output voltage Vois decreased less than the output reference voltage Vo_REFat time point t4, the DC/DC converter100may enter the S2_RES state (e.g., Q1(off), Q2(on), Q3(off), and Q4(on) inFIG.1) from the S2_RD state. If the voltage (Vcfly) of the first capacitor103is decreased to 0 V or less at time point is (e.g., if the switch node voltage Vx(e.g., Vcfly) decreases to the second threshold voltage (e.g., 0 V) or less), the DC/DC converter100may enter the S2_LF state (e.g., Q1(off), Q3(on), and Q4(on) states inFIG.1) from the S2_RES state. In the S2_LF state, the inductor current ILmay decrease linearly. At time point t6(e.g., after the switch node voltage Vxis decreased to a second threshold voltage (e.g., 0 V) or less, the inductor current ILis decreased to the second threshold current (e.g., 0 A) or less, the DC/DC converter100may enter the S1_RD state. Thereafter, similarly to the above-described conditions, switching operations after t6may be performed.

IoofFIG.4Arepresents a current (e.g., a load current) required at a load terminal of the DC/DC converter100. According to various embodiments of the disclosure, according to a load connected to the load terminal of the DC/DC converter100, the length of period of the S1_RD state and/or S2_RD state described above may be changed. According to various embodiments of the disclosure, a current which the DC/DC converter100can supply to a load becomes the maximum current from the moment when the period of the Sx_RD state ends (e.g., from the time when a time point at which the inductor current ILis decreased to the second threshold current or less becomes the same as a time point at which output voltage Vois decreased less than the output reference voltage Vo_REF), and in a case ofFIG.4A, the maximum suppliable current may be Io2. If there is no Sx_LR state (IL_B=0 A), the output voltage Vomay decrease under the condition (e.g., after time point t9) of load current exceeding the maximum suppliable current Io2.

Referring toFIG.4B, the DC/DC converter100may enter the S1_RES state at time point t1. For example, at time point t7, when the inductor current ILis decreased to a second threshold current (e.g., 0 A) or less, the output voltage Voalso is decreased less than the output reference voltage Vo_REF, and thus the DC/DC converter100may enter the S2_RES state from the S1_RES state without entering the S1_LF state and/or the S2_RD state. Even at later time points, since the output voltage Voalso is decreased less than the output reference voltage Vo_REFwhen the inductor current ILis decreased to the second threshold current (e.g., 0 A) or less, the DC/DC converter100may alternatively enter the S1_RES state and the S2_RES state without entering the Sx_LF state and/or Sx_RD state.

Referring toFIG.4B, operation until time point t6may be the same as that ofFIG.4Adescribing a case in which the input voltage Vinis greater than twice (2Vo_REF) the output reference voltage, and thus the description thereof will be omitted. When the input voltage (VIN) is equal to twice (2Vo_REF) the output reference voltage at time point t6, since a time point at which Sx_RES ends (e.g., a time point at which the voltage (VCfly) of the first capacitor103becomes equal to the input voltage (VIN) or becomes 0 V) is the same as the time point at which the inductor current ILbecomes 0 A, only Sx_RD or Sx_RES period may exist according to the load current Iounder this condition. After time point t8, the input voltage Vinmay be lowered to be less than twice the output reference voltage (2Vo_REF). Here, since the difference (e.g., Vin−Vo) between the input voltage yin and the output voltage Vois smaller than the output voltage Vo(or the output reference voltage Vo_REF), the first capacitor103is not sufficiently charged and the voltage Vcflyof the first capacitor103does not increase to the input voltage Vin, and thus it is impossible to supply a sufficient current (e.g., when the average value of the inductor current ILis smaller than the load current Io). Accordingly, when the input voltage VINis smaller than twice the output reference voltage (2Vo_REF), if the DC/DC converter alternately enters the S1_RES state and the S2_RES state, the maximum suppliable current may be lowered less than Io1.

Therefore, in the disclosure, if the inductor current ILis less than the first threshold current IL_Bbefore entering the Sx_RES state (e.g., resonant period), a method for entering the Sx_RES state after linearly increasing the inductor current ILis proposed and will be described below with reference to the drawings to be described later.

IoofFIG.4Crepresents a current (e.g., a load current) required at the load terminal of the DC/DC converter100. When comparing to the case ofFIG.4A,FIG.4Cshows a case in which the output voltage Voat time point t4is lower than the output reference voltage Vo_REF(e.g., similar to time point t12ofFIG.4A). However, unlikeFIG.4A, referring toFIG.4C, the first threshold current IL_Bis increased at time point t4, and thus an S1_LR period is added between t4to t5. The S1_LR period may be terminated at time point t5when the inductor current ILbecomes higher than the first threshold current IL_B, and may be converted to the S1_RES state. When the output voltage Voat time point t7is higher than the output reference voltage Vo_REF, the DC/DC converter100lowers the first threshold current IL_Bagain, and when the output voltage Voat time point t7is lowered than the output reference voltage (Vo_REF), the DC/DC converter100may operate in the S2_LR state and may maintain the state until the inductor current ILbecomes to be the first threshold current IL_B. The DC/DC converter100may maintain the output voltage Voas the output reference voltage Vo_REFeven if the load current increases through the process of increasing or decreasing the Sx_LR period.

When comparingFIG.4DwithFIG.4B,FIG.4Bshows a case in which the output voltage Vois lower than the output reference voltage Vo_REFat time point t4(e.g., similar to time point t9ofFIG.4B). However, unlikeFIG.4B, referring toFIG.4D, the first threshold current IL_Bis increased at time point t4, and thus the S1_LR period is added between t4to t5. The S1_LR period may be terminated at time point t5when the inductor current ILbecomes higher than the first threshold current IL_B, and may be converted to the S1_RES state. When the output voltage Vois higher than the output reference voltage Vo_REFat time point t7, the DC/DC converter100may lower the first threshold current IL_Bagain, and when the output voltage Vobecomes lower than the output reference voltage (Vo_REF) at time point t8, the DC/DC converter100operates in the S2_LR state and may maintain the state until the inductor current ILbecomes the first threshold current IL_B. The DC/DC converter100may maintain the output voltage Voas the output reference voltage Vo_REFeven when the input voltage Vinvaries through a process of increasing or decreasing the Sx_LR period.

FIG.5is a flowchart500illustrating a method in which a DC/DC converter controls an on/off state of multiple switches based on a magnitude of an inductor current ILaccording to an embodiment of the disclosure. Hereinafter, operations of the DC/DC converter100will be described with reference toFIG.1.

Referring toFIG.5, according to various embodiments of the disclosure, in operation510, the DC/DC converter100may control the on/off state of the multiple switches101so as to increase the current ILoutput from the first inductor105, based on the current IL, which is output from the first inductor105, being less than the first threshold current IL_B. For example, the initial value of the first threshold current IL_Bmay be preconfigured to be 0 A. For example, in the Sx_RD state (e.g., the S1_RD state or the S2_RD state) (or before entering the Sx_RES state), the DC/DC converter100may control the on/off state of the multiple switches101to correspond to the Sx_LR state (e.g., the S1_LR state or the S2_LR state) when the inductor current ILis less than the first threshold current IL_B. More specifically, in the S1_RD state (or before entering the S1_RES state), if the inductor current ILis less than the first threshold current IL_B, the DC/DC converter100may control the first switch101aand the second switch101bto be on state, and may control the fourth switch101dto be off state (e.g., the DC/DC converter may enter the S1_LR state). In the S2_RD state (or before entering the S2_RES state), if the inductor current ILis less than the first threshold current IL_B, the DC/DC converter100may control the first switch101aand the second switch101bto be on state and may control the third switch101cto be off state (e.g., the DC/DC converter may enter the S2_LR state). According to various embodiments of the disclosure, based on the control of the multiple switches101described above, the inductor current ILmay increase linearly. According to various embodiments of the disclosure, the DC/DC converter100may maintain the Sx_LR state until the inductor current ILincreases to be greater than or equal to the first threshold current IL_B. According to an embodiment of the disclosure, in the Sx_RD state (e.g., the S1_RD state or the S2_RD state) (or before entering the Sx_RES state), if the inductor current ILis less than the first threshold current IL_B, the DC/DC converter100may maintain the Sx_LR state (e.g., S1_LR state or S2_LR state) for a preset period of time.

According to various embodiments of the disclosure, in operation530, the DC/DC converter100may control, based on the current IL, which is output from the first inductor105, being increased to be greater than or equal to the first threshold current IL_B, the second switch101band the fourth switch101dto be on state or control the first switch101aand the third switch101cto be on state to allow one end or the other end of a capacitor (e.g., the first capacitor103) to be connected to one end of the first inductor105. For example, when the inductor current ILlinearly increases in the S1_LR state to be equal to or greater than the first threshold current IL_B, the DC/DC converter100may control the first switch101aand the third switch101cto be on state to connect the capacitor (e.g., the first capacitor103) and the first inductor105in series (e.g., the S1_RES state). Here, the second switch101band the fourth switch101dmay be controlled to be off state. For example, when the inductor current ILlinearly increases in the S2_LR state to be equal to or greater than the first threshold current IL_B, the DC/DC converter100may control the second switch101band the fourth switch101dto be on state to connect the capacitor (e.g., the first capacitor103) and the first inductor105in series (e.g., the S2_RES state). Here, the first switch101aand the third switch101cmay be controlled to be off.

FIG.6is a flowchart600illustrating a method in which a DC/DC converter changes a first threshold current IL_Baccording to an embodiment of the disclosure. Hereinafter, operations of the DC/DC converter100will be described with reference toFIG.1.

Referring toFIG.6, according to various embodiments of the disclosure, in operation610, the DC/DC converter100may control the on/off state of the multiple switches101so as to increase the output current IL, based on the current IL, which is output from the first inductor105, being less than the first threshold current IL_B. For example, the DC/DC converter100may be in an Sx_LR state.

According to various embodiments of the disclosure, in operation620, the DC/DC converter100may control, based on the current IL, which is output from the first inductor105, being increased to be greater than or equal to the first threshold current IL_B, the second switch101band the fourth switch101dto be on state or control the first switch101aand the third switch101cto be on state to allow one end or the other end of a capacitor (e.g., the first capacitor103) to be connected to one end of the first inductor105. For example, the DC/DC converter100may be in an Sx_RES state.

According to various embodiments of the disclosure, when the voltage (e.g., switch node voltage Vx) at the other end of the second switch101band at one end of the third switch101cis equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation630), if the current ILoutput from the first inductor105is greater than the second threshold current (e.g., 0 A) (e.g., “No” in operation640), the DC/DC converter100may decrease the first threshold current (IL_B) in operation660. More specifically, when the switch node voltage Vxis decreased to a second threshold voltage (e.g., 0 V) or less in the Sx_RES state, if the inductor current ILis not decreased to the second threshold voltage (e.g., 0 A) or less (or if the switch node voltage (Vx) is decreased to a second threshold voltage (e.g., 0 V) or less, and then the inductor current ILis decreased to the second threshold current or less), the DC/DC converter100may decrease the first threshold current IL_B. According to various embodiments of the disclosure, based on the decrease of the first threshold current IL_B, the length of period of the Sx_LR state (e.g., the time during which the Sx_LR state is maintained after entering the Sx_LR state) may decrease. According to an embodiment of the disclosure, the DC/DC converter100may reduce the length of period of the Sx_LR state without using the first threshold current IL_Bwhen controlling the on/off state of the multiple switches101. For example, the DC/DC converter100may adjust the length of period of the Sx_LR state to a preset time shorter than the length of period of the previous Sx_LR state. According to an embodiment of the disclosure, the DC/DC converter100may enter the Sx_LF state (e.g., control the multiple switches101to be on/off state corresponding to the S1_LF state or the S2_LF state) after performing operation660, and may decrease the inductor current ILlinearly.

According to various embodiments of the disclosure, when the voltage (e.g., switch node voltage Vx) at the other end of the second switch101band at one end of the third switch101cis equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation630), if the current ILoutput from the first inductor105is equal to or less than the second threshold current (e.g., 0 A) (e.g., “Yes” in operation640), the DC/DC converter100may maintain the first threshold current (IL_B). According to various embodiments of the disclosure, when the voltage (e.g., switch node voltage Vx) at the other end of the second switch101band at one end of the third switch101cis equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation630) and the current ILoutput from the first inductor105is equal to or less than the second threshold current (e.g., 0 A) (e.g., “Yes” in operation640), if the output voltage Vois decreased less than the first threshold voltage Vo_REF, the DC/DC converter100may increase the first threshold current IL_B(e.g., operation670). According to various embodiments of the disclosure, when the voltage (e.g., switch node voltage Vx) at the other end of the second switch101band at one end of the third switch101cis equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation630) and the current ILoutput from the first inductor105is equal to or less than the second threshold current (e.g., 0 A) (e.g., “Yes” in operation640), if the output voltage Vodoes not decrease below the first threshold voltage Vo_REF, the DC/DC converter100may maintain the first threshold current IL_B.

According to various embodiments of the disclosure, when the voltage (e.g., switch node voltage Vx) at the other end of the second switch101band at one end of the third switch101cis greater than a second threshold voltage (e.g., 0 V) (e.g., “No” in operation630), if the current ILoutput from the first inductor105is equal to or less than the second threshold current (e.g., 0 A) (e.g., “Yes” in operation650), the DC/DC converter100may increase the first threshold current (IL_B) in operation670. More specifically, if the inductor current ILis decreased to a second threshold voltage (e.g., 0 A) or less before the switch node voltage Vxdecreases to the second threshold voltage (e.g., 0 V) or less in the Sx_RES state, the DC/DC converter100may increase the first threshold current IL_B. According to various embodiments of the disclosure, the DC/DC converter100may increase the length of period of the Sx_LR state without using the first threshold current IL_Bwhen controlling the on/off states of the multiple switches101. For example, the DC/DC converter100may adjust the length of period of the Sx_LR state to a preset time longer than the length of period of the previous Sx_LR state. According to an embodiment of the disclosure, after performing operation670, the DC/DC converter100may enter the Sx_RD state (e.g., control the multiple switches101to be on/off state corresponding to the S1_RD state or the S2_RD state), based on the fact that the switch node voltage Vxis equal to or less than a second threshold voltage (e.g., 0 V) and the inductor current ILis equal to or less than a second threshold current (e.g., 0 A). More particularly, the DC/DC converter100may enter the S2_RD state after operations630,650, and670in the S1_RES state (e.g., the multiple switches101are controlled to be on/off state corresponding to the S2_RD state). Alternatively, the DC/DC converter100may enter the S1_RD state after operations630,650, and670in the S2_RES state (e.g., the multiple switches101are controlled to be on/off state corresponding to the S1_RD state).

According to various embodiments of the disclosure, when the voltage (e.g., switch node voltage Vx) at the other end of the second switch101band at one end of the third switch101cis greater than a second threshold voltage (e.g., 0 V) (e.g., “No” in operation630), if the current ILoutput from the first inductor105is greater than the second threshold current (e.g., 0 A) (e.g., “No” in operation650), the DC/DC converter100may perform operations according to operation630.

FIG.7Ais a flowchart700aillustrating a method in which a DC/DC converter controls an on/off state of multiple switches in an S1 state according to an embodiment of the disclosure.FIG.7Bis a flowchart700billustrating a method in which a DC/DC converter controls an on/off state of multiple switches101in an S2 state according to an embodiment of the disclosure.

Referring toFIG.7A, according to various embodiments of the disclosure, in operation701, the DC/DC converter100may control the on/off state of the multiple switches101to correspond to the S1_RD state (e.g., Q1(off), Q2(on), Q3(on) and Q4(off)).

According to various embodiments of the disclosure, the DC/DC converter100may maintain the on/off state of the multiple switches101to correspond to the S1_RD state when the output voltage Vois equal to or greater than the first threshold voltage Vo_REF(e.g., “No” in operation703).

According to various embodiments of the disclosure, when the output voltage Vois less than the first threshold voltage Vo_REF(e.g., “Yes” in operation703), if the inductor current ILis less than the first threshold current IL_B(e.g., “No” in operation705), the DC/DC converter100may control the on/off state of the multiple switches101to correspond to the S1_LR state (e.g., Q1(on), Q2(on), Q3(−), and Q4(off)) in operation707.

According to various embodiments of the disclosure, when operation703is determined to be “Yes” or after operation707, if the inductor current ILis equal to or greater than the first threshold current IL_B(e.g., “Yes” in operation705), the DC/DC converter100may control the on/off state of the multiple switches101to correspond to the S1_RES state (e.g., Q1(on), Q2(off), Q3(on), and Q4(off)) in operation709.

According to various embodiments of the disclosure, after operation709, when the switch node voltage Vx(e.g., Vin−Vcfly) is greater than a second threshold voltage (e.g., 0 V) (e.g., when Vcflyis not increased to Vinor more (e.g., “No” in operation711), if the inductor current ILis equal to or less than a second threshold current (e.g., 0 A) (e.g., “Yes” in operation713), the DC/DC converter100may increase the first threshold current IL_Bin operation715. For example, if the inductor current ILis equal to or less than a second threshold current (e.g., 0 A) before Vcflyis increased to Vinor more, the length of period of the S1_LR state may be shorter than a time required to supply sufficient current in the next period S2_XX. The DC/DC converter100may increase the first threshold current IL_Bin order to increase the length of the period in the S1_LR state.

According to various embodiments of the disclosure, after operation715, the DC/DC converter100may perform operation723. For example, based on the fact that the switch node voltage Vxis decreased to the second threshold voltage (e.g., 0 V) or less and the inductor current ILis decreased to a second threshold current (e.g., 0 A) or less, the DC/DC converter100may control the on/off state of the multiple switches101to correspond to the S2_RD state (e.g., Q1(on), Q2(off), Q3(off)) and Q4(on)) in operation723.

According to various embodiments of the disclosure, after operation709, when the switch node voltage Vx(e.g., Vin−Vcfly) is greater than the second threshold voltage (e.g., 0 V) (e.g., when Vcflyis not increased to Vinor more) (e.g., “No” in operation711), if the inductor current ILis greater than a second threshold current (e.g., 0 A) (e.g., “No” in operation713), the DC/DC converter100may perform operations according to operation711.

According to various embodiments of the disclosure, after operation709, when the switch node voltage Vx(e.g., Vin−Vcfly) is equal to or less than the second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation711), if the inductor current ILis greater than the second threshold current (e.g., 0 A) (e.g., “No” in operation717) (e.g., if Vcflyis increased to yin or more and then if the inductor current ILis decreased to a second threshold current or less), the DC/DC converter100may decrease the first threshold current IL_Bin operation719. For example, if the inductor current ILis not decreased to the second threshold current (e.g., 0 A) or less when Vcflyis increased to Vinor more, the length of period of the S1_LR state may be longer than a time required to supply sufficient current in the next period S2_XX. The DC/DC converter100may decrease the first threshold current IL_Bin order to adjust the length of period of the S1_LR state. According to an embodiment of the disclosure, when the switch node voltage Vx(e.g., Vin-Vcfly) is equal to or less than the second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation711) and the inductor current ILis equal to or less than the second threshold current (e.g., 0 A) (e.g., “Yes” in operation717), if the output voltage Vois decreased to Vo_REFor less, the DC/DC converter100may increase the first threshold current IL_B(e.g., operation715). According to an embodiment of the disclosure, when the switch node voltage Vx(e.g., Vin−Vcfly) is equal to or less than the second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation711) and the inductor current ILis equal to or less than the second threshold current (e.g., 0 A) (e.g., “Yes” in operation717), if the output voltage Vois not decreased to Vo_REFor less, the DC/DC converter100may maintain the first threshold current IL_B.

According to various embodiments of the disclosure, after operation719, the DC/DC converter100may control the on/off state of the multiple switches101to correspond to the S1_LF state (e.g., Q1(−)), Q2(off), Q3(on) and Q4(on)) in operation721. In the S1_LF state, the inductor current ILmay decrease linearly.

According to various embodiments of the disclosure, after operation721, the DC/DC converter100may perform operation723. For example, based on the inductor current ILbeing decreased to the second threshold current (e.g., 0 A) or less in a state in which the switch node voltage Vxis equal to or less than the second threshold voltage (e.g., 0 V), the DC/DC converter100may control the on/off state of the multiple switches101to correspond to the S2_RD state (e.g., Q1(on), Q2(off), Q3(off), and Q4(on)) in operation723.

Referring toFIG.7B, according to various embodiments of the disclosure, when the output voltage Vois equal to or greater than the first threshold voltage Vo_REF(e.g., “No” in operation725), the DC/DC converter100may maintain the on/off state of multiple switches101to correspond to the S2_RD state.

According to various embodiments of the disclosure, when the output voltage Vois less than the first threshold voltage Vo_REF(e.g., “Yes” in operation725), if the inductor current ILis less than the first threshold current IL_B(e.g., “No” in operation727), the DC/DC converter100may control the on/off state of the multiple switches101to correspond to the S2_LR state (e.g., Q1(on), Q2(on), Q3(−), and Q4(off)) in operation729.

According to various embodiments of the disclosure, when operation725is determined to be “Yes” or after operation729, if the inductor current ILis equal to or greater than the first threshold current IL_B(e.g., “Yes” in operation727), the DC/DC converter100may control the on/off state of the multiple switches101to correspond to the S2_RES state (e.g., Q1(on), Q2(off), Q3(on), and Q4(off)) in operation731.

According to various embodiments of the disclosure, after operation731, when the switch node voltage Vx(e.g., Vcfly) is greater than a second threshold voltage (e.g., 0 V) (e.g., when Vcflyis not decreased to second threshold voltage (e.g., 0 V) or less (e.g., “No” in operation733), if the inductor current ILis equal to or less than the second threshold current (e.g., 0 A) (e.g., “Yes” in operation735), the DC/DC converter100may increase the first threshold current IL_Bin operation737. For example, if the inductor current ILis equal to or less than a second threshold current (e.g., 0 A) before Vcflydecreases to the second threshold voltage (e.g., 0 V) or less, the length of period of the S2_LR state may be shorter than a time required to supply sufficient current in the next period S1_XX. The DC/DC converter100may increase the first threshold current IL_Bin order to increase the length of period of the S2_LR state.

According to various embodiments of the disclosure, after operation737, the DC/DC converter100may perform operation745. For example, based on the fact that the switch node voltage Vxis decreased to the second threshold voltage (e.g., 0 V) or less and the inductor current ILis decreased to a second threshold current (e.g., 0 A) or less, the DC/DC converter100may control the on/off state of the multiple switches101to correspond to the S1_RD state (e.g., Q1(on), Q2(off), Q3(off)) and Q4(on)).

According to various embodiments of the disclosure, after operation731, when the switch node voltage Vx(e.g., Vcfly) is greater than the second threshold voltage (e.g., 0 V) (e.g., when Vcflyis not decreased to 0 V or less) (e.g., “No” in operation733), if the inductor current ILis greater than the second threshold current (e.g., 0 A), the DC/DC converter100may perform operations according to operation733.

According to various embodiments of the disclosure, after operation731, when the switch node voltage Vx(e.g., Vcfly) is equal to or less than the second threshold voltage (e.g., 0 V) (e.g., after Vcflyis decreased to a second threshold voltage (e.g., 0 V) or less) (e.g., “Yes” in operation733), if the inductor current ILis greater than the second threshold current (e.g., 0 A) (e.g., “No” in operation739), the DC/DC converter100may decrease the first threshold current IL_Bin operation741. For example, if the inductor current ILis not decreased to the second threshold current (e.g., 0 A) or less when Vcflyis decreased to the second threshold voltage (e.g., 0 V) or less, the length of period of the S2_LR state may be longer than a time required to supply sufficient current in the next period S1_XX. The DC/DC converter100may decrease the first threshold current IL_Bin order to adjust the length of period of the S2_LR state. According to an embodiment of the disclosure, when the switch node voltage Vx(e.g., Vcfly) is equal to or less than the second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation733) and the inductor current ILis equal to or less than the second threshold current (e.g., 0 A) (e.g., “Yes” in operation739), if the output voltage Vois decreased less than the first threshold voltage Vo_REF, the DC/DC converter100may increase the first threshold current IL_B(e.g., operation737). According to an embodiment of the disclosure, when the switch node voltage Vx(e.g., Vcfly) is equal to or less than the second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation733) and the inductor current ILis equal to or less than the second threshold current (e.g., 0 A) (e.g., “Yes” in operation739), if the output voltage Vois not decreased to the first threshold voltage Vo_REFor less, the DC/DC converter100may maintain the first threshold current IL_B.

According to various embodiments of the disclosure, after operation741, the DC/DC converter100may control the on/off state of the multiple switches101to correspond to the S1_LF state (e.g., Q1(off), Q2(−), Q3(on) and Q4(on)) in operation743. In the S2_LF state, the inductor current ILmay decrease linearly.

According to various embodiments of the disclosure, after operation743, the DC/DC converter100may perform operation745(e.g., operation701). For example, based on the inductor current ILbeing decreased to the second threshold current (e.g., 0 A) or less in a state in which the switch node voltage Vxis equal to or less than the second threshold voltage (e.g., 0 V), the DC/DC converter100may control the on/off state of the multiple switches101to correspond to the S1_RD state (e.g., Q1(off), Q2(on), Q3(on), and Q4(off)) in operation745.

According to various embodiments of the disclosure, after operation745, the DC/DC converter100may perform the operations ofFIG.7A(e.g., operation703and thereafter).

FIG.8illustrates elements of a DC/DC converter800using an interleaving technology according to an embodiment of the disclosure.

Referring toFIG.8, according to various embodiments of the disclosure, the DC/DC converter800may include multiple first switches101, a first capacitor103(e.g., a flying capacitor), a first inductor105, a second capacitor107, multiple second switches109, a third capacitor111(e.g., a flying capacitor), and/or a second inductor113.

According to various embodiments of the disclosure, the first (1st) rail of the DC/DC converter800may include multiple first switches101, a first capacitor103, and a first inductor105, and the second (2nd) rail of the DC/DC converter800may include multiple second switches109, a third capacitor111, and a second inductor113.

According to various embodiments of the disclosure, the multiple first switches101, the first capacitor103, the first inductor105, and the second capacitor107are the same as the elements described inFIG.1, and thus description thereof will be omitted.

According to various embodiments of the disclosure, the multiple second switches109may include a fifth switch109a(Q21), a sixth switch109b(Q22), a seventh switch109c(Q23), and/or an eighth switch109d(Q24). According to various embodiments of the disclosure, each of the multiple second switches109may be implemented as a MOSFET or a diode.

According to various embodiments of the disclosure, each of the multiple second switches109may be controlled to be on state or off state under the control of a controller (not shown) (e.g., a gate driver or driving circuit). According to various embodiments of the disclosure, states of the 1strail may be defined according to the on/off state of the multiple first switches101, and states of the 2ndrail may be defined according to the on/off state of the multiple second switches109. For example, the states of the 1strail and the states of the 2ndrail may each include at least some of the states defined in Table 1.

According to various embodiments of the disclosure, a first inductor105(L1) and a second inductor113(L2) may be connected in series with each other. According to various embodiments of the disclosure, a coupling coefficient (K) between the first inductor105and the second inductor113may have a value between −1 to +1. For example, when the coupling coefficient K is greater than −1 and less than 0 or greater than 0 and less than +1, the first inductor105and the second inductor113may be referred to as coupled inductors. For example, if the coupling coefficient K is 0, the first inductor105and the second inductor113may be referred to as independent inductors. According to various embodiments of the disclosure, when the coupling coefficient K is less than 0, the interleaving technology of the disclosure may be applied to the DC/DC converter800.

FIGS.9A and9Bare flowcharts900aand900billustrating a method in which a DC/DC converter controls an on/off state of multiple first switches according to various embodiments of the disclosure.FIGS.9C and9Dare flowcharts900cand900dillustrating a method in which a DC/DC converter800controls an on/off state of multiple first switches according to various embodiments of the disclosure.FIGS.9E and9Fare flowcharts900eand900fillustrating a method in which an DC/DC converter800controls an on/off state of multiple second switches according to various embodiments of the disclosure.FIGS.9G and9Hare flowcharts900gand900hillustrating a method in which an DC/DC converter800controls an on/off state of multiple second switches according to various embodiments of the disclosure.FIG.10illustrates a method in which an DC/DC converter800controls an on/off state of multiple switches according to an embodiment of the disclosure.

Referring toFIG.9A, according to various embodiments of the disclosure, in operation901a, the DC/DC converter800may, with regard to the 1strail, control the on/off state of the multiple switches101to correspond to the S1_RD state.

According to various embodiments of the disclosure, with regard to the 1strail, the DC/DC converter800may maintain the on/off state of the multiple switches101to correspond to the S1_RD state when the output voltage Vois equal to or greater than the first threshold voltage Vo_REF(e.g., “No” in operation903a).

According to various embodiments of the disclosure, when the output voltage Vois less than the first threshold voltage Vo_REF(e.g., “Yes” in operation903a), if a first inductor current IL1(e.g., the inductor current IL) is less than a third threshold current IL1_B(e.g., the first threshold current IL_B) (e.g., “No” in operation905a), the DC/DC converter800may control, with regard to the 1strail, the on/off state of the multiple switches101to correspond to the S1_LR state in operation907a.

According to various embodiments of the disclosure, when operation903ais determined to be “Yes” or after operation907a, if the first inductor current IL1is equal to or greater than the third threshold current IL1_B(e.g., “Yes” in operation905a), the DC/DC converter800may control, with regard to the 1strail, the on/off state of the multiple first switches101to correspond to the S1_RES state in operation909a.

According to various embodiments of the disclosure, after operation909a, if the switch node voltage Vx1(e.g., switch node voltage Vx) is equal to the output voltage Vo(or the output reference voltage Vo_REF) (e.g., if the first switch node voltage Vx1decreases to such an extent that the difference between the first switch node voltage Vx1and the output voltage Vo(or the output reference voltage Vo_REF) is within a designated error range) (e.g., “Yes” in operation911a), the DC/DC converter800may perform operation913aofFIG.9B. For example, referring toFIG.10, a time point t2at which the first switch node voltage Vx1becomes equal to the output voltage Vo(or the output reference voltage Vo_REF) may be the same as the time point at which the first inductor current IL1has the maximum value (e.g., the maximum point of the first inductor current IL1). Further, the time point t2may be described as the time point at which the slope of the first inductor current IL1is 0.

According to various embodiments of the disclosure, after operation909a, before the first switch node voltage Vx1becomes equal to the output voltage Vo(or the output reference voltage Vo_REF) (e.g., before the first switch node voltage Vx1decreases to such an extent that the difference between the first switch node voltage Vx1and the output voltage Vo(or the output reference voltage Vo_REF) is within a designated error range (e.g., “No” in operation911a), the DC/DC converter800may, with regard to the 1strail, maintain the on/off state of the multiple switches101to correspond to the S1_RES state.

Referring toFIG.9B, according to various embodiments of the disclosure, the DC/DC converter800may start the operation of the 2ndrail in operation913a. For example, the DC/DC converter800may start to perform operation901bofFIG.9E, which will be described later.

According to various embodiments of the disclosure, after operation913a, when the first switch node voltage Vx1(e.g., Vin−Vcfly) is greater than a second threshold voltage (e.g., 0 V) (e.g., Vcflyis not increased to Vinor more) (e.g., “No” in operation915a), if the first inductor current IL1is equal to or less than a second threshold current (e.g., 0 A) (e.g., “Yes” in operation917a), the DC/DC converter800may increase the third threshold current IL1_Bin operation919a.

According to various embodiments of the disclosure, after operation919a, the DC/DC converter800may perform operation927a.

According to various embodiments of the disclosure, after operation913a, when the first switch node voltage Vx1(e.g., Vin−Vcfly) is greater than a second threshold voltage (e.g., 0 V) (e.g., Vcflyis not increased to yin or more) (e.g., “No” in operation915a), if the first inductor current IL1is greater than the second threshold current (e.g., 0 A) (e.g., “No” in operation917a), the DC/DC converter800may perform operations according to operation915a.

According to various embodiments of the disclosure, after operation913a, when the first switch node voltage Vx1(e.g., Vin−Vcfly) is equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation915a), if the first inductor current IL1is greater than a second threshold current (e.g., 0 A) (e.g., if Vcflyis increased to Vinor more and then the first inductor current IL1is decreased to the second threshold current or less (e.g., “No” in operation921a), the DC/DC converter800may decrease the third threshold current IL1_Bin operation923a. The DC/DC converter800may decrease the third threshold current IL1_Bin order to shorten the length of period of the S1_LR state. According to an embodiment of the disclosure, when the first switch node voltage Vx1(e.g., Vin−Vcfly) is equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation915a) and the first inductor current IL1is equal to or less than a second threshold current (e.g., 0 A) (e.g., “Yes” in operation921a), if the output voltage Vois decreased less than the first threshold voltage Vo_REF, the DC/DC converter100may increase the third threshold current IL1_B(e.g., operation919a). According to an embodiment of the disclosure, when the first switch node voltage Vx1(e.g., Vin−Vcfly) is equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation915a) and the first inductor current IL1is equal to or less than a second threshold current (e.g., 0 A) (e.g., “Yes” in operation921a), if the output voltage Vodoes not decrease below the first threshold voltage Vo_REF, the DC/DC converter100may maintain the third threshold current IL1_B.

According to various embodiments of the disclosure, after operation923a, the DC/DC converter800may control, with regard to the 1strail, the on/off state of the multiple first switches101to correspond to the S1_LF state in operation925a.

According to various embodiments of the disclosure, after operation925a, the DC/DC/converter800may determine whether to start an operation with respect to the 1strail in operation927a. For example, if a second switch node voltage Vx2to be described later is equal to the output voltage Vo(or the output reference voltage Vo_REF) (e.g., if the second switch node voltage Vx2is decreased to such an extent that the difference between the second switch node voltage Vx2and the output voltage Vo(or the output reference voltage Vo_REF) is within a designated error range) (e.g., “Yes” in operation927a), the DC/DC converter800may perform operation (e.g., operation929a) ofFIG.9C, if not, the DC/DC converter may be in standby.

Referring toFIG.9C, according to various embodiments of the disclosure, in operation929a, the DC/DC converter800may, with regard to the 1strail, control the on/off state of the multiple switches101to correspond to the S2_RD state.

According to various embodiments of the disclosure, if the output voltage Vois equal to or greater than the first threshold voltage Vo_REF(e.g., “No” in operation931a), the DC/DC converter800may, with regard to the Pt rail, maintain the on/off state of the multiple first switches101to correspond to the S2_RD state. For example, even if it is determined to start the operation of the 1strail in operation927a(e.g., when the second switch node voltage Vx2becomes equal to the output voltage Vo(or the output reference voltage Vo_REF)), when the output voltage Vois equal to or greater than the first threshold voltage Vo_REF(e.g., “No” in operation931a), the DC/DC converter800may maintain the S2_RD state. For example, referring toFIG.10, during period of t4to is in which the output voltage Vois equal to or greater than the output reference voltage Vo_REF, the moments when the second switch node voltage Vx2becomes equal to the output voltage Vo(or the output reference voltage Vo_REF) may occur. During period of t4to is in which the output voltage Vois equal to or greater than the output reference voltage Vo_REF, even if the second switch node voltage Vx2becomes equal to the output voltage Vo(or the output reference voltage Vo_REF), the DC/DC converter800may maintain the on/off state of the multiple first switches101to correspond to the S2_RD state.

According to various embodiments of the disclosure, when the output voltage Vois less than the first threshold voltage Vo_REF(e.g., “Yes” in operation929a), if a first inductor current IL1(e.g., the inductor current IL) is less than a third threshold current IL1_B(e.g., the first threshold current IL_B) (e.g., “No” in operation933a), the DC/DC converter800may control, with regard to the 1strail, the on/off state of the multiple switches101to correspond to the S2_LR state in operation935a.

According to various embodiments of the disclosure, when operation931ais determined to be “Yes” or after operation935a, if the first inductor current IL1is equal to or greater than the third threshold current IL1_B(e.g., “Yes” in operation933a), the DC/DC converter800may control, with regard to the 1strail, the on/off state of the multiple switches101to correspond to the S2_RES state in operation937a.

According to various embodiments of the disclosure, after operation937a, if the switch node voltage Vx1(e.g., switch node voltage Vx) is equal to the output voltage Vo(or the output reference voltage Vo_REF) (e.g., if the first switch node voltage Vx1decreases to such an extent that the difference between the first switch node voltage Vx1and the output voltage Vo(or the output reference voltage Vo_REF) is within a designated error range) (e.g., “Yes” in operation939a), the DC/DC converter800may perform operation941aofFIG.9D. For example, referring toFIG.10, time point t5at which the first switch node voltage Vx1becomes equal to the output voltage Vo(or the output reference voltage Vo_REF) may be the same as a time point at which the first inductor current IL1has the maximum value (e.g., the maximum point of the first inductor current IL1). Further, time point is may be referred to as the time point at which the slope of the first inductor current IL1is 0.

According to various embodiments of the disclosure, after operation937a, before the first switch node voltage Vx1becomes equal to the output voltage Vo(or the output reference voltage Vo_REF) (e.g., before the first switch node voltage Vx1decreases to such an extent that the difference between the first switch node voltage Vx1and the output voltage Vo(or the output reference voltage Vo_REF) is within a designated error range (e.g., “No” in operation939a), the DC/DC converter800may, with regard to the 1strail, maintain the on/off state of the multiple switches101to correspond to the S2_RES state.

Referring toFIG.9D, according to various embodiments of the disclosure, the DC/DC converter800may start the operation of the 2ndrail in operation941a. For example, in operation941a, the DC/DC converter800may start to perform operation929bofFIG.9G, which will be described later.

According to various embodiments of the disclosure, after operation941a, when the first switch node voltage Vx1(e.g., Vcfly) is greater than a second threshold voltage (e.g., 0 V) (e.g., Vcflyis not decreased to the second threshold voltage or less) (e.g., “No” in operation943a), if the first inductor current IL1is equal to or less than the second threshold current (e.g., 0 A) (e.g., “Yes” in operation945a), the DC/DC converter800may increase the third threshold current IL1_Bin operation947a.

According to various embodiments of the disclosure, after operation947a, the DC/DC converter800may perform operation955a.

According to various embodiments of the disclosure, after operation941a, when the first switch node voltage Vx1(e.g., Vcfly) is greater than a second threshold voltage (e.g., 0 V) (e.g., before Vcflyis decreased to the second threshold voltage or less) (e.g., “No” in operation943a), if the first inductor current IL1is greater than the second threshold current (e.g., 0 A) (e.g., “No” in operation947a), the DC/DC converter800may perform operations according to operation943a.

According to various embodiments of the disclosure, after operation941a, when the first switch node voltage Vx1(e.g., Vcfly) is equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation943a), if the first inductor current IL1is greater than a second threshold current (e.g., 0 A) (e.g., “No” in operation949a) (e.g., if Vcflyis decreased to 0 or less and then the first inductor current IL1is decreased to the second threshold current or less), the DC/DC converter800may decrease the third threshold current IL1_Bin operation951a. The DC/DC converter800may decrease the third threshold current IL1_Bin order to shorten the length of period of the S1_LR state. According to an embodiment of the disclosure, when the first switch node voltage Vx1(e.g., Vcfly) is equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation943a) and the first inductor current IL1is equal to or less than a second threshold current (e.g., 0 A) (e.g., “Yes” in operation949a), if the output voltage Vois decreased less than the first threshold voltage Vo_REF, the DC/DC converter100may increase the third threshold current IL1_B(e.g., operation947a). According to an embodiment of the disclosure, when the first switch node voltage VL1(e.g., Vcfly) is equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation943a) and the first inductor current IL1is equal to or less than a second threshold current (e.g., 0 A) (e.g., “Yes” in operation949a), if the output voltage Vodoes not decrease below the first threshold voltage Vo_REF, the DC/DC converter100may maintain the third threshold current IL1_B.

According to various embodiments of the disclosure, after operation951a, the DC/DC converter800may control, with regard to the 1strail, the on/off state of the multiple first switches101to correspond to the S2_LF state in operation953a.

According to various embodiments of the disclosure, after operation953a, the DC/DC/converter800may determine whether to start an operation with respect to the 1strail in operation955a. For example, if a second switch node voltage Vx2to be described later is equal to the output voltage Vo(or the output reference voltage Vo_REF) (e.g., if the second switch node voltage Vx2decreases to such an extent that the difference between the second switch node voltage Vx2and the output voltage Vo(or the output reference voltage Vo_REF) is within a designated error range) (e.g., “Yes” in operation955a), the DC/DC converter800may perform operation (e.g., operation901a) ofFIG.9A, if not, the DC/DC converter may be in standby.

Referring toFIG.9E, according to various embodiments of the disclosure, in operation901b, the DC/DC converter800may, with regard to the 2ndrail, control the on/off state of the multiple second switches109to correspond to the S1_RD state. According to various embodiments of the disclosure, the DC/DC converter800may perform operation901bwhen it is determined to start the operation of the 2ndrail in operation913adescribed above.

According to various embodiments of the disclosure, if the output voltage Vois equal to or greater than the first threshold voltage Vo_REF(e.g., “No” in operation903b), the DC/DC converter800may, with regard to the 2ndrail, maintain the on/off state of the multiple second switches109to correspond to the S1_RD state. For example, even if it is determined to start the operation of the 2ndrail (e.g., when the first switch node voltage Vx1becomes equal to the output voltage Vo(or the output reference voltage Vo_REF), the DC/DC converter800may maintain the S1_RD state when the output voltage Vois equal to or greater than the first threshold voltage Vo_REF(e.g., “No” in operation903b). For example, referring toFIG.10, during the period of t3to t4in which the output voltage Vois equal to or greater than the output reference voltage Vo_REF, the moments when the first switch node voltage Vx1becomes equal to the output voltage Vo(or the output reference voltage Vo_REF) may occur. During the period of t3to t4in which the output voltage Vois equal to or greater than the output reference voltage Vo_REF, even if the first switch node voltage Vx1becomes equal to the output voltage Vo(or the output reference voltage Vo_REF), the DC/DC converter800may maintain the on/off state of the multiple second switches109to correspond to the S1_RD state.

According to various embodiments of the disclosure, when the output voltage Vois less than the first threshold voltage Vo_REF(e.g., “Yes” in operation903b), if a second inductor current IL2is less than a fourth threshold current IL2_B(e.g., “No” in operation905b), the DC/DC converter800may control, with regard to the 2ndrail, the on/off state of the multiple second switches109to correspond to the S1_LR state in operation907b. For example, the fourth threshold current IL2_Bmay be configured independently of the above-described third threshold current IL1_B, and may be independently changed according to the result of operation919b, operation923b, operation947b, or operation951b, regardless of a change in the third threshold current IL1_B. For example, the fourth threshold current IL2_Bis configured to be the same as the above-described third threshold current IL1_B, and when the fourth threshold current IL2_Bis changed, the third threshold current IL1_Bmay also be changed.

According to various embodiments of the disclosure, when operation903bis determined to be “Yes” or after operation907b, if the second inductor current IL2is equal to or greater than the fourth threshold current IL2_B(e.g., “Yes” in operation905b), the DC/DC converter800may control, with regard to the 2ndrail, the on/off state of the multiple second switches109to correspond to the S1_RES state in operation909b.

According to various embodiments of the disclosure, after operation909b, if the switch node voltage Vx2is equal to the output voltage Vo(or the output reference voltage Vo_REF) (e.g., if the second switch node voltage Vx2decreases to such an extent that the difference between the second switch node voltage Vx2and the output voltage Vo(or the output reference voltage Vo_REF) is within a designated error range) (e.g., “Yes” in operation911b), the DC/DC converter800may perform operation913bofFIG.9F. For example, referring toFIG.10, the time point t3at which the first switch node voltage Vx1becomes equal to the output voltage Vo(or the output reference voltage Vo_REF) may be the same as the time point at which the second inductor current IL2has the maximum value (e.g., the maximum point of the second inductor current IL2). Further, the time point t3may be referred to as the time point at which the slope of the second inductor current IL2is 0.

According to various embodiments of the disclosure, after operation909b, before the second switch node voltage Vx2becomes equal to the output voltage Vo(or the output reference voltage Vo_REF) (e.g., before the second switch node voltage Vx2decreases to such an extent that the difference between the second switch node voltage Vx2and the output voltage Vo(or the output reference voltage Vo_REF) is within a designated error range) (e.g., “No” in operation911b, the DC/DC converter800may, with regard to the 2ndrail, maintain the on/off state of the multiple second switches109to correspond to the S1_RES state.

Referring toFIG.9F, according to various embodiments of the disclosure, the DC/DC converter800may start the operation of the Pt rail in operation913b. For example, in operation913b, the DC/DC converter800may start to perform operation901aofFIG.9Adescribed above.

According to various embodiments of the disclosure, after operation913b, when the second switch node voltage Vx2is greater than a second threshold voltage (e.g., 0 V) (e.g., “No” in operation915b), if the second inductor current IL2is equal to or less than the second threshold current (e.g., 0 A) (e.g., “Yes” in operation917b), the DC/DC converter800may increase the fourth threshold current IIL2_Bin operation919b.

According to various embodiments of the disclosure, after operation919b, the DC/DC converter800may perform operation927b.

According to various embodiments of the disclosure, after operation913b, when the second switch node voltage Vx2is greater than a second threshold voltage (e.g., 0 V) (e.g., “No” in operation915b), if the second inductor current IL2is greater than the second threshold current (e.g., 0 A) (e.g., “No” in operation917b), the DC/DC converter800may perform operations according to operation915b.

According to various embodiments of the disclosure, after operation913b, when the second switch node voltage Vx2is equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation915b), if the second inductor current IL2is greater than a second threshold current (e.g., 0 A) (e.g., if the second switch node voltage Vx2decreases to the second threshold voltage or less and then the second inductor current IL2is decreased to the second threshold current or less) (e.g., “No” in operation921b), the DC/DC converter800may decrease the fourth threshold current IIL2_Bin operation923b. For example, the DC/DC converter800may decrease the fourth threshold current IL2_Bin order to shorten the length of period of the S1_LR state. According to an embodiment of the disclosure, when the second switch node voltage Vx2is equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation915b) and the second inductor current IL2is equal to or less than a second threshold current (e.g., 0 A) (e.g., “Yes” in operation921b), if the output voltage Vois decreased less than the first threshold voltage Vo_REF, the DC/DC converter800may increase the fourth threshold current IIL2_B(e.g., operation919b). According to an embodiment of the disclosure, when the second switch node voltage Vx2is equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation915b) and the second inductor current IL2is equal to or less than a second threshold current (e.g., 0 A) (e.g., “Yes” in operation921b), if the output voltage Vodoes not decrease below the first threshold voltage Vo_REF, the DC/DC converter800may maintain the fourth threshold current IL2_B.

According to various embodiments of the disclosure, after operation923b, the DC/DC converter800may control, with regard to the 2ndrail, the on/off state of the multiple second switches109to correspond to the S2_LF state in operation925b.

According to various embodiments of the disclosure, after operation925b, the DC/DC/converter800may determine whether to start an operation with respect to the 2ndrail in operation927b. For example, if the first switch node voltage Vx1described above is equal to the output voltage Vo(or the output reference voltage Vo_REF) (e.g., if the first switch node voltage Vx1decreases to such an extent that the difference between the first switch node voltage Vx1and the output voltage Vo(or the output reference voltage Vo_REF) is within a designated error range) (e.g., “Yes” in operation927b), the DC/DC converter800may perform operation929bofFIG.9G, if not, the DC/DC converter may be in standby.

Referring toFIG.9G, according to various embodiments of the disclosure, in operation929b, the DC/DC converter800may, with regard to the 2ndrail, control the on/off state of the multiple second switches109to correspond to the S2_RD state.

According to various embodiments of the disclosure, if the output voltage Vois equal to or greater than the first threshold voltage Vo_REF(e.g., “No” in operation931b), the DC/DC converter800may, with regard to the 2ndrail, maintain the on/off state of the multiple second switches109to correspond to the S2_RD state. For example, even if it is determined to start the operation of the 2ndrail in the previous operation927b(e.g., when the first switch node voltage Vx1becomes equal to the output voltage Vo(or the output reference voltage Vo_REF)), the DC/DC converter800may maintain the S2_RD state when the output voltage Vois equal to or greater than the first threshold voltage Vo_REF(e.g., “No” in operation931b). For example, referring toFIG.10, during the period of t6in which the output voltage Vois equal to or greater than the output reference voltage Vo_REF, the moments when the first switch node voltage Vx1becomes equal to the output voltage Vo(or the output reference voltage Vo_REF) may occur. In a period after t6in which the output voltage Vois equal to or greater than the output reference voltage Vo_REF, even if the first switch node voltage Vx1becomes equal to the output voltage Vo(or the output reference voltage Vo_REF), the DC/DC converter800may maintain the on/off state of the multiple second switches109to correspond to the S2_RD state.

According to various embodiments of the disclosure, when the output voltage Vois less than the first threshold voltage Vo_REF(e.g., “Yes” in operation929b), if a second inductor current IL2is less than a fourth threshold current IL2_B(e.g., “No” in operation933b), the DC/DC converter800may control, with regard to the 2ndrail, the on/off state of the multiple second switches109to correspond to the S2_LR state in operation935b.

According to various embodiments of the disclosure, when operation931bis determined to be “Yes” or after operation935b, if the second inductor current IL2is equal to or greater than the fourth threshold current IL2_B(e.g., “Yes” in operation933b), the DC/DC converter800may control, with regard to the 2ndrail, the on/off state of the multiple second switches109to correspond to the S2_RES state in operation937b.

According to various embodiments of the disclosure, after operation937b, if the switch node voltage Vx2is equal to the output voltage Vo(or the output reference voltage Vo_REF) (e.g., if the second switch node voltage Vx2decreases to such an extent that the difference between the second switch node voltage Vx2and the output voltage Vo(or the output reference voltage Vo_REF)) is within a designated error range) (e.g., “Yes” in operation939b), the DC/DC converter800may perform operation941bofFIG.9H. For example, referring toFIG.10, the time point t6at which the second switch node voltage Vx2becomes equal to the output voltage Vo(or the output reference voltage Vo_REF) may be the same as the time point at which the second inductor current IL2has the maximum value (e.g., the maximum point of the second inductor current IL2). Further, the time point t6may be referred to as the time point at which the slope of the second inductor current IL2is 0.

According to various embodiments of the disclosure, after operation937b, before the second switch node voltage Vx2becomes equal to the output voltage Vo(or the output reference voltage Vo_REF) (e.g., before the second switch node voltage Vx2decreases to such an extent that the difference between the second switch node voltage Vx2and the output voltage Vo(or the output reference voltage Vo_REF) is within a designated error range) (e.g., “No” in operation939b), the DC/DC converter800may, with regard to the 2ndrail, maintain the on/off state of the multiple second switches109to correspond to the S2_RES state.

Referring toFIG.9H, according to various embodiments of the disclosure, the DC/DC converter800may start the operation of the Pt rail in operation941b. For example, in operation929b, the DC/DC converter800may start to perform operation929aofFIG.9Cdescribed above.

According to various embodiments of the disclosure, after operation941b, when the second switch node voltage Vx2is greater than a second threshold voltage (e.g., 0 V) (e.g., when the second switch node voltage Vx2is not decreased to the second threshold voltage or less) (e.g., “No” in operation943b), if the second inductor current IL2is equal to or less than the second threshold current (e.g., 0 A) (e.g., “Yes” in operation945b), the DC/DC converter800may increase the fourth threshold current IL2_Bin operation947b.

According to various embodiments of the disclosure, after operation947b, the DC/DC converter800may perform operation955b.

According to various embodiments of the disclosure, after operation941b, when the second switch node voltage Vx2is greater than a second threshold voltage (e.g., 0 V) (e.g., before the second switch node voltage Vx2decreases to the second threshold voltage or less) (e.g., “No” in operation943b), if the second inductor current IL2is greater than the second threshold current (e.g., 0 A) (e.g., “No” in operation947b), the DC/DC converter800may perform operations according to operation943b.

According to various embodiments of the disclosure, after operation941b, when the second switch node voltage Vx2is equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation943b), if the second inductor current IL2is greater than a second threshold current (e.g., 0 A) (e.g., “No” in operation949b) (e.g., if the second switch node voltage Vx2decreases to 0 or less and then the second inductor current IL2decreases to the second threshold current or less), the DC/DC converter800may decrease the fourth threshold current IIL2_Bin operation951b. For example, the DC/DC converter800may decrease the fourth threshold current IIL2_Bin order to shorten the length of period of the S2_LR state. According to an embodiment of the disclosure, when the second switch node voltage Vx2is equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation943b) and the second inductor current IL2is equal to or less than a second threshold current (e.g., 0 A) (e.g., “Yes” in operation949b), if the output voltage Vois decreased less than the first threshold voltage Vo_REF, the DC/DC converter800may increase the fourth threshold current IIL2_B(e.g., operation947b). According to an embodiment of the disclosure, when the second switch node voltage Vois equal to or less than a second threshold voltage (e.g., 0 V) (e.g., “Yes” in operation943b) and the second inductor current IL2is equal to or less than a second threshold current (e.g., 0 A) (e.g., “Yes” in operation949b), if the output voltage Vodoes not decrease below the first threshold voltage Vo_REF, the DC/DC converter800may maintain the fourth threshold current IIL2_B.

According to various embodiments of the disclosure, after operation951b, the DC/DC converter800may control, with regard to the 2ndrail, the on/off state of the multiple second switches109to correspond to the S2_LF state in operation953b.

According to various embodiments of the disclosure, after operation953b, the DC/DC/converter800may determine whether to start an operation with respect to the 2ndrail in operation955b. For example, if the first switch node voltage Vx1described above becomes equal to the output voltage Vo(or the output reference voltage Vo_REF) (e.g., if the first switch node voltage Vx1decreases to such an extent that the difference between the first switch node voltage Vx1and the output voltage Vo(or the output reference voltage Vo_REF) is within a designated error range) (e.g., “Yes” in operation955b), the DC/DC converter800may perform operation901bofFIG.9E, if not, the DC/DC converter may be in standby.

According to various embodiments of the disclosure, a DC/DC converter (e.g., the DC/DC converter100ofFIG.1) may include multiple switches, a capacitor, an inductor, and a controller, wherein the multiple switches include a first switch (e.g., the first switch101aofFIG.1) including one end connected to an input power source (e.g., the input power1ofFIG.1) and configured to connect one end of the capacitor (e.g., the first capacitor103ofFIG.1) to the input power source when the first switch is in on state, a second switch (e.g., the second switch101bofFIG.1) including one end connected to other end of the first switch and configured to connect the one end of the capacitor to one end of the inductor (e.g., the first inductor105ofFIG.1) when the second switch is in on state, a third switch (e.g., the third switch101cofFIG.1) including one end connected to other end of the second switch and configured to connect other end of the capacitor to the one end of the inductor when the third switch is in on state, and a fourth switch (e.g., the fourth switch101dofFIG.1) including one end connected to other end of the third switch and configured to connect the other end of the capacitor to ground when the fourth switch is in on state, wherein the capacitor includes the one end connected to the other end of the first switch and the one end of the second switch, and the other end connected to the other end of the third switch and the one end of the fourth switch, wherein the inductor includes the one end connected to the other end of the second switch and the one end of the third switch, and other end connected to output end of the DC/DC converter, and wherein the controller may be configured to, when output voltage (e.g., Vo) of the DC/DC converter is less than a first threshold voltage (e.g., Vo_REF), based on current (e.g., inductor current IL), which is output from the inductor, being less than a first threshold current (e.g., IL_B), control on/off state of the multiple switches so as to increase the current output from the inductor, and control the second switch and the fourth switch to be on state or control the first switch and the third switch be on state, based on the current, which is output from the inductor, being increased to be greater than or equal to the first threshold current, to allow the one end or the other end of the capacitor to be connected to the one end of the inductor.

According to various embodiments of the disclosure, the controller may be configured to control the first switch and the second switch to be on state based on the current, which is output from the inductor, being less than the first threshold current.

According to various embodiments of the disclosure, the one end of the inductor may be connected to the input power source based on the first switch and the second switch being controlled to be on state.

According to various embodiments of the disclosure, the DC/DC converter may be configured to control the second switch and the fourth switch to be on state or control the first switch and the third switch to be on state, and increase the first threshold current based on the current, which is output from the inductor, being less than or equal to a second threshold current when voltage at the other end of the second switch and at the one end of the third switch is greater than a second threshold voltage.

According to various embodiments of the disclosure, the DC/DC converter may be configured to control the second switch and the fourth switch to be on state or control the first switch and the third switch to be on state, and decrease the first threshold current based on the current, which is output from the inductor, being greater than a second threshold current when voltage at the other end of the second switch and at the one end of the third switch is equal to or less than a second threshold voltage.

According to various embodiments of the disclosure, the controller may be further configured to control the on/off state of the multiple switches so as to decrease a current output from the inductor after decreasing the first threshold current.

According to various embodiments of the disclosure, the controller may be configured to control the third switch and the fourth switch to be on state so as to decrease the current output from the inductor.

According to various embodiments of the disclosure, the one end of the inductor may be connected to the ground based on the third switch and the fourth switch being controlled to be on state.

According to various embodiments of the disclosure, the controller may be configured to maintain on state of the first switch and the second switch for a first period of time based on the current, which is output from the inductor, being less than the first threshold current.

According to various embodiments of the disclosure, the controller may be further configured to control the second switch and the fourth switch to be on state or control the first switch and the third switch to be on state, and maintain on state of the first switch and the second switch for a second period of time longer than the first period of time when the current output from the inductor is less than the first threshold current, based on the current, which is output from the inductor, being less than or equal to second threshold current when voltage at the other end of the second switch and at the one end of the third switch is greater than second threshold voltage.

According to various embodiments of the disclosure, the controller may be configured to control the second switch and the fourth switch to be on state or control the first switch and the third switch to be on state, and maintain the on state of the first switch and the second switch for a third period of time shorter than the first period of time when the current output from the inductor is less than the first threshold current, based on the current, which is output from the inductor, being greater than the second threshold current when the voltage at the other end of the second switch and at one end of the third switch is less than or equal to the second threshold voltage.

According to various embodiments of the disclosure, the capacitor and the inductor may be configured to configure a series resonance circuit when the second switch and the fourth switch are in on state or when the first switch and the third switch are in on state.

According to various embodiments of the disclosure, the controller may be further configured to, when the output voltage of the DC/DC converter is equal to or greater than the first threshold voltage, control the first switch and the fourth switch to be on state or control the second switch and the third switch to be on state.

According to various embodiments of the disclosure, a method for controlling a DC/DC converter may be provided, in which the DC/DC converter includes multiple switches, a capacitor, and an inductor, wherein the method includes, when the output voltage of the DC/DC converter is less than a first threshold voltage, based on the current, which is output from the inductor, being less than a first threshold current, controlling the on/off state of the multiple switches so as to increase the current output from the inductor, and based on the current, which is output from the inductor, being increased to be greater than or equal to the first threshold current, controlling a second switch and a fourth switch included in the multiple switches to be on state or controlling a first switch and a third switch included in the multiple switches to be on state to allow one end or other end of the capacitor to be connected to one end of the inductor, and wherein the multiple switches include the first switch including one end connected to an input power source and configured to connect the one end of the capacitor to the input power source when the first switch is in on state, the second switch including one end connected to other end of the first switch and configured to connect the one end of the capacitor to the one end of an inductor when the second switch is in on state, the third switch including one end connected to other end of the second switch and configured to connect other end of the capacitor to the one end of the inductor when the third switch is in on state, and the fourth switch including one end connected to other end of the third switch and configured to connect the other end of the capacitor to ground when the fourth switch is in on state, wherein the capacitor includes the one end connected to the other end of the first switch and the one end of the second switch, and the other end connected to the other end of the third switch and the one end of the fourth switch, and wherein the inductor includes the one end connected to the other end of the second switch and the one end of the third switch, and other end connected to output end of the DC/DC converter.

According to various embodiments of the disclosure, the controlling of the on/off state of the multiple switches so as to increase the current output from the inductor, based on the current, which is output from the inductor, being less than a first threshold current includes controlling the first switch and the second switch to be on state based on the current, which is output from the inductor, being less than the first threshold current.

According to various embodiments of the disclosure, the controlling of the DC/DC converter may further include controlling the second switch and the fourth switch to be on state or controlling the first switch and the third switch to be on state, and increasing the first threshold current based on the current, which is output from the inductor, being less than or equal to a second threshold current when voltage at the other end of the second switch and at the one end of the third switch is greater than a second threshold voltage.

According to various embodiment of the disclosure, the controlling of the DC/DC converter may further include controlling the second switch and the fourth switch to be on state or controlling the first switch and the third switch to be on state, and decreasing the first threshold current based on the current, which is output from the inductor, being greater than a second threshold current when the voltage at the other end of the second switch and at one end of the third switch is less than or equal to a second threshold voltage.

According to various embodiment of the disclosure, the controlling of the DC/DC converter may further include controlling the on/off state of the multiple switches so as to decrease a current output from the inductor after decreasing the first threshold current.

According to various embodiment of the disclosure, the controlling of the on/off state of the multiple switches so as to decrease the current output from the inductor may include controlling the third switch and the fourth switch to be on state so as to decrease the current output from the inductor.

According to various embodiment of the disclosure, the controlling of the on/off state of the multiple switches so as to increase the current output from the inductor, based on the current, which is output from the inductor, being less than a first threshold current may include maintaining on state of the first switch and the second switch for a first period of time based on the current, which is output from the inductor, being less than the first threshold current.

It should be appreciated that various embodiments of the disclosure and the terms used therein are not intended to limit the technological features set forth herein to particular embodiments and include various changes, equivalents, or alternatives for a corresponding embodiment. With regard to the description of the drawings, similar reference numerals may be used to designate similar or relevant elements. A singular form of a noun corresponding to an item may include one or more of the items, unless the relevant context clearly indicates otherwise. As used herein, each of such phrases as “A or B,” “at least one of A and B,” “at least one of A or B,” “A, B, or C,” “at least one of A, B, and C,” and “at least one of A, B, or C,” may include all possible combinations of the items enumerated together in a corresponding one of the phrases. As used herein, such terms as “a first”, “a second”, “the first”, and “the second” may be used to simply distinguish a corresponding element from another, and does not limit the elements in other aspect (e.g., importance or order). It is to be understood that if an element (e.g., a first element) is referred to, with or without the term “operatively” or “communicatively”, as “coupled with,” “coupled to,” “connected with,” or “connected to” another element (e.g., a second element), it means that the element may be coupled/connected with/to the other element directly (e.g., wiredly), wirelessly, or via a third element.

As used herein, the term “module” may include a unit implemented in hardware, software, or firmware, and may be interchangeably used with other terms, for example, “logic,” “logic block,” “component,” or “circuit”. The “module” may be a minimum unit of a single integrated component adapted to perform one or more functions, or a part thereof. For example, according to an embodiment of the disclosure, the “module” may be implemented in the form of an application-specific integrated circuit (ASIC).

Various embodiments as set forth herein may be implemented as software (e.g., the program140) including one or more instructions that are stored in a storage medium (e.g., the internal memory136or external memory138) that is readable by a machine (e.g., the electronic device101). For example, a processor (e.g., the processor120) of the machine (e.g., the electronic device101) may invoke at least one of the one or more instructions stored in the storage medium, and execute it. This allows the machine to be operated to perform at least one function according to the at least one instruction invoked. The one or more instructions may include a code generated by a complier or a code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Wherein, the term “non-transitory” simply means that the storage medium is a tangible device, and does not include a signal (e.g., an electromagnetic wave), but this term does not differentiate between where data is semi-permanently stored in the storage medium and where the data is temporarily stored in the storage medium.

According to an embodiment of the disclosure, a method according to various embodiments of the disclosure may be included and provided in a computer program product. The computer program product may be traded as a product between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., a compact disc read only memory (CD-ROM)), or be distributed (e.g., downloaded or uploaded) online via an application store (e.g., Play Store™), or between two user devices (e.g., smart phones) directly. If distributed online, at least part of the computer program product may be temporarily generated or at least temporarily stored in the machine-readable storage medium, such as memory of the manufacturer's server, a server of the application store, or a relay server.

According to various embodiments of the disclosure, each element (e.g., a module or a program) of the above-described elements may include a single entity or multiple entities, and some of the multiple entities may be separately disposed in another element. According to various embodiments of the disclosure, one or more of the above-described elements may be omitted, or one or more other elements may be added. Alternatively or additionally, a plurality of elements (e.g., modules or programs) may be integrated into a single element. In such a case, according to various embodiments of the disclosure, the integrated element may still perform one or more functions of each of the plurality of elements in the same or similar manner as they are performed by a corresponding one of the plurality of elements before the integration. According to various embodiments of the disclosure, operations performed by the module, the program, or another element may be carried out sequentially, in parallel, repeatedly, or heuristically, or one or more of the operations may be executed in a different order or omitted, or one or more other operations may be added.

While the disclosure has been shown and described with reference to various embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims and their equivalents.