Patent ID: 12199422

DETAILED DESCRIPTION

Reference will now be made to the drawings wherein like reference numerals identify similar structural features or aspects of the subject disclosure. For purposes of explanation and illustration, and not limitation, a partial view of an embodiment of a system in accordance with the disclosure is shown inFIG.1and is designated generally by reference character100. Other embodiments of systems in accordance with the disclosure, or aspects thereof, are provided inFIGS.2-3, as will be described. The systems and methods described herein provide a power distribution circuit with improved performance including more precise trip delay, ease of configurability per given trip current versus trip delay requirements, ease of circuitry layout having only a single supply reference. The existing method will have wider tolerance range of trip time delay due to wide tolerance range of the RC (Resistor*Capacitor) time constant, which is used for the overcurrent trip timing.

As shown inFIGS.1-2, a power distribution circuit100includes a power input102in electrical communication with a power input line104and a return line111. The power distribution circuit100is driven by “PWRPOS28V” which is internally generated DC voltage from an AC input through a conversion unit (AC-DC conversion circuit) or from an aircraft battery supply. The typical operating voltage range of the “PWRPOS28V” is 18V to 32.2 Vdc. A switching circuit106is electrically connected to the power input line104. A shunt resistor119is electrically connected in series between the switching circuit106and power input102. An overcurrent protection circuit108is electrically connected to the power input line104. The overcurrent protection circuit108includes a discrete silicon controlled rectifier (SCR) circuit110, and a pulse qualifier integrated circuit112, e.g. LTC6994-1 available from a variety of electronics manufacturers. The overcurrent protection circuit108provides protection to switching circuit106, or portions thereof, during an overcurrent scenario. The pulse qualifier112is configured and adapted to drive the discrete SCR circuit110. The pulse qualifier112includes an output125in electrical communication with the discrete SCR circuit110. The pulse qualifier112is configured and adapted to be an edge or level triggered pulse qualifier112with a time delay. In an “overcurrent detected” scenario, the pulse qualifier112is used to configure the desired trip time in an accurate and simple manner.

With continued reference toFIGS.1and2, the pulse qualifier112, and any other components of power distribution circuit100, are electrically connected to the power input line104to receive power therefrom (PWRPOS28V). The pulse qualifier112includes a ground return120to a floating ground122(FLOATING_RTN or FLTGND) which allows for a simple printed wiring board layout. Due to the pulse qualifier112, the selection of a base-emitter resistor (Rbe) is easier than traditional power distribution circuits and is independent of type of comparator used and its parameters such as bias current and off set voltages. Using the pulse qualifier112to trigger the discrete SCR circuit110, instead of using the comparator output118, which is done in the embodiment described in U.S. Pat. No. 8,218,281, allows resistors in the discrete SCR circuit110to be lower value reducing the risk of nuisance trips due to leakage current effects. The overcurrent protection circuit108includes a comparator circuit116. Overcurrent protection circuit108includes a zener diode138used to provide the controlled and regulated supply voltage to comparator circuit116and pulse qualifier112with reference to floating ground122. Zener diode138takes input from power input102only.

An output114of the comparator circuit116is in electrical communication with an input118of the pulse qualifier112. When an overcurrent condition is detected by the comparator circuit116, the comparator output114changes state and triggers the input of the pulse qualifier112to begin timing. If the overcurrent condition stays active, after the pulse qualifier's112delay time is reached, the pulse qualifier output125changes state and triggers the discrete SCR110. The discrete SCR circuit110can then be ensured to trip only if a valid over current condition occurs and any transient glitches will be ignored.

With continued reference toFIGS.1and2, the switching circuit106includes a semi-conductor switch126between the power input102and a load voltage output128(Vout). The switching circuit106includes a voltage command circuit130electrically connected to the semi-conductor switch126along a semi-conductor control signal line132to provide a command voltage, e.g. a voltage command (VCMD) signal thereto. The switching circuit106includes a voltage clamp circuit136, which includes C1, R1, and D1, connected in between power input102and a gate142of semi-conductor switch126. Voltage clamp circuit136and the voltage command circuit130are used to control the gate142of semi-conductor switch126to turn it ON or OFF and to protect the gate of the semi-conductor switch126from over voltage conditions. The voltage command circuit130senses the VCMD signal to control the contactor drive circuit, e.g. the “LOAD,” ON/OFF via switch126during non-overcurrent scenarios. The VCMD signal can be (+5V) or (+3.3V) based on a generator control unit (GCU), not shown, internal circuits design. The power distribution circuit100includes a current limit circuit124electrically connected to the power input line104. The current limit circuit124includes a voltage clamp output134in electrical communication with the semi-conductor control signal line132to control and limit current through the semi-conductor switch126. For overcurrent conditions, if switch106is ON and the output114of the comparator circuit116indicates that the current exceeds a preset threshold for the pulse qualifier124time delay, the pulse qualifier124then outputs an overcurrent detected signal from output125to an input137of the discrete SCR circuit110. The SCR circuit110then is triggered to provide a clamping voltage on the semi-conductor control signal line132with a latch voltage135, to cause the semi-conductor switch106to be turned OFF. A resistor140is positioned between the output114of the comparator circuit116and the power input line104. Resistor140is used to pull up the comparator output when the output114is in the open collector state.

A method for controlling a power distribution circuit, e.g. power distribution circuit100, includes detecting an ON status of at least a switching circuit, e.g. the switching circuit106, the switching circuit including a semi-conductor switch, e.g. semi-conductor switch126, and a voltage command circuit, e.g. voltage command circuit130(VCMD). A semi-conductor control signal line, e.g. semi-conductor control signal line132, connects the semi-conductor switch and the voltage command circuit. The method includes detecting an overcurrent status of the switching circuit with an overcurrent detection circuit, e.g. an overcurrent detection circuit108. Detecting the overcurrent status include detecting a current on a power input line, e.g. a power input line104, with a comparator, e.g. comparator116, and generating a comparator output based on a comparison between the current on the power input line and a preset threshold.

The overcurrent detection circuit includes a discrete silicon controlled rectifier (SCR) circuit, e.g. discrete SCR circuit110, and a pulse qualifier, e.g. a pulse qualifier112, configured and adapted to drive the discrete SCR circuit. The comparator output, e.g. provided at output114, is provided to the pulse qualifier to ensure to trip only if there is a valid over current condition occurs and any transient glitches will be ignored. When the comparator detects a current that exceeds a preset threshold by monitoring the voltage across a shunt resistor, e.g. shunt resistor119, the method includes outputting an overcurrent detected signal to the discrete SCR circuit and clamping voltage on the semi-conductor control signal line with a latch voltage output, e.g. latch voltage135, to cause the semi-conductor switch to be turned OFF.

As shown inFIG.3, in accordance with some embodiments, a slow-trip and a fast-trip can be provided to a discrete SCR circuit110. In the embodiment ofFIG.3, a power distribution circuit100is the same as circuit100as shown inFIG.2except that an additional comparator circuit216and pulse qualifier circuit212are provided. Comparator216and pulse qualifier212are the same as comparator circuit116and pulse qualifier112, respectively, except that comparator216and pulse qualifier212can be configured to provide a slow-trip signal to discrete SCR circuit110, with comparator circuit116and pulse qualifier112configured to provide a fast-trip signal to discrete SCR circuit110.

The proposed systems and methods for overcurrent protection are universal and can be used for a variety of contactor drive circuits, or other loads, across multiple programs. The methods and systems of the present disclosure, as described above and shown in the drawings, provide for reduced nuisance trips, e.g. those due to leakage current from the semiconductor switch, more precise trip delay, ease of configurability per given trip current versus trip delay requirements, and ease of circuitry layout having only a single supply reference. While the apparatus and methods of the subject disclosure have been shown and described with reference to preferred embodiments, those skilled in the art will readily appreciate that changes and/or modifications may be made thereto without departing from the scope of the subject disclosure.