Patent ID: 12256582

DETAILED DESCRIPTION

In order to make the objects, the technical solutions and the advantages of the present disclosure more apparent, the present disclosure will be described hereinafter in a clear and complete manner in conjunction with the drawings and embodiments. Obviously, the following embodiments merely relate to a part of, rather than all of, the embodiments of the present disclosure, and based on these embodiments, a person skilled in the art may, without any creative effort, obtain the other embodiments, which also fall within the scope of the present disclosure.

During the manufacture of a display device, an aging test needs to be performed on the display device to eliminate bright spots and light leakage caused by a leakage current of a positive channel Metal Oxide Semiconductor (PMOS), and a large current is used to quickly stabilize a service life of Red/Green/Blue (R/G/B) materials to eliminate ghosts and other adverse effects. During the aging test, it is necessary to make a compromise between an aging test effect and an applied current/voltage. If the current/voltage is too large, a risk of burning may occur for a region where a power source line is narrowed, and if the current/voltage is too small, the weak bright spots may not be eliminated completely or the ghost may still exist, i.e., a display effect may be adversely affected.

FIG.1shows a VSS line in the related art. As shown inFIG.1, in the design of the VSS power source line in the related art, a cathode surface of the light-emitting element is lapped onto the peripheral VSS power source line to provide power to the light-emitting element. In this design, a current flowing through all the light-emitting elements in the display region is converged at the cathode and then flows to the VSS power source line, and eventually flows back to a Pad region, that is, the current is most concentrated at the VSS power source line in the Pad region (a region indicated by a dotted box inFIG.1), and the entire current of the product is collected at this position. Furthermore, during the aging test, a current which is twice to three times of a current for normal display needs to be applied to the display device, so that the current in the current concentration region of the VSS power source line will be twice or three times of the current for the normal display. At this time, a huge quantity of heat is generated, and the risk of burning in the current concentration region during the aging test is extremely high. A risk level is linearly positively correlated with a display size of the display device and the power consumption of the product, so a yield of the product may be adversely affected. However, if a smaller current is applied during the aging test to avoid the burning, some weak bright spots may not be eliminated completely or the ghost may occur, i.e., the display effect may be adversely affected.

As shown inFIG.2a, the present disclosure provides in some embodiments a display panel. The display panel includes a base substrate20, which includes a display region21, a wiring region22surrounding the display region21and a bonding region23, and the bonding region23is located at a side of the display region21.

In the embodiments of the present disclosure, as shown inFIG.2a, the wiring region22is of a door shape and surrounds the display region21. In the embodiments of the present disclosure, the bonding region23is located at a notch of the door-shape wiring region22.

In the embodiments of the present disclosure, a light-emitting element for emitting light is arranged in the display region21, and a driving integrated circuit is arranged in the bonding region23. A first line24and at least one second line25are arranged in the door-shape wiring region22, the first line24and the second line25are both of a door shape, and the first line24is coupled to a cathode of the light-emitting element. A current supplied to the light-emitting element flows into an anode of the light-emitting element, through a light-emitting material layer and to the cathode of the light-emitting element, and is finally converged at the first line24. Two ends of the second line25are coupled to the first line24in the bonding region23, and the first line24and the second line25are coupled through at least two via holes26at an opposite side of the bonding region23.

In other words, the first line24is coupled in parallel to the second line25, and two ends of the second line25are coupled to the first line24at a corner of the bonding region23close to the display region. In addition, the first line24and the second line25are coupled through at least two via holes26at the opposite side of the bonding region23(a side away from the bonding region23, i.e., a side opposite to a side where the bonding regions located), so as to enable the current flowing from the cathode of the light-emitting element to the first line24to flow through the second line25to the bonding region through the via holes26, thereby to achieve a shunting effect on the current. In this way, it is able to reduce the current flowing through the first line24and reduce the risk of burning at the corner in the aging test, thereby to make a compromise between the product yield and the aging test effect.

In the embodiments of the present disclosure, as shown inFIG.2b, the display panel further includes two first PINs27in the bonding region23. The two first PINs27are coupled to the two ends of the second line respectively during the aging test, and a voltage applied through the two first PINs27is the same as a voltage applied to the first line.

In the embodiments of the present disclosure, the display panel further includes two second PINs28arranged in the bonding region and configured to apply a voltage to the first line during the aging test.

In the embodiments of the present disclosure, during the aging test, a voltage is applied to the first line24through the two second PINs28, and a same voltage as the voltage to the first line24is applied to the second line25through the two first PINs27. In this regard, during the aging test, as compared with the related art where a current which is twice or three times of a current for normal display is applied to the first line, for the display panel in the embodiments of the present disclosure, the current flows back to the bonding region23through the first line24and the second line25to achieve the shunting effect on the current, so it is able to reduce the current flowing through the first line24and reduce the risk of burning at the corner in the aging test, thereby to make a compromise between the product yield and the aging test effect.

In the embodiments of the present disclosure, a driving integrated circuit is further arranged in the bonding region. When an image is displayed by the display panel, the first line is coupled to the driving integrated circuit to provide a current required for display.

FIG.3shows the connection between the second line and the first line in the wiring region at the opposite side of the bonding region according to the embodiments of the present disclosure.

As shown inFIG.3, the first line24and the second line25are coupled through at least two via holes26in a part of the wiring region22at the opposite side of the bonding region23.

To be specific, the base substrate20includes a substrate201and a buffer layer202arranged on the substrate201, the first line24is arranged on the base substrate20in a part of the wiring region22at the opposite side of the bonding region23, an interlayer insulation layer203and a transfer pattern204are arranged on the first line24, and a pixel definition layer206, a spacer layer207, a first packaging layer208, and a second packaging layer209are laminated one on another on the transfer pattern204. As shown inFIG.3, a part of an upper surface of the first line24is covered by the first packaging layer208on the first line24, and a part of the surface of the first line at the side away from the display region is not covered by the first packaging layer208.

In the manufacturing process, the first line24is formed on the base substrate, and the first packaging layer208is formed at a side of the first line24away from the base substrate. At this time, the first packaging layer208completely covers the first line24, and then the first packaging layer208is patterned through a patterning process to form at least two via holes26. A part of the surface of the first line24is exposed through the at least two via holes26, and the second line25is subsequently formed on the surface not covered by the first packaging layer208, so that the first line24is lapped onto the second line25.

The cathode205of the light-emitting element is coupled to the first line24through the transfer pattern204, and the transfer pattern204is made of the same material as the anode of the light-emitting element. A second packaging layer209may further be arranged on the first packaging layer208, and a touch layer211and a grounded line210may also be arranged on the second packaging layer209.

FIG.4shows relative position relationship between the second line and the first line in the other wiring regions except a side where the bonding region is located and the opposite side of the bonding region in the embodiments of the present disclosure. As shown inFIG.4, in the wiring region22except the side where the bonding region is located and the opposite side of the bonding region, the upper surface of the first line24on the base substrate20is completely covered by the first packaging layer208, and the second line25is located on the second packaging layer209and is arranged adjacent to the grounded line210on the second packaging layer209. A safety distance needs to be reserved between the second line25and the grounded line210, and the second line25is arranged on the second packaging layer209to reduce a segment difference.

In the embodiments of the present disclosure, the display panel further includes the touch layer211located on the light-emitting element, and the touch layer211is arranged at a same layer and made of a same material as the second line25.

In other words, the touch layer211and the second line25are arranged on the second package layer209, and the touch layer211may be a touch layer formed by a single-layer metal line or a double-layer metal line. The second line25may be formed in the wiring region simultaneously when a certain layer of metal line of the touch layer211is formed, or may have a same double-layer metal structure as the touch layer. Identically, in the regions at both sides of the wiring region22, the cathode205of the light-emitting element is coupled to the first line24through the transfer pattern204, and the transfer pattern204is made of a same material as the anode of the light-emitting element.

FIG.5shows another relative position relationship between the second line and the first line in the other wiring regions except a side where the bonding region is located and the opposite side of the bonding region in the embodiments of the present disclosure. As shown inFIG.5, different fromFIG.4, the first line24may be arranged at a same layer as the second line25in the wiring region22except the side where the bonding region is located and the opposite side of the bonding region, and the second line25is located at a side of the first line24away from the display region.

To be specific, in the wiring region22except the side where the bonding region is located and the opposite side of the bonding region, the upper surface of the first line24on the base substrate20is completely covered by the first packaging layer208on the first line24, and the second line25is located at a side of the first packaging layer208away from the display region. Through the above-mentioned line design, it is able to facilitate the narrow-bezel design of the display device. After the aging test has been completed, a layered structure including the second line25on both sides of the wiring region22(when the display panel is of a rectangular shape) is cut off, so as to achieve the narrow-bezel design while improving the aging test effect and reducing the risk of burning.

In the embodiments of the present disclosure, the at least two via holes26are spaced apart from each other equally in the wiring region22at the opposite side of the bonding region23, so as to enable the current to flow from the first line24to the second line25dispersedly. As shown inFIG.2, in the embodiments of the present disclosure, five via holes are provided to achieve a better shunting effect.

In the embodiments of the present disclosure, the first line24is a VSS line. The anode of the light-emitting element is coupled to a VDD line, and the cathode of the light-emitting element is coupled to the VSS line, so as to provide power to the light-emitting element, thereby to enable the light-emitting element to emit light.

According to the display panel in the embodiments of the present disclosure, through adding the second line, the current flowing through the first line is shunted to effectively reduce a current concentration degree at the first line in the normal display and the aging test process, and avoid the occurrence of burning at a position where the current is too large, thereby to achieve a better aging test effect through a larger current/voltage.

As shown inFIG.6, the present disclosure provides in some embodiments a method for manufacturing the above-mentioned display panel, which includes: Step61of providing a base substrate, the base substrate including a display region, a wiring region surrounding the display region and a bonding region, and the bonding region being located at a side of the display region; Step62of forming a first line in the wiring region on the base substrate; Step63of forming a light-emitting element in the display region at a side of the first line away from the base substrate, the light-emitting element including a cathode, and the first line being coupled to the cathode of the light-emitting element; and Step64of forming at least one second line in the wiring region, two ends of the second line being coupled to the first line in the bonding region, and the first line and the second line being coupled through at least two via holes at an opposite side of the bonding region.

According to the embodiments of the present disclosure, through adding the second line, the current flowing through the first line is shunted to effectively reduce a current concentration degree at the first line in the normal display and the aging test process, and avoid the occurrence of burning at a position where the current is too large, thereby to achieve a better aging test effect through a larger current/voltage.

In the embodiments of the present disclosure, the forming the at least one second line in the wiring region includes forming a touch layer and the second line simultaneously with a same mask through a single patterning process.

In other words, the display panel manufactured in the embodiments of the present disclosure may also be a touch display panel with a touch function. When the touch layer is formed on the light-emitting element in the display region, the second line in the wiring region may be formed simultaneously, i.e., the touch layer and the second line are formed through a single patterning process. In the case that the touch layer includes at least one layer of the metal line, a certain layer of the metal line in the touch layer is arranged at a same layer and made of a same material as the second line.

In the embodiments of the present disclosure, the at least two via holes are spaced apart from each other equally in the wiring region at the opposite side of the bonding region, so as to enable the current to flow from the first line to the second line dispersedly, thereby to avoid the excessive concentration of the current.

In the embodiments of the present disclosure, subsequent to forming the first line in the wiring region on the base substrate, the method further includes forming a packaging layer at a side of the first line away from the base substrate. Prior to forming the at least one second line in the wiring region, the method further includes forming at least two via holes in the wiring region at the opposite side of the bonding region through a patterning process and forming a part of the first line not covered by the packaging layer. The forming the at least one second line in the wiring region includes forming the second line on the part of the first line not covered by the packaging layer.

Through forming the second line on the part of the first line not covered by the packaging layer, it is able for the first line to be lapped onto the second line.

In the embodiments of the present disclosure, the method further includes, after an aging test has been completed on the display panel, cutting off a layered structure including the second line of the display panel beyond a side where the bonding region is located and the opposite side of the bonding region to form a narrow-bezel display panel.

According to the manufacturing method in the embodiments of the present disclosure, through adding the second line, the current flowing through the first line is shunted to effectively reduce a current concentration degree at the first line in the normal display and the aging test process, and avoid the occurrence of burning at a position where the current is too large, thereby to achieve a better aging test effect through a larger current/voltage.

The present disclosure further provides in some embodiments a display device, which includes the above-mentioned display panel. According to the display panel in the embodiments of the present disclosure, through adding the second line, the current flowing through the first line is shunted to effectively reduce a current concentration degree at the first line in the normal display and the aging test process, and avoid the occurrence of burning at a position where the current is too large, thereby to achieve a better aging test effect through a larger current/voltage. The display device in the embodiments of the present disclosure also has the above-mentioned beneficial effect, which will not be particularly defined herein.

The above embodiments are for illustrative purposes only, but the present disclosure is not limited thereto. Obviously, a person skilled in the art may make further modifications and improvements without departing from the spirit of the present disclosure, and these modifications and improvements shall also fall within the scope of the present disclosure.