Patent ID: 12235321

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

FIG.1shows an exemplary embodiment of a circuit diagram of a monitoring device60according to the present invention in conjunction with a power semiconductor module80to be monitored, power semiconductor module80including four parallel-connected high-side power semiconductor switches10′,10″,10′″,10″″ (also designated hereinafter in short by reference numeral “10”) each having corresponding gate drivers70′,70″,70′″,70″″ (also designated hereinafter in short by reference numeral “70”), gate drivers70being electrically connected to an evaluation unit50, designed here as a microcontroller, of monitoring device60. Power semiconductor switches10are each designed here as SiC-MOSFETs and power semiconductor module80is arranged by way of example here in an inverter, which is provided for a drivetrain of a vehicle.

In addition, power semiconductor module80to be monitored includes four parallel-connected low-side power semiconductor switches, which are not provided with reference numerals here for reasons of clearer representation. Gate drivers corresponding to the low-side power semiconductor switches are also not provided with reference numerals, moreover, their electrical connection, which is carried out similarly to the connection of the high side, is also not shown.

Evaluation unit50is additionally electrically connected to a variable current source30, so that evaluation unit50is configured to set different output currents for variable current source30with the aid of an activation of variable current source30.

Monitoring device60is electrically connected to power semiconductor module80to be monitored via an interface90, which is formed by electrical contacts of monitoring device60and power semiconductor module80.

With the aid of a first voltage sensor40, evaluation unit50is configured to detect a voltage across the load paths of high-side power semiconductor switches10, while it is configured with the aid of a second voltage sensor45to detect a voltage across the load paths of the low-side power semiconductor switches.

Evaluation unit50is configured on the basis of the preceding configuration and on the basis of a computer program executable by evaluation unit50to carry out the above-described method according to the present invention.

FIG.2shows exemplary current profiles I10′, I10″, I10′″, I10″″ in a plurality of parallel-connected semiconductor switches10′,10″,10′″,10″″ and a total current profile IG via all parallel-connected semiconductor switches10′,10″,10′″,10″″. Current profiles I10′, I10″, I10′″, I10″″ correspond, for example, to high-side power semiconductor switches10shown inFIG.1.

I10′ represents here the current profile through semiconductor switch10′ presently to be monitored according to the method according to the present invention. First period of time T1is apparent fromFIG.2, in which only semiconductor switch10′ presently to be monitored from the plurality of semiconductor switches10is switched on and is subjected to a first load current I1. At the end of first period of time T1, a first voltage drop across the parallel-connected load paths of the plurality of semiconductor switches10is detected. The point in time of the detection is identified by the left of the two arrows in current profile I10′.

At the beginning of a second period of time T2immediately following first period of time T1, all semiconductor switches10′,10″,10′″,10″″ are now switched on and jointly subjected to a second load current I2, which is essentially four times as high as first load current I1.

At the beginning of a third period of time T3immediately following second period of time T2, all semiconductor switches10″,10′″,10″″ not presently to be monitored are now switched off, while semiconductor switch10′ to be monitored is again subjected to first load current I1. At the end of third period of time T3, a second voltage drop is detected, the detection point in time being identified by the right of the two arrows in current profile I10′.

On the basis of the detected voltage drops and particular load currents I1, I2, according to the method according to the present invention, a deviation from an expected temperature behavior of semiconductor switch10′ to be monitored is ascertained.

In a subsequent pass of the method according to the present invention, semiconductor switch10″ is defined as the semiconductor switch presently to be monitored and in further subsequent passes accordingly semiconductor switches10′″,10″″.

This sequence for the monitoring of particular semiconductor switches10′,10″,10′″,10″″ is subsequently repeated in its entirety until a predefined abort condition is met.

Total current profile IG shown inFIG.2is made up of the individual currents through particular semiconductor switches10′,10″,10′″,10″″. It is to be noted that a vertical scaling in the representation of total current profile IG is not identical for reasons of simplified representation to the vertical scaling of the representation of individual current profiles I10′, I10″, I10′″, I10″″.

A testing method (for example according to AQ324) from the related art is advantageously carried out in parallel to the method according to the present invention. For this purpose, semiconductor switches10′,10″,10′″,10″″ are subjected in periods of time between particular third periods of time T3and periods of time T1immediately following them to a third load current I3, third load current I3approximately corresponding to 100 mA here and third load current I3being a current which flows as the forward current of particular body diodes of semiconductor switches10. On the basis of successive joint voltage measurements over the particular body diodes, a mean temperature rise for all semiconductor switches10′,10″,10′″,10″″ may thus be derived jointly.