Patent ID: 12229407

Throughout the drawings, like reference numerals will be understood to refer to like parts, components, and structures.

DETAILED DESCRIPTION

The following description with reference to the accompanying drawings is provided to assist in a comprehensive understanding of various embodiments of the disclosure as defined by the claims and their equivalents. It includes various specific details to assist in that understanding but these are to be regarded as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the various embodiments described herein can be made without departing from the scope and spirit of the disclosure. In addition, descriptions of well-known functions and constructions may be omitted for clarity and conciseness.

The terms and words used in the following description and claims are not limited to the bibliographical meanings, but, are merely used by the inventor to enable a clear and consistent understanding of the disclosure. Accordingly, it should be apparent to those skilled in the art that the following description of various embodiments of the disclosure is provided for illustration purpose only and not for the purpose of limiting the disclosure as defined by the appended claims and their equivalents.

It is to be understood that the singular forms “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to “a component surface” includes reference to one or more of such surfaces.

FIG.1is a block diagram illustrating an electronic device in a network environment according to an embodiment of the disclosure.

Referring toFIG.1, an electronic device101in a network environment100may communicate with an electronic device102via a first network198(e.g., a short-range wireless communication network), or at least one of an electronic device104or a server108via a second network199(e.g., a long-range wireless communication network). According to an embodiment, the electronic device101may communicate with the electronic device104via the server108. According to an embodiment, the electronic device101may include a processor120, a memory130, an input module150, a sound output module155, a display module160, an audio module170, a sensor module176, an interface177, a connecting terminal178, a haptic module179, a camera module180, a power management module188, a battery189, a communication module190, a subscriber identification module (SIM)196, or an antenna module197. In some embodiments, at least one of the components (e.g., the connecting terminal178) may be omitted from the electronic device101, or one or more other components may be added in the electronic device101. In some embodiments, some of the components (e.g., the sensor module176, the camera module180, or the antenna module197) may be implemented as a single component (e.g., the display module160).

The processor120may execute, for example, software (e.g., a program140) to control at least one other component (e.g., a hardware or software component) of the electronic device101coupled with the processor120, and may perform various data processing or computation. According to one embodiment, as at least part of the data processing or computation, the processor120may store a command or data received from another component (e.g., the sensor module176or the communication module190) in a volatile memory132, process the command or the data stored in the volatile memory132, and store resulting data in a non-volatile memory134. According to an embodiment, the processor120may include a main processor121(e.g., a central processing unit (CPU) or an application processor (AP)), or an auxiliary processor123(e.g., a graphics processing unit (GPU), a neural processing unit (NPU), an image signal processor (ISP), a sensor hub processor, or a communication processor (CP)) that is operable independently from, or in conjunction with, the main processor121. For example, when the electronic device101includes the main processor121and the auxiliary processor123, the auxiliary processor123may be adapted to consume less power than the main processor121, or to be specific to a specified function. The auxiliary processor123may be implemented as separate from, or as part of the main processor121.

The auxiliary processor123may control at least some of functions or states related to at least one component (e.g., the display module160, the sensor module176, or the communication module190) among the components of the electronic device101, instead of the main processor121while the main processor121is in an inactive (e.g., sleep) state, or together with the main processor121while the main processor121is in an active state (e.g., executing an application). According to an embodiment, the auxiliary processor123(e.g., an image signal processor or a communication processor) may be implemented as part of another component (e.g., the camera module180or the communication module190) functionally related to the auxiliary processor123. According to an embodiment, the auxiliary processor123(e.g., the neural processing unit) may include a hardware structure specified for artificial intelligence model processing. An artificial intelligence model may be generated by machine learning. Such learning may be performed, e.g., by the electronic device101where the artificial intelligence is performed or via a separate server (e.g., the server108). Learning algorithms may include, but are not limited to, e.g., supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning. The artificial intelligence model may include a plurality of artificial neural network layers. The artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), deep Q-network or a combination of two or more thereof but is not limited thereto. The artificial intelligence model may, additionally or alternatively, include a software structure other than the hardware structure.

The memory130may store various data used by at least one component (e.g., the processor120or the sensor module176) of the electronic device101. The various data may include, for example, software (e.g., the program140) and input data or output data for a command related thereto. The memory130may include the volatile memory132or the non-volatile memory134.

The program140may be stored in the memory130as software, and may include, for example, an operating system (OS)142, middleware144, or an application146.

The input module150may receive a command or data to be used by another component (e.g., the processor120) of the electronic device101, from the outside (e.g., a user) of the electronic device101. The input module150may include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

The sound output module155may output sound signals to the outside of the electronic device101. The sound output module155may include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as playing multimedia or playing record. The receiver may be used for receiving incoming calls. According to an embodiment, the receiver may be implemented as separate from, or as part of the speaker.

The display module160may visually provide information to the outside (e.g., a user) of the electronic device101. The display module160may include, for example, a display, a hologram device, or a projector and control circuitry to control a corresponding one of the display, hologram device, and projector. According to an embodiment, the display module160may include a touch sensor adapted to detect a touch, or a pressure sensor adapted to measure the intensity of force incurred by the touch.

The audio module170may convert a sound into an electrical signal and vice versa. According to an embodiment, the audio module170may obtain the sound via the input module150, or output the sound via the sound output module155or a headphone of an external electronic device (e.g., the electronic device102) directly (e.g., wiredly) or wirelessly coupled with the electronic device101.

The sensor module176may detect an operational state (e.g., power or temperature) of the electronic device101or an environmental state (e.g., a state of a user) external to the electronic device101, and then generate an electrical signal or data value corresponding to the detected state. According to an embodiment, the sensor module176may include, for example, a gesture sensor, a gyro sensor, an atmospheric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an infrared (IR) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

The interface177may support one or more specified protocols to be used for the electronic device101to be coupled with the external electronic device (e.g., the electronic device102) directly (e.g., wiredly) or wirelessly. According to an embodiment, the interface177may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, a secure digital (SD) card interface, or an audio interface.

The connecting terminal178may include a connector via which the electronic device101may be physically connected with the external electronic device (e.g., the electronic device102). According to an embodiment, the connecting terminal178may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

The haptic module179may convert an electrical signal into a mechanical stimulus (e.g., a vibration or a movement) or electrical stimulus which may be recognized by a user via his tactile sensation or kinesthetic sensation. According to an embodiment, the haptic module179may include, for example, a motor, a piezoelectric element, or an electric stimulator.

The camera module180may capture a still image or moving images. According to an embodiment, the camera module180may include one or more lenses, image sensors, image signal processors, or flashes.

The power management module188may manage power supplied to the electronic device101. According to one embodiment, the power management module188may be implemented as at least part of, for example, a power management integrated circuit (PMIC).

The battery189may supply power to at least one component of the electronic device101. According to an embodiment, the battery189may include, for example, a primary cell which is not rechargeable, a secondary cell which is rechargeable, or a fuel cell.

The communication module190may support establishing a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device101and the external electronic device (e.g., the electronic device102, the electronic device104, or the server108) and performing communication via the established communication channel. The communication module190may include one or more communication processors that are operable independently from the processor120(e.g., the application processor (AP)) and supports a direct (e.g., wired) communication or a wireless communication. According to an embodiment, the communication module190may include a wireless communication module192(e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module194(e.g., a local area network (LAN) communication module or a power line communication (PLC) module). A corresponding one of these communication modules may communicate with the external electronic device via the first network198(e.g., a short-range communication network, such as Bluetooth™, wireless-fidelity (Wi-Fi) direct, or infrared data association (IrDA)) or the second network199(e.g., a long-range communication network, such as a legacy cellular network, a fifth generation (5G) network, a next-generation communication network, the Internet, or a computer network (e.g., LAN or wide area network (WAN)). These various types of communication modules may be implemented as a single component (e.g., a single chip), or may be implemented as multi components (e.g., multi chips) separate from each other. The wireless communication module192may identify and authenticate the electronic device101in a communication network, such as the first network198or the second network199, using subscriber information (e.g., international mobile subscriber identity (IMSI)) stored in the subscriber identification module196.

The wireless communication module192may support a 5G network, after a fourth generation (4G) network, and next-generation communication technology, e.g., new radio (NR) access technology. The NR access technology may support enhanced mobile broadband (eMBB), massive machine type communications (mMTC), or ultra-reliable and low-latency communications (URLLC). The wireless communication module192may support a high-frequency band (e.g., the millimeter wave (mmWave) band) to achieve, e.g., a high data transmission rate. The wireless communication module192may support various technologies for securing performance on a high-frequency band, such as, e.g., beamforming, massive multiple-input and multiple-output (massive MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module192may support various requirements specified in the electronic device101, an external electronic device (e.g., the electronic device104), or a network system (e.g., the second network199). According to an embodiment, the wireless communication module192may support a peak data rate (e.g., 20 gigabits per second (Gbps) or more) for implementing eMBB, loss coverage (e.g., 164 decibels (dB) or less) for implementing mMTC, or U-plane latency (e.g., 0.5 milliseconds (ms) or less for each of downlink (DL) and uplink (UL), or a round trip of 1 ms or less) for implementing URLLC.

The antenna module197may transmit or receive a signal or power to or from the outside (e.g., the external electronic device) of the electronic device101. According to an embodiment, the antenna module197may include an antenna including a radiating element composed of a conductive material or a conductive pattern formed in or on a substrate (e.g., a printed circuit board (PCB)). According to an embodiment, the antenna module197may include a plurality of antennas (e.g., array antennas). In such a case, at least one antenna appropriate for a communication scheme used in the communication network, such as the first network198or the second network199, may be selected, for example, by the communication module190(e.g., the wireless communication module192) from the plurality of antennas. The signal or the power may then be transmitted or received between the communication module190and the external electronic device via the selected at least one antenna. According to an embodiment, another component (e.g., a radio frequency integrated circuit (RFIC)) other than the radiating element may be additionally formed as part of the antenna module197.

According to various embodiments, the antenna module197may form an mmWave antenna module. According to an embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on a first surface (e.g., the bottom surface) of the printed circuit board, or adjacent to the first surface and capable of supporting a designated high-frequency band (e.g., the mmWave band), and a plurality of antennas (e.g., array antennas) disposed on a second surface (e.g., the top or a side surface) of the printed circuit board, or adjacent to the second surface and capable of transmitting or receiving signals of the designated high-frequency band.

At least some of the above-described components may be coupled mutually and communicate signals (e.g., commands or data) therebetween via an inter-peripheral communication scheme (e.g., a bus, general purpose input and output (GPIO), serial peripheral interface (SPI), or mobile industry processor interface (MIPI)).

According to an embodiment, commands or data may be transmitted or received between the electronic device101and the external electronic device104via the server108coupled with the second network199. Each of the electronic devices102or104may be a device of a same type as, or a different type, from the electronic device101. According to an embodiment, all or some of operations to be executed at the electronic device101may be executed at one or more of the external electronic devices (e.g., the electronic devices102and104or the server108). For example, if the electronic device101should perform a function or a service automatically, or in response to a request from a user or another device, the electronic device101, instead of, or in addition to, executing the function or the service, may request the one or more external electronic devices to perform at least part of the function or the service. The one or more external electronic devices receiving the request may perform the at least part of the function or the service requested, or an additional function or an additional service related to the request, and transfer an outcome of the performing to the electronic device101. The electronic device101may provide the outcome, with or without further processing of the outcome, as at least part of a reply to the request. To that end, a cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used, for example. The electronic device101may provide ultra low-latency services using, e.g., distributed computing or mobile edge computing. In another embodiment, the external electronic device104may include an internet-of-things (IoT) device. The server108may be an intelligent server using machine learning and/or a neural network. According to an embodiment, the external electronic device104or the server108may be included in the second network199. The electronic device101may be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology or IoT-related technology.

FIG.2is a diagram illustrating a method of moving compressed data between heterogeneous memories of an electronic device, according to an embodiment of the disclosure.

Referring toFIG.2, an electronic device101may include a processor120and a memory130. The memory130may include the volatile memory132and the non-volatile memory134. The processor120may control the memory130by executing a program (e.g., the program140). For example, a memory manager (e.g., a zram module) (not shown) of an operating system (e.g., the operating system142or kernel) may control the memory130through the processor120. The memory manager may be implemented through software, hardware, or a combination thereof. Hereinafter, it is described that the processor120manages the memory130, but this may include the meaning that the memory130is managed by the memory manager. The non-volatile memory134may include a plurality of storage slots260.

According to an embodiment, the volatile memory132may store user data210accessed by the program. The user data210may be managed in units of page (e.g., 4 Kilobytes). The processor120(e.g., the memory manager (not shown) of the operating system142) may compress partial data selected from the user data210and may store the compressed partial data as compressed objects230. For example, when the free space of the volatile memory132is reduced to have a specified size (e.g., 10% of the size of the volatile memory132) or less, the processor120may select and compress some of the user data210. Alternatively, the processor120may select and compress a page, which has no access during a specified period or longer, in the user data210. For example, when first page data211is selected, the processor120may generate a first compressed object231by compressing the first page data211and then may delete the first page data211(e.g., swap out). As such, the volatile memory132may secure free space, of which the size is equal to a size difference between the first page data211and the first compressed object231. The processor120may store the first compressed object231in an empty area220(e.g., Zram) of the volatile memory132. For example, the empty area220may mean a specified area of the volatile memory132or an entire free space of the volatile memory132.

According to an embodiment, the processor120may perform an operation (e.g., Zram writeback) of moving compressed data between heterogeneous memories on the compressed objects230. For example, the processor120may further secure free space of the volatile memory132by moving some of the compressed objects230stored in the empty area220to the non-volatile memory134. The processor120may select at least one idle object232(e.g., the compressed object that is shaded inFIG.2) from among the compressed objects230and may move the selected result to a temporary buffer layer240. The idle object232may be defined as a compressed object, which has no access during a specified period or more, from among the compressed objects230. For example, the processor120may attach an idle flag to all of the compressed objects230at a specified time point. When access to the compressed objects230is present, the processor120may remove an idle flag of the corresponding object. After the specified period elapses from the specified time point, the processor120may select a compressed object having the idle flag as the idle object232. For another example, when the compressed data moving operation between heterogeneous memories is completed, the processor120may attach an idle flag to all the compressed objects230. When performing the next compressed data moving operation between the heterogeneous memories, the processor120may select a compressed object having an idle flag as the idle object232.

According to an embodiment, the temporary buffer layer240may include at least one temporary buffer. For example, the at least one temporary buffer may be classified for each size and may store the idle object232. Alternatively, the processor120may set a storage limit size for the at least one respective temporary buffer. Furthermore, the at least one temporary buffer may be set to have a different size.

According to an embodiment, when a fully filled temporary buffer (e.g., a temporary buffer having free space of which the size is smaller than a specified size) is present from among the at least one temporary buffer, the processor120may register compressed objects, which are stored in the fully filled temporary buffer, in a write list in units of compressed object group. For example, the fully filled temporary buffer may include at least one compressed object group. The size of one compressed object group may correspond to a size (e.g., 4 Kilobytes) of one storage slot of the non-volatile memory134.

According to an embodiment, when the number of compressed object groups registered in the write list is not less than a specified value, the processor120may move the compressed object groups registered in the write list from the volatile memory132to the non-volatile memory134. (Alternatively, it may be stored in the non-volatile memory134and may be deleted in the volatile memory132.) The compressed objects included in the compressed object groups thus registered may be moved into the non-volatile memory134in a compressed state as it is.

According to an embodiment, the processor120may move the compressed object groups thus registered to the non-volatile memory134in units of compression chunk. For example, one compression chunk may include a plurality of compressed object groups. During a write operation, the compressed object groups included in the one compression chunk may be continuously transmitted from the volatile memory132to the non-volatile memory134. The compressed object groups included in the one compression chunk may be stored at a time (or continuously) in adjacent storage slots (e.g., a first storage slot261or a second storage slot262) of the non-volatile memory134. For example, depending on one write operation, the processor120may continuously store a first compressed object group251and a second compressed object group252, which are included in a compression chunk250, in the first storage slot261and the second storage slot262of the non-volatile memory134, respectively. The first compressed object group251may be stored in the first storage slot261as a third compressed object group261a. The second compressed object group252may be stored in the second storage slot262as a fourth compressed object group262a. Afterward, the processor120may delete the first compressed object group251and the second compressed object group252from the volatile memory132.

According to an embodiment, to manage compression chunks and compressed object groups, the processor120may use a plurality of bitmaps. For example, the plurality of bitmaps may have a hierarchical structure. The plurality of bitmaps may include an upper bitmap and a lower bitmap. Bits of the lower bitmap may be mapped one-to-one to the plurality of storage slots260of the non-volatile memory134. As such, one bit of the lower bitmap may correspond to one compressed object group. ‘N’ bits (e.g., ‘N’ is a natural number greater than or equal to 2) of the lower bitmap may be mapped to one bit of the upper bitmap. As such, one bit of the upper bitmap may correspond to one compression chunk.

According to an embodiment, each bit of the upper bitmap or the lower bitmap may be displayed as a free bit (e.g., displayed as “logic 0” in binary) or a used bit (e.g., displayed as “logic 1” in binary). For example, a bit of the lower bitmap mapped to a storage slot (e.g., the first storage slot261or the second storage slot262) of the non-volatile memory134in which a compressed object group is stored may be displayed as a used bit. A bit of the lower bitmap mapped to a storage slot (e.g., a third storage slot263) of the non-volatile memory134in which a compressed object group is not stored may be displayed as a free bit. A bit of the upper bitmap mapped to at least one used bit of the lower bitmap may be displayed as a used bit. When all bits of the lower bitmap mapped to a specific bit of the upper bitmap are free bits, the specific bit of the upper bitmap may be expressed as a free bit.

According to an embodiment, firstly, the processor120may search for free bits in the upper bitmap and then may move compressed objects to the non-volatile memory134in units of compression chunk. Secondly, when a free bit is not found in the upper bitmap, the processor120may search for a free bit in the lower bitmap and may move compressed objects to the non-volatile memory134in units of compressed object group.

As described above, the processor120may secure free space of the volatile memory132by compressing some of the user data210. Furthermore, the processor120may further secure free space of the volatile memory132by moving some of the compressed objects230to the non-volatile memory134. Besides, the processor120may efficiently secure free space of the volatile memory132by moving compressed objects to be moved to the non-volatile memory134in a compressed state. In addition, the processor120may perform write operations of compressed objects for each unit (e.g., in units of compression chunk) larger than one storage slot of the non-volatile memory134, thereby improving the write performance of the non-volatile memory134during a write operation.

FIG.3is a diagram showing a bitmap used in the compressed data moving method ofFIG.2according to an embodiment of the disclosure.

Referring toFIGS.2and3, to manage a compression chunk and a compressed object group, a processor120may use a plurality of bitmaps. For example, the plurality of bitmaps may have a hierarchical structure. For example, the plurality of bitmaps may include an upper bitmap (e.g., a first bitmap310) and a lower bitmap (e.g., a second bitmap320). When the lower bitmap is the lowest bitmap, one bit of the lower bitmap may be mapped to one storage slot of the non-volatile memory134.

According to an embodiment, the plurality of bitmaps may include a plurality of hierarchical structures. For example, although not shown inFIG.3, an intermediate bitmap may be added between the first bitmap310and the second bitmap320, and an additional upper bitmap may be added above the first bitmap310. The processor120may perform a write operation at a time (or continuously) on storage slots (e.g., one compression chunk) of the non-volatile memory134mapped to one bit of the uppermost bitmap. However, for convenience of description, it is assumed that an upper bitmap (or the first bitmap310) is the uppermost bitmap, and it is assumed that a lower bitmap (or the second bitmap320) is the lowest bitmap.

According to an embodiment, bits of the lower bitmap (e.g., the second bitmap320) may be mapped one-to-one to storage slots of the non-volatile memory134. As such, one bit of the second bitmap320may correspond to one compressed object group.

According to an embodiment, a plurality of bits of the lower bitmap may be mapped to one bit of the upper bitmap. As such, one bit of the upper bitmap may correspond to one compression chunk. For example, ‘N’ bits (e.g., ‘N’ is a natural number greater than or equal to 2) of the lower bitmap may be mapped to one bit of the upper bitmap (e.g., the first bitmap310). For example, inFIG.3, four bits of the second bitmap320may be mapped to one bit of the first bitmap310. However, this is only an example. For example, ‘N’ bits (e.g., ‘N’ is a natural number greater than or equal to 2) of the lower bitmap may be mapped to one bit of the upper bitmap.

According to an embodiment, each bit of the plurality of bitmaps may be displayed as a free bit (e.g., displayed as “logic 0” in binary) or a used bit (e.g., displayed as “logic 1” in binary). For example, each bit of the lower bitmap may indicate a use state of the mapped storage slot of the non-volatile memory134. When the storage slot of the non-volatile memory134is empty, the processor120may indicate a corresponding bit of the lower bitmap as a free bit (or logic 0). When a compressed object is stored in a storage slot of the non-volatile memory134, the processor120may indicate a corresponding bit of the lower bitmap as a used bit (or logic 1). Moreover, a bit of the upper bitmap mapped to at least one used bit of the lower bitmap may be indicated as a used bit. For example, inFIG.3, because bit8and bit10of the second bitmap320are displayed as used bits, bit2of the first bitmap310may be displayed as a used bit. When all bits of the lower bitmap mapped to a specific bit of the upper bitmap are free bits, the specific bit of the upper bitmap may be expressed as a free bit. For example, inFIG.3, because bit0, bit1, bit2, and bit3of the second bitmap320are displayed as free bits, bit0of the first bitmap310may be indicated as a free bit.

FIG.4is a diagram illustrating an example of a temporary buffer layer set in a volatile memory in the compressed data moving method ofFIG.2according to an embodiment of the disclosure.

Referring toFIGS.2and4, a temporary buffer layer240may include at least one temporary buffer. For example, the processor120may set the at least one temporary buffer to have various sizes. For example, the processor120may set a first buffer241and a second buffer242to have a first buffer size BS1(e.g., 4 Kilobytes). The processor120may set a third buffer243to have a second buffer size BS2(e.g., 8 Kilobytes). The processor120may set the second buffer size BS2to a multiple of the first buffer size BS1.

According to an embodiment, compressed objects (e.g., the idle object232) thus selected may be classified for each size and then may be moved to each temporary buffer. Alternatively, the processor120may set a storage limit size for the at least one respective temporary buffer. For example, the processor120may move compressed objects, each of which has a first compression size (e.g., 32 Bytes) or less, to the first buffer241. The processor120may move compressed objects, each of which has a size that is greater than the first compression size and is not greater than the second compression size (e.g., 818 Bytes), to the second buffer242. The processor120may move compressed objects, each of which has a size that is greater than the second compression size and is not greater than the third compression size (e.g., 1168 Bytes), to the third buffer243.

According to an embodiment, when a fully filled temporary buffer (e.g., a temporary buffer having free space of which the size is smaller than a specified size) is present from among the at least one temporary buffer, the processor120may register compressed objects, which are stored in the fully filled temporary buffer, in a write list in units of compressed object group. For example, when free space has a size smaller than a specified size (e.g., the storage limit size) in each temporary buffer, the processor120may register a compressed object group, which is stored in a corresponding temporary buffer, in the write list. One temporary buffer may include at least one compressed object group. For example, when the size of free space in the first buffer241is smaller than a first compression size, the processor120may register compressed objects, which are stored in the first buffer241, as one compressed object group in the write list. When the size of free space in the second buffer242is smaller than a second compression size, the processor120may register compressed objects, which are stored in the second buffer242, as one compressed object group in the write list. When the size of free space in the third buffer243is smaller than a third compression size, the processor120may register compressed objects, which are stored in the third buffer243, as two compressed object groups in the write list. The size of one compressed object group may correspond to a size (e.g., 4 Kilobytes) of one storage slot of the non-volatile memory134.

FIG.5is a diagram illustrating an example of a compression header generated when compressed data is moved in the compressed data moving method ofFIG.2according to an embodiment of the disclosure.

Referring toFIGS.2and5, to search for a location of the moved compressed object at a read request of a compressed object moved to a non-volatile memory134, a processor120may attach a compression header510to each compressed object. For example, the compression header510may include a first group index511, a second group index512, an offset513, and a compression size514. The second group index512may indicate a compressed object group that includes the corresponding compressed object. The first group index511may indicate the next compressed object group that includes the compressed object. For example, a fourth compressed object among compressed objects stored in the third buffer243ofFIG.4may be positioned across two compressed object groups. When the fourth compressed object is stored in the non-volatile memory134, the fourth compressed object may be stored in different storage slots. Accordingly, when the first group index511is not present, the processor120may determine that the corresponding compressed object belongs to only one compressed object group. When the first group index511is present, the processor120may determine that the corresponding compressed object belongs to two compressed object groups while being positioned across the two compression object groups. The offset513may indicate a starting point of the corresponding compressed object within the compressed object group. The compression size514may indicate a size of a compressed object.

For example, when the maximum size of one compressed object group is 4 Kilobytes, the compression header510may be generated to have a size of 8 bytes. Because the maximum size of a compressed object group is 4 Kilobytes, each of the offset513and the compression size514may be expressed as having 12 bits. Each of the first group index511and the second group index512may be expressed as having 20 bits. With respect to the non-volatile memory134of up to 4 Gigabytes, the first group index511or the second group index512of 20 bits may indicate a location where a compressed object group is stored.

FIG.6is a flowchart illustrating a method of moving compressed data between heterogeneous memories of an electronic device, according to an embodiment of the disclosure.

Referring toFIGS.2and6, a processor120of an electronic device101may store first compressed objects (e.g., compressed objects230), which are obtained by compressing a part of a user data210stored in a volatile memory132in units of page (e.g., 4 Kilobytes), in an empty area220of a volatile memory132. For example, when free space of the volatile memory132is reduced to have a specified size (e.g., 10% of the size of the volatile memory132), the processor120may generate the compressed objects230by compressing the part of the user data210in units of pages, may store the compressed objects230in the empty area220of the volatile memory132, and may delete original data (e.g., the first page data211). The processor120may perform an operation (e.g., Zram writeback) of moving compressed data between heterogeneous memories on the compressed objects230.

According to an embodiment, in operation605, the processor120may search for a target object among compressed objects. For example, when the compressed data moving command is triggered, the processor120may search for the target object, which satisfies a specified condition (e.g., when there is no access to the corresponding compressed object during a specified time), from among the compressed objects230. The processor120may select the idle object232as the target object. The idle object232may be defined as a compressed object, which has no access during a specified period or more, from among the compressed objects230. The processor120may determine whether an object is the idle object232, from the oldest compressed object. For example, the processor120may attach an idle flag to all of the compressed objects230at a specified time point. When access to the compressed objects230is present, the processor120may remove an idle flag of the corresponding object. After the specified period elapses from the specified time point, the processor120may select a compressed object having the idle flag as the idle object232. For another example, when the compressed data moving operation between heterogeneous memories is completed, the processor120may attach an idle flag to all the compressed objects230. When performing the next compressed data moving operation between the heterogeneous memories, the processor120may select a compressed object having an idle flag as the idle object232.

According to an embodiment, when the target object is not found in operation610, the processor120may terminate the operation of moving compressed data between heterogeneous memories. When finding the target object in operation610, the processor120may perform operation615.

According to an embodiment, in operation615, the processor120may move the target object to the temporary buffer layer240. For example, the processor120may generate the temporary buffer layer240in the empty area220of the volatile memory132. The temporary buffer layer240may include a plurality of temporary buffers. The plurality of temporary buffers may be classified for each size and may store the target object. Alternatively, the processor120may set a storage limit size for each of the plurality of temporary buffers. For example, the processor120may move a target object, of which the size is not greater than a first compression size (e.g., 32 Bytes), to the first buffer241ofFIG.4. The processor120may move a target object, of which the size is greater than the first compression size and is smaller than a second compression size (e.g., 818 Bytes), to the second buffer242ofFIG.4. Furthermore, the plurality of temporary buffers may be set to have different sizes. For example, the processor120may set the first buffer241and the second buffer242ofFIG.4to have the first buffer size BS1. The processor120may set the third buffer243ofFIG.4to have the second buffer size BS2greater than the first buffer size BS1. The first buffer size BS1may be set to correspond to a size (e.g., 4 Kilobytes) of one storage slot (e.g., the first storage slot261) of the non-volatile memory134. The second buffer size BS2may be set to a multiple (e.g., 8 Kilobytes) of the first buffer size BS1.

According to an embodiment, in operation620, the processor120may determine whether there is a fully filled temporary buffer. For example, the processor120may determine a temporary buffer having free space, of which the size is smaller than a specified size (e.g., the storage limit size set for the corresponding temporary buffer), as the fully filled temporary buffer. For example, when the free space, of which the size is smaller than a first compression size, is present in the first buffer241ofFIG.4, the processor120may determine the first buffer241ofFIG.4as the fully filled temporary buffer. When there is no fully filled temporary buffer, the processor120may return to operation605and then may search for the next target object. When the fully filled temporary buffer is present, the processor120may perform operation625.

According to an embodiment, in operation625, the processor120may register a compressed object group included in the fully filled temporary buffer in a write list. For example, the fully filled temporary buffer may include at least one compressed object group. The size of one compressed object group may correspond to a size (e.g., 4 Kilobytes) of one storage slot of the non-volatile memory134. For example, the first buffer241or the second buffer242ofFIG.4, which has the first buffer size BS1, may include one compressed object group. When the second buffer size BS2is twice the first buffer size BS1, the third buffer243ofFIG.4having the second buffer size BS2may include two compressed object groups.

According to an embodiment, in operation630, the processor120may identify the number of compressed object groups registered in the write list. When the number of compressed object groups registered in the write list is less than a specified value, the processor120may return to operation605and then may search for the next target object. When the number of compressed object groups registered in the write list is greater than or equal to the specified value, the processor120may move compressed object groups registered in the write list to the non-volatile memory134through operation635, operation640, operation645, operation650, and operation655.

According to an embodiment, in operation635, the processor120may search for a free bit in a first bitmap (e.g., an upper bitmap). For example, the processor120may manage storage slots of the non-volatile memory134by using a plurality of bitmaps. The plurality of bitmaps may be implemented hierarchically. For example, the plurality of bitmaps may include the first bitmap (e.g., the first bitmap310or the upper bitmap inFIG.3) and a second bitmap (e.g., the second bitmap320or the lower bitmap inFIG.3). One bit of the second bitmap may be mapped to one storage slot of the non-volatile memory134. One bit of the first bitmap may be mapped to a plurality of bits of the second bitmap. Accordingly, one bit of the first bitmap may correspond to a plurality of slots of the non-volatile memory134. In addition, each bit of the first bitmap or the second bitmap may be displayed as a free bit (e.g., displayed by “logic 0” in binary) or used bit (e.g., displayed by “logic 1” in binary). For example, a bit of the second bitmap mapped to a slot in which a compressed object group is stored may be displayed as a used bit. A bit of the second bitmap mapped to a slot in which a compressed object group is not stored may be displayed as a free bit. A bit of the first bitmap mapped to at least one used bit of the second bitmap may be displayed as a used bit. When all the bits of the second bitmap mapped to a specific bit of the first bitmap are free bits, the specific bit of the first bitmap may be expressed as a free bit. When the free bit is found in the first bitmap, the processor120may perform operation640. When the free bit is not found in the first bitmap, the processor120may perform operation645.

According to an embodiment, in operation640, the processor120may perform a write operation of selected compressed object groups in a first write unit (e.g., a compression chunk unit) corresponding to the first bitmap. For example, one bit of the first bitmap (e.g., the first bitmap310inFIG.3) may be mapped to a plurality of slots of the non-volatile memory134. The first write unit may be determined based on the total size of a plurality of slots of the non-volatile memory134mapped to one bit of the first bitmap. For example, referring toFIG.3, the processor120may store four compressed object groups corresponding to one bit of the first bitmap310ofFIG.3in the non-volatile memory134at a time (or continuously). The processor120may delete compressed object groups stored in the non-volatile memory134from the temporary buffer layer240. The processor120may change bits of the first bitmap and the second bitmap mapped to storage slots of the non-volatile memory134, in which compressed object groups are stored, into used bits. Moreover, when a plurality of free bits are found in the first bitmap, the processor120may move compressed object groups, which are registered in the write list having a capacity corresponding to the plurality of free bits, to the non-volatile memory134at a time (or continuously).

According to an embodiment, when a free bit is not found in the first bitmap, in operation645, the processor120may search for a free bit in the second bitmap. When a free bit is not found in the second bitmap, there may be no storage space in the non-volatile memory134, and thus the processor120may terminate the operation of moving compressed data between heterogeneous memories. When a free bit is found in the second bitmap, the processor120may perform operation650.

According to an embodiment, in operation650, the processor120may perform a write operation of selected compressed object group in a second write unit (e.g., a compressed object group unit) corresponding to the second bitmap. For example, the second write unit may be smaller than the first write unit of operation640. The second write unit may be determined based on the size (e.g., 4 Kilobytes) of one storage slot of the non-volatile memory134mapped to one bit of the second bitmap. The processor120may move the oldest compressed object group among the compressed object groups registered in the write list to a storage slot of the non-volatile memory134mapped to the free bit of the second bitmap.

According to an embodiment, in operation655, the processor120may determine whether write operations of all the compressed object groups included in the write list are completed. When the write operations of all the compressed object groups included in the write list are completed, the processor120may return to operation605and then may search for the next target object. When there are remaining compressed object groups to be moved to the non-volatile memory134in the write list, the processor120may repeat operation645, operation650, and operation655until the write operations of all the compressed object groups included in the write list are completed.

As described above, the processor120may secure free space of the volatile memory132by compressing some of the user data210. Furthermore, the processor120may move the compressed objects included in the write list to the non-volatile memory134, thereby further securing the free space of the volatile memory132. Moreover, the processor120may move the compressed objects to the non-volatile memory134in a compressed state, thereby efficiently securing the free space of the volatile memory132. In addition, the processor120may perform write operations of the compressed objects for each unit (e.g., the first write unit or the compression chunk unit) larger than one storage slot of the non-volatile memory134, thereby improving the write performance of the non-volatile memory134during a write operation.

FIG.7is a flowchart illustrating an example of a read operation of an electronic device, according to an embodiment of the disclosure.

Referring toFIGS.2and7, a volatile memory132may store an uncompressed user data210, compressed objects230, which are compressed and stored in an empty area220, in a user data210, and a compressed object group (e.g., first compressed object group251or second compressed object group252), which is moved to and then stored in a temporary buffer layer240, from among compressed objects230. The non-volatile memory134may store a compressed object group (e.g., the third compressed object group261aor the fourth compressed object group262a) stored through a compressed data moving operation (e.g., Zram writeback) between heterogeneous memories.

According to an embodiment, in operation705, the processor120of the electronic device101may receive a read request (e.g., a read request by the program140ofFIG.1) for a compressed object. For example, the read-requested compressed object may be included in the compressed objects230compressed and stored in the empty area220of the volatile memory132, included in a compressed object group moved to the temporary buffer layer240of the volatile memory132, or included in a compressed object group stored in the non-volatile memory134through an operation (e.g., Zram writeback) of moving compressed data between heterogeneous memories.

According to an embodiment, in operation710, the processor120may determine whether the read-requested compressed object is present in the non-volatile memory134. When the read-requested compressed object is present in the non-volatile memory134, the processor120may decompress the read-requested compressed object through operation735, operation740, and operation745. When the read-requested compressed object is not present in the non-volatile memory134(e.g., No of operation710), the processor120may perform operation715.

According to an embodiment, in operation715, the processor120may determine whether the read-requested compressed object is present in the temporary buffer layer240of the volatile memory132. When the read-requested compressed object is not present in the temporary buffer layer240, the processor120may determine that the read-requested compressed object is included in the compressed objects230compressed and stored in the empty area220of the volatile memory132and then may perform operation730. When the read-requested compressed object is present in the temporary buffer layer240(e.g., Yes of operation715), the processor120may perform operation720.

According to an embodiment, in operation720, the processor120may determine whether the read-requested compressed object is present in the write list. When the read-requested compressed object is not present in the write list, the processor120may determine that the read-requested compressed object is stored in the temporary buffer while not registered in the write list, and then may perform operation730. When the read-requested compressed object is present in the write list (e.g., Yes of operation720), the processor120may perform operation725.

According to an embodiment, in operation725, the processor120may unregister the read-requested compressed object from the write list. For example, the read-requested compressed object has been registered in the write list in operation625ofFIG.6, but is not yet moved to the non-volatile memory134. In this case, the processor120may unregister a compressed object group including the read-requested compressed object from the write list. The processor120may move the read-requested compressed object to the empty area220of the volatile memory132, and may keep the remaining compressed objects included in the compressed object group in a temporary buffer as it is.

According to an embodiment, when the read-requested compressed object is not moved to the temporary buffer layer240of the volatile memory132and is present in the empty area220(e.g., No of operation715), in operation730, the processor120may decompress the read-requested compressed object. Alternatively, when the read-requested compressed object has been moved to the temporary buffer layer240but is not registered on the write list (e.g., No of operation720), the processor120may decompress the read-requested compressed object. Alternatively, when the read-requested compressed object is registered in the write list, the processor120may unregister a compressed object group including the read-requested compressed object from the write list (e.g., operation725) and may decompress the read-requested compressed object. For example, the compressed object thus decompressed may be restored to page data (e.g., the first page data211).

According to an embodiment, when the read-requested compressed object is present in the non-volatile memory134(e.g., Yes of operation710), in operation735, the processor120may move a compression chunk including the read-requested compressed object from the non-volatile memory134to the volatile memory132based on the first bitmap (or an upper bitmap). For example, one bit of the first bitmap may be mapped to a plurality of slots of the non-volatile memory134. For example, one bit of the first bitmap may correspond to one compression chunk. The compression chunk including the read-requested compressed object may include a compressed object group including the read-requested compressed object and the other compressed object groups. The processor120may store a compression chunk including the read-requested compressed object in the volatile memory132and may process storage slots of the non-volatile memory134, in each of which the compression chunk is stored, such that the storage slots of the non-volatile memory134are invalid.

According to an embodiment, in operation740, the processor120may decompress the read-requested compressed object. For example, the processor120may search for the read-requested compressed object in a compressed object group including the read-requested compressed object by using the compression header510ofFIG.5. The read-requested compressed object may be included in one compressed object group or may be included in two compressed object groups while being positioned across the two compressed object groups. The compressed object thus decompressed may be restored to page data (e.g., the first page data211).

According to an embodiment, in operation745, the processor120may move the remaining compressed objects to the temporary buffer layer240without decompression. For example, the compression chunk may include a compressed object group including the read-requested compressed object and the other compressed object groups. A compressed object group including the read-requested compressed object may include the read-requested compressed object and first remaining compressed objects. The remaining compressed object groups may include second remaining compressed objects. The processor120may store the first remaining compressed objects and the second remaining compressed objects in a temporary buffer again. The first remaining compressed objects and the second remaining compressed objects may be moved to the non-volatile memory134later through the compressed data moving operation between heterogeneous memories ofFIG.6. The first remaining compressed objects and the second remaining compressed objects may be stored in a temporary buffer according to the method described inFIG.4. Moreover, in the first bitmap and the second bitmap (or a lower bitmap), the processor120may update bits corresponding to a compression chunk including the read-requested compressed object to free bits.

According to an embodiment, in operation750, the processor120may deliver the decompressed page data to a subject (e.g., the program140ofFIG.1) of the read request.

FIG.8is a flowchart illustrating an example of a read operation of an electronic device, according to an embodiment of the disclosure.

Referring toFIGS.2and8, a volatile memory132may store uncompressed user data210, compressed objects230, which are compressed and stored in an empty area220, in a user data210, and a compressed object group (e.g., a first compressed object group251or a second compressed object group252), which is moved to and then stored in a temporary buffer layer240, from among the compressed objects230. The non-volatile memory134may store a compressed object group (e.g., the third compressed object group261aor the fourth compressed object group262a) stored through a compressed data moving operation (e.g., Zram writeback) between heterogeneous memories.

According to an embodiment, in operation805, the processor120of the electronic device101may receive a read request (e.g., a read request by the program140ofFIG.1) for a compressed object. For example, the read-requested compressed object may be included in the compressed objects230compressed and stored in the empty area220of the volatile memory132, included in a compressed object group moved to the temporary buffer layer240of the volatile memory132, or included in a compressed object group stored in the non-volatile memory134through an operation (e.g., Zram writeback) of moving compressed data between heterogeneous memories.

According to an embodiment, in operation810, the processor120may determine whether the read-requested compressed object is present in the non-volatile memory134. When the read-requested compressed object is present in the non-volatile memory134, the processor120may decompress the read-requested compressed object through operation835, operation840, and operation845. When the read-requested compressed object is not present in the non-volatile memory134(e.g., No of operation810), the processor120may decompress the read-requested compressed object through operation815, operation820, operation825, and operation830. Because operation815to operation830may be the same as or similar to operation715to operation730ofFIG.7, descriptions of portions identical or similar to portions in operation715to operation730ofFIG.7are omitted.

According to an embodiment, when the read-requested compressed object is present in the non-volatile memory134(e.g., Yes of operation810), in operation835, the processor120may copy a compressed object group including the read-requested compressed object from the non-volatile memory134to the volatile memory132based on the second bitmap (or a lower bitmap). The non-volatile memory134may maintain a storage state of the compressed object group including the read-requested compressed object as it is. For example, when the read-requested compressed object is included in only one compressed object group, the processor120may copy only one compressed object group. When the read-requested compressed object is included in two compressed object groups while being positioned across the two compressed object groups, the processor120may copy the two compressed object groups.

According to an embodiment, in operation840, the processor120may decompress the read-requested compressed object. For example, the processor120may search for the read-requested compressed object in the compressed object group (or compressed object groups) copied in operation835by using the compression header510ofFIG.5. The processor120may decompress only the read-requested compressed object and may maintain compression states of the remaining compressed objects included in the compressed object group (or compressed object groups) copied in operation835.

According to an embodiment, in operation845, the processor120may delete the remaining compressed objects, excluding the page data (e.g., the page data211) obtained by decompressing the read-requested compressed object. The processor120may keep the first bitmap (an upper bitmap) and the second bitmap (or a lower bitmap) as they are.

According to an embodiment, in operation850, the processor120may deliver decompressed data corresponding to the read-requested compressed object to a subject (e.g., the program140ofFIG.1) of the read request.

According to an embodiment, the processor120may separately use the compressed object read method ofFIG.7and the compressed object read method ofFIG.8. Alternatively, the processor120may concurrently use the compressed object reading method ofFIG.7and the compressed object reading method ofFIG.8depending on use situations of the volatile memory132and the non-volatile memory134.

FIG.9is a diagram illustrating a defragmentation operation of a non-volatile memory of an electronic device, according to an embodiment of the disclosure.

Referring toFIGS.2and9, a non-volatile memory134may be fragmented (e.g., a slot not mapped to a bitmap is present between slots mapped to the bitmap) depending on a usage pattern (e.g., a read operation, a write operation, or an erase operation). Through a defragmentation operation (e.g., defragmentation), the processor120may move compressed objects stored in the non-volatile memory134to the volatile memory132and then may relocate the compressed objects in the non-volatile memory134.

According to an embodiment, the processor120may determine whether a start condition of the defragmentation operation is satisfied. For example, because the performance of the electronic device101, which is perceived by a user, may be degraded during the defragmentation operation, the processor120may perform the defragmentation operation by using a period in time in which a user input is not entered. For example, the processor120may identify an idle time of the electronic device101. The processor120may determine the idle time of the electronic device101based on an off time or local time (e.g., early morning hours (00:00˜05:00)) of a display (e.g., the display module160). Moreover, the processor120may determine whether the defragmentation operation is necessary. For example, when the upper bitmap includes used bits having a specified percentage or higher, the processor120may perform the defragmentation operation. When the usable lifespan of the non-volatile memory134is not less than a reference value (e.g., when a wear level is sufficiently low), the processor120may perform the defragmentation operation.

According to an embodiment, the processor120may select a target compression chunk based on an upper bitmap (e.g., the first bitmap310). For example, the processor120may select a compression chunk (or a compression chunk corresponding to the used bit of the first bitmap having the number of bits of the mapped second bitmap (or a lower bitmap) that corresponds to a specified ratio or less), of which the usage amount corresponds to a specified ratio (e.g., 50%) or less, as a target compression chunk based on a used bit of the first bitmap310. For example, when the specified ratio is set to 50%, the processor120may select a first compression chunk corresponding to bit0of the first bitmap310and a second compression chunk corresponding to bit1of the first bitmap310as the target compression chunk before performing the defragmentation operation. In bit0of the first bitmap310, only two lower bits (e.g., bit0and bit1of the second bitmap320) among four lower bits (e.g., bit0, bit1, bit2, and bit3of the second bitmap320) remain as used bits. In bit1of the first bitmap310, only two lower bits (e.g., bit4and bit7of the second bitmap320) among the four lower bits (e.g., bit4, bit5, bit6, and bit7of the second bitmap320) remain as used bits.

According to an embodiment, the processor120may move the target compression chunk from the non-volatile memory134to the temporary buffer layer240of the volatile memory132. For example, when the first compression chunk is selected as the target compression chunk, the processor120may copy compressed object groups stored in storage slot A and storage slot B of the non-volatile memory134to the temporary buffer layer240of the volatile memory132. The first compression chunk may include a first compressed object group910and a second compressed object group920. The first compression chunk may include seven compressed objects that are positioned across the first compressed object group910and the second compressed object group920. The processor120may store compressed objects included in the first compressed object group910and the second compressed object group920in a corresponding temporary buffer (e.g., a temporary buffer classified for each compression size of a compressed object) (e.g., the third buffer243inFIG.4) of the temporary buffer layer240. Storage slot A and storage slot B of the non-volatile memory134may be treated as including invalid data and may be erased later. Storage slot C and storage slot D of the non-volatile memory134are storage slots that are already invalidated.

Furthermore, for example, when the second compression chunk is selected as the target compression chunk, the processor120may copy compressed object groups stored in storage slot E and storage slot H of the non-volatile memory134to the temporary buffer layer240of the volatile memory132. The second compression chunk may include a third compressed object group930and a fourth compressed object group940. The third compressed object group930may include one compressed object. The fourth compressed object group940may include two compressed objects. The processor120may store compressed objects included in the third compressed object group930and the fourth compressed object group940in a corresponding temporary buffer of the temporary buffer layer240. Storage slot E and storage slot H of the non-volatile memory134may be treated as including invalid data and may be erased later. Storage slot F and storage slot G of the non-volatile memory134are storage slots that are already invalidated.

According to an embodiment, the processor120may update the first bitmap310and the second bitmap320. For example, the processor120may change bit0and bit1of the first bitmap310and bit0, bit1, bit4, and bit7of the second bitmap320from used bits to free bits.

According to an embodiment, the processor120may reorganize the compressed objects in the first compressed object group910, the second compressed object group920, the third compressed object group930, and the fourth compressed object group940, which are stored in the temporary buffer layer240, into a new compressed object group and may store the reorganized compressed objects again in the non-volatile memory134through the compressed data transfer operation between heterogeneous memories ofFIG.6.

According to an embodiment, after performing the defragmentation operation, the processor120may map bit0, bit1, bit2, and bit3of the second bitmap320to unused free slots (e.g., slot I, slot J, slot K, and slot L) of the non-volatile memory134, respectively. Furthermore, the processor120may change (or update) bit0of the first bitmap310and bit0, bit1, bit2, and bit3of the second bitmap320to used bits. As such, the processor120may secure a free bit (e.g., bit1of the first bitmap310) in the first bitmap310and may defragment the non-volatile memory134.

FIG.10is a flowchart illustrating a defragmentation operation of a non-volatile memory of an electronic device, according to an embodiment of the disclosure.

Referring toFIGS.2,9, and10, a non-volatile memory134may be fragmented (e.g., a storage slot (e.g., storage slot C, D, F, or G) not mapped to the lower bitmap is present between storage slots (e.g., storage slots A, B, E, and H) mapped to the lower bitmap) depending on a usage pattern (e.g., a read operation, a write operation, or an erase operation). As such, the processor120may change (or update) the mapping between the lower bitmap and storage slots of the non-volatile memory134such that storage slots mapped to the lower bitmap are located to be continuously adjacent to each other through a defragmentation operation (e.g., defragmentation). The processor120may change (or update) the upper bitmap depending on a change in the lower bitmap.

According to an embodiment, in operation1005, the processor120may determine whether a start condition of the defragmentation operation is satisfied. For example, because the performance of the electronic device101, which is perceived by a user, may be degraded during the defragmentation operation, the processor120may perform the defragmentation operation by using a period in time in which a user input is not entered. For example, the processor120may identify an idle time of the electronic device101. The processor120may determine the idle time of the electronic device101based on an off time or local time (e.g., early morning hours (00:00˜05:00)) of a display (e.g., the display module160). Moreover, the processor120may determine whether the defragmentation operation is necessary. For example, when the upper bitmap includes used bits having a specified percentage or higher, the processor120may perform the defragmentation operation. When the usable lifespan of the non-volatile memory134is not less than a reference value (e.g., when a wear level is sufficiently low), the processor120may perform the defragmentation operation. When the start condition of the defragmentation operation is not satisfied, the processor120may not perform the defragmentation operation. When the start condition of the defragmentation operation is satisfied, the processor120may perform operation1010.

According to an embodiment, in operation1010, the processor120may select a target compression chunk based on the first bitmap (e.g., an upper bitmap). For example, the processor120may select a compression chunk (or a compression chunk, which has the number of bits of the mapped second bitmap (or a lower bitmap) that corresponds to a specified ratio or less and which corresponds to the used bit of the first bitmap) (e.g., a compression chunk corresponding to bit0of the first bitmap310inFIG.9or compression chunk corresponding to bit1of the first bitmap310inFIG.9), which has the usage amount corresponding to a specified ratio (e.g., 50%) or less, as a target compression chunk based on a used bit of the first bitmap.

According to an embodiment, in operation1015, the processor120may determine whether the target compression chunk is found. When the target compression chunk is not present, the processor120may terminate the defragmentation operation. When the target compression chunk is found, the processor120may perform operation1020.

According to an embodiment, in operation1020, the processor120may move the target compression chunk from the non-volatile memory134to the temporary buffer layer240of the volatile memory132. For example, the target compression chunk may include at least one compressed object group. The processor120may store compressed objects included in the target compression chunk in the corresponding temporary buffer (e.g., a temporary buffer classified for each compression size of a compressed object) of the temporary buffer layer240. Furthermore, the processor120may update a bit corresponding to the target compression chunk in the first bitmap and the second bitmap (e.g., change the bit from a used bit to a free bit). For example, inFIG.9, when the target compression chunk corresponds to bit0of the first bitmap310ofFIG.9, the processor120may change bit0of the first bitmap310, and bit0and bit1of the second bitmap320from used bits to free bits. Alternatively, when the target compression chunk corresponds to bit1of the first bitmap310inFIG.9, the processor120may change bit1of the first bitmap310and bit4and bit7of the second bitmap320from used bits to free bits.

According to an embodiment, in operation1025, operation1030, operation1035, operation1040, operation1045, operation1050, operation10555, and operation1060, the processor120may move the selected compressed object group from the volatile memory132to the non-volatile memory134in a method the same as or similar to a method of operation620to operation655ofFIG.6. Descriptions associated with operation1025to operation1060are the same as or similar to operation620to operation655ofFIG.6are omitted. When a fully filled temporary buffer is not present, in operation1025, the processor120may terminate the defragmentation operation. When there is no free bit in the second bitmap, in operation1050, the processor120may terminate the defragmentation operation.

FIG.11is a flowchart illustrating a method of moving compressed data between heterogeneous memories of an electronic device, according to an embodiment of the disclosure.

Referring toFIGS.2and11, an electronic device101may include a processor120and a memory130. The memory130may include the volatile memory132and the non-volatile memory134. The processor120may control the memory130by executing a program (e.g., the program140). The non-volatile memory134may include the plurality of storage slots260. According to the method of moving compressed data between heterogeneous memories in this specification, the processor120may move compressed data from the volatile memory132to the non-volatile memory134, thereby efficiently securing free space of the volatile memory132.

According to an embodiment, in operation1110, the processor120may store first compressed objects (e.g., the compressed objects230), which are obtained by compressing a part of the user data210stored in the volatile memory132in units of page (e.g., 4 Kilobytes), in the empty area220of the volatile memory132. For example, when free space of the volatile memory132is reduced to have a specified size (e.g., 10% of the size of the volatile memory132), the processor120may generate the compressed objects230by compressing the part of the user data210in units of pages, may store the compressed objects230in the empty area220of the volatile memory132, and may delete original data (e.g., the first page data211ofFIG.2).

According to an embodiment, in operation1120, the processor120may move a second compressed object (e.g., the idle object232), which satisfies a specified condition (e.g., when there is no access to the corresponding compressed object during a specified time), from among the first compressed objects to at least one temporary buffer (e.g., the first buffer241, the second buffer242, or the third buffer243inFIG.4) set in the volatile memory132.

For example, when a command to move compressed data is triggered by an operating system (e.g., the operating system142ofFIG.1), the processor120may search for the idle object232(e.g., a compressed object that is shaded inFIG.2) among the compressed objects230. The idle object232may be defined as a compressed object, which has no access during a specified period or more, from among the compressed objects230. For example, the processor120may attach an idle flag to all of the compressed objects230at a specified time point. When access to the compressed objects230is present, the processor120may remove an idle flag of the corresponding compressed object. After the specified period elapses from the specified time point, the processor120may select a compressed object having the idle flag as the idle object232. For another example, when the compressed data moving operation between heterogeneous memories is completed, the processor120may attach an idle flag to all the compressed objects230. When triggering the next compressed data moving command, the processor120may select a compressed object having an idle flag as the idle object232. The processor120may determine whether an object is the idle object232, from the oldest compressed object.

For example, the processor120may generate the temporary buffer layer240in the empty area220of the volatile memory132. The temporary buffer layer240may include the at least one temporary buffer. For example, the at least one temporary buffer may be classified for each size and may store the second compressed object. The processor120may set a storage limit size for the at least one respective temporary buffer. For example, when the size of the second compressed object is not greater than a first compression size (e.g., 32 Bytes), the processor120may move the second compressed object to the first buffer241ofFIG.4. When the size of the second compressed object is greater than the first compression size and is not greater than a second compression size (e.g., 818 bytes), the processor120may move the second compressed object to the second buffer242ofFIG.4. When the size of the second compressed object is greater than the second compression size and is not greater than a third compression size (e.g., 1168 bytes), the processor120may move the second compressed object to the third buffer243ofFIG.4. For another example, the at least one temporary buffer may be set to have a different size. For example, the processor120may set the first buffer241and the second buffer242ofFIG.4to have the first buffer size BS1. The processor120may set the third buffer243ofFIG.4to have the second buffer size BS2greater than the first buffer size BS1. The first buffer size BS1may be set to correspond to a size (e.g., 4 Kilobytes) of one storage slot (e.g., the first storage slot261) of the non-volatile memory134. The second buffer size BS2may be set to a multiple (e.g., 8 Kilobytes) of the first buffer size BS1.

According to an embodiment, in operation1130, when there is a first temporary buffer (e.g., the third buffer243inFIG.4), which is filled (or fully filled) to have a specified size or more, from among the at least one temporary buffer, the processor120may register third compressed objects stored in the first temporary buffer in a write list in units of compressed object group (e.g., 4 Kilobytes). For example, the processor120may search for a temporary buffer having free space, of which the size is less than a storage limit size (e.g., the third compression size in the third buffer243ofFIG.4), as the first temporary buffer. The first temporary buffer may include at least one compressed object group. The size of one compressed object group may correspond to a size (e.g., 4 Kilobytes) of one storage slot of the non-volatile memory134. For example, the first buffer241or the second buffer242ofFIG.4, which has the first buffer size BS1, may include one compressed object group. When the second buffer size BS2is twice the first buffer size BS1, the third buffer243ofFIG.4having the second buffer size BS2may include two compressed object groups.

According to an embodiment, in operation1140, when the number of compressed object groups registered in the write list is not less than a specified value, the processor120may move the compressed object groups registered in the write list to the non-volatile memory134in a compressed state. For example, the processor120may divide compressed object groups registered in the write list in units of compression chunk (e.g., 4 Kilobytes*N, ‘N’ is a natural number greater than 2). The processor120may move a plurality of compression chunks to the non-volatile memory134at a time (or continuously). One compression chunk may include a plurality of compressed object groups.

For example, to manage compression chunks and compressed object groups, the processor120may use a plurality of hierarchical bitmaps. For example, the processor120may generate an upper bitmap (e.g., the first bitmap310inFIG.3) and a lower bitmap (e.g., the second bitmap320inFIG.3). Bits of the lower bitmap may be mapped one-to-one to storage slots of the non-volatile memory134. The plurality of bits of the lower bitmap may be mapped to one bit of the upper bitmap. Accordingly, one bit of the upper bitmap may correspond to a plurality of storage slots of the non-volatile memory134. The compressed object group may be defined as a collection of compressed objects corresponding to one bit of the lower bitmap. The compression chunk may be defined as a collection of compressed object groups corresponding to one bit of the upper bitmap.

For example, each bit of the upper bitmap or the lower bitmap may be displayed as a free bit (e.g., displayed as “0” in binary) or a used bit (e.g., displayed as “1” in binary). For example, a bit of the lower bitmap mapped to a storage slot of the non-volatile memory134in which a compressed object group is stored may be displayed as a used bit. A bit of the lower bitmap mapped to a storage slot of the non-volatile memory134in which a compressed object group is not stored may be displayed as a free bit. A bit of the upper bitmap mapped to at least one used bit of the lower bitmap may be displayed as a used bit. When all bits of the lower bitmap mapped to a specific bit of the upper bitmap are free bits, the specific bit of the upper bitmap may be expressed as a free bit.

For example, the processor120may search for a free bit from the upper bitmap prior to the lower bitmap. When there is a free bit in the upper bitmap, the processor120may move compressed object groups registered in the write list to the non-volatile memory134in units of compression chunk unit at a time (or continuously). Compressed object groups included in the same compression chunk may be stored in adjacent storage slots of the non-volatile memory134. When there is no free bit in the upper bitmap, the processor120may search for a free bit in the lower bitmap. The processor120may move one of the compressed object groups registered in the write list in units of compressed object group so as to correspond to the found free bit of the lower bitmap. Until all compressed object groups registered in the write list are stored, the processor120may repeatedly search for a free bit of the lower bitmap and may repeatedly move the compressed object group.

As described above, the processor120may secure free space of the volatile memory132by compressing some of the user data210. Furthermore, the processor120may further secure free space of the volatile memory132by moving compressed objects, in each of which some of the user data210is compressed, to the non-volatile memory134. Moreover, the processor120may move the compressed objects to the non-volatile memory134in a compressed state, thereby efficiently securing the free space of the volatile memory132. In addition, the processor120may perform write operations of compressed objects for each unit (e.g., in units of compression chunk) larger than one storage slot of the non-volatile memory134, thereby improving the write performance of the non-volatile memory134during a write operation.

According to an embodiment, an electronic device101include a volatile memory132storing user data a non-volatile memory134and a processor120operatively connected to the volatile memory132and the non-volatile memory134. The processor120is configured to store first compressed objects, which are obtained by compressing some of the user data in a page unit, in an empty area of the volatile memory132, move a second compressed object, which satisfies a specified condition, from among the first compressed objects to a temporary buffer set in the volatile memory132, and based on the temporary buffer being filled to a specified size or more, move third compressed objects, which are stored in the temporary buffer, to the non-volatile memory134in a compressed state.

According to an embodiment, the processor120is further configured to, set a temporary buffer layer including a plurality of temporary buffers in the volatile memory132, and based on a compression size, select one of the plurality of temporary buffers in which the second compressed object is to be stored.

According to an embodiment, the processor120is further configured to determine a size of the temporary buffer to have a size equal to a size of one storage slot of the non-volatile memory134or a size corresponding to a multiple of the size of the one storage slot of the non-volatile memory134.

According to an embodiment, the processor120is further configured to, based on the temporary buffer being filled to a specified size or more, classify the third compressed objects as a compressed object group and register the compressed object group in a write list, and based on a number of compressed object groups registered in the write list being more than or equal to a specified value, move the registered compressed object groups to the non-volatile memory134.

According to an embodiment, the non-volatile memory134includes a plurality of storage slots, and the processor120is further configured to, sequentially store the registered compressed object groups in adjacent storage slots among the plurality of storage slots.

According to an embodiment, a size of the compressed object group is set to be equal to a size of one of the plurality of storage slots.

According to an embodiment, a size of the compressed object group is set to be equal to the page unit.

According to an embodiment, the non-volatile memory134includes a plurality of storage slots, and the processor120is further configured to, generate a first bitmap and a second bitmap that have a hierarchical structure with each other, map bits of the second bitmap to the plurality of storage slots one-to-one, and map a plurality of bits of the second bitmap to one bit of the first bitmap.

According to an embodiment, the processor120is further configured to, classify the third compressed objects as a compressed object group corresponding to a size of one of the plurality of storage slots, and sequentially store compressed object groups corresponding to one bit of the first bitmap in adjacent storage slots among the plurality of storage slots.

According to an embodiment, the processor120is further configured to, display a bit of the second bitmap mapped to a storage slot, in which each of the compressed object groups is stored, as a used second bit, and display a bit of the first bitmap mapped to at least one used bit of the second bitmap as a used first bit.

According to an embodiment, the processor120is further configured to, based on receiving a read request for a compressed object moved to the non-volatile memory134, copy a target compressed object group including the read-requested compressed object to the volatile memory132, decompress the read-requested compressed object and delete remaining compressed objects included in the target compressed object group from the volatile memory132, maintain the target compressed object group stored in the non-volatile memory134, and maintain the first bitmap and the second bitmap in current states.

According to an embodiment, the processor120is further configured to:

based on receiving a read request for a compressed object moved to the non-volatile memory134, move a target compression chunk, which includes the read-requested compressed object and which corresponds to one bit of the first bitmap, to the volatile memory132, decompress the read-requested compressed object, store remaining compressed objects included in the target compression chunk in the temporary buffer, and update bits of the first bitmap and the second bitmap corresponding to the target compression chunk to free bits.

According to an embodiment, the specified condition includes selecting a compressed object, which has no access during a specified time, from among the first compressed objects.

According to an embodiment, a method of moving compressed data between heterogeneous memories of an electronic device101including a volatile memory132and a non-volatile memory134, may include storing first compressed objects, which are obtained by compressing user data stored in the volatile memory132in a page unit, in an empty area of the volatile memory132, moving a second compressed object, which satisfies a specified condition, from among the first compressed objects to at least one temporary buffer set in the volatile memory132, based on a first temporary buffer from among the at least one temporary buffer being filled to a specified size or more, registering third compressed objects stored in the first temporary buffer in a write list in units of a compressed object group and based on a number of compressed object groups registered in the write list being more than or equal to a specified value, moving the compressed object groups to the non-volatile memory134in compressed states134.

According to an embodiment, the method of moving compressed data between heterogeneous memories of an electronic device may further include generating a first bitmap and a second bitmap that have a hierarchical structure with each other, wherein bits of the second bitmap are mapped one-to-one to storage slots of the non-volatile memory134, and wherein at least two bits of the second bitmap are mapped to one bit of the first bitmap.

According to an embodiment, the method of moving compressed data between heterogeneous memories of an electronic device may further include, when a first free bit is included in the first bitmap, sequentially moving the compressed object groups to storage slots corresponding to the first free bit among the plurality of storage slots.

According to an embodiment, the method of moving compressed data between heterogeneous memories of an electronic device may further include, when a first free bit is not included in the first bitmap, searching for a second free bit in the second bitmap and when the second free bit is included in the second bitmap, moving one compressed object group among the compressed object groups to a first storage slot corresponding to the second free bit among the plurality of storage slots.

According to an embodiment, the method of moving compressed data between heterogeneous memories of an electronic device may further include, when a third free bit is included in the second bitmap, moving another compressed object group among the compressed object groups to a second storage slot corresponding to the third free bit among the plurality of storage slots.

According to an embodiment, wherein the at least one temporary buffer comprises a first temporary buffer set to correspond to a size of one storage slot of the non-volatile memory and a second temporary buffer set to a multiple of the size of the first temporary buffer.

According to an embodiment, wherein the at least one temporary buffer comprises a first temporary buffer storing at least one compressed object of which a size is not greater than a first compression size and a second temporary buffer storing at least one compressed object of which the size is greater than the first compression size and is smaller than a second compression size.

The electronic device according to various embodiments may be one of various types of electronic devices. The electronic devices may include, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a home appliance. According to an embodiment of the disclosure, the electronic devices are not limited to those described above.

It should be appreciated that various embodiments of the disclosure and the terms used therein are not intended to limit the technological features set forth herein to particular embodiments and include various changes, equivalents, or replacements for a corresponding embodiment. As used herein, each of such phrases as “A or B,” “at least one of A and B,” “at least one of A or B,” “A, B, or C,” “at least one of A, B, and C,” and “at least one of A, B, or C,” may include any one of, or all possible combinations of the items enumerated together in a corresponding one of the phrases. As used herein, such terms as “1st” and “2nd,” or “first” and “second” may be used to simply distinguish a corresponding component from another, and does not limit the components in other aspect (e.g., importance or order). It is to be understood that if an element (e.g., a first element) is referred to, with or without the term “operatively” or “communicatively,” as “coupled with,” “coupled to,” “connected with,” or “connected to” another element (e.g., a second element), it denotes that the element may be coupled with the other element directly (e.g., wiredly), wirelessly, or via a third element.

As used in connection with various embodiments of the disclosure, the term “module” may include a unit implemented in hardware, software, or firmware, and may interchangeably be used with other terms, for example, “logic,” “logic block,” “part,” or “circuitry.” A module may be a single integral component, or a minimum unit or part thereof, adapted to perform one or more functions. For example, according to an embodiment, the module may be implemented in a form of an application-specific integrated circuit (ASIC).

Various embodiments as set forth herein may be implemented as software (e.g., the program140) including one or more instructions that are stored in a storage medium (e.g., an internal memory136or an external memory138) that is readable by a machine (e.g., the electronic device101). For example, a processor (e.g., the processor120) of the machine (e.g., the electronic device101) may invoke at least one of the one or more instructions stored in the storage medium, and execute it, with or without using one or more other components under the control of the processor. This allows the machine to be operated to perform at least one function according to the at least one instruction invoked. The one or more instructions may include a code generated by a complier or a code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Wherein, the term “non-transitory” simply denotes that the storage medium is a tangible device, and does not include a signal (e.g., an electromagnetic wave), but this term does not differentiate between where data is semi-permanently stored in the storage medium and where the data is temporarily stored in the storage medium.

According to an embodiment, a method according to various embodiments of the disclosure may be included and provided in a computer program product. The computer program product may be traded as a product between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read only memory (CD-ROM)), or be distributed (e.g., downloaded or uploaded) online via an application store (e.g., PlayStore™), or between two user devices (e.g., smart phones) directly. If distributed online, at least part of the computer program product may be temporarily generated or at least temporarily stored in the machine-readable storage medium, such as memory of the manufacturer's server, a server of the application store, or a relay server.

According to various embodiments, each component (e.g., a module or a program) of the above-described components may include a single entity or multiple entities, and some of the multiple entities may be separately disposed in different components. According to various embodiments, one or more of the above-described components may be omitted, or one or more other components may be added. Alternatively or additionally, a plurality of components (e.g., modules or programs) may be integrated into a single component. In such a case, according to various embodiments, the integrated component may still perform one or more functions of each of the plurality of components in the same or similar manner as they are performed by a corresponding one of the plurality of components before the integration. According to various embodiments, operations performed by the module, the program, or another component may be carried out sequentially, in parallel, repeatedly, or heuristically, or one or more of the operations may be executed in a different order or omitted, or one or more other operations may be added.

While the disclosure has been shown and described with reference to various embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims and their equivalents.