Patent ID: 12218273

DETAILED DESCRIPTION

Technical solutions in some embodiments of the present disclosure will be described clearly and completely below with reference to the accompanying drawings. However, the embodiments to be described are merely some but not all embodiments of the present disclosure. All other embodiments obtained on a basis of the embodiments of the present disclosure by a person of ordinary skill in the art shall be included in the protection scope of the present disclosure.

Unless the context requires otherwise, throughout the description and the claims, the term “comprise” and other forms thereof such as the third-person singular form “comprises” and the present participle form “comprising” are construed as an open and inclusive meaning, i.e., “including, but not limited to.” In the description of the specification, the terms such as “one embodiment”, “some embodiments”, “exemplary embodiments”, “example”, “specific example” or “some examples” are intended to indicate that specific features, structures, materials or characteristics related to the embodiment(s) or example(s) are included in at least one embodiment or example of the present disclosure. Schematic representations of the above terms do not necessarily refer to the same embodiment(s) or example(s). In addition, the specific features, structures, materials, or characteristics may be included in any one or more embodiments or examples in any suitable manner.

In the description of some embodiments, the terms “coupled”, “connected” and derivatives thereof may be used. For example, the term “connected” may be used in the description of some embodiments to indicate that two or more components are in direct physical or electrical contact with each other. For another example, the term “coupled” may be used in the description of some embodiments to indicate that two or more components are in direct physical or electrical contact. However, the term “coupled” or “communicatively coupled” may also indicate that two or more components are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the content herein. For still another example, the term “electrically connected” may be used in the description of some embodiments to indicate that two or more components are in direct electrical contact or in indirect electrical contact through a certain conductive medium.

The phrase “at least one of A, B and C” has a same meaning as the phrase “at least one of A, B or C”, and they both include the following combinations of A, B and C: only A, only B, only C, a combination of A and B, a combination of A and C, a combination of B and C, and a combination of A, B and C. The phrase “A and/or B” includes the following three combinations: only A, only B, and a combination of A and B.

As used herein, the term “if”, depending on the context, is optionally construed as “when”, “in a case where”, “in response to determining that”, or “in response to detecting”. Similarly, depending on the context, the phrase “if it is determined that” or “if [a stated condition or event] is detected” is optionally construed as “in a case where it is determined that”, “in response to determining that”, “in a case where [the stated condition or event] is detected”, or “in response to detecting [the stated condition or event]”.

The phrase “applicable to” or “configured to” as used herein indicates an open and inclusive expression, which does not exclude devices that are applicable to or configured to perform additional tasks or steps. In addition, the phrase “based on” as used herein indicates openness and inclusiveness, since a process, step, calculation or other action that is “based on” one or more of the stated conditions or values may, in practice, be based on additional conditions or values exceeding those stated.

Terms such as “about”, “substantially” or “approximately” as used herein include a stated value and an average value within an acceptable range of deviation of a particular value. The acceptable range of deviation is determined by a person of ordinary skill in the art in view of the measurement in question and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system).

In the description of the present disclosure, it will be understood that orientations or positional relationships indicated by terms “center”, “upper”, “lower”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inner”, “outer”, etc. are based on orientations or positional relationships shown in the accompanying drawings, which are merely to facilitate and simplify the description of the present disclosure, but not to indicate or imply that the referred devices or elements must have a particular orientation, or must be constructed and operated in a particular orientation. Therefore, they should not be construed as limitations to the present disclosure.

The terms “first” and “second” are only used for descriptive purposes, but are not to be construed as indicating or implying the relative importance or implicitly indicating the number of indicated technical features. Thus, features defined with “first” and “second” may explicitly or implicitly include one or more of the features. In the description of the present disclosure, “a plurality of/the plurality of” means two or more unless otherwise specified.

Exemplary embodiments are described herein with reference to sectional views and/or plan views as idealized exemplary drawings. In the accompanying drawings, thicknesses of layers and regions are enlarged for clarity. Thus, variations in shape with respect to the accompanying drawings due to, for example, manufacturing technologies and/or tolerances may be envisaged. Therefore, the exemplary embodiments should not be construed as being limited to the shapes of the regions shown herein, but including shape deviations due to, for example, manufacturing. For example, an etched region shown in a rectangular shape generally has a feature of being curved. Therefore, the regions shown in the accompanying drawings are schematic in nature, and their shapes are not intended to show actual shapes of the region in a device, and are not intended to limit the scope of the exemplary embodiments.

Those skilled in the art will understand that, unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meanings as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will also be understood that, terms such as those defined in general dictionaries should be understood as having meanings consistent with the meanings in the context of the prior art, and unless specifically defined as herein, they will not be interpreted in an idealized or overly formal sense.

Embodiments of the present disclosure provide an electronic apparatus. The electronic apparatus may include an electronic product with a display function such as a mobile phone, a tablet computer, a televisions or a smart wearable product (e.g., smart watch). The embodiments of the present disclosure do not limit a specific form of the electronic apparatus.

In a case where the electronic apparatus01(e.g., a mobile phone) has a display function, as shown inFIG.1, the electronic apparatus01may include a plurality of micro light-emitting diode (μLED) chips200arranged in an array and an integrated-circuit (IC). The plurality of μLED chips200may emit light of at least three primary colors, for example, red (R) light, green (G) light and blue (B) light. The electronic apparatus01may achieve image display through the light emitted by the plurality of μLED chips200. It will be noted that the number of the μLED chips200inFIG.1is only exemplary, and the present disclosure is not limited thereto.

A structure of the μLED chip200will be explained in detail below. In the following embodiments of the present disclosure, the description will be made by taking an example where the μLED chip200is of a vertical structure. The μLED chip200of a vertical structure has good heat dissipation capability and requires low processing accuracy.

As shown inFIG.2(which is a section of the electronic apparatus01shown inFIG.1taken along the N-N direction), the μLED chip200may include a first electrode layer220and an epitaxial layer210. The epitaxial layer210and the first electrode layer220are sequentially stacked on a conductive substrate250of the electronic apparatus01. The epitaxial layer210may be configured to emit light.

Specifically, as shown inFIG.2, the epitaxial layer210may include a first semiconductor layer211, a light-emitting layer212and a second semiconductor layer213that are sequentially stacked on the conductive substrate250. The first electrode layer220is electrically connected to a surface of the second semiconductor layer213away from the light-emitting layer212, and the conductive substrate250is electrically connected to a side of the first semiconductor layer211away from the light-emitting layer212. In the electronic apparatus01, the first electrode layer220may receive a high-level signal, and the conductive substrate250may receive a low-level signal. The second semiconductor layer213may be configured to transmit first carriers, and the first semiconductor layer211may be configured to transmit second carriers.

It will be noted that in the embodiments of the present disclosure, the first semiconductor layer211of the μLED chip200may be an n-type semiconductor layer. In this case, the second carriers are electrons. For example, a semiconductor material gallium nitride (GaN) is doped with pentavalent phosphorus or tetravalent silicon, so as to form the n-type semiconductor layer, i.e., an n-GaN layer. In the n-type semiconductor layer, free electrons are majority carriers, holes are minority carriers, and electricity is mainly conducted by the free electrons. The higher the concentration of the majority carriers (the free electrons), the better the conductivity of the n-type semiconductor layer. For convenience of description, the following embodiments will be described by taking an example where the first semiconductor layer211is an n-type semiconductor layer (n-GaN).

In addition, the second semiconductor layer213of the μLED chip200may be a p-type semiconductor layer. In this case, the first carriers are holes. For example, a semiconductor material gallium nitride (GaN) is doped with trivalent elements, such as boron, so as to form the p-type semiconductor layer, i.e., a p-GaN layer. In the p-type semiconductor layer, holes are majority carriers, free electrons are minority carriers, and electricity is mainly conducted by the holes. The higher the concentration of the majority carriers (the holes), the better the conductivity of the p-type semiconductor layer.

The first electrode layer220of the μLED chip200, as an electrode or a conductive layer for the second semiconductor layer213, is disposed on a side of the second semiconductor layer213away from the light-emitting layer212, and may be used to realize an electrical connection between the second semiconductor layer213and an external conductive material. In a case where the second semiconductor layer213of the μLED chip200is a p-type semiconductor layer, the first electrode layer220in these embodiments is a p-electrode layer. In some embodiments, the p-electrode layer may be made of titanium (Ti) and gold (Au), a thickness of Ti and a thickness of Au being 10 nm and 100 nm, respectively. Alternatively, the p-electrode layer may be made of titanium (Ti) and aluminum (Al), a thickness of Ti and a thickness of Al being 10 nm and 100 nm, respectively. The “nm” stands for “nanometer”, and is used for characterizing a thickness of a film layer. For convenience of description, the following embodiments will be described by taking an example where the second semiconductor layer213is a p-type semiconductor layer (p-GaN), and the first electrode layer220is a p-type electrode layer.

The n-GaN layer and the p-GaN layer may form a PN junction. The light-emitting layer212may be a multi-quantum well (MQW) layer located between the n-GaN layer and the p-GaN layer, in particular, in an active region of the PN junction, so as to form a complete PN junction.

In this way, in a state where the first electrode layer220receives a high-level signal and the conductive substrate250receives a low-level signal, an electric field is formed between the first electrode layer220and the conductive substrate250. The electric field may cause the electrons from the first semiconductor layer211and the holes from the second semiconductor layer213to combine in the light-emitting layer212, and give off energy in the form of photons, so that the light-emitting layer212of the μLED chip200emits light. In this way, a light-emitting function of the μLED chip200may be realized, and thus a display function of the electronic apparatus01may be realized.

It will be noted that “high” in the high-level signal and “low” in the low-level signal are relative concepts, and the embodiments of the present disclosure do not limit the specific values of the high-level signal and the low-level signal.

In addition, as shown inFIG.2, a surface of the first semiconductor layer211away from the light-emitting layer212is a concave-convex microstructure2111. During inspection of light-emitting properties of the μLED chip200(for example, an inspection to determine whether the μLED chip200emits light abnormally), convex portions of the concave-convex microstructure2111may be used to receive an electron beam emitted under a preset condition (for example, an electron beam emitted under a certain voltage and current), and generate point discharge to inject electrons into the first semiconductor layer211, thereby realizing a non-contact EL inspection method of the μLED chip200.

It will be noted that the point discharge refers to a discharge phenomenon that occurs on a sharp portion of an object due to an action of a strong electric field. The sharper the sharp portion of the object is, and the stronger the electric field near a point is, the more likely the point discharge occurs. Correspondingly, in the embodiments of the present disclosure, the electron beam emitted under the preset condition forms an electric field at the convex portions of the concave-convex microstructure2111, which in turn causes charges to accumulate at the convex portions, and thus a point discharge phenomenon occurs. An explanation of the electron beam emitted under the preset condition will be given in subsequent description of an inspection method for the μLED chip200, and details will not be provided here.

It will be understood that before the μLED chips200are transferred to the electronic apparatus01, an inspection needs to be performed on the μLED chips200, so as to detect whether the light-emitting function of the μLED chips200is normal. μLED chip(s)200with an abnormal display function will be discarded; and μLED chips200with a normal display function will be integrated again, and then be bonded onto the conductive substrate250by a mass transfer technology. In this way, it may be possible to avoid transferring the μLED chip(s)200with a poor display quality to the electronic apparatus01, and thus avoid image display problems in the electronic apparatus01.

A traditional process for inspecting a brightness and appearance of inorganic LEDs is to perform a photoluminescence (PL) excitation on the inorganic LEDs by laser or ultraviolet (UV) rays, and then to inspect the brightness and appearance of the inorganic LEDs by an automatic optical inspection (AOI) machine. However, PL properties of the inorganic LEDs are quite different from electroluminescence (EL) composite properties of the inorganic LEDs in an actual working condition; consequently, problems cannot be effectively inspected. In addition, the traditional EL inspection method requires probes, and cannot be used to inspect small-sized μLED chips in massive numbers.

In a case where the structure of the μLED chip200provided by the embodiments of the present disclosure is adopted, by providing the surface of the first semiconductor layer211of the μLED chip200away from the light-emitting layer212as the concave-convex microstructure2111, so that the convex portions of the concave-convex microstructure2111may receive the preset electron beam, and a condition for point discharge may be met. In this way, it may be possible to realize the non-contact direct EL inspection method. Compared with PL inspection technologies and contact EL inspection technologies in the related art, the non-contact EL inspection method facilitates the inspection of small-sized μLED chips200in massive numbers. The non-contact EL inspection method will be described in detail in subsequent embodiments, and details will not be provided here.

It will be noted that, the concave-convex microstructure2111has the convex portions and concave portions, and the convex portions and the concave portions are combined in a certain way, as long as a surface area may be increased as compared with a planar structure, and the point discharge condition is met. The convex portions of the concave-convex microstructure2111are portions of the concave-convex microstructure2111farthest from the light-emitting layer212, which makes it easier for the convex portions to receive the electron beam to realize point discharge, and facilitates the transfer of electrons.

It will be understood that the convex portion and the concave portion may be relative descriptions in terms of the structure. In a case where there are the convex portions, portions between the convex portions are the concave portions. Similarly, in a case where there are the concave portions, portions between the concave portions are the convex portions. Of course, it may also be that the convex portions and the concave portions exist at the same time, which further increases the surface area. For example, a sectional shape of the concave-convex microstructure2111in a thickness direction of the first semiconductor layer211is wavy.

In some embodiments, the concave-convex microstructure2111may be obtained by an epitaxial growth on a patterned wafer substrate500. For a specific implementation method, reference may be made to the description of a subsequent manufacturing process, and details will not be provided here.

In summary, the structure of the μLED chip200includes the first semiconductor layer211, the light-emitting layer212, the second semiconductor layer213and the first electrode layer220being stacked on the conductive substrate250(excluding the conductive substrate250itself). In this way, in the state where the first electrode layer220receives the high-level signal and the conductive substrate250receives the low-level signal, it may be possible to cause the electrons from the first semiconductor layer211and the holes from the second semiconductor layer213to combine in the light-emitting layer212, and give off energy in the form of photons, so that the light-emitting layer212of the μLED chip200emits light. In this way, the light-emitting function of the μLED chip200may be realized, and the display function of the electronic apparatus01may be realized.

In addition, by providing the surface of the first semiconductor211away from the light-emitting layer as the concave-convex microstructure, it may be possible to realize that the non-contact EL inspection method is used to inspect the light-emitting properties of the μLED chips200upon completion of fabrication. In this way, the inspection accuracy may be improved, and the inspection may be more convenient, since no probes are required.

In some embodiments of the present disclosure, as shown inFIG.3A, the convex portions2111aof the concave-convex microstructure2111may be composed of a plurality of cone-shaped portions, and vertices of the cone-shaped portions face a side of the first semiconductor layer211away from the second semiconductor layer213, and are configured to receive electron beams.

In some embodiments, the plurality of cone-shaped portions inFIG.3Amay be arranged in an array. In this case, a section of a corresponding cone-shaped portion inFIG.3Bin the thickness direction of the first semiconductor211is triangular, which facilitates the accumulation of charges to generate the point discharge. Of the plurality of cone-shaped portions arranged in an array, as shown inFIG.3B, a distance d between adjacent cone-shaped portions is set to a value in a range of 1000 nm to 2000 nm. In a case where the distance d is less than 1000 nm, the fabrication process is difficult, and costs are high. In a case where the distance d is greater than 2000 nm, it is not conductive to generating the point discharge. As shown inFIG.3B, a height h of a single cone-shaped portions is approximately set to a value in a range of 0 nm to 500 nm (excluding the endpoint value 0), and a diameter D of a bottom surface of a single cone-shaped portion is set to a value in a range of 1000 nm to 4000 nm (excluding the endpoint values 1000 nm and 4000 nm). In a case where the diameter D of the bottom surface is less than or equal to 1000 nm, the fabrication process is difficult, and the costs are high. In a case where the diameter D of the bottom surface is greater than or equal to 4000 nm, it is not conductive to generating the point discharge. A total thickness H of the first semiconductor layer211is approximately set to a value in a range of 400 nm to 2000 nm. It will be noted that, the total thickness H of the first semiconductor layer211refers to a distance between the vertice of the cone-shaped portion to a surface of the first semiconductor layer211proximate to the light-emitting layer212.

In some embodiments, as shown inFIG.4, the plurality of cone-shaped portions may also be randomly arranged, which may increase the difficulty of the fabrication process as compared with the arrangement in an array. The following embodiments of the present disclosure will all be described by taking an example where the plurality of cone-shaped portions are arranged in an array.

In some embodiments, a top of the cone-shaped portion in the above embodiments may also be a smooth curved surface, as long as the top of the cone-shaped portions is convex as a whole.

On this basis, in order to reduce an impedance of a contact interface between the second semiconductor layer213and the first electrode layer220, facilitate the transmission of holes at the contact interface between the second semiconductor layer213and the first electrode layer220, and thus increase combination efficiency of electrons and holes and the light-emitting efficiency, as shown inFIG.4, in some embodiments of the present disclosure, the μLED chip200may further include an ohmic contact layer240. The ohmic contact layer240is located between the first electrode layer220and the second semiconductor layer213, and is electrically connected to the first electrode layer220and the second semiconductor layer213.

It will be noted that the present disclosure does not limit a material of the ohmic contact layer240. For example, the ohmic contact layer240may be made of nickel (Ni) and gold (Au), where a Ni layer and an Au layer are stacked, the Ni layer is proximate to the first electrode layer220, and the Au layer is proximate to the second semiconductor layer213. In some embodiments of the present disclosure, a thickness of the Ni layer and a thickness of the Au layer may both be 5 nm. In this case, the impedance of the contact interface between the second semiconductor layer213and the first electrode layer220may be significantly reduced.

In this way, by providing the ohmic contact layer240in the μLED chip200, it may be possible to significantly reduce the impedance of the contact interface between the second semiconductor layer213and the first electrode layer220and thus facilitate the transmission of holes. As a result, more holes may enter the light-emitting layer212to combine with the electrons, and give off energy in the form of photons, thereby improving the light-emitting efficiency of the light-emitting layer212.

In addition, in order to make it easier to form an electric field, in some embodiments of the present disclosure, as shown inFIG.5, the μLED chip200further includes a second electrode layer230. The second electrode layer230is located on the side of the first semiconductor layer211away from the light-emitting layer212, and is electrically connected to the first semiconductor layer211.

For convenience of description, the following embodiments will all be described by taking an example where the μLED chip200has a structure as shown inFIG.2. In order to fabricate the μLED chip200shown inFIG.2, in some embodiments of the present disclosure, a μLED substrate800as shown inFIG.6is provided. The μLED substrate800is an intermediate product in a process of fabricating μLED chips200, and may be used in the fabrication and EL inspection of the μLED chips200.

As shown inFIG.6, the μLED substrate800may include: a substrate100and a plurality of μLED chips200disposed on the substrate100. The substrate100is configured to carry the plurality of μLED chips200. In addition, as shown inFIG.7(which is a section of the μLED substrate800shown inFIG.6taken along the Z-Z direction), the concave-convex microstructure2111in the μLED chip200is located on a side of the light-emitting layer212away from the substrate100.

It will be noted that the present disclosure does not limit a material of the substrate100. For example, the substrate100may be a glass substrate or a polymethyl methacrylate (PMMA) substrate. In addition, in some embodiments, the plurality of μLED chips200may be arranged in an array on the substrate100that is approximately circular, trapezoidal or polygonal. The embodiments of the present disclosure do not limit a specific shape of the substrate100, andFIG.6only illustrates an example for the shape of the substrate100.

It will be noted that the embodiments of the present disclosure are all described by taking an example where the plurality of μLED chips200are arranged in an array on the substrate100. However, the present disclosure is not limited thereto, and the plurality of μLED chips200may also be randomly arranged on the substrate100.

Based on a same inventive concept, embodiments of the present disclosure provide a method for manufacturing a μLED substrate. The method includes the steps R101to R105.

In R101, as shown inFIG.8A, a first semiconductor material layer810, a light-emitting material layer820and a second semiconductor material layer830are sequentially formed on a patterned wafer substrate500.

It will be noted that the embodiments of the present disclosure do not limit a method for forming the above film layers. For example, the film layers are formed by a chemical vapor deposition (CVD) method. In addition, the patterned wafer substrate500is a patterned wafer substrate500as shown inFIG.8, which is formed by growing a mask layer on a wafer substrate (e.g., sapphire) in advance, patterning the mask layer by a photolithography process, etching a surface of the wafer substrate by an etching process by using of the patterned mask layer as mask, and then removing the mask layer.

There are various types of patterns for the patterned wafer substrate500, and the pattern of the patterned wafer substrate500may be determined according to the concave-convex microstructure2111that is to be formed according to actual needs.FIG.8Aonly illustrates an example for the pattern of the patterned wafer substrate500.

In addition, before the epitaxial layer210is formed, the patterned wafer substrate500needs to be cleaned by a method, so as to remove impurities, and reduce an influence of the patterned wafer substrate500on crystal lattices of the epitaxial layer210.

In a μLED, before a first semiconductor layer (e.g., n-GaN) is formed on a wafer substrate (e.g., sapphire with a flat surface), in order for crystal lattices in the first semiconductor layer to grow well, an undoped semiconductor layer (e.g., u-GaN) for adjusting the crystal lattices generally needs to be formed on the wafer substrate in advance. Moreover, since the undoped semiconductor layer used for adjusting the crystal lattices is not conductive, the undoped semiconductor layer needs to be peeled off during chip testing, causing the process to be very complicated. In addition, the surface of the first semiconductor layer away from a light-emitting layer that is made by using the wafer substrate (e.g., the sapphire with the flat surface) is a planar structure. Therefore, it is not conducive to generating point discharge. That is, it is not applicable to non-contact EL inspection.

However, in the embodiments of the present disclosure, since the patterned wafer substrate500has a three-dimensional patterned structure, it is conducive to the growth of crystal lattices in the first semiconductor layer211. Therefore, there is no need to form the undoped semiconductor layer (e.g., the u-GaN layer) to adjust the crystal lattices before the epitaxial layer210is formed, which simplifies the manufacturing process. In addition, since the surface of the first semiconductor layer211away from the light-emitting layer212is the concave-convex microstructure2111, which makes it easier to generate the point discharge, the inspection efficiency may be improved.

In R102, as shown inFIG.8B, a first electrode material layer840is formed on a surface of the second semiconductor material layer830away from the light-emitting material layer820.

The embodiments of the present disclosure do not limit a specific material of the first electrode material layer840and a method for forming the first electrode material layer840. For example, the first electrode material layer840may be formed by a CVD method.

In R103, as shown inFIG.8C, the first semiconductor material layer810, the light-emitting material layer820, the second semiconductor material layer830and the first electrode material layer840are divided into an array, so as to form an array of μLED chips200.

In some embodiments, the arrayed division may be realized by using an arrayed etching process, so as to divide the first semiconductor material layer810, the light-emitting material layer820, the second semiconductor material layer830and the first electrode material layer840into the array as a whole to form the array of μLED chips200. After being divided into the array, the first semiconductor material layer810forms the first semiconductor layers211of the μLED chips200. After being divided into the array, the light-emitting material layer820forms light-emitting layers212of the μLED chips200. After being divided into the array, the second semiconductor material layer830forms second semiconductor layers213of the μLED chips200. After being divided into the array, the first electrode material layer840forms first electrode layers220of the μLED chips200.

It will be noted that the embodiments of the present disclosure do not limit a method for dividing the layers. For example, a laser with a certain amount of energy may be used to achieve a purpose of division. In addition,FIG.8Cmerely illustrates a case where only two μLED chips200are formed.

The array of μLED chips200means that the plurality of μLED chips200are arranged in the array, and the μLED chips200are independent of each other.

It will be noted that, a thickness of the patterned wafer substrate500is relatively large, and in a case where the laser division method is adopted for division to obtain the μLED chips200, the patterned wafer substrate500is basically unaffected or only slightly affected. After R103described above is performed, the formation of the μLED chips200is completed.

In R104, the first electrode layers220of the array of μLED chips200are all bonded to the substrate100.

As shown inFIG.8D, in order to perform a subsequent lighting test on all the μLED chips200, the first electrode layers220of the μLED chips200need to be bonded to the substrate100.

In some embodiments, in order to realize the transfer of the μLED chips200, the substrate100may be bonded to the first electrode layers220of the μLED chips200first, and then the array of μLED chips200with the patterned wafer substrate500is placed upside down.

In some other embodiments, in order to realize the transfer of the μLED chips200, the formed array of μLED chips200with the patterned wafer substrate500may be placed upside down first, and then be bonded to the substrate100, so as to bond the first electrode layers220to the substrate100.

In R105, as shown inFIG.8E, the patterned wafer substrate500is peeled off to obtain the μLED substrate800.

In some embodiments, the patterned wafer substrate500may be peeled off by a laser lift-off (LLO) method. For example, a laser is used to irradiate the patterned wafer substrate500from a side of the patterned wafer substrate500away from the first semiconductor layer211, so as to weaken a connection between the patterned wafer substrate500and the first semiconductor layer211, and therefore separate the two from each other. In this way, it may be possible to peel off of the μLED substrate800from the patterned wafer substrate and thus obtain the μLED substrate800.

After the peeling off operation is completed, concave-convex microstructures2111of the first semiconductor layers211of all the μLED chips200are exposed, so that the non-contact direct EL inspection may be performed.

Till this step, the μLED substrate800as shown inFIG.7is formed. Herein, the substrate100is used as a supporting body for the μLED substrate800.

In summary, in these embodiments, by using the patterned wafer substrate500to form the epitaxial layer210, it may be possible to omit the step of forming the undoped semiconductor layer, and thus simplify the manufacturing process. In addition, after the μLED chips200are transferred, the concave-convex microstructures2111of the first semiconductor layers211are exposed, which facilitates the operation of performing the non-contact direct EL inspection on the μLED chips200after the electrons of the electron beam are received. Moreover, since the surface of the first semiconductor layer211formed on a basis of the patterned wafer substrate500is the concave-convex microstructure, which makes it easier to generate the point discharge, the inspection efficiency may be improved.

On a basis of the above embodiments, in order to simplify process conditions and provide an electrical signal to the first electrode layers220of all the μLED chips200simultaneously, some embodiments of the present disclosure provides a possible implementation manner for the μLED substrate800, as described below.

As shown inFIG.9, a conductive adhesive layer300is provided between the first electrode layers220and the substrate100. The conductive adhesive layers300are in direct contact with and are electrically connected to the first electrode layer220, and the conductive adhesive layer300may be a one-piece entire layer of film disposed on the substrate100.

In this way, in these embodiments, by means of the conductive adhesive layer300pre-arranged on the substrate100, it may be possible to quickly realize a connection between the substrate100and the first electrode layers220of the μLED chips200, improve the manufacturing efficiency, and realize electrical conduction while ensuring a connection strength.

In some embodiments, the conductive adhesive layer300is made of acrylic adhesive, where the acrylic adhesive is doped with carbon nanotubes or silver nanowires to make the adhesive layer conductive.

In some embodiments of the present disclosure, in order to increase adhesion between the conductive adhesive layer300and the substrate100, so as to facilitate separation of the μLED chips200from the substrate100in a subsequent step, as shown inFIG.9, a release layer400is provided between the conductive adhesive layer300and the substrate100. The embodiments of the present disclosure do not limit a material of the release layer400. For example, the release layer400may be a conductive polymer film, which decomposes under irradiation of laser. In this way, by providing the release layer400in the μLED substrate800, it may be possible to facilitate the separation of the substrate100from the μLED chips200, which is conductive to the secondary integration of qualified μLED chips200that have been screened out. Moreover, as a modified layer between the conductive adhesive layer300and the substrate100, the release layer400may help improve the adhesion between the conductive adhesive layer300and the substrate100.

In a case where the μLED substrate800includes the conductive adhesive layer300and the release layer400, the method for manufacturing the μLED substrate800may further include: forming the release layer400and the conductive adhesive layer300on a surface of the substrate100sequentially before R104, and then connecting the conductive adhesive layer300to the first electrode layers220of the array of μLED chips200electrically.

In order to improve a lattice growth effect of the epitaxial layer210, the embodiments provides another method for manufacturing the μLED substrate800, which includes steps K101to K106.

In K101, as shown inFIG.10, a lattice adjustment layer600is formed on a patterned wafer substrate500.

In some embodiments, as shown inFIG.10, a thin lattice adjustment layer600is formed on the patterned wafer substrate, which facilitates the growth of the lattice of the first semiconductor material layer810in a subsequent process. The lattice adjustment layer600in these embodiments may be made of aluminum nitride (AlN), and should not be too thick. The lattice adjustment layer600is generally less than 10 nm thick, so as to avoid affecting a patterning effect of a surface of the first semiconductor material layer810.

In K102, a first semiconductor material layer810, a light-emitting material layer820and a second semiconductor material layer830are formed on a side of the lattice adjustment layer600away from the patterned wafer substrate500.

In K103, a first electrode material layer840is formed on the surface of the second semiconductor material layer830away from the light-emitting material layer820.

In K104, the first semiconductor material layer810, the light-emitting material layer820, the second semiconductor material layer830, the first electrode material layer840and the lattice adjustment layer600are divided into an array to form an array of μLED chips200.

In some embodiments, since the lattice adjustment layer600is provided, and the lattice adjustment layer600is rather thin, when the first electrode layer220and the epitaxial layer210are divided into the array, the lattice adjustment layer600may be divided simultaneously.

In K105, first electrode layers220of the array of μLED chips200are all bonded to the substrate100.

It will be noted that, the content of the steps K102, K103and K105in these embodiment is the same as the content of steps R101, R102and R104in the above embodiments, and details will not be repeated here.

In K106, the patterned wafer substrate500is peeled off to obtain the μLED substrate800.

In some embodiments, a LLO method may be used to peel off the array of μLED chips200, along with portions of the lattice adjustment layer600after being divided, from the patterned wafer substrate500, and remove the portions of the lattice adjustment layer600attached to the first semiconductor layers211of the array of μLED chips200. This is because the lattice adjustment layer600is not conductive, and in order to ensure a reliability of the subsequent EL inspection, the portions of the lattice adjustment layer600attached to the first semiconductor layer211needs to be removed completely, so as to ensure a conductive effect.

After the step K106is completed, the μLED substrate800as shown inFIG.7may be obtained.

In addition, for the μLED chip with a vertical structure, since the conductivity of n-GaN may meet a requirement of receiving electrons during the non-contact EL inspection, during the manufacturing process of the μLED substrate800, the second electrode layer230connected to the first semiconductor layer211may not be formed before the EL inspection. On a premise that the first semiconductor layer211is an n-type semiconductor, the second electrode layer is an n-electrode layer. After the EL inspection of the μLED chips is completed, the qualified μLED chips200are integrated, and then second electrode layers230connected to first semiconductor layers211(n-GaN) are formed on the first semiconductor layers211. In this way, the process efficiency may be improved, and the costs may be saved.

As can be seen from the above, before the formed μLED chips200are transferred to the electronic apparatus01, a test needs to be performed on the μLED chips200to detect whether the light-emitting function of the μLED chips200is normal. This is to avoid transferring μLED chips200with poor display quality to the electronic apparatus01, and thus avoid causing image display problems of the electronic apparatus01.

Based on the same inventive concept, as shown inFIG.11, embodiments of the present disclosure provide an EL inspection method and an EL inspection apparatus for the μLED chips200. The following embodiments will be described by taking the μLED substrate800having a structure as shown inFIG.7and a single μLED chip as an example. The inspection method may be performed by the inspection apparatus as shown inFIG.12. The EL inspection apparatus may include a discharge device2, a photoelectric detection component3, a processing unit1, and the μLED substrate800as described in any one of the above embodiments.

Both the discharge device2and the photoelectric detection component3are communicatively coupled to the processing unit1, so that the processing unit1controls the discharge device2and the photoelectric detection component3to work. Before the discharge device2emits the electron beam, the μLED substrate800and the discharge device2may be placed in a vacuum chamber. The first electrode layers220of the μLED substrate800receive a fixed level signal (such as a low level GND, or a common voltage signal VCOM). The photoelectric detection component3may be placed inside or outside of the vacuum chamber. Thus, the basic conditions for EL inspection are met.

On this basis, the EL inspection method includes steps S101to S105.

In S101, the μLED substrate800is placed in the vacuum chamber.

The μLED substrate800includes the substrate100and the plurality of μLED chips200. The plurality of μLED chips200are generally arranged in an array on the substrate100; and the μLED chips200are independent devices that do not affect each other. For a specific structure of the formed μLED substrate800, further references may be made to the content in the above embodiments, and details will not be repeated here. In some embodiments, as shown inFIG.12, the discharge device2that emits the electron beam may be placed in the vacuum chamber in advance, or may be placed in the vacuum chamber together with the μLED substrate to be tested; or, only electron guns of the discharge device are inserted into the vacuum chamber, which are not limited here.

Each μLED chip200includes a first semiconductor layer211. In this case, the first semiconductor layer211is a film layer farthest away from the substrate100in the μLED chip200. For example, the substrate100is a bottom layer of the μLED substrate, while the first semiconductor layer211of the μLED chip200is a top layer of the μLED substrate, thereby completing a structural design where the substrate100and the first semiconductor layer211are disposed on outermost sides of the μLED substrate and opposite to each other. The first semiconductor layer211of the μLED chip200is proximate to the discharge device2.

In S102, the first electrode layers220receive a fixed level signal.

In some embodiments, for a single μLED chip200, in order to form a discharge loop, before the electron beam is emitted, the first electrode layer220needs to receive a fixed level signal. In this way, after receiving electrons from the electron beam, the first semiconductor layer211of the μLED chip200may form a discharge loop with the first electrode layer220that has received the fixed level signal.

In addition, a specific form of the fixed level signal received may not be limited. For example, as shown inFIG.12, the fixed level signal is a ground voltage or a common voltage.

In some other embodiments, in a case where the μLED substrate800includes the conductive adhesive layer300, since the conductive adhesive layer300is a one-piece entire layer that may be directly electrically connected to the first electrode layers220of all the μLED chips200, as shown inFIG.13, it may be arranged that the conductive adhesive layer300directly receives the fixed level signal, so as to provide the fixed level signal to the first electrode layers220of all the μLED chips200. In this way, the process may be simplified, and the efficiency may be improved.

In S103, an electron beam is emitted to concave-convex microstructures (2111) of the first semiconductor layers211of all the μLED chips200, so as to excite the light-emitting layers212of all the μLED chips200to emit light.

During the EL inspection, since all the μLED chips200are independent of each other, each μLED chip200needs the electron beam to excite the light-emitting layer212of the μLED chip200to emit light, so as to realize the EL inspection of the μLED chip200.

In some embodiments, the discharge device2as shown inFIG.12may be used to emit the electron beam under a preset condition to the concave-convex microstructures2111, i.e., the surfaces of the first semiconductor layers211of all the μLED chips200, so as to excite the light-emitting layers212of all the μLED chips200to emit light.

The emitted electron beam scans all the μLED chips200in a certain scanning manner. In these embodiments, the scanning manner is not specifically limited, as long as it is ensured that the light-emitting layers212of all the μLED chips200can be excited to emit light.

It will be noted that the preset condition of the electron beam may be determined according to a specific film structure of the μLED chip200and the properties of the materials of the film layers. These embodiments do not limit the preset condition of the electron beam, as long as it is ensured that the light-emitting layers212of the μLED chips200can be excited to emit light normally, and the requirements of the EL inspection are met. In some embodiments, the electron beam in the above embodiments may be emitted by the discharge device2under a condition of a voltage being greater than 10 kilovolts (10 kV) and a current being greater than 10 to the minus 8 amperes (10−8A), so as to meet the discharge requirements of the μLED chips200during the EL inspection.

In S104, a light-emitting image signal of at least one μLED chip200is acquired.

In some embodiments, in order to detect whether the at least one μLED chips200are normal, after a light-emitting layer212of the at least one μLED chip200is excited, the light-emitting image signal of the at least one μLED chip200needs to be acquired to be used as a basis of detection.

In these embodiments, the light-emitting image signal of the at least one μLED chip200may be obtained by the photoelectric detection component3shown inFIG.12. In some embodiments, a charge coupled device (CCD) is adopted as the photoelectric detection component3, so as to improve the image acquisition accuracy.

It will be noted that, the light-emitting image signal of the at least one μLED chip200refer to a collection of at least one light-emitting sub-image signal of the at least one μLED chip200after each of the at least one μLED chip200is lighted. That is, the light-emitting image signal may be a light-emitting image signal of the entire array of μLED chips200(corresponding to a light-emitting image of the entire array of μLED chips200), or may be a light-emitting sub-image of a single μLED chip200, or may be composed of light-emitting sub-image signals of some of the entire array of μLED chips200(corresponding to a collection of the light-emitting sub-images of the some of the entire array of μLED chips200, i.e., a light-emitting image). For example, part (a) ofFIG.14is a light-emitting image corresponding to the light-emitting image signal of the some of the entire array of μLED chips200obtained by the photoelectric detection component3.

In addition, a light-emitting sub-image signal of each μLED chip200refers to a light-emitting sub-image signal corresponding to a light-emitting brightness of the μLED chip200that can be acquired after the light-emitting layer212of the μLED chip200emits light.

In S105, a light-emitting image corresponding to the acquired light-emitting image signal is compared with a preset image, so as to determine μLED chip(s)200with abnormal light emission.

In some embodiments, after all the light-emitting sub-image signals are acquired, a light-emitting brightness (or a gray scale) corresponding to each light-emitting sub-image signal is compared with a preset light-emitting brightness (or a preset gray scale) of a normal μLED chip. The processing unit1is used to determine the μLED chip(s)200corresponding to a portion of the light-emitting image signal that does not reach the preset light-emitting brightness (or the preset gray scale), and mark this type of μLED chip(s)200as defective chip(s); and determine μLED chips200corresponding to a portion of the light-emitting image signal that reaches the preset light-emitting brightness (or the preset gray scale) as qualified chip(s), so as to determine whether all the μLED chips200on the entire substrate100are normal.

In some embodiments, the processing unit1may be a programmable logic controller (PLC), or a central processing unit (CPU) applicable to a personal computer (PC).

For example, part (a) ofFIG.14is a light-emitting image (a single box represents a light-emitting sub-image corresponding to a single μLED chip200) corresponding to a light-emitting image signal of the some of the entire array of μLED chips200obtained by the photoelectric detection component3; and part (b) ofFIG.14is the preset image. It will be seen that light-emitting brightness of a light-emitting sub-image of a μLED chip200shown in the dashed box in part (a) ofFIG.14is different from light-emitting brightness of a μLED chip200shown in the dashed box at a same position in the preset image in part (b) ofFIG.14. In this case, the μLED chip200corresponding to the dashed box in part (a) ofFIG.14is a defective chip, and will be discarded in the subsequent process.

It will be noted that for electron beams with different preset conditions, corresponding preset images are different. In some embodiments, in order to improve the reliability of the detection, for example, the electron beam of a same preset condition may be used to perform a detection multiple times, so as to obtain a plurality of light-emitting image signals; and then a light-emitting image corresponding to the plurality of light-emitting image signals are compared with the preset image, so as to determine the abnormal μLED chip(s)200.

In some other embodiments, in order to improve the reliability of the detection, electron beams of different preset conditions may be used to excite a plurality of μLED chips200at a same position, so as to obtain different light-emitting image signals; and then light-emitting images corresponding to the different light-emitting image signals are compared with corresponding preset images, so as to determine whether the μLED chips200emit light normally.

For example, as shown inFIG.15, parts (c) and (e) ofFIG.15are light-emitting images of a plurality of μLED chips200at a same position that are obtained under two different preset conditions; part (d) ofFIG.15is a preset image corresponding to the light-emitting image in part (c) ofFIG.15; and part (f) ofFIG.15is a preset image corresponding to the light-emitting image in part (e) ofFIG.15. It will be seen that when an electron beam under one preset condition is used, the obtained light-emitting image corresponding to a light-emitting image signal of the plurality of μLED chips200is as shown in part (c) ofFIG.15, which is exactly the same as the preset image in part (d) ofFIG.15. However, when an electron beam under the other preset condition is used, the obtained light-emitting image corresponding to a light-emitting image signal of the plurality of μLED chips200at the same position is as shown in part (e) ofFIG.15, which is different from the preset image in part (f) ofFIG.15in that light-emitting brightness of a light-emitting sub-image corresponding to a μLED chip200in the dashed box appears abnormal. In this case, the μLED chip200corresponding to the dashed box in part (e) ofFIG.15will be defined as an unqualified μLED chip200, and will be discarded in a subsequent transfer process.

In addition, the unqualified μLED chip(s)200that have been determined will be directly discarded in a subsequent process, and the qualified μLED chips200will be transferred to another substrate for secondary integration.

In summary, in the EL inspection method provided by these embodiments, the electron beam with the preset condition is directly emitted to the concave-convex microstructure (2111) of the first semiconductor layer211of the μLED chip200; in a state that the first semiconductor layer220of the μLED chip200receives the fixed level signal, the electrons from the first semiconductor layer211and the holes from the second semiconductor layer213will combine in the light-emitting layer212, and give off energy in the form of photons; and by acquiring the light-emitting image signal of the μLED chips200when the μLED chips200emit light, it may be possible to perform a direct EL inspection on the μLED chips200. In this way, the inspection accuracy may be improved, and the inspection may be more convenient, since no probes are required.

After the inspection of the μLED chips200is completed, second electrode layers230are formed on μLED chips200that emit light normally, and then electrically connected to the conductive substrate250. Then, a side of the substrate100away from the first electrode layers220is irradiated with laser, so as to separate the μLED chips200from the substrate100. Till this step, the μLED chip200as shown inFIG.5may be obtained.

On a basis of the above embodiments, since the number of the μLED chips200in the μLED substrate800is large, it is difficult for the electron guns (not shown in FIG.12) of the existing discharge device2to cover all the μLEDs at one time. Herein, the electron guns adopt a preset scanning manner to realize the emission of the electron beams in practice. Based on this, embodiments of the present disclosure provide another EL inspection method for the μLED chips200. The EL inspection method includes steps L101to L106.

In L101, the μLED substrate800is placed in a vacuum chamber.

In L102, the first electrode layers220of the μLED substrate receive a fixed level signal.

In L103, the μLED substrate800is divided into a plurality of scanning regions.

In some embodiments, the processing unit1determines a size of the scanning region involved in the μLED chips200that can be scanned at the same time according to the array arrangement of the electron guns of the discharge device2, and ensures that the arrangement manner in each scanning region is the same or substantially the same, and the number of μLED chips200in each scanning region is the same or substantially the same, so as to improve the scanning efficiency.

There are various manners for arranging the electron guns in the array. For example, an array of 5×5 electron guns is adopted, in which case each scanning region includes a region covered by 5×5 μLED chips that are arranged in a matrix.

In L104, the electron beams are emitted to the μLED chips200in the plurality of scanning regions sequentially, so as to excite light-emitting layers212of the μLED chips200in a respective scanning region to emit light.

In some embodiments, a specific scanning path may be set for different scanning regions according to actual needs. In this step, the specific path is not limited, as long as it is only ensured that all the scanning regions can be scanned. The array of 5×5 electron guns scans 25 μLED chips200each time. In this case, the electron gun array is used to excite light-emitting layers212of the 25 μLED chips200to emit light.

In L105, light-emitting sub-image signals of the μLED chips200in each of the plurality of scanning regions are separately acquired, and all light-emitting sub-image signals are processed to obtain the light-emitting image signal.

In some embodiments, since the electron gun array adopts a scanning manner to excite the light-emitting layers212in each scanning region, there is a need to acquire corresponding light-emitting sub-image signals in time when the light-emitting layers212are excited to emit light each time, until the light-emitting sub-image signals of the μLED chips200in all the scanning regions are acquired. For example, when the light-emitting layers212of the 25 μLED chips200are excited by the electron gun array to emit light, the light-emitting sub-image signals of the 25 μLED chips200may be acquired in real time. After all the light-emitting sub-image signals are acquired, the processing unit1may process all the light-emitting sub-image signals. A processing process may be to splice the light-emitting sub-images corresponding to the light-emitting sub-image signals into a light-emitting image corresponding to the entire μLED substrate800, so that an operator may view and judge an inspection result more intuitively.

In L106, a light-emitting image corresponding to the obtained light-emitting image signal is compared with the preset image, and μLED chip(s)200with abnormal light emission are determined. A specific detection method of this step is similar to S105, and details will not be repeated here.

In summary, in the EL inspection method provided in these embodiments, a comprehensive EL inspection may be performed on the μLED chips200by means of electron beam scanning, which may solve a problem of increased inspection difficulty due to insufficient number of electron guns in the discharge device2and the massive number of μLED chips200.

On this basis, as shown inFIG.12, the inspection apparatus may further include a display device4, which may be located in a same PC as the processing unit1. The display device4is configured to visually present the light-emitting image signal that have been obtained in the form of pictures or image files, which may make it easier for the operator to view and judge the detection result, and thus improve the detection efficiency.

The EL inspection apparatus provided in these embodiments may directly emit the electron beams of the preset condition to the concave-convex microstructures2111of the first semiconductor layers211of the μLED chips200. In the state that the first electrode layers220of the μLED chips200receive the fixed level signal, the electrons from the first semiconductor layers211and the holes from the second semiconductor layers213may combine in the light-emitting layers212, and give off energy in the form of photons. By acquiring the light-emitting image signal of the μLED chips200when the μLED chips200emit light, it may be possible to perform a direct EL inspection on the μLED chips200. In this way, the inspection accuracy may be improved, and the inspection may be more convenient, since no probes are required.

On the basis of the above embodiments, in order to facilitate the detailed description of the scanning manner of the electron beams, these embodiments provide a possible implementation manner for the EL inspection apparatus of the μLED chips200, as described below.

The processing unit1divides the μLED substrate into a plurality of scanning regions, so that the discharge device2scans the first semiconductor layers211of all the μLED chips200in a preset manner.

The discharge device2includes an electron gun array, which is configured to emit the electron beams of the preset condition to the μLED chips200in the scanning regions sequentially, so as to excite the light-emitting layers212of the μLED chips200scanned by the electron beam to emit light.

The photoelectric detection component3is configured to acquire the light-emitting sub-image signals of the μLED chips200that are scanned in real time, and then obtain the light-emitting image signal of all the μLED chips200.

The foregoing descriptions are merely specific implementations of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art could conceive of changes or replacements within the technical scope of the present disclosure, which shall all be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.