Patent ID: 12218498

The foregoing and/or other aspects will become apparent from the following detailed description when considered in conjunction with the accompanying drawing figures.

DETAILED DESCRIPTION

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the like elements throughout. The embodiments are described below to explain the present invention by referring to the figures.

By way of introduction, different embodiments of the present invention are directed toward compensating for current variations in multiple junctions cells or in serially connected photovoltaic cells and/or panels such as during partial shading while maximizing power gain, by avoiding the loss of power from one or more photovoltaic cells and/or panels shorted by the cells and/or panels respective bypass diode.

Reference is now made back toFIG.3, which illustrates conventionally multiple multi-junction cells30connected in series, each with multiple serially connected photovoltaic junctions300,302, and304. It is well known that the spectrum of solar irradiance on the Earth's surface is not a constant but varies according to many variables such as season, geographic location, time of day, altitude, atmospheric conditions and pollution. Hence, it becomes apparent that photovoltaic junctions300,302, and304sensitive to different spectrum bands may be absorbing a different amount of light depending on season, geographic location, time of day, altitude, atmospheric conditions and pollution. Since photovoltaic junctions300,302, and304are connected in series, the same current flows through all of the junctions. Thus, the best power point of serially connected photovoltaic junctions300,302, and304maximizes the overall power from photovoltaic junctions300,302, and304, while each junction is typically producing a less than optimal amount of electrical power. On the other hand, a parallel connection of photovoltaic junctions and/or multi-junction cells, while allowing a better maximum power control for all photovoltaic junctions or multi-junction cells suffers among other possible power losses from an increase of ohmic power loss of the system since ohmic power loss is proportional to the square of the current. Furthermore, a parallel electrical connection of stacked pn junctions in a multi-junction cell is not particularly practical since multi-junction cells are typically stacked in a single production process and since the MPP voltage of each of these stacked pn junctions is different; the bandgap voltage for each pn junction is different.

The present invention in different embodiments may be applied to multiple photovoltaic cells and/or multi-junction photovoltaic cells connected in various series and parallel configurations with power converters/combiners to form a photovoltaic panel. Multiple series and parallel configurations of the photovoltaic panel and substrings within a panel with multiple power converters/combiners are used to form a photovoltaic installation. The present invention in further embodiments may be applied to other direct current power sources including batteries, fuel cells and direct current generators.

Embodiments of the present invention may be implemented by one skilled in the electronics arts using different inductive circuit elements such as transformers, auto-transformers, tapped coils, and/or multiple coils connected in serial and/or in parallel and these devices may be connected equivalently to construct the different embodiments of the present invention.

The terms “common”, “common terminal, “common reference” are used herein interchangeably referring to a reference common to both inputs and the output in the context of embodiments of the present invention. Typically, “common terminal” is ground, but the whole circuit may also be ungrounded. References to common terminal as ground are only illustrative and made for the reader's convenience.

Reference is now made toFIG.6which illustrates a block diagram of photovoltaic installation600with a power combiner604according to an embodiment of the present invention. A photovoltaic panel60has three photovoltaic cells606a-606cconnected in series. Photovoltaic cells606a-606care preferably multi-junction photovoltaic cells, photovoltaic cells or other direct current sources. An anode and cathode of a bypass diode D1connects across in parallel with photovoltaic cell606cat node F and node A respectively. An anode and cathode of a bypass diode D2connects across in parallel with photovoltaic cell606bat node A and node B respectively. An anode and cathode of a bypass diode D3connects across in parallel with photovoltaic cell606aat node B and node C respectively. Voltages V1, V2and V3are the voltage outputs of photovoltaic cells606c,606band606arespectively. Voltages V1, V2and V3are applied to three voltage inputs of power combiner604as between nodes C & B, B & A and nodes A & F respectively. Power combiner604has a single output voltage Vout.

Reference is now made toFIG.7which illustrates, according to an embodiment of the present invention, circuit details of DC power combiner604. Three voltages V1, V2and V3are input to power combiner604between nodes A and F, nodes B and A and nodes C and B respectively. Node B is on a “shared input terminal” of V2and V3. Similarly, node A is on a “shared input terminal” of V1and V2. One end of inductor L1connects to node C, the other end of inductor L1connects to one end of inductor L3to form node W. The other end of inductor L3connects to one end of inductor L5to form node X. The other end on inductor L5connects to the drain of MOSFET G1and the source of G1connects to node F (ground). One end of inductor L2connects to node C, the other end of inductor L2connects to one end of inductor L4to form node D. The other end of inductor L4connects to one end of inductor L6to form node E. The other end on inductor L5connects to the drain of MOSFET G2and the source of MOSFET G2connects node F (ground). The drain of MOSFET G5is connected to node W, the source of MOSFET G5connects to the source of MOSFET G6. The drain of MOSFET G6connects to node D. The drain of MOSFET G4is connected to node X, the source of MOSFET G4connects to the source of MOSFET G3. The drain of MOSFET G3connects to node E. The output voltage Voutof power combiner604is derived between nodes C and F (ground). A transformer core601is used to electromagnetically couple all inductors L5, L6, L3, L4, L1and L2. The winding polarity of L5, L3and L1is preferably opposite of the winding polarity of L6, L4and L2. The two inductors within each of the inductor pairs L5-L6, L3-L4and L1-L2typically have the same number of winding turns, although there can be a different number of turns to each of the inductor pairs (eg. L1and L2, L3and L4and L5and L6), to adjust the typical relative MPP voltage of each of the input voltages. Each of the three voltages V1, V2and V3are applied across each of inductors L5, L3and L1respectively with for instance a 50% duty cycle when switches G1, G4and G5are closed and switches G2, G3and G6are opened. Each of the three voltages V1, V2and V3are applied across each of the inductors L6, L4and L2respectively with typically a 50% duty cycle when switches G1, G4and G5are opened and switches G2, G3and G6are closed, thus completing a full switching cycle. The output voltage (Vout) of power combiner604is the sum of the input voltages V1, V2and V3. The input voltages V1, V2and V3of power combiner604are forced by power combiner604to have the same ratio as the winding ratio of their inductor pair (L5, L6), (L3, L4) and (L1, L2) respectively; a result of applying control pulses to switches G1-G6for instance with a 50% duty cycle. Switches G1-G6are optionally metal oxide semiconductor field-effect transistors (MOSFET). Alternatively the switches can, in different embodiments of the invention, be a silicon controlled rectifier (SCR), insulated gate bipolar junction transistor (IGBT), bipolar junction transistor (BJT), field effect transistor (FET), junction field effect transistor (JFET), switching diode, mechanically operated single pole double pole switch (SPDT), SPDT electrical relay, SPDT reed relay, SPDT solid state relay, insulated gate field effect transistor (IGFET), DIAC, and TRIAC.

Reference is now made toFIG.8which illustrates, according to another embodiment of the present invention, an alternative circuit of DC power combiner604. Three voltages V1, V2and V3are input to power combiner604between nodes A & F, B & A and nodes C & B respectively. One end of inductor L1connects to node C, the other end of inductor L1connects to the drain of MOSFET G1the source of G1connects to node B. One end of inductor L3connects to node B, the other end of inductor L3connects to the drain of MOSFET G3, the source of G3connects to node A. One end of inductor L5connects to node A, the other end of inductor L5connects to the drain of MOSFET G5, the source of G5connects to node F (ground). One end of inductor L2connects to node C, the other end of inductor L2connects to the drain of MOSFET G2, the source of G2connects to node B. One end of inductor L4connects to node B, the other end of inductor L4connects to the drain of MOSFET G4, the source of G4connects to node A. One end of inductor L6connects to node A, the other end of inductor L6connects to the drain of MOSFET G6, the source of G6connects to node F (ground). The output voltage Voutof power combiner604is derived between nodes C and F (ground). A transformer core601is used to electromagnetically couple all inductors L5, L6, L3, L4, L1and L2. The winding polarity of L5, L3and L1is preferably opposite of the winding polarity of L6, L4and L2respectively. The two inductors within each of the inductor pairs (L5and L6), (L3and L4) and (L1and L2) preferably have the same number of winding turns, although there can be a different number of turns to each of the inductor pairs, so as to adjust the typical relative MPP voltage of each of the input voltages.

Reference is now made toFIG.9which illustrates a photovoltaic system90including multiple power combiners604, according to an exemplary embodiment of the present invention. Photovoltaic system90has multiple series strings902connected in parallel to the input of DC to AC converter900. Series strings902have photovoltaic cells904a-904cwhich are for instance multi-junction photovoltaic cells which have three voltage outputs V1, V2and V3with three bypass diodes connected across each voltage output of photovoltaic cells904a-904c. Connected to each photovoltaic cells904a-904cis a three voltage input power combiner604. Power combiner604has a single voltage output (Vout) which is applied across the input of DC to DC converters92a-92c. The outputs of DC to DC converters92a-92care connected in series to form the input to DC to AC converter900and the output of multiple series strings902.

Reference is now made toFIG.10which illustrates a method10according to an embodiment of the present invention. In step11, DC voltage inputs are connected to inductive elements. In step13, the inductive elements are switched at a high frequency dependent on the inductance values so that the inductive elements do not tend to “short” the input DC voltages. In step15, a single output combines the DC inputs by connecting across typically the highest input voltage and a reference or ground common to both the DC inputs and the single output.

The definite articles “a”, “an” is used herein, such as “a multi-junction photovoltaic cell”, “a power combiner” or “a coil” have the meaning of “one or more multi-junction photovoltaic cells”, “one or more power combiners” or “one or more coils”.

Although selected embodiments of the present invention have been shown and described, it is to be understood the present invention is not limited to the described embodiments. Instead, it is to be appreciated that changes may be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and the equivalents thereof.