Patent ID: 12199077

DETAILED DESCRIPTION

In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of various exemplary embodiments or implementations of the invention. As used herein “embodiments” and “implementations” are interchangeable words that are non-limiting examples of devices or methods employing one or more of the inventive concepts disclosed herein. It is apparent, however, that various exemplary embodiments may be practiced without these specific details or with one or more equivalent arrangements. In other instances, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring various exemplary embodiments. Further, various exemplary embodiments may be different, but do not have to be exclusive. For example, specific shapes, configurations, and characteristics of an exemplary embodiment may be used or implemented in another exemplary embodiment without departing from the inventive concepts.

Unless otherwise specified, the illustrated exemplary embodiments are to be understood as providing exemplary features of varying detail of some ways in which the inventive concepts may be implemented in practice. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions, and/or aspects, etc. (hereinafter individually or collectively referred to as “elements”), of the various embodiments may be otherwise combined, separated, interchanged, and/or rearranged without departing from the inventive concepts.

The use of cross-hatching and/or shading in the accompanying drawings is generally provided to clarify boundaries between adjacent elements. As such, neither the presence nor the absence of cross-hatching or shading conveys or indicates any preference or requirement for particular materials, material properties, dimensions, proportions, commonalities between illustrated elements, and/or any other characteristic, attribute, property, etc., of the elements, unless specified. Further, in the accompanying drawings, the size and relative sizes of elements may be exaggerated for clarity and/or descriptive purposes. When an exemplary embodiment may be implemented differently, a specific process order may be performed differently from the described order. For example, two consecutively described processes may be performed substantially at the same time or performed in an order opposite to the described order. Also, like reference numerals denote like elements.

When an element, such as a layer, is referred to as being “on,” “connected to,” or “coupled to” another element or layer, it may be directly on, connected to, or coupled to the other element or layer or intervening elements or layers may be present. When, however, an element or layer is referred to as being “directly on,” “directly connected to,” or “directly coupled to” another element or layer, there are no intervening elements or layers present. To this end, the term “connected” may refer to physical, electrical, and/or fluid connection, with or without intervening elements. Further, the D1-axis, the D2-axis, and the D3-axis are not limited to three axes of a rectangular coordinate system, such as the x, y, and z-axes, and may be interpreted in a broader sense. For example, the D1-axis, the D2-axis, and the D3-axis may be perpendicular to one another, or may represent different directions that are not perpendicular to one another. For the purposes of this disclosure, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” may be construed as X only, Y only, Z only, or any combination of two or more of X, Y, and Z, such as, for instance, XYZ, XYY, YZ, and ZZ. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.

Although the terms “first,” “second,” etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Thus, a first element discussed below could be termed a second element without departing from the teachings of the disclosure.

Spatially relative terms, such as “beneath,” “below,” “under,” “lower,” “above,” “upper,” “over,” “higher,” “side” (e.g., as in “sidewall”), and the like, may be used herein for descriptive purposes, and, thereby, to describe one elements relationship to another element(s) as illustrated in the drawings. Spatially relative terms are intended to encompass different orientations of an apparatus in use, operation, and/or manufacture in addition to the orientation depicted in the drawings. For example, if the apparatus in the drawings is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the exemplary term “below” can encompass both an orientation of above and below. Furthermore, the apparatus may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and, as such, the spatially relative descriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, the singular forms, “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Moreover, the terms “comprises,” “comprising,” “includes,” and/or “including,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, components, and/or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It is also noted that, as used herein, the terms “substantially,” “about,” and other similar terms, are used as terms of approximation and not as terms of degree, and, as such, are utilized to account for inherent deviations in measured, calculated, and/or provided values that would be recognized by one of ordinary skill in the art.

Various exemplary embodiments are described herein with reference to sectional and/or exploded illustrations that are schematic illustrations of idealized exemplary embodiments and/or intermediate structures. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, exemplary embodiments disclosed herein should not necessarily be construed as limited to the particular illustrated shapes of regions, but are to include deviations in shapes that result from, for instance, manufacturing. In this manner, regions illustrated in the drawings may be schematic in nature and the shapes of these regions may not reflect actual shapes of regions of a device and, as such, are not necessarily intended to be limiting.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure is a part. Terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense, unless expressly so defined herein.

Hereinafter, exemplary embodiments will be described in detail with reference to the accompanying drawings.

FIG.2is a plan view of a substrate for manufacturing light emitting modules of a display device according to a first exemplary embodiment, andFIG.3is a rear view of the substrate ofFIG.2.FIG.4is an enlarged plan view of a light emitting module of the display device ofFIG.2.

Referring toFIG.2andFIG.3, a base substrate105for light emitting modules110used in manufacture of the display device100is first manufactured. AlthoughFIG.2andFIG.3exemplarily illustrate twelve light emitting modules110disposed on the base substrate105, the inventive concepts are not limited to a particular number of the light emitting modules110formed on the base substrate105.

The base substrate105may support multiple light emitting diode chips on an upper surface thereof. The base substrate105is typically formed of an insulation material, and may have a conductive circuit pattern on an upper surface thereof to supply electric power received from an external power source to each of light emitting diode chips. The base substrate105may be selected from among a ceramic substrate, a polyimide (PI) substrate, a Tap substrate, a glass wafer, a silicon wafer, and the like.

The base substrate105may be provided with multiple signal lines113and multiple common lines115. In addition, multiple upper common line terminals115aelectrically connected to the multiple common lines115may be formed on the upper surface105aof the base substrate105, as shown inFIG.2. The multiple signal lines113and the multiple common lines115may not be exposed on the upper surface105aof the base substrate105. Although the upper surface105aof the base substrate105according to the illustrated exemplary embodiment is not formed with multiple signal line terminals electrically connected to the multiple signal lines113, in other exemplary embodiments, the multiple signal line terminals may be formed on the upper surface105aof the base substrate105. The multiple upper common line terminals115amay be disposed along the periphery of a substrate111, from which the light emitting modules110are separated.

Mounts may be disposed inside the light emitting modules110, such that multiple light emitting diode chips, for example, a blue light emitting diode chip, a red light emitting diode chip, and a green light emitting diode chip, can be mounted thereon. The mounts may be formed inside the multiple upper common line terminals115aformed along the periphery of the substrate111of the light emitting modules110, and may be electrically connected to the multiple signal lines113and the multiple common lines115.

Further, as shown inFIG.3, multiple lower signal line terminals113band multiple lower common line terminals115belectrically connected to the multiple signal lines113and the multiple common lines115, respectively, may be formed on a lower surface105bof the base substrate105. The multiple lower common line terminals115bformed on the lower surface105bof the base substrate105may be disposed at locations corresponding to the multiple upper common line terminals115aformed on the upper surface105aof the base substrate105. The multiple upper common line terminals115amay be connected to the multiple lower common line terminals115bthrough the common lines115, respectively.

At least one of the multiple signal lines113and the multiple common lines115shown inFIG.2andFIG.3may be covered by an insulation layer, rather than being exposed on the upper surface105aor the lower surface105bof the base substrate105.

The multiple light emitting diode chips, for example, a blue light emitting diode chip, a red light emitting diode chip, and a green light emitting diode chip, may be mounted on the upper surface105aof the base substrate105by a single transfer process. After the multiple light emitting diode chips are mounted on the base substrate 1-5, the base substrate105may be cut in units corresponding to the light emitting modules110, thereby providing the light emitting modules110. In this manner, the light emitting modules110each including multiple blue light emitting diode chips122, multiple red light emitting diode chips124, and multiple green light emitting diode chips126on the substrate111can be manufactured as shown inFIG.4.

The light emitting modules110manufactured by the above process is shown inFIG.4. In the illustrated exemplary embodiment, although the multiple lower signal line terminals113a,113band the multiple upper and lower common line terminals115a,115bare shown as having relatively large sizes for illustration purposes, it should be understood that the multiple lower signal line terminals and the multiple upper and lower common line terminals may be formed to have small sizes, as needed.

Accordingly, a separation distance between the light emitting diode chips122,124,126in a single light emitting module110may be the same as a separation distance between the light emitting diode chips122,124,126disposed along an edge of another light emitting module110adjacent thereto.

Referring again toFIG.4, in the light emitting module110including the light emitting diode chips122,124,126mounted thereon, each of the light emitting diode chips122,124,126is mounted on the mount formed on the substrate to be electrically connected to the signal line113and the common line115. In addition, a single pixel P is formed by one blue light emitting diode chip122, one red light emitting diode chip124, and one green light emitting diode chip126. Although the illustrated exemplary embodiment shows that a single pixel includes one blue light emitting diode chip122, one red light emitting diode chip124, and one green light emitting diode chip126in a single pixel, in some exemplary embodiments, one pixel may include multiple blue, red, and green light emitting diode chips, as needed.

In the illustrated exemplary embodiment, each of the light emitting diode chips122,124,126may be electrically connected to the common line115and the signal line113. In particular, although an upper signal line is not shown inFIG.4, referring to the lower surface105bof the base substrate105shown inFIG.3, the blue light emitting diode chip122included in one pixel is electrically connected to a first signal line terminal113baand a first common line terminal115aa, and the red light emitting diode chip124therein is electrically connected to a second signal line terminal113bband the first common line terminal115aa. Further, the green light emitting diode chip126is electrically connected to a third signal line terminal113bcand the first common line terminal115aa.

Referring back toFIG.2andFIG.3, the multiple upper common line terminals115a, the multiple lower signal line terminals113b, and the multiple lower common line terminals115bare formed along the periphery of one light emitting module110on the base substrate105, and the light emitting diode chips122,124,126are disposed on the upper surface105aof the base substrate105. The lower signal line terminals113bmay be formed at both sides of one signal line113, and the upper and lower common line terminals115a,115bmay be formed at both sides of one common line115.

In addition, after the light emitting diode chips122,124,126are disposed on the upper surface105aof the base substrate105as shown inFIG.2, each of the light emitting modules110may be subjected to a test. The test may confirm normal operation of the multiple light emitting diode chips122,124,126mounted on the corresponding light emitting module110. Only the light emitting modules110passing the test are coupled to a motherboard130, thereby manufacturing the display device100.

Next, the motherboard130will be described with reference toFIG.5.

FIG.5is a plan view of a motherboard for manufacturing a display device according to an exemplary embodiment.

The motherboard130for manufacturing the display device100according to an exemplary embodiment has a structure shown inFIG.5. Although the motherboard130according to the illustrated exemplary embodiment is shown as having a size capable of mounting twelve light emitting modules110thereon, the motherboard130according to some exemplary embodiments may have a larger size and may have substantially the same size as the display device100to be manufactured.

Referring toFIG.5, the motherboard130according to the illustrated exemplary embodiment has substantially the same structure as that of the lower surface105bof the base substrate105shown inFIG.3. More particularly, like the base substrate105, the motherboard130may be formed with multiple board signal line terminals132aand multiple board common line terminals134awithout including multiple signal lines and multiple common lines. Alternatively, the motherboard130may be provided with the multiple signal lines and the multiple common lines together with the multiple board signal line terminals132aand the multiple board common line terminals134a.

The multiple board signal line terminals132aand the multiple board common line terminals134amay be disposed along the periphery of the motherboard130and inside the motherboard130. Accordingly, electric power and image signals may be transferred to the multiple light emitting modules110mounted on the motherboard130through the multiple board signal line terminals132aand the multiple board common line terminals134a.

FIG.6is a view illustrating a process of manufacturing the display device according to an exemplary embodiment, andFIG.7is a plan view of the motherboard of the display device according to an exemplary embodiment, on which the light emitting modules are mounted in some region of the motherboard.FIG.8is a cross-sectional view of the display device according to an exemplary embodiment.

Referring toFIG.6toFIG.8, a process of coupling the multiple light emitting modules110to the motherboard130will be described.

First, the first bonding layer142may be disposed on the motherboard130. The first bonding layer142may have the same size as the motherboard130or may have a smaller size than the motherboard130. The first bonding layer142may include an electrically conductive bonding material, and may include one of an anisotropic conductive film (ACF), anisotropic conductive pastes (ACP), self-assembly pastes (SAP/epoxy+Sn-Bi), eutectic, AuSn, AgSn, In, and solder pastes, without being limited thereto. The first bonding layer142may be formed of any material having both electrical conductivity and bonding properties.

The anisotropic conductive film includes an adhesive organic material having insulating properties, and conductive particles for electrical connection uniformly distributed therein. Accordingly, the anisotropic conductive film is a bonding material that exhibits conductivity in a pressure application direction, and insulating properties in a plane direction when the anisotropic conductive film is pressed to bond two materials in one direction.

The multiple light emitting modules110may be coupled to the motherboard130via the first bonding layer142disposed on the motherboard130. The multiple light emitting modules110may be coupled to the motherboard130such that adjacent light emitting modules110regularly adjoin each other at one side thereof on the motherboard130. As such, the lower signal line terminals113bof the adjacent light emitting modules110may be disposed on the board signal line terminals132aformed on the motherboard130, respectively, to be electrically connected thereto through the first bonding layer142. More particularly, as shown inFIG.8, through the first bonding layer142, the lower signal line terminals113bof one light emitting module110may be electrically connected to the board signal line terminals132aof the motherboard130, and the lower signal line terminals113bof another light emitting module110adjacent thereto may be electrically connected to the board signal line terminals132aof the motherboard130, thereby allowing electrical connection between the lower signal line terminals113bof the adjacent light emitting modules110.

As such, as shown inFIG.7, the light emitting modules110may be disposed on the motherboard130, and the lower signal line terminals113band the lower common line terminals115bdisposed on the lower surfaces of the light emitting modules110respectively adjoin the board signal line terminals132aand the board common line terminals134aof the motherboard130and be electrically connected thereto.

In this manner, as the multiple light emitting modules110are disposed adjacent to one another on the motherboard130, the multiple light emitting modules110may be electrically connected to one another using the motherboard130having a similar size to the display device100in manufacture of a large display device100, thereby allowing the multiple light emitting modules110to be driven at the same time.

FIG.9is a view illustrating connection between light emitting modules of a display device according to a second exemplary embodiment.

Unlike the display device according to the first exemplary embodiment, the display device according to the illustrated exemplary embodiment includes multiple upper signal line terminals113aon upper surfaces of the light emitting modules110. Although the multiple signal lines113and the multiple common lines115are exemplarily illustrated as being exposed on the upper surfaces of the light emitting modules110, the inventive concepts are not limited thereto.

Referring toFIG.9, electrical connection between adjacent light emitting modules110during manufacture of the display device100according to an exemplary embodiment will be described. As shown in the drawings, two or more light emitting modules110are disposed adjacent to each other, and the upper signal line terminals113aof adjacent light emitting modules110may be electrically connected to each other by wires W.

In this case, all of the upper signal line terminals113aof each of the light emitting modules110adjoining each other may be electrically connected to one another by the wires W. In addition, all of the upper common line terminals115aof each of the light emitting modules110adjoining each other may be electrically connected to one another by the wires W. As such, adjacent light emitting modules110are electrically connected, thereby allowing electrical connection between the multiple light emitting modules110without using a separate connector.

Unlike the first exemplary embodiment, the motherboard130according to the illustrated exemplary embodiment serves to support the multiple light emitting modules110, and may not be formed with the multiple board signal line terminals132aor the multiple board common line terminals134a. In addition, the lower signal line terminals113bor the lower common line terminals115bmay not be formed on the lower surface of each of the light emitting modules110.

According to the illustrated exemplary embodiment, the multiple light emitting modules110may be coupled to the upper surface of the motherboard130by a non-electrically conductive bonding layer.

FIG.10is a view illustrating connection between light emitting modules of a display device according to a third exemplary embodiment.

Referring toFIG.10, electrical connection between adjacent light emitting modules110during manufacture of the display device100according to an exemplary embodiment will be described. As shown in the drawings, two or more light emitting modules110are disposed adjacent to each other, and the upper signal line terminals113aof adjacent light emitting modules110may be electrically connected to each other by a second bonding layer144. As in the second exemplary embodiment, the light emitting module110according to the illustrated exemplary embodiment includes multiple upper signal line terminals113aformed on the upper surface thereof.

The second bonding layer144may include one of an anisotropic conductive film (ACF), anisotropic conductive pastes (ACP), self-assembly pastes (SAP/epoxy+Sn-Bi), eutectic, AuSn, AgSn, and In, and may be formed of solder pastes. The second bonding layer144may be formed to cover the upper signal line terminals113aof the adjacent light emitting modules110adjoining each other by connecting upper surfaces of the upper signal line terminals113ato each other, as shown inFIG.10. In this manner, the upper signal line terminals113aof the adjacent light emitting modules110may be electrically connected to each other by the second bonding layer144having electrical conductivity, thereby improving connection between the light emitting modules110.

In addition, according to the illustrated exemplary embodiment, all of the upper signal line terminals113aof all of the light emitting modules110adjoining each other may be electrically connected to one another by the second bonding layer144. In addition, all of the upper common line terminals115aof all of the light emitting modules110adjoining each other may be electrically connected to one another by the second bonding layer144. As such, the adjacent light emitting modules110are electrically connected to each other, thereby enabling electrical connection between the multiple light emitting modules110.

Further, as in the second exemplary embodiment, the motherboard130according to the third exemplary embodiment may serve only to support the multiple light emitting modules110, and the lower signal line terminals113bor the lower common line terminals115bmay not be formed on the lower surface of each of the light emitting modules110. In addition, coupling between the motherboard130and the multiple light emitting modules110may be achieved using a non-electrically conductive bonding layer.

FIG.11is a view illustrating connection between light emitting modules of a display device according to a fourth exemplary embodiment.

Referring toFIG.11, electrical connection between adjacent light emitting modules110during manufacture of the display device100according to an exemplary embodiment will be described. As shown in the drawings, two or more light emitting modules110are disposed adjacent to each other, and the upper signal line terminals113aof adjacent light emitting modules110may be electrically connected to each other by a third bonding layer146having electrical conductivity and interposed between the adjacent light emitting modules110.

The third bonding layer146may include an anisotropic conductive film (ACF), anisotropic conductive pastes (ACP), self-assembly pastes (SAP/epoxy+Sn-Bi), eutectic, AuSn, AgSn, In, solder paste, and the like.

According to the illustrated exemplary embodiment, each of the light emitting modules110may be formed with grooves or via-holes at locations corresponding to the lower signal line terminals113b, and the grooves or via-holes are filled with metal to form lateral signal line terminals113con a side surface of the light emitting module110. In this manner, the lateral signal line terminals113care formed on the side surface of the light emitting module110to be electrically connected to the multiple lower signal line terminals113bformed on the light emitting module110. In addition, third common line terminals are formed on a side surface of the light emitting modules110to be electrically connected to the multiple upper common line terminals115aformed on the light emitting module110.

As such, the lateral signal line terminals113cformed on the side surfaces of adjacent light emitting modules110may be disposed on the motherboard130while adjoining each other. In addition, the third bonding layer146having electrical conductivity is disposed between the adjacent light emitting modules110to couple the adjacent light emitting modules110to each other, while electrically connecting the lateral signal line terminals113cadjoining each other to each other, and the third common line terminals adjoining each other to each other.

Although the light emitting module110according to the illustrated exemplary embodiment is exemplarily shown as including the multiple upper signal line terminals113aon the upper surface thereof as in the second exemplary embodiment, the multiple upper signal line terminals may not be formed on the upper surface of the light emitting modules110as in the first exemplary embodiment.

Further, as in the second exemplary embodiment, the motherboard130according to the illustrated exemplary embodiment may serve only to support the multiple light emitting modules110, and the lower signal line terminals113bor the lower common line terminals115bmay not be formed on the lower surface of each of the light emitting modules110. In addition, coupling between the motherboard130and the multiple light emitting modules110may be achieved using a non-electrically conductive bonding layer.

FIG.12is a plan view of a display device according to another exemplary embodiment, andFIG.13is an enlarged plan view of portion P1ofFIG.12.

Referring toFIG.12andFIG.13, the display device according to the illustrated exemplary embodiment displays certain visual data, for example, text, video, photographs, two or three-dimensional images, and the like. The display device includes a display region PA, in which the images are displayed, and a peripheral region PPA disposed in at least one side of the display region PA. For example, the peripheral region PPA may be defined only at one side of the display region PA, or may be defined to surround the display region PA. In the display region PA, multiple pixels510are disposed to display an image.

The display device includes a display unit500and a printed circuit board200adapted to drive the display unit500. The display unit500is disposed in the display region PA and the printed circuit board200is disposed in a region excluding the display unit500, that is, in the peripheral region PPA or on the backside of the display unit500.

The display unit500may have a shape corresponding to the shape of the display device. For example, as in the display device, the display unit500may be provided in various shapes, for example, a closed polygonal shape including linear sides, such as a rectangular shape, a circular shape, an elliptical shape, a semicircular or semi-elliptical shape including a linear side and a curved side, and the like. In the illustrated exemplary embodiment, the display unit500has a rectangular shape.

The display region PA may be divided into multiple regions, each of which is provided with pixel units501. More particularly, the display unit500includes multiple pixel units501. Each of the pixel units501is provided with at least one pixel510to display an image.

The pixel units501may have various shapes in plan view. In one exemplary embodiment, the pixel units501may have a rectangular shape, without being limited thereto. Alternatively, the pixel units may have a triangular shape, a pentagonal shape, and other shapes.

The pixel units501may have the same area or different areas. In the illustrated exemplary embodiment, the pixel units501have the same areas, but are not limited thereto. Alternatively, some of the pixel units501may have the same area and the other pixel units501may have different areas.

Each of the pixel units501may have a different number of pixels510. For example, as shown inFIG.12andFIG.13, one pixel unit501may include 2×2, that is, 4 pixels, and another pixel unit501may include 2×3, that is, 6 pixels. The number of pixels510of the pixel units501may be changed in various ways in consideration of the areas, shapes, and resolution of the pixel units501.

The pixel units501are disposed in the display region PA to form the display unit500. The pixel units501may be combined in a patch work shape to display overall images.

Each of the pixels510in each pixel unit501may be the minimum unit for displaying an image. Each of the pixels510may emit white light and/or a color of light. Each of the pixels510may include a single pixel emitting one color, or may include multiple sub-pixels to emit white light and/or a color of light through combination of different colors. In an exemplary embodiment, each of the pixels may include a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B. However, the inventive concepts are not limited thereto. For example, in some exemplary embodiments, each of the pixels510may include a cyan sub-pixel, a magenta sub-pixel, and a yellow sub-pixel. Hereinafter, the pixel510will exemplarily be described as including the red sub-pixel R, the green sub-pixel G, and the blue sub-pixel B.

In the display unit500including the pixel units501, the pixels510and/or the sub-pixels included in each of the pixel units501are arranged in a matrix in the display region PA. As used herein, the expression “the pixels510and/or the sub-pixels are arranged in a matrix” may refer that the pixels and/or the sub-pixels are arranged accurately in lines along rows or columns, as well as that the pixels and/or the sub-pixels are generally arranged along the rows or the columns without being limited to particular locations thereof.

FIG.14is a structural view of a display device according to an exemplary embodiment.

Referring toFIG.14, the display device according to the illustrated exemplary embodiment includes a timing controller350, a scan drive unit310, a data drive unit380, an interconnection part, and pixels. When each of the pixels includes multiple sub-pixels511,513,515, each of the sub-pixels511,513,515is individually connected to the scan drive unit310and the data drive unit380through the interconnection part.

The timing controller350receives various control signals for driving the display unit500and image data from an external system, such as a system transmitting image data. Upon reception of the image data, the timing controller350rearranges the image data and transmits the rearranged image data to the data drive unit380. In addition, the timing controller350generates scan control signals and data control signals for driving the scan drive unit310and the data drive unit380, and transmits the scan control signals and the data control signals to the scan drive unit310and the data drive unit380, respectively.

The scan drive unit310receives the scan control signals from the timing controller350and generates scan signals in response to the scan control signals.

The data drive unit380receives the data control signals and the image data from the timing controller350and generates data signals in response to the data control signals and the image data.

The interconnection part includes multiple signal interconnects. More specifically, the interconnection part includes first interconnects530, which connect the scan drive unit310to the sub-pixels511,513,515, and second interconnects520, which connect the data drive unit380to the sub-pixels511,513,515. In the illustrated exemplary embodiment, the first interconnects530may be scan interconnects and the second interconnects520may be data interconnects. As such, hereinafter, the first interconnects530will be referred to as the scan interconnects and the second interconnects520will be referred to as the data interconnects. The interconnection part further includes interconnects that connect the timing controller350to the scan drive unit310, and connect the timing controller350to the data drive unit380, or other components to deliver corresponding signals.

The scan interconnects530supply the scanning signals generated by the scan drive unit310to the sub-pixels511,513,515. The data signals generated by the data drive unit380are output through the data interconnects520. The data signals output through the data interconnects520are input to the sub-pixels511,513,515in a horizontal pixel line selected by the scan signals.

The sub-pixels511,513,515are connected to the scan interconnects530and the data interconnects520. The sub-pixels511,513,515selectively emit light in response to the data signals input through the data interconnects520when the scan signals are supplied through the scan interconnects530. For example, each of the sub-pixels511,513,515emits light with brightness corresponding to the received data signals during each frame duration. Upon reception of data signals corresponding to black brightness, the sub-pixels511,513,515display a black color through non-emission of light during the corresponding frame duration.

According to another exemplary embodiment, upon active type driving of the display unit500, the display unit500may be driven by first and second pixel power sources in addition to the scan signals and the data signals, which will be described in more detail below.

According to exemplary embodiments, the pixels may be driven in a passive type driving method or an active type driving method.

FIG.15Ais a circuit diagram of a pixel forming a passive type display device. Here, the pixel may be one of sub-pixels, for example, one of a red sub-pixel, a green sub-pixel, and a blue sub-pixel. In the illustrated exemplary embodiment, the pixel will exemplarily be described with reference to a first sub-pixel511.

Referring toFIG.15A, the first sub-pixel511includes a light emitting device LD connected between the scan interconnect530and the data interconnect520. The light emitting device LD may be a light emitting diode including first and second terminals. The first and second terminals are connected to a first electrode (for example, anode) and a second electrode (for example, cathode) of the light emitting device, respectively. The first terminal may be connected to the scan interconnect530and the second terminal may be connected to the data interconnect520, or vice versa.

When a voltage greater than or equal to a threshold voltage is applied between the first electrode and the second electrode, the light emitting device LD emits light with brightness corresponding to the voltage. More particularly, light emission of the first sub-pixel511may be controlled by regulating voltage of scan signals applied to the scan interconnect530and/or voltage of data signals applied to the data interconnect520.

Although one light emitting device LD is illustrated as being connected between the scan interconnect530and the data interconnect520inFIG.15A, the inventive concepts are not limited thereto. For example, in some exemplary embodiments, multiple light emitting devices LD may be connected in series or in parallel to each other between the scan interconnect530and the data interconnect520.

FIG.15Bis a circuit diagram of the first sub-pixel511forming an active type display device. For the active type display device, the first sub-pixel511may be driven by first and second pixel power sources ELVDD, ELVSS in addition to the scan signal and the data signal.

Referring toFIG.15B, the first sub-pixel511includes at least one light emitting device LD and a transistor unit connected thereto.

The first electrode of the light emitting device LD is connected to the first pixel power source ELVDD through the transistor unit, and the second electrode is connected to the second pixel power source ELVSS therethrough. The first pixel power source ELVDD and the second pixel power source ELVSS may have different potentials. For example, the second pixel power source ELVSS may have a lower potential than the first pixel power source ELVDD by a threshold voltage or more of the light emitting device. Each of the light emitting devices emits light with brightness corresponding to drive current controlled by the transistor unit.

According to an exemplary embodiment, the transistor unit includes first and second transistors T1, T2and a storage capacitor Cst. The structure of the transistor unit is not limited to that shown inFIG.15B.

A source of the first transistor T1(switching transistor) is connected to the data interconnect520and a drain of the first transistor T1is connected to a first node N1. In addition, a gate of the first transistor T1is connected to the scan interconnect530. In this manner, the first transistor T1is turned on to electrically connect the data interconnect520to the first node N1when a scan signal of a voltage allowing the first transistor T1to be turned on is supplied through the scan interconnect530. Here, a data signal of the corresponding frame is supplied to the first node N1through the data interconnect520. The storage capacitor Cst is charged by the data signal supplied to the first node N1.

A source of the second transistor T2(drive transistor) is connected to the first pixel power source ELVDD and a drain of the second transistor T2is connected to the first electrode of the light emitting device. In addition, a gate of the second transistor T2is connected to the first node N1. In this manner, the second transistor T2controls the quantity of drive current to be supplied to the light emitting device corresponding to the voltage of the first node N1.

One electrode of the storage capacitor Cst is connected to the first pixel power source ELVDD and the other electrode of the storage capacitor is connected to the first node N1. The storage capacitor Cst is charged with a voltage corresponding to the data signal supplied to the first node N1and maintains the charged voltage until a data signal of another frame is supplied.

FIG.15Bexemplarily shows the transistor unit including two transistors. However, the inventive concepts are not limited thereto, and the structure of the transistor unit may be modified in various ways.

As described above, the display device according to an exemplary embodiment may be driven in an active type or a passive type. Hereinafter, the display device will exemplarily be described as being driven in a passive type.

FIG.16Ais a perspective view of a display device according to yet another exemplary embodiment, andFIG.16Bis a cross-sectional view taken along line I-I′ ofFIG.16A. A part of the display device shown inFIG.16Acorresponds to portion P1ofFIG.12andFIG.13. For convenience of description, some components of the display device are not shown inFIG.16A.

Referring toFIG.16AandFIG.16B, the display device according to the illustrated exemplary embodiment includes a display unit500and a printed circuit board200around the display unit500.

The display unit500includes multiple pixel units501. The pixel units501are separated from each other, and are arranged on the printed circuit board200.

Each of the pixel units501is provided with at least one pixel510, and each pixel510includes first to third sub-pixels. The first to third sub-pixels may be implemented by first to third light emitting devices511,513,515emitting light having different wavelengths. For example, the first to third light emitting devices511,513,515may be implemented by green, red, and blue light emitting diodes. However, for implementation of green light, red light and/or blue light, it is not necessary for the first to third sub-pixels to employ the green, red, and blue light emitting diodes, and the first to third sub-pixels may employ other light emitting diodes. For example, for implementation of red light, a blue or UV light emitting diode may be employed together with phosphors capable of emitting red light after absorption of blue or UV light, instead of the red light emitting diode. Likewise, for implementation of green light, the blue or UV light emitting diode may be employed together with phosphors capable of emitting green light after absorption of blue or UV light, instead of the green light emitting diode.

In the illustrated exemplary embodiment, the first sub-pixel is a green sub-pixel, the second sub-pixel is a red sub-pixel, and the third sub-pixel is a blue sub-pixel, and the first to third sub-pixels may be implemented by adopting the green, blue, and blue light emitting diodes as the first to third light emitting devices511,513,515, respectively. According to another exemplary embodiment, for emission of red light, the blue light emitting diode may be used as the second light emitting device513together with phosphors519that emit red light after absorption of blue or UV light.

The printed circuit board200is provided with circuits including a timing controller, a scan driving unit, and a data drive unit to drive the display unit500. The printed circuit board200is further provided with connection interconnects for connection between interconnects of the pixel units501in addition to the circuits mentioned above.

The printed circuit board200may be a double-sided printed circuit board200having interconnects on both surfaces thereof, in which the connection interconnects may include connection pads230pdisposed on an upper surface of the printed circuit board200and through-interconnects231formed through the printed circuit board200from the upper surface to a lower surface thereof. The circuits and the like may be disposed on the lower surface of the printed circuit board200, and the interconnects of the display unit may be connected to the interconnects and the circuits on the lower surface of the printed circuit board200through the through-interconnects231.

In the illustrated exemplary embodiment, the printed circuit board200is implemented by a plate-shaped board having a seating groove201, into which the display unit500is inserted. The seating groove201may be provided in the form of a groove depressed from the upper surface of the printed circuit board200. The printed circuit board200may have a larger area than the display unit500, and the seating groove201may be disposed inside the printed circuit board200in plan view. The display unit500is inserted into the seating groove201of the printed circuit board200and overlaps the printed circuit board200.

Connecting portions320,330are disposed between adjacent pixel units501, and between the adjacent pixel units501and the printed circuit board200, to electrically connect the interconnects between the adjacent pixel units501to each other, and to electrically connect the interconnects between the adjacent pixel units501and the printed circuit board200to each other.

The connecting portions320,330include a scan interconnect connecting portion adapted to connect the scan interconnects530between the adjacent pixel units501, and between the adjacent pixel units501and the printed circuit board200, and a data interconnect connecting portion320adapted to connect the data interconnects520between the adjacent pixel units501, and between the adjacent pixel units501and the printed circuit board200.

To this end, pads are provided to the pixel units501and the printed circuit board200to be connected to the connecting portions320,330. According to the illustrated exemplary embodiment, the pixel units501include scan interconnect pads530pfor connection of the scan interconnects530, and data interconnect pads520pfor connection of the data interconnects520. The printed circuit board200also includes scan interconnect pads230pfor connection of the scan interconnects530, and data interconnect pads220pfor connection of the data interconnects520.

Accordingly, for the scan interconnects530, the scan interconnect pads530p,230pfacing each other between the adjacent pixel units501and between the adjacent pixel units501and the printed circuit board200are connected through the scan interconnect connecting portion330. For the data interconnects520, the data interconnect pads520p,220pfacing each other between the adjacent pixel units501and between the adjacent pixel units501and the printed circuit board200are connected through the data interconnect connecting portion320.

In some exemplary embodiments, the scan interconnect connecting portion330and the data interconnect connecting portion320are provided in the form of bonding wires. As shown in the drawings, the bonding wires are disposed between two adjacent pads, such that one of the bonding wires contacts one of the two pads and the other contacts the other pad.

Here, the upper surface of the printed circuit board200may be coplanar with an upper surface of the display unit500. In this manner, connection of the connecting portions may be facilitated.

In some exemplary embodiments, the pixel units501may have various forms of pixels and interconnect structures.FIG.17Ais a plan view of a pixel unit501in the display device according to yet another exemplary embodiment, andFIG.17Bis a cross-sectional view taken along line ofFIG.17A. In the following description, connection between components in plan view will be first described, and then described in cross-sectional view with reference toFIG.17AandFIG.17B.

Referring toFIG.17AandFIG.17B, one pixel is provided with scan interconnects530, data interconnects520, and first to third light emitting devices511,513,515.

In the illustrated exemplary embodiment, one pixel is provided with a scan interconnect530extending in a first direction (for example, a horizontal direction) and three data interconnects extending in a second direction (for example, a vertical direction). The three data interconnects correspond to the first to third light emitting devices511,513,515, and will be referred to as first to third data interconnects521,523,525, respectively.

The scan interconnect530include first to third sub-scan interconnects530a,530b,530c. The scan interconnect530generally extends in the first direction and is provided with scan interconnect pads530pat opposite ends of the pixel unit in the first direction thereof. Here, the scan interconnect pads530pare not provided to each of the pixels, and are provided only to ends of the scan interconnect530adjacent to the periphery of the pixel unit501. In particular, the scan interconnect pads530pare not provided between adjacent pixels in the pixel unit501.

The first data interconnect521include first to third sub-data interconnects521a,521b,521celectrically connected to one another. The first data interconnect521generally extends in the second direction and is provided with first data interconnect pads521pat opposite ends of the pixel unit501in the second direction thereof. Here, the first data interconnect pads521pare not provided to each of the pixels and are provided only to ends of the first data interconnect521adjacent to the periphery of the pixel unit501. In particular, the first data interconnect pads521pare not provided between adjacent pixels in the pixel unit501.

Likewise, the second data interconnect523include first to third sub-data interconnects523a,523b,523celectrically connected to one another, and the third data interconnect525include first to third sub-data interconnects525a,525b,525celectrically connected to one another. In addition, the second and third data interconnects523,525generally extend in the second direction and are provided with second and third data interconnect pads523p,525pat the opposite ends of the pixel unit501in the second direction thereof, respectively.

The first light emitting device511is connected to the scan interconnect530and the first data interconnect521, the second light emitting device513is connected to the scan interconnect530and the second data interconnect523, and the third light emitting device515is connected to the scan interconnect530and the third data interconnect525. The first to third light emitting devices511,513,515in the same row share the same scan interconnects530.

More particularly, the scan interconnect530and the first data interconnect521are spaced apart from each other to face each other in plan view, and the first light emitting device511is disposed in a separation space therebetween. The first light emitting device511is disposed therein, such that one of the first and second terminals thereof overlaps the scan interconnect530and the other terminal of the first and second terminals overlaps the data interconnect520. Likewise, the second light emitting device513is disposed in a separation space between the scan interconnect530and the second data interconnect523spaced apart from each other to face each other in plan view, and the third light emitting device515is disposed in a separation space between the scan interconnect530and the third data interconnect525spaced apart from each other to face each other in plan view.

Next, the pixel unit501will be described with reference to the cross-sectional view. Each of the pixel units501includes a base substrate50. The base substrate50is provided to form the pixels on an upper surface thereof. The base substrate50is provided to each of the pixel units501, and is separated from other base substrates for the pixel units501.

The base substrate50may be formed of various insulating materials. For example, the base substrate50may be formed of glass, quartz, organic polymers, metal, and organic-inorganic composites. For the base substrate50formed of a conductive material, such as metal, an insulation layer is formed on the upper surface of the base substrate50to be used as an electrically insulating substrate. The base substrate50may be formed of a rigid material, without being limited thereto. Alternatively, the base substrate50may be formed of a flexible material. According to an exemplary embodiment, for a display device implemented by a bent or bendable display device, the base substrate50may be advantageously formed of a flexible material.

In one exemplary embodiment, a substrate formed of a material, such as glass, quartz, and metal, has higher heat resistance than an organic polymer substrate, and thus, has an advantage of enabling formation of various laminations thereon. A substrate formed of a transparent material, such as glass and quartz, is advantageous in manufacture of a front or rear light emissive display device. A substrate formed or an organic polymer or an organic-inorganic composite has relatively high flexibility, and may be advantageous in manufacture of a curved display device.

The second sub-data interconnects521b,523b,525bare disposed on the base substrate50. The second sub-data interconnects521b,523b,525bmay be formed of a conductive material, such as metals, metal oxides, and conductive polymers.

A first insulation layer20is formed on the second sub-data interconnects521b,523b,525b. The first insulation layer20may be an organic insulation layer or an inorganic insulation layer. The insulation layer may include various kinds of organic polymers, and the inorganic insulation layer may include silicon nitride, silicon oxide, silicon oxynitride, and the like.

The second sub-scan interconnect530bis disposed on the first insulation layer20. The second sub-scan interconnect530bmay be formed of a conductive material, such as metal, metal oxides, conductive polymers, and the like.

A second insulation layer30is disposed on the second sub-scan interconnect530b. The second insulation layer30may be an organic insulation layer or an inorganic insulation layer. The insulation layer may include various kinds of organic polymers, and the inorganic insulation layer may include silicon nitride, silicon oxide, silicon oxynitride, and the like.

The first and third sub-scan interconnects530a,530cand the first and third sub-data interconnects521a,523a,525a,521c,523c,525care disposed on the second insulation layer30.

The second insulation layer30is formed with contact holes that partially expose an upper surface of the second sub-scan interconnect530b. The second sub-scan interconnect530bis connected at one end thereof to the first sub-scan interconnect530aand at the other end thereof to the third sub-scan interconnect530cthrough the contact holes.

In addition, each of the first and second insulation layers20,30is formed with contact holes that partially expose upper surfaces of the second sub-data interconnects521b,523b,525b. The second sub-data interconnects521b,523b,525bare connected at one end thereof to the first sub-data interconnects521a,523a,525aand at the other end thereof to the third sub-data interconnects521c,523c,525cthrough the contact holes.

A third insulation layer40is disposed on the first and third sub-scan interconnects530a,530c, the first sub-data interconnects521a,523a,525a, and the third sub-data interconnects521c,523c,525c. In an exemplary embodiment, the third insulation layer40may be a light blocking layer. The light blocking layer may prevent reflection or transmission of light emitted from the light emitting device, and may have a black color. The light blocking layer may be formed of a non-conductive insulation layer, for example, non-conductive carbon black or black organic polymers, such as black resist.

The third insulation layer40corresponds to a portion at which the scan interconnect530is spaced apart from the first to third data interconnects521,523,525to face one another in plan view, and is formed with through-holes that expose portions to which the first to third light emitting devices511,513,515are connected. Solders516may be disposed in the through-holes, such that the first to third light emitting devices511,513,515are connected to the scan interconnect530and the first to third data interconnects521,523,525through the solders517.

In addition, the third insulation layer40is formed with through-holes that expose the scan interconnect pads530pand the data interconnect pads520p. The scan interconnect pads530pand the data interconnect pads520pexposed through the through-holes are connected to the upper surface of adjacent pixel units501or the adjacent printed circuit board200using the connecting portions320,330.

A phosphor519may be further disposed on the second light emitting device513. The phosphor519absorbs light emitted from the second light emitting device513and emits light having a longer wavelength. As described above, according to the illustrated exemplary embodiment, the phosphor519may emit red light through absorption of blue light. The phosphor may be provided in the form of a mixture with a transparent or translucent binder, such as polydimethylsiloxane (PDMS), polyimide (PI), poly(methyl 2-methylpropenoate) (PMMA), ceramics, and the like.

Although not shown in the drawings, a color filter, for example, a red color filter, may be disposed on the phosphor519. The color filter may improve purity of light by blocking blue or UV light that is not completely converted by the phosphor519.

An encapsulation layer550is disposed on the first to third light emitting devices511,513,515and the phosphor519. The encapsulation layer550covers the first to third light emitting devices511,513,515, the phosphor519, and the connecting portions of the scan interconnect pads530por the data interconnect pads520p.

The encapsulation layer550may be formed of a transparent insulation material. The material for the encapsulation layer550may be an organic polymer material, more particularly, an epoxy resin, polysiloxane or photo solder-resist. For example, the polysiloxane may include polydimethylsiloxane (PDMS). Alternatively, the material for the encapsulation layer may include hydrogen silsesquioxane (HSSQ), methylsilsesquioxane (MSSQ), polyimide, divinyl siloxane bis-benzocyclobutane (DVS-BCS), perfluorocyclobutane (PFCB), and polyarylene ether (PAE), without being limited thereto.

As described above, although each of the pixel units may include the scan interconnect, the data interconnects, and the light emitting devices therein, the inventive concepts are not limited thereto, and the scan interconnect, the data interconnects, and the light emitting devices may be changed in various ways. For example, connection relationships or interlayer locations of the scan interconnects and/or the data interconnects, the stacked structure of the insulation layers, and the structure of the light emitting device may be different from those of the above described exemplary embodiments.

In an exemplary embodiment, the first to third light emitting devices511,513,515may be flip-chip type light emitting diodes, andFIG.18is a cross-sectional view of a light emitting device according to an exemplary embodiment. The light emitting device shown inFIG.18may be one of the first to third light emitting devices511,513,515, and the following description will exemplarily be given with reference to the first light emitting device511.

Referring toFIG.18, the first light emitting device511includes a substrate1101, a first conductivity type semiconductor layer1110, an active layer1112, a second conductivity type semiconductor layer1114, a first contact layer1116, a second contact layer1118, an insulation layer1120, a first terminal1122, and a second terminal1124.

The substrate1101is a growth substrate for growth of III-V based nitride semiconductor layers thereon, and may include, for example, a sapphire substrate, more particularly, a patterned sapphire substrate. The substrate may be an insulation substrate, without being limited thereto. The substrate1101may be removed by laser lift-off or polishing.

The first conductivity type semiconductor layer1110, the active layer1112, and the second conductivity type semiconductor layer1114are formed on the substrate1101. The first conductivity type and the second conductivity type have opposite polarities. When the first conductivity type is n-type, the second conductivity type is p-type, and when the first conductivity type is p-type, the second conductivity type is n-type. In the illustrated exemplary embodiment, an n-type semiconductor layer, the active layer1112, and a p-type semiconductor layer are sequentially stacked on the substrate1101.

The n-type semiconductor layer1110, the active layer1112, and the p-type semiconductor layer1114may be formed of III-V based nitride semiconductors, for example, nitride semiconductors, such as (Al, Ga, In)N. The n-type semiconductor layer1110, the active layer1112, and the p-type semiconductor layer1114may be grown on the substrate1101in a chamber by a method well-known in the art, such as metal organic chemical vapor deposition (MOCVD). The n-type semiconductor layer1110includes n-type dopants, for example, Si, Ge, and Sn, and the p-type semiconductor layer1114includes p-type dopants, for example, Mg, Sr, and Ba. In an exemplary embodiment, the n-type semiconductor layer1110may include GaN or AlGaN including Si as dopants, and the p-type semiconductor layer1114may include GaN or AlGaN including Mg as dopants. Although each of the n-type semiconductor layer1110and the p-type semiconductor layer1114is illustrated as a single layer in the drawings, each of these semiconductor layers may be formed as multiple layers and may include a super-lattice layer. The active layer1112may include a single quantum well structure or a multi-quantum well structure, and the composition of the nitride semiconductor for the active layer1112may be adjusted to emit light in a desired wavelength band. For example, the active layer1112may emit blue or UV light.

The first contact layer1116is disposed in a region of the first conductivity type semiconductor layer1110, in which the active layer1112and the second conductivity type semiconductor layer1114are not formed, and the second contact layer1118is disposed on the second conductivity type semiconductor layer1114.

The first and/or second contact layer1116,1118may be formed as a single or multiple metal layers. The first and/or second contact layer1116,1118may include Al, Ti, Cr, Ni, Au, or alloys thereof.

The insulation layer1120is formed on the first and second contact layers1116,1118, and the first terminal1122and the second terminal1124are disposed on the insulation layer1120to be connected to the first contact layer1116and the second contact layer1118through the contact holes, respectively.

The first terminal1122may be connected to one of the scan interconnect and the data interconnect described above, and the second terminal1124may be connected to the other interconnect.

The first and/or second terminal(s)1122,1124may be formed as a single or multiple metal layers. The first and/or second terminal(s)1122,1124may include Al, Ti, Cr, Ni, Au, or alloys thereof.

Although the light emitting device according to the illustrated exemplary embodiment is briefly described above with reference to the drawing, the light emitting device may further include additional layers having other functions in addition to the layers described above. For example, the light emitting device may further include various layers, such as a reflective layer adapted to reflect light, an additional insulation layer adapted to insulate a certain component, an anti-solder diffusion layer adapted to prevent diffusion of solder, and the like.

Furthermore, in some exemplary embodiments, a mesa may be formed in various shapes and the locations or shapes of the first and second contact electrodes or the first and second terminals may be changed in various ways in formation of a flip-chip type light emitting device.

With the structure described above, the display device may be formed to have various shapes and various areas using multiple pixel units.

A typical display device is manufactured by forming individual light emitting device packages, mounting the light emitting device packages on a circuit board via solders to form light emitting modules, and connecting the light emitting modules to a drive circuit through connects. In this case, connection of the light emitting modules through the connectors requires use of structures, such as frames.

However, the display device according to exemplary embodiments can be manufactured simply by forming multiple pixel units on a circuit board and connecting the pixel units to the circuit board. In this case, since the pixel units are seated on the printed circuit board, the display device does not require a separate frame.

In particular, according to the exemplary embodiments, since the pixel unit may be formed to have various areas and various numbers of pixels, the display device can be easily manufactured by assembling the multiple pixel units in various sequences to correspond to the size and shape of a final display device. In addition, the pixel units may be disposed to have different resolutions corresponding to regions of the display device, thereby reducing manufacturing costs. Furthermore, even in use of a rigid base substrate, a display device having a generally curved shape can be manufactured through regulation of the size of the pixel units. Furthermore, in use of a flexible base substrate, a display device having a curved shape can be manufactured regardless of the size of the pixel units.

The display device according to the exemplary embodiments may be used as various kinds of display devices depending upon the sizes of individual pixels and pixel units, particularly as a large display device, such as a signboard.

The display device according to the exemplary embodiments includes multiple pixel units connected to one another, and allows easy repair when any one of the pixel units operates abnormally. For example, when there is a defective pixel unit in the display device, the defective pixel unit is removed from the display device and a separate pixel unit corresponding to the defective pixel unit is assembled to the display device, thereby resolving a problem of operation failure.

The display device according to the exemplary embodiments may be modified in various ways. For example, the display unit, the connecting portions, and the printed circuit board200may be modified in various shapes different from those of the above exemplary embodiments.FIG.19AtoFIG.19Eare cross-sectional views of the display device according to exemplary embodiments.FIG.19AtoFIG.19Eare cross-sectional view taken along line I-I′ ofFIG.16A.

Referring toFIG.16AandFIG.19A, the connecting portions are provided in a different form instead of the bonding wire.

In the illustrated exemplary embodiment, a connecting portion430may be formed of a conductive resin or a conductive paste, such as solder pastes, silver pastes, and the like.

Referring toFIG.19B, the seating groove201formed on the printed circuit board200to receive the pixel unit501therein may be provided in various numbers and shapes. Although the seating groove201is provided singularly corresponding to a display region, and the display units501are disposed in one seating groove201in the above described exemplary embodiment, the number of seating grooves201may be changed. According to the illustrated exemplary embodiment, the printed circuit board200on which the display unit is seated may include the seating grooves201corresponding to the respective pixel units501. For the structure in which the multiple seating grooves201are provided corresponding to the display unit500, it is possible to stably secure bonding strength between the display unit500and the printed circuit board200.

Referring toFIG.19C, the printed circuit board200may further include additional pads230pand through-interconnects231between the pixel unit501and the pixel unit501in addition to the pads230pdisposed along the outer periphery of the display device. Referring toFIG.19C, the additional pads230may be formed between the two adjacent pixel unit501disposed on the printed circuit board200, and may be electrically connected to the interconnection part on the lower surface of the printed circuit board200through the through-electrodes231. In addition, the pads530pof the two pixel units501may be electrically connected to each other through the connecting portion430, such as a conductive paste. In this manner, the printed circuit board200is formed with multiple through-electrodes231, and the pixel units501are electrically connected to the pads530ptherethrough, whereby concentration of the interconnects can be relieved in the peripheral region while reducing a delay of signals applied to the pixel units501or voltage drop, thereby realizing stable transfer of the signals.

Furthermore, according to some exemplary embodiments, the connecting portions may be implemented through combination in various ways, as needed. Referring toFIG.19C, the connecting portion330between the printed circuit board200and the pixel unit501in the peripheral region may be implemented by a bonding wire, and the connecting portion430between the pixel unit501and the pixel unit501may be implemented by a conductive paste. In this manner, the connecting portions may be selected in consideration of the structure of a component or manufacturing complexity.

Referring toFIG.19D, the printed circuit board200on which the pixel units501are mounted may be provided without having the seating grooves. In the illustrated exemplary embodiment, the printed circuit board200has a plate shape and the display unit500is disposed on the flat printed circuit board200. In this case, the display unit500has a smaller area than the printed circuit board200, and the pads230are disposed on the upper surface of the printed circuit board200where the display unit500does not overlap the printed circuit board200. The connecting portion330may be implemented by a bonding wire, which may be connected at one end thereof to the pad530pof the display unit500and at the other end thereof to the pad of the printed circuit board200. In the illustrated exemplary embodiment, the process of forming a seating portion on the printed circuit board200is omitted, thereby simplifying manufacture of the display device.

Referring toFIG.19E, a connecting portion530adapted to connect the pixel unit501to the printed circuit board200may be implemented by a flexible circuit board (or tape carrier package) instead of the bonding wire or the conductive paste. In this case, the flexible circuit board may be connected at one end thereof to the pad530pof the display unit500and at the other end thereof to a pad230pformed on a front or lower surface of the printed circuit board200. The flexible circuit board may be connected to the pad of the display unit500and/or the pad of the printed circuit board200via an anisotropic conductive film interposed therebetween or by connectors. The flexible circuit board may be provided with a circuit, such as a driver IC and the like, and can reduce the thickness or size of the printed circuit board200.

In the above exemplary embodiments, the display unit500is disposed on the printed circuit board200to overlap the printed circuit board200. However, the inventive concepts are not limited thereto. In a structure allowing the pixel units501of the display unit500to be stably secured, in which a separate support substrate may be further provided, as needed, the printed circuit board200can be minimized or omitted.

Although a large display device can be implemented by the display device according to the above exemplary embodiments, it is possible to implement a display device having a larger area than atypical display device by assembling multiple display modules each implemented by the display device according to the exemplary embodiments.FIG.20is a perspective view of a large multi-module display device according to one embodiment of the present disclosure.

Referring toFIG.20, the multi-module display device1000may include multiple display modules DM. InFIG.20, 4×4 display modules DM may form one multi-module display device. The display modules DM may have at least one of the structures of the exemplary embodiments described above. For example, each of the display modules DM includes a display unit500and a printed circuit board200, and may include multiple display units501having different areas, as in a display module MD shown in the first row and the first column ofFIG.20.

According to an exemplary embodiment, each or at least some of the multiple display modules DM may be independently driven. Alternatively, at least some display modules DM may be dependently driven in association with the other display modules DM. The multiple display modules DM are driven in association with one another, thereby displaying a single image thereon.

Although the multiple display modules DM are illustrated as having the same size in the illustrated exemplary embodiment, the inventive concepts are not limited thereto. Alternatively, at least one display module DM may have a different size than the other display modules DM. In addition, at least one display module DM may have a different number of pixels, and thus, have a different resolution than the other display modules DM. In addition, when there is no need for the same resolution in every region of the display device, the multi-module display device may be manufactured by arranging the display modules DM having different resolutions.

The display device having the above structure may be manufactured by the following method.FIG.21AtoFIG.21Eare cross-sectional views illustrating a method for manufacturing a display device according to an exemplary embodiment. Hereinafter, some components of the display device may not be shown for convenience of description.

First, referring toFIG.21A, a base mother substrate50mis prepared and an interconnection part including scan interconnects and data interconnects is formed on the base mother substrate50m.

More particularly, the interconnection part used for multiple pixel units is formed on the base mother substrate50m. In particular, the scan interconnects, the data interconnects, and the first to third insulation layers are formed on the base mother substrate50m.

The base mother substrate50mmay have imaginary cutting lines IL, along which the base mother substrate50mcan be divided into multiple base substrates for the multiple pixel units, by cutting. When regions corresponding to the pixel units are referred to as pixel unit regions, the imaginary cutting lines IL are disposed along peripheries of the regions for the pixel units501.

Upper surfaces of some scan interconnects and some data interconnects are exposed for electrical connection to light emitting devices, and upper surfaces of the other scan interconnects and the other data interconnects correspond to pads, and are exposed for electrical connection to adjacent pixel units and the printed circuit board. InFIG.21A, SLP indicates a pad of the scan interconnects and the data interconnects, and SL indicates a portion to which a light emitting device will be provided.

In an exemplary embodiment, the scan interconnects, the data interconnects, and the first to third insulation layers can be easily formed by sputtering, deposition, coating, molding, photolithography, and the like. In particular, the scan interconnects and the data interconnects for multiple pixels and pixel units may be formed through a minimal process using a large base mother substrate50m.

For an active type display device according to an exemplary embodiment, transistors may be formed together with the interconnection part. The interconnection part and the transistors can be easily formed on the base mother substrate50mby sputtering, deposition, coating, molding, photolithography, and the like. In particular, when the base mother substrate50mis formed of a heat resistant material, a high temperature process may be employed in formation of the interconnection part and the transistor. Further, when photolithography is used in the process of forming the scan interconnects, the data interconnects, and the first to third insulation layers20,3040, it is possible to form the transistors and the interconnects having a small line width.

Referring toFIG.21B, light emitting devices LD are formed on the base mother substrate50mhaving the interconnection part thereon. The light emitting devices LD are not disposed on the pad SLP, and are disposed to contact the corresponding scan interconnects and the corresponding data interconnects. Although not shown in the drawings, solders may be provided to portions of the scan interconnects and the data interconnects to which the light emitting devices LD are attached.

The light emitting devices LD may be formed on the base mother substrate50mby a transfer process. More particularly, the light emitting devices LD may be formed on a separate substrate and then transferred to the base mother substrate50m. In this case, the same kind of light emitting device LD may be transferred to the base mother substrate50mthrough a single process.

After transfer of the light emitting devices LD, a process of forming a phosphor and a color filter may be selectively performed before formation of an encapsulation layer. As described in the above exemplary embodiments, in implementation of a red pixel using a blue or UV light emitting device and a phosphor, the phosphor may be formed on the light emitting device corresponding to the red pixel.

Next, referring toFIG.21C, the base mother substrate50mhaving the light emitting devices formed thereon is cut along cutting lines CLN by a cutting blade BL, and the cut portions may form the pixel units501, respectively. The base mother substrate50mmay be cut in various ways, for example, a laser, scribing, and the like.

Then, referring toFIG.21D, a printed circuit board200having seating grooves is prepared, and pixel units501are disposed on the seating grooves to be secured thereto. Although not shown in the drawings, a bonding agent may be disposed between the printed circuit board200and the pixel units501and between adjacent pixel units501, such that the pixel units501can be stably secured to the printed circuit board200by the bonding agent. The bonding agent may include, for example, an epoxy-based bonding agent or a silicon-based bonding agent. However, the inventive concepts are not limited thereto, and the bonding agent may be selected from any bonding agents capable of securing the pixel units501to the printed circuit board200.

Then, referring toFIG.21E, adjacent pixel units501may be connected to each other and the printed circuit board200may be connected to the pixel units501through connecting portions CL. The connecting portions CL may electrically connect the adjacent pixel units501to each other, and may electrically connect the printed circuit board200to the pixel units501. The connecting portions CL may employ various methods as described above. In the illustrated exemplary embodiment, as the connecting portions CL, bonding wires are used to connect the adjacent pixel units501to each other, and to connect the printed circuit board200to the pixel units501.

Then, although not shown in the drawings, the encapsulation layer may be formed on the pixel units501and the connecting portions Cl. The encapsulation layer serves to protect the light emitting devices, the phosphor, and the wire in each of the pixel units501, and may be formed through deposition and molding.

As described above, according to the illustrated exemplary embodiment, after simultaneous formation of the interconnection part and/or the transistors corresponding to multiple pixel units on the base mother substrate, multiple pixel units having the same or different areas can be formed at the same time by cutting the base mother substrate. In this manner, display devices having various areas and various shapes can be manufactured by connecting the multiple pixel units through the connecting portions.

Next, a light emitting apparatus according to yet other exemplary embodiments will be described.

As used herein, the light emitting apparatus may refer to a display device and/or a lighting apparatus, which include light emitting devices. In the light emitting apparatus according to exemplary embodiments, when light emitting devices of a pixel unit are used as pixels, the light emitting apparatus may be used as a display device. The display device includes TVs, a tablet display device, an e-book display device, a computer monitor, a kiosk, a digital camera, a game console, or a large outdoor/indoor electronic scoreboard.

The lighting apparatus includes a backlight unit used in the display device, and may include indoor/outdoor lighting lamps, street lamps, vehicular lamps, and the like.

The light emitting apparatus according to an exemplary embodiment may include micro-light emitting devices. The micro-light emitting devices may have a width or a length of about 1 micrometer to about 800 micrometer, about 1 micrometer to about 500 micrometer, or about 10 micrometer to about 300 micrometer. However, the inventive concepts are not limited to a particular width or length of the micro-light emitting devices, and the micro-light emitting devices may have a smaller or greater size, as needed.

FIG.22is a plan view of a display device according to an exemplary embodiment, andFIG.23is an enlarged plan view of portion P1ofFIG.22.

Referring toFIG.22andFIG.23, the display device600according to the illustrated exemplary embodiment displays certain visual data, for example, text, video, photographs, two or three-dimensional images, and the like.

The display device600may be provided in various shapes, for example, a closed polygonal shape including linear sides, such as a rectangular shape, a circular shape, an elliptical shape, a semicircular or semi-elliptical shape including a linear side and a curved side, and the like. In the illustrated exemplary embodiment, the display device has a rectangular shape.

The display device600includes multiple pixel units610, which display images. Each of the pixel units610may be the minimum unit for displaying an image. Each of the pixel units610may emit white light and/or a colored light. Each of the pixel units610may include one pixel emitting one color, or may include multiple pixels to emit white light and/or a colored light through combination of different colors. For example, each of the pixel units610may include first to third pixels611P,613P,615P.

In an exemplary embodiment, each of the pixel unit610may include a green pixel G, a red pixel R, and a blue pixel B, and the first to third pixels611P,613P,615P may correspond to the green pixel G, the red pixel R, and the blue pixel B, respectively. However, the inventive concepts are not limited thereto. For example, in some exemplary embodiments, each of the pixel units610may include a cyan pixel, a magenta pixel, a yellow pixel, and the like. Hereinafter, each of the pixel units will be described as including the green pixel G, the red pixel R, and the blue pixel B according to an exemplary embodiment.

The pixel units610and/or the pixels611P,613P,615P are arranged in a matrix. As used herein, the phrase “pixel units610and/or the pixels611P,613P,615P are arranged in a matrix” means not only that the pixel units610and/or the pixels611P,613P,615P are arranged accurately in lines along rows or columns, but also that the pixel units610and/or the pixels611P,613P,615P are generally arranged in lines along the rows or the columns without being limited to particular locations thereof, such as being arranged in a zigzag shape.

FIG.24is a structural view of a display device according to an exemplary embodiment.

Referring toFIG.24, the display device600according to the illustrated exemplary embodiment includes a timing controller350, a scan drive unit310, a data drive unit380, an interconnection part, and pixel units. When each of the pixel units includes multiple pixels611P,613P,615P, each of the pixels611P,613P,615P is connected to the scan drive unit310, the data drive unit380, and the like, through an individual interconnection part.

The timing controller350receives various control signals for driving the display device and image data from an external system, such as a system transmitting image data. Upon reception of the image data, the timing controller350rearranges the image data and transmits the rearranged image data to the data drive unit380. In addition, the timing controller350generates scan control signals and data control signals for driving the scan drive unit310and the data drive unit380, and transmits the scan control signals and the data control signals to the scan drive unit310and the data drive unit380, respectively.

The scan drive unit310receives the scan control signals from the timing controller350and generates scan signals in response to the scan control signals.

The data drive unit380receives the data control signals and the image data from the timing controller350and generates data signals in response to the data control signals and the image data.

The interconnection part includes multiple signal interconnects. More particularly, the interconnection part includes first interconnects630, which connect the scan drive unit310to the pixels611P,613P,615P, and second interconnects620, which connect the data drive unit380to the pixels611P,613P,615P. In the illustrated exemplary embodiment, the first interconnects630may be scan interconnects and the second interconnects620may be data interconnects. As such, the first interconnects630will be referred to as scan interconnects, and the second interconnects520will be referred to as data interconnects. The interconnection part further includes interconnects that connect the timing controller350to the scan drive unit310and connect the timing controller350to the data drive unit380or other components to deliver corresponding signals.

The scan interconnects630supply the scanning signals generated by the scan drive unit310to the pixels611P,613P,615P. The data signals generated by the data drive unit380are output through the data interconnects620. The data signals output through the data interconnects620are input to the pixels611P,613P,615P in a horizontal pixel unit line selected by the scan signals.

The pixels611P,613P,615P are connected to the scan interconnects630and the data interconnects620. The pixels611P,613P,615P selectively emit light in response to the data signals input through the data interconnects620when the scan signals are supplied through the scan interconnects630. For example, each of the pixels611P,613P,615P emits light with brightness corresponding to the received data signals during each frame duration. Upon reception of data signals corresponding to black brightness, the pixels611P,613P,615P display a black color through non-emission of light during the corresponding frame duration.

The pixels may be driven in a passive type driving method or an active type driving method. Upon active driving of the display device, the display device may be driven by first and second pixel power sources in addition to the scan signals and the data signals.

FIG.25Ais a circuit diagram of a pixel forming a passive type display device. The pixel may be one of pixels, for example, one of a red pixel, a green pixel, and a blue pixel. In the illustrated exemplary embodiment, the pixel will be described with reference to the first pixel611P.

Referring toFIG.25A, the first pixel611P includes a light emitting device LD connected between the scan interconnect630and the data interconnect620. The light emitting device LD may be a light emitting diode including first and second terminals. The first and second terminals are connected to a first electrode (for example, anode) and a second electrode (for example, cathode) of the light emitting device, respectively. The first terminal may be connected to the scan interconnect630and the second terminal may be connected to the data interconnect620, or vice versa.

When a voltage greater than or equal to a threshold voltage is applied between the first electrode and the second electrode, the light emitting device LD emits light with brightness corresponding to the voltage. In particular, light emission of the first pixel611P may be controlled by regulating voltage of scan signals applied to the scan interconnect630and/or voltage of data signals applied to the data interconnect620.

Although one light emitting device LD is illustrated as being connected between the scan interconnect630and the data interconnect620in the illustrated exemplary embodiment, the inventive concepts are not limited thereto. For example, in some exemplary embodiments, multiple light emitting devices LD may be connected in series or in parallel to each other between the scan interconnect630and the data interconnect620.

FIG.25Bis a circuit diagram of the first pixel611P forming an active type display device. For the active type display device, the first pixel611P may be driven by first and second pixel power sources ELVDD, ELVSS in addition to the scan signal and the data signal.

Referring toFIG.25B, the first pixel611P includes at least one light emitting device LD and a transistor unit TFT connected thereto.

The first electrode of the light emitting device LD is connected to the first pixel power source ELVDD through the transistor unit TFT, and the second electrode is connected to the second pixel power source ELVSS therethrough. The first pixel power source ELVDD and the second pixel power source ELVSS may have different potentials. For example, the second pixel power source ELVSS may have a lower potential than the first pixel power source ELVDD by a threshold voltage or more of the light emitting device. Each of the light emitting devices emits light with brightness corresponding to drive current controlled by the transistor unit TFT.

According to an exemplary embodiment, the transistor unit includes first and second transistors T1, T2and a storage capacitor Cst. However, the structure of the transistor unit is not limited to that shown inFIG.25B.

A source of the first transistor T1(e.g., switching transistor) is connected to the data interconnect620, and a drain of the first transistor T1is connected to a first node N1. In addition, a gate of the first transistor T1is connected to the scan interconnect630. In this manner, the first transistor is turned on to electrically connect the data interconnect620to the first node N1when a scan signal of a voltage allowing the first transistor T1to be turned on is supplied through the scan interconnect630. Here, a data signal of the corresponding frame is supplied to the first node N1through the data interconnect620. The storage capacitor Cst is charged by the data signal supplied to the first node N1.

A source of the second transistor T2(e.g., driving transistor) is connected to the first pixel power source ELVDD, and a drain of the second transistor T2is connected to the first electrode of the light emitting device. In addition, a gate of the second transistor T2is connected to the first node N1. In this manner, the second transistor T2controls the amount of drive current to be supplied to the light emitting device corresponding to the voltage of the first node N1.

One electrode of the storage capacitor Cst is connected to the first pixel power source ELVDD and the other electrode of the storage capacitor is connected to the first node N1. The storage capacitor Cst is charged with a voltage corresponding to the data signal supplied to the first node N1, and maintains the charged voltage until a data signal of another frame is supplied.

FIG.25Bexemplarily shows that the transistor unit includes two transistors. However, the inventive concepts are not limited thereto, and the structure of the transistor unit may be modified in various ways. For example, the transistor unit may include more transistors or capacitors. In addition, although the detailed structures of the first and second transistors, the storage capacitor, and the interconnects are not shown inFIG.25B, the first and second transistors, the storage capacitor, and the interconnects may be provided in various forms so as to implement circuits according to exemplary embodiments.

FIG.26is a perspective view of a display device according to yet another exemplary embodiment corresponding toFIG.23.FIG.27Ais a plan view of one pixel unit of the display device shown inFIG.26, andFIG.27Bis a cross-sectional view taken along line III-III′ ofFIG.27A.

Referring toFIG.26,FIG.27A, andFIG.27B, the display device according to the illustrated exemplary embodiment includes a base substrate700and pixel units610mounted on the base substrate700.

The base substrate700may include an interconnection part to supply power and signals to the pixel units610.

Although not shown in the drawings, transistor units and/or an interconnection part including scan interconnects and data interconnects connected to the pixel units are formed on the base substrate700.

In the illustrated exemplary embodiment, the base substrate700may be a printed circuit board. When the base substrate700is implemented by the printed circuit board, not only the interconnection part connected to the pixel units610, but also circuits, such as a timing controller, a scan drive unit, a data drive unit, and the like, may be mounted on the printed circuit board.

The printed circuit board may be a double-sided printed circuit board having the interconnection part formed on both surfaces thereof. The interconnection part may include connection pads disposed on an upper surface of the printed circuit board, and through-interconnects formed through the printed circuit board from the upper surface to the lower surface thereof so as to be connected to the pixel units610. The circuits and the like may be disposed on the lower surface of the printed circuit board200, and the interconnects of the pixel units610may be connected to the interconnects and the circuits on the lower surface of the printed circuit board through the connection pads and the through-interconnects.

In some exemplary embodiments, the base substrate700may be implemented by other members allowing the pixel units610to be mounted thereon, rather than the printed circuit board. For example, the base substrate700may be an insulation substrate, such as a glass, quartz or plastic substrate, which has the interconnection part thereon. In this case, the circuits, such as a timing controller, a scan drive unit, a data drive unit, and the like, may be directly formed on the insulation substrate or may be formed on a separate printed circuit board to be connected to the interconnection part on the insulation substrate.

The base substrate700may be formed of a rigid material, without being limited thereto. Alternatively, the base substrate700may be formed of a flexible material. According to an exemplary embodiment, for a display device implemented by a bent or bendable display device, the base substrate700may be advantageously formed of a flexible material. According to another exemplary embodiment, the base substrate700formed of a transparent material, such as glass and quartz, has higher flexibility than an organic polymer substrate, and thus, advantageously allows various laminations on the upper surface thereof and facilitates manufacture of a front or rear light emissive display device. The base substrate700formed of an organic polymer or an organic-inorganic composite has relatively high flexibility, and may be advantageous in manufacture of a curved display device.

One or more pixel units610are mounted on the base substrate700with a first conductive bonding layer661interposed therebetween. In the display device, the pixel units610are separated from each other to form minimum units to be mounted on the base substrate700, provided in the form of packages, and mounted in a pixel region PA of the base substrate700.

Each of the pixel units610may be provided with at least one pixel each including first to third pixels. The first to third the pixels611P,613P,615P may be implemented by first to third light emitting devices611,613,615emitting light having different wavelengths. In particular, when light components emitted from the first to third the pixels611P,613P,615P are referred to as first to third light components, respectively, the first to third light components may have different wavelength bands. In the illustrated exemplary embodiment, the first to third light components may have green, red, and blue wavelength bands, respectively, as described above, and the first to third light emitting devices611,613,615may be implemented by green, red, and blue light emitting diodes.

However, in some exemplary embodiments, the first to third light components may implement green light, red light, and blue light without having the green, red, and blue wavelength bands. For example, even when the first to third light components have the same wavelength band, a final color of light output can be controlled using a color converter640adapted to convert some of the first to third light components into light having a different wavelength band from the first to third light components. The color converter640includes a color conversion layer641that converts light having a certain wavelength into light having a different wavelength.

In particular, for implementation of green light, red light and/or blue light, it is not necessary for the first to third the pixels611P,613P,615P to employ the green, red and/or blue light emitting diodes, and the first to third the pixels611P,613P,615P may employ other light emitting diodes. For example, for implementation of red light, a blue or UV light emitting diode may be employed together with a color conversion layer641that emits red light after absorption of blue or UV light, instead of the red light emitting diode. Likewise, for implementation of green light, the blue or UV light emitting diode may be employed together with a color conversion layer641that emits green light after absorption of blue or UV light.

The color conversion layer641may selectively employ any material capable of converting light having a certain wavelength into light having a different wavelength. For example, the color conversion layer641may include at least one of phosphors, nano-structures, such as quantum dots, organic materials capable of converting a color, and combinations thereof. The color conversion layer641may include a color filter layer643to improve purity of a color finally emitted therefrom.

In the illustrated exemplary embodiment, the first to third light emitting devices611,613,615may be implemented by adopting green, blue, and blue light emitting diodes. In this case, in order to emit red light, a blue light emitting diode may be used as the second light emitting device613and the color conversion layer641may include phosphors to emit red light after absorption of blue light.

Each pixel unit610is provided with connection electrodes, for example, first to fourth connection electrodes621,623,625,631, which are connected to the interconnection part of the base substrate700, that is, the scan interconnects and the data interconnects. The first to fourth connection electrodes621,623,625,631are electrically connected to the interconnection part on the base substrate700with the first conductive bonding layer661interposed therebetween.

The first conductive bonding layer661is provided for electrical connection, and may be formed of a conductive resin or a conductive paste, such as solder pastes, silver pastes, and the like. However, the first conductive bonding layer661is not limited thereto.

The first to fourth connection electrodes621,623,625,631include a fourth connection electrode631extending in one direction, such as in the longitudinal direction, in one pixel region, and first to third connection electrodes621,623,625spaced apart from the fourth connection electrode631. The fourth connection electrode631is connected to the scan interconnect of the base substrate700. The first to third connection electrodes621,623,625are provided corresponding to the number of light emitting devices, that is, three in the illustrated exemplary embodiment, and are connected to the data interconnects of the base substrate700.

A light non-transmitting layer670is disposed on the first to fourth connection electrodes621,623,625,631.

The light non-transmitting layer670is an insulation layer formed of a non-conductive material, and does not allow transmission of light therethrough. In an exemplary embodiment, the light non-transmitting layer670may be formed of a light absorption material. The light non-transmitting layer670may exhibit black and may be formed of, for example, a black matrix material used in a display device. In the illustrated exemplary embodiment, the light non-transmitting layer670may be formed of a black photo-sensitive resist. The light non-transmitting layer670formed of the black photo-sensitive resist facilitates patterning process using photolithography. However, the light non-transmitting layer670is not limited thereto, and may be formed of various materials.

A second conductive bonding layer663is disposed on the light non-transmitting layer670. The light non-transmitting layer670is partially removed to form multiple through-holes TH, which expose at least part of the connection electrodes. The through-holes TH are formed to electrically connect the first to third light emitting devices611,613,615to the first to fourth connection electrodes621,623,625,631through the second conductive bonding layer663. To this end, the through-holes TH are formed in regions of the second conductive bonding layer663corresponding to regions to which the first to third light emitting devices611,613,615are to be attached.

The second conductive bonding layer663is provided to multiple through-holes TH formed in the light non-transmitting layer670. The second conductive bonding layer663may be formed to have an upper surface placed above the upper surface of the light non-transmitting layer670in order to allow the light emitting devices to be easily attached thereto.

The second conductive bonding layer663is provided for electrical connection, and may be formed of a conductive resin or a conductive paste, such as solder pastes, silver pastes, and the like. However, the material for the second conductive bonding layer663is not limited thereto.

The first to third light emitting devices611,613,615are disposed on the second conductive bonding layer663. Each of the first to third light emitting devices611,613,615may be a light emitting diode having a first terminal and a second terminal. Although the second light emitting device613and the third light emitting device615are illustrated as having the same size, the first to third light emitting devices611,613,615may have the same size or different sizes. In particular, at least one of the first to third light emitting devices611,613,615may have a different height than the other light emitting devices. The heights of the first to third light emitting devices611,613,615may be changed depending upon the materials for the first to third light emitting devices611,613,615or optical characteristics thereof. For example, the first light emitting device611emitting green light may have a greater height than the third light emitting device615emitting blue light. The internal structures of the first and third light emitting devices611,615will be described in more detail below.

The color converter640is disposed on the second light emitting device613. The color converter640may include the color conversion layer641and the color filter layer643.

The color conversion layer641absorbs light emitted from the second light emitting device613and emits light having a different wavelength from light emitted from the second light emitting device613, as described above. In particular, the color conversion layer641absorbs light having a relatively short wavelength and emits light having a longer wavelength than the absorbed light. As described above, according to the illustrated exemplary embodiment, a phosphor may be used as the color conversion layer641. The phosphor may emit red light through absorption of blue light. The phosphor may be provided in the form of a mixture with a transparent or translucent binder, such as polydimethylsiloxane (PDMS), polyimide (PI), poly(methyl 2-methylpropenoate) (PMMA), ceramics, and the like.

The color filter layer643, for example, a red color filter layer, may be disposed on the color conversion layer641. The color filter layer643serves to improve purity of light by blocking blue or UV light that is not completely converted by the phosphor641. Further, the color filter layer643prevents light emitted from the second light emitting device613from being mixed with light emitted from the first and third light emitting devices611,615by blocking light emitted from the first and third light emitting devices. Although the color filter layer643may be omitted, the presence of the color filter layer643can realize a color having higher purity.

An encapsulation layer650may be disposed on the first to third light emitting devices611,613,615and the color filter layer643. The encapsulation layer650covers the first to third light emitting devices611,613,615, the color conversion layer641, and the color filter layer643.

The encapsulation layer650may be formed of a transparent insulation material. The material for the encapsulation layer650may be an organic polymer material, particularly, an epoxy resin, polysiloxane or photoresist. For example, the polysiloxane may include polydimethylsiloxane (PDMS). Alternatively, the material for the encapsulation layer650may include hydrogen silsesquioxane (HSSQ), methylsilsesquioxane (MSSQ), polyimide, divinyl siloxane bis-benzocyclobutane (DVS-BCS), perfluorocyclobutane (PFCB), and polyarylene ether (PAE), without being limited thereto.

In an exemplary embodiment, the first to third light emitting devices611,613,615may employ flip-chip type light emitting diodes.FIG.28is a schematic cross-sectional view of a light emitting device according to an exemplary embodiment. The light emitting device shown inFIG.28may be one of the first to third light emitting devices611,613,615, and the following description will be given with reference to the first light emitting device611.

Referring toFIG.28, the first light emitting device611includes a first conductivity type semiconductor layer1110, an active layer1112, a second conductivity type semiconductor layer1114, a first contact layer1116, a second contact layer1118, an insulation layer1120, a first terminal1122, and a second terminal1124.

As described with reference toFIG.18, the first conductivity type semiconductor layer1110, the active layer1112, and the second conductivity type semiconductor layer1114are grown on the substrate1101. The substrate1101is a growth substrate for growth of III-V based nitride semiconductor layers, and may include, for example, a sapphire substrate, more particularly, a patterned sapphire substrate. The substrate1101may be an insulation substrate, without being limited thereto.

Semiconductor layers are formed on the substrate1101. In an exemplary embodiment, for a light emitting device emitting green light, the semiconductor layers may include indium gallium nitride (InGaN), gallium nitride (GaN), gallium phosphide (GaP), aluminum gallium indium phosphide (AlGaInP), and aluminum gallium phosphide (AlGaP). In another exemplary embodiment, for a light emitting device emitting red light, the semiconductor layers may include aluminum gallium arsenide (AlGaAs), gallium arsenide phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), and gallium phosphide (GaP). In a further exemplary embodiment, for a light emitting device emitting blue light, the semiconductor layers may include gallium nitride (GaN), indium gallium nitride (InGaN), and zinc selenide (ZnSe).

The substrate1101may be removed from the semiconductor layers1110,1112,1114by laser lift-off or polishing.

As described above, the semiconductor layers include the first conductivity type semiconductor layer1110, the active layer1112, and the second conductivity type semiconductor layer1114. The first conductivity type and the second conductivity type have opposite polarities. When the first conductivity type is n-type, the second conductivity type is p-type, and when the first conductivity type is p-type, the second conductivity type is n-type. In the illustrated exemplary embodiment, an n-type semiconductor layer1110, the active layer1112and a p-type semiconductor layer1114are sequentially stacked on the substrate1101.

The n-type semiconductor layer1110, the active layer1112, and the p-type semiconductor layer1114may be formed of III-V based nitride semiconductors, for example, nitride semiconductors, such as (Al, Ga, In)N. The n-type semiconductor layer1110, the active layer1112, and the p-type semiconductor layer1114may be grown on the substrate1101in a chamber by a method well-known in the art, such as metal organic chemical vapor deposition (MOCVD). The n-type semiconductor layer1110includes n-type dopants, for example, Si, Ge, and Sn, and the p-type semiconductor layer1114includes p-type dopants, for example, Mg, Sr, and Ba. In an exemplary embodiment, the n-type semiconductor layer1110may include GaN or AlGaN including Si as dopants, and the p-type semiconductor layer1114may include GaN or AlGaN including Mg as dopants.

Although each of the n-type semiconductor layer1110and the p-type semiconductor layer1114is illustrated as a single layer in the drawings, each of these semiconductor layers may be formed as multiple layers and may include a super-lattice layer. The active layer1112may include a single quantum well structure or a multi-quantum well structure, and the composition of the nitride semiconductor for the active layer1112may be adjusted to emit light in a desired wavelength band. For example, the active layer1112may emit blue or UV light.

The first contact layer1116is disposed in a region of the first conductivity type semiconductor layer1110in which the active layer1112and the second conductivity type semiconductor layer1114are not formed, and the second contact layer1118is disposed on the second conductivity type semiconductor layer1114

The first and/or second contact layer1116,1118may be formed as a single or multiple metal layers. A material for the first and/or second contact layer1116,1118may include Al, Ti, Cr, Ni, Au, or alloys thereof.

The insulation layer1120is formed on the first and second contact layers1116,1118, and the first terminal1122and the second terminal1124are disposed on the insulation layer1120to be connected to the first contact layer1116and the second contact layer1118through the contact holes, respectively.

The first terminal1122is connected to one of a first connection electrode621and a second connection electrode623through a second conductive bonding layer663, and the second terminal1124is connected to the other connection electrode through a second conductive bonding layer663.

The first and/or second terminal(s)1122,1124may be formed as a single or multiple metal layers. The first and/or second terminal(s)1122,1124may include Al, Ti, Cr, Ni, Au, or alloys thereof.

Multiple protrusions may be formed on a rear surface of the first conductivity type semiconductor layer1110, in particular, a surface of the first conductivity type semiconductor layer1110opposite to the active layer1112, to improve light extraction efficiency. The protrusions may have various shapes, such as a polygonal pyramid shape, a semi-spherical shape, a random surface having roughness thereon, and the like.

Although the light emitting device according to the illustrated exemplary embodiment is briefly described above with reference to the drawing, the light emitting device may further include additional layers having other functions in addition to the layers described above. For example, the light emitting device may further include various layers, such as a reflective layer adapted to reflect light, an additional insulation layer adapted to insulate a certain component, an anti-solder diffusion layer adapted to prevent diffusion of solder, and the like.

Furthermore, a mesa may be formed in various shapes and the locations or shapes of the first and second contact electrodes1116,1118or the first and second terminals1122,1124may be changed in various ways in formation of a flip-chip type light emitting device.

The display device according to an exemplary embodiment has improved color purity and color reproducibility.

In general, upon formation of a pixel by mounting light emitting devices on a substrate, the light emitting devices are mounted on a transparent insulation layer formed on the substrate. When the insulation layer formed on the substrate is transparent, the transparent insulation layer is used as a waveguide, thereby causing a problem of propagation of light from one pixel to another pixel adjacent thereto. For example, when red light is emitted from a red light emitting device, a fraction of light traveling to a side of the red light emitting device can enter the transparent insulation layer through an interface of the transparent insulation layer. A fraction of the light having entered the transparent insulation layer may be output to an adjacent pixel, for example, a green pixel region, through reflection and refraction in the transparent insulation layer. In this case, the region provided with the green light emitting device can emit a mixed color through emission of the red light propagated through the transparent insulation layer together with the green light, or can emit a different color through interference of light, instead of emitting only the green light. As such, purity of the red light and color reproducibility may be deteriorated.

However, according to an exemplary embodiment, the light non-transmitting layer670is provided to each of the pixel regions, thereby preventing the insulation layer from being used as a waveguide. In particular, the light non-transmitting layer670may be formed to have a black color that absorbs light. As such, when light emitted from an adjacent light emitting device travels to a side or a lower portion, light is absorbed by the light non-transmitting layer670, thereby preventing light from traveling to adjacent pixels. Accordingly, the display device according to an exemplary embodiment prevents color mixing or light interference between adjacent pixels, and has improved final color purity and color reproducibility.

Furthermore, since the display device according to an exemplary embodiment has an increased area represented by black, a contrast ratio between a black region and a bright region illuminated with light emitted from each of the light emitting devices may be increased, thereby improving characteristics of the display device.

In addition, according to an exemplary embodiment, the color filter layer is further provided in addition to the phosphor used as the color conversion layer, thereby ensuring further improvement in color purity and color reproducibility. As such, light not completely converted by the color conversion layer or light traveling from an adjacent pixel despite the light non-transmitting layer670can be blocked again by the color filter layer.

Furthermore, with the structure described above, the display device allows the multiple pixel units to be easily mounted on the base substrate, and thus, can be easily manufactured to have various shapes and various areas.

According to an exemplary embodiment, various modifications of the display device can be made, which will be described in more detail below.

FIG.29is a cross-sectional view taken along line ofFIG.27Aaccording to another exemplary embodiment. The following description will focus on different features of this embodiment from those of the above embodiments and, for details of the components not described herein, refer to the above embodiments.

Referring to the above exemplary embodiments andFIG.29, the light non-transmitting layer670according to the illustrated exemplary embodiment is formed on the base substrate700, instead of being formed on the pixel unit610.

More specifically, the display device includes the base substrate700and the pixel unit610.

The base substrate700includes an interconnection part to supply power and signals to the pixel unit610, and the light non-transmitting layer670is formed on the upper surface of the base substrate700. Although not shown in the drawings, the light non-transmitting layer670may be formed with multiple through-holes, through which the interconnection part of the base substrate700is connected to a first conductive bonding layer661. The through-holes may be provided with a separate conductive bonding layer or metal interconnects.

The pixel unit610is disposed on the base substrate700with the first conductive bonding layer661interposed therebetween.

The pixel unit610has a similar structure to that of the above exemplary embodiment, except for the light non-transmitting layer670. More particularly, the first conductive bonding layer661is provided with first to fourth connection electrodes621,623,625,631connected to the interconnection part of the base substrate700, and a second conductive bonding layer663is disposed on the first to fourth connection electrodes621,623,625,631. First to third light emitting devices611,613,615are disposed on the second conductive bonding layer663, and the first and second terminals of each of the first to third light emitting devices611,613,615are electrically connected to the first to fourth connection electrode621,623,625,631. A color conversion layer641and a color filter layer643may be selectively disposed on the first to third light emitting devices611,613,615. An encapsulation layer650is disposed on the first to third light emitting devices611,613,615.

As in the above described exemplary embodiment, the display device according to the illustrated exemplary embodiment can minimize color mixing or interference due to propagation of light emitted from one pixel to another pixel adjacent thereto.

FIG.30is a cross-sectional view taken along line ofFIG.27Aaccording to yet another exemplary embodiment.

Referring to the above exemplary embodiments andFIG.30, the location of the color converter640is different from that of the above exemplary embodiments. According to the illustrated exemplary embodiment, the color converter640is disposed on the encapsulation layer650.

More specifically, the display device includes a base substrate700and a pixel unit610disposed on the base substrate700.

The pixel unit610has a similar structure to that of the above exemplary embodiment shown inFIG.27B, except for the color converter640. More particularly, instead of the color converter640, the encapsulation layer650is disposed on the first to third light emitting devices611,613,615. The color converter640is disposed on the encapsulation layer650.

According to the illustrated exemplary embodiment, the color converter640may include at least one of a phosphor-containing color conversion layer, a color filter, and a double layer including the color conversion layer and the color filter. In addition, although the color converter640is illustrated as being formed on the encapsulation layer650to cover the entirety of the encapsulation layer650in the illustrated exemplary embodiment, the inventive concepts are not limited thereto. For example, in some exemplary embodiments, the color converter640may be disposed on some of the first to third light emitting devices611,613,615.

A light emitting apparatus according to an exemplary embodiment may be used as a lighting apparatus, and, in this case, the light emitting devices may not be used as pixels. When the light emitting apparatus is used as the lighting apparatus, particularly as a backlight unit for a display device, multiple light emitting devices may be connected in parallel or in series, and may be driven simultaneously.

FIG.31Ashows a lighting unit, which includes the light emitting devices connected in parallel, as the light emitting apparatus according to an exemplary embodiment, andFIG.31Bis a cross-sectional view taken along line IV-IV′ ofFIG.31A.FIG.32shows a lighting unit, which includes the light emitting devices connected in series, as the light emitting apparatus according to another exemplary embodiment.

Referring to the above exemplary embodiments, andFIG.31AandFIG.31B, the lighting apparatus includes a base substrate700and a lighting unit610′ mounted on the base substrate700.

The base substrate700includes an interconnection part to supply power and signals to the lighting unit610′.

The lighting unit610′ is disposed on the base substrate700with a first conductive bonding layer661interposed therebetween. According to the illustrated exemplary embodiment, the lighting unit610′ includes multiple light emitting devices connected in parallel to one another.

The lighting unit610′ according to the illustrated exemplary embodiment has a similar structure as the pixel unit of the display device described above. More particularly, a first conductive bonding layer661is provided with first and second connection electrodes620′,630′, which are connected to scan interconnects and data interconnects on the base substrate700, respectively, and a light non-transmitting layer670is disposed on the first and second connection electrodes620′,630′. The light non-transmitting layer670may be formed of a non-conductive reflective material to maximize efficacy of light emitted from the light emitting devices. The non-conductive reflective material may include a mixture of inorganic fillers having a small particle diameter and a polymer resin. In an exemplary embodiment, the inorganic fillers may include barium sulfate, calcium sulfate, magnesium sulfate, barium carbonate, calcium carbonate, magnesium chloride, aluminum hydroxide, magnesium hydroxide, calcium hydroxide, titanium dioxide, alumina, silica, talc, and zeolite, without being limited thereto.

The first and second connection electrodes620′,630′ are spaced apart from each other and extend in one direction. The light non-transmitting layer670has through-holes TH, and a second conductive bonding layer663is disposed on the first and second connection electrodes620′,630′ in the through-holes TH. The light emitting devices are disposed on the second conductive bonding layer663. Each of the light emitting devices has one end, for example, a first terminal, overlapping the first connection electrode620′ to be connected to the first connection electrode620′ through the second conductive bonding layer663. Each of the light emitting devices has the other end, for example, a second terminal, overlapping the second connection electrode630′ so as to be connected to the second connection electrode630′ through the second conductive bonding layer663. As such, the light emitting devices are connected in parallel to one another between the first and second connection electrodes620′,630′.

An encapsulation layer650is disposed on the light emitting devices.

Although a separate color converter640is not shown in the illustrated exemplary embodiment, the lighting unit may further include the color converter640as in the exemplary embodiments described above, when there is a need for change of wavelengths of light emitted from the light emitting devices.

According to the illustrated exemplary embodiment, the lighting unit employs a light reflective layer as the light non-transmitting layer670, thereby improving efficacy of light emitted from the light emitting devices. Accordingly, when the lighting unit according to the illustrated exemplary embodiment is applied to a backlight unit of a display device, the backlight unit may not require a separate reflective sheet.

FIG.32shows a lighting unit including light emitting devices connected in series. Since there is no significant difference between the lighting unit shown inFIG.32and the lighting unit shown inFIG.31A, except for the shape of the connection electrodes and connection relationships of both ends thereof, to which the first terminal and the second terminal of the light emitting devices are provided, repeated descriptions of the lighting unit will be omitted.

The light emitting apparatus having the structure described above may be manufactured by forming connection electrodes on an initial substrate, forming a light non-transmitting layer on the connection electrodes, forming light emitting devices on the light non-transmitting layer to be connected to the connection electrodes, forming an encapsulation layer on the light emitting devices, disposing a support substrate on the encapsulation layer, removing the initial substrate, connecting the connection electrodes to an interconnection part of a circuit board, and removing the support substrate.

According to an exemplary embodiment, the lighting apparatus can be manufactured by substantially the same method as the display device, despite slight structural difference between the display device and the lighting apparatus. Thus, a method for manufacturing a display device will exemplarily be described below.

FIG.33AtoFIG.44illustrate a method for manufacturing a display device according to an exemplary embodiment, in whichFIG.33A,FIG.34A,FIG.35A,FIG.36A,FIG.37AandFIG.38Aare plan views andFIG.33B,FIG.34B,FIG.35B,FIG.36B,FIG.37B,FIG.38B, andFIG.39toFIG.44are cross-sectional views. Hereinafter, repeated descriptions of several components already described above will be omitted to avoid redundancy.

Referring toFIG.33AandFIG.33B, first to fourth connection electrodes621,623,625,631are formed on an initial substrate710.

The initial substrate710is a temporary substrate for formation of pixel units on an upper surface thereof, and will be removed after completion of the manufacturing process. In addition, although one pixel unit is illustrated in the drawings illustrating a method for manufacturing a display device, multiple pixel units may be simultaneously formed on the initial substrate710using a large initial substrate710and may be divided into individual pixel units through cutting, as shown inFIG.42.

At least one insulation layer may be interposed between the initial substrate710and the first to fourth connection electrodes621,623,625,631to facilitate removal of the initial substrate710. In an exemplary embodiment, the insulation layer may have a bilayer structure including first and second insulation layers720,730. The first insulation layer720and/or the second insulation layer730may be formed of a material allowing the initial substrate710to be easily removed through a laser lift-off process. For example, the first insulation layer720may be formed of indium tin oxide (ITO), GaN, and the like, and the second insulation layer730may be formed of silicon oxide, silicon nitride, silicon oxynitride, and the like. However, the first and/or the second insulation layer720,730are not limited thereto.

The first to fourth connection electrodes621,623,625,631can be easily formed by sputtering, deposition, coating, molding, photolithography, and the like.

Referring toFIG.34AandFIG.34B, a light non-transmitting layer670is formed on an upper surface of the initial substrate710on which the connection electrodes621,623,625,631are formed. The light non-transmitting layer670may be formed with through-holes TH, which expose at least some of the connection electrodes621,623,625,631, by patterning. The process of forming the through-holes TH in the light non-transmitting layer670may be carried out by imprinting or photolithography. In an exemplary embodiment, the light non-transmitting layer670may be formed of a black photosensitive resist, which allows easy patterning of the light non-transmitting layer670using photolithography after deposition.

Although the through-holes TH may be formed to expose some of the first to fourth connection electrodes621,623,625,631in the illustrated exemplary embodiment, the through-holes TH may be formed to expose all of the first to fourth connection electrodes621,623,625,631in other exemplary embodiments. The area and shape of the through-holes TH may be changed depending on the light emitting devices to be mounted on the substrate.

Referring toFIG.35AandFIG.35B, a second conductive bonding layer663is provided to the through-holes TH. The second conductive bonding layer663may be formed of a conductive resin or a conductive paste, such as solder pastes, silver pastes, and the like. The second conductive bonding layer663may be formed to a sufficient height, such that first and second terminals of each of the light emitting devices can be easily connected to an upper surface thereof.

Referring toFIG.36AandFIG.36B, first to third light emitting devices611,613,615are mounted on the initial substrate710, to which the second conductive bonding layer663is provided. Each of the first to third light emitting devices611,613,615is disposed on the second conductive bonding layer663, such that the first terminal and the second terminal of the light emitting device correspond to the corresponding connection electrodes. Then, the second conductive bonding layer663may be cured.

Referring toFIG.37AandFIG.37B, a color conversion layer641is formed on the initial substrate710, on which the first to third light emitting devices611,613,615are disposed. The color conversion layer641may be formed by various methods, for example, a lift-off process using photolithography.

Referring toFIG.38AandFIG.38B, a color filter layer643may be formed on the color conversion layer641. The color filter layer643may be formed by photolithography.

In an exemplary embodiment, the process of forming the color conversion layer641or the color filter layer643is selective, and thus can be omitted, as needed.

Referring toFIG.39, an encapsulation layer650is formed on the initial substrate710on which the color converter640is formed. The encapsulation layer650may be formed by deposition and/or molding.

Referring toFIG.40, the initial substrate710is removed. Before removal of the initial substrate710, a first support substrate711is disposed on the encapsulation layer650to support and transfer of the formed structure, and then the initial substrate710is removed from the formed structure supported by the first support substrate711.

The initial substrate710may be removed by a laser lift-off process, without being limited thereto. After removal of the initial substrate710, the first and second insulation layers720,730may be retained under the first to fourth connection electrodes621,623,625,631.

Referring toFIG.41, with the formed structure supported by the first support substrate711, the first and second insulation layers720,730are removed from the first to fourth connection electrodes621,623,625,631. Although the first and second insulation layers720,730can be removed by various methods, the first and second insulation layers720,730may be removed by polishing according to the illustrated exemplary embodiment. As the first and second insulation layers720,730are removed, the first to fourth connection electrodes621,623,625,631are exposed.

Referring toFIG.42, a second support substrate713is provided to the exposed lower surfaces of the first to fourth connection electrodes621,623,625,631, and the first support substrate711is removed. Then, the formed structure is cut to form one pixel unit.

In this case, cutting may be performed with the formed structure supported by the first support substrate711. Alternatively, cutting may be performed after preparing a separate support substrate713as shown in the drawing, and transferring the formed structure to the separate second support substrate713. In the process of cutting the formed structure, various cutters CT, for example, a laser, a blade, and the like, may be used. In some exemplary embodiments, cutting may be performed by etching.

In an exemplary embodiment, the formed structure may be cut corresponding to one pixel unit. In this case, the one pixel unit may include the first to third light emitting devices611,613,615. However, according to some exemplary embodiments, the formed structure may be cut to include at least two pixel units.

Referring toFIG.43, the pixel unit formed by cutting is picked up by a device capable of moving the pixel unit, for example, a pick-up holder HD, and the second support substrate713is removed therefrom.

Referring toFIG.44, the pixel unit picked up by the pick-up holder HD is seated on the base substrate700having the interconnection part and the second conductive bonding layer663formed thereon, thereby forming a final display device.

As described above, multiple pixel units are simultaneously formed and disposed on the base substrate to be connected to one another thereon, thereby enabling manufacture of display devices having various areas and various shapes. In this case, the light non-transmitting layer can be formed in formation of the pixel units, thereby facilitating manufacture of a display device having improved color purity and color reproducibility.

FIG.45Ais a schematic plan view of a light emitting device811according to yet another exemplary embodiment, andFIG.45Bis a schematic cross-sectional view taken along line V-V ofFIG.45A. Although the following description is given with reference to a first light emitting device811among the light emitting devices used in pixels P, the same may be also applicable to other light emitting devices, for example, second and third light emitting devices813,815.

Referring toFIG.45AandFIG.45B, the first light emitting device811may include a first conductivity type semiconductor layer2110, an active layer2112, a second conductivity type semiconductor layer2114, an ohmic contact layer2116, an insulation layer2120, a first terminal2122, and a second terminal2124.

The first conductivity type semiconductor layer2110, the active layer2112, and the second conductivity type semiconductor layer2114may be grown on the substrate. The substrate may be selected from among various growth substrates, such as a gallium nitride substrate, a GaAs substrate, a Si substrate, and a sapphire substrate, more particularly, a patterned sapphire substrate, which can be used for growth of semiconductor layers. The growth substrate may be separated from the semiconductor layers by mechanical polishing, laser lift-off, chemical lift-off, and the like. However, the inventive concepts are not limited thereto. For example, in some exemplary embodiments, a portion of the substrate may be retained to form at least a portion of the first conductivity type semiconductor layer2110.

In an exemplary embodiment, for a light emitting device emitting green light, the semiconductor layers may include indium gallium nitride (InGaN), gallium nitride (GaN), gallium phosphide (GaP), aluminum gallium indium phosphide (AlGaInP), and aluminum gallium phosphide (AlGaP). In another exemplary embodiment, for a light emitting device emitting red light, the semiconductor layers may include aluminum gallium arsenide (AlGaAs), gallium arsenide phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), and gallium phosphide (GaP). In a further exemplary embodiment, for a light emitting device emitting blue light, the semiconductor layers may include gallium nitride (GaN), indium gallium nitride (InGaN), and zinc selenide (ZnSe).

As described above, the semiconductor layers include the first conductivity type semiconductor layer2110, the active layer2112, and the second conductivity type semiconductor layer2114. The first conductivity type and the second conductivity type have opposite polarities. When the first conductivity type is n-type, the second conductivity type is p-type, and when the first conductivity type is p-type, the second conductivity type is n-type.

The first conductivity type semiconductor layer2110, the active layer2112, and the second conductivity type semiconductor layer2114may be grown on the substrate in a chamber by a method well-known in the art, such as metal organic chemical vapor deposition (MOCVD). In addition, the first conductivity type semiconductor layer2110includes n-type dopants, for example, Si, Ge, and Sn, and the second conductivity type semiconductor layer2114includes p-type dopants, for example, Mg, Sr, and Ba. In an exemplary embodiment, the first conductivity type semiconductor layer2110may include GaN or AlGaN including Si as dopants, and the second conductivity type semiconductor layer2114may include GaN or AlGaN including Mg as dopants.

Although the first conductivity type semiconductor layer2110and the second conductivity type semiconductor layer2114are illustrated as a single layer in the drawings, each of these semiconductor layers may be formed as multiple layers and may include a super-lattice layer. The active layer2112may include a single quantum well structure or a multi-quantum well structure, and the composition of the nitride semiconductor for the active layer2112may be adjusted to emit light in a desired wavelength band. For example, the active layer1112may emit blue light, green light, red light, or UV light.

The second conductivity type semiconductor layer2114and the active layer2112may be disposed in a mesa M structure on the first conductivity type semiconductor layer2110. The mesa M may include the second conductivity type semiconductor layer2114and the active layer2112, and may also include a portion of the first conductivity type semiconductor layer2110, as shown inFIG.45B. The mesa M may be placed in some regions of the first conductivity type semiconductor layer2110, and an upper surface of the first conductivity type semiconductor layer2110may be exposed around the mesa M.

In addition, the mesa M may have a through-hole2114athat exposes the first conductivity type semiconductor layer2110. The through-hole2114amay be disposed close to one edge of the mesa M, without being limited thereto. Alternatively, the through-hole2114may be disposed at a center of the mesa M.

The ohmic contact layer2116is disposed on the second conductivity type semiconductor layer2114to form ohmic contact with the second conductivity type semiconductor layer2114. The ohmic contact layer2116may be formed as a single layer or multiple layers, and may be a transparent conductive oxide layer or a metal layer. The transparent conductive oxide layer may be formed of, for example, ITO or ZnO, and the metal layer may be formed of, for example, metal, such as Al, Ti, Cr, Ni, and Au, or alloys thereof.

The insulation layer2120covers the mesa M and the ohmic contact layer2116. Further, the insulation layer2120may cover the upper and side surfaces of the first conductivity type semiconductor layer2110exposed around the mesa M. On the other hand, the insulation layer2120may include an opening2120a, which exposes the ohmic contact layer2116, and an opening2129bdisposed in the through-hole2114ato expose the first conductivity type semiconductor layer2110. The insulation layer2120may be formed as a single layer or multiple layers of silicon oxide or silicon nitride. Further, the insulation layer2120may include an insulation reflector, such as a distributed Bragg reflector.

The first terminal2122and the second terminal2124are disposed on the insulation layer2120. The first terminal2122may be electrically connected to the ohmic contact layer2116through the opening2120a, and the second terminal2124may be electrically connected to the first conductivity type semiconductor layer2110through the opening2020b.

The first and/or second terminal(s)2122,2124may be formed as a single metal layer or multiple metal layers. The first and/or second terminal(s)2122,2124may be formed of metal, such as Al, Ti, Cr, Ni, Au, and the like, or alloys thereof.

Although the light emitting device according to the illustrated exemplary embodiment is briefly described above with reference to the drawings, the light emitting device may further include additional layers having other functions in addition to the layers described above. For example, the light emitting device may further include various layers, such as a reflective layer adapted to reflect light, an additional insulation layer adapted to insulate a certain component, an anti-solder diffusion layer adapted to prevent diffusion of solder, and the like.

Furthermore, the mesa may be formed in various shapes, and the locations or shapes of the first and second terminals2122,2124may be changed in various ways in formation of a flip-chip type light emitting device. In addition, in some exemplary embodiments, the ohmic contact layer2116may be omitted, and in this case, the first terminal2122may be formed to directly contact the second conductivity type semiconductor layer2114. Further, as in the light emitting devices511,611described above, a second contact layer is formed on the first conductivity type semiconductor layer2110and the second terminal2124may be connected to the second contact layer.

FIG.46Ais a schematic plan view of a pixel region Pa according to yet another exemplary embodiment, andFIG.46Bis a schematic cross-sectional view taken along line VI-VI′ ofFIG.46A. Here, the pixel region Pa indicates a region of a light emitting module or a pixel unit, in which at least one pixel P is disposed.

Referring toFIG.46AandFIG.46B, the pixel region Pa may include a base substrate900, first to third light emitting devices811,813,815, alignment markers901, a bonding layer903, a step regulation layer905, connection layers907a,907b,907c, bumps921,923,925,930, and a protective layer909.

In the above exemplary embodiments, the base substrate105includes the signal lines113and the common lines115. On the other hand, the base substrate900according to the illustrated exemplary embodiment does not include circuits. The base substrate900is a light transmitting substrate, such as a glass substrate, quartz, and a sapphire substrate.

Although one pixel region Pa is illustrated in the drawings, multiple pixels P may be formed on the base substrate900and details of this structure will be described below.

The base substrate900is disposed on a light exit surface of the display device, and light emitted from the light emitting devices811,813,815is discharged through the base substrate900. The base substrate900may include roughness on the light exit surface to improve efficiency in light emission while emitting more uniform light. The base substrate900may have a thickness of, for example, 50 μm to 500 μm.

The bonding layer903is attached to the base substrate900. The bonding layer903may be formed on the overall upper surface of the base substrate900to attach the light emitting devices811,813,815thereto.

The bonding layer903is a light transmitting layer, and thus, allows light emitted from the light emitting devices811,813,815to pass therethrough. The bonding layer903may include light diffusers, such as SiO2, TiO2, ZnO, and the like, to diffuse light. The light diffusers prevent the light emitting devices811,813,815from being observed at a side of the light exit surface. Further, the bonding layer903may include a light absorption material, such as carbon black. The light absorption material prevents light generated from the light emitting devices811,813,815from leaking from regions between the base substrate900and the light emitting devices811,813,815towards a lateral side, and improves contrast of the display device.

The alignment markers901mark locations for disposition of the first to third light emitting devices811,813,815. The alignment markers901may be formed on the base substrate900or the bonding layer903.

The first to third light emitting devices811,813,815are disposed in regions marked by the alignment markers901, respectively. The first to third light emitting devices811,813,815may be, for example, a green light emitting device, a red light emitting device, and a blue light emitting device, respectively. In the illustrated exemplary embodiment, the first to third light emitting devices811,813,815are disposed in a triangular shape, without being limited thereto. Alternatively, the first to third light emitting devices811,813,815may be linearly disposed.

Although the first to third light emitting devices811,813,815may be the same as those described with reference toFIG.45AandFIG.45B, the inventive concepts are not limited thereto, and various light emitting devices such as horizontal or flip-chip type light emitting devices may be used.

The step regulation layer905covers the first to third light emitting devices811,813,815. The step regulation layer905has openings905athat expose first and second terminals2122,2124of the light emitting devices. The step regulation layer905may be formed to secure a uniform height of bumps to be formed thereon. The step regulation layer905may be formed of, for example, polyimide.

The connection layers907a,907care formed on the step regulation layer905. The connection layers907a,907care connected to the first and second terminals2122,2124of the first to third light emitting devices811,813,815through the openings905aof the step regulation layer905.

For example, the connection layers907aare electrically connected to the first conductivity type semiconductor layer of the second light emitting device813, and the connection layer907cis electrically commonly connected to the second conductivity type semiconductor layers of the first to third light emitting devices811,813,815. The connection layers907a,907cmay be formed together on the step regulation layer905and may include, for example, Au.

The bumps921,923,925,930are formed on the connection layers907a. For example, a first bump921may be electrically connected to the first conductivity type semiconductor layer of the first light emitting device811through the connection layer907a, a second bump923may be electrically connected to the first conductivity type semiconductor layer of the second light emitting device813through the connection layer907a, and a third bump925may be electrically connected to the first conductivity type semiconductor layer of the third light emitting device through the connection layer907a. A fourth bump930may be commonly connected to the second conductivity type semiconductor layers of the first to third light emitting devices811,813,815through the connection layer907c. The bumps921,923,925,930may be formed of, for example, solders.

The protective layer909may cover side surfaces of the bumps921,923,925,930and the step regulation layer905. In addition, the protective layer909may cover the bonding layer903exposed around the step regulation layer905. The protective layer909may be formed of, for example, a photosensitive solder resist (PSR). Accordingly, after the protective layer909is subjected to patterning through photolithography and development, the bumps921,923,925,930may be formed using the solders. The protective layer909may be formed of a white reflective material or a light absorption material, such as a black epoxy resin, to prevent light leakage.

FIG.47A,FIG.47B, andFIG.47Care a schematic plan view, a rear view and a cross-sectional view of a light emitting module3110according to yet another exemplary embodiment, respectively. In the illustrated exemplary embodiment, the light emitting module includes multiple pixels P on one base substrate900.

Referring toFIG.47A,FIG.47BandFIG.47C, the light emitting module3110includes multiple pixels P on the one base substrate900. As described with reference toFIG.46AandFIG.46B, each of the pixels includes first to third light emitting devices811,813,815, that is, first to third sub-pixels, and the bumps921,923,925,930.

The base substrate900is disposed at a light exit surface side of the light emitting module, and is disposed above the first to third light emitting devices811,813,815, as shown inFIG.47A. As described above, the first to third light emitting devices811,813,815may be attached to the base substrate900via a bonding layer903. The bonding layer903may be disposed as a continuous layer on the base substrate900, and may include the light diffusers and/or the light absorption material, as described above.

Each of the pixel regions Pa is the same as the pixel region described with reference toFIG.46AandFIG.46B, and thus, repeated descriptions thereof will be omitted to avoid redundancy. On the other hand, the protective layer909may be divided into pixel units without being limited thereto. Alternatively, the protective layer909may be continuously formed over the multiple pixel regions.

In the illustrated exemplary embodiment, the light emitting module3110includes four pixels P, but is not limited thereto. For example, in some exemplary embodiments, the light emitting module3110may include various numbers of pixels.

FIG.48A,FIG.48B, andFIG.48Care schematic plan views of light emitting modules having various sizes according to exemplary embodiments.

Referring toFIG.48A, a light emitting module3110aaccording to an exemplary embodiment includes 6 pixels arranged in a 3×2 matrix.

Referring toFIG.48B, a light emitting module3110baccording to another exemplary embodiment includes 6 pixels arranged in a 2×3 matrix.

Referring toFIG.48C, a light emitting module3110caccording to a further exemplary embodiment includes 9 pixels arranged in a 3×3 matrix.

FIG.48A,FIG.48B,FIG.48Cshow examples of the sizes of various light emitting modules, but the inventive concepts are not limited thereto. The light emitting module in other exemplary embodiments may include, for example, a single pixel P or more pixels.

For example, after a number of pixels is formed on a 3-inch or larger base substrate900, the base substrate900may be divided into regions including good pixels through a test, thereby providing light emitting modules having various sizes. Exemplary embodiments may provide display devices using the light emitting modules having various sizes.

FIG.49AandFIG.49Bare a schematic plan view and a cross-sectional view of a display device3100according to yet another exemplary embodiment, respectively.

Referring toFIG.49AandFIG.49B, the display device3100according to the illustrated exemplary embodiment includes a printed circuit board3130, an interposer substrate3120, and multiple light emitting modules3110,3110a, and may further include a drive IC3150.

The light emitting modules3110,3110aare the same as those described above, and thus, repeated descriptions thereof will be omitted to avoid redundancy. In addition, according to the illustrated exemplary embodiment, the light emitting modules3110,3110amay be disposed together with other light emitting modules3110b,3110c, for example, having different sizes than the light emitting modules3110,3110a.

The printed circuit board3130includes circuits3131to supply signal current to the light emitting modules31103110a. The printed circuit board3130may include a groove to receive the interposer substrate3120therein.

The drive ICs3150may be connected to a rear surface of the printed circuit board3130, and may include circuits for driving the light emitting modules3110,3110a.

The light emitting modules3110,3110aare mounted on the interposer substrate3120. The multiple light emitting modules3110,3110amay be mounted on one interposer substrate3120. Furthermore, the interposer substrate3120may cover the overall area of the display device3100, thereby simplifying manufacturing process of the display device3100.

The interposer substrate3120may include signal lines3125and common lines3123on an upper surface thereof, as shown inFIG.50. Further, the printed circuit board3130may include pads921b,923b,925b,930bfor electrical connection to other pads. These pads921b,923b,925b,930bmay be electrically connected to pads on the printed circuit board3130through connectors3133. The connectors3133may include, for example, anisotropic conductive pastes, solder pastes, bonding wires, and the like.

AlthoughFIG.50shows circuit patterns, these circuit patterns may be formed in a bilayer structure or a tri-layer structure, which may be separated by an insulation layer. Furthermore, the interposer substrate3120may be provided on the surface thereof with connection pads921a,923a,925a,930a, to which bumps921,923,925,930of the light emitting modules3110,3110aare connected, and the signal lines3125and the common lines3123are electrically connected to these connection pads921a,923a,925a,930a.

Use of the interposer substrate3120allows formation of circuits in a broad pitch on the printed circuit board3130, and the signal lines3125and the common lines3123may be formed in fine sizes on the interposer substrate3120.

FIG.51AandFIG.51Bare a schematic plan view and a cross-sectional view of a display device4100according to yet another exemplary embodiment, respectively.

Referring toFIG.51AandFIG.51B, the display device4100according to the illustrated exemplary embodiment is generally similar to the display device3100described with reference toFIG.49AandFIG.49B, except that the interposer substrate3120is omitted and the light emitting modules3110,3110aare directly mounted on a printed circuit board4130. The printed circuit board4130includes signal lines and common lines, and may be provided on a surface thereof with connection pads, to which the bumps921,923,925,930are connected. The connection pads may be connected to the signal lines and the common lines through via-holes, and may be electrically connected to drive ICs3150.

According to exemplary embodiments, a large display device is manufactured using normal light emitting modules manufactured through a process of transferring multiple light emitting diode chips and selected by testing, thereby reducing time for manufacturing a large display device.

In addition, each of light emitting modules is manufactured in a single unit and multiple light emitting modules are manufactured in a state of being coupled to a motherboard to remove tolerance between the light emitting modules, thereby improving performance of the large display device.

Exemplary embodiments provide a display device that has a simple structure and can be manufactured in various sizes. Further, the display device according to the exemplary embodiments can be manufactured by a simple method and facilitates easy removal of defects.

Exemplary embodiments also provide a display device having high levels of color purity and color reproduction.

Although certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Accordingly, the inventive concepts are not limited to such embodiments, but rather to the broader scope of the appended claims and various obvious modifications and equivalent arrangements as would be apparent to a person of ordinary skill in the art.