Patent ID: 12253797

DETAILED DESCRIPTION

The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90° or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.

Illustrated inFIG.1is a schematic view of a lithography system100, in accordance with some embodiments. The lithography system100may also be generically referred to as a scanner that is operable to perform lithographic processes including exposure with a respective radiation source and in a particular exposure mode. In at least some of the present embodiments, the lithography system100includes an extreme ultraviolet (EUV) lithography system designed to expose a resist layer by EUV light. Inasmuch, in various embodiments, the resist layer includes a material sensitive to the EUV light (e.g., an EUV resist). The lithography system100ofFIG.1includes a plurality of subsystems such as a radiation source102, an illuminator104, a mask stage106configured to receive a mask108, projection optics110, and a substrate stage118configured to receive a semiconductor substrate116. A general description of the operation of the lithography system100may be given as follows: EUV light from the radiation source102is directed toward the illuminator104(which includes a set of reflective mirrors) and projected onto the reflective mask108. A reflected mask image is directed toward the projection optics110, which focuses the EUV light and projects the EUV light onto the semiconductor substrate116to expose an EUV resist layer deposited thereupon. Additionally, in various examples, each subsystem of the lithography system100may be housed in, and thus operate within, a high-vacuum environment, for example, to reduce atmospheric absorption of EUV light.

In the embodiments described herein, the radiation source102may be used to generate the EUV light. In some embodiments, the radiation source102includes a plasma source, such as for example, a discharge produced plasma (DPP) or a laser produced plasma (LPP). In some examples, the EUV light may include light having a wavelength ranging from about 1 nm to about 100 nm. In one particular example, the radiation source102generates EUV light with a wavelength centered at about 13.5 nm. Accordingly, the radiation source102may also be referred to as an EUV radiation source102. In some embodiments, the radiation source102also includes a collector, which may be used to collect EUV light generated from the plasma source and to direct the EUV light toward imaging optics such as the illuminator104.

As described above, light from the radiation source102is directed toward the illuminator104. In some embodiments, the illuminator104may include reflective optics (e.g., for the EUV lithography system100), such as a single mirror or a mirror system having multiple mirrors in order to direct light from the radiation source102onto the mask stage106, and particularly to the mask108secured on the mask stage106. In some examples, the illuminator104may include a zone plate, for example, to improve focus of the EUV light. In some embodiments, the illuminator104may be configured to shape the EUV light passing therethrough in accordance with a particular pupil shape, and including for example, a dipole shape, a quadrapole shape, an annular shape, a single beam shape, a multiple beam shape, and/or a combination thereof. In some embodiments, the illuminator104is operable to configure the mirrors (i.e., of the illuminator104) to provide a desired illumination to the mask108. In one example, the mirrors of the illuminator104are configurable to reflect EUV light to different illumination positions. In some embodiments, a stage prior to the illuminator104may additionally include other configurable mirrors that may be used to direct the EUV light to different illumination positions within the mirrors of the illuminator104. In some embodiments, the illuminator104is configured to provide an on-axis illumination (ONI) to the mask108. In some embodiments, the illuminator104is configured to provide an off-axis illumination (OAI) to the mask108. It should be noted that the optics employed in the EUV lithography system100, and in particular optics used for the illuminator104and the projection optics110, may include mirrors having multilayer thin-film coatings known as Bragg reflectors. By way of example, such a multilayer thin-film coating may include alternating layers of Mo and Si, which provides for high reflectivity at EUV wavelengths (e.g., about 13.5 nm).

As discussed above, the lithography system100also includes the mask stage106configured to secure the mask108. Since the lithography system100may be housed in, and thus operate within, a high-vacuum environment, the mask stage106may include an electrostatic chuck (e-chuck) to secure the mask108. As with the optics of the EUV lithography system100, the mask108is also reflective. Details of the mask108are discussed in more detail below with reference to the example ofFIG.2. As illustrated in the example ofFIG.1, light is reflected from the mask108and directed towards the projection optics110, which collects the EUV light reflected from the mask108. By way of example, the EUV light collected by the projection optics110(reflected from the mask108) carries an image of the pattern defined by the mask108. In various embodiments, the projection optics110provides for imaging the pattern of the mask108onto the semiconductor substrate116secured on the substrate stage118of the lithography system100. In particular, in various embodiments, the projection optics110focuses the collected EUV light and projects the EUV light onto the semiconductor substrate116to expose an EUV resist layer deposited on the semiconductor substrate116. As described above, the projection optics110may include reflective optics, as used in EUV lithography systems such as the lithography system100. In some embodiments, the illuminator104and the projection optics110are collectively referred to as an optical module of the lithography system100.

As discussed above, the lithography system100also includes the substrate stage118to secure the semiconductor substrate116to be patterned. In various embodiments, the semiconductor substrate116includes a semiconductor wafer, such as a silicon wafer, germanium wafer, silicon-germanium wafer, III-V wafer, or other type of wafer as known in the art. The semiconductor substrate116may be coated with a resist layer (e.g., an EUV resist layer) sensitive to EUV light. EUV resists may have stringent performance standards. For purposes of illustration, an EUV resist may be designed to provide at least around 22 nm resolution, at least around 2 nm line-width roughness (LWR), and with a sensitivity of at least around 15 mJ/cm2. In the embodiments described herein, the various subsystems of the lithography system100, including those described above, are integrated and are operable to perform lithography exposing processes including EUV lithography processes. To be sure, the lithography system100may further include other modules or subsystems which may be integrated with (or be coupled to) one or more of the subsystems or components described herein.

The lithography system may include other components and may have other alternatives. In some embodiments, the lithography system100may include a pupil phase modulator112to modulate an optical phase of the EUV light directed from the mask108, such that the light has a phase distribution along a projection pupil plane114. In some embodiments, the pupil phase modulator112includes a mechanism to tune the reflective mirrors of the projection optics110for phase modulation. For example, in some embodiments, the mirrors of the projection optics110are configurable to reflect the EUV light through the pupil phase modulator112, thereby modulating the phase of the light through the projection optics110. In some embodiments, the pupil phase modulator112utilizes a pupil filter placed on the projection pupil plane114. By way of example, the pupil filter may be employed to filter out specific spatial frequency components of the EUV light reflected from the mask108. In some embodiments, the pupil filter may serve as a phase pupil filter that modulates the phase distribution of the light directed through the projection optics110.

Returning to the mask108, and with reference to the example ofFIG.2, illustrated therein is an example sectional view of the EUV mask108ofFIG.1. As shown inFIG.2, the EUV mask108may include a substrate202having a backside coating layer203, a multi-layer structure204, a capping layer206, and one or more absorbers208having an anti-reflective coating (ARC) layer210. The EUV mask108may include a boundary region212and a circuit region214. The circuit region214may be patterned to form features that correspond to a reflected image of the mask108resulting from differences in EUV light reflection between reflective regions disposed between the absorbers208and absorptive regions encompassing the absorbers208. In some embodiments, the substrate202includes a low thermal expansion material (LTEM) substrate (e.g., such as TiO2doped SiO2), and the backside coating layer203includes a chromium nitride (CrxNy) layer. In some examples, substrate202has a thickness of about 6.3 to 6.5 mm. In some examples, the backside coating203has a thickness of about 70-100 nm. By way of example, the multi-layer structure204may include molybdenum-silicon (Mo—Si) multi-layers deposited on top of the substrate202for example, using an ion deposition technique. In some embodiments, the multi-layer structure204has a thickness of about 250-350 nm, and in some examples each Mo—Si layer pair has a thickness of about 3 nm (for the Mo layer) and about 4 nm (for the Si layer). In various embodiments, the capping layer206includes a ruthenium (Ru) capping layer, which in some examples may have a thickness of about 2.5 nm. In some embodiments, the capping layer206may include a Si capping layer having a thickness of about 4 nm. The capping layer206may help to protect the multi-layer structure204(e.g., during fabrication of the mask108) and may also serve as an etch-stop layer for a subsequent absorber layer etch process. In some embodiments, the absorbers208may include for example, a TaxNylayer or a TaxByOzNulayer, which may have a thickness of about 50-75 nm and are configured to absorb EUV light (e.g., with a wavelength of about 13.5 nm). In some examples, other materials may be used for the absorbers208, such as Al, Cr, Ta, Ni, Co, and W, among others. In some examples, the ARC layer210includes at least one of a TaxByO2Nulayer, a HfxOylayer, or a SixOyN2layer. While some examples of materials that may be used for each of the substrate202, the backside coating layer203, the multi-layer structure204, the capping layer206, the absorbers208, and the ARC layer210have been given, it will be understood that other suitable materials as known in the art may be equally used without departing from the scope of the present disclosure.

For purposes of illustration, an exemplary fabrication method for the mask108is herein described. In some embodiments, the fabrication process includes two process stages: (1) a mask blank fabrication process, and (2) a mask patterning process. During the mask blank fabrication process, the mask blank is formed by depositing suitable layers (e.g., reflective multiple layers such as Mo—Si multi-layers) on a suitable substrate (e.g., an LTEM substrate having a flat, defect free surface). In various embodiments, the surface roughness of the mask blank is less than about 50 nm. By way of example, a capping layer (e.g., ruthenium) is formed over the multilayer coated substrate followed by deposition of an absorber layer. The mask blank may then be patterned (e.g., the absorber layer is patterned) to form a desired pattern on the mask108. In some embodiments, an ARC layer may be deposited over the absorber layer prior to patterning the mask blank. The patterned mask108may then be used to transfer circuit and/or device patterns onto a semiconductor wafer. In various embodiments, the patterns defined by the mask108can be transferred over and over onto multiple wafers through various lithography processes. In addition, a set of masks (such as the mask108) may be used to construct a complete integrated circuit (IC) device and/or circuit.

In various embodiments, the mask108(described above) may be fabricated to include different structure types such as, for example, a binary intensity mask (BIM) or a phase-shifting mask (PSM). An illustrative BIM includes opaque absorbing regions and reflective regions, where the BIM includes a pattern (e.g., and IC pattern) to be transferred to the semiconductor substrate116. The opaque absorbing regions include an absorber, as described above, that is configured to absorb incident light (e.g., incident EUV light). In the reflective regions, the absorber has been removed (e.g., during the mask patterning process described above) and the incident light is reflected by the multi-layer. Additionally, in some embodiments, the mask108may be a PSM which utilizes interference produced by phase differences of light reflected therefrom. Examples of PSMs include an alternating PSM (AltPSM), an attenuated PSM (AttPSM), and a chromeless PSM (cPSM). By way of example, an AltPSM may include phase shifters (of opposing phases) disposed on either side of each patterned mask feature. In some examples, an AttPSM may include an absorber layer having a transmittance greater than zero (e.g., Mo—Si having about a 6% intensity transmittance). In some cases, a cPSM may be described as a 100% transmission AltPSM, for example, because the cPSM does not include phase shifter material or chrome on the mask. In some illustrative embodiments of a PSM, the patterned layer208is reflective layer with a material stack similar to that of the multi-layer structure204.

As described above, the mask108includes a patterned image that may be used to transfer circuit and/or device patterns onto a semiconductor wafer (e.g., the semiconductor substrate116) by the lithography system100. To achieve a high fidelity pattern transfer from the patterned mask108to the semiconductor substrate116, the lithography process should be defect free. Particles may be unintentionally deposited on the surface of the capping layer206and can result in degradation of lithographically transferred patterns if not removed. Particles may be introduced by any of a variety of methods such as during an etching process, a cleaning process, and/or during handling of the EUV mask108. Accordingly, the mask108is integrated in a pellicle and is protected by the pellicle. The mask and the pellicle are collectively referred to as a mask-pellicle system. For example, during the lithography patterning process by the lithography system100, the mask-pellicle system is secured to the mask stage106.

With reference toFIGS.3A,3B, and3C, illustrated therein is a top-view, a perspective view, and a sectional view along line A-A′, respectively, of a mask-pellicle system300. Referring toFIGS.3A,3B, and3C, the mask-pellicle system300and a method of using the same are described.

The mask-pellicle system300includes a pellicle301and a mask302. The pellicle301may include a pellicle frame304and a membrane306(or pellicle membrane) integrated together through adhesive material layer308. The pellicle301and the mask302may be integrated together through adhesive material layer310. As illustrated inFIG.3B, the mask-pellicle system300lies in the x-y plane with the various layers disposed relative to each other in the z-direction. As discussed above, the mask302also includes a boundary region312for attaching the pellicle301and a circuit region314used to define a circuit pattern to be transferred to a semiconductor substrate116by a lithographic process. In some embodiments, the mask302may be substantially the same as the mask108, discussed above. In some embodiments, the circuit region314may include one or a plurality of patterned absorbers208including the ARC layer210. In the present embodiment, the mask302is integrated in the mask-pellicle system300and is secured on the mask stage106collectively with the membrane306and the pellicle frame304of the pellicle301during a lithography patterning process.

As illustrated inFIG.3C, the membrane306is configured proximate to the mask302and is attached to a first surface304aof the pellicle frame304through the adhesive material layer308. Particularly, the membrane306is attached to the pellicle frame304through the adhesive material layer308. The mask302is further attached to a second surface304bof the pellicle frame304through the adhesive material layer310. The pellicle301may be attached to the boundary region312. Thus, the mask302, the pellicle frame304, and the membrane306are configured and integrated to enclose an internal space320. The circuit region314of the mask302is enclosed in the internal space320and is therefore protected from contamination during a lithography patterning process, mask shipping, and mask handling.

The membrane306is made of a thin film transparent to the radiation beam used in a lithography patterning process and furthermore, has a thermal conductive surface. The membrane306is also configured proximate to the circuit region314on the mask302as illustrated inFIG.3C. In various embodiments, the membrane306includes a transparent material layer with a thermal conductive film on one surface (or both surfaces).

The mask-pellicle system300also includes the pellicle frame304configured such that the membrane306can be attached and secured to the pellicle frame304. The pellicle frame304may be designed in various dimensions, shapes, and configurations. Among those and other alternatives, the pellicle frame304may have one single component or multiple components. The pellicle frame304includes a material with mechanical strength, being designed in dimension, shape, and configuration so as to secure the membrane306properly across the pellicle frame304.

As discussed above, the pellicle frame304has the second surface304bdisposed over the adhesive material layer310. The second surface304bincludes a pattern330formed therein. When the pellicle301is attached to or disposed on the mask302, the pattern330is brought into contact with the adhesive material layer310. The pattern330includes an array of capillaries340. As used herein, capillary340generally refers to a recess, depression, or blind hole having a depth335in the z-direction being much, much greater than a characteristic dimension of the capillary340in either the x- or the y-direction. This relationship is commonly expressed as depth>>length. This relationship is derived from Jurin's law which teaches that height of a liquid column in a capillary tube is inversely proportional to a diameter of the capillary tube. While Jurin's law is strictly valid only for capillary tubes having a circular cross-section, other complementary laws instruct that the same basic relationship governs capillary tubes having a non-circular cross-section; although more complex factors are involved when considering shapes having corners such as square or triangular shapes considered herein.

Referring again toFIG.3C, the pellicle frame304may include a metal, metal-alloy, or ceramic material. More specifically, the metal or metal-alloy material may include, without limitation Ti, Ti6Al4V, TiSi, Fe—Ni (INVAR), FE-NI—CO (Covar), or a combination thereof. The metal or metal-alloy material may be doped with Cu, W, Mo, Cr, or a combination thereof. In one or more embodiments, the pellicle frame304may be constructed of a material that may provide chosen characteristics including high mechanical strength, light weight, porosity, and/or thermal conductivity. In one or more embodiments, the pellicle frame304may be formed by injection molding, compression molding, lathe, milling machine, laser dicing, sintering, or a combination thereof. In one or more embodiments, the pellicle frame304may include an LTEM. In one or more embodiments, the pellicle frame304may be constructed of a material having a thermal expansion coefficient similar to that of the substrate302and the membrane306. Since the mask-pellicle system300may be used in the lithography process at temperatures ranging from about room temperature to about 150° C., providing the substrate302, the pellicle frame304, and the membrane306having similar thermal expansion coefficients may help mitigate issues resulting from differential expansion of materials with changes in temperature. In one or more embodiments, the membrane306may include silicon. In one or more embodiments, the thermal expansion coefficient of the pellicle frame304may be similar to that of silicon.

Referring again toFIG.3C, the adhesive material layer310includes an adhesive310a(or gluc), including without limitation silicon, acrylic, epoxy, thermoplastic elastomer rubber, one or more acrylic polymers or copolymers, or a combination thereof. In some examples, the adhesive310amay include methyl methacrylate. In various embodiments, the adhesive310amay include a gel-like material. In various embodiments, the adhesive310amay have a crystal and/or amorphous structure. In one or more embodiments, the adhesive310amay have a glass transition temperature (Tg) from about <0° C. to about 180° C. In one or more embodiments, Tgmay range more particularly from about 100° C. to about 180° C. It will be appreciated that when the mask-pellicle system300is used at temperatures up to about 100° C., as described above, it may be desirable for the Tgof the adhesive310ato be above a maximum operating temperature of the mask-pellicle system300to prevent the adhesive310afrom exceeding the Tgduring operation. In one or more embodiments, the maximum operating temperature may be a maximum temperature reached during the lithography process, not including a process of detaching the pellicle301from the mask302. In some embodiments, the maximum operating temperature may range from about room temperature to about 100° C. In one or more embodiments, the adhesive310amay have a Tgabove room temperature. In one or more embodiments, the adhesive310amay have a Tgat or below room temperature. In various embodiments, the adhesive310amay undergo a thermal transition within a temperature range that spans either side of Tg, wherein the adhesive310amay begin a transition from a glassy (or brittle) state to a rubbery (or viscoelastic or super-cooled liquid) state at a temperature below room temperature, and the adhesive may complete the transition to the rubbery state at a temperature above room temperature. It will be appreciated that the adhesive310amay not flow when completely in the glassy state, whereas the adhesive310amay begin to flow when the adhesive310ais at least partially in the rubbery state. It will also be appreciated that the adhesive310amay at least partially transition to the rubbery state at temperatures at or even slightly below Tgdepending on the technical context in which Tgis defined and within which physical behaviors are characterized. It will also be appreciated that in the rubbery state, the adhesive310amay exhibit greater mobility relative to the same adhesive310ain the glassy state. In one or more embodiments, the adhesive310amay include a thermal conductive component to enhance thermal conduction within the adhesive material layer310and between the mask302and the pellicle frame304, as it will be appreciated that enhanced thermal conduction can result in more uniform heating and less temperature gradient that may improve transition of the adhesive310afrom the glassy state to the rubbery state. In various embodiments, the adhesive310amay be designed to exhibit other desirable characteristics, such as high mechanical strength, few to no defects, little to no outgassing, EUV compatibility (no significant degradation upon EUV radiation), sustainability to high service temperature, or a combination thereof.

In various embodiments, the second surface304bmay undergo a surface treatment of oxidation or nitridation. In some embodiments, the oxidation or nitridation may be performed by a physical vapor deposition (PVD) process or furnace process. In other embodiments, a surface coating may be applied to the second surface304b. In some embodiments, the surface coating may be applied by PVD or electroplating, which may include applying a metal or metal-alloy including W, Mo, Ni, Fe, Cr, Ti, Al, or a combination thereof. The surface treatment and/or surface coating may enhance an adhesion strength between the second surface304band the adhesive310a.

In various embodiments, the pattern330is formed using a lithographic patterning process applied to the second surface304b. Each of the resulting capillaries340has an opening formed in the second surface304band a depth335in the z-direction. In the illustrated embodiment, the individual capillaries340have a uniform depth335. In other embodiments, the lithographic process may be controlled to form capillaries340within the same pattern330and/or within the same pellicle frame304having different depth335. In various embodiments, the depth335of various capillaries340may range from about 10 μm to about 500 μm. More particularly, the depth335of various capillaries340may range from about 100 μm to about 500 μm. In one or more embodiments, the lithographic patterning process may include an electrochemical etching step using one or more of wet etching, dry etching, and ion etching to form the capillaries340. Although not limited to a particular shape, in the illustrated embodiments, the individual capillaries340have one of square, circular, and triangular shaped openings in the x-y plane (or a plane of the second surface304b), as illustrated in plan views ofFIGS.4A,4B and4C, respectively. The individual capillaries340are illustrated as having constant width along the depth335. However, in one or more embodiments, the width of each capillary340may vary along the depth335. More specifically, each capillary340may have a first width at the second surface304band a second width, smaller than the first width, at a farthermost end of each capillary340from the second surface304b. In one or more embodiments, wet etching may be used to form a pattern330including capillaries340that vary along a depth335thereof.

It is noted thatFIGS.4A-4Gare not drawn to scale. In fact, for clarity of discussion, dimensions of the pellicle frame304(corresponding to the boundary region312of the mask302) are substantially increased relative to dimensions of the internal space320(corresponding to the circuit region314of the mask302).

With reference toFIG.4A, illustrated therein is a plan view of the second surface304bof the pellicle frame304. Referring toFIG.4A, an embodiment of the pellicle frame304including the pattern330having square-shaped capillaries340is described. In the illustrated embodiment, the capillaries340have uniform size and spacing. Each square-shaped capillary340may have a width342in the x-direction and a length344in the y-direction. In some embodiments, the width342and length344may range from about 1 μm to about 500 μm. More particularly, the width342and the length344may range from about 1 μm to about 50 μm. Of course, for square-shaped capillaries340, the width342and the length344are equal; however, in some embodiments, rectangular capillaries340may be formed having unequal width342and length344. Each capillary340may be spaced from each adjacent capillary340by a pattern pitch340p. In some embodiments, the pattern pitch340pmay range from about 10 μm to about 100 μm. A minimum distance346nmay be defined between an innermost row of capillaries346and an internal surface316of the pellicle frame304. Likewise, a minimum distance348nmay be defined between an outermost row of capillaries348and an external surface318of the pellicle frame304. In some embodiments, the minimum distance346n,348nmay be about 0.1 mm or greater.

With reference toFIG.4B, illustrated therein is a plan view of the second surface304bof the pellicle frame304. Referring toFIG.4B, an embodiment of the pellicle frame304including the pattern330having circular capillaries350is described. In the illustrated embodiment, the capillaries350have uniform size and spacing. Each circular capillary350may have a major diameter352in the x-direction and a minor diameter354in the y-direction. In some embodiments, the major diameter352and minor diameter354may range from about 1 μm to about 500 μm. More particularly, the major diameter352and minor diameter354may range from about 1 μm to about 50 μm. Of course, for circular capillaries350, the major diameter352and minor diameter354are equal; however, in some embodiments, ellipses may be formed having major diameter352greater than minor diameter354. Each capillary350may be spaced from each adjacent capillary350by a pattern pitch350p. In some embodiments, the pattern pitch350pmay range from about 10 μm to about 100 μm. A minimum distance356nmay be defined between an innermost row of capillaries356and an internal surface316of the pellicle frame304. Likewise, a minimum distance358nmay be defined between an outermost row of capillaries358and an external surface318of the pellicle frame304. In some embodiments, the minimum distance356n,358nmay be about 0.1 mm or greater.

With reference toFIG.4C, illustrated therein is a plan view of the second surface304bof the pellicle frame304. Referring toFIG.4C, an embodiment of the pellicle frame304including the pattern330having triangular capillaries360is described. In the illustrated embodiment, the capillaries360have uniform size and spacing. Each triangular capillary360may have a width362in the x-direction and a height364in the y-direction. In some embodiments, the width362and height364may range from about 1 μm to about 500 μm. More particularly, the width362and height364may range from about 1 μm to about 50 μm. Of course, for triangular capillaries360, width362and height364may only define equilateral and isosceles triangles, whereas other types may require specification of other sides or angles. Although not limited to a particular type, in the illustrated embodiment, the capillaries360are equilateral triangles. Each capillary360may be spaced from each adjacent capillary360by a pattern pitch360p. In some embodiments, the pattern pitch360pmay range from about 10 μm to about 100 μm. A minimum distance366nmay be defined between an innermost row of capillaries366and an internal surface316of the pellicle frame304. Likewise, a minimum distance368nmay be defined between an outermost row of capillaries368and an external surface318of the pellicle frame304. In some embodiments, the minimum distance366n,368nmay be about 0.1 mm or greater.

With reference toFIG.4D, illustrated therein is a plan view of the second surface304bof the pellicle frame304. Referring toFIG.4D, an embodiment of the pellicle frame304including the pattern330having capillaries370of variable size and spacing is described. In the illustrated embodiment, the capillaries370may have both nonuniform size and nonuniform spacing. Although not limited to a particular shape, in the illustrated embodiment, the capillaries370are square-shaped having equal x- and y-dimensions, each dimension being generically labeled as width in the present embodiment. Each capillary370may have a size corresponding to one of a maximum width372, a minimum width373, and an intermediate width374between the maximum width372and the minimum width373. In some embodiments, the maximum width372and minimum width373may be about 1 μm to about 500 μm. More particularly, the maximum width372and minimum width373may be about 1 μm to about 50 μm. Spacing between the capillaries370may vary from a maximum pattern pitch370xpto a minimum pattern pitch370np. In some embodiments, the maximum pattern pitch370xpand minimum pattern pitch370npmay range from about 10 μm to about 100 μm. Although not labeled, the illustrated embodiment may have minimum distances between innermost and outermost rows and internal and external surfaces316,318, respectively, like other embodiments. In some embodiments, the minimum distance may be about 0.1 mm or greater. In some embodiments, the capillaries370may have uniform size with non-uniform spacing. In other embodiments, the capillaries370may have nonuniform size with uniform spacing.

With reference toFIG.4E, illustrated therein is a plan view of the second surface304bof the pellicle frame304. Referring toFIG.4E, an embodiment of the pellicle frame304including the pattern330having nanostructured capillaries380is described. In the illustrated embodiment, the capillaries380may be formed using a laser treatment to create a random nanostructure. The laser treatment may form capillaries380having a nonuniform size and spacing. Furthermore, the laser treatment may form capillaries380that vary in depth335in the z-direction.

With reference toFIG.4F, illustrated therein is a plan view of the second surface304bof the pellicle frame304. Referring toFIG.4F, an embodiment of the pellicle frame304including the pattern330having elongated trenches390is described. In the illustrated embodiment, the trenches390have uniform width and uniform spacing. Each rectangular trench390may have a width392and a length394. In some embodiments, the width392may be about 1 μm to about 500 μm. More particularly, the width392may be about 1 μm to about 50 μm. Each trench390may be spaced from each adjacent trench390by a pattern pitch390p. In some embodiments, the pattern pitch390pmay range from about 10 μm to about 100 μm. Although not labeled, the illustrated embodiment may have minimum distances between innermost and outermost trenches and internal and external surfaces316,318, respectively, like other embodiments. In some embodiments, the minimum distance may be about 0.1 mm or greater. In some embodiments, the trenches390may have uniform width with non-uniform spacing. In other embodiments, the trenches390may have nonuniform width with uniform spacing.

With reference toFIG.4G, illustrated therein is a plan view of the second surface304bof the pellicle frame304. Referring toFIG.4G, an embodiment of the pellicle frame304including the pattern330having elongated trenches395is described. In the illustrated embodiment, the trenches395have uniform width and uniform spacing. Each rectangular trench395may have a width396and a length398. In some embodiments, the width396may be about 1 μm to about 500 μm. More particularly, the width396may be about 1 μm to about 50 μm. Each trench395may be spaced from each adjacent trench395by a pattern pitch395p. In some embodiments, the pattern pitch395pmay range from about 10 μm to about 100 μm Although not labeled, the illustrated embodiment may have minimum distances between innermost trenches or innermost ends of trenches and internal surface316, like other embodiments. Likewise, the illustrated embodiment may have minimum distances between outermost trenches or outermost ends of trenches and external surface318, like other embodiments. In some embodiments, the minimum distance may be about 0.1 mm or greater. In some embodiments, the trenches395may have uniform width with non-uniform spacing. In other embodiments, the trenches395may have nonuniform width with uniform spacing.

In various embodiments, the lithographic process and the laser treatment may be combined to form a pattern330sharing features of each technique.

With reference toFIGS.5A-5C, illustrated therein are partial sectional views of the mask-pellicle system300. Referring toFIGS.5A-5C, embodiments of the pellicle301including the pattern330having capillaries340of varying depth335is described. In various embodiments, each capillary340of the pattern330may have a depth corresponding to one of a maximum depth335xfor that pattern330, a minimum depth335nfor that pattern330, and an intermediate depth335ifor that pattern330between the maximum depth335xand the minimum depth335n. In one or more embodiments, the pattern330may include capillaries340ranging in depth from minimum depth335nto maximum depth335xincluding capillaries340having intermediate depth335i. In other embodiments, the pattern330may have a bimodal depth distribution including capillaries340having either minimum depth335nor maximum depth335xbut not intermediate depth335i. In one or more embodiments, as illustrated inFIG.5A, the outermost row of capillaries348may have minimum depth335n, internal rows of capillaries347between the outermost row348and the innermost row346may have intermediate depth335i, and the innermost row of capillaries346may have maximum depth335x.

In one or more embodiments, as illustrated inFIG.5B, the outermost row of capillaries348may have maximum depth335x, internal rows of capillaries347may have intermediate depth335i, and the innermost row of capillaries346may have minimum depth335n.

In one or more embodiments, as illustrated inFIG.5C, the outermost row of capillaries348and the innermost row of capillaries346may have minimum depth335nand internal rows of capillaries347may have maximum depth335x. In other embodiments, though not illustrated, the outermost row of capillaries348and the innermost row of capillaries346may have maximum depth335xand internal rows of capillaries347may have minimum depth335n. In various embodiments, various features of the patterns330from any of the above embodiments may be combined in various ways to produce patterns330having capillaries340of varying depth335. In various embodiments, the maximum depth335x, minimum depth335n, and intermediate depth335imay range from about 10 μm to about 500 μm. More particularly, the maximum depth335x, minimum depth335n, and intermediate depth335imay range from about 100 μm to about 500 μm. In some embodiments, a ratio of depth (in the z-direction) to width (in the x- or y-direction) may be greater than or equal to about 2. More particularly, the ratio may be greater than or equal to about 100. In some embodiments, the capillaries340may not function at a ratio less than minimum. For example, for width above a first threshold, the capillaries340may exhibit inadequate capillary force to attract the adhesive310a. In another example, for depth below a first threshold, the capillaries340may have insufficient volume to store adhesive310a. In some embodiments, the ratio may range from about 2-500. More particularly, the ratio may range from about 10-500. Even more particularly, the ratio may range from about 100-500. In some embodiments, the capillaries340may not function at a ratio greater than maximum. For example, for width below a second threshold, adhesive forces between adhesive310aand inner surfaces of the capillaries340may be insufficient to overcome cohesive forces between molecules of the adhesive310a. In another example, for width below a third threshold, the capillaries340may have insufficient volume to store adhesive310a.

Any of the above described changes to the pattern330including capillary shape, size, and/or spacing may be used in various combinations in order to control effectiveness of removing the adhesive310aof the adhesive material layer310during demounting of the pellicle301from the mask302.

Referring now toFIG.6, illustrated is a flowchart of a method400for mounting the pellicle301, constructed according to aspects of the present disclosure in some embodiments. The pellicle301may be mounted on the mask302. The method400may be implemented at room temperature.

The method400includes operation402providing the mask302and the pellicle301including the pellicle frame304and the membrane306. The mask302and the pellicle301may be separately fabricated according to methods described above. The pellicle frame304may include the membrane306attached to the first surface304a. The pellicle frame304may include the pattern330formed in the second surface304b.

The method400includes operation404applying adhesive310ato the second surface304bof the pellicle frame304. When operation404is performed at room temperature, and when the adhesive310ahas a glass transition above room temperature or a thermal transition temperature range spanning room temperature, the adhesive310amay be in a glassy or partially glassy state at operation404. In this state, the adhesive310awill be at least partially immobile. Thus, the adhesive310amay adhere to the second surface304bwithout substantially entering, filling, or flowing into the capillaries340of the pattern330.

The method400includes operation406mounting the pellicle301on the mask302by disposing the second surface304bonto the mask302or by bringing the second surface304binto contact with the mask302. The operation406may be performed at room temperature. In one or more embodiments, the mounting of the pellicle301may be performed at room temperature to about 200° C. In one or more embodiments, at least some of the adhesive310amay remain on the second surface304binstead of being disposed within the pattern330. In one or more embodiments, a majority of the adhesive310amay remain on the second surface304b. In one or more embodiments, substantially all the adhesive310amay remain on the second surface304b. Thus, when the second surface304bcontacts the mask302, the adhesive310awill form the adhesive layer310between the second surface304band the mask302. The mounting operation406may include applying pressure, using alignment techniques, curing, cooling, applying external field, or a combination thereof.

The method400includes operation408loading the mask-pellicle system300in the lithography system100by securing the mask-pellicle system300to the mask stage106according to methods described above. The loading operation408may further include other steps, such as alignment after the mask-pellicle system300is secured on the mask stage106. The lithography system100may include the semiconductor substrate116loaded on the substrate stage118of the lithography system100. In some examples, the semiconductor substrate116may be a silicon wafer coated with a photoresist layer. The photoresist layer is sensitive to the radiation beam from the radiation source102and is to be patterned by a lithography exposure process, such that the pattern defined on the mask302is transferred to the photoresist layer.

The method400includes operation410performing a lithography exposure process to transfer the pattern from the mask302to the semiconductor substrate116. In one or more embodiments, the exposure process410may include exposing the mask-pellicle system300to EUV light to pattern the semiconductor substrate116within the lithography system100according to methods described above.

Additional operations can be provided before, during, and after the method400, and some of the steps described can be replaced, eliminated, or moved around for additional embodiments of the method400. In one example, the lithography process may include soft baking, mask aligning, exposing, post-exposure baking, developing photoresist, and hard baking.

Referring now toFIG.7, illustrated is a flowchart of a method500for demounting the pellicle301, constructed according to aspects of the present disclosure in some embodiments. The pellicle301may be demounted from the mask302. The method500may be implemented at a temperature greater than room temperature.

The method500includes operation502providing the mask-pellicle system300including the mask302and the pellicle301including the frame304and the membrane306. The pellicle frame304may include the pattern330formed in the second surface304bthereof. The mask-pellicle system300may be provided by removing the mask-pellicle system300from the mask stage106of the lithography system100, opposite of the securing operation408of method400.

The method500includes operation504heating the mask-pellicle system300to a temperature at or above the Tgof the adhesive310a. Heating the adhesive310aabove Tgmay transition the adhesive310afrom the glassy state to the rubbery state, as described above. In the rubbery state, the adhesive310amay exhibit improved mobility. In one or more embodiments, a heating temperature for demounting may range from about Tgto about 200° C. In some embodiments, the heating temperature for demounting may range from about room temperature to about 200° C. In some embodiments, the heating temperature for demounting may range more specifically from about 100° C. to about 180° C. At any temperature slightly below, at, or above Tg, the adhesive310amay begin a process of at least partially being removed from the mask302and at least partially entering, filling, or flowing into the capillaries340of the pattern330. In some embodiments, at least a portion of the adhesive310amay move from the mask302to the pattern330by a capillary force or capillary effect. In some embodiments, the portion may be greater than or equal to about 90%. In some embodiments, the portion may be approximately 100%. After at least some of the adhesive310ahas moved from the mask302to the pattern330, the adhesive310awill be at least partially disposed in the pattern330, increasing a volume of the adhesive310adisposed in the pattern330relative to a volume of the adhesive310adisposed in the pattern330prior to heating.

In some embodiments, operation504may further include a second step of heating the mask-pellicle system300to a temperature equal to or greater than a melt temperature of the adhesive310a. Heating the adhesive310ato the melt temperature transitions the adhesive310afrom the rubbery state to a liquid state. In some embodiments, heating to the melt temperature may increase a volume of the adhesive310amoving from the mask302to the pattern330by increasing the capillary force thereon. In some embodiments, the melt temperature may be greater than 180° C.

The method500includes operation506demounting the pellicle301by lifting the pellicle301away from the mask302, opposite of the mounting operation406of method400. The pellicle frame304may include adhesive310adisposed in the pattern330. In one or more embodiments, at least some of the adhesive310amay be disposed in the pattern330. In one or more embodiments, a majority of the adhesive310amay be disposed in the pattern330. In one or more embodiments, substantially all the adhesive310amay be disposed in the pattern330.

Referring now toFIG.8, illustrated is a flowchart of a method600for fabricating a semiconductor wafer, such as substrate116, constructed according to aspects of the present disclosure in some embodiments. The method600may incorporate detailed description of like structures fromFIGS.1-5without limitation. Likewise, where there is overlap, the method600may incorporate detailed description of like steps from the methods400and500without limitation.

The method600includes operation602, applying adhesive310ato the second surface304bof the pellicle301. The method600includes operation604, mounting the pellicle301to the mask302by disposing the second surface304bin contact with the boundary region312of the mask302, thereby forming the mask-pellicle system300. The method600includes operation606, loading the mask-pellicle system300to the lithography system100. The method600includes operation608, loading the wafer to the lithography system100. The method600includes operation610, performing an exposure process to transfer a circuit pattern to the wafer using the mask302. The method600includes operation612, unloading the mask-pellicle system300from the lithography system100. The method600includes operation614, heating the mask-pellicle system300to a temperature equal to or greater than a glass transition temperature of the adhesive310a. The method600includes operation616, demounting the pellicle301from the mask302.

The present disclosure provides for many different embodiments. In one embodiment, an apparatus is provided. The apparatus includes a mask defining a circuit pattern to be transferred; a pellicle including a pattern formed in a first surface, wherein the pellicle is attached to the mask at the first surface; and an adhesive material layer disposed between the mask and the first surface.

In some embodiments, a method is provided. The method includes providing the mask-pellicle system including: a mask defining a circuit pattern to be transferred; a pellicle including a pattern formed in a first surface, wherein the pellicle is attached to the mask at the first surface; and an adhesive disposed between the mask and the first surface, wherein the adhesive has a glass transition temperature (Tg) greater than room temperature; heating the mask-pellicle system to a first temperature equal to or greater than Tg; and demounting the pellicle from the mask.

In some embodiments, the method includes loading a mask-pellicle system to a lithography system, wherein the mask-pellicle system includes: a mask defining a circuit pattern to be transferred to a semiconductor wafer; a pellicle including a pattern formed in a first surface, wherein the pellicle is attached to the mask at the first surface; and an adhesive disposed between the mask and the first surface; loading the semiconductor wafer to the lithography system; and performing an exposure process to transfer the circuit pattern to the semiconductor wafer using the mask.

The foregoing has outlined features of several embodiments so that those skilled in the art may better understand the detailed description that follows. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions and alterations herein without departing from the spirit and scope of the present disclosure.