Patent ID: 12219270

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

The inventive concept will be explained more fully hereinafter with reference to the accompanying drawings in which exemplary embodiments of the inventive concept are shown. Advantages and features of the inventive concept and methods for achieving the same will be apparent from the following exemplary embodiments, which are set forth in more details with reference to the accompanying drawings. However, it should be noted that the present inventive concept is not limited to the following exemplary embodiments, but may be implemented in various forms. Accordingly, the exemplary embodiments are provided merely to disclose the inventive concept and to familiarize those skilled in the art with the type of the inventive concept. In the drawings, exemplary embodiments of the inventive concepts are not limited to the specific examples provided herein and are exaggerated for clarity.

The terminology used herein is used to describe particular embodiments only, and is not intended to limit the present invention. As used herein, the singular terms “a” and “the” are intended to include the plural forms as well, unless the context clearly dictates otherwise. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. It will be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present.

Similarly, it will be understood that when an element (e.g., a layer, region, or substrate) is referred to as being “on” another element, it can be directly on the other element or intervening elements may be present. In contrast, the term “directly” means that no intervening elements are present. It should be further understood that when the terms “comprising” and “including” are used herein, it is intended to indicate the presence of stated features, steps, operations, elements, and/or components, but does not exclude one or more other features, steps, operations, elements, components, and/or the presence or addition of groups thereof.

Furthermore, exemplary embodiments in the detailed description are set forth in cross-section illustrations that are idealized exemplary illustrations of the present inventive concepts. Accordingly, the shapes of the exemplary figures may be modified according to manufacturing techniques and/or tolerable errors. Therefore, the exemplary embodiments of the present inventive concept are not limited to the specific shapes shown in the exemplary figures, but may include other shapes that may be produced according to the manufacturing process. The regions illustrated in the figures have general characteristics and are used to illustrate specific shapes of elements. Therefore, this should not be considered limited to the scope of this creative concept.

It will also be understood that, although the terms “first,” “second,” “third,” etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish each element. Thus, a first element in some embodiments could be termed a second element in other embodiments without departing from the teachings of the present creation. Exemplary embodiments of aspects of the present inventive concept illustrated and described herein include their complementary counterparts. Throughout this specification, the same reference numbers or the same designators refer to the same elements.

Furthermore, example embodiments are described herein with reference to cross-sectional and/or planar views, which are illustrations of idealized example illustrations. Accordingly, deviations from the shapes shown, for example, caused by manufacturing techniques and/or tolerances, are expected. Accordingly, the exemplary embodiments should not be considered limited to the shapes of the regions shown herein, but are intended to include deviations in shapes resulting from, for example, manufacturing. Thus, the regions illustrated in the figures are schematic and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments.

Referring toFIG.1andFIG.2,FIG.1is a schematic view of an HDR image sensing device according to the present invention. As shown inFIG.1, an image sensing device300according to the present invention includes: an image sensing array31and an image processing circuit32. The image processing circuit32includes an image frame buffer33.

Specifically, as shown inFIG.1, the image sensing array31according to the present invention is used to generate pixel data. In some embodiments, as shown inFIG.2, the pixel data are generated according to different exposure periods (T1, T2). Wherein the pixel data includes a first pixel data and a second pixel data, the first pixel data is outputted when an output signal Rdo is generated after a portion of the sensing units of the image sensing array31are exposed at a first frame rate F1for a first exposure period T1, the second pixel data is outputted when the output signal Rdo is generated after another portion of the sensing units of the image sensing array31are exposed at a second frame rate F2for a second exposure period T2. Wherein the first exposure period T1is longer than the second exposure period T2, and multiple pieces of the second pixel data are generated during one image capturing operation performed by the image processing circuit32. Wherein the second frame rate F2is greater than the first frame rate F1, and a first frame length is greater than a second frame length. Here, the frame length refers to the reciprocal of the frame rate. In particular, the first exposure period T1may be longer than the second frame length. When the image to be sensed is a low-brightness image, and the exposure period of the second sensing unit has been extended to reach the limit of the second frame length, the exposure period of the first sensing unit can also be extended, to perform a longer exposure, thus resulting in an image with higher signal-to-noise ratio (SNR), that is, a better quality image. This is advantageous to image fusion.

It can be understood that, as shown inFIG.2, since the first exposure period T1is greater than the second exposure period T2, and the image processing circuit32generates multiple pieces of the second pixel data during one image capturing operation, the image processing circuit32of the present invention can utilize the image frame buffer33to perform image fusion on the pixel data of different exposure periods to generate a real-time HDR image. In this way, the image sensing device300according to the present invention can break through the limitation that image fusion must be performed after each imaging operation, and can be performed during each imaging operation, so it can generate real-time HDR image in a short period of time, with better efficiency. Specifically, as shown inFIG.2, image fusion may be performed at time points t1, t2, and t3. In other words, as long as the first image capture operation is completed, the image processing circuit32can perform image fusion every time the output of the second pixel data is completed to generate a real-time HDR image with full resolution.

The First Embodiment

Hereinafter, embodiments of the image sensing circuit of the image sensing device of the present invention will be described with reference to the drawings.

Please refer toFIG.3andFIG.4,FIG.3is a schematic view of the image sensing circuit according to the first embodiment of the present invention;FIG.4is a circuit diagram of the image sensing circuit according to the first embodiment of the present invention. As shown inFIG.3andFIG.4, the image sensing circuit100according to the first embodiment of the present invention includes: a photodiode11, a floating diffusion (FD) node12, a transmission circuit13, a control circuit14, an amplification selection circuit15, an image processing circuit16, a reset circuit17, a ramp circuit18, an image frame buffer19, and a control selection circuit20.

Specifically, as shown inFIG.3, the photodiode11according to the first embodiment of the present invention includes a first photodiode111, a second photodiode112, a third photodiode113, and a fourth photodiode114. It should be further explained that the photodiode11is mainly used to photoelectrically convert the incident light into a quantum charge (i.e., electrons) according to the light intensity of the incident light. In some embodiments, the first photodiode111, the second photodiode112, the third photodiode113, and the fourth photodiode114may be photodiodes with the same structure, and the difference between each photodiodes is merely the exposure period of each photodiode being different, but the present invention is not limited thereto.

Specifically, as shown inFIG.3, the FD node12according to the first embodiment of the present invention is coupled to the first photodiode111, the second photodiode112, the third photodiode113, and the fourth photodiode114. In some embodiments, the FD node12receives the charges accumulated by the first photodiode111, the second photodiode112, the third photodiode113, and the fourth photodiode114to generate different voltages, but the present invention is not limited thereto.

Specifically, in some embodiments, the image sensing circuit100according to the first embodiment of the present invention may have one of a rolling shutter mechanism and a global shutter mechanism. It should be further explained that, in some embodiments, the present invention has at least four independent exposure control circuits to respectively control the photodiodes11to have different frame rates and different exposure periods, so it can be used with the rolling shutter mechanism to performs separate exposures, and finally performs image fusion through the image processing circuit16using the image frame buffer19to realize HDR image information, but the present invention is not limited thereto. The four independent exposure control circuits may each include address decoders to generate four independent frame rates and exposure timings, but the invention is not limited thereto. In particular, inFIG.3, the image frame buffer19is coupled to the image processing circuit16. However, the image frame buffer19may also be configured in the image processing circuit16.

Specifically, as shown inFIG.3, the transmission circuit13according to the first embodiment of the present invention is coupled to the photodiode11, and the transmission circuit13includes a first transmission circuit131, a second transmission circuit132, a third transmission circuit133, and a fourth transmission circuit134, the first transmission circuit131is coupled to the first photodiode111, the second transmission circuit132is coupled to the second photodiode112, the third transmission circuit133is coupled to the third photodiode113, and the fourth transmission circuit134is coupled to the fourth photodiode114. More specifically, the transmission circuit13is coupled between the photodiode11and the FD node12, and is controlled by a transmission signal TX to control the charge transmission between the photodiode11and the FD node12, however, the present invention is not limited thereto.

Specifically, as shown inFIGS.3and4, the control circuit14according to the present invention is coupled to the transmission circuit13. The control circuit14is used to generate a transmission signal TX and a reset signal RST. The control circuit14includes a first exposure control circuit141, a second exposure control circuit142, a third exposure control circuit143, and a fourth exposure control circuit144. The first exposure control circuit141is coupled to the transmission circuit131and controls the first photodiode111to expose at the first frame rate F1for the first exposure period T1, the second exposure control circuit142is coupled to the second transmission circuit132and controls the second photodiode112to expose at a second frame rate F2for a second exposure period T2, the third exposure control circuit143is used to control the third photodiode113to expose at a third frame rate F3for a third exposure period T3, and the fourth exposure control circuit144is used to control the fourth photodiode114to expose at a fourth frame rate F4for a fourth exposure period T4. In some embodiments, as shown inFIG.6, each photodiode11has different exposure periods and different frame rates, wherein the first exposure period is four times the fourth exposure period, and the second exposure period is three times the fourth exposure period, and the third exposure period is twice the fourth exposure period, but the present invention is not limited thereto. It can be understood that the respective exposure periods can be independent and do not need to be a specific multiple, and users can choose the length of the respective exposure periods according to their needs. Each frame rate can be independent and does not need to be a specific multiple. Users can choose their own frame rate according to their needs.

Specifically, as shown inFIG.3andFIG.4, the amplification selection circuit15according to the first embodiment of the present invention is coupled to the FD node12for converting the voltage of the FD node12into a voltage signal. In some embodiments, the voltage signal output by the amplification selection circuit15may include a plurality of first voltage signals, a plurality of second voltage signals, a plurality of third voltage signals, and a plurality of fourth voltage signals. The first voltage signals are generated by exposing the first photodiode111at the first frame rate F1for the first exposure period T1, the second voltage signals are generated by exposing the second photodiode112at the second frame rate F2for the second exposure period T2, the third voltage signals are generated by exposing the third photodiode113at the third frame rate F3for the third exposure period T3, and the fourth voltage signals are generated by exposing the fourth photodiode114at the fourth frame rate F4for the fourth exposure period T4, but the present invention is not limited thereto.

Specifically, as shown inFIG.3andFIG.4, the image processing circuit16according to the first embodiment of the present invention is coupled to the amplification selection circuit15. Wherein the image processing circuit16receives the voltage signal output by the amplification selection circuit15, and processes the voltage signal to obtain corresponding pixel data. More specifically, in some embodiments, the image processing circuit16can be further coupled to an image frame buffer19, the image frame buffer19is mainly used for storing pixel data, so as to respectively store multiple pieces of the pixel data corresponding to the first voltage signal, the second voltage signal, the third voltage signal and the fourth voltage signal, that is, the first sub-frame data, the second sub-frame data, and the third sub-frame data and the fourth sub-frame data, and then the image processing circuit16performs image fusion on these pixel data to generate a HDR full frame image signal. Wherein the image frame buffer19has a memory space for buffering at least one sub-frame.

Specifically, as shown inFIG.3andFIG.4, the reset circuit17according to the first embodiment of the present invention is coupled to the FD node12and the control circuit14, and the reset circuit17is used to reset the charge stored in the photodiode11. In some embodiments, the reset circuit17receives the reset signal RST provided by the control circuit14to reset the charge stored in the first photodiode111, the second photodiode112, the third photodiode113, and the fourth photodiode114, respectively, and controls the first photodiode111, the second photodiode112, the third photodiode113, and the four photodiodes114to expose at the first frame rate F1for the first exposure period T1, expose at the second frame rate F2for the second exposure period T2, expose at the third frame rate F3for the third exposure period T3, and expose at the fourth frame rate F4for the fourth exposure period T4, respectively, by using the transmission signal TX provided by the control circuit14, but the present invention is not limited thereto. In this way, the present invention uses four independent exposure control circuits to provide the transmission signal TX and the reset signal RST to perform exposures of four different exposure lengths at four different frame rates, and utilize the image processing circuit16to use image frame buffer19to performs image fusion on the pixel data of the sub-frames to generate a real-time HDR full frame image signal. This overcomes the limitation that image fusion must be performed after each imaging operation, and allows image fusion to be performed during each imaging operation, so it can generate real-time HDR images in a short period of time, with better efficiency.

It should be further explained that, in this embodiment, as shown inFIG.6, the first exposure period T1has the longest length of time compared to other exposure periods. When the first photodiode111performs the exposure of the first exposure period T1, the second photodiode112, the third photodiode113, and the fourth photodiode114have already performed multiple exposures, and corresponding second voltage signals, third voltage signals, and fourth voltage signals were generated, so when the image processing circuit16generates pixel data corresponding to different voltage signals and performs image fusion, the image processing circuit16can perform image fusion to the first pixel data, the second pixel data, the third pixel data, and the fourth pixel data prior to the generation of the next frame of the first pixel data, that is, the time length for image fusion may be shorter than the first exposure period T1. It can be understood that since the image sensing circuit of the present invention performs image fusion, the length of time for image fusion is no longer limited to the longest exposure period, so the real-time HDR image signal after image fusion can be generated in a relatively short period of time, with high efficiency and wide applicability.

Specifically, as shown inFIG.3andFIG.4, the transmission circuit13according to the first embodiment of the present invention may be a transistor, and the transistor is coupled between the cathode of the photodiode11and the FD node12. When the transmission circuit13is brought into the on state by the transmission signal TX provided by the control circuit14, the transmission circuit13transfer the charge accumulated in the photodiode11to the FD node12to generate a plurality of voltages, however the invention is not limited thereto.

Specifically, as shown inFIG.3andFIG.4, the amplification selection circuit15according to the first embodiment of the present invention includes an amplification transistor151, a selection transistor152, and a signal line153, wherein the gate of the amplification transistor151is coupled to the FD node12, and the amplification transistor151is coupled to the signal line153via the selection transistor152. When the selection transistor152receives the external selection signal SEL provided by the control selection circuit20, the selection transistor152turns into the on state, the amplification transistor151amplifies the voltage of the FD node12and generates a voltage signal to be transmitted to the signal line153, but the present invention is not limited thereto.

Specifically, as shown inFIG.3andFIG.4, the ramp circuit18according to the first embodiment of the present invention is coupled to the FD node12, and the ramp circuit18is used to adjust the voltage of the FD node12, couple the ramp signal to the FD node12, convert it into a digital pixel value and send it to the image processing circuit16after passing through the amplification circuit. It should be further noted that, in this embodiment, the ramp circuit18only includes one capacitor, which is coupled to the FD node12, but the invention is not limited thereto.

Specifically, as shown inFIG.3andFIG.4, the image frame buffer19according to the first embodiment of the present invention is coupled to the image processing circuit16, and the image frame buffer19is mainly used for storing pixel data, in this embodiment, the image frame buffer19may be a digital frame buffer to respectively store the multiple pieces of the pixel data corresponding to the first voltage signals, the second voltage signals, the third voltage signals, and the fourth voltage signals, and then perform image fusion through the image processing circuit16to generate a HDR image signal, but the present invention is not limited thereto.

Please refer toFIG.5andFIG.6.FIG.5is a schematic view illustrating the actual execution process of the image sensing circuit according to the present invention;FIG.6is a timing diagram illustrating a reset signal and a transmission signal of the image sensing circuit according to the first embodiment of the present invention. In this embodiment, the image sensing circuit100controls the exposure period of the photodiodes11through the transmission signal TX and the reset signal RST generated by the control circuit14. As shown inFIG.5andFIG.6, the actual implementation process of exposure according to the image sensing circuit100of the present invention is described as follows. Initially, the reset circuit17receives the first reset signal RST0to reset the charge in the first photodiode111, and the exposure starts in the first photodiode111. Then, the reset circuit17receives the second reset signal RST1to reset the charge in the second photodiode112, and the exposure starts in the second photodiode111. Then, the reset circuit17receives the third reset signal RST2to reset the charge in the third photodiode113, and the exposure starts in the third photodiode113. Then, the reset circuit17receives the fourth reset signal RST3to reset the charge in the fourth photodiode114, and the exposure starts in the fourth photodiode114. After resetting the charge in the fourth photodiode114and after the fourth exposure period T4has passed, the fourth transmission circuit134receives the fourth transmission signal TX3, so that when the fourth transmission circuit134is in the on state, the fourth transmission circuit134transmits the charge accumulated in the fourth photodiode114to the FD node12to generate a fourth voltage214. Then, the amplification selection circuit15receives the external selection signal SEL provided by the control selection circuit20to output a fourth voltage signal224according to the fourth voltage214, and the fourth voltage signal224is generated by exposing the fourth photodiode114for the fourth exposure period T4. Then, the image processing circuit16generates a corresponding fourth pixel data234according to the fourth voltage signal224, and stores it in the image frame buffer19. After resetting the charge in the third photodiode113and after the third exposure period T3has passed, the third transmission circuit133receives the third transmission signal TX2, so that when the third transmission circuit133is in the on state, the third transmission circuit133transmits the charge accumulated in the third photodiode113to the FD node12to generate a third voltage213. Then, the amplification selection circuit15receives the external selection signal SEL provided by the control selection circuit20to output a third voltage signal223according to the third voltage213, and the third voltage signal223is generated by exposing the third photodiode113for the third exposure period T3. Then, the image processing circuit16generates a corresponding third pixel data233according to the third voltage signal223, and stores it in the image frame buffer19. After resetting the charge in the second photodiode112and after the second exposure period T2has passed, the second transmission circuit132receives the second transmission signal TX1, so that when the second transmission circuit132is in the on state, the second transmission circuit132transfers the charge accumulated in the second photodiode112to the FD node12to generate a second voltage212. Then, the amplification selection circuit15receives the external selection signal SEL provided by the control selection circuit20to output the second voltage signal222according to the second voltage212, the second voltage signal222is generated by exposing the second photodiode112for the second exposure period T2. Then, the image processing circuit16generates a corresponding second pixel data232according to the second voltage signal222, and stores it in the image frame buffer19. After resetting the charge in the first photodiode111and the first exposure period T1has passed, the first transmission circuit131receives the first transmission signal TX0, so that when the first transmission circuit131is in the on state, the first transmission circuit131transfers the charge accumulated in the first photodiode111to the FD node12to generate a first voltage211. Then, the amplification selection circuit15receives the external selection signal SEL provided by the control selection circuit20, so as to output the first voltage signal221according to the first voltage211, the first voltage signal221is generated by exposing the first photodiode111for the first exposure period T1. Then, the image processing circuit16generates a corresponding first pixel data231according to the first voltage signal221, and stores it in the image frame buffer19. Finally, the image processing circuit16uses the image frame buffer19to perform image fusion on the aforementioned pixel data to generate a HDR image signal24. In particular, after the sub-frame with the longest exposure period has completed its the first output, each time any sub-frame completes its output (for example, time points P1, P2, P3, P4, P5, P6, P7, P8, P9, etc.), image fusion can be performed to generate real-time HDR image signals. Although the image processing circuit16only obtains the data of an updated sub-frame at each time point, the output of the image fusion is a full frame by using the temporary storage data in the image frame buffer19, and the update rate is greater than or equal to the frame rate of the fastest sub-frame instead of outputting the frame at the slowest frame rate.

Other examples of the image sensing circuit100are provided below, so that those skilled in the art of the present invention can more clearly understand possible changes. Components denoted by the same reference numerals as in the above embodiment are substantially the same as those described above with reference toFIGS.1-6. The same components, features, and advantages as those of the image sensing circuit100will not be repeated.

Please refer toFIG.7.FIG.7is a schematic view illustrating the exposure period of an image sensing circuit with HDR according to a second embodiment of the present invention. Compared with the first embodiment, the main difference of the second embodiment is that the first exposure period T1of the second embodiment is equal to the second exposure period T2, and the third exposure period T3is equal to the fourth exposure period T4. It can be understood that the user can arbitrarily control the photodiode11to expose the first exposure period T1, the second exposure period T2, the third exposure period T3, and the fourth exposure period T4through the transmission signal TX and the reset signal RST generated by the control circuit14, however the present invention is not limited thereto.

Please refer toFIG.8.FIG.8is a partial timing diagram illustrating a reset signal and a transmission signal of an image sensing circuit according to a third embodiment of the present invention. Compared with the first embodiment, the main difference of the third embodiment is that the transmission signal TX′ of the image sensing circuit100according to the third embodiment of the present invention has a fixed transmission frequency, that is, a fixed frame rate readout operation, at this time, the control circuit14must contain at least two exposure control circuits to control the exposure period of a single photodiode11, as shown inFIG.8, the control circuit14can generate a first reset signal RST0′ and a second reset signal RST1′ through the two independent exposure control circuits to adjust the photodiode11to generate a first exposure period T1′ and a second exposure period T2′. It can be understood that the user can control the exposure period of the photodiode11through the transmission signal TX′, the first reset signal RST0′, and the second reset signal RST1′ generated by the control circuit14, but the invention is not limited thereto. Here, RST0′, RST1′, and TX′ all represent intervals. RST0′ represents the interval of the set of sequentially appeared reset signals of all rows in the same frame in the first exposure period T1′. RST1′ represents the interval of the set of sequentially appeared reset signals of all rows in the same frame in the second exposure period T2′. TX′ represents the interval of the set of sequentially appeared readouts of all rows in the same frame.

It can be understood that those skilled in the technical field of the present invention can make various changes and adjustments based on the above examples, which will not be listed one by one here. The following will focus on implementing the image sensing device according to the embodiment.

Please refer toFIGS.9-11.FIG.9is a schematic view of an image sensing device according to the present invention;FIG.10is a circuit diagram of an image sensing device according to the present invention;FIG.11is a schematic view illustrating the actual execution process of an image sensing device according to the present invention. As shown inFIG.9, an image sensing device300A according to the present invention includes: an image sensing array31A and an exposure control circuit32A.

Specifically, the image sensing array according to the present invention may include a red light pixel group311A, a green light pixel group312A, a blue light pixel group313A, and a green light pixel group312A′. These pixel groups are used to generate the pixel data according to different frame rates and different exposure periods through the exposure control circuit32A during the image capturing operation, and the image signals24are generated by image fusion of the pixel data. As shown inFIG.10, the red light pixel group311A, the green light pixel group312A, the blue light pixel group313A, and the green light pixel group312A′ all include the above-mentioned image sensing circuit100. More specifically, the red light pixel group311A of the present invention includes a first red light sensing unit3111A, a second red light sensing unit3112A, a third red light sensing unit3113A, and a fourth red light sensing unit3114A; the green light pixel group312A of the present invention, it includes a first green light sensing unit3121A, a second green light sensing unit3122A, a third green light sensing unit3123A, and a fourth green light sensing unit3124A; the blue light pixel group313A of the present invention includes a first blue light sensing unit3131A, a second blue light sensing unit3132A, a third blue light sensing unit3133A, and a fourth blue light sensing unit3134A; the green light pixel group312A′ of the present invention includes a first green light sensing unit3121A′, a second green light sensing unit3122A′, a third green light sensing unit3123A′ and a fourth green light sensing unit3124A′. Thus, the image sensing device300A of the present invention can generate HDR image signals in the visible light wavelength range. In particular, in this embodiment, each pixel group includes four sensing units with the same sensing wavelength range, and these four sensing units can generate four different pixel data. The image processing circuit can perform real-time image fusion of the four images at this wavelength through the image frame buffer to generate a real-time HDR image at this wavelength. By combining the images of the four pixel groups, a chromatic real-time HDR image can be generated.

Specifically, as shown inFIG.9, the image sensing device300A according to the present invention includes a red light filter41A, green light filters42A,42A′, and a blue light filter43A. The red light filter41A is configured on the red light pixel group311A, the green light filters42A,42A′ are respectively configured on the green light pixel groups312A,312A′, and the blue light filter43A is configured on the blue light pixel group313A. Thereby, by adding the red light filter41A, the green light filter42A,42A′, and the blue light filter43A, the image sensing device300A according to the present invention can allow the same photodiode to detect different wavelength ranges, and achieve the purpose of generating chromatic HDR image information, greatly improving the practicability and scope of application of the image sensing device300A of the present invention.

Specifically, as shown inFIGS.9-11, the exposure control circuit32A according to the present invention has a first exposure control circuit141A, a second exposure control circuit142A, a third exposure control circuit143A, and a fourth exposure control circuit144A, wherein the exposure control circuit32A is mainly used to control the red light pixel group311A, the green light pixel groups312A,312A′ and the blue light pixel group313A to expose at different frame rates for different exposure periods. More specifically, in this embodiment, the first exposure control circuit141A is coupled to the first red light sensing unit3111A, the first green light sensing unit3121A, the first blue light sensing unit3131A, and the first green light sensing unit3121A′, the second exposure control circuit142A is coupled to the second red light sensing unit3112A, the second green light sensing unit3122A, the second blue light sensing unit3132A, and the second green light sensing unit3122A′, the third exposure control circuit143A is coupled to the third red light sensing unit3113A, the third green light sensing unit3123A, the third blue light sensing unit3133A and the third green light sensing unit3123A′, the fourth exposure control circuit144A is coupled to the fourth red light sensing unit3114A, the fourth green light sensing unit3124A, the fourth blue light sensing unit3134A, and the fourth green light sensing unit3124A′. In this way, the first exposure control circuit141A controls the first red light sensing unit3111A, the first green light sensing unit3121A, the first blue light sensing unit3131A, and the first green light sensing unit3121A′ to expose at the first frame rate F1for the first exposure period T1, the second exposure control circuit142A controls the second red light sensing unit3112A, the second green light sensing unit3122A, the second blue light sensing unit3132A, and the second green light sensing unit3122A′ to expose at the second frame rate F2for the second exposure period T2, the third exposure control circuit143A controls the third red light sensing unit3113A, the third green light sensing unit3123A, the third blue light sensing unit3133A, and the third green light sensing unit3123A′ to expose at the third frame rate F3for the third exposure period T3, and the fourth exposure control circuit144A controls the fourth red light sensing unit3114A, the fourth green light sensing unit3124A, the fourth blue light sensing unit3134A, and the fourth green light sensing unit3124A′ to expose at the fourth frame rate F4for the fourth exposure period T4, but the present invention is not limited thereto.

It can be understood that, as shown inFIG.11, the red light pixel group311A, the green pixel groups312A,312A′, and the blue pixel group313A respectively generate voltage signals at different frame rates for different exposure periods. Among them, the red light pixel group311A generates the first red light voltage signal511exposing at the first frame rate F1for the first exposure period T1, the second red light voltage signal512exposing at the second frame rate F2for the second exposure period T2, the third red light voltage signal513exposing at the third frame rate F3for the third exposure period T3, and the fourth red light voltage signal514exposing at the fourth frame rate F4for the fourth exposure period T4. The green light pixel groups312A,312A′ generate the first green light voltage signal521exposing at the first frame rate F1for the first exposure period T1, the second green light voltage signal522exposing at the second frame rate F2for the second exposure period T2, the third green light voltage signal523exposing at the third frame rate F3for the third exposure period T3, and the fourth green light voltage signal524exposing at the fourth frame rate F4for the fourth exposure period T4. The blue pixel group313A generate the first blue light voltage signal531exposing at the first frame rate F1for the first exposure period T1, the second blue light voltage signal532exposing at the second frame rate F2for the second exposure period T2, the third blue light voltage signal533exposing at the third frame rate F3for the third exposure period T3, and the fourth blue light voltage signal534exposing at the fourth frame rate F4for the fourth exposure period T4, and the image processing circuit16generates corresponding first chromatic pixel data551, second chromatic pixel data552, third chromatic pixel data553, and fourth chromatic pixel data554according to these voltage signals, and generate a first chromatic image561, a second chromatic image562, a third chromatic image563, and a fourth chromatic image564according to chromatic pixel data55, so as to perform image fusion on chromatic images56to generate a chromatic HDR image signal57.

Thus, it can be seen from the above description that the image sensing device300A according to the present invention uses the exposure control circuit32A, and the exposure control circuit32A includes the first exposure control circuit141A, the second exposure control circuit142A, the third exposure control circuit143A, and the fourth exposure control circuit144A are used to respectively control the red pixel group311A, the green pixel group312A, the blue pixel group313A, and the green pixel group312A′ to generate voltage signals of different wavelength ranges, and generate corresponding chromatic pixel data55and chromatic images56according to the voltage signals using the image processing circuit16, and the image processing circuit16can independently generate multiple chromatic images56, or perform image fusion of multiple chromatic images56through the image frame buffer to generate chromatic HDR image signals57. In this way, the present invention uses four different frame rates to perform four exposures with different exposure periods, and through the image processing circuit16, perform image fusion on the pixel data of the four sub-frames to generate a real-time full frame image signal with HDR. This overcomes the limitation that image fusion must be performed after each image capturing operation, it can be performed during each image capturing operation, so HDR images can be generated in a short period of time, with better efficiency. And through the filters of different wavelengths, the red pixel group311A, the green pixel group312A, the blue pixel group313A, and the green pixel group312A′ can generate voltage signals of different wavelength ranges, realizing real-time chromatic HDR full frame image signal57.

Please refer toFIGS.12-13.FIG.12is another schematic view of an image sensing device according to the present invention;FIG.13is a schematic view illustrating an actual implementation process of another image sensing device according to the present invention. Similar elements are described in the previous embodiments and will not be repeated here. As shown inFIG.12, in other embodiments, the image sensing device300B of the present invention may further include an infrared pixel group314B, an infrared filter44B is arranged on the infrared pixel group314B, and the infrared pixel group314B includes a first infrared sensing unit3141B, a second infrared sensing unit3142B, a third infrared sensing unit3143B, and a fourth infrared sensing unit3144B, and the first exposure control circuit141B is coupled to the first infrared sensing unit3141B, the second exposure control circuit142B is coupled to the second infrared sensing unit3142B, the third exposure control circuit143B is coupled to the third infrared sensing unit3143B, and the fourth exposure control circuit144A is coupled to the fourth infrared sensing unit3144B.

Specifically, as shown inFIGS.12-13, the exposure control circuit32B according to the present invention has a first exposure control circuit141B, a second exposure control circuit142B, a third exposure control circuit143B, and a fourth exposure control circuit144B, wherein the first exposure control circuit141B controls the first infrared sensing unit3141B to expose at the first frame rate F1for the first exposure period T1, the second exposure control circuit142B controls the second infrared sensing unit3142B to expose at the second frame rate F2for the second exposure period T2, the third exposure control circuit143B controls the third infrared sensing unit3143B to expose at the third frame rate F3for the third exposure period T3, and the fourth exposure control circuit144B controls the fourth infrared sensing unit3144B to expose at the fourth frame rate F4for the fourth exposure period T4, so that the infrared pixel group314B generates a first infrared voltage signal541, a second infrared voltage signal542, a third infrared voltage signal543, and a fourth infrared voltage signal544, and generate corresponding chromatic pixel data55.

In this way, the present invention performs image sensing in the infrared wavelength range through the infrared pixel group314B, so that the image sensing device300of the present invention can be applied in a low-brightness environment, greatly improving the applicability of the image sensing device300of the present invention.

Please refer toFIG.14, which is another schematic view of an image sensing device according to the present invention. Similar elements are described in the previous embodiments and will not be repeated here. As shown inFIG.14, in other embodiments, the image sensing device300C according to the present invention may have the image sensing circuit of the third embodiment as described above. When the transmission signal TX′ has a fixed transmission frequency, that is, a fixed frame rate during the readout operation, the control circuit14B must include at least two exposure control circuits to control the exposure period of a single photodiode11. Therefore, compared with the first embodiment, the exposure control circuit32C can further include a fifth exposure control circuit145C, a sixth exposure control circuit146C, a seventh exposure control circuit147C, and an eighth exposure control circuit148C, so that the red light pixel group311C, the green light pixel group312C,312C′ and the blue light pixel group313C generate voltage signals with different exposure periods, respectively. Thus, the image sensing device300C according to the present invention can be applied in a fixed frame rate environment by increasing the number of independent exposure control circuits, so that the image sensing device300C of the present invention has a wide range of applicability and other effects, but the present invention is not limited thereto.

The above description is to illustrate the implementation of the present invention by means of specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

Although the present invention has been described with reference to the preferred embodiments thereof, it is apparent to those skilled in the art that a variety of modifications and changes may be made without departing from the scope of the present invention which is intended to be defined by the appended claims.