Patent ID: 12255077

DETAILED DESCRIPTION

The various embodiments of the presently disclosed subject matter are described with specificity to meet statutory requirements. However, the description itself is not intended to limit the scope of this patent. Rather, it has been contemplated that the claimed subject matter might also be embodied in other ways, to include different steps or elements similar to the ones described in this document, in conjunction with other present or future technologies. The components described hereinafter as making up various elements of the invention are intended to be illustrative and not restrictive. Many suitable components that would perform the same or similar functions as the components described herein are intended to be embraced within the scope of the invention. Such other components not described herein can include, but are not limited to, for example, similar components that are developed after development of the presently disclosed subject matter.

It should also be noted that, as used in the specification and the appended claims, the singular forms “a,” “an” and “the” include plural references unless the context clearly dictates otherwise. References to a composition containing “a” constituent is intended to include other constituents in addition to the one named. Also, in describing the preferred embodiments, terminology will be resorted to for the sake of clarity. It is intended that each term contemplates its broadest meaning as understood by those skilled in the art and includes all technical equivalents which operate in a similar manner to accomplish a similar purpose.

Also, the use of terms herein such as “having,” “has,” “including,” or “includes” are open-ended and are intended to have the same meaning as terms such as “comprising” or “comprises” and not preclude the presence of other structure, material, or acts. Similarly, though the use of terms such as “can” or “may” is intended to be open-ended and to reflect that structure, material, or acts are not necessary, the failure to use such terms is not intended to reflect that structure, material, or acts are essential. To the extent that structure, material, or acts are presently considered to be essential, they are identified as such.

It is also to be understood that the mention of one or more method steps does not preclude the presence of additional method steps or intervening method steps between those steps expressly identified. Moreover, although the term “step” may be used herein to connote different aspects of methods employed, the term should not be interpreted as implying any particular order among or between various steps herein disclosed unless and except when the order of individual steps is explicitly required.

Turning initially toFIG.1, illustrated is a cross-sectional view of a no-leads package100having printed leadframes. The package100is comprised of an IC die105encapsulated with a dielectric mold compound110. To electrically connect the underlying IC die105, conductive vias or pillars115are formed through the mold compound110to contact the IC die105, and protrude above the mold compound110to contact leadframes120. The leadframes120are formed by printing copper on the mold compound110and in electrical contact with the conductive vias115, for example, via tin caps formed at the upper ends of the conductive vias115. It should be noted that the vias115may also be embodied as conductive pillars, solder bumps, and other types of interconnect structures, and no limitation to any particular structure is intended or should be implied.

A passivation layer125is formed over the leadframes120to form a dielectric barrier for the leadframes120. In many manufacturing techniques, the passivation layer125is also printed on the package100. When the passivation layer125is formed on the leadframes120, outer ends of select leadframes are left exposed. These exposed outer ends130are the portions of the leadframes120that soldered to a PCB to mount the package100onto that PCB. After manufacturing, the no-leads package100is singulated where the exposed outer ends130of the leadframes120are located. This singulation results in the exposed outer ends130forming the mounting pads of each singulated package100, with an upper and side surface of the exposed outer ends130providing the surfaces to be soldered during package100mounting. However, the upper and side surfaces of the exposed outer ends130comprise exposed copper, which then may oxidize as each singulated package100awaits mounting on a PCB and can result in the problems mentioned above.

One solution for the exposed upper and side surfaces of these outer ends130is to create a wettable flank having one or more wettable surface(s) on the outer ends130using a material that covers the exposed outer ends and helps increase the integrity of the solder joint between the wettable flank and bonding pads of a circuit board. The degree of wetting (i.e., the wettability of a wettable surface) is determined by a force balance between adhesive and cohesive forces, and is important in the bonding or adherence of two materials. For example, solder is deposited on a portion of the outer ends130to create the wettable flank. Unfortunately, the wettable flank may not cover all of the exposed copper of the outer ends130, and thus portions of the outer ends130may still oxidize and thus affect the integrity of the soldered package130. This is because the solder may does not adequately cover all of the exposed copper on the outer ends130. Alternatively, the solder material can be deposited over the exposed outer ends130prior to singulating each package100. However, this technique still results in sidewalls of the outer ends130having exposed copper once each package100is singulated from a strip.

Looking now atFIG.2, illustrated is a cross-sectional view of another no-leads package200having a leadframe. This embodiment of a no-leads package200still includes an IC die205encapsulated with a dielectric mold compound210. However, this embodiment of a no-leads package200has a leadframe215formed no using a printing technique. The leadframe215is again formed of copper, for example using any desired copper deposition technique.

Formed around each cross-sectional view of the leadframe215is a metal plating220. For example, NiPdAu alloy may be used to create the plating220around the copper leadframe215. Once the circuitry, i.e., the wire bonded interconnects from each die205to the leadframe215structure, for each package200is formed, the no-leads packages200are singulated from a strip. The singulation occurs by cutting through leadframe215, which exposes copper on the sidewalls225of each singulated package200. These exposed sidewalls225serve as the mounting pads for soldering the singulated packages200to a PCB. However, as before, the exposed sidewalls225are comprised of copper, which again oxidizes as each singulated package200awaits mounting on a PCB and can still result in the problems mentioned above. One solution is to employ a post-mold plating process to plate exposed copper. However, this plating solution is expensive and still produces exposed copper after singulation because individual units must be connected during the plating process for the plating current to be active on the exposed surfaces for electrolytic plating.

Looking now atFIGS.3A-3D, illustrated is a series of block diagrams showing one embodiment of a method of creating a wettable surface on the mounting pads of leadframes in no-leads packages, in accordance with the disclosed principles.FIG.3Aillustrates a cross-sectional view of a molded leadframe strip300from which a plurality of no-leads packages will be formed. The strip300includes IC dies305a,305b,305cencapsulated in mold compound307, and each die305a,305b,305cis electrically connected to a leadframe312using one or more conductive pillars309. The strip300includes openings310exposing outer ends315of a the leadframe312, which in turn provides electrical interconnection to and through each no-leads package formed from the strip300. Specifically, a passivation layer317is deposited over the leadframe312of the strip300, which may be done using advantageous deposition techniques. In advantageous embodiments, the leadframe312is printed using any of a variety of available printing processes. Additionally, the passivation layer317may also be printed using any such printing process. As discussed above, the exposed outer ends315of the leadframe312, which are typically composed of copper, will oxidize through exposure via the openings310in the passivation layer317.

Turning toFIG.3B, illustrated is a cross-sectional view of the strip300at a later stage of a disclosed example process. At this stage in the process, solder320is deposited into the openings310between the passivation layer317. More specifically, the solder320is deposited to completely cover the exposed outer ends315of the leadframe312. By covering the previously exposed outer ends315of the leadframe312, the copper comprising the outer ends315will not oxide as the packages, once singulated from the strip300, sit before mounting to a PCB. Exemplary materials for the solder320include silver, tin, alloys thereof or any other material suitable for use as a solderable material. In preferred embodiments, the solder320is a printable tin ink; however, other printable metallic inks, such as gold, silver, tin alloys, or combinations thereof, may also be employed.

In one exemplary embodiment, the solder320is deposited using a printing process, for example, an inkjet, screen, stencil or photonic printing process. Of course, other printing processes, either now existing or later developed, may also be employed to deposit the solder320over the outer ends315of the leadframe312. Moreover, in advantageous embodiments, the solder320is printed or otherwise deposited to a height of the passivation layer317. As such, the solder320is used to fill the openings310between the passivation layer317, thereby completely covering the outer ends315of the leadframe312. In preferred embodiments, the solder320is deposited to at least a thickness of about 7 microns; however, other thicknesses may also be deposited. In addition, in some embodiments, exemplary processes further include sintering the deposited solder320prior to singulating the strip300. Such sintering may be performed at temperatures ranging from about 120° C.-250° C., but other temperatures may also be employed.

InFIG.3C, illustrated is a cross-sectional view of the strip300having the packages305a,305b,305cat a further stage of the disclosed exemplary process. In particular, the strip300having the solder320filling the openings310undergoes a singulation process. In the singulation process, saws330or other cutting devices are employed to singulate the strip300to form each of the no-leads packages. The singulation occurs between the outer ends315of the leadframe312by cutting through the deposited solder320. It should be noted that the spacing between the outer ends315of the leadframe312is larger than a width of the saw or other cutting device used to singulate the strip300.

Looking now atFIG.3D, illustrated is a cross-sectional view of the no-leads packages340a,340b,340cafter singulation of the strip300. As such, after singulation the solder320on the outer ends315of the leadframe312provides mounting pads335for the no-leads packages340a,340b,340c. With the solder320on and between the outer ends315, the resulting mounting pads335have a wettable surface on both upper and side surfaces of the outer ends315of the leadframe for each package340a,340b,340c. Thus, as the packages340a,340b,340care awaiting mounting to respective PCBs, the outer ends315are no longer exposed since they are covered by the solder320on all exposed sides forming the mounting pads335.

Turning now toFIG.4, illustrated is a block diagram of a bottom view of a no-leads package400having printed copper used to build up the outer ends of the leadframe for use as mounting pads for the package400. The package400includes a passivation layer405covering and thus dielectrically protecting most of the leadframe and other components of the package400. Along outer edges of the package400are mounting pads410separated by either the passivation layer405or dielectric mold compound415encapsulating the circuitry within the package400.

FIG.4Aillustrates a cross-sectional view taken along line A-A of the no-leads package400ofFIG.4. This view of the package400shows the underlying IC die420encapsulated by the mold compound415. Also shown are conductive pillars425electrically connecting the underlying IC die420to the leadframe412formed closer to the outer surface of the package400. In addition to the leadframe412being printed, typically using copper, outer ends of the leadframe412are printed to a greater thickness above the passivation layer405to form copper mounting pads410for use in mounting and electrically connecting the package400to a PCB. However, as discussed above with regard to other no-leads packages, the printed copper mounting pads410comprise a completely exposed upper surface which will oxidize as the package400is awaiting mounting to a PCB.

Turning now toFIG.5, illustrated is a block diagram of a bottom view of a no-leads package500having printed copper used to create the leadframe, but further having a solder material to form mounting pads for the package500. More specifically, the package500again includes a passivation layer505covering and dielectrically protecting most of the leadframe and other components of the package500. However, along outer edges of the package500are mounting pads510formed in accordance with the disclosed principles using a solder material. These mounting pads510are again separated by either the passivation layer505or dielectric mold compound515encapsulating the circuitry within the package500.

FIG.5Aillustrates a cross-sectional view taken along line B-B of the no-leads package500ofFIG.5. This view of the package500again shows the underlying IC die520encapsulated by the mold compound515. In exemplary embodiments, the leadframe512is printed, typically using copper, as discussed above. However, in accordance with the disclosed principles, the outer ends of the leadframe512are not printed to a greater thickness above the passivation layer505using copper, as is found in other packages.

Instead, another embodiment of the disclosed principles includes printing on the outer ends of the leadframe512with solder to form the mounting pads510. As shown, the mounting pads510may be printed to a height extending above the passivation layer505so that the mounting pads510may be used in mounting and electrically connecting the package500to a PCB. By forming the mounting pads510by printing solder, which again may be by inkjet, screen, stencil and photonic printing, the outer ends of the copper leadframe512are covered so as to prevent their oxidation. In preferred embodiments, the solder is comprised of a printed silver ink; however, other types of metals that may be used as a solderable material maybe employed. In addition, in some embodiments, after printing the mounting pads510exemplary embodiments of the disclosed process may again include sintering, again at temperatures ranging from about at 120° C.-250° C., the deposited solder material.

In yet another embodiment, the outer ends of the leadframe512are printed with copper to a lesser thickness than their designed final thickness. Then a process in accordance with the disclosed principles may be employed to finish printing the remaining thickness of the outer ends of the leadframe512with solder. In such embodiments, the outer ends of the leadframe512would have a step-down in thickness compared to the other portions of the leadframe512, with the printed solder providing the remainder of the originally intended thickness of the outer ends, as well as providing mounting pads510having a wettable upper and side surface.

In either of these embodiments, the printed mounting pads510provide both upper and sidewall wettable surfaces to be used to solder the package500to a PCB. More specifically, although some sidewall surface of the ends of the leadframe512may still be exposed in these embodiments, those exposed copper surfaces would be used for soldering the package500to a PCB. Instead, only the upper and sidewall surfaces of the mounting pads510printed on the outer ends of the leadframe512would provide the wettable surfaces used to solder the package510to a PCB. As such, a wettable surface is provided on both the upper and sidewall surfaces used to mount the package510.

Referring now toFIGS.6A-6D, illustrated is a series of block diagrams showing one embodiment of a method in accordance with the disclosed principles of creating a wettable surface on the mounting pads of no-leads packages where the leadframe for each package is not formed using a printing technique. In particular, rather than the leadframes being printed as found in embodiments discussed above, the leadframes in this exemplary process are formed using copper deposition techniques. For example, a copper sputtering or other deposition technique for forming the leadframes may be used.

FIG.6Aillustrates a cross-sectional view of a strip600having a plurality of IC dies605encapsulated in mold compound610. Included with the IC dies605is a leadframe615throughout the strip600and which is formed of copper, for providing electrical connection to the IC dies605. In this embodiment of a disclosed process, a step-cut is performed to singulate through an initial portion of the strip600, as well as a portion of the leadframe615located between what will be the individual packages. This step-cut made through the intervening leadframe615creates openings620through which outer ends625of the singulated portions of the leadframe615are now exposed. As before, by being exposed the outer ends625of the copper leadframe615will oxidize prior to their use in mounting the packages to respective PCBs.

FIG.6Billustrates a cross-sectional view of the strip600during a later stage of this exemplary process of creating a wettable surface on the mounting pads of the eventual packages. At this stage, solder630is deposited into the opening620. More specifically, the solder630is deposited so as to ensure coverage of the sidewalls of the opening620to completely cover the exposed outer ends625of the singulated portions of the leadframe615. As before, by covering the previously exposed outer ends625of the leadframe615, the copper comprising the outer ends625will not oxide as the packages await mounting to a PCB. Exemplary materials for the solder630may again include silver, tin, alloys thereof or any other material suitable for use as a solderable material. Also, in preferred embodiments, the solder630is a printable tin ink; however, other printable metallic inks may also be employed. Moreover, the solder630may be deposited using a printing process, for example, an inkjet, screen, stencil or photonic printing process. Of course, other printing processes, either now existing or later developed, may also be employed to deposit the solder630over the outer ends625of the singulated portions of the leadframe615. Notably, in this embodiment of the disclosed principles, the solder630is not required to completely fill the openings620between packages, and instead is only deposited so as to ensure coverage of any of the exposed copper on the outer ends625. For example, the solder630may be deposited to at least a thickness of about 7 microns; however, other thicknesses may also be deposited. In addition, exemplary processes may again include sintering the deposited solder630after deposition, as discussed above and prior to singulation. Alternatively, the solder630may be printed so as to completely fill the opening620, if desired.

FIG.6Cillustrates a cross-sectional view of the strip600at a further stage of the disclosed exemplary process. In particular, the strip600having the solder630placed on the sidewalls of the openings620forms the mounting pads635for the eventual packages. In order to singulate the packages, saws640or other cutting devices are employed to singulate each of the packages from one another. The singulation occurs between the mounting pads635formed by the solder630on the outer ends625of the leadframe615structure by singulating through a remaining portion of the mold compound610and other portions of the strip600between the covered outer ends625. In this embodiment, the spacing between the sidewall mounting pads635on the outer ends625may be equal to or smaller than a width of the saw640or other cutting device used to singulate the strip600such that a smooth vertical surface comprising the mounting pads635and inner surfaces of the molding compound610is formed during singulation, as shown inFIG.6D.

Looking now atFIG.6D, illustrated is a cross-sectional view of the strip600once the packages640a,640bhave been singulated from one another. As such, after singulation the solder630on the outer ends625of the singulated portions of the leadframe615provide the mounting pads635for the no-leads packages640a,640b. With the solder630completely covering the sidewalls at the outer ends625, the resulting mounting pads635have a wettable surface on the outer ends625for connection to the PCB. Thus, as the packages640a,640bare awaiting mounting to respective PCBs, the outer ends625are no longer exposed since they are covered by the solder630on the previously exposed surfaces to form the mounting pads635.

In sum, the disclosed principles provide various methods for implementing low-cost and fast metallic printing processes into the QFN and other no-leads package assembly flow to selectively print solderable material in areas that would otherwise be susceptible to corrosion and thus pose reliability risks. The problem of copper corrosion and poor BLR performance in no-leads packages because of remaining exposed copper areas after package singulation is solved by employing selective metallic printing processes in the assembly flow to coat all risk-prone areas with solder material. The process of printing solder material in any of the techniques disclosed herein is relatively low in cost and faster than plating processes currently used in the industry, and thus eliminates the need of lengthy regulated plating lines and replaces the post-plating equipment associated with plating processes. The disclosed solder printing methods address the issue of non-wetting solderability with the exposed copper surface on both printed copper leadframes and on traditionally produced leadframes. For example, no-leads packages containing printed copper leadframes having exposed copper surfaces on the outer ends of the leadframes will thus have wettable surfaces on those previously exposed and vulnerable surfaces. The wettable surfaces provided as disclosed herein are provided on each surface used to mount packages on a PCB, which thereby increases BLR performance. Moreover, for packages having printed leadframes, the previously employed post-mold plating process may be eliminated, which is typically both a costly and time consuming process. And for packages with traditionally formed leadframes, the need for plating exposed sidewalls of the outer ends of leadframes typically performed after a step-cut is also eliminated with a simpler, faster printing solution.

While this invention has been particularly shown and described with reference to preferred embodiments, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention. The inventors expect skilled artisans to employ such variations as appropriate, and the inventors intend the invention to be practiced otherwise than as specifically described herein. Accordingly, this invention includes all modifications and equivalents of the subject matter recited in the claims appended hereto as permitted by applicable law. Moreover, any combination of the above-described elements in all possible variations thereof is encompassed by the invention unless otherwise indicated herein or otherwise clearly contradicted by context.

While various embodiments in accordance with the principles disclosed herein have been described above, it should be understood that they have been presented by way of example only, and not limitation. Thus, the breadth and scope of this disclosure should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with any claims and their equivalents issuing from this disclosure. Furthermore, the above advantages and features are provided in described embodiments, but shall not limit the application of such issued claims to processes and structures accomplishing any or all of the above advantages.

Additionally, the section headings herein are provided for consistency with the suggestions under 37 C.F.R. 1.77 or otherwise to provide organizational cues. These headings shall not limit or characterize the invention(s) set out in any claims that may issue from this disclosure. Specifically, and by way of example, although the headings refer to a “Technical Field,” the claims should not be limited by the language chosen under this heading to describe the so-called field. Further, a description of a technology as background information is not to be construed as an admission that certain technology is prior art to any embodiment(s) in this disclosure. Neither is the “Brief Summary of the Invention” to be considered as a characterization of the embodiment(s) set forth in issued claims. Furthermore, any reference in this disclosure to “invention” in the singular should not be used to argue that there is only a single point of novelty in this disclosure. Multiple embodiments may be set forth according to the limitations of the multiple claims issuing from this disclosure, and such claims accordingly define the embodiment(s), and their equivalents, that are protected thereby. In all instances, the scope of such claims shall be considered on their own merits in light of this disclosure, but should not be constrained by the headings set forth herein.