Patent ID: 12189064

DETAILED DESCRIPTION

Reference is made toFIGS.1and2illustrating an exploded perspective view and assembled perspective view, respectively, of a portion100of an optical integrated circuit package. Reference is also made toFIG.3which illustrates a partial cross sectional view of the portion100of the optical integrated circuit package taken along dotted line3inFIG.2. A support substrate102is made of an insulating material (perhaps including multiple layers) and includes an upper surface and a lower surface. The support substrate102may, for example, be of a printed circuit board (PCB) type. The upper surface of support substrate102is covered by a first solder mask layer104including openings that expose upper circuit connection pads. The lower surface of support substrate102is covered by a second solder mask layer108including openings that expose lower circuit pads. The upper circuit connection pads are electrically connected to the lower circuit pads through an electrical interconnection network (not explicitly shown) within the support substrate102.

A lower (or back) surface of an optical sensor integrated circuit (IC) device (i.e., an IC die)112is mounted to the upper surface of the first solder mask layer104and electrical pads120of the optical sensor integrated circuit device112are wirebonded to certain ones of the upper circuit connection pads121located within corresponding opening(s) in the first solder mask layer104. The optical sensor integrated circuit device112includes, at its upper (or front) surface, a first optical sensor array116A and a second optical sensor array116B (i.e., a front-side illuminated sensor) supported by a semiconductor material substrate. The arrays116A and116B include one or more photosensitive circuits formed on and/or in the semiconductor material substrate such as, for example, single photon avalanche diodes (SPADs). Although wirebonding is shown by example, it will be understood that the optical sensor integrated circuit device112may instead be surface mounted, in a flip-chip configuration, to certain ones of the upper circuit connection pads located within an opening in the first solder mask layer104, with the first optical sensor array116A and second optical sensor array116B provided at a lower (or back) surface (i.e., a back-side illuminated sensor).

An optical emitter integrated circuit device122is surface mounted to certain one(s) of the upper circuit connection pads within corresponding opening(s) in the first solder mask layer104and wirebonded to certain other one(s) of the upper circuit connection pads within corresponding opening(s) in the first solder mask layer104.

Auxiliary circuit components128are surface mounted to certain ones of the upper circuit connection pads within corresponding openings in the first solder mask layer104.

The illustrated circuitry may, for example, form a time-of-flight sensing circuit where the optical emitter integrated circuit device122is configured to emit a pulse of (infrared) light that is sensed by the first optical sensor array116A of the optical sensor integrated circuit device112to provide a reference time for light emission, with a target reflection of the emitted pulse of light being sensed by the second optical sensor array116B of the optical sensor integrated circuit device112to provide a detection time for light reflection. Distance from the optical integrated circuit package to the target may then be calculated as a function of the time difference between the reference time and the detection time. Power connections and signal connections for the portion100are provided through the lower circuit pads exposed by the openings in the second solder mask layer108.

An optical filter132is mounted to extend over the second optical sensor array116B of the optical sensor integrated circuit device112. The optical filter132may, for example, be configured to selectively pass light within a certain range of wavelengths (for example, infrared) corresponding to a wavelength of the light emitted by the optical emitter integrated circuit device122. The optical filter132is configured as a flat rectangular plate that has, for example, a parallelpipedal shape (i.e., a six-faced polyhedron all of whose faces are parallelograms lying in pairs of parallel planes). The major (i.e., top and bottom) faces of the parallelpipedal-shaped optical filter132extend in the x-y plane parallel to the upper surface of the optical sensor integrated circuit device112and completely cover the second optical sensor array116B. The minor (i.e., side or peripheral edge) faces of the parallelpipedal-shaped optical filter132extend in the z-direction perpendicular to the upper surface of the optical sensor integrated circuit device112.

The mounting of the optical filter132offset in the z-direction to the upper surface of the optical sensor integrated circuit device112is accomplished using one or two discrete spacer blocks136and adhesive layers138. In the embodiment of the portion100of the optical integrated circuit package shown inFIGS.1and2, a pair of spacer blocks136are provided with one spacer block arranged to longitudinally extend (for example, in the x-direction) parallel to a first side edge of the optical filter132and another spacer block arranged to longitudinally extend (for example, in the y-direction) parallel to a second side edge of the optical filter132(where the first and second side edges are adjacent each other). The spacer blocks136, which have a thickness in the z-direction substantially equal to a desired z-direction offset of the optical filter132from the upper surface of the optical sensor integrated circuit device112, are each made of a silicon material formed as a flat rectangular plate (having, for example, a parallelpipedal shape). The bottom surface of each spacer block is attached, for example using a layer of adhesive material (for example, comprising a die attach film (DAF) layer), to the upper surface of the optical sensor integrated circuit device112. The bottom surface of the optical filter132is attached, for example using a layer of adhesive material (for example, comprising a die attach film (DAF) layer), to the upper surfaces of the spacer blocks136.

The spacer blocks136may, for example, be manufactured by singulating (i.e., dicing) a wafer of semiconductor (for example, silicon) material having a desired thickness in the z direction into desired sizes in the x-y plane. In an implementation, the semiconductor material of the wafer used to make the spacer blocks and the semiconductor substrate material of the optical sensor integrated circuit device112are preferably a same semiconductor material (having identical coefficients of thermal expansion) or semiconductor materials have substantially similar coefficients of thermal expansion (for example, +/−5% of each other). The diced portions of the wafer forming the spacer blocks136are then positioned, for example using a suitable pick-and-place manufacturing operation, at desired locations on the upper surface of the optical sensor integrated circuit device112. These desired locations may comprise, for example, free areas at the upper surface of the optical sensor integrated circuit device112where neither the first optical sensor array116A, nor the second optical sensor array116B, nor the electrical pads120of the optical sensor integrated circuit device112are located. In particular, the free areas where the spacer blocks136are positioned for attachment may comprise areas along a side edge of the second optical sensor array116B and/or between the side edge of the second optical sensor array116B and the electrical pads of the optical sensor integrated circuit device112. The adhesive material layers138may, for example, be provided at upper and lower surfaces of the wafer of semiconductor prior to singulation.

Likewise, the optical filter132may, for example, be manufactured by singulating (i.e., dicing) a wafer of transparent (for example, glass) material having desired thickness in the z direction into desired sizes in the x-y plane. The diced portion of the wafer forming the optical filter132is then positioned, for example using a suitable pick-and-place manufacturing operation, at a desired location on the spacer block(s)136and extending over at least the second optical sensor array116B.

Suitable ultra-violet (UV) exposure may be used to activate and cure the adhesive material of the layers138during manufacture of the portion100.

It will be noted that at least one corner of the optical filter132, and perhaps two or more distal portions of side edges of the optical filter132, are not supported at all by a spacer block136. That at least one corner and/or two or more distal portions of side edges of the optical filter132extend unsupported, in a cantilever-like fashion, over the second optical sensor array116B of the optical sensor integrated circuit device112. In the embodiment of the portion100of the optical integrated circuit package shown inFIGS.1and2, the corner150and/or the distal portions152,154of adjacent side edges (located, for example, at said corner150) are unsupported by the spacer blocks136.

In particular: a first edge of the parallelpipedal-shaped optical filter132is supported by the discrete spacer block136and a second edge of the parallelpipedal-shaped optical filter132opposite the first edge is not supported at all (see,FIG.5, for example). Alternatively: a first corner of the parallelpipedal-shaped optical filter132is supported by the discrete spacer block(s)136and a second corner of the parallelpipedal-shaped optical filter diagonally opposite the first corner is not supported at all by a spacer (see,FIG.2, for example). In another implementation: the parallelpipedal-shaped optical filter132includes a first edge and a second edge opposite the first edge of the parallelpipedal-shaped optical filter, with the discrete spacer block136positioned between the first and second edges, and neither of the opposed first and second edges of the parallelpipedal-shaped optical filter132is supported at all by a spacer. In yet another implementation: the parallelpipedal-shaped optical filter132includes a first edge and a second edge adjacent the first edge, with one discrete spacer block136positioned adjacent the first edge of the parallelpipedal-shaped optical filter, and another discrete spacer block136positioned adjacent the second edge of the parallelpipedal-shaped optical filter (see,FIG.2, for example). In this case, it will be noted that a corner of the parallelpipedal-shaped optical filter132diagonally opposite a corner at the adjacent first and second edges of the parallelpipedal-shaped optical filter132is not supported at all by a spacer.

Reference is now made toFIG.4which illustrates a cross sectional perspective view of an optical integrated circuit package200including the portion100ofFIGS.1and2. A cap202is mounted to the upper surface of the first solder mask layer104. The cap includes side walls204, a front wall206over the side walls and a partition wall208extending between an opposed pair of side walls. The partition wall208is arranged to be placed between the first optical sensor array116A and the second optical sensor array116B of the optical sensor integrated circuit device112. The side walls204, front wall206and partition wall208delimit two cavities within the cap202. The first cavity210A includes the optical emitter integrated circuit device122and a portion of the optical sensor integrated circuit device112which includes the first optical sensor array116A. The second cavity210B includes a portion of the optical sensor integrated circuit device112which includes the second optical sensor array116B. The partition wall208provides a light barrier for blocking light emitted by the optical emitter integrated circuit device122from directly reaching the second optical sensor array116B (in other words, the emitted light is block from propagating within the confines of the cap202to reach the second optical sensor array116B). It will be noted that light emitted by the optical emitter integrated circuit device122can still directly reach the first optical sensor array116A by propagating within the first cavity of the cap202. The front wall206includes a first opening212aligned with the optical emitter integrated circuit device122and a second opening214aligned with the second optical sensor array116B. A first diffractive optical element222(for example, a lens) is mounted at and/or within the first opening212. Light emitted by the optical emitter integrated circuit device122passes through the first opening212and is directed by the first diffractive optical element222to illuminate a scene. A second diffractive optical element224(for example, a lens) is mounted at and/or within the second opening214. Light reflected by an object in the illuminated scene passes through the second opening214, is collected by the second diffractive optical element224and passes through the optical filter134to reach the second optical sensor array116B.

WhileFIGS.1-4show an implementation using a pair of spacer blocks136supporting adjacent sides of the optical filter132, it will be noted that alternative implementations as shown inFIGS.5and6may instead utilize just a single spacer block136. In theFIG.5implementation, the spacer block136is provided at one end of the optical filter along a side edge with the optical filter132extending in a cantilever over the second optical sensor array116B. Note here that the side edge of the optical filter132opposite to that where the spacer block136is attached is freely suspended with the adjacent corners150and/or the distal portions152,154of the side edges (located, for example, at each corner150) unsupported by any spacer block136. In theFIG.6implementation, the spacer block136is provided at a location between opposite ends of the optical filter extending between opposed side edges. Each of the opposite ends of the optical filter132extends in a cantilever from the supporting spacer block136with one end extending over the first optical sensor array116A and another end extending over the second optical sensor array116B. Note here that the opposite side edges of the optical filter132between which the spacer block136is attached are freely suspended with the adjacent corners150and/or the distal portions152,154of the side edges (located, for example, at each corner150) unsupported by any spacer block136.

A number of advantages accrue from the use of the configuration for the portion100as described above inFIGS.1-6, including: a) a reduction in cost of the assembly comprising the portion100; b) support for an optical sensor integrated circuit device112having a smaller dimension (since the spacer block(s)136can be selectively attached at open/free surface areas on the upper surface of the die); c) support for a second optical sensor array116B of the optical sensor integrated circuit device112having a larger dimension (since the spacer block(s)136can be selectively attached at open/free surface areas on the upper surface of the die offset from the arrays116A and116B); d) support for the portion100, and hence the overall package200, having a smaller dimension (since the spacer structure supporting the optical filter132need not completely surround the second optical sensor array116B of the optical sensor integrated circuit device112); and e) reduction in thermal stress applied to the optical sensor integrated circuit device112(since coefficients of thermal expansion for the semiconductor material of the spacer block(s)136and the semiconductor substrate material of the optical sensor integrated circuit device112can be identical or substantially matched).

While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are considered illustrative or exemplary and not restrictive; the invention is not limited to the disclosed embodiments. Other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a study of the drawings, the disclosure, and the appended claims.