Patent ID: 12198864

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

A multilayer ceramic capacitor1according to a preferred embodiment of the present invention will be described.FIG.1is a schematic perspective view of the multilayer ceramic capacitor1of the present preferred embodiment.FIG.2is a cross-sectional view taken along the line II-II of the multilayer ceramic capacitor1shown inFIG.1.FIG.3is a cross-sectional view taken along the line of the multilayer ceramic capacitor1inFIG.1.

The multilayer ceramic capacitor1has a rectangular or substantially rectangular parallelepiped shape, and includes a multilayer body2, and a pair of external electrodes3provided at both ends of the multilayer body2. The multilayer body2includes an inner layer portion11including a plurality of sets of dielectric layers14and internal electrode layers15.

In the following description, as terms representing the orientations of the multilayer ceramic capacitor1, a direction in which the pair of external electrodes3are provided is defined as a length direction L. A direction in which the dielectric layers14and the internal electrode layers15are laminated (stacked) is defined as a lamination (stacking) direction T. A direction intersecting both the length direction L and the lamination direction T is defined as a width direction W. In the present preferred embodiment, the width direction is perpendicular or substantially perpendicular to both the length direction L and the lamination direction T.

Furthermore, a cross-section extending in the length direction L and the lamination direction T is defined as an LT cross-section, a cross-section extending in the length direction L and the width direction W is defined as an LW cross-section, and a cross-section extending in the width direction W and the lamination direction T is defined as a WT cross-section.FIG.2is an LT cross-sectional view at the middle portion in the width direction W of the multilayer ceramic capacitor1.FIG.3is a WT cross-section at the middle portion in the length direction L of the multilayer ceramic capacitor1.

Furthermore, among the six outer surfaces of the multilayer body2, a pair of outer surfaces opposing each other in the lamination direction T is defined as a first main surface A1and a second main surface A2, a pair of outer surfaces opposing each other in the width direction W is defined as a first side surface B1and a second side surface B2, and a pair of outer surfaces opposing each other in the length direction L is defined as a first end surface C1and a second end surface C2.

When it is not necessary to particularly distinguish the first main surface A1and the second main surface A2from each other, they are collectively referred to as the main surface A, when it is not necessary to particularly distinguish between the first side surface B1and the second side surface B2, they are collectively referred to as a main surface B, and when it is not necessary to particularly distinguish between the first end surface C1and the second end surface C2, they are collectively referred to as an end surface C.

The dimension of the multilayer ceramic capacitor1is not particularly limited. However, for example, it is preferable that the dimension in the length direction L is about 0.2 mm or more and about 1.2 mm or less; the dimension in the width direction W is about 0.1 mm or more and about 0.7 mm or less, and the dimension in the lamination direction T is about 0.1 mm or more and about 0.7 mm or less.

Multilayer Body2

The multilayer body2includes a laminate chip10, and side gap portions20provided on both sides in the width direction W of the laminate chip10. In the multilayer body2, ridge portions R1of the two surfaces of the main surface A, the side surface B, and the end surface C are chamfered and rounded.

Laminate Chip10

The laminate chip10includes the inner layer portion11, an upper outer layer portion12ain the vicinity of the first main surface A1of the inner layer portion11, and a lower outer layer portion12bin the vicinity of the second main surface A2of the inner layer portion11. When it is not necessary to particularly distinguish between the upper outer layer portion12aand the lower outer layer portion12b, they are collectively referred to as an outer layer portion12.

Inner Layer Portion11

The inner layer portion11includes the plurality of sets of dielectric layers14and internal electrode layers15which are alternately laminated along the lamination direction T.

Dielectric Layer14

The dielectric layers14each preferably have a thickness of, for example, about 0.4 μm or more and about 1.0 μm or less, and more preferably, about 0.4 μm or more and about 0.6 μm or less.

The dielectric layers14are each made of a ceramic material. As the ceramic material, for example, a dielectric ceramic including BaTiO3as a main component is used. The number of dielectric layers14of the laminate chip10in addition to the upper outer layer portion12aand the lower outer layer portion12bis preferably, for example, 15 or more and 700 or less.

In the present preferred embodiment, the dielectric layers14do not include Ni (nickel), or alternatively, the Ni content in the dielectric layers14is less than the Ni content in the outer layer portion12. Thus, it is possible to increase the size of the particles of the dielectrics in the dielectric layers14, such that it is possible to increase the capacitance.

Internal Electrode Layer15

The internal electrode layer15preferably has a thickness of, for example, about 0.2 μm or more and about 0.8 μm or less. The number of the internal electrode layers15is preferably, for example, 15 or more and 700 or less.

The average thickness of each of the plurality of internal electrode layers15and the plurality of dielectric layers14is measured as follows. First, a cross section perpendicular or substantially perpendicular to the length direction L of the multilayer body2exposed by polishing is observed by a scanning electron microscope. Next, the thicknesses of the total of five lines including a center line along the lamination direction T passing through the center of the cross-section of the multilayer body2, and two lines respectively drawn on both sides at equal or substantially equal intervals from the center line are measured. The average of these five measurements is calculated. To obtain a more accurate average thickness, the above five measurements are obtained at each of the upper portion, the middle portion, and the lower portion in the lamination direction T are obtained, and the average value of these measurements is used as the average thickness.

The internal electrode layer15includes a plurality of first internal electrode layers15A and a plurality of second internal electrode layers15B. The first internal electrode layers15A and the second internal electrode layers15B are alternately provided. When it is not necessary to particularly distinguish between the first internal electrode layer15A and the second internal electrode layer15B, they will be collectively referred to as an internal electrode layer15.

The first internal electrode layers15A each include a first opposing portion152afacing the second internal electrode layer15B, and a first lead-out portion151aextending from the first opposing portion152atoward the first end surface C1. The end portion of the first lead-out portion151ais exposed to the first end surface C1, and electrically connected to the first external electrode3A to be described later.

The second internal electrode layers15B each include a second opposing portion152bfacing the first internal electrode layer15A, and a second lead-out portion151bextending from the second opposing portion152btoward the second end surface C2. The end portion of the second lead-out portion151bis electrically connected to the second external electrode3B to be described later.

Furthermore, a charge is accumulated in the first opposing portion152aof the first internal electrode layer15A and the second opposing portion152bof the second internal electrode layer15B, and the characteristics of the capacitor are provided.

FIG.4is an enlarged view of the portion Q1ofFIG.3. As shown inFIG.4, in the WT cross-section at the middle portion in the length direction L, the positional deviation d1between the end portions of the adjacent internal electrode layers15in the width direction W is, for example, about 5 μm or less.

Furthermore, the positional deviation d2between the end portion which is in the vicinity of the side surface B and located outermost in the width direction W and the end portion which is located innermost in the width direction W among all of the internal electrode layers15is, for example, about 10 μm or less.

That is, the end portions in the width direction W of the laminated internal electrode layers15are located at the same or substantially the same position in the width direction W. In other words, the positions of the end portions are aligned or substantially aligned in the lamination direction T.

In the present preferred embodiment, the internal electrode layers15are, for example, made mainly of Ni (nickel) including Sn (tin). However, the present invention is not limited thereto, and the internal electrode layers15may be made of, for example, a metallic material such as Cu, Ag, Pd, a Ag—Pd, and Au.

Furthermore, Mg (magnesium) included in the side gap portions20is segregated at the side gap portions20on both side surfaces of the internal electrode layers15.

Sn-layer16Extending from Internal Electrode Layer15

FIG.5is an enlarged view of the circled portion Q2ofFIG.2.

The Sn-layer16is provided on the surfaces of the internal electrode layers15. The Sn-layer16is formed by migrating from the inside to the surface during firing. The Sn-layer16extends from the surfaces of the internal electrode layers15to a boundary region Z1between the external electrode3, and the dielectric layers14and the internal electrode layers15adjacent to one another in the lamination direction T. Furthermore, the Sn-layer16also covers the boundary surfaces of the internal electrode layers15with the external electrode3.

It should be noted that it is not necessary for the Sn-layer16to cover the entire internal electrode layers15, and the Sn-layer16can only cover a portion of the internal electrode layers15.

Effect of Sn-Layer16

In the multilayer ceramic capacitor1of the present preferred embodiment, since the Sn-layer16extends to the boundary region Z1between the dielectric layers14and the external electrode3, for example, it is possible to reduce or prevent moisture through the boundary surface between the external electrode3and the multilayer body2from flowing in the interior of the inner layer portion11, which provides high humidity resistance.

In the present preferred embodiment, the Sn-layer16extending from one of the internal electrode layers15is not coupled to the Sn-layer16extending from another internal electrode layer15adjacent to the one internal electrode layer15, and there is also a portion where the Sn-layer16is not provided in the boundary region Z1between the dielectric layer14and the external electrode3. However, it is sufficiently effective to improve the humidity resistance of the multilayer ceramic capacitor1even in such a case.

Outer Layer Portion12

The thickness of the outer layer portion12is preferably about 9.5 μm or more and about 30 μm or less, and more preferably about 9.5 μm to about 20 μm, for example, for both the upper outer layer portion12aand the lower outer layer portion12b.

Ni in Outer Layer Portion12

Both the upper outer layer portion12aand the lower outer layer portion12bof the outer layer portion12are made of a dielectric ceramic material including BaTiO3as a main component, similar to the dielectric layer14of the inner layer portion11, for example. However, the upper outer layer portion12aand the lower outer layer portion12bdiffer from the dielectric layer14of the inner layer portion11in that the former includes Ni, or the content of Ni is higher in the former than in the latter.

As schematically shown inFIG.4, Ni is not provided in a region Z3in a vicinity of the internal electrode layer15in the outer layer portion12, since Ni is absorbed by the internal electrode layer15. That is, Ni is distributed unevenly rather than entirely in the outer layer portion12. Furthermore, the density of Ni is highest in the middle portion of the outer layer portion12in the lamination direction T.

Advantageous Effects

Since the multilayer ceramic capacitor1of the present preferred embodiment includes Ni in the outer layer portion12, particles of the dielectric ceramic after firing are densified.

Furthermore, since the pores provided in the dielectric ceramic in the outer layer portion12are filled with Ni, humidity resistance is increased in the multilayer ceramic capacitor1.

Furthermore, Ni in the outer layer portion12is diffused into the Cu-layer of the external electrode3, such that the adhesion with the external electrode3is improved.

Although Mg preferably is not included in the outer layer portion12in the present preferred embodiment, Mg may be included in the outer layer portion12.

Side Gap Portion20

The side gap portions20include side gap portions20which are respectively provided in the vicinity of the first side surface B1of the laminate chip10and the second side surface B2of the laminate chip10. When it is not necessary to particularly distinguish between the first side gap portion20aand the second side gap portion20b, they will be collectively referred to as a side gap portion20.

Component of Side Gap Portion20

The side gap portions20each cover, along the end portions, the end portions in the width direction W of the internal electrode layers15exposed at the both side surfaces of the laminate chip10. There is an interface U shown inFIGS.3and4between the laminate chip10and the side gap portion20.

The side gap portions20are made of, for example, a dielectric ceramic material including BaTiO3as a main component, similarly to the dielectric layers14, but further include Mg as a sintering aid. The content of Mg is, for example, about 0.2 mol % or more and about 2.8 mol % or less with respect to 100 moles of Ti at the middle portion in the length direction L of the side gap portion20. When Mg is about 2.8 mol % or less, since the grain growth of the dielectric is not reduced or prevented in the dielectric layer14in the vicinity of the outermost layer of the internal electrode layers15, a capacitance decrease is less likely to occur.

Furthermore, Mg of the side gap portion20and Ni of the outer layer portion12are segregated in a boundary region Z2between the side gap portion20and the outer layer portion12during firing. A portion of the segregated Ni and a portion of the segregated Mg provides a Ni—Mg oxide.

That is, Ni—Mg oxide is segregated in the boundary region Z2. A portion of Ni segregated in the boundary region Z2is present in the form of Ni in the boundary region Z2. A portion of Mg segregated in the boundary region Z2is present in the form of Mg in the boundary region Z2. Therefore, Ni—Mg oxide, Ni, and Mg are segregated in the boundary region Z2.

Ni is not included in the dielectric layer14. Therefore, the segregation of Ni and Ni—Mg oxide in the boundary region between the dielectric layer14and the side gap portion20is smaller than the segregation of Ni and Ni—Mg oxide in the boundary region Z2.

Since the dielectric layers14do not include Ni, the grain growth of the particles of the dielectric layers14is not reduced or prevented. Therefore, the particles of the dielectric layers14become large, such that it is possible to increase the capacitance of the multilayer ceramic capacitor1.

A Ni—Mg alloy, which is an alloy of Mg included in the side gap portion20and Ni included in the outer layer portion12, is segregated in the boundary region Z2between the side gap portion20and the outer layer portion12. The boundary region Z2tends to become the penetration path of moisture. A portion of the pores in the boundary region Z2is filled with Ni—Mg oxide. A portion of the pores present in the boundary region Z2is filled with Ni or Mg. Thus, the multilayer ceramic capacitor1of the present preferred embodiment has high humidity resistance.

Boundary Region Z2

Regarding the end portions of the internal electrode layers15as described above, the positional deviation d1between the adjacent internal electrode layers15on the WT cross-section including the width direction W and the lamination direction T at the middle portion in the length direction L shown inFIG.4, is, for example, about 5 μm or less. Furthermore, the positional deviation d2among the end portion which is located outermost in the width direction W of the internal electrode layer15, the end portion which is located innermost in the width direction W of the internal electrode layer15, and all of the internal electrode layers15, is, for example, about 10 μm or less.

The boundary region Z2between the side gap portion20and the outer layer portion12is a substantially band-shaped region of about 3 μm in the width direction W around the extended line e extending in the lamination direction T on the middle in the width direction W between the end portion of the internal electrode layer15located outermost in the width direction W, and the end portion of the internal electrode layer15located innermost in the width direction W.

The segregation of Ni—Mg oxide, the segregation of Ni, and the segregation of Mg can be observed by WDX (wavelength-dispersive X-ray spectrometry).

External Electrode3

The external electrodes3each include a first external electrode3A provided on the first end surface C1of the multilayer body2, and a second external electrode3B provided on the second end surface C2of the multilayer body2. When it is not necessary to particularly distinguish between the first external electrode3A and the second external electrode3B, they will be collectively referred to as an external electrode3. The external electrode3covers not only the end surface C, but also covers portions of the main surface A and the side surface B which are in the vicinity of the end surface C.

As described above, the end portion of the first lead-out portion151aof the first internal electrode layer15A is exposed at the first end surface C1, and electrically connected to the first external electrode layer3A. Furthermore, the end portion of the second lead-out portion151bof the second internal electrode layer15B is exposed at the second end surface C2, and is electrically connected to the second external electrode3B. Thus, a plurality of capacitor elements are electrically connected in parallel between the first external electrode3A and the second external electrode3B.

External Electrode3

Connection Ratio Between Internal Electrode Layer15and External Electrode3

FIG.6is an LW cross-sectional view through the internal electrode layers15of the multilayer ceramic capacitor1.FIG.3provides a WT cross-section at a position W1passing through the middle portion in the width direction W ofFIG.6. A position W2inFIG.6is a position passing through the end portion of the internal electrode layer15in the width direction W.

Since the internal electrode layers15are each thin, a plurality of pores15aare actually extending through the lamination direction T. Therefore, when viewed in the LT cross-section as inFIG.2, not all of the internal electrode layers15are connected to the external electrode3. As shown by position P1inFIG.2, the internal electrode layer15may be separated from the external electrode3. However, although the internal electrode layer15and the external electrode3are not connected to each other at the position P1, the internal electrode layer15and the external electrode3are connected at a position shifted in the width direction W from the position P1.

Here, the number of all of the internal electrode layers15extending to one of the external electrodes3in the LT cross-section shown inFIG.2at a certain location in the width direction W inFIG.6is defined as N0, and the number of the internal electrode layers15connected to the one of the external electrodes3among them is defined as N. Then, the connection ratio at the certain location is defined as N/N0.

For example, when the number of all of the internal electrode layers15extending to one of the external electrodes3in the LT cross-section shown inFIG.2at the position W1passing through the middle portion in the width direction W inFIG.6is defined as N0, and the number of the internal electrode layers15connected to the one of the external electrodes3among them is N1, the connection ratio at the position W1is defined as N1/N0.

Furthermore, similarly to the above, when the number of all of the internal electrode layers15extending to one of the external electrodes3in the LT cross-section shown inFIG.2at the position W2passing through the end portions in the width direction W inFIG.6is defined as N0, and the number of the internal electrode layers15connected to the one of the external electrodes3among them is defined as N2, the connection ratio at the position W2is defined as N2/N0.

In common multilayer ceramic capacitors that differ from the present preferred embodiment, for example, the connection ratio N1/N0in the LT cross-section at the position W1passing through the middle portion in the width direction W, and the connection ratio N2/N0in the LT cross-section at the position W2passing through the end portions in the width direction W are greater than about 90% when expressed as a percentage. Furthermore, for example, the difference between the connection ratio N1/N0at the position W1passing through the middle portion in the width direction W, and the connection ratio N2/N0at the position W2passing through the end portion in the width direction W is smaller than about 10%.

When the connection ratio is smaller than about 90%, and the difference in the connection ratio differs greatly by the position, the connectivity between the internal electrode layer15and the external electrode3is deteriorated, the flow of electricity is reduced or prevented or becomes unstable, such that the equivalent series resistance (ESR) of the multilayer ceramic capacitor may increase.

However, in the multilayer ceramic capacitor1of the present preferred embodiment, the connection ratio N1/N0at the position W1passing through the middle portion in the width direction W, and the connection ratio N2/N0at the position W2passing through the end portion in the width direction W are about 90% or more when expressed as a percentage. Furthermore, the difference between the connection ratio N1/N0at the position W1passing through the middle portion in the width direction W, and the connection ratio N2/N0at the position W2passing through the end portion in the width direction W is about 10% or less.

Therefore, according to the multilayer ceramic capacitor1of the present preferred embodiment, the contact area between the internal electrode layer15and the external electrode3is sufficiently secured, there is no variation in the connection ratio, a good connection ratio is ensured, electricity flows well, and the equivalent series resistance (ESR) of the multilayer ceramic capacitor can also be reduced.

Detection Method

The connection ratio between the external electrode3and the internal electrode layer15is detected as follows.

Connection Ratio at Position W1

Polishing starts at the LT side surface of the multilayer ceramic capacitor1, and the internal electrode layers15begin to be exposed, such that the resultant LT cross-section polished about 5 μm is exposed.

Then, the number of the internal electrode layers15extending to one of the external electrodes3in the LT cross-section and connecting with the one of the external electrodes3is defined as N1.

The total number of the internal electrode layers15connected to the external electrode3provided on the same side is defined as N0.

With N1and N0above, the connection ratio N1/N0at the position W1is obtained.

Connection Ratio at Position W2

Polishing starts at the LT side surface of the multilayer ceramic capacitor1, and continues up to the middle portion of the internal electrode layers15in the width direction, such that the resultant LT cross-section is exposed.

Then, the number of the internal electrode layers15extending to one of the external electrodes3in the LW cross-section and connecting with the one of the external electrodes3is defined as N2.

The total number of the internal electrode layers15connected to the external electrode3provided on the same side is defined as N0.

With N2and N0above, the connection ratio N2/N0at the position W1is obtained.

In a case in which the number of the internal electrode layers15is large, it is acceptable to check about 20 pieces of the internal electrode layers15in the region of the outermost layer and about 40 pieces of the internal electrode layers15at the middle portion in the lamination direction T to obtain the number of the internal electrode layers connected to the external electrode3and calculate the average value.

In the multilayer ceramic capacitor1of the present preferred embodiment, a result of actual measurement showed that the connection ratios at the position W1and the position W2were about 90% or more.

The reason why it is possible to obtain high connection ratios in this way will be described in the manufacturing method described later.

Structure of External Electrode3

The external electrode3includes a base electrode layer30and a plated layer31in order from the multilayer body2.

As shown inFIGS.2and6, the base electrode layer30is divided into a first region30aof, for example, about 0.1 μm to about 5 μm, a second region30b, and a third region30cof, for example, about 0.1 μm to about 5 μm in order from the multilayer body2. The thickness of the second region30bis not limited to about 0.1 μm to about 5 μm. The thickness of the second region30bcorresponds to the remaining thickness obtained by eliminating the first region30aand the third region30cfrom the external electrode3. The plated layer31includes a Ni plated layer31aand a Sn plated layer31bin order from the base electrode layer30. The external electrode3including these layers covers not only the end surface C, but also covers portions of the main surface A and the side surface B in the vicinity of the end surface C.

Furthermore, the first region30a, the second region30b, and the third region30cmay be divided according to the ratio of glass G. For example, in the LT cross-section, when the area ratio of glass to Cu in the entire base electrode layer30(area of glass/area of Cu) is defined as P, the first region30amay be defined as a region of about 0.1 P or less, the second region30bmay be defined as a region of about 1.2 P or more, and the third region30cmay be defined as a region lower than about 1.0 P. It should be noted that a second region may or may not be included. The second region can belong to the first region or the third region when the second region satisfies either one of the defined thickness or P of them.

Material of External Electrode3

The first region30a, the second region30b, and the third region30cof the base electrode layer30are formed by firing a Cu paste in which glass G including Ba (barium) for densification is mixed, and thus, are electrodes by post-fire which are separately fired after the firing of the multilayer body2.

First Region30a

The thickness of the first region30ain the length direction L is, for example, about 0.1 μm or more and about 5 μm or less.

As schematically shown inFIG.5, the first region30aincludes Ni, which is a metal included in the internal electrode layers15, in a larger amount than the second region30band the third region30c. When detected by WDX, the intensity ratio of Ni to Cu is preferably about 20% or more, for example.

Ni is included in a higher density, in particular, on a side of the first region30ain the vicinity of the inner layer portion11, than in the other regions such as a side of the first region30ain the vicinity of the second region30b, the second region30b, and the third region30c. A Ni-rich layer is provided on the side of the first region30ain the vicinity of the inner layer portion11. Furthermore, the density of Ni near the internal electrode layers15in the side of the first region30ain the vicinity of the inner layer portion11is higher than the density of Ni adjacent to the dielectric layers14in the side of the first region30ain the vicinity of the inner layer portion11. Furthermore, Ni makes a solid solution with Cu in the first region30a, and is alloyed.

As described above, the first region30aincludes a Ni component more than the second region30band the third region30c. Therefore, the internal electrode layers15and the base electrode layer30have a better connection ratio.

Particle Size of Cu being Large in Side in the Vicinity of Multilayer Body2

Furthermore, the particle size of Cu in the first region30ais larger than that in the second region30band the third region30c. In addition, the thickness decreases as approaching the second region30band the third region30c.

The particle size of Cu is specified based on the area in the LT cross-section shown inFIG.5.

Second Region30b

The second region30bcorresponds to a region other than the first region30aand the third region30c. The second region30bis preferably thicker than the total value of the thicknesses of the first region30aand the third region30c, and is, for example, about 10 μm or more and about 40 μm or less.

The second region30bincludes more glass G than the first region30aand the third region30c. When the area ratio of glass to Cu (area of glass/area of Cu) in the entire base electrode layer30in the LT cross-section is P, the glass G is, for example, equal to or larger than about 1.2 P. The ratio of the glass G is obtained by measuring the area of Si by WDX, and calculating the area of Si with respect to the total area.

Third Region30c

The third region30cincludes more Cu than the first region30aand the second region30b. The content of the glass is, for example, less than about 1.0 P in the LT cross-section shown inFIG.5.

The third region30cincludes more Cu than the second region30band the third region30c. Therefore, the connection ratio when mounting the multilayer ceramic capacitor1on a board is favorable.

Furthermore, it is possible to determine the adhesiveness of the Ni plated layer31aby counting portions where plating is not provided by visually checking100locations on the surface of the plated layer31.

The third region30ccontains Cu in the greatest amount. Therefore, the Ni plated layer31aon the outer side is easily adhered thereto. Furthermore, the plated layer31overall is hardly peeled off therefrom. In the present preferred embodiment, there was no portion without plating.

In the multilayer ceramic capacitor1of the present preferred embodiment, since the ratio of the glass G in the second region30bis, for example, about 1.2 P or more, the multilayer ceramic capacitor1has a high sealability property and high moisture resistance. Regarding humidity resistance of the multilayer ceramic capacitor1, it was determined that the humidity resistance was low when a voltage of about 6.3V was applied and the resistance was below about 100 MΩ under an environment of temperature about 85° C. and humidity about 85%. The threshold of about 100 MΩ is for the case of a capacitance of about 1 μF.

Unlike the present preferred embodiment, among 100 pieces of the multilayer ceramic capacitors1for comparison having the ratio of glass G smaller than about 1.2 P in the second region30b, the resistance was below about 100 MΩ in eleven pieces of the multilayer ceramic capacitors. Among 100 pieces of the multilayer ceramic capacitors1in the present preferred embodiment having the ratio of glass G of equal to or larger than about 1.2 P in the second region30b, there was no multilayer ceramic capacitors in which the resistance is below about 100 MΩ.

As described above, the multilayer ceramic capacitor1of the present preferred embodiment has favorable moisture resistance because the ratio of the glasses G in the second regions30b, for example, about 1.2 P or more.

Protective Layer33

In the third region30cin the multilayer ceramic capacitor1of the present preferred embodiment, protective layers33including S (sulfur) and Ba (barium) are each provided on a surface of the glass G facing the Ni plated layer31a. The protective layers33cover about 50% or more of the portions containing the glass G on the surface of the third region30c, that is, the surface of the base electrode layer30, and preferably cover about 70% or more thereof. The thicknesses of the protective layers33are, for example, each about 10 nm or more and about 1 μm or less.

Confirmation Method of Protective Layer33

The protective layers33can be confirmed by imaging a region including glass G, the third region30c, and the Ni plated layer31ain the region within the region in the external electrode3in the LT cross-section in the middle portion in the width direction by TEM (Transmission Electron Microscope)-EDX (Energy Dispersive X-ray Spectroscopy).

Thickness of Protective Layer33

The thickness of the protective layer33is obtained by measuring the thicknesses of S and Ba from the glass G toward the interior of the Ni plated layer31abased on the observed S and Ba images. When the surface of the glass G is a curved surface, the thickness in the normal direction is used. If the thickness varies depending on locations, average values of the regions divided into three equal portions in the lamination direction in the LT cross section may be used.

Coverage of Protective Layer33

The coverage of the protective layer33can be obtained by dividing the length of the protective layer33by the length of the surface of the base electrode layer30including the surface of the glass G, measured on the LT cross-section.

Plated Layer31

The plated layer31includes, for example, the Ni plated layer31aand the Sn plated layer31bin order from the base electrode layer30.

Method of Manufacturing Multilayer Ceramic Capacitor1

FIG.7provides a flowchart showing a method of manufacturing the multilayer ceramic capacitor1.

The method of manufacturing the multilayer ceramic capacitor1includes a multilayer body preparing step S1of preparing the multilayer body2, a barrel step S2, a base electrode layer forming step S3, and a plated layer forming step S4.

Multilayer Body Preparing Step S1

The multilayer body preparing step S1includes a material sheet preparing step S11, a material sheet laminating step S12, a mother block forming step S13, a mother block cutting step S14, a side gap portion forming step S15, and the firing step S16.FIG.8is a diagram for explaining the multilayer body preparing step S1and the barrel step S2.

Material Sheet Preparing Step S11

A ceramic slurry including a ceramic powder including, for example, BaTiO3as a main component, a binder, and a solvent is prepared. In the present preferred embodiment, the ceramic slurry does not include Ni, or the Ni content therein is smaller than that in the outer layer portions12.

The ceramic slurry is molded into a sheet shape or substantially a sheet shape using, for example, a die coater, a gravure coater, a micro gravure coater, etc. on a carrier film, such that an inner layer ceramic green sheet101is manufactured.

Furthermore, an upper outer layer portion ceramic green sheet112defining and functioning as the upper outer layer portion12a, and a lower outer layer portion ceramic green sheet113defining and functioning as the lower outer layer portion12bare also manufactured in the same or substantially the same manner.

The upper outer layer portion ceramic green sheet112and the lower outer layer portion ceramic green sheet113are manufactured by a ceramic slurry including, for example, a ceramic powder including BaTiO3as a main component, a binder, and a solvent, similarly to the inner layer ceramic green sheet101. However, unlike the inner layer ceramic green sheet101, the upper outer layer portion ceramic green sheet112and the lower outer layer portion ceramic green sheet113include Ni, or have a higher Ni content than the inner layer ceramic green sheet101.

Subsequently, the conductive paste102including Ni glass (Si oxide), and Sn is printed by, for example, screen-printing, ink jet printing, gravure printing, or the like, so as to have a strip-shaped pattern or substantially a strip-shaped pattern, on the inner layer ceramic green sheet101.

Thus, the material sheet103is prepared by printing the conductive paste102defining and functioning as the internal electrode layer15on the surface of the inner layer ceramic green sheet101defining and functioning as the dielectric layer14.

Material Sheet Laminating Step S12

Next, in the material sheet laminating step S12, a plurality of material sheets103are laminated.

Specifically, the plurality of material sheets103are stacked such that the strip-shaped conductive pastes102are directed in the same or substantially the same direction and shifted by half pitch in the width direction between the adjacent material sheets103.

Furthermore, the upper outer layer portion ceramic green sheet112defining and functioning as the upper outer layer portion12ais stacked on one side of the plurality of laminated material sheets103, and the lower outer layer portion ceramic green sheet113defining and functioning as the lower outer layer portion12bis stacked on the other side thereof.

Mother Block Forming Step S13

Subsequently, in the mother block forming step S13, the upper outer layer portion ceramic green sheet112, the plurality of stacked material sheets103, and the lower outer layer portion ceramic green sheet113are subjected to thermocompression bonding. As a result, the mother block110is formed.

Mother Block Cutting Step S14

Then, in the mother block cutting step S14, the mother block110is cut along a cutting line X and a cutting line Y intersecting the cutting line X corresponding to the dimension of the laminate chip10. As a result, the laminate chip10is manufactured. It should be noted that, in the present preferred embodiment, the cutting line Y is perpendicular or substantially perpendicular to the cutting line X.

Side Gap Portion Forming Step S15

Next, a ceramic slurry in which Mg is added as a sintering aid to the dielectric powder, which is the same or substantially the same as that of the inner layer ceramic green sheet101, is prepared. Then, the ceramic slurry is applied on a resin film, and dried to manufacture a side gap portion ceramic green sheet. It should be noted that a plurality of side gap portion ceramic green sheets may be manufactured.

Then, the side gap portion ceramic green sheet is affixed on the side portion where the internal electrode layers15of the laminate chip10are exposed, such that a layer defining and functioning as the side gap portion20is formed.

Thus, the side gap portion20is affixed to the LT side surface of the laminate chip10, such that the multilayer body2in a state before firing is formed.

Firing Step S16

The layer defining and functioning as the side gap portion20is formed in the laminate chip10, and the resultant body is subjected to degreasing treatment in a nitrogen atmosphere under a predetermined condition, and then fired and sintered at a predetermined temperature in a nitrogen-hydrogen-steam mixed atmosphere to form the multilayer body2.

Since the side gap portion20is affixed to the laminate chip10including the dielectric layers14, there is an interface between the side gap portion20and the laminate chip10even after firing.

Here, a Ni—Mg alloy, which is an alloy of Mg included in the side gap portion20and Ni included in the outer layer portion12, is segregated in the boundary region Z2between the side gap portion20and the outer layer portion12. The boundary region Z2tends to become the penetration path of moisture. Therefore, the pores existing in this portion are filled, and the moisture resistance becomes high.

Here, as shown inFIG.4, since Ni is included in the outer layer portion12, particles of the dielectric ceramic after firing are densified. Furthermore, since the pores provided in the dielectric ceramic in the outer layer portion12are filled with Ni, moisture resistance of the multilayer ceramic capacitor1is increased.

As shown inFIG.5, the Sn-layer16which has migrated from the interior to the surface is formed on the surfaces of the internal electrode layers15.

Barrel Step S2

Next, barrel polishing is performed on the multilayer body2. As a result, the ridge portion R1of the multilayer body2is rounded.

Since the internal electrode layer15shrinks during the firing step S16, a portion of the internal electrode layers15may not be exposed at the end surface C. However, since the barrel step S2is provided, the end surface C of the multilayer body2is also polished, such that the number of the internal electrode layers15which are not exposed at the end surface C is reduced.

Furthermore, the positional deviation d2between the end portion which is in the vicinity of the side surface B and located outermost in the width direction W and the end portion which is located innermost in the width direction W among all of the internal electrode layers15is, for example, about 10 μm or less.

That is, the end portions in the width direction W of the laminated internal electrode layers15are located at the same or substantially the same position in the width direction W. In other words, the positions of the end portions are aligned or substantially aligned in the lamination direction T.

Base Electrode Layer Forming Step S3

The base electrode layer forming step S3includes a first region forming step S31, a second region forming step S32, a third region forming step S33, and a firing step S34.

FIG.9is a diagram showing the base electrode layer forming step S3and a plated layer forming step S4.

First Region Formation Step S31

In the first region forming step S31, both end surfaces C of the multilayer body2are immersed in a glass-containing Cu paste to form the first region30a. To form the first region30a, the Cu paste including Cu particles having a small particle size is used. The particle size of the Cu particles is, for example, about 0.05 μm or more and about 3 μm or less. Furthermore, it is preferable that the thickness is, for example, about 0.05 μm or more and about 1 μm or less.

Here, the positional deviation d of the internal electrode layers15in the vicinity of the end surface C is smaller in the barrel step. However, there is a possibility that the positional deviation d remains somewhat in the internal electrode layers15in the vicinity of the end surface C.

In the present preferred embodiment, since the Cu paste having a small particle size is used, the Cu paste can enter the portion of the positional deviation d remaining in the internal electrode layers15in the vicinity of the end surface C, leading to the favorable contact with the internal electrode layers15.

Second Region Forming Step S32

Next, in the second region forming step S32, both end surfaces C of the multilayer body2are immersed in Cu pastes, each having a higher glass content than that of the first region30aand the third region30c, to form the second region30b.

The second region30bincludes more glass G than the first region30aand the third region30c. In the LT cross-section, when the area ratio of glass to Cu in the entire base electrode layer30(area of glass/area of Cu) is defined as P, the second region30bmay be defined as a region of, for example, about 1.2 P or more. Since the ratio of the glass G in the second region30bis about 1.2 P or more, the sealing property and the moisture resistance are improved.

However, in order to reduce or prevent the deterioration of the conductivity of the second region30b, the ratio of the glasses G in the second region30bis preferably, for example, about 2.5 P or less.

It should be noted that the particle size of the Cu particles included in the Cu paste may be the same or substantially the same as the particle size of the Cu particles included in the Cu paste, or may be larger than the particle size of the Cu particles included in the Cu paste.

Third Region Forming Step S33

Next, in the third region forming step S33, both end surfaces C of the multilayer body2are immersed in a Cu paste having a higher Cu content than the Cu pastes of the second region30band the third region30c, to form the third region30c. The Cu paste118includes glass G. The glass G includes, for example, BaO—B2O3—SiO2glass or BaO—B2O3—SiO2—LiO—NaO glass including Ba. In addition, sulfur (S) is included in the glass G.

Firing Step S34

Then, the resultant body is heated for a predetermined time in a nitrogen atmosphere at a set firing temperature. As a result, the base electrode layer30is burned onto the multilayer body2.

At this time, the Sn-layer16formed on the surfaces of the internal electrode layers15extends from the surfaces of the internal electrode layers15to the boundary region Z1between the external electrode3, and the internal electrode layers15and the dielectric layers14adjacent to the internal electrode layers15in the lamination direction T.

Furthermore, as schematically shown inFIG.5, Cu in the first region30ais coupled, and the mass of Cu is larger than the second region30band the third region30c, such that the thickness in the lamination direction T is larger than the thickness of the internal electrode layers15.

Plated Layer Forming Step S4

The plated layer forming step S4includes a Ni plated layer forming step S41, and a Sn plated layer forming step S42.

Ni Plated Layer Forming Step S41

In the Ni plated layer forming step S41, the third region30cof the base electrode layer30is immersed in a plating solution for forming the plated layer31, to form the Ni plated layer31on the outer periphery of the external electrode3.

At this time, the third region30cincludes more Cu than the first region30aand the second region30b. The amount of Cu can be measured by calculating the area of Cu detected by WDX. The third region30cincludes more Cu than the second region30band the third region30c. Therefore, the connection ratio when mounting the multilayer ceramic capacitor1on a board is preferable.

Here, when the third region30cof the base electrode layer30is immersed in a process liquid in which the plating solution and S (sulfur) are mixed, the mixed process liquid containing the plating solution and S erodes the glass G which is exposed at the surface of the third region30c.

However, according to the present preferred embodiment, since the glass G includes S and Ba, the S and Ba begin to gradually form the protective layer33on the surface of the glass G on which the erosion by the plated layer31is progressing.

When the formation of the protective layer33progresses, the erosion of the glass G by the plating solution is gradually reduced or prevented, and once the protective layer33is formed to have a predetermined thickness, the glass G is hardly eroded.

On the other hand, unlike the present preferred embodiment, if the protective layer33is not formed, the plating solution continues to erode the glass G, and advances to the second region30band the first region30ain the interior of the base electrode layer30.

However, according to the present preferred embodiment, at an initial stage in which the third region30cof the base electrode layer30is immersed in the plating solution in this way, the protective layer33is formed by the process liquid including Ba and S included in the glass G. Furthermore, the protective layer33defining and functioning as a barrier of the glass G to the plating solution, and thus, further erosion of the glass G by the plating solution is reduced or prevented.

Therefore, it is possible to obtain the multilayer ceramic capacitor1in which the erosion of the base electrode layer30by the plating solution is small, and the heat resistance, the water resistance, and the moisture resistance are high.

The third region30cincludes Cu in the most amount. Therefore, the Ni plated layer31aon the outer side is easily adhered thereto. Furthermore, the plated layer31overall is hardly peeled off therefrom.

Sn Plated Layer Forming Step S42

Then, the Sn plated layer31bis formed on the outer side of the Ni plated layer31a.

Through the above steps, the multilayer ceramic capacitor1of the present preferred embodiment is manufactured. Although preferred embodiments of the present invention have been described above, the present invention is not limited to this preferred embodiment, and various modifications may be made within the scope thereof.

In the present preferred embodiment, the base electrode layer30including the three regions is manufactured by three coating steps of the first region forming step S31, the second region forming step S32, and the third region forming step S33. However, the present invention is not limited to this, and the base electrode layer30including a plurality of regions may be manufactured by adjusting the material and the temperature profile, for example.

In the present preferred embodiment, the glass G includes Ba. However, the glass G may not include Ba. In this case, the protective layer33does not include Ba. However, the protective layer33includes S by the process liquid including S.

In the present preferred embodiment, the Cu paste having a small particle size is used in the barrel step when the first region30aof the base electrode layer30. However, the present invention is not limited thereto. In order to improve the connection ratio, for example, either one of performing the barrel step or using a Cu paste having a small size may be used.

In the present preferred embodiment, the multilayer ceramic capacitor1is manufactured by manufacturing the laminate chip10following which the side gap portions20are affixed on both sides of the laminate chip10. However, the present invention is not limited to this, and the side gap portions20may be manufactured together at the time of manufacturing the laminate chip10.

In the present preferred embodiment, two plated layers are provided. However, the present invention is not limited thereto, and the plated layer may include a single layer.

Furthermore, the size of the multilayer ceramic capacitor1, and the thickness and the number of layers of the internal electrode layers15, the dielectric layers14, the outer layer portions12, and the external electrodes3, which are specified in the present preferred embodiment, are not limited to the numerical values described, and may vary therefrom.

Furthermore, the components included in each layer are not limited to those described in the present preferred embodiment.

While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.