Patent ID: 12191771

Corresponding reference characters indicate corresponding components throughout the several views of the drawings. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of various embodiments of the teachings herein. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted in order to facilitate a less obstructed view of these various embodiments of a circuit path configuration for enhancing overvoltage protection in a switching power supply.

DETAILED DESCRIPTION

In the following description, numerous specific details are set forth in order to provide a thorough understanding of a circuit path configuration for enhancing overvoltage protection in a switching power supply. It will be apparent, however, to one having ordinary skill in the art that the specific detail need not be employed to practice the teachings herein. In other instances, well-known materials or methods have not been described in detail in order to avoid obscuring the present disclosure.

Reference throughout this specification to “one embodiment”, “an embodiment”, “one example” or “an example” means that a particular feature, structure or characteristic described in connection with the embodiment or example is included in at least one embodiment of a circuit path configuration for enhancing overvoltage protection in a switching power supply. Thus, appearances of the phrases “in one embodiment”, “in an embodiment”, “one example” or “an example” in various places throughout this specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures or characteristics may be combined in any suitable combinations and/or subcombinations in one or more embodiments or examples. Particular features, structures or characteristics may be included in an integrated circuit, an electronic circuit, a combinational logic circuit, or other suitable components that provide the described functionality. In addition, it is appreciated that the figures provided herewith are for explanation purposes to persons ordinarily skilled in the art and that the drawings are not necessarily drawn to scale.

In the context of the present application, when a transistor is in an “off-state” or “off” the transistor blocks current and/or does not substantially conduct current. Conversely, when a transistor is in an “on-state” or “on” the transistor is able to substantially conduct current. By way of example, in one embodiment, a high-voltage transistor comprises an N-channel metal-oxide-semiconductor (NMOS) field-effect transistor (FET) with the high-voltage being supported between the first terminal, a drain, and the second terminal, a source. In some embodiments an integrated controller circuit may be used to drive a power switch when regulating energy provided to a load.

Also, for purposes of this disclosure, “ground” or “ground potential” refers to a reference voltage or potential against which all other voltages or potentials of an electronic circuit or Integrated circuit (IC) are defined or measured.

In the context of the present application, power may be transferred via an energy transfer element (e.g., a transformer) from an input (e.g., from a primary) side to an output (e.g., to a secondary) side according to a switching cycle. For instance, a primary switch, also referred to as a primary side switch, may switch according to a switching cycle whereby a primary winding receives input power for part of the switching cycle and one or more secondary windings provide power for another part of the switching cycle.

As mentioned above, switching power supplies may include switch-mode converters (switching converters) including energy transfer elements (e.g., transformers and transformer circuits). The switch-mode converter may include a controller and a switch; and the switch-mode converter may be configured as a flyback (flyback converter). Additionally, a transformer may transfer energy from a primary side coupled with a primary side winding to a secondary side coupled with a secondary side winding. Also, as discussed above, a switch-mode converter may receive input power in the form of unregulated power. For instance, the unregulated power may be rectified AC power derived from a bulk capacitor at the output of a bridge rectifier. Additionally, the rectified AC power may comprise a rectified AC line voltage across the bulk capacitor. In this context, the rectified AC line voltage may also be referred to as a bulk capacitor voltage.

A primary side switch may switch energy at the primary side in response to a control signal. For instance, a controller may provide signals to the primary side switch to switch according to a switching cycle. The switching cycle may allow energy (power) to be transferred from the primary side to the secondary side; and the controller may provide signals to the primary switch so as to regulate power delivered to a load on the secondary side.

A controller may also be configured to protect one or more elements (e.g., circuit components) of the switching power supply. For instance, the controller may be configured to avail overvoltage protection (OVP) and/or overcurrent protection (OCP) by monitoring a signal from either the primary side and/or the secondary side. Overvoltage protection (OVP) may be implemented so that the controller turns off the primary side switch when the (monitored) signal exceeds a threshold.

When a signal from the primary side is used to implement OVP, then the approach may be referred to as input OVP. When a signal from the secondary side is used to implement OVP, then the approach may be referred to as output OVP. In many applications input OVP is preferred over output OVP due to reliability concerns. For instance, output OVP may be unreliable for appliance power supplies and lead to device failures and/or breakdown. Additionally, output OVP may be susceptible to accidental or false trigger events leading to poor performance and/or lower conversion efficiency. Therefore, many applications, including appliance power supplies, necessitate input OVP.

Modern switching power supplies implement input OVP by monitoring the bulk capacitor voltage; and as described above, the bulk capacitor voltage can be an unregulated rectified AC line voltage. A purpose of input OVP can be to protect the primary side switch by limiting its maximum drain-to-source voltage in the event of surges. However, using the bulk capacitor voltage may not fully protect against other sources of variability in the drain-to-source voltage. For instance, the drain-to-source voltage may increase not only due to input power surges (i.e., surges in the unregulated rectified AC line voltage) but also do to other overvoltage sources. Other overvoltage sources may include, but are not limited to, reflection voltages from the transformer (e.g., a voltage reflection from the secondary side) and/or peaks in voltage due to transformer parasitics (e.g., a parasitic leakage winding). Accordingly, there is a need to implement input OVP by monitoring a more comprehensive signal from the primary side.

Presented herein is a circuit path configuration for enhancing overvoltage protection in a switching power supply. The circuit path configuration implements input OVP by availing a more comprehensive signal indicative of the drain-to-source voltage on the primary side switch. In the teachings herein, the more comprehensive signal may be referred to as a clamping voltage.

Also, as described herein, a power supply (e.g., a switching power supply) comprises a bridge rectifier, a primary side switch, and a controller. The bridge rectifier is configured to provide a rectified voltage (e.g., an unregulated rectified AC voltage) to a first node (e.g., to a bulk capacitor node). The primary side switch comprises a drain; and the drain is electrically coupled to the first node via a first circuit path. The first circuit path comprises a first circuit path node between the first node and the drain. The controller comprises a voltage monitor input electrically coupled to the first circuit path node via a second circuit path; and the second circuit path is configured to provide a monitor voltage to the voltage monitor input.

FIG.1Aillustrates a switching power supply100aincluding circuit paths P1-P3according to the teachings herein. The switching power supply100afurther includes a bridge rectifier114, a bulk capacitor CB, a transformer TI, an optocoupler112, and a switcher core module104. The transformer TI includes a primary winding141, a secondary winding142, and an auxiliary winding143. The switcher core module104includes a controller102electrically coupled to a primary side switch103.

As discussed above the transformer TI may electrically isolate a primary side, referenced to a primary side ground GND, from a secondary side, referenced to a secondary side ground SGND. One of ordinary skill in the art may also recognize that the secondary side ground SGND can be referred to as a “return” ground. As illustrated inFIG.1A, the primary winding141is coupled to the circuit path P1; while the secondary winding142is coupled to the secondary SGND. The auxiliary winding143may be electrically coupled with and provide power to the optocoupler112.

The switching power supply100a, also referred to as a “power supply”, is configured as a flyback (i.e., a flyback converter). The bridge rectifier114rectifies alternating current (AC) voltage VACand provides unregulated rectified AC power. As illustrated, the rectified AC power comprises a rectified AC voltage VB which is provided to the bulk capacitor CB. Also as illustrated, the bulk capacitor CB is electrically coupled between a node NVB and a primary side ground GND; and the rectified AC voltage VB is referenced to the primary side ground GND.

The primary side switch103is electrically coupled between the primary side ground GND and the first circuit path P1. As illustrated the source S is electrically coupled to the primary side ground GND; and the drain D is electrically coupled to the circuit path P1.

Additionally, the controller102is electrically coupled to the primary side switch103to switch a drain current Ip. When the controller102controls the primary side switch103to turn on and off (i.e., to switch) according to a switching cycle, then the drain current Ip may take on a switching waveform160. According to switch-mode (switching) power supply control theory, the switching may allow energy (i.e., power) to be transferred from the primary winding141to the secondary winding142and/or the auxiliary winding143.

Energy transferred to the secondary winding142may be used to provide output power with output voltage Vout. The optocoupler112may in turn provide feedback to a control input C of the controller102in order to regulate the output voltage Vout. For instance, in response to a current IC(i.e., feedback current IC) at the control input C, the controller102may drive a gate of the primary side switch103according to a switching cycle (e.g., according to a waveform160with period TS).

The controller102may be further configured to provide additional protection to components of the switching power supply100a. For instance, the controller102includes a voltage monitor input V and a current monitor input X. The controller102may receive a monitor voltage at the voltage monitor input V; and in response to the monitor voltage exceeding a limit (e.g., an overvoltage limit), may turn off the primary side switch103. In this way the controller102may limit the drain-to-source voltage VDS from exceeding a drain-to-source voltage limit, thereby availing overvoltage protection to the primary side switch103. Similarly, the controller102may limit a peak value of the drain current IDS based on a current at the current monitor input X.

As illustrated, the circuit path P1is electrically coupled between the drain D of primary side switch103and the node NVB; therefore, the drain D is electrically coupled to the node NVB via the circuit path P1. According to the teachings herein, the circuit path P2may be electrically coupled with the circuit path P1; and circuit path P1may provide a clamp voltage VC. The clamp voltage VC may advantageously be provided to the voltage monitor input V via the circuit path P2. The clamp voltage VC may advantageously have comprehensive information (i.e., voltage components) for comparing with an overvoltage threshold.

In some embodiments the switcher core module104can be a TOPSwitch™ (and/or embodiments of a TOPSwitch™) switcher core module104. A TOPSwitch™ switcher core module integrates the primary side switch103and the controller102. (TOPSwitch™ is a trademark of Power Integrations, Inc., 5245 Hellyer Ave., San Jose, CA 95138).

FIG.1Billustrates a switching power supply100bincluding circuit paths P1-P3according to an embodiment; andFIG.1Cillustrates a switching power supply100cincluding circuit paths P1-P3according to an embodiment. As illustrated by switching power supplies100b-100ccircuit path P1comprises a resistor123electrically coupled between current monitor input X and node NVB. Circuit path P3comprises a diode98and circuit network88electrically coupled in series between node NVB and the drain D of primary side switch103. Circuit path P2comprises a resistor122electrically coupled between the voltage monitor input V and a circuit path node NVC. Also, as illustrated the circuit network88is electrically coupled between the circuit path node NVC and the node NVB; and a cathode of diode98is electrically coupled to the circuit path node NVC. The anode of diode98is electrically coupled to the drain D. As further illustrated by switching power supply100c, the circuit network88may comprise a capacitor90and a resistor89electrically coupled in parallel.

According to the teachings herein, the voltage monitor input V couples to the circuit path node NVC via circuit path P2(e.g., via a resistor122). The circuit path node NVC may advantageously provide a clamp voltage VC. By virtue of circuit path P2, the clamp voltage VC and/or a signal proportional to the clamp voltage VC may be provided at the voltage monitor input V. According to Equation 1 (EQ. 1), the clamp voltage VC may advantageously avail a comprehensive signal which is indicative of the drain-to-source voltage VDS. For instance, Equation 1 shows that the clamp voltage VC may be equal to and/or substantially equal to the drain-to-source voltage VDS and may comprise voltage components.
VC=VDS=VB+VOR+VPKEQ. 1
In Equation 1, the voltage components are the bulk capacitor voltage VB, a reflected voltage VOR from the secondary winding142, and a peak voltage VPK due to transformer leakage inductance.

FIG.2Aillustrates a switching power supply200aincluding circuit paths P1-P4according to an embodiment; andFIG.2Billustrates a switching power supply200bincluding circuit paths P1-P4according to an embodiment. In switching power supplies200a-200b, the circuit path P2comprises resistor201and resistor222connected in series between the circuit path node NVC and the voltage monitor input V. As illustrated resistor201and resistor222are electrically coupled together at a circuit path node NVX; accordingly, circuit path P2also comprises the circuit path node NVX.

Also as illustrated, switching power supplies200a-200bfurther comprise a circuit path P4connected between the control input C and the circuit path node NVX. Circuit path P4includes a resistor202and a diode210electrically coupled in series between the control input C and the circuit path node NVX.

Circuit path P4may advantageously provide an additional degree of freedom for adjusting a voltage received at the voltage monitor input V. For instance, resistors201,202,222may be selected so as to adjust the voltage VX provided at circuit path node NVX. As illustrated the voltage VX may be determined, at least in part, by a relationship between currents I1and I3(of circuit path 2) and current I2(of circuit path 4).

In some applications having an additional degree of freedom to adjust the voltage VX and/or current I3(of circuit path 2) may advantageously improve an undervoltage condition. For instance, when the switcher core module104is a TOPSwitch™ integrated circuit, then the current12of circuit path 4 may advantageously reduce the value of an undervoltage limit.

In switching power supply200bcircuit path P2includes an additional resistor223electrically connected in series with resistor222.

FIG.3Aillustrates waveforms302a-303acorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to a first embodiment.FIG.3Aalso shows trace ground levels304a-305afor clamp voltage VC and for drain-to-source voltage VDS, respectively; and the time scale is set at 10 milliseconds per division (10 ms/div). The first embodiment may correspond with any one of switching power supplies100a-100chaving a line voltage (i.e., AC voltage VAC) of 220 volts.

The switcher core module104may be a TOPSwitch™ integrated circuit. For instance, it may be a TOPSwitch™-JX switcher core module. (TOPSwitch™ and TOPSwitch™-JX are trademarks of Power Integrations, Inc., 5245 Hellyer Ave., San Jose, CA 95138). Additionally, the first embodiment may further correspond with an open-loop configuration whereby the switcher core module104is forced to operate in open loop (i.e., with the feedback open). For instance, an open loop condition may be forced by having the switcher core module104operate with a fixed signal at the control input C.

Also, with reference toFIG.1C, resistor89may be a 2 Watt (2 W) 68 kilo-ohm (Kohm) resistor. Capacitor90may be a 1 kilo-volt (KV) 2.2 nano-Farad (nF) capacitor. Diode98may be a clamping diode; and resistor122may be a 4 Meg-ohm (Mohm) resistor. Measurements (see, e.g., vertical trace306aand horizontal trace301a) may indicate at least the following: auto restart occurs when the line voltage is equal to and/or substantially equal to 264 volts; the clamp voltage VC is limited to a maximum value of 504 volts; and the drain-to-source voltage VDS is limited to a maximum of 512 volts. In this regard an OVP trigger voltage (limit with feedback open) may be identified with a maximum clamp voltage (VCMAX) of 504 volts and a maximum drain voltage (VDSMAX) of 512 volts.

FIG.3Billustrates waveforms302b-303bcorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to the first embodiment.FIG.3Balso shows a trace ground level304bfor clamp voltage VC; the time scale is magnified to 10 microseconds per division (10 us/div). Trace marker310bindicates a clamp voltage VC having a value equal to and/or substantially equal to 450 volts.

FIG.4Aillustrates waveforms402a-403acorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to a second embodiment.FIG.4Aalso shows trace ground levels404a-405afor clamp voltage VC and for drain-to-source voltage VDS, respectively; and the time scale is set at 10 milliseconds per division (10 ms/div). The second embodiment may correspond with any one of switching power supplies100a-100chaving a line voltage (i.e., AC voltage VAC) of 248 volts. Additionally, the switcher core module104may be a TOPSwitch™ integrated circuit such as a TOPSwitch™-JX switcher core module and may also be forced to operate with feedback open (i.e., in an open-loop condition).

Also, with reference toFIG.1C, resistor89may be a 2 Watt (2 W) 68 kilo-ohm (Kohm) resistor. Capacitor90may be a 1 kilo-volt (KV) 2.2 nano-Farad (nF) capacitor. Diode98may be a clamping diode; and resistor122may be a 4 Meg-ohm (Mohm) resistor. Measurements (see, e.g., vertical trace406aand horizontal trace401a) may indicate at least the following: auto restart occurs when the line voltage is equal to and/or substantially equal to 248 volts; the clamp voltage VC is limited to a maximum value of 496 volts; and the drain-to-source voltage VDS is limited to a maximum of 504 volts. In this regard an OVP trigger voltage (limit with feedback open) may be identified with a maximum clamp voltage (VCMAX) of 496 volts and a maximum drain voltage (VDSMAX) of 504 volts.

FIG.4Billustrates waveforms402b-403bcorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to the second embodiment.FIG.4Balso shows a trace ground level404bfor clamp voltage VC; the time scale is magnified to 10 microseconds per division (10 us/div).

FIG.5Aillustrates waveforms502a-503acorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to a third embodiment.FIG.5Aalso shows trace ground levels504a-505afor clamp voltage VC and for drain-to-source voltage VDS, respectively; and the time scale is set at 10 milliseconds per division (10 ms/div). The third embodiment may correspond with any one of switching power supplies100a-100chaving a line voltage (i.e., AC voltage VAC) of 264 volts. Additionally, the switcher core module104may be a TOPSwitch™ integrated circuit such as a TOPSwitch™-JX switcher core module and may also be forced to operate with feedback open (i.e., in an open-loop condition).

Also, with reference toFIG.1C, resistor89may be a 2 Watt (2 W) 68 kilo-ohm (Kohm) resistor. Capacitor90may be a 1 kilo-volt (KV) 2.2 nano-Farad (nF) capacitor. Diode98may be a clamping diode; and resistor122may be a 4 Meg-ohm (Mohm) resistor.

Measurements (see, e.g., vertical trace506aand horizontal trace501a) may indicate at least the following: auto restart occurs when the line voltage is equal to and/or substantially equal to 264 volts: the clamp voltage VC is limited to a maximum value of 486 volts; and the drain-to-source voltage VDS is limited to a maximum of 492 volts. In this regard an OVP trigger voltage (limit with feedback open) may be identified with a maximum clamp voltage (VCMAX) of 486 volts and a maximum drain voltage (VDSMAX) of 492 volts.

FIG.5Billustrates waveforms502b-503bcorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to the third embodiment.FIG.5Balso shows a trace ground level504bfor clamp voltage VC; the time scale is magnified to 10 microseconds per division (10 us/div).

FIG.6Aillustrates waveforms602a-603acorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to a fourth embodiment.FIG.6Aalso shows trace ground levels604a-605afor clamp voltage VC and for drain-to-source voltage VDS, respectively; and the time scale is set at 10 milliseconds per division (10 ms/div). The fourth embodiment may correspond with any one of switching power supplies100a-100chaving a line voltage (i.e., AC voltage VAC) of 260 volts and operating under a zero Watt (OW) load condition. Additionally, the switcher core module104may be a TOPSwitch™ integrated circuit such as a TOPSwitch™-JX switcher core module and may also be forced to operate with feedback open (i.e., in an open-loop condition).

Also, with reference toFIG.1C, resistor89may be a 2 Watt (2 W) 68 kilo-ohm (Kohm) resistor. Capacitor90may be a 1 kilo-volt (KV) 2.2 nano-Farad (nF) capacitor. Diode98may be a clamping diode; and resistor122may be a 4 Meg-ohm (Mohm) resistor. For a line voltage of 260 volts and a 0 Watt load, measurements (see, e.g., vertical trace606aand horizontal trace601a) may indicate at least the following: the clamp voltage VC is limited to a maximum value of 491 volts; and the drain-to-source voltage VDS is limited to a maximum of 497 volts. In this regard an OVP trigger voltage (limit with feedback open) may be identified with a maximum clamp voltage (VCMAX) of 491 volts and a maximum drain voltage (VDSMAX) of 497 volts.

FIG.6Billustrates waveforms602b-603bcorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to the fourth embodiment.FIG.6Balso shows a trace ground level604bfor clamp voltage VC; the time scale is magnified to 10 microseconds per division (10 us/div).

FIG.7Aillustrates waveforms702a-703acorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to a fifth embodiment.FIG.7Aalso shows trace ground levels704a-705afor clamp voltage VC and for drain-to-source voltage VDS, respectively; and the time scale is set at 10 milliseconds per division (10 ms/div). The fifth embodiment may correspond with any one of switching power supplies100a-100chaving a line voltage (i.e., AC voltage VAC) of 248 volts and operating under a zero Watt (OW) load condition. Additionally, the switcher core module104may be a TOPSwitch™ integrated circuit such as a TOPSwitch™ _JX switcher core module and may also be forced to operate with feedback open (i.e., in an open-loop condition).

Also, with reference toFIG.1C, resistor89may be a 2 Watt (2 W) 68 kilo-ohm (Kohm) resistor. Capacitor90may be a 1 kilo-volt (KV) 2.2 nano-Farad (nF) capacitor. Diode98may be a clamping diode; and resistor122may be a 4 Meg-ohm (Mohm) resistor. For a line voltage of 248 volts and a 0 Watt load, measurements (see, e.g., vertical trace706aand horizontal trace701a) may indicate at least the following: the clamp voltage VC is limited to a maximum value of 464 volts; and the drain-to-source voltage VDS is limited to a maximum of 476 volts. In this regard an OVP trigger voltage (limit with feedback open) may be identified with a maximum clamp voltage (VCMAX) of 464 volts and a maximum drain voltage (VDSMAX) of 476 volts. However, in contrast to the waveforms602a-603aofFIG.6A, waveforms702a-703aindicate the “power supply operates normally” without exhibiting OVP because the line voltage (i.e., AC voltage VAC) has been reduced from 260 volts to 248 volts.

FIG.7Billustrates waveforms702b-703bcorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to the fifth embodiment.FIG.7Balso shows a trace ground level704bfor clamp voltage VC; the time scale is magnified to 10 microseconds per division (10 us/div).

FIG.8Aillustrates waveforms802a-803acorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to a sixth embodiment.FIG.8Aalso shows trace ground levels804a-805afor clamp voltage VC and for drain-to-source voltage VDS, respectively; and the time scale is set at 10 milliseconds per division (10 ms/div). The sixth embodiment may correspond with any one of switching power supplies100a-100chaving a line voltage (i.e., AC voltage VAC) of 223 volts and operating under a five Watt (5 W) load condition. Additionally, the switcher core module104may be a TOPSwitch™ integrated circuit such as a TOPSwitch™-JX switcher core module and may also be forced to operate with feedback open (i.e., in an open-loop condition).

Also, with reference toFIG.1C, resistor89may be a 2 Watt (2 W) 68 kilo-ohm (Kohm) resistor. Capacitor90may be a 1 kilo-volt (KV) 2.2 nano-Farad (nF) capacitor. Diode98may be a clamping diode; and resistor122may be a 4 Meg-ohm (Mohm) resistor. For a line voltage of 223 volts and a 5 Watt load, measurements (see, e.g., vertical trace806aand horizontal trace801a) may indicate at least the following: the clamp voltage VC is limited to a maximum value of 472 volts; and the drain-to-source voltage VDS is limited to a maximum of 476 volts. In this regard an OVP trigger voltage (limit with feedback open) may be identified with a maximum clamp voltage (VCMAX) of 472 volts and a maximum drain voltage (VDSMAX) of 476 volts.

FIG.8Billustrates waveforms802b-803bcorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to the sixth embodiment.FIG.8Balso shows a trace ground level804bfor clamp voltage VC; the time scale is magnified to 10 microseconds per division (10 us/div).

FIG.9Aillustrates waveforms902a-903acorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to a seventh embodiment.FIG.9Aalso shows trace ground levels904a-905afor clamp voltage VC and for drain-to-source voltage VDS, respectively; and the time scale is set at 10 milliseconds per division (10 ms/div). The seventh embodiment may correspond with any one of switching power supplies100a-100chaving a line voltage (i.e., AC voltage VAC) of 210 volts and operating under a five Watt (5 W) load condition. Additionally, the switcher core module104may be a TOPSwitch™ integrated circuit such as a TOPSwitch™-JX switcher core module and may also be forced to operate with feedback open (i.e., in an open-loop condition).

Also, with reference toFIG.1C, resistor89may be a 2 Watt (2 W) 68 kilo-ohm (Kohm) resistor. Capacitor90may be a 1 kilo-volt (KV) 2.2 nano-Farad (nF) capacitor. Diode98may be a clamping diode; and resistor122may be a 4 Meg-ohm (Mohm) resistor. For a line voltage of 210 volts and a 5 Watt load, measurements (see, e.g., vertical trace906aand horizontal trace901a) may indicate at least the following: the clamp voltage VC is limited to a maximum value of 440 volts; and the drain-to-source voltage VDS is limited to a maximum of 451 volts. In this regard an OVP trigger voltage (limit with feedback open) may be identified with a maximum clamp voltage (VCMAX) of 440 volts and a maximum drain voltage (VDSMAX) of 451 volts. However, in contrast to the waveforms802a-803aofFIG.8A, waveforms902a-903aindicate the “power supply operates normally” without exhibiting OVP because the line voltage (i.e., AC voltage VAC) has been reduced from 223 volts to 210 volts.

FIG.9Billustrates waveforms902b-903bcorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to the seventh embodiment.FIG.9Balso shows a trace ground level904bfor clamp voltage VC; the time scale is magnified to 10 microseconds per division (10 us/div).

FIG.10Aillustrates waveforms1002a-1003acorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to an eighth embodiment.FIG.10Aalso shows trace ground level1005afor drain-to-source voltage VDS; and the time scale is set at 10 milliseconds per division (10 ms/div). The eight embodiment may correspond with any one of switching power supplies100a-100chaving a line voltage (i.e., AC voltage VAC) of 215 volts and operating under a ten Watt (10 W) load condition. Additionally, the switcher core module104may be a TOPSwitch™ integrated circuit such as a TOPSwitch™-JX switcher core module and may also be forced to operate with feedback open (i.e., in an open-loop condition).

Also, with reference toFIG.1C, resistor89may be a 2 Watt (2 W) 68 kilo-ohm (Kohm) resistor. Capacitor90may be a 1 kilo-volt (KV) 2.2 nano-Farad (nF) capacitor. Diode98may be a clamping diode; and resistor122may be a 4 Meg-ohm (Mohm) resistor. For a line voltage of 215 volts and a 10 Watt load, measurements (see, e.g., vertical trace1006aand horizontal trace1001a) may indicate at least the following: the clamp voltage VC is limited to a maximum value of 471 volts; and the drain-to-source voltage VDS is limited to a maximum of 476 volts. In this regard an OVP trigger voltage (limit with feedback open) may be identified with a maximum clamp voltage (VCMAX) of 471 volts and a maximum drain voltage (VDSMAX) of 476 volts.

FIG.10Billustrates waveforms1002b-1003bcorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to the eighth embodiment.FIG.10Balso shows a trace ground level1004bfor clamp voltage VC; the time scale is magnified to 10 microseconds per division (10 us/div).

FIG.11Aillustrates waveforms1102a-1103acorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to a ninth embodiment.FIG.11Aalso shows trace ground levels1104a-1105afor clamp voltage VC and for drain-to-source voltage VDS, respectively; and the time scale is set at 10 milliseconds per division (10 ms/div). The ninth embodiment may correspond with any one of switching power supplies100a-100chaving a line voltage (i.e., AC voltage VAC) of 204 volts and operating under a 10 Watt (10 W) load condition. Additionally, the switcher core module104may be a TOPSwitch™ integrated circuit such as a TOPSwitch™-JX switcher core module and may also be forced to operate with feedback open (i.e., in an open-loop condition).

Also, with reference toFIG.1C, resistor89may be a 2 Watt (2 W) 68 kilo-ohm (Kohm) resistor. Capacitor90may be a 1 kilo-volt (KV) 2.2 nano-Farad (nF) capacitor. Diode98may be a clamping diode; and resistor122may be a 4 Meg-ohm (Mohm) resistor. For a line voltage of 204 volts and a 10 Watt load, measurements (see, e.g., vertical trace1106aand horizontal trace1101a) may indicate at least the following: the clamp voltage VC is limited to a maximum value of 448 volts; and the drain-to-source voltage VDS is limited to a maximum of 460 volts. In this regard an OVP trigger voltage (limit with feedback open) may be identified with a maximum clamp voltage (VCMAX) of 448 volts and a maximum drain voltage (VDSMAX) of 460 volts. However, in contrast to the waveforms1002a-1003aofFIG.10A, waveforms1102a-1103aindicate the “power supply operates normally” without exhibiting OVP because the line voltage (i.e., AC voltage VAC) has been reduced from 215 volts to 204 volts.

FIG.11Billustrates waveforms1102b-1103bcorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to the seventh embodiment.FIG.11Balso shows a trace ground level1104bfor clamp voltage VC; the time scale is magnified to 10 microseconds per division (10 us/div).

FIG.12Aillustrates waveforms1202a-1203acorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to a tenth embodiment.FIG.12Aalso shows trace ground levels1204a-1205afor clamp voltage VC and for drain-to-source voltage VDS, respectively; and the time scale is set at 200 milliseconds per division (200 ms/div). The tenth embodiment may correspond with any one of switching power supplies100a-100chaving a line voltage (i.e., AC voltage VAC) of 307 volts. Additionally, the switcher core module104may be a TOPSwitch™ integrated circuit such as a TOPSwitch™-JX switcher core module and may also be forced to operate with feedback open (i.e., in an open-loop condition).

Also, with reference toFIG.1C, resistor89may be a 2 Watt (2 W) 68 kilo-ohm (Kohm) resistor. Capacitor90may be a 1 kilo-volt (KV) 2.2 nano-Farad (nF) capacitor. Diode98may be a clamping diode; and the resistance of resistor122may be increased from 4 Meg-ohm (Mohm) to 5.2 Mohm.

For a line voltage of 307 volts, measurements (see, e.g., vertical trace1206aand horizontal trace1201a) may indicate at least the following: the clamp voltage VC is limited to a maximum value of 616 volts; and the drain-to-source voltage VDS is limited to a maximum of 623 volts. In this regard an OVP trigger voltage (limit with feedback open) may be identified with a maximum clamp voltage (VCMAX) of 616 volts and a maximum drain voltage (VDSMAX) of 623 volts.

For reference, a calculated value for the maximum clamp voltage VCMAX can be determined by the resistance of resistor122(i.e. 5.2 Mohm) per the following equation (EQ. 2):
VCMAX=5.2Mohm times112.5=585 Volts  EQ. 2

Therefore, an estimate of VCMAX (i.e., 585 volts) is within 31 volts of the experimentally determined value of 616 volts. Also, if the primary side switch103has a maximum drain voltage rating of 725 volts, then the primary side switch103may functionally be protected with a margin equal to 725 volts minus 623 volts (i.e., with a margin of 102 volts).

FIG.12Billustrates waveforms1202b-1203bcorresponding to clamp voltage VC and to drain-to-source voltage VDS, respectively, according to the tenth embodiment. The time scale is magnified to 20 microseconds per division (20 us/div).

Further enhancements relating to reducing an undervoltage threshold may also be explored with respect to the tenth embodiment ofFIG.12AandFIG.12B. For instance, by using the circuit path P4ofFIG.2AorFIG.2B, the undervoltage threshold may advantageously be lowered while maintaining (or substantially maintaining) a maximum clamp voltage VCMAX of 616 volts.

With reference toFIG.2Band the tenth embodiment ofFIGS.12A-12B, the circuit path P4may be used to adjust an undervoltage limit VUVP according to the below design example(s) seeking an undervoltage limit VUVP equal to 100 volts.

Assuming the resistances of resistors201,202,222,223are given by R201, R202, R222, and R223respectively, and the value of current I3is 25 microamperes (uA), an example set of calculations for resistance R202may be given by the set of design equations (EQs. 3).
[ASSUME:V=2.8V;VD=4.87V;I3=25uA@Vuvp=100V]
VX=?
(VX−V)/R201=I3=25uA
→VX=3.55V
I1=?
I1=(Vuvp−VX)/(R222+R223)
I1=(100−3.55)/5.2 Mohm=18.55uA
I2=?
I1+I2=25uA
I2=25−I1=25−18.55=6.45uA
R202=?
R202=(VD−VX)/I2
→RX=205 Kohm  EQs. 3

In the above set of equations EQs. 3, the voltage VD may correspond to the voltage at the cathode of diode210and the voltage V may correspond to the voltage at the voltage monitor input V. If the value of the sum of R222and R223increases, say to 6 Mega-ohms (6 Mohms), then the value of R202may be recalculated to be equal to 147 kilo-ohms (Kohms).

In one aspect, a power supply (i.e., any of the switching power supplies100a-100c,200a-200b), comprises: a bridge rectifier (e.g., bridge rectifier114), a primary side switch (e.g., primary side switch103), and a controller (e.g., controller102). The bridge rectifier is configured to provide a rectified alternating current (AC) voltage (VB) to a first node (NVB). The primary side switch comprises a drain (D); the drain is electrically coupled to the first node via a first circuit path (i.e., circuit path P1). The first circuit path comprises a first circuit path node (i.e., circuit path node NVC) between the first node and the drain. The controller is configured to control the primary side switch according to a switching cycle (e.g., waveform160ofFIG.1A). The controller comprises a voltage monitor input (i.e., voltage monitor input V) electrically coupled to the first circuit path node via a second circuit path (i.e., circuit path P2). The second circuit path is configured to provide a monitor voltage (V) to the voltage monitor input (V). (See, e.g., para and EQs. 3 where V=2.8 volts).

The controller102may force the primary side switch to stop switching in response to the monitor voltage exceeding an overvoltage limit (e.g., VCMAX, VDSMAX). The controller102may force the primary side switch to continuously conduct (i.e., to remain “on” or in its “on-state”) when the monitor voltage is less than the undervoltage threshold (e.g., less than voltage VUVP). The controller may comprise a current limit input (i.e., current monitor input X). The current limit input (i.e., current monitor input X) may be electrically coupled to the first node via a third circuit path (i.e., circuit path P3). The first node (NVB) may be electrically coupled to a capacitor bulk capacitor (CB).

A switcher core module104may comprise the controller102and the primary side switch103. The switcher core module104may be a TOPSwitch™ switcher core module. The first circuit path node (NVC) may be configured to provide a clamp voltage (VC). The clamp voltage may be substantially equal to the drain-to-source voltage (VDS) of the primary side switch (EQ. 1). The second circuit path may further comprise a second circuit path node (NVX) between the first circuit path node and the voltage monitor input. The controller may further comprise a control input C electrically coupled to the second circuit path node (NVX) via a fourth circuit path (i.e., circuit path P4).

The above description of illustrated examples of the present disclosure, including what is described in the Abstract, are not intended to be exhaustive or to be limitation to the precise forms disclosed. For instance, although the embodiments illustrate a primary side switch which is realized with a field effect transistor (FET) comprising a gate, source, and drain, other embodiments of process technologies are possible. As one of ordinary skill in the art may appreciate, primary side switches may be realized with other types of switches including insulated gate bipolar transistors (IGBTs) and/or bipolar junction transistors (BJTs).

While specific embodiments of, and examples of a circuit path configuration for enhancing overvoltage protection in a switching power supply are described herein for illustrative purposes, various equivalent modifications are possible without departing from the broader spirit and scope of the present disclosure. Indeed, it is appreciated that the specific example voltages, currents, frequencies, power range values, times, etc., are provided for explanation purposes and that other values may also be employed in other embodiments and examples in accordance with the teachings herein.