Patent ID: 12191809

DETAILED DESCRIPTION OF THE INVENTION

To facilitate understanding of the objectives, characteristics, and effects of this present disclosure, embodiments together with the attached drawings for the detailed description of the present disclosure are provided.

Refer toFIG.1, which is a schematic diagram of an oscillator according to an embodiment of the present disclosure. As shown inFIG.1, an oscillator105includes a voltage modulation circuit210, a reference current generation circuit220, and an oscillation circuit230.

The voltage modulation circuit210is configured to generate a modulation voltage VMand provide the modulation voltage VMto the reference current generation circuit220according to a feedback voltage VFBand a first reference voltage Vr1. A first input terminal of the voltage modulation circuit210is coupled to the feedback voltage VFB. A second input terminal of the voltage modulation circuit210is coupled to the first reference voltage Vr1. An output terminal of the voltage modulation circuit210is coupled to the reference current generation circuit220.

The reference current generation circuit220is coupled to the voltage modulation circuit210. The reference current generation circuit220is configured to generate a first reference current Ir according to the modulation voltage VMand a second reference voltage Vr2.

The reference current generation circuit220includes an error amplifier221, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6and a third resistor RT. A first input terminal of the error amplifier221is coupled to the second reference voltage Vr2. A second input terminal of the error amplifier221is coupled to the modulation voltage VM. A third input terminal of the error amplifier221is coupled to one end of the third resistor RT. Another end of the third resistor RTis coupled to ground. An output terminal of the error amplifier221is coupled to a gate of the sixth transistor M6. A source of the fourth transistor M4is coupled to a high voltage source VDD, and a gate of the fourth transistor M4is respectively coupled to a drain of the fourth transistor M4and a gate of the fifth transistor M5. A source of the fifth transistor M5is coupled to the high voltage source VDD, and a drain of the fifth transistor M5is respectively coupled to a comparator232and an oscillation capacitor Cs of the oscillation circuit230. A drain of the sixth transistor M6is coupled to a drain of the fourth transistor M4. The source of the sixth transistor M6is coupled to one end of the third resistor RT.

The oscillation circuit230is coupled to the reference current generation circuit220. The oscillation circuit230is configured to generate an oscillation signal CLK having an oscillation frequency according to the first reference current Ir, wherein the oscillation frequency varies according to the modulation voltage VM.

The oscillation circuit230includes the comparator232, an inverter234, a pulse generator circuit236, a seventh transistor M7, and the oscillation capacitor Cs. A first input terminal of the comparator232is coupled to a third reference voltage Vr3. A second input terminal of the comparator232is respectively coupled to the oscillation capacitor Cs and a drain of the seventh transistor M7. An output terminal of the comparator232is coupled to an input terminal of the inverter234. An output terminal of the inverter234is coupled to an input terminal of the pulse generator circuit236. An output terminal of the pulse generator circuit236is coupled to a gate of the seventh transistor M7and the output terminal of the pulse generator circuit236outputs the oscillation signal CLK. The source of the seventh transistor M7is coupled to ground. In an embodiment, the fourth transistor M4and the fifth transistor M5are implemented by P-type metal oxide semiconductor field-effect transistors (MOSFETs), and the sixth transistor M6and the seventh transistor M7are implemented by N-type MOSFETs.

As described above, when a voltage level between an input voltage and an output voltage is large and a voltage converter has not yet reached a stable state, drastic changes in an inductor current are inhibited by means of frequency modulation. In a buck converter, when an output voltage has not yet reached a set voltage, frequency modulation is more necessary when an output voltage is too small (meaning that the feedback voltage VFBis relatively small). The voltage modulation circuit210modulates the feedback voltage VFBand the first reference voltage Vr1so as to adjust the output modulation voltage VMto an error amplifier221. When the modulation voltage VMis less than second reference voltage Vr2, linear frequency modulation control begins.

The error amplifier221outputs an error amplification signal to the gate of the sixth transistor M6according to the modulation voltage VMand the second reference voltage Vr2, and controls and modulates the sixth transistor M6such that the end voltage VRTfollows the modulation voltage VMor the second reference voltage Vr2. The second reference current Is passes through the third resistor RTwhen the fourth transistor M4and the sixth transistor M6are turned on, so as to generate the end voltage VRT. When the modulation voltage VMis greater than the second reference voltage Vr2, the end voltage VRTfollows a voltage value of the second reference voltage Vr2, such that the oscillation signal CLK output by the pulse generator circuit236reaches a set final frequency. When the modulation voltage VMis less than the second reference voltage Vr2, the end voltage VRTfollows a voltage value of the modulation voltage VM, such that the oscillation frequency of the oscillation signal CLK output by the pulse generator circuit236is lower than the set final frequency.

The fourth transistor M4and the fifth transistor M5form a current mirror, and the second reference current Is is mapped to the first reference current Ir. The first reference current Ir passes through the oscillation capacitor Cs so as to perform charging and generate a voltage Vsen. The comparator232outputs a comparison signal to the inverter234according to the third reference voltage Vr3and the voltage Vsen. The inverter234outputs an inverted signal to the pulse generator circuit236according to the comparison signal. The pulse generator circuit236outputs the oscillation signal CLK according to the inverted signal.

A current value of the first reference current Ir is affected by the second reference current Is. A current value of the second reference current Is is affected by the error amplifier221, the sixth transistor M6, and the third resistor RT. As the first reference current Ir increases, the oscillation signal Cs charges at a faster speed, and the oscillation frequency of the oscillation signal CLK output by the pulse generator circuit236becomes faster. Conversely, as the first reference current Ir decreases, the oscillation signal Cs charges at a slower speed, and the oscillation frequency of the oscillation signal CLK output by the pulse generator circuit236becomes slower. Moreover, an initial value of the oscillation frequency is determined according to the first reference voltage Vr1.

Refer toFIG.2showing a schematic diagram of a voltage modulation circuit according to an embodiment of the present disclosure. As shown inFIG.2, the voltage modulation circuit210includes an error amplifier212, a first transistor M1, a second transistor M2, a third transistor M3, a current source IB, a first resistor RA1, a second resistor RA2, and an activation switch circuit214.

A first input terminal of the error amplifier212is coupled to the feedback voltage VFB. A second input terminal of the error amplifier212is coupled to the source of the third transistor M3. An output terminal of the error amplifier212is coupled to the gate of the third transistor M3.

A source of the first transistor M1is coupled to a high voltage source VDD, and a gate of the first transistor M1is respectively coupled to a drain of the first transistor M1and a gate of the second transistor M2. A source of the second transistor M2is coupled to the high voltage source VDD. One end of the current source IBis coupled to the high voltage source VDD. Another end of the current source IBis coupled to a drain of the second transistor M2. A drain of the third transistor M3is respectively coupled to the gates of the first transistor M1and the second transistor M2. In an embodiment, the first transistor M1and the second transistor M2are implemented by P-type MOSFETs, and the third transistor M3is implemented by an N-type MOSFET.

One end of the first resistor RA1is coupled to a source of the third transistor M3. Another end of the first resistor RA1is coupled to one end of the activation switch circuit214, and another end of the activation switch circuit214is coupled to ground. One end of the second resistor RA2is coupled to the drain of the second transistor M2and one end of the current source IB. Another end of the second resistor RA2is coupled to one end of the activation switch circuit214, and another end of the activation switch circuit214is coupled to ground. In other words, the activation switch circuit214is positioned between the ground and the first resistor RA1and the second resistor RA2, and is controlled by an enable signal VENto connect or disconnect a path between the first resistor RA1and ground, and the second resistor RA2and ground. The activation switch circuit214consists of a first switch SW1and a second switch SW2.

When the enable signal VENcontrols and turns on the activation switch circuit214, the voltage modulation circuit210starts to perform linear frequency modulation control. A voltage value of a node voltage VA1is modulated to approximate the feedback voltage VFB. The first reference voltage Vr1is the current source IBmultiplied by the second resistor RA2. In other words, the first reference voltage Vr1is generated when the current source IBpasses through the second resistor RA2. The modulation voltage VMis VM=Vr1+k*n*VFB, and since the feedback voltage VFBapproximates the node voltage VA1, the modulation voltage VMis VM=Vr1+k*n*VA1. In other words, the modulation voltage VMis equal to a sum of the first reference voltage Vr1and the set voltage, wherein the set voltage is k*n*node voltage VA1, or the set voltage is k*n*feedback voltage VFB. Wherein, a ratio of the first transistor M1to the second transistor M2is 1:k, and a ratio of the first resistor RA1to the second resistor RA2is 1:n, where k and n are positive numbers and are not equal to each other. For example, the ratio of the first transistor M1to the second transistor M2is 1:2.5, and the ratio of the first resistor RA1to the second resistor RA2is 1:1. Moreover, when the enable signal VENcontrols and turns off the activation switch circuit214, the modulation voltage VMis equal to the high voltage source VDD.

Refer toFIG.3, which is a graph illustrating a comparison of an output voltage and an inductor current between the present disclosure and the prior art. As shown inFIG.3, the horizontal axis represents time, the upper vertical axis represents voltage, and the lower vertical axis represents current. A curve400represents an output voltage when a frequency hopping modulation scheme of the prior art is adopted. A curve402represents an output voltage when the linear modulation scheme according to an embodiment of the present disclosure is adopted. It can be seen that, between the time 3 ms and 3.2 ms, the output voltage provided by the linear modulation scheme according to an embodiment of the present disclosure is free from any sudden or huge voltage bounces.

A curve404represents an inductor current when a frequency hopping modulation scheme of the prior art is adopted. A curve406represents an inductor current when the linear modulation scheme according to an embodiment of the present disclosure is adopted. It can be seen that, between the time 3 ms and 3.2 ms, the inductor current provided by the linear modulation scheme according to an embodiment of the present disclosure is inhibited within a certain range, so as to prevent circuit damage or the problem of malfunction of back-end circuits.

In conclusion, the voltage mode controlled linear frequency modulation oscillator of the present disclosure enables a buck converter to output a voltage smoother than that of a frequency hopping scheme during an initial start. In a situation with a low output voltage, the oscillator of the voltage mode controlled linear frequency modulation oscillator of the present disclosure is capable of effectively inhibiting the occurrence of a large inductor current. Moreover, the voltage mode controlled linear frequency modulation oscillator of the present disclosure is free from the problem of possible malfunction of the oscillator caused by an overly small current.

The present invention is described by way of the preferred embodiments above. A person skilled in the art should understand that, these embodiments are merely for describing the present invention are not to be construed as limitations to the scope of the present invention. It should be noted that all equivalent changes, replacements and substitutions made to the embodiments are to be encompassed within the scope of the present invention. Therefore, the scope of protection of the present invention should be accorded with the broadest interpretation of the appended claims.