Patent ID: 12250003

DETAILED DESCRIPTION

The disclosed system and method in one embodiment provide a circuit configured to provide accurate electrical signal measurements while also being low in cost and easily manufacturable due to the components used to construct it. The disclosed system and method in one embodiment may utilize components that are not only inexpensive but are also components which may be sourced from multiple vendors making the design less sensitive to supply chain issues.

Pertaining to cost, an off-the-shelf chip that performs a similar function may include an AD7741 from analog devices and in current markets may cost ten times that of the present system. In terms of measurement accuracy, the present system provides an accuracy of +/−2%, while a similar system such as a 555 timer may perform closer to +/−20% accuracy due to the 555 timer not having any error correction.

In one embodiment, a system and method disclosed herein comprises a conversion circuit configured to convert an input signal such as a voltage signal to a pulse width modulation (PWM) signal that can be transferred across an isolation barrier where it can be either directly interfaced to a digital processor and sampled or converted back to an analog signal to be used for other purposes.

In one embodiment, a system and method disclosed herein also provides accurate high voltage measurements while also including built-in error correction. In one embodiment, the system and method, due to the built-in error correction, does not require high accuracy resistors, making the system and method maybe suitable for integration into a custom integrated circuit (IC). Furthermore, due to the present system's low transistor count, it can also be implemented on a small die area relative to other circuits that perform similar functions with different parts.

FIG.1discloses a high-level block diagram of a conversion circuit100, according to one embodiment disclosed herein. In one embodiment, the circuit100may be used in high-voltage application. The conversion circuit100is configured to receive an analog input signal102. In some embodiments, the analog input signal102may comprise an electrical voltage signal. In other embodiments, the analog input signal102may comprise an electrical current signal. In one embodiment, the analog input signal102represents a signal to be measured. The circuit100further comprises an error detection and correction module104, and analog to PWM module106, and a feedback loop having a feedback signal112.

The analog input signal102may be split into two inputs connected to the error detection and correction module104and the analog to PWM module106. The error detection and correction module104may include a PWM to analog module108and an error comparator module110.

The error detection and correction module104is configured to receive the analog input signal102, a reference signal114, and a feedback signal112and generate a correction signal118. The analog to PWM module106is configured to receive the analog input signal102and the correction signal118and generate a PWM output signal116. The generated PWM output signal116is fed back to the error detection and correction module104as said feedback signal112. In one embodiment, the analog to PWM module106combines the correction signal118with the analog input signal102, to generated corrected output signal116.

The feedback signal112is utilized in creating a signal cleaning and processing iteration utilizing the error detection and correction module104. The error detection and correction module104, receives the analog input signal102and compares it to a referenced cleaner version of the feedback signal. Utilizing the feedback signal112, the error detection and correction module104detects an error in the output signal116by using the error comparator module110. By cleaning the feedback signal112first, the error detection portion provides a best representation of the output signal116while comparing it to a raw version of itself as input signal102.

FIG.2depicts a block diagram of a conversion circuit200as an example implementation of the circuit100ofFIG.1, according to one embodiment. The circuit200receives an analog input signal102and generates a precision PWM output signal116. The circuit200comprises a PWM to analog module108, an error comparator module110, and an analog to PWM module106.

The PWM to analog module108is configured to receive a logic level PWM output signal116as a feedback signal112from the analog to PWM module106and convert the feedback signal112to an analog signal. The PWM to analog module108may include a digital-to-analog converter (DAC) such as a 1-bit DAC202, which receives the feedback signal112and the reference signal114and converts the digital output signal116to an analog signal203. The DAC202may be configured to convert the feedback signal112(i.e., PWM signal116) to a controlled analog voltage range.

The reference signal114may comprise a constant reference voltage or current signal. In some embodiments, the precision signal reference114may be an externally supplied constant persistent DC reference voltage which may be slightly above an AC peak voltage of the analog input signal102. In one embodiment, the output comparator214may include a built-in output buffer then that could function as the DAC202. In this embodiment the DAC202would have been moved into comparator214and the reference signal114would supply comparator214directly.

When low-pass filtering a PWM signal, the resulting signal is a product of a duty cycle and the voltage of that PWM signal where the output is converted to a signal proportionate to the duty cycle of the square wave.

The PWM to analog module108further comprises a low-pass (LP) filter204, where the analog output signal203from the DAC202is averaged by the low-pass filter204to generate an output signal205. The output signal205from the low-pass filter204is proportionate to the duty cycle of the output signal116.

The 1-bit DAC202may further be configured to remove artifacts found within a square wave returned as the feedback signal112from an output comparator214, so that an accurate duty cycle can be measured. After artifacts have been removed, the 1-bit DAC202may be configured to reference the feedback signal112to a precision reference signal114.

The error comparator module110comprise an error comparator206configured to receive and compare the output signal (or duty cycle)205from the low-pass filter204, with the analog input signal102. The error comparator206generates an error correction signal208, such as a square error PWM signal, with a duty cycle that is proportional to the error of the feedback signal112. In one example, said error is defined as the difference between a desired duty cycle and the actual duty cycle in the output signal116, where a desired duty cycle is proportional to the input voltage. In some embodiments, the error PWM correction signal208comprises a binary signal. The correction signal208is similar to the correction signal118inFIG.1.

Preferably, the analog output signal205of the PWM to analog module108may have an essentially identical amplitude as the amplitude of the analog input signal102. The output signal205represents a duty cycle of the output signal116but does not in itself have a duty cycle. The voltage is proportional to the output duty cycle. The input signal102is analog and does not have a duty cycle.

Due to system induced errors, such as by circuit non-linearities including triangle wave inaccuracies, errors are introduced which require detection and error correction. An embodiment of the circuit200disclosed herein is configured to measure the triangle wave induced error and adjust the output signal116through an iterative process via feedback signal112comparing it to the measured error. In one embodiment, measuring the triangle wave induced error comprises utilizing the comparator206to determine the difference between the amplitude of the analog input signal102and the duty cycle of the output signal205of the PWM to analog module108, and using the feedback loop comprising the feedback signal112for adjusting said output signal116through an iterative process comparing it to the measured duty cycle205. Though the triangle wave non-linearity introduces a large portion of the error, other sources of errors also exist which are collectively identified as errors introduced by circuit non-linearities.

The analog to PWM module106comprises an integration unit such a low-pass filter210, and an output comparator214. The low-pass filter210receives and integrates the error correction output signal208from the error comparator module110and generates a triangle wave signal212. The low-pass filter210converts a square wave input to a triangle wave signal. The output comparator214receives the triangle wave212signal and compares it to the analog input signal102, to generate the feedback precision PWM output116with a duty cycle proportional to the analog input signal102. The comparator214is involved in combining the error correction signal208with the analog input signal102, to generate the corrected output signal116.

In one embodiment, the error comparator206of the error comparator module110is configured to output a logic signal as the error correction signal208according to the measured duty cycle represented by the output signal205of the PWM to analog module108, corresponding to whether the measured duty cycle is higher or lower than the analog input signal102. For example, if the duty cycle of the output signal205of the PWM to analog module108is too high or higher than the analog input signal102, the error comparator206may output a logic Low as the error correction signal208. Alternatively, if the duty cycle represented by the output205of the PWM to analog module108is too low or lower than the duty cycle of the analog input signal102, the error comparator206may output a logic High as the error correction signal208.

In one example implementation, the circuit200operates on a signal duty cycle of about 75%, an analog input signal102of about 3.5V, a reference voltage signal114of about 5V, and an output signal voltage of about 3.75V. In this example, the duty cycle of the feedback signal112is about 75%. Using the feedback signal112, the circuit200may determine the error and set the error correction signal208to low and maintain it there until the error has been essentially eliminated, thereby generating a more accurate precision PWM output116for utilizing the circuit200in signal measurements.

FIG.3depicts an iterative method300based on a feedback signal, implemented in circuit for converting an analog input signal such as a voltage signal to a PWM output signal, useful in measuring input signals such as voltage signals, according to one embodiment. The method300includes providing an analog input signal (102,FIG.2) and comparing it to a triangle wave signal (212,FIG.2), to generate a precision PWM output signal (116,FIG.2) that is also fed back as a signal (112,FIG.2) as outputs (step302). The method300further includes returning the feedback signal (112,FIG.2) back into the circuit, whereby signal artifacts are removed from the feedback signal (112,FIG.2) using a 1-bit DAC (202,FIG.2) that may be powered by a reference signal (114,FIG.2) (step304). The method300further includes extracting an average of the 1-bit DAC output signal (203,FIG.2) using a low-pass filter (204,FIG.2) (step306). The method300further includes generating an error signal (208,FIG.2) by comparing the output of the low-pass filter (204,FIG.2) to the analog input signal (102,FIG.2) (step308). The method further includes integrating the error signal (208,FIG.2) with a low-pass filter (210,FIG.2) to generate a triangle wave signal (212,FIG.2) (step310). The method further includes comparing the analog input signal (102,FIG.2) with the triangle wave signal (212,FIG.2) output from the low-pass filter (210,FIG.2), using a comparator (214,FIG.2) to convert the analog input signal (102,FIG.2) to a precision PWM output signal (116,FIG.2) and a feedback signal (112,FIG.2) (step312).

FIG.4shows a schematic of a circuit400as an example implementation of the circuit100inFIG.1, according to one embodiment. The circuit400receives an analog input412signal such as input voltage or input current and generates a PWM square wave output signal414which is fed back as a feedback signal402. The feedback signal402is converted by a DAC406to an analog signal based on a reference signal404, whereby the feedback signal402is cleaned of signal artifacts. In some embodiments, the reference signal404may be a DC voltage which is approximately the same amplitude as the maximum analog input signal412. In other embodiments, the reference signal404may be slightly higher than the analog input signal412. The reference signal may be the same or higher than the maximum input signal412amplitude. For example, if the input signal412ranges from about 0V to 2.5V then the reference signal404may be about 2.5V or slightly higher.

The circuit400may further include a first low-pass filter that averages the output of the DAC406, which is the filtered feedback signal402. The low-pass filter generates a signal proportional to the duty cycle of the analog input signal412. The first low-pass filter comprises an RC circuit formed by a grounded capacitor418and a series resistor416, connected as first RC circuit configuration between the output of the DAC406an input of a comparator408.

The comparator408is configured to receive the output signal of the first low-pass filter and compare it with the analog input signal412to generate an error output signal410. The circuit400may further include a second low-pass filter comprising a second RC circuit formed by the series resistor411and grounded capacitor421. The second low-pass filter integrates the output error signal410to generate a triangle wave output signal420. The capacitor421is connected to ground (or a voltage source) in parallel with the triangle wave output420.

The circuit400further includes a comparator422which compares the analog input signal412with the triangle wave output signal420, to generate a square wave PWM output signal414and the feedback signal402. In some embodiments, the comparator422may be connected in parallel to a ground425. In other embodiments a power source426, and resistor423may be connected in parallel. In other embodiments, comparator422may use resistor423to drive an output signal of comparator422high. In other embodiments, a resistor424may be connected in parallel with error signal output410, where the resistor424connects a power source to the circuit400. In other embodiments, the comparator408may use resistor424to drive an output signal of the comparator408high. In one embodiment, the comparator422comprises an inverting comparator for which a reference voltage signal420is applied to the non-inverting terminal of the comparator422and the input voltage signal412is applied to inverting terminal of the comparator422. The comparator422generates a PWM signal based on the input signals420and412. In another embodiment, the comparator422may comprise an inverting comparator creating the square wave PWM out and feedback signals414and402.

In one example implementation of the circuit400, the resistor416may have a resistance of about 5 kiloohms and the capacitor418may have a capacitance of about 0.47 uF. In one example implementation, the resistor411may have a resistance of about 5 kiloohms, and the capacitor421may have a capacitance of 0.1 uF. In one example implementation, the resistor423may have a resistance of about 5 kiloohms, and the resistor424may have a resistance of about 5 kiloohms. Other circuit component values are possible within the spirit of the disclosed system and method herein, as those skilled in the art will recognize.

Referring toFIG.5in conjunction withFIG.4, an example diagram500graphing input voltage signal (412,FIG.4) as V(input) ramping up, and an output PWM signal (414,FIG.4) as V(input), according to one embodiment disclosed herein. Measurement diagram500includes a graph where a horizontal X axis504is measured in units of milliseconds (ms) and a vertical Y axis506is measured in units of Volts (V, superimposed on PWM output signal of the comparator422inFIG.4shown as PWM output signal V(pmw)508in diagram500, where the output PWM signal508has a duty cycle roughly proportional to the ratio of the input signal V(input)412over the reference voltage. Diagram500further illustrates that the PWM output signal V(pwm)508also changes to match the input triangle waveform502. The waveform502represents the input voltage (412,FIG.4), being varied linearly to illustrate how the output PWM changes in proportion in this example.

FIG.6depicts another example diagram600depicting an input voltage signal V(input)608and measured duty cycle604, according to one embodiment. The measured duty cycle includes a horizontal X axis610is measured in units of milliseconds (ms) and a vertical Y axis602is measured in units of Volts (V). Diagram600depicts a zoomed-in view of a duty cycle signal604output from resistor (416,FIG.4), compared to an input voltage signal608V(input) The output comparator (422,FIG.4) compares the input signal608and the triangle wave signal604to generate a square wave PWM output signal (414,FIG.4) that is also fed back as a feedback signal (402,FIG.4), wherein the PWM output signal (414,FIG.4) is essentially proportional to the analog input signal608.

Diagram600depicts an example input voltage and measured duty cycle measured prior to an output comparator (422,FIG.4), where the duty cycle of the PWM output414is extracted. Diagram600further shows that when the duty cycle604deviates too far from the input voltage608the error comparator (206,FIG.2) will change state to correct the error.

FIG.7Adepicts an example measurement diagram701of all system signals in circuit (400,FIG.4) charts700a-f, according to one embodiment. Each chart700a-fincludes a vertical Y axis702, where the Y axis702is measured in units of Volts (V), and a horizontal X axis704, where the X axis704is measured in units of milliseconds (ms). Chart700adepicts V(input)706which represents input signal (412,FIG.4). Chart700bdepicts V(pwm)708which represents a measured output signal PWM OUT (414,FIG.4) and feedback signal (402,FIG.4). Chart700cdepicts V(1bdac)710which represents a measured output signal of 1-bit DAC (406,FIG.4) measured before resistor (416,FIG.4). Chart700ddepicts V(duty)712which represents a signal measured after resistor (416,FIG.4). Chart700edepicts V(triangle)712which represents a signal measured at (420,FIG.4). Chart700fdepicts V(error)716which represents a signal measured after comparator (408,FIG.4) and resistor (424,FIG.4).

FIG.7Bdepicts an example measurement diagram700of all system signals700in the circuit (400,FIG.4), according to one embodiment. Included in system700is: a vertical Y axis, where the Y axis is measured in units of Volts (V), a horizontal X axis, where the X axis is measured in units of milliseconds (ms); V(error)704representing a signal measured after comparator (408,FIG.4) and resistor (424,FIG.4); V(pwm)706representing a measured output signal PWM OUT (414,FIG.4) and feedback signal (402,FIG.4); V(duty)708representing a signal measured after resistor (416,FIG.4); V(triangle)710representing a signal measured at (420,FIG.4); and V(input)712representing input signal (412,FIG.4).

Embodiments of the disclosed system and method provide a circuit configured for performing accurate electrical signal measurements utilizing error correction as described herein. In one embodiment such a circuit may utilize low-cost components, which may also reduce of costs and complexity. Embodiments of the disclosed system and method may utilize components that are not only inexpensive but are also common components which can be sourced from multiple vendors making the design less sensitive to supply chain issues. Further, in one embodiment, in terms of measurement accuracy, a measurement circuit disclosed herein may provide an accuracy of about e.g., +/−2%, which is several times better in accuracy than existing solutions without error correction.

FIG.8is a high-level block diagram800showing a computing system comprising a computer system useful for implementing an embodiment of the system and process, disclosed herein. Embodiments of the system may be implemented in different computing environments. The computer system includes one or more processors802, and can further include an electronic display device804(e.g., for displaying graphics, text, and other data), a main memory806(e.g., random access memory (RAM)), storage device808, a removable storage device810(e.g., removable storage drive, a removable memory module, a magnetic tape drive, an optical disk drive, a computer readable medium having stored therein computer software and/or data), user interface device811(e.g., keyboard, touch screen, keypad, pointing device), and a communication interface812(e.g., modem, a network interface (such as an Ethernet card), a communications port, or a PCMCIA slot and card). The communication interface812allows software and data to be transferred between the computer system and external devices. The system further includes a communications infrastructure814(e.g., a communications bus, cross-over bar, or network) to which the aforementioned devices/modules are connected as shown. Information transferred via communications interface814may be in the form of signals such as electronic, electromagnetic, optical, or other signals capable of being received by communications interface814, via a communication link816that carries signals and may be implemented using wire or cable, fiber optics, a phone line, a cellular/mobile phone link, an radio frequency (RF) link, and/or other communication channels. Computer program instructions representing the block diagram and/or flowcharts herein may be loaded onto a computer, programmable data processing apparatus, or processing devices to cause a series of operations performed thereon to produce a computer implemented process.

Embodiments have been described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments. Each block of such illustrations/diagrams, or combinations thereof, can be implemented by computer program instructions. The computer program instructions when provided to a processor produce a machine, such that the instructions, which execute via the processor, create means for implementing the functions/operations specified in the flowchart and/or block diagram. Each block in the flowchart/block diagrams may represent a hardware and/or software module or logic, implementing embodiments. In alternative implementations, the functions noted in the blocks may occur out of the order noted in the figures, concurrently, etc. Computer programs (i.e., computer control logic) are stored in main memory and/or secondary memory. Computer programs may also be received via a communications interface812. Such computer programs, when executed, enable the computer system to perform the features of the embodiments as discussed herein. In particular, the computer programs, when executed, enable the processor and/or multi-core processor to perform the features of the computer system. Such computer programs represent controllers of the computer system.

FIG.9shows a block diagram of an example system900in which an embodiment may be implemented. The system900includes one or more client devices901such as consumer electronics devices, connected to one or more server computing systems930. A server930includes a bus902or other communication mechanism for communicating information, and a processor (CPU)904coupled with the bus902for processing information. The server930also includes a main memory906, such as a random access memory (RAM) or other dynamic storage device, coupled to the bus902for storing information and instructions to be executed by the processor904. The main memory906also may be used for storing temporary variables or other intermediate information during execution or instructions to be executed by the processor904. The server computer system930further includes a read only memory (ROM)908or other static storage device coupled to the bus902for storing static information and instructions for the processor904. A storage device910, such as a magnetic disk or optical disk, is provided and coupled to the bus902for storing information and instructions. The bus902may contain, for example, thirty-two address lines for addressing video memory or main memory906. The bus902can also include, for example, a 32-bit data bus for transferring data between and among the components, such as the CPU904, the main memory906, video memory and the storage910. Alternatively, multiplex data/address lines may be used instead of separate data and address lines.

The server930may be coupled via the bus902to a display912for displaying information to a computer user. An input device914, including alphanumeric and other keys, is coupled to the bus902for communicating information and command selections to the processor904. Another type or user input device comprises cursor control916, such as a mouse, a trackball, or cursor direction keys for communicating direction information and command selections to the processor904and for controlling cursor movement on the display912.

According to one embodiment, the functions are performed by the processor904executing one or more sequences of one or more instructions contained in the main memory906. Such instructions may be read into the main memory906from another computer-readable medium, such as the storage device910. Execution of the sequences of instructions contained in the main memory906causes the processor904to perform the process steps described herein. One or more processors in a multi-processing arrangement may also be employed to execute the sequences of instructions contained in the main memory906. In alternative embodiments, hard-wired circuitry may be used in place of or in combination with software instructions to implement the embodiments. Thus, embodiments are not limited to any specific combination of hardware circuitry and software.

The terms “computer program medium,” “computer usable medium,” “computer readable medium”, and “computer program product,” are used to generally refer to media such as main memory, secondary memory, removable storage drive, a hard disk installed in hard disk drive, and signals. These computer program products are means for providing software to the computer system. The computer readable medium allows the computer system to read data, instructions, messages or message packets, and other computer readable information from the computer readable medium. The computer readable medium, for example, may include non-volatile memory, such as a floppy disk, ROM, flash memory, disk drive memory, a CD-ROM, and other permanent storage. It is useful, for example, for transporting information, such as data and computer instructions, between computer systems. Furthermore, the computer readable medium may comprise computer readable information in a transitory state medium such as a network link and/or a network interface, including a wired network or a wireless network that allow a computer to read such computer readable information. Computer programs (also called computer control logic) are stored in main memory and/or secondary memory. Computer programs may also be received via a communications interface. Such computer programs, when executed, enable the computer system to perform the features of the embodiments as discussed herein. In particular, the computer programs, when executed, enable the processor multi-core processor to perform the features of the computer system. Accordingly, such computer programs represent controllers of the computer system.

Generally, the term “computer-readable medium” as used herein refers to any medium that participated in providing instructions to the processor904for execution. Such a medium may take many forms, including but not limited to, non-volatile media, volatile media, and transmission media. Non-volatile media includes, for example, optical or magnetic disks, such as the storage device910. Volatile media includes dynamic memory, such as the main memory906. Transmission media includes coaxial cables, copper wire and fiber optics, including the wires that comprise the bus902. Transmission media can also take the form of acoustic or light waves, such as those generated during radio wave and infrared data communications. Common forms of computer-readable media include, for example, a floppy disk, a flexible disk, hard disk, magnetic tape, or any other magnetic medium, a CD-ROM, any other optical medium, punch cards, paper tape, any other physical medium with patterns of holes, a RAM, a PROM, an EPROM, a FLASH-EPROM, any other memory chip or cartridge, a carrier wave as described hereinafter, or any other medium from which a computer can read.

Various forms of computer readable media may be involved in carrying one or more sequences of one or more instructions to the processor904for execution. For example, the instructions may initially be carried on a magnetic disk of a remote computer. The remote computer can load the instructions into its dynamic memory and send the instructions over a telephone line using a modem. A modem local to the server930can receive the data on the telephone line and use an infrared transmitter to convert the data to an infrared signal. An infrared detector coupled to the bus902can receive the data carried in the infrared signal and place the data on the bus902. The bus902carries the data to the main memory906, from which the processor904retrieves and executes the instructions. The instructions received from the main memory906may optionally be stored on the storage device910either before or after execution by the processor904.

The server930also includes a communication interface918coupled to the bus902. The communication interface918provides a two-way data communication coupling to a network link920that is connected to the world wide packet data communication network now commonly referred to as the Internet928. The Internet928uses electrical, electromagnetic or optical signals that carry digital data streams. The signals through the various networks and the signals on the network link920and through the communication interface918, which carry the digital data to and from the server930, are exemplary forms or carrier waves transporting the information.

In another embodiment of the server930, interface918is connected to a network922via a communication link920. For example, the communication interface918may be an integrated services digital network (ISDN) card or a modem to provide a data communication connection to a corresponding type of telephone line, which can comprise part of the network link920. As another example, the communication interface918may be a local area network (LAN) card to provide a data communication connection to a compatible LAN. Wireless links may also be implemented. In any such implementation, the communication interface918sends and receives electrical electromagnetic or optical signals that carry digital data streams representing various types of information.

The network link920typically provides data communication through one or more networks to other data devices. For example, the network link920may provide a connection through the local network922to a host computer924or to data equipment operated by an Internet Service Provider (ISP). The ISP in turn provides data communication services through the Internet928. The local network922and the Internet928both use electrical, electromagnetic or optical signals that carry digital data streams. The signals through the various networks and the signals on the network link920and through the communication interface918, which carry the digital data to and from the server930, are exemplary forms or carrier waves transporting the information.

The server930can send/receive messages and data, including e-mail, program code, through the network, the network link920and the communication interface918. Further, the communication interface918can comprise a USB/Tuner and the network link920may be an antenna or cable for connecting the server930to a cable provider, satellite provider or other terrestrial transmission system for receiving messages, data and program code from another source.

The example versions of the embodiments described herein may be implemented as logical operations in a distributed processing system such as the system900including the servers930. The logical operations of the embodiments may be implemented as a sequence of steps executing in the server930, and as interconnected machine modules within the system900. The implementation is a matter of choice and can depend on performance of the system900implementing the embodiments. As such, the logical operations constituting said example versions of the embodiments are referred to for e.g., as operations, steps or modules. Similar to a server930described above, a client device901can include a processor, memory, storage device, display, input device and communication interface (e.g., e-mail interface) for connecting the client device to the Internet928, the ISP, or LAN922, for communication with the servers930.

The system900can further include computers (e.g., personal computers, computing nodes)905operating in the same manner as client devices901, wherein a user can utilize one or more computers905to manage data in the server930.

Referring now toFIG.10, illustrative cloud computing environment50is depicted. As shown, cloud computing environment50comprises one or more cloud computing nodes10with which local computing devices used by cloud consumers, such as, for example, personal digital assistant (PDA), smartphone, smart watch, set-top box, video game system, tablet, mobile computing device, or cellular telephone54A, desktop computer54B, laptop computer54C, and/or automobile computer system54N may communicate. Nodes10may communicate with one another. They may be grouped (not shown) physically or virtually, in one or more networks, such as Private, Community, Public, or Hybrid clouds as described hereinabove, or a combination thereof. This allows cloud computing environment50to offer infrastructure, platforms and/or software as services for which a cloud consumer does not need to maintain resources on a local computing device. It is understood that the types of computing devices54A-N shown inFIG.10are intended to be illustrative only and that computing nodes10and cloud computing environment50can communicate with any type of computerized device over any type of network and/or network addressable connection (e.g., using a web browser).

Additional circuits may be included for practical purposes, such as a slow turn-on, initial startup circuit, high voltage transient protection (which may clamp to the 28 Volts power supply108), EMI filter circuits, and/or precision voltage references for increased accuracy.

It is contemplated that various combinations and/or sub-combinations of the specific features and aspects of the above embodiments may be made and still fall within the scope of the invention. Accordingly, it should be understood that various features and aspects of the disclosed embodiments may be combined with or substituted for one another in order to form varying modes of the disclosed invention. Further, it is intended that the scope of the present invention is herein disclosed by way of examples and should not be limited by the particular disclosed embodiments described above.