Patent ID: 12199210

DETAILED DESCRIPTION

Hereinafter, an embodiment of the present disclosure will be described in detail with reference to the diagrams In the following description, the same or equivalent elements are denoted by the same reference numerals, and repeated description thereof will be omitted.

As shown inFIGS.1to5, an optical semiconductor element1includes a substrate2and a plurality of (nine in this example) cells3formed on the substrate2. Each cell3has an optical layer31, a first semiconductor layer32, and a second semiconductor layer33. The optical semiconductor element1is a light emitting element or a light receiving element. In this example, the optical semiconductor element1is configured as a light emitting diode (LED), and the light generated in the optical layer31is emitted through the substrate2.

The substrate2is a semiconductor substrate having a light transmission property, and is formed in a rectangular plate shape by, for example, GaAs or semi-insulating GaAs. The substrate2has a main surface2a. Hereinafter, the thickness direction of the substrate2(direction perpendicular to the main surface2a), the length direction of the substrate2(direction perpendicular to the Z direction), and the width direction of the substrate2(direction perpendicular to the Z direction and the X direction) will be described as a Z direction, an X direction, and a Y direction, respectively. The length of the substrate2(maximum length of the optical semiconductor element1) in the X direction is, for example, 2 mm or less.

The plurality of cells3include a first termination cell3A, a second termination cell3B, a pair of dummy pad cells3C, and a plurality of (five in this case) cells3D other than the first termination cell3A, the second termination cell3B, and the dummy pad cells3C. The plurality of cells3are arranged in a grid pattern so that three cells are aligned along each of the X direction and the Y direction. When viewed from the Z direction, the first termination cell3A and the second termination cell3B are arranged at two corners C1located diagonally on the substrate2, and the pair of dummy pad cells3C are arranged at the remaining two corners C2located diagonally on the substrate2. In the optical semiconductor element1, a plurality of cells3are electrically connected in series (in multiple stages) via a wiring layer4described later, and light is emitted from each cell3.

First, the configuration of the cell3D will be described below. As described above, the cell3D has the optical layer31, the first semiconductor layer32, and the second semiconductor layer33. The second semiconductor layer33, the optical layer31, and the first semiconductor layer32are stacked in this order on the main surface2aof the substrate2. That is, the first semiconductor layer32is arranged on a side opposite to the substrate2(upper side inFIGS.2and3) with respect to the optical layer31, and the second semiconductor layer33is arranged on a side of the substrate2(lower side inFIGS.2and3) with respect to the optical layer31. The length of the cell3D in the X direction (maximum length of the cell3D) is, for example, 300 μm or less.

In this example, the optical layer31is an active layer that generates light, and is configured to generate light having a central wavelength of 3 μm or more and 10 μm or less. The optical layer31has, for example, a multiple quantum well structure in which a barrier layer formed of AlInAs and a well layer formed of InAsSb are alternately stacked. The optical layer31is formed in a rectangular shape when viewed from the Z direction, and has four straight side portions31a. In this example, the optical layer31is formed in a rectangular shape having a long side along the X direction when viewed from the Z direction. The optical layer31may be formed in a square shape. In this example, the corners of the optical layer31and the cell3D are sharp, but the corners of the optical layer31and the cell3D may be rounded to have an R shape.

The first semiconductor layer32is a semiconductor layer of a first conductive type (for example, p-type). For example, the first semiconductor layer32is formed by stacking a barrier layer, a buffer layer, and a contact layer on the optical layer31in this order. The second semiconductor layer33is a semiconductor layer of a second conductive type (for example, n-type). For example, the second semiconductor layer33is formed by stacking a buffer layer, a contact layer, a current diffusion layer, and a barrier layer on the main surface2aof the substrate2in this order. The material of each layer included in the first semiconductor layer32and the second semiconductor layer33can be appropriately selected depending on the material of the optical layer31. As an example, the barrier layer of the first semiconductor layer32is formed of Al0.20InAs, the buffer layer is formed of Al0.05InAs, and the contact layer is formed of InAs. As an example, the buffer layer of the second semiconductor layer33is configured to include three layers of GaAs, GaSb, and InAs, the contact layer and the current diffusion layer are formed of Al0.05InAs, and the barrier layer is formed of Al0.20InAs.

The optical layer31and the first semiconductor layer32form a mesa portion34formed on the second semiconductor layer33. The mesa portion34is formed, for example, in a trapezoidal shape in a cross section (FIG.4) perpendicular to the main surface2aof the substrate2so as to protrude from the second semiconductor layer33to the side opposite to the substrate2. The mesa portion34is formed, for example, by stacking the optical layer31, the first semiconductor layer32, and the second semiconductor layer33on the substrate2and then removing parts of the substrate2, the optical layer31, the first semiconductor layer32, and the second semiconductor layer33by etching. After forming the mesa portion34, a groove portion37described later is formed.

The second semiconductor layer33has an outer portion35located outside the mesa portion34. Here, the “outside” means the side away from the center of the mesa portion34in the direction perpendicular to the Z direction. The outer portion35is formed, for example, in a rectangular ring shape so as to surround the entire circumference of the mesa portion34when viewed from the Z direction.

FIGS.2and4show three cells3D that are arranged in the Y direction so as to be electrically connected in series. Hereinafter, as shown inFIGS.2and4, the three cells3D will be described as a first cell3Da, a second cell3Db, and a third cell3Dc, respectively.

The second semiconductor layer33of the first cell3Da and the second semiconductor layer33of the second cell3Db are separated by a groove37so as to be electrically separated from each other. Similarly, the second semiconductor layer33of the second cell3Db and the second semiconductor layer33of the third cell3Dc are separated by the groove37so as to be electrically separated from each other. As described above, in the optical semiconductor element1, the second semiconductor layers33of the adjacent cells3are separated by the groove37so as to be electrically separated from each other. The groove portion37is formed in the second semiconductor layer33, and extends, for example, in a grid pattern so as to pass between the adjacent cells3when viewed from the Z direction. In this example, the groove portion37is formed so as to reach the inside of the substrate2in the Z direction. However, the groove portion37only needs to electrically separate the second semiconductor layers33of the adjacent cells3from each other, and the groove portion37does not have to be formed so as to reach the inside of the substrate2in the Z direction.

The first cell3Da and the second cell3Db are electrically connected to each other by a first wiring layer4A (wiring layer4) (wiring portion). Similarly, the second cell3Db and the third cell3Dc are electrically connected to each other by a second wiring layer4B (wiring layer4) (wiring portion). As described above, in the optical semiconductor element1, the wiring layer4realizes the electrical connection between the cells3. The wiring layer4is formed, for example, by stacking a first layer formed of Ti, a second layer formed of Pt, and a third layer formed of Au, in this order from the substrate2side by vapor deposition. Hereinafter, the first wiring layer4A and the second wiring layer4B will be described, but the other wiring layers4(wiring portions) are similarly configured.

The first wiring layer4A is formed on the first cell3Da and the second cell3Db via a first insulating layer5. That is, the first insulating layer5is formed over the first cell3Da and the second cell3Db, and the first wiring layer4A is formed on the first insulating layer5. The first insulating layer5is formed of, for example, Al2O3, and is formed over the adjacent cells3and the inner surface of the groove37between the adjacent cells3. A second insulating layer6is formed on the first insulating layer5and the first wiring layer4A, and a third insulating layer7is formed on the second insulating layer6. The second insulating layer6and the third insulating layer7are formed of, for example, Al2O3, and are formed over the entire surface of the substrate2.

The first wiring layer4A has a first connection portion4Aa and a first extending portion4Ab. The first connection portion4Aa is electrically connected to the second semiconductor layer33of the first cell3Da and the first semiconductor layer32of the second cell3Db. More specifically, the first connection portion4Aa is in contact with the outer portion35of the second semiconductor layer33of the first cell3Da through an opening5a, and is in contact with a surface32aof the first semiconductor layer32of the second cell3Db through an opening5b. The openings5aand5bare openings formed in the first insulating layer5. The surface32ais a surface of the first semiconductor layer32on a side opposite to the optical layer31, and forms a top surface of the mesa portion34. The first connection portion4Aa has a rectangular first portion41arranged on the surface32aof the first semiconductor layer32of the second cell3Db and a rectangular second portion42extending from the first portion41to reach the outer portion35of the second semiconductor layer33of the first cell3Da. The first portion41is arranged on the approximately entire surface32a. The width of the second portion42in the X direction is smaller than the width of the first portion41in the X direction.

As shown inFIG.2, when viewed from the Z direction, the first extending portion4Ab extends from the second portion42of the first connection portion4Aa so as to surround the four side portions31aof the optical layer31of the first cell3Da. The first extending portion4Ab is in contact with the outer portion35of the second semiconductor layer33of the first cell3Da through the opening5a. InFIGS.1to3, for convenience of explanation, a state in which the first insulating layer5, the second insulating layer6, and the third insulating layer7are omitted and the wiring layer4is exposed is shown. In addition, inFIG.2, the first wiring layer4A and the second wiring layer4B are hatched for easy understanding.

In this example, the first extending portion4Ab has four portions43a,43b,43c, and43dextending straight along the four side portions31a, respectively. The portion43ais connected to the second portion42of the first connection portion4Aa. The first end of the portion43bis connected to the first end of the portion43a, and the portion43bextends perpendicular to the portion43a. The portion43cis connected to the second end of the portion43b, and extends perpendicular to the portion43band parallel to the portion43a. The portion43dis connected to the second end of the portion43a, and extends perpendicular to the portion43aand parallel to the portion43b. In this example, the portion43dis not connected to the portion43c, and a gap is formed between the portions43cand43dwhen viewed from the Z direction. That is, the first extending portion4Ab partially surrounds the four side portions31aof the optical layer31of the first cell3Da, and does not surround the entire circumference of the optical layer31of the first cell3Da. The first extending portion4Ab extends along at least a part of each of the four side portions31awhen viewed from the Z direction. As will be described later, a connection portion of another wiring layer4is arranged in the gap between the portions43cand43d.

The second wiring layer4B is formed on the second cell3Db and the third cell3Dc with the first insulating layer5interposed therebetween. The second wiring layer4B has a second connection portion4Ba and a second extending portion4Bb. The second connection portion4Ba is electrically connected to the second semiconductor layer33of the second cell3Db and the first semiconductor layer32of the third cell3Dc. More specifically, the second connection portion4Ba is in contact with the outer portion35of the second semiconductor layer33of the second cell3Db through the opening5a, and is in contact with the surface32aof the first semiconductor layer32of the third cell3Dc through the opening5b. The second connection portion4Ba has a rectangular first portion41arranged on the surface32aof the first semiconductor layer32of the third cell3Dc and a rectangular second portion42extending from the first portion41to the outer portion35of the second semiconductor layer33of the second cell3Db.

As shown inFIG.2, when viewed from the Z direction, the second extending portion4Bb extends from the second portion42of the second connection portion4Ba so as to surround the four side portions31aof the optical layer31of the second cell3Db. The second extending portion4Bb is in contact with the outer portion35of the second semiconductor layer33of the second cell3Db through the opening5a. In this example, the second extending portion4Bb has four portions43a,43b,43c, and43dextending straight along the four side portions31a, respectively. The portion43ais connected to the second portion42of the second connection portion4Ba. The first end of the portion43bis connected to the first end of the portion43a, and the portion43bextends perpendicular to the portion43a. The portion43cis connected to the second end of the portion43b, and extends perpendicular to the portion43band parallel to the portion43a. The portion43dis connected to the second end of the portion43a, and extends perpendicular to the portion43aand parallel to the portion43b. In this example, the portion43dis not connected to the portion43c, and a gap is formed between the portions43cand43dwhen viewed from the Z direction. That is, the second extending portion4Bb partially surrounds the four side portions31aof the optical layer31of the second cell3Db, and does not surround the entire circumference of the optical layer31of the second cell3Db. The second extending portion4Bb extends along at least a part of each of the four side portions31awhen viewed from the Z direction. As will be described later, the first connection portion4Aa of the first wiring layer4A is arranged in the gap between the portions43cand43d.

In the present embodiment, the first connection portion4Aa of the first wiring layer4A does not overlap the second extending portion4Bb of the second wiring layer4B when viewed from the Z direction. The second portion42of the first connection portion4Aa of the first wiring layer4A is arranged so as to pass through the gap formed between the portions43cand43dof the second wiring layer4B when viewed from the Z direction.

Subsequently, the configurations of the first termination cell3A, the second termination cell3B, and the dummy pad cell3C will be described with reference toFIGS.1,3, and5. The first termination cell3A, the second termination cell3B, and the dummy pad cell3C have the same configuration as the cell3D except for the matters described below. InFIG.5, for convenience of explanation, the first termination cell3A, the second termination cell3B, and the dummy pad cell3C are shown side by side virtually.

The first termination cell3A is the cell3arranged at one end of the electrically series connection, and the second termination cell3B is the cell3arranged at the other end of the electrically series connection. The first termination cell3A and the second termination cell3B are electrically connected to the adjacent cell3by the wiring layer4.

A first electrode (anode)11is arranged on the top surface of the first termination cell3A (top surface of the mesa portion34). The first electrode11is electrically connected to the first semiconductor layer32of the first termination cell3A. The first electrode11has a lower portion11aarranged on the surface32aof the first semiconductor layer32and an upper portion11barranged on the lower portion11a. The lower portion11ais in contact with the first semiconductor layer32of the first termination cell3A through the opening5cformed in the first insulating layer5. The upper portion11bis arranged in an opening6aformed in the second insulating layer6, and is exposed to the outside of the optical semiconductor element1from an opening7aformed in the third insulating layer7. The exposed portion in the upper portion11bforms a first pad portion P1for electrical connection with an external member50described later. InFIG.1, the first pad portion P1is shown by a broken line. In this example, when viewed from the Z direction, the first electrode11is formed in a rectangular shape, and the first pad portion P1is formed in a circular shape. The first pad portion P1is not limited to the circular shape, and may be formed in any shape such as a rectangular shape.

The lower portion11ais formed by stacking a first layer formed of Ti, a second layer formed of Pt, and a third layer formed of Au on the surface32ain this order by vapor deposition. That is, the lower portion11ahas a three-layer structure similar to that of the wiring layer4described above. The upper portion11bhas a three-layer structure similar to that of the lower portion11aand the wiring layer4. Since the second layer formed of Pt is provided, it is possible to suppress the occurrence of a situation (solder erosion, solder corrosion) in which the solder flows to the third layer of the lower portion11awhen the external member50is connected to the first pad portion P1by soldering as described later. That is, if the second layer is not provided, a phenomenon called solder erosion may occur and the solder may flow to the third layer of the lower portion11a. However, by providing the second layer formed of Pt, it is possible to prevent the solder from flowing to the third layer of the lower portion11a, so that it is possible to keep the flow of the solder to the third layer of the upper portion11b. As a result, it is possible to satisfactorily control the shape of the solder.

A second electrode (cathode)12is arranged on the top surface of the second termination cell3B (top surface of the mesa portion34). The second electrode12is electrically connected to the second semiconductor layer33of the second termination cell3B. The second electrode12has a first portion12a, a second portion12b, and a connection portion12c. The first portion12ais electrically connected to the outer portion35of the second semiconductor layer33of the second termination cell3B through an opening5dformed in the first insulating layer5. The second portion12bis arranged on the second insulating layer6so as to overlap the top surface of the mesa portion34when viewed from the Z direction. The connection portion12cis electrically connected to the first portion12aand the second portion12b. The second portion12bis exposed to the outside of the optical semiconductor element1through an opening7bformed in the third insulating layer7. The exposed portion in the second portion12bforms a second pad portion P2for electrical connection with the external member50. InFIG.1, the second pad portion P2is shown by a broken line. In this example, the second portion12band the second pad portion P2are formed in a circular shape when viewed from the Z direction.

The first portion12ahas a lower portion12a1arranged on the outer portion35of the second semiconductor layer33of the second termination cell3B and an upper portion12a2arranged on the lower portion12a1. The lower portion12a1has a three-layer structure similar to that of the lower portion11aof the first electrode11. The upper portion12a2, the second portion12b, and the connection portion12chave a three-layer structure similar to that of the lower portions11aand12a1.

As shown inFIG.3, the first portion12ahas an extending portion (third extending portion)15. The extending portion15extends so as to surround the four side portions31aof the optical layer31of the second termination cell3B when viewed from the Z direction. In this example, the extending portion15has four portions15a,15b,15c, and15dextending straight along the four side portions31a, respectively. The portion15ais connected to the connection portion12c. The first end of the portion15bis connected to the first end of the portion15a, and the portion15bextends perpendicular to the portion15a. The portion15cis connected to the second end of the portion15b, and extends perpendicular to the portion15band parallel to the portion15a. The portion15dis connected to the second end of the portion15a, and extends perpendicular to the portion15aand parallel to the portion15b. In this example, the portion15dis not connected to the portion15c, and a gap is formed between the portions15cand15dwhen viewed from the Z direction. That is, the extending portion15partially surrounds the four side portions31aof the optical layer31of the second termination cell3B, and does not surround the entire circumference of the optical layer31of the second termination cell3B. The extending portion15extends along at least a part of each of the four side portions31awhen viewed from the Z direction. A connection portion of the wiring layer4is arranged in the gap between the portions15cand15d. The extending portion15does not overlap the connection portion of the wiring layer4when viewed from the Z direction.

A dummy electrode13is arranged on the top surface of the dummy pad cell3C (top surface of the mesa portion34). The dummy electrode13is arranged on the second insulating layer6so as to overlap the first semiconductor layer32in the Z direction. The dummy electrode13has, for example, a layer structure similar to that of the lower portion11aof the first electrode11. The dummy electrode13is electrically separated (insulated) from the optical layer31, the first semiconductor layer32, and the second semiconductor layer33of the dummy pad cell3C by the second insulating layer6. The dummy electrode13is exposed to the outside of the optical semiconductor element1through an opening7cformed in the third insulating layer7. The exposed portion in the dummy electrode13forms a dummy pad portion DP. InFIG.1, the dummy pad portion DP is shown by a broken line. The dummy pad portion DP is formed in a circular shape when viewed from the Z direction, but may be formed in any shape such as a rectangular shape.

The external member50is connected to the dummy pad portion DP by solder as in the case of the first pad portion P1and the second pad portion P2. However, as described above, unlike the first pad portion P1and the second pad portion P2, the dummy pad portion DP is electrically insulated from the optical layer31, the first semiconductor layer32, and the second semiconductor layer33of the dummy pad cell3C.

FIG.6is a cross-sectional view showing a state in which the optical semiconductor element1is mounted.FIG.4shows an example in which the optical semiconductor element1is electrically connected to the external member50by solder (bump, bonding material)40. In this example, each of the first pad portion P1and the second pad portion P2is connected to the external member50by the solder40. In addition, although not shown, the dummy pad portion DP is connected to the external member50by the solder40. During operation of the optical semiconductor element1, a voltage is applied between the first pad portion P1(first electrode11) and the second pad portion P2(second electrode12) through the external member50. As a result, in each cell3, carriers are injected into the optical layer31to generate light, and the generated light is emitted through the substrate2. In addition, instead of the solder40, an Au bump or an In bump may be used as a bonding material.

[Functions and Effects]

In the optical semiconductor element1, the optical layer31is an active layer that generates light having a central wavelength of 3 μm or more and 10 μm or less. In this case, as described above, the carrier injection efficiency may be reduced, and it is important to increase the light emission efficiency per unit area. The latter is due to the high price of a wafer (in which each layer, electrode, and insulating layer are formed on the substrate2) used for forming the optical semiconductor element1. In this respect, in the optical semiconductor element1, a plurality of cells3are formed on the substrate2. Therefore, for example, compared with a case where only one cell3is formed on the substrate2, the size of one cell3can be reduced. As a result, it is possible to suppress a reduction in carrier injection efficiency. In addition, the optical layer31of each cell3is formed in a rectangular shape when viewed from the Z direction. Therefore, a plurality of cells3can be efficiently arranged on the substrate2, and it is possible to increase the light emission efficiency per unit area. Arranging a plurality of cells3as described above is particularly effective when the output per cell3is reduced by reducing the size of one cell3. In addition, in the optical semiconductor element1, the first wiring layer4A has the first connection portion4Aa that electrically connects the second semiconductor layer33of the first cell3Da and the first semiconductor layer32of the second cell3Db to each other and the first extending portion4Ab that extends so as to surround the four side portions31aof the optical layer31of the first cell3Da when viewed from the Z direction (thickness direction of the substrate2). As a result, it is possible to more effectively suppress the reduction in carrier injection efficiency, and it is possible to increase the light emission efficiency in the central portion of the cell3. In addition, the entire cell can emit light uniformly. Therefore, according to the optical semiconductor element1, it is possible to suppress a reduction in carrier injection efficiency and increase the light emission efficiency per unit area.

The first connection portion4Aa of the first wiring layer4A does not overlap the second extending portion4Bb of the second wiring layer4B when viewed from the Z direction. Therefore, it is possible to avoid a situation in which the first wiring layer4A and the second wiring layer4B overlap each other to generate a capacitance.

A plurality of cells3are electrically connected in series. Therefore, it is possible to suppress an increase in the amount of current required for driving the plurality of cells3, and it is possible to make the amount of current applied to each cell3uniform. That is, for example, when the optical semiconductor element1is driven by a constant current but a plurality of cells3are connected in parallel, the amount of current required for driving increases and the amount of current applied to each cell3changes. In addition, for example, when a plurality of cells3are connected in parallel, there is a place where the wiring layer4cannot be formed so as to have an extending portion due to the wiring routing, and as a result, the carrier injection efficiency may be reduced. However, by connecting the plurality of cells3in series, it is possible to suppress the occurrence of such a situation.

The first electrode11electrically connected to the first semiconductor layer32of the first termination cell3A is arranged on the top surface of the first termination cell3A, and the second electrode12electrically connected to the second semiconductor layer33of the termination cell3B is arranged on the top surface of the second termination cell3B. Therefore, all of the plurality of cells3can be made to emit light by electrical connection through the first electrode11and the second electrode12. As a result, it is possible to increase the light emission efficiency. In addition, since the first electrode11is arranged on the top surface of the first termination cell3A and the second electrode12is arranged on the top surface of the second termination cell3B, it is possible to easily connect the external member50to the first electrode11and the second electrode12.

The second electrode12has the extending portion15(third extending portion) that extends so as to surround the four side portions31aof the optical layer31of the second termination cell3B when viewed from the Z direction. Therefore, it is possible to suppress a reduction in carrier injection efficiency in the second termination cell3B.

The dummy electrode13electrically separated from the optical layer31, the first semiconductor layer32, and the second semiconductor layer33of the dummy pad cell3C is arranged on the top surface of the dummy pad cell3C. Therefore, for example, by connecting the optical semiconductor element1to the external member50not only in the first electrode11and the second electrode12but also in the dummy electrode13, it is possible to increase the connection strength between the optical semiconductor element1and the external member50, and it is possible to suppress the occurrence of a situation in which the angle between the optical semiconductor element1and the external member50deviates from the target angle at the time of connection.

The optical layer31is formed of a material containing AlInAs and InAsSb. Therefore, the optical layer31can be configured as an active layer that generates light having a central wavelength of 3 μm or more and 10 μm or less.

The substrate2has a light transmission property, and the light generated in the optical layer31is emitted through the substrate2. Therefore, light can be emitted through the substrate2.

The first extending portion4Ab includes the four portions43ato43dextending straight along the four side portions31a, respectively, when viewed from the Z direction. Therefore, it is possible to more effectively suppress the reduction in carrier injection efficiency.

MODIFICATION EXAMPLES

In a modification example shown inFIG.7, the second electrode12is not provided in the second termination cell3B, and the second pad portion P2is formed by the connection portion4aof the wiring layer4exposed from the openings formed in the second insulating layer6and the third insulating layer7. InFIG.7, the second pad portion P2is shown by a broken line. In this modification example, the second termination cell3B does not emit light. Also in such a modification example, similar to the embodiment described above, it is possible to suppress the reduction in carrier injection efficiency and increase the light emission efficiency per unit area.

In case the second termination cell3B does not emit light, the second termination cell3B may have any structure. For example, an insulating layer may be provided between the wiring layer4and the first semiconductor layer32of the second termination cell3B. Alternatively, the second termination cell3B may not include the first semiconductor layer32and the optical layer31, and the wiring layer4may be directly provided on the second semiconductor layer33. That is, the plurality of cells3may include a terminal cell that does not emit light (for example, the second termination cell3B) and light emitting cells that can emit light (for example, cells3other than the second termination cell3B). The light emitting cells include the optical layer31, the first semiconductor layer32, and the second semiconductor layer33. The termination cell includes at least the second semiconductor layer33.

Alternatively, it can be regarded that the optical semiconductor element1includes a termination cell (for example, the second termination cell3B) in addition to the plurality of cells3. In this case, the terminal cell is a cell electrically connected to the cell of the plurality of cells3which is arranged at one end in the electrical series connection. The termination cell includes at least the second semiconductor layer33disposed on the substrate2, and an electrode (for example, the second electrode12) for electrical connection with an outside of the optical semiconductor element (for example, external circuit) is arranged on the top surface of the termination cell. This electrode may or may not be electrically connected to the second semiconductor layer33of the termination cell. The terminal cell may be a cell that includes the optical layer31, the first semiconductor layer32, and the second semiconductor layer33and can emit light or may be a cell that includes the second semiconductor layer33only and does not emit light. Alternatively, the wiring layer4may be directly formed on the substrate2without providing the second terminal cell3B. In this case, a portion of the wiring layer4located inside the region where the second termination cell3B was formed can be used as an electrode. That is, the optical semiconductor element1may include an electrode arranged on the substrate2instead of the second termination cell3B. This electrode is electrically connected to the cell of the plurality of cells3which is arranged at one end in the electrical series connection.

That is, the optical semiconductor element may include a termination cell electrically connected to a cell of the plurality of cells which is arranged at one end in an electrical connection of the plurality of cells, the termination cell may include at least the second semiconductor layer arranged on the substrate, and an electrode for electrical connection with an outside may be arranged on a top surface of the termination cell. In this case, since at least the second semiconductor layer is arranged on the substrate, the difference in height between the termination cell and the other cells (plurality of cells) can be reduced, and as a result, the optical semiconductor element can be easily mounted.

In this case, the termination cell may include the optical layer, the first semiconductor layer, and the second semiconductor layer, and the electrode may be electrically connected to the second semiconductor layer of the termination cell. In this case, since the optical layer, the first semiconductor layer, and the second semiconductor layer are arranged on the substrate, the difference in height between the termination cell and the other cells (plurality of cells) can be further reduced, and as a result, the optical semiconductor element can be further easily mounted. In addition, since the termination cell can emit light in case the electrode and the first semiconductor layer are insulated from each other in the above-described structure, the light emission efficiency of the optical semiconductor element can be improved. In addition, when the shape of the optical semiconductor element or the external device changes (expands or contracts) due to a temperature change, a load is likely to be concentrated on a portion having a different height and a failure is likely to occur. However, since the termination cell includes the optical layer, the first semiconductor layer, and the second semiconductor layer similarly to the other cells, the load concentration is less likely to occur.

Alternatively, the termination cell may include the second semiconductor layer only, and the electrode may be electrically connected to the second semiconductor layer of the termination cell. In this case, compared to the configuration in which the termination cell can emit light, the structure of the optical semiconductor element can be simplified.

The optical semiconductor element may include an electrode arranged on the substrate, and the electrode may be electrically connected to a cell of the plurality of cells which is arranged at one end in an electrical connection of the plurality of cells. In this case, compared to the configuration in which the termination cell can emit light, the structure of the optical semiconductor element can be simplified.

The present disclosure is not limited to the embodiment and the modification example described above. For example, the material and shape of each component are not limited to the materials and shapes described above, and various materials and shapes can be adopted. In the embodiment described above, the optical layer31has a multiple quantum well structure, but the optical layer31may be configured by a single layer. The material of the optical layer31is not limited to the example in the embodiment described above, and the optical layer31may be formed of a material containing at least one of InAsSb, AlInSb, and AlInAs. The optical layer31may be formed of a material containing Sb and In. The optical layer31may be formed of a material containing Sb. Even in these cases, the optical layer31can be configured as an active layer that generates light having a central wavelength of 3 μm or more and 10 μm or less. The optical layer31may be an active layer that generates light having a central wavelength of 3 μm or more and 8 μm or less, or may be an absorption layer having a maximum sensitivity wavelength of 3 μm or more and 8 μm or less. The wiring layer4, the first electrode11, and the second electrode12may be formed of a metal material other than those described above. The wiring layer4does not necessarily have to be formed in a layered shape.

In the embodiment described above, the second extending portion4Bb of the second wiring layer4B partially surrounds the four side portions31aof the optical layer31of the second cell3Db, but the second extending portion4Bb may surround the entire circumference of the optical layer31. In other words, the second extending portion4Bb may surround the entire four side portions31aof the optical layer31. For example, in the embodiment described above, the portions43cand43dof the second extending portion4Bb may be connected to each other, and the second extending portion4Bb may be formed in a rectangular ring shape when viewed from the Z direction. In this case, for example, by making the plane on which the first connection portion4Aa of the first wiring layer4A is arranged different from the plane on which the second extending portion4Bb of the second wiring layer4B is arranged, the first connection portion4Aa and the second extending portion4Bb are arranged so as to three-dimensionally cross (straddle) each other. In this case, the first connection portion4Aa and the second extending portion4Bb have portions overlapping each other when viewed from the Z direction.

In the embodiment described above, the second extending portion4Bb extends in two different directions (InFIG.2, the direction surrounding the optical layer31clockwise and the direction surrounding the optical layer31counterclockwise) starting from the intersection with the second portion42of the second connection portion4Ba. However, when the second extending portion4Bb partially surrounds the four side portions31aof the optical layer31of the second cell3Db, the second extending portion4Bb may extend in only one direction starting from the intersection with the second portion42. Also in this case, the first connection portion4Aa and the second extending portion4Bb have portions overlapping each other when viewed from the Z direction. When the second extending portion4Bb extends in two different directions starting from the intersection with the second portion42, it is possible to shorten the length from the intersection with the second portion42to the distal end in the second extending portion4Bb as compared with a case where the second extending portion4Bb extends in only one direction. Therefore, since it is possible to increase the efficiency of carrier injection into the optical layer31, it is possible to improve the light emission efficiency.

As another modification example, the optical semiconductor element1may be configured as a light receiving element. In this modification example, the optical semiconductor element1is configured as, for example, a photodiode. The optical layer31is an absorption layer that absorbs light, and is configured to have a maximum sensitivity wavelength of, for example, 3 μm or more and 10 μm or less. The optical layer31is configured in the same manner as the optical layer31of the embodiment described above, for example. In each cell3, light incident through the substrate2is absorbed by the optical layer31, and carriers are generated in the optical layer31. The generated carriers are extracted through the first pad portion P1(first electrode11) and the second pad portion P2(second electrode12).

According to this modification example, for the same reason as in the embodiment described above, it is possible to suppress a reduction in carrier extraction efficiency and increase the light reception efficiency per unit area. In addition, when the optical semiconductor element1is a light receiving element, if a plurality of cells3are electrically connected in series to each other, the resistance value of the optical semiconductor element1can be set to a value suitable for connection with an amplifier connected subsequently. That is, the optical semiconductor element1having a maximum sensitivity wavelength in the mid-infrared region has a small resistance value. The amplifier has a resistance value suitable for connection, and in order to increase the resistance to about the resistance value, the optical semiconductor element1adopts a structure in which a plurality of cells3are connected in series. If the resistance value of the optical semiconductor element1is too smaller than the target value, noise is large and accordingly, the signal is easily buried in the noise. In addition, when the optical semiconductor element1is a light receiving element, if a plurality of cells3are electrically connected in series, thermal noise can be reduced. As a result, the total noise can be reduced. In a photodiode having sensitivity in the mid-infrared region, it is particularly important how the thermal noise can be reduced. More specifically, as the number of cells3connected in series increases, thermal noise is suppressed. The smaller the size of the optical semiconductor element1, the more optical semiconductor elements1can be connected in series.

In the embodiment described above, the mesa portion34is formed in a trapezoidal shape in the cross section perpendicular to the main surface2aof the substrate2(FIG.4), but the mesa portion34may be formed in a rectangular shape in the cross section. In this case, the side surface of the mesa portion34may extend along the Z direction.

The material of each component is not limited to those described above. As an example, the substrate2may be formed of Si. The bather layer of the first semiconductor layer32may be formed of (AlGa)0.20In0.80As, and the buffer layer and the contact layer of the first semiconductor layer32may be formed of In0.87GaAs. The buffer layer of the second semiconductor layer33may be formed to have three layers formed of GaAs, low temperature InAs, and In0.87GaAs, respectively, the contact layer and the current diffusion layer of the second semiconductor layer33may be formed of In0.87GaAs, and the barrier layer of the second semiconductor layer33may be formed of (AlGa)0.20In0.80As. The first insulating layer5and the second insulating layer6may be formed of SiO2. As another example, the substrate2may be formed of SI—InP. The barrier layer of the first semiconductor layer32may be formed of Al0.15InAs, and the buffer layer and the contact layer of the first semiconductor layer32may be formed of InAs. The buffer layer of the second semiconductor layer33may be formed to have three layers formed of GaAs, low temperature InAs, and InAs, respectively, the contact layer and the current diffusion layer of the second semiconductor layer33may be formed of InAs, and the barrier layer of the second semiconductor layer33may be formed of Al0.15InAs. The first insulating layer5and the second insulating layer6may be formed of SiN. As another example, the buffer layer of the second semiconductor layer33may be formed to have three layers formed of GaAs, InAs, and In0.87GaAs, respectively.

The substrate2may be formed in a square shape, a circular shape, an elliptical shape, or the like when viewed from the Z direction. The optical layer31, the first semiconductor layer32, and the second semiconductor layer33may be formed in a square shape, a circular shape, an elliptical shape, or the like when viewed from the Z direction. The first electrode11and the second electrode12may be formed in a square shape, a circular shape, an elliptical shape, or the like when viewed from the Z direction. The first connection portion4Aa of the first wiring layer4A is not limited to the rectangular shape, and may be formed in any shape. The first connection portion4Aa does not necessarily have to be arranged on the approximately entire surface32a, and at least a part of the first connection portion4Aa may be arranged on the surface32a. When the substrate2is formed in a rectangular shape when viewed from the Z direction and the cell3(optical layer31) is formed in a rectangular shape when viewed from the Z direction, the cell3can be efficiently arranged on the substrate2.

The first termination cell3A and the second termination cell3B do not necessarily have to be arranged diagonally on the substrate2when viewed from the Z direction, and may be arranged at any position. The dummy pad cell3C may not be provided.