Patent ID: 12262472

DETAILED DESCRIPTION OF THE DISCLOSURE

It is understood that the term “vehicle” or “vehicular” or other similar term as used herein is inclusive of motor vehicles in general such as passenger automobiles including sports utility vehicles (SUV), buses, trucks, various commercial vehicles, watercraft including a variety of boats and ships, aircraft, and the like, and includes hybrid vehicles, electric vehicles, plug-in hybrid electric vehicles, hydrogen-powered vehicles and other alternative fuel vehicles (e.g. fuels derived from resources other than petroleum). As referred to herein, a hybrid vehicle is a vehicle that has two or more sources of power, for example both gasoline-powered and electric-powered vehicles.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. These terms are merely intended to distinguish one component from another component, and the terms do not limit the nature, sequence or order of the constituent components. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. Throughout the specification, unless explicitly described to the contrary, the word “comprise” and variations such as “comprises” or “comprising” will be understood to imply the inclusion of stated elements but not the exclusion of any other elements. In addition, the terms “unit”, “-er”, “-or”, and “module” described in the specification mean units for processing at least one function and operation, and can be implemented by hardware components or software components and combinations thereof.

Hereinafter, a power module according to an exemplary embodiment of the present disclosure will be described with reference to accompanying drawings.

Specific structural or functional descriptions of the embodiments of the present disclosure disclosed in the present specification are exemplified only for the purpose of describing the embodiments according to the present disclosure, and the embodiments according to the present disclosure may be implemented in various forms, and should not be construed as being limited to the embodiments described in the present specification.

Since the embodiments according to the present disclosure can be modified in various ways and have various forms, specific embodiments are illustrated in the drawings and will be described in detail in the present specification. However, this is not intended to limit the embodiments according to the concept of the present disclosure to a specific form of disclosure, and it should be understood that all changes, equivalents, and substitutes included in the spirit and scope of the present disclosure are included.

Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. Terms such as those defined in a commonly used dictionary should be interpreted as having a meaning consistent with the meaning of the related technology, and should not be interpreted as an ideal or excessively formal meaning unless explicitly defined in the present specification.

Hereinafter, the present disclosure will be described in detail by describing an exemplary embodiment of the present disclosure with reference to the accompanying drawings. The same reference numerals shown in each drawing indicate the same members.

As illustrated inFIGS.1to3, a power module according to the present disclosure may include: a chip30; an upper substrate10and a lower substrate20that are respectively disposed above and below the chip30; and a guide groove portion50formed of a plurality of grooves which is recessively formed in the upper substrate10and the lower substrate20around a connection portion of the chip30, the guide groove portion50being configured to guide molten solder S when the chip30is bonded to the upper substrate10and the lower substrate20by a soldering process.

In addition, a spacer40disposed to be spaced apart from the chip30may be further included in the upper substrate10and the lower substrate20, and the spacer40may also be bonded to the upper substrate10and the lower substrate20by the soldering process. Accordingly, the guide groove portion50may be formed in the upper substrate10and the lower substrate20on a periphery of the spacer40.

In addition, the power module according to the present disclosure may further include a lead frame70which is disposed to be spaced apart from the chip30and which is electrically connected to any one of substrates among the upper substrate10and the lower substrate20. In such a power module, a plurality of chips30and a plurality of spacers40may be disposed inside one power module, and the lead frame70is provided such that an electrical signal is capable of being transmitted to another power module. The lead frame70serves to transmit or receive a signal to each substrate of another power module, and is not simultaneously connected to the upper substrate10and the lower substrate20. Further, the lead frame may be connected to the spacer40that is disposed between the upper substrate10and the lower substrate20.

The chip30may form a circuit by being electrically connected to the upper substrate10and the lower substrate20that are respectively provided above and below the chip30. Such a chip30may be electrically connected to the upper substrate10and the lower substrate20via the spacer40.

Such an upper substrate10, a lower substrate20, a chip30, a spacer40, and a lead frame70may be formed as one structure by molding each configuration thereof. Further, in order to perform a double-sided cooling, an upper cooling portion61which is in contact with the upper substrate10and which cools the upper substrate10by exchanging heat with the upper substrate10and a lower cooling portion62which is in contact with the lower substrate20and which cools the lower substrate20by exchanging heat with the lower substrate20may be provided.

Particularly, in the present disclosure, since the chip30and the spacer40are bonded to the upper substrate10and the lower substrate20by the soldering process, the guide groove portion50that guides the molten solder to a periphery of the chip30and the spacer40may be formed.

Here, the upper substrate10and the lower substrate20may be each formed of an upper metal layer A1, a lower metal layer A2, and an insulator A3that is interposed between the upper metal layer A1and the lower metal layer A2. Further, as the chip30and the spacer40are bonded to the lower metal layer A2of the upper substrate10and the upper metal layer A1of the lower substrate20, the guide groove portion50may be formed in the lower metal layer A2of the upper substrate10and in the upper metal layer A1of the lower substrate20.

That is, the chip30and the spacer40according to an embodiment of the present disclosure may be bonded to the upper substrate10and the lower substrate20by the soldering process. However, due to the characteristics of the soldering process, when an overflow of the molten solder occurs, an electrical short circuit of the chip30or the spacer40occurs. That is, as illustrated inFIG.3, when an overflow of the molten solder in a vertical direction occurs, a short circuit may occur between the upper substrate10and the lower substrate20and the electrical short circuit may occur. Here, the vertical direction may be a direction in which the upper substrate10and the lower substrate20are facing each other, and a horizontal direction may be a direction orthogonal to the vertical direction.

In addition, as the insulator A3is exposed from a portion of the lower metal layer A2of the upper substrate10or the upper metal layer A1of the lower substrate20, in which the portion is where the soldering process is performed, a thermal stress may be concentrated mainly on a portion exposed under a high temperature operating condition or a severe condition, so that the insulator A3may be destroyed.

Therefore, by forming the guide groove portion50in the upper substrate10and the lower substrate20, the guide groove portion50being configured to guide the molten solder to the periphery of the chip30and the periphery of the spacer40, the molten solder may be guided to each groove of the guide groove portion50when the soldering process is performed, so that an overflow of the molten solder in the horizontal direction is partially allowed but the overflow of the molten solder in the horizontal direction is restrained. Accordingly, in the upper substrate10and the lower substrate20, the electrical short circuit caused by the overflow of the solder in the vertical direction is prevented.

In describing the present disclosure in detail, the guide groove portion50may be formed such that the guide groove portion50surrounds each vertex and a portion of edges around each vertex of both the chip30and the spacer40.

As such, as the guide groove portion50is formed around each vertex and the portion of the edges around each vertex of both the chip30and the spacer40, the molten solder may be guided to overflow in the horizontal direction during the soldering process. That is, the plurality of grooves forming the guide groove portion50is disposed apart from each other such that the plurality of grooves surrounds each vertex and the portion of edges around each vertex of both the chip30and the spacer40. As such, the guide groove portion50is formed in a dimple structure that is formed of the plurality of grooves, and the molten solder may be guided to the horizontal direction since the plurality of grooves is disposed to be spaced apart from each other such that each vertex and the portion of the edges around each vertex of both the chip30and the spacer40are surrounded.

That is, conventionally, as illustrated inFIG.4, a solder stop accommodating molten solder may be formed on a border of a component including a chip and a spacer, so that the solder stop is formed over a wide area. Therefore, conventionally, solder is agglomerated to a small area, so that the overflow of the molten solder in the vertical direction that is a direction facing the drawing occurs, thereby generating the electrical short circuit. In addition, as illustrated inFIG.5, when the molten solder overflows in the vertical direction, each insulator forming each substrate is exposed, and there is a problem that separation and destruction of each insulator occur due to contraction and expansion of the solder.

However, in the present disclosure, as illustrated inFIGS.6and7, since the guide groove portion50is formed such that the guide groove portion50surrounds each vertex and the portion of the edges around each vertex of both the chip30and the spacer40, the molten solder may be guided to the horizontal direction and overflow with a wide area, so that the overflow of the molten solder in the vertical direction is prevented. As a result, in the present disclosure, since the overflow of the solder in the vertical direction is prevented, exposure of each insulator A3is minimized, so that the separation and the destruction of each insulator A3are prevented and a stress relieving effect occurs.

Meanwhile, the guide groove portion50may have the plurality of grooves arranged as one row. Therefore, as other chip30or other spacer40is disposed adjacent to each other, when each guide groove portion50of the chip30or the spacer40is overlapped, the grooves may only be formed as one row on an overlapping portion.

When the plurality of grooves forming the guide groove portion50is formed in two or more rows or is excessively formed by including edges except for each vertex of the chip30or the spacer40, the overflow of the solder in the horizontal direction may be restrained and the overflow of the solder in the vertical direction may be guided, so that the electrical short circuit caused by the solder may occur.

In addition, when the number of the plurality of grooves that forms the guide groove portion50is too small, such as the plurality of grooves is formed only around a vertex portion of the chip30or the spacer40, the plurality of grooves may not be capable of restricting a movement of the chip30or the spacer40. Therefore, the separation of the solder in the chip30or the spacer40occurs, so that the stress relieving effect is reduced.

Therefore, in the guide groove portion50, the plurality of grooves may be arranged as one row, and the grooves of the guide groove portion50corresponding to each chip30or each spacer40may be disposed to be overlapped when other chip30or the other spacer40are disposed adjacent to the chip30or the spacer40. Further, the plurality of grooves is only formed around a portion of each vertex and the portion of the edges around each vertex of the chip30or the spacer40.

Meanwhile, the guide groove portion50may be formed such that a depth of each groove of the guide groove portion50is smaller than a thickness of the upper metal layer A1or the lower metal layer A2to which the chip30or the spacer40is bonded.

In each groove that forms the guide groove portion50, as the depth of each groove increases, more etching process of each metal layer of the upper substrate10and the lower substrate20may proceed, so that the overflow of the solder in the vertical direction may be guided. Therefore, each groove forming the guide groove portion50is formed such that the depth of each groove is smaller than the thickness of the upper metal layer A1or the thickness of the lower metal layer A2. In addition, by the guide groove portion50, the solder is prevented from excessively overflowing when the soldering process is performed. For example, when the thickness of the upper metal layer A1or the thickness of the lower metal layer A2is 0.3 T, the depth of each groove that forms the guide groove portion50may be less than 0.2 T.

Meanwhile, the guide groove portion50may be formed such that each groove is spaced apart from each other by a predetermined distance so that a separation distance of each groove is equal to or more than a minimum separation distance. Here, the minimum separation distance may be set to 0.2 mm. That is, in each groove forming the guide groove portion50, when the separation distance is formed to be too far, the overflow of the solder in the horizontal direction is not guided. Further, when the separation distance is formed to be too close, each groove may interfere with each other, so that the overflow of the solder in the vertical direction may occur.

Therefore, in an embodiment according to the present disclosure, each groove forming the guide groove portion50may be set to be spaced apart from each other by 0.2 mm, so that the interference between each groove is avoided, thereby preventing the overflow of the solder in the vertical direction and guiding the overflow of the solder in the horizontal direction.

In addition, the guide groove portion50may be formed such that the plurality of grooves is formed in each side of the chip30within a maximum formation ratio. The maximum formation ratio may be set to 40%. That is, in an embodiment according to the present disclosure, the guide groove portion50is formed only around each vertex and the portion of the edges around each vertex of the chip or the spacer40. Further, when the plurality of grooves forming the guide groove portion50is excessively formed exceeding the maximum formation ratio of 40% in any one side around the chip30or the spacer40, the overflow of the solder in the horizontal direction is restrained and the solder is confined in each groove. Accordingly, the solder generated during the soldering process overflows in the vertical direction along the chip30or the spacer40, so that the electrical short circuit between the upper substrate10and the lower substrate20occurs by the solder. Therefore, in the guide groove portion50, by forming the plurality of grooves to be formed around each side of the chip30within the maximum formation ratio of 40%, the overflow of the solder in the vertical direction is restrained.

In addition, the guide groove portion50may be formed such that a diameter of each groove is set to be equal to or less than a maximum diameter. Here, the maximum diameter may be set to 15 mm. That is, when the diameter of each groove that forms the guide groove portion50is excessively large, an exposed portion of the insulator A3is increased when the guide groove portion50is formed in the upper substrate10and the lower substrate20. Therefore, in the guide groove portion50, the diameter of each groove is limited to be equal to or less than 15 mm so that the exposure of the insulator A3is minimized, thereby solving a problem of durability occurring according to the high temperature operating condition due to the exposure of the insulator A3or according to the thermal stress concentrated mainly on the portion where the insulator A3is exposed under the severe condition.

Meanwhile, the guide groove portion50may be formed such that the plurality of grooves is formed in a circular shape so that the solder is filled inside the plurality of grooves during the soldering process. As such, since each groove that forms the guide groove portion50is formed in the circular shape, the solder may be stably filled without gaps in each groove. Further, as the solder is filled in the same shape, balancing of the solder that is filled in each groove may be easily realized.

As such, in the present disclosure, the overflow situation of the solder and the movement of the solder may be prevented when the chip30and the spacer40are bonded to each substrate by the soldering process, so that bonding quality between the components through the soldering process is increased. That is, by controlling the shape, the number, and the position of the guide groove portion50that is formed in the upper substrate10and the lower substrate20around the chip30and the spacer40, when the power module according to the present disclosure is manufactured, the overflow of the solder in the vertical direction is restrained and the electrical short circuit caused by a solder bridge is prevented.

In addition, since the guide groove portion50is formed in each vertex on which the thermal stress is concentrated, the stress may be relieved and reliability may be increased. In addition, during the soldering process, the exposure of the insulator A3is minimized, so that the separation and the destruction of the insulator A3under a test of high durability or a severe operating condition are restrained.

Accordingly, in the present disclosure, by limiting the position, the distance, the size, and so on of the guide groove portion50, the area of each metal layer required for a heat dissipation and an electrical connection between the upper substrate10and the lower substrate20may be secured, so that thermal performance and electrical performance are secured since the loss of the area is minimized.

Although exemplary embodiments of the present disclosure have been described herein, it is understood that the present disclosure should not be limited to these exemplary embodiments and that various changes and modifications can be made by one ordinary skilled in the art within the spirit and scope of the present disclosure.