Patent ID: 12224784

DETAILED DESCRIPTION OF THE EXEMPLARY EMBODIMENTS

The present disclosure is more particularly described in the following examples that are intended as illustrative only since numerous modifications and variations therein will be apparent to those skilled in the art. Like numbers in the drawings indicate like components throughout the views. As used in the description herein and throughout the claims that follow, unless the context clearly dictates otherwise, the meaning of “a”, “an”, and “the” includes plural reference, and the meaning of “in” includes “in” and “on”. Titles or subtitles can be used herein for the convenience of a reader, which shall have no influence on the scope of the present disclosure.

The terms used herein generally have their ordinary meanings in the art. In the case of conflict, the present document, including any definitions given herein, will prevail. The same thing can be expressed in more than one way. Alternative language and synonyms can be used for any term(s) discussed herein, and no special significance is to be placed upon whether a term is elaborated or discussed herein. A recital of one or more synonyms does not exclude the use of other synonyms. The use of examples anywhere in this specification including examples of any terms is illustrative only, and in no way limits the scope and meaning of the present disclosure or of any exemplified term. Likewise, the present disclosure is not limited to various embodiments given herein. Numbering terms such as “first”, “second” or “third” can be used to describe various components, signals or the like, which are for distinguishing one component/signal from another one only, and are not intended to, nor should be construed to impose any substantive limitations on the components, signals or the like. In addition, in this document, the term “connected” can be used to indicate that two or more elements make physical or electrical contact with each other directly, or make physical or electrical contact with each other indirectly, and can also be used to indicate that two or more elements cooperate or interact with each other.

First Embodiment

FIG.1is a circuit layout diagram of a signal adjusting circuit according to a first embodiment of the present disclosure.

Referring toFIG.1, the first embodiment of the present disclosure provides a signal adjusting circuit10adapted to a peak detector12. The signal adjusting circuit10includes a first amplifier100and a first feedback circuit102.

The first amplifier100has a first input terminal (a positive (+) terminal on the left), a second input terminal (a negative (−) terminal on the left), a first output terminal (a negative (−) terminal on the right), and a second output terminal (a positive (+) terminal on the right). The first input terminal receives a first input signal Sin1, and the first amplifier100is configured to amplify the first input signal Sin1and output a first output signal Sout1from the first output terminal.

The first feedback circuit102includes a capacitor C1, a resistor R1, and a resistor R2. The capacitor C1is connected between the first input terminal and the first output terminal. One end of the resistor R1is connected to the first input terminal, and another end of the resistor R1is connected to a first output node N1. The resistor R2is connected between the first output node N1and the first output terminal. The first feedback circuit102is configured to determine a first gain of the first output signal Sout1.

In the present embodiment, the signal adjusting circuit10can be used as a half circuit of a transimpedance amplifier (TIA), and can be connected between a frequency mixer14and a receiving end filter16. The TIA is suitable for a differential transmission scheme, and thus further includes another half circuit that has a circuit structure symmetrical to the signal adjusting circuit10. Therefore, it is obvious that the first input terminal is connected to the frequency mixer14to receive the first input signal Sin1, and the first output terminal is connected to the receiving end filter16to output the first output signal Sout1.

In addition, the peak detector12is connected to the first output node N1to receive a first detection signal Sd1and detect a peak value of the first detection signal Sd1. It should be noted that the peak detector12can convert an AC signal into a DC voltage level, and then transmit the DC voltage level to a comparator circuit for comparison. Therefore, in response to the first detection signal Sd1exceeding a preset voltage value, the comparator circuit can output a high level signal for detecting whether the first detection signal Sd1is within a predetermined power input range. The resistor R1and the resistor R2can be designed to have a first predetermined ratio, so as to match an overall gain of the TIA (i.e., the aforementioned first gain) and select an appropriate intermediate gain. Accordingly, an appropriate first detection signal Sd1can be provided to the peak detector12. In other words, resistance values of the resistor R1and the resistor R2that have the first predetermined ratio can enable the first detection signal Sd1to have a second gain relative to the first input signal Sin1and to be within the predetermined power input range of the peak detector12.

In addition, it should be noted that the first gain (hereinafter referred to as Gain1) is determined according to an equivalent impedance (hereinafter referred to as Rmix) of a front-end circuit that includes the frequency mixer14, and the resistance values of the resistors R1and R2.

An example illustrating how the resistance values of the resistors R1and R2are determined will be provided below.

In a case where a peak detector is to be set at an output terminal of the TIA, a predetermined power input range of the peak detector is +10 dBm, and the overall gain (Gain1) of the TIA is 28 dB, it is necessary to equivalently provide the first detection signal Sd1with a second gain (hereinafter referred to as Gain2) of 18 dB at the first output node N1.

Therefore, selecting an appropriate ratio of the resistors R1and R2to satisfy the following equations (1) and (2) is required:

Gain⁢1=R⁢1+R⁢2Rmix;equation⁢(1)Gain⁢2=18⁢dB=20*log⁡(R⁢1Rmix);equation⁢(2)

Assuming that the equivalent impedance Rmix observed from the TIA to a side of the frequency mixer14is 400 Ohm, the resistance values of the resistors R1and R2can be obtained from the following equations (3)-(5):

R⁢1+R⁢2=10(2820)*Rmix=10.048kOhm;equation⁢(3)R⁢1=10(1820)*Rmix=3.177kOhm;equation⁢(4)R⁢2=10.048-3.177=6.871kOhm.equation⁢(5)

It can be observed from the above equations that the signal adjusting circuit10provided by the present disclosure can design the resistance values of the resistors R1and R2for the TIA, such that the first detection signal Sd1can be provided with an appropriate second gain relative to the first input signal Sin1, and can be within the predetermined power input range of the peak detector12.

FIG.2Ais another circuit layout diagram of the signal adjusting circuit according to the first embodiment of the present disclosure, andFIG.2Bis yet another circuit layout diagram of the signal adjusting circuit according to the first embodiment of the present disclosure.

In the embodiment ofFIG.2A, the resistor R1can be replaced with a variable resistor R1′, and the resistor R2can be replaced with a variable resistor R2′. The signal adjusting circuit10further includes a control circuit104, which is configured to control the first gain and the second gain by controlling resistance values of the first variable resistor R1′ and the second variable resistor R2′, such that the first detection signal Sd1remains within the predetermined power input range in response to the first output signal Sout1being changed.

In addition, as shown inFIG.2B, the variable resistor R1′ includes switches S1, S2and resistors R11, R12with different resistance values, and the switches S1, S2are respectively connected in series with the resistors R11, R12. Similarly, the variable resistor R2′ includes switches S3and S4and resistors R21and R22with different resistance values, and the switches S3and S4are respectively connected in series with the resistors R21and R22.

In this embodiment, the control circuit104is configured to control the switches S1, S2, S3, and S4to be turned on or off, so as to determine the first gain and the second gain.

For example, if the TIA can switch to have different overall gains (i.e., first gains), appropriate resistance values of the resistors R1and R2can be designed to be adapted to the same peak detector12. In other words, the first detection signal Sd1can be within the same predetermined power input range, and there is no need to use different peak detectors12or to add additional preamplifiers or attenuators.

The following example is made with reference to the signal adjusting circuit ofFIGS.2A and2B.

In a case where the peak detector is to be set at the output terminal of the TIA, the predetermined power input range of the peak detector is +10 dBm, and the overall gain (Gain1) of the TIA can be switched between 28 dB and 22 dB, it is necessary to equivalently provide the first detection signal Sd1with second gains (hereinafter referred to as Gain2) of 18 dB and 12 dB at the first output node N1.

Based on the above conditions, the resistance values of the resistors R1and R2that need to be used in response to the second gain being 18 dB and 12 dB can be calculated according to the above equations (1)-(5). Then, the resistance values of the resistors R1and R2that need to be used can be controlled by the control circuit104, such that the second gain can be correspondingly adjusted after the first output signal Sout1is changed due to gain adjustment, thereby providing the first detection signal Sd1that is still within the predetermined power input range. Therefore, there is no need to use a different peak detector12or to add an additional preamplifier or attenuator.

Second Embodiment

FIG.3is a circuit layout diagram showing the signal adjusting circuit being applied to a receiving end circuit according to a second embodiment of the present disclosure.

Referring toFIG.3, the second embodiment of the present disclosure provides a signal adjusting circuit30, which is adapted to a peak detector32. The signal adjusting circuit30includes a first amplifier300and a first feedback circuit302, and the first feedback circuit302includes a capacitor C1, and resistors R1and R2. It should be noted that a structure of the signal adjusting circuit30is basically the same as that of the signal adjusting circuit10inFIG.1, details of which will not be reiterated herein.

The difference is that the signal adjusting circuit30ofFIG.3further includes a resistor R3. One end of the resistor R3is used for receiving a first input signal Sin1′, and another end of the resistor R3is connected to a first input terminal (a positive (+) terminal on the left) of the first amplifier300.

It should be noted that the signal adjusting circuit30of the present embodiment is applied to the receiving end circuit3. The receiving end circuit3also includes an antenna31, the peak detector32, a low noise amplifier (LNA)33, a frequency mixer34, a transimpedance amplifier35, and an analog-to-digital converter (ADC)36. The signal adjusting circuit30can be, for example, a half circuit of a receiving end baseband filter (Rx baseband filter), and is connected between the transimpedance amplifier35and the ADC36. Similarly, in order to be adapted to the differential transmission scheme, the receiving end baseband filter also includes another half circuit that has a circuit structure symmetrical to the signal adjusting circuit30.

In this embodiment, an overall gain (first gain Gain1) of the receiving end baseband filter is determined according to resistance values of the resistors R1, R2, and R3, as shown in the following equation (6):

Gain⁢1=R⁢1+R⁢2R⁢3.equation⁢(6)

In addition, it should be noted that the resistors R1and R2in this embodiment can be similar to what is shown inFIG.2A(in which the control circuit is utilized to control the variable resistor), or can be similar to what is shown inFIG.2B(in which the control circuit is utilized to switch the switches). However, the present disclosure is not limited thereto.

An example is given below to illustrate a manner of determining the resistance values of the resistors R1and R2in the present embodiment.

In a case where a peak detector is to be set at an output terminal of the receiving end baseband filter, a predetermined power input range of the peak detector is +10 dBm, and the overall gain (Gain1) of the receiving end baseband filter is 24 dB, it is necessary to equivalently provide the first detection signal Sd1with a second gain (hereinafter referred to as Gain2) of 14 dB at the first output node N1, such that the first detection signal Sd1′ inputted to the peak detector32is 0 dBm.

Assuming that the resistance value of the resistor R3is 1 kOhm, a sum of the resistors R1and R2can be calculated by the equation (6), as shown in the following equation (7):

R⁢1+R⁢2=10(2420)*R⁢3=15.849kOhm.Equation⁢(7)

Next, it is necessary to select an appropriate ratio of the resistors R1and R2to keep the first detection signal Sd1′ of the input peak detector32to be 0 dBm, so that the peak detector set at the output terminal of the receiving end baseband filter receives a +10 dBm signal in an equivalent manner. Therefore, the resistance values of the resistors R1and R2can be obtained by the following equation (8)-(10):

Gain⁢2=R⁢1R⁢3=0-(10-24)=+14⁢dB;equation⁢(8)R⁢1=10(1420)*R⁢3=5.011k⁢Ohm;equation⁢(9)R⁢2=15.849-5.011=10.838k⁢Ohm.equation⁢(10)

It can be observed from the above equations that the signal adjusting circuit10provided by the present disclosure can be used in the receiving end circuit3, and the resistance values of the resistors R1and R2can be designed for the receiving end baseband filter, such that the first detection signal Sd1′ can be provided with an appropriate second gain relative to the first input signal Sin1, and can be within the predetermined power input range of the peak detector12.

Third Embodiment

FIG.4is a block diagram of the receiving end circuit according to a third embodiment of the present disclosure, andFIG.5is a circuit structure diagram of a transimpedance amplifier and a receiving end baseband filter of the receiving end circuit according to the third embodiment of the present disclosure.

Referring toFIG.4, the third embodiment of the present disclosure provides a receiving end circuit4, which includes an antenna41, peak detectors421,422,423,424, an LNA43, a frequency mixer44, a transimpedance amplifier45, a receiving end baseband filter46, an ADC47, and an automatic gain control circuit48.

As shown inFIG.5, a half circuit of the transimpedance amplifier45is connected to the frequency mixer44, and a half circuit of the receiving end baseband filter46is connected to the half circuit of the transimpedance amplifier45. Similarly, in order to be adapted to the differential transmission scheme, the transimpedance amplifier45and the receiving end baseband filter462each include another half circuit that has a symmetrical circuit structure.

The transimpedance amplifier45includes the signal adjusting circuit mentioned in the foregoing embodiments (such as the signal adjusting circuit10ofFIG.2A), which includes an amplifier450, a feedback circuit452, and a control circuit454. The amplifier450is configured to amplify a first input signal Sin1″ and output a first output signal Sout1″. The feedback circuit452includes a capacitor C1″, and variable resistors R1″ and R2″. The amplifier450and the feedback circuit452are the same as the circuit structure ofFIG.2A, details of which will not be reiterated herein.

The control circuit454is configured to control the variable resistors R1″ and R2″, so as to determine a first gain of the first output signal Sout1″ relative to the first input signal Sin1″, and a second gain of a first detection signal Sd1″ relative to the first input signal Sin1″. The peak detector421is connected to the first output node N1to receive the first detection signal Sd1″, and the peak detector421has a first predetermined power input range and is configured to detect a peak value of the first detection signal Sd1″. Similarly, the control circuit454controls resistance values of the variable resistors R1″ and R2″ to have a first predetermined ratio, such that the first detection signal Sd1″ is within the first predetermined power input range.

The receiving end baseband filter46includes a second signal adjusting circuit, which includes a resistor R5″, an amplifier460, and a feedback circuit462. The resistor R5″ has one end connected to a first input terminal of the amplifier460. The amplifier460is configured to amplify the first output signal Sout1″ and output a second output signal Sout2. The feedback circuit462includes a capacitor C2″, and variable resistors R3″ and R4″. The amplifier460and the feedback circuit462are the same as the circuit structure ofFIG.2A, details of which are not reiterated herein.

A control circuit464is configured to control the variable resistors R3″ and R4″, so as to determine a third gain of the second output signal Sout2relative to the first output signal Sout1″, and a fourth gain of a second detection signal Sd2″ relative to the first output signal Sout1″. The peak detector423is connected to a second output node N2to receive the second detection signal Sd2″, and the peak detector423has a second predetermined power input range and is configured to detect a peak value of the second detection signal Sd2″. Similarly, the control circuit464controls the resistance values of the variable resistors R3″ and R4″ to have a second predetermined ratio, such that the second detection signal Sd2″ is within the second predetermined power input range. In another embodiment, the control circuit454and the control circuit464can be integrated in one control circuit to control the resistance values of the variable resistors R1″, R2″, R3″ and R4″, but the present disclosure is not limited thereto.

In the receiving end circuit4, the LNA43is gain-adjustable. The LNA43receives and amplifies received signals from the antenna, and provides and inputs receiving end signals to the frequency mixer44. The frequency mixer44is connected to the LNA43and the transimpedance amplifier45, so as to perform a mixing process on the receiving end signal and provide the first input signal Sin1″ with reduced frequency to the transimpedance amplifier45. The ADC is connected to the receiving end baseband filter46to receive the second output signal Sout2, and converts the second output signal Sout2to generate a digital signal.

The automatic gain control circuit48of the receiving end circuit4is connected to the control circuits454,464, the peak detectors421,422,423,424, and the LNA43, and is configured to control the control circuits454,464and LNA43according to detection results of the peak detectors421,422,423,424.

In more detail, in this embodiment, the peak detectors421,422,423, and424are, for example, 1-bit peak detectors, which only output high and low levels to represent the detection results. In the present embodiment, the peak detectors421and423are designed to detect output powers of +10 dBm of the transimpedance amplifier45and the receiving end baseband filter. In other embodiments, the peak detector can be implemented by a multi-bit peak detector, but the present disclosure is not limited thereto.

In this embodiment, when the detection results of the peak detectors421and423are both at a high level, it means that the gains of the signals are too large and need to be adjusted with a greater level. For example, the gain automatic control circuit48can be configured to adjust overall gains of the LNA43and the receiving end baseband filter46in response to receiving the detection results. How the overall gain of the receiving end baseband filter46can be adjusted is already described in the above-mentioned embodiment, and will not be reiterated herein.

When the detection result of the peak detector421is at a high level and the detection result of the peak detector423is at a low level, it means that coexistence interference may occur at this time and there is a larger out-of-band spur. Then, in response to obtaining such detection results, the gain automatic control circuit48can be configured to correspondingly reduce the overall gain of the LNA43and the transimpedance amplifier45. How the overall gain of the transimpedance amplifier45can be adjusted is already described in the above-mentioned embodiment, will not be reiterated herein.

When the detection result of the peak detector421is at a low level and the detection result of the peak detector423is at a high level, or when the detection results of the peak detectors421and423are both at a low level, it means that the overall gain of the receiving end baseband filter46needs to be fine-tuned, so as to adjust an output power of the receiving end baseband filter46to be within a proper range.

Furthermore, if more peak detectors are provided (e.g., the peak detectors422and424ofFIG.5), the gain can be adjusted more accurately according to the detection results. For example, in response to the peak detector422outputting the high level, an input power of the LNA is suggested to be larger than a specific power. In addition, based on information of the peak detectors422and424, it can be determined at which power level the input power of the LNA43is. In this way, the gain automatic adjusting circuit48can control the control circuits454,464and the LNA43to quickly switch to a suitable gain.

Beneficial Effects of the Embodiments

In conclusion, the signal adjusting circuit and the receiving end circuit using the same provided by the present disclosure can cooperate with the transimpedance amplifier or a baseband filter in the receiving end circuit, and can be adapted to a receiving end peak detector without an area increase and use of an additional attenuator or preamplifier. In this way, mismatches caused by use of the above-mentioned additional components can be reduced.

The foregoing description of the exemplary embodiments of the disclosure has been presented only for the purposes of illustration and description and is not intended to be exhaustive or to limit the disclosure to the precise forms disclosed. Many modifications and variations are possible in light of the above teaching.

The embodiments were chosen and described in order to explain the principles of the disclosure and their practical application so as to enable others skilled in the art to utilize the disclosure and various embodiments and with various modifications as are suited to the particular use contemplated. Alternative embodiments will become apparent to those skilled in the art to which the present disclosure pertains without departing from its spirit and scope.