Patent ID: 12191838

Throughout this description, elements appearing in figures are assigned three-digit or four-digit reference designators, where the two least significant digits are specific to the element and the one or two most significant digit is the figure number where the element is first introduced. An element that is not described in conjunction with a figure may be presumed to have the same characteristics and function as a previously-described element having the same reference designator.

DETAILED DESCRIPTION

Description of Apparatus

FIG.1shows a simplified schematic top view and orthogonal cross-sectional views of a transversely-excited film bulk acoustic resonator (XBAR)100as described in application Ser. No. 16/230,443, TRANSVERSELY-EXCITED FILM BULK ACOUSTIC RESONATOR. XBAR resonators such as the resonator100may be used in a variety of RF filters including band-reject filters, band-pass filters, duplexers, and multiplexers. XBARs are particularly suited for use in filters for communications bands with frequencies above 3 GHz.

The XBAR100is made up of a thin film conductor pattern formed on a surface of a piezoelectric plate110having parallel front and back surfaces112,114, respectively. The piezoelectric plate is a thin single-crystal layer of a piezoelectric material such as lithium niobate, lithium tantalate, lanthanum gallium silicate, gallium nitride, or aluminum nitride. The piezoelectric plate is cut such that the orientation of the X, Y, and Z crystalline axes with respect to the front and back surfaces is known and consistent. XBARs may be fabricated on piezoelectric plates with various crystallographic orientations including Z-cut, rotated Z-cut, and rotated YX-cut.

The back surface114of the piezoelectric plate110is attached to a substrate120that provides mechanical support to the piezoelectric plate110. The substrate120may be, for example, silicon, sapphire, quartz, or some other material. The piezoelectric plate110may be bonded to the substrate120using a wafer bonding process, or grown on the substrate120, or attached to the substrate in some other manner. The piezoelectric plate may be attached directly to the substrate or may be attached to the substrate via one or more intermediate material layers.

The conductor pattern of the XBAR100includes an interdigital transducer (IDT)130. The IDT130includes a first plurality of parallel fingers, such as finger136, extending from a first busbar132and a second plurality of fingers extending from a second busbar134. The first and second pluralities of parallel fingers are interleaved. The interleaved fingers overlap for a distance AP, commonly referred to as the “aperture” of the IDT. The center-to-center distance L between the outermost fingers of the IDT130is the “length” of the IDT.

The first and second busbars132,134serve as the terminals of the XBAR100. A radio frequency or microwave signal applied between the two busbars132,134of the IDT130excites an acoustic wave within the piezoelectric plate110. As will be discussed in further detail, the excited acoustic wave is a bulk shear wave that propagates in a direction substantially normal to the surface of the piezoelectric plate110, which is also normal, or transverse, to the direction of the electric field created by the IDT fingers. Thus, the XBAR is considered a transversely-excited film bulk wave resonator.

A cavity140is formed in the substrate120such that the portion115of the piezoelectric plate110containing the IDT130is suspended over the cavity140without contacting the substrate120. “Cavity” has its conventional meaning of “an empty space within a solid body.” The cavity140may be a hole completely through the substrate120(as shown in Section A-A and Section B-B) or a recess in the substrate120. The cavity140may be formed, for example, by selective etching of the substrate120before or after the piezoelectric plate110and the substrate120are attached. As shown inFIG.1, the cavity145has a rectangular perimeter145with an extent greater than the aperture AP and length L of the IDT130. The perimeter of the cavity of an XBAR may have a different shape, such as a regular or irregular polygon. The cavity of an XBAR may more or fewer than four sides, which may be straight or curved.

For ease of presentation inFIG.1, the geometric pitch and width of the IDT fingers is greatly exaggerated with respect to the length (dimension L) and aperture (dimension AP) of the XBAR. A typical XBAR has more than ten parallel fingers in the IDT110. An XBAR may have hundreds, possibly thousands, of parallel fingers in the IDT110. Similarly, the thickness of the fingers in the cross-sectional views is greatly exaggerated.

FIG.2shows a simplified schematic top view and an orthogonal cross-sectional view of a solidly-mounted transversely-excited film bulk acoustic resonator (SM XBAR)200. SM XBAR resonators such as the resonator200may be used in a variety of RF filters including band-reject filters, band-pass filters, duplexers, and multiplexers. SM XBARs are particularly suited for use in filters for communications bands with frequencies above3GHz.

The SM XBAR200is made up of a thin film conductor pattern formed on a front surface212of a piezoelectric plate210having parallel front and back surfaces212,214, respectively. The piezoelectric plate is a thin single-crystal layer of a piezoelectric material such as lithium niobate, lithium tantalate, lanthanum gallium silicate, gallium nitride, or aluminum nitride. The piezoelectric plate is cut such that the orientation of the X, Y, and Z crystalline axes with respect to the front and back surfaces is known and consistent. SM XBARs may be fabricated on piezoelectric plates with various crystallographic orientations as previously described.

The back surface214of the piezoelectric plate210is attached to, and mechanically supported by, a substrate220. The substrate220may be, for example, silicon, sapphire, quartz, or some other material. As will be described subsequently, the piezoelectric plate210may be attached to the substrate220via a plurality of intermediate material layers.

The conductor pattern of the SM XBAR200includes an interdigital transducer (IDT)230. The IDT230includes a first plurality of parallel fingers, such as finger236, extending from a first busbar232and a second plurality of fingers extending from a second busbar234. The first and second pluralities of parallel fingers are interleaved. The interleaved fingers overlap for a distance AP, commonly referred to as the “aperture” of the IDT. The center-to-center distance L between the outermost fingers of the IDT230is the “length” of the IDT.

The first and second busbars232,234serve as the terminals of the SM XBAR200. A radio frequency or microwave signal applied between the two busbars232,234of the IDT230excites an acoustic wave within the piezoelectric plate210. As will be discussed in further detail, the primary excited acoustic wave is a bulk shear wave that propagates in a direction substantially normal to the surface of the piezoelectric plate210, which is also normal, or transverse, to the direction of the electric field created by the IDT fingers. Thus, the SM XBAR is considered a transversely-excited film bulk wave resonator.

For ease of presentation inFIG.2, the geometric pitch and width of the IDT fingers are greatly exaggerated with respect to the length (dimension L) and aperture (dimension AP) of the SM XBAR. A typical SM XBAR has more than ten parallel fingers in the IDT210. An SM XBAR may have hundreds, possibly thousands, of parallel fingers in the IDT210. Similarly, the thickness of the fingers in the cross-sectional views is greatly exaggerated.

FIG.3shows a detailed schematic cross-sectional view of the SM XBAR200. The piezoelectric plate210is a single-crystal layer of piezoelectrical material having a thickness ts. ts may be, for example, 100 nm to 1500 nm. When used in filters for LTE™ bands from 3.4 GHZ to 6 GHz (e.g. bands 42, 43, 46), the thickness ts may be, for example, 200 nm to 500 nm.

A front-side dielectric layer314may optionally be formed on the front surface212of the piezoelectric plate210. The front-side dielectric layer314has a thickness tfd. The front-side dielectric layer314may be formed between the IDT fingers236. Although not shown inFIG.2, the front side dielectric layer314may also be deposited over the IDT fingers236. The front-side dielectric layer314may be a non-piezoelectric dielectric material, such as silicon dioxide or silicon nitride. tfd may be, for example, 0 to 500 nm.

The IDT fingers238may be aluminum or a substantially aluminum alloy, copper or a substantially copper alloy, beryllium, gold, molybdenum, or some other conductive material. Thin (relative to the total thickness of the conductors) layers of other metals, such as chromium or titanium, may be formed under and/or over the fingers to improve adhesion between the fingers and the piezoelectric plate210and/or to passivate or encapsulate the fingers. The busbars (232,234inFIG.2) of the IDT may be made of the same or different materials as the fingers.

Dimension p is the center-to-center spacing or “pitch” of the IDT fingers, which may be referred to as the pitch of the IDT and/or the pitch of the SM XBAR. Dimension w is the width or “mark” of the IDT fingers. The IDT of an SM XBAR differs substantially from the IDTs used in surface acoustic wave (SAW) resonators. In a SAW resonator, the pitch of the IDT is one-half of the acoustic wavelength at the resonance frequency. Additionally, the mark-to-pitch ratio of a SAW resonator IDT is typically close to 0.5 (i.e. the mark or finger width w is about one-fourth of the acoustic wavelength at resonance). In an SM XBAR, the pitch p of the IDT is typically 2 to 20 times the width w of the fingers. In addition, the pitch p of the IDT is typically 2 to 20 times the thickness is of the piezoelectric slab212. The width of the IDT fingers in an SM XBAR is not constrained to one-fourth of the acoustic wavelength at resonance. For example, the width of SM XBAR IDT fingers may be 500 nm or greater, such that the IDT can be fabricated using optical lithography. The thickness tm of the IDT fingers may be from 100 nm to about equal to the width w. The thickness of the busbars (132,134inFIG.1) of the IDT may be the same as, or greater than, the thickness tm of the IDT fingers.

An acoustic Bragg reflector340is sandwiched between a surface222of the substrate220and the back surface214of the piezoelectric plate110. The term “sandwiched” means the acoustic Bragg reflector340is both disposed between and physically connected to a surface222of the substrate220and the back surface214of the piezoelectric plate210. In some circumstances, thin layers of additional materials may be disposed between the acoustic Bragg reflector340and the surface222of the substrate220and/or between the Bragg reflector340and the back surface214of the piezoelectric plate210. Such additional material layers may be present, for example, to facilitate bonding the piezoelectric plate210, the acoustic Bragg reflector340, and the substrate220.

The acoustic Bragg reflector340includes multiple layers that alternate between materials having high acoustic impedance and materials have low acoustic impedance. “High” and “low” are relative terms. For each layer, the standard for comparison is the adjacent layers. Each “high” acoustic impedance layer has an acoustic impedance higher than that of both the adjacent low acoustic impedance layers. Each “low” acoustic impedance layer has an acoustic impedance lower than that of both the adjacent high acoustic impedance layers. Each of the layers has a thickness equal to, or about, one-fourth of the acoustic wavelength at or near a resonance frequency of the SM XBAR200. Materials having comparatively low acoustic impedance include silicon dioxide, silicon oxycarbide, aluminum, and certain plastics such as cross-linked polyphenylene polymers. Materials having comparatively high acoustic impedance include silicon nitride, aluminum nitride, hafnium oxide, silicon carbide, diamond, diamond-like carbon, and metals such as molybdenum, tungsten, gold, and platinum. All of the high acoustic impedance layers of the acoustic Bragg reflector340are not necessarily the same material, and all of the low acoustic impedance layers are not necessarily the same material. In the example ofFIG.2, the acoustic Bragg reflector340has a total of six layers. An acoustic Bragg reflector may have more than, or less than, six layers.

FIG.4is a graphical illustration of the primary acoustic mode in a SM XBAR400.FIG.4shows a small portion of the SM XBAR400including a piezoelectric plate410and three interleaved IDT fingers430. For example, the piezoelectric plate410may be single-crystal lithium niobate cut such that the z-axis is normal to the surfaces of the plate. The IDT fingers may be oriented parallel to the x-axis of the plate such that the y-axis is normal to the fingers.

An RF voltage applied to the interleaved fingers430creates a time-varying electric field between the fingers. The direction of the electric field is lateral, or parallel to the surface of the piezoelectric plate410, and orthogonal to the length of the IDT fingers, as indicated by the dashed arrows labeled “electric field”. Due to the high dielectric constant of the piezoelectric plate, the electric field is highly concentrated in the plate relative to the air. The lateral electric field introduces shear deformation, and thus strongly excites shear-mode acoustic waves, in the piezoelectric plate410. In this context, “shear deformation” is defined as deformation in which parallel planes in a material remain parallel and maintain a constant distance while translating relative to each other. “Shear acoustic waves” are defined as acoustic waves in a medium that result in shear deformation of the medium. The shear deformations in the piezoelectric plate410are represented by the curves460, with the adjacent small arrows providing a schematic indication of the direction and magnitude of atomic motion. The degree of atomic motion, as well as the thickness of the piezoelectric plate410, have been greatly exaggerated for ease of visualization. While the atomic motions are predominantly lateral (i.e. horizontal as shown inFIG.4), the direction of acoustic energy flow of the primary shear acoustic mode is substantially orthogonal to the surface of the piezoelectric plate, as indicated by the arrow465.

An acoustic Bragg reflector440is sandwiched between the piezoelectric plate410and a substrate420. The acoustic Bragg reflector440reflects the shear acoustic waves to keep the acoustic energy (arrow465) predominantly confined to the piezoelectric plate410. As previously described, the acoustic Bragg reflector440consists of alternating layers of materials having relatively high and relatively low acoustic impedance, with each layer having a thickness of about one-quarter of the wavelength of the shear acoustic waves (arrow465) at resonance frequency of the SM XBAR400. In the example ofFIG.4, the acoustic Bragg reflector440has a total of six layers. An acoustic Bragg reflector may have more than, or less than, six layers. The acoustic Bragg reflector440may be configured (e.g. by selecting the materials and number of layers) to reflect the primary shear acoustic mode over a frequency range including a resonance frequency and an anti-resonance frequency of the SM XBAR400.

FIG.5is a schematic circuit diagram for a high frequency band-pass filter500using SM XBARs. The filter500has a conventional ladder filter architecture including three series resonators510A,510B,510C and two shunt resonators520A,520B. The three series resonators510A,510B, and510C are connected in series between a first port and a second port. InFIG.5, the first and second ports are labeled “In” and “Out”, respectively. However, the filter500is symmetrical and either port may serve as the input or output of the filter. The two shunt resonators520A,520B are connected from nodes between the series resonators to ground. All the shunt resonators and series resonators are SM XBARs.

The filter500may include a substrate having a surface, a single-crystal piezoelectric plate having parallel front and back surfaces, and an acoustic Bragg reflector sandwiched between the surface of the substrate and the back surface of the single-crystal piezoelectric plate. The substrate, acoustic Bragg reflector, and single-crystal plates are represented by the rectangle510inFIG.5. A conductor pattern formed on the front surface of the single-crystal piezoelectric plate includes interdigital transducers (IDTs) for each of the three series resonators510A,510B,510C and two shunt resonators520A,520B. All of the IDTs are configured to excite shear acoustic waves in the single-crystal piezoelectric plate in response to respective radio frequency signals applied to each IDT.

In a ladder filter, such as the filter500, the resonance frequencies of shunt resonators are typically lower than the resonance frequencies of series resonators. The resonance frequency of an SM XBAR resonator is determined, in small part, by IDT pitch. IDT pitch also impacts other filter parameters including impedance and power handling capability. For broad-band filter applications, it may not be practical to provide the required difference between the resonance frequencies of shunt and series resonators using only differences in IDT pitch.

To reduce the resonance frequencies of some or all of the shunt resonators relative to the series resonators, a first dielectric layer (represented by the dashed rectangle525) having a first thickness t1 may be deposited over the IDTs of one or both of the shunt resonators520A,520B. A second dielectric layer (represented by the dashed rectangle515) having a second thickness t2, less than t1, may be deposited over the IDTs of the series resonators510A,510B,510C. The thickness of each of the first and second dielectric layers may be between 0 and 300 nm, such that 0≤t2<t1≤300 nm. The use of two different dielectric layer thicknesses may be appropriate in situations where a shift of at least 100 MHz is required between the resonance frequencies of series and shunt resonators. When the dielectric layers are silicon dioxide, t1−t2≥25 nm is sufficient to cause a shift of at least 100 MHz between the resonance frequencies of series and shunt resonators.

FIG.6is an exploded schematic cross-sectional view of a packaged SM XBAR filter600. More specifically,FIG.6shows schematic cross-sectional views of an SM XBAR filter chip605and an interposer650prior to bonding.

The SM XBAR filter chip605includes a piezoelectric plate610attached to a substrate620with an acoustic Bragg reflector640sandwiched between the piezoelectric plate610and the substrate620. The piezoelectric plate610may be lithium niobate, lithium tantalate, or some other material. The substrate620may be silicon or some other material. A first conductor pattern is formed on the surface of the piezoelectric plate610. The first conductor pattern has a first level that includes IDTs with interleaved IDT fingers, such as fingers630. The first level of the first conductor pattern may be aluminum, copper, molybdenum, or some other metal with a thickness of about 100 nm to 1000 nm.

The first conductor pattern includes a second level formed on the surface of the piezoelectric plate610. The second level, which may overlay portions of the first level, may be gold, aluminum, copper or some other metal. The second level includes a continuous conductor662around the perimeter of the SM XBAR filter chip605. The second level also includes contact pads, such as contact pad672, in locations where portions of the first conductor pattern must be connected to circuitry external to the packaged SM XBAR filter.

The interposer650includes a base652, which may be high resistivity silicon or some other material. The base652may have recesses655so that the surfaces of the base652facing the IDT fingers630on the SM XBAR filter chip605(i.e. the bottoms of the recesses655) are sufficiently far from the IDT fingers. A second conductor pattern is formed on the surface of the base652facing the SM XBAR filter chip605. The second conductor pattern may be the same material as the second level of the first conductor pattern. The second conductor pattern includes a continuous conductor664around the perimeter of the base652. The second conductor pattern also includes contact pads, such as contact pad674, in locations where portions of the first conductor pattern must be connected to circuitry external to the packaged SM XBAR filter. The arrangement of the continuous conductor664and the pads674of the second conductor pattern is typically a mirror image of the arrangement of the continuous conductor662and pads672of the first conductor pattern.

The interposer650also includes vias such as via676. When the base652is silicon, such vias are commonly referred to as “through silicon vias” (TSVs). Vias consist of a metal-coated or metal-filled hole through the base652. Each via provides an electrical connection between one of the contact pads, such as pad674, of the second conductor pattern and a corresponding pad on the external surface (i.e. the lower surface as shown in the figure) of the interposer650. WhileFIG.6, which is intended to illustrate the structure of the packaged SM XBAR filter600, shows the TSVs formed prior to bonding the SM XBAR filter chip605and the interposer650, the vias may be formed after bonding.

FIG.7is a schematic cross-sectional view of the packaged SM XBAR filter600after the SM XBAR filter chip605and the interposer650ofFIG.6are bonded to each other. Descriptions of all of the identified elements inFIG.7were previously provided in the discussion ofFIG.6and will not be repeated.

As shown inFIG.7, the continuous conductor662around the perimeter of the SM XBAR filter chip605has been directly bonded to the continuous conductor664around the perimeter of the interposer650to create a hermetic seal around the perimeter of the packaged SM XBAR filter600. In this context, the term “directly bonded” means bonded without any intervening adhesive. Simultaneously, the pads, such as pad672, of the first conductor pattern have been directly bonded to the pads, such as pad674, of the second conductor pattern to create electrical connections between the SM XBAR filter chip605and the interposer650. The bonds between the continuous conductors and pads of the first and second conductor patterns may be accomplished by, for example, thermo-compression bonding or ultrasonic bonding.

FIG.8is a schematic cross-sectional view of a packaged SM XBAR filter800including an SM XBAR filter chip805bonded to an interposer850. With the exception of element868, the identified elements inFIG.8have the structure and function as the corresponding elements ofFIG.6andFIG.7. Descriptions of these elements will not be repeated.

In the packaged SM XBAR filter800, a perimeter seal between the SM XBAR filter chip805and the interposer850is not made by bonding continuous conductors (i.e. conductors662,664inFIG.7) around the perimeter of the SM XBAR filter chip and the interposer. Instead, a band of cured adhesive material868forms a perimeter seal between the SM XBAR filter chip805and the interposer850. The cured adhesive material868may be, for example, an epoxy resin or other thermosetting adhesive. The adhesive material (in an uncured state) may be applied to either or both of the piezoelectric plate810and the base852before the piezoelectric plate810and the base852are assembled. The adhesive material may be cured after or concurrent with bonding the pads872to the pads874.

The SM XBAR filter chips605and805shown inFIG.6,FIG.7, andFIG.8may be portions of large wafers containing many filter chips. Similarly, the interposers650and850may be portions of large wafers containing a corresponding number of interposers. An SM XBAR wafer and an interposer wafer may be bonded and individual packaged SM XBAR filters may be excised from the bonded wafers.

FIG.9is a schematic cross-sectional view of another packaged SM XBAR filter900including an SM XBAR filter chip905and interposer950that may be, for example, a low temperature cofired ceramic (LTCC) or a printed circuit board (PCB). As in the previous examples, the SM XBAR filter chip905includes a piezoelectric plate910attached to a substrate920with an acoustic Bragg reflector (not identified) sandwiched between the piezoelectric plate and the substrate. The substrate920may be high resistivity silicon or some other material. A first conductor pattern is formed on the surface of the piezoelectric plate910. The conductor pattern includes IDTs with interleaved IDT fingers930and a first set of contact pads.

The interposer950may comprise layers of thin ceramic tape or other thin dielectric material, some or all of which bear printed conductors, that are assembled to form a rigid multilayer circuit board. In the example ofFIG.9, the interposer has three conductor layers974,976,978. An LTCC or PCB interposer for an SM XBAR filter may have more than three layers. The surface of the interposer950facing the SM XBAR filter chip905has a second set of contact pads facing the first set of contact pads. The availability of multiple conductor layers allows incorporation of passive components, such as inductors, into the interposer.

The interposer950may have recesses955to ensure sufficient spacing between the IDT fingers930and the surfaces of the interposer facing the IDT fingers. Such recesses may be formed, for example, by punching openings in one or more of the dielectric layers prior to assembling the layers of the interposer.

The SM XBAR filter chip905is flip-chip mounted to the interposer950. Flip-chip mounting establishes physical and electric connections between the SM XBAR filter chip905and the interposer950. As shown inFIG.9, the connections are made by means of solder balls, such as solder ball972. Alternatively, the connections can be made by thermocompression or ultrasonic bonding of gold bumps or balls on the SM XBAR filter chip905and the interposer950(not shown). A plurality of conductive balls or bumps are used to connect the pads of the first set of contact pads to corresponding pads of the second set of contact pads.

Since flip-chip mounting does not establish a seal between the SM XBAR filter chip905and the interposer950, a polymer cover960is molded or cast over the assembly to provide a near-hermetic seal.

FIG.10is a schematic cross-sectional view of another packaged SM XBAR filter1000including an SM XBAR filter chip1005and an interposer1050formed by layers built up on the surface of the SM XBAR filter chip. The SM XBAR filter chip1005is a portion of a wafer (not shown) containing multiple SM XBAR filter chips. The build-up of the interposer layers is done on all of the SM XBAR filter chips on the wafer simultaneously. Individual packaged SM XBAR filters are then excised from the wafer.

As in previous examples, the SM XBAR filter chip1005includes a piezoelectric plate1010attached to a substrate1020with an acoustic Bragg reflector (not identified) sandwiched between the piezoelectric plate and the substrate. The substrate1020may be high resistivity silicon or some other material. A conductor pattern is formed on the surface of the piezoelectric plate1010. The conductor pattern includes IDTs with interleaved IDT fingers, such as fingers1030.

The interposer1050includes at least three layers sequentially formed on the piezoelectric plate1010. Walls1052surround the IDTs of the SM XBAR devices. The thickness of the walls1052defines the distance between the IDTs and a cover layer1054that spans the walls creating an enclosed cavity1055over each IDT. Both the walls1052and the cover layer1054may be polymer materials. An interposer conductor pattern1070includes pads1072on the external surface of the cover layer1054for connection to circuitry external to the packaged SM XBAR filter. The conductor pattern1070connects the pads1072to connection points1074on the SM XBAR filter chip1005. The conductor pattern1070may be aluminum, copper, gold, or a combination of materials.

Description of Methods

FIG.11is a simplified flow chart of a method1100for making a SM XBAR chip or a filter chip incorporating SM XBARs. The method1100starts at1110with a piezoelectric plate disposed on a sacrificial substrate1102and a device substrate1104. The method1110ends at1195with a completed SM XBAR or filter. The flow chart ofFIG.11includes only major process steps. Various conventional process steps (e.g. surface preparation, cleaning, inspection, baking, annealing, monitoring, testing, etc.) may be performed before, between, after, and during the steps shown inFIG.11.

Thin plates of single-crystal piezoelectric materials bonded to a non-piezoelectric substrate are commercially available. At the time of this application, both lithium niobate and lithium tantalate plates are available bonded to various substrates including silicon, quartz, and fused silica. Thin plates of other piezoelectric materials may be available now or in the future. The thickness of the piezoelectric plate may be between 200 nm and 1000 nm. When the substrate is silicon, a layer of SiO2may be disposed between the piezoelectric plate and the substrate. The piezoelectric plate may be, for example, z-cut lithium niobate, yx-cut lithium niobate or some other material or crystal orientation. The device substrate1104may be silicon, fused silica, quartz, or some other material.

At1120, an acoustic Bragg reflector is formed by depositing alternating layers of high acoustic impedance and low acoustic impedance materials. Each of the layers has a thickness equal to or about one-fourth of the acoustic wavelength. Materials having comparatively low acoustic impedance include silicon dioxide, silicon oxycarbide, aluminum, and certain plastics such as cross-linked polyphenylene polymers. Materials having comparatively high acoustic impedance include silicon nitride, aluminum nitride, hafnium oxide, diamond, diamond-like carbon, silicon carbide, and metals such as molybdenum, tungsten, gold, and platinum. All of the high acoustic impedance layers are not necessarily the same material, and all of the low acoustic impedance layers are not necessarily the same material. The total number of layers in the acoustic Bragg reflector may be from about five to more than twenty.

At1120, all of the layers of the acoustic Bragg reflector may be deposited on either the surface of the piezoelectric plate on the sacrificial substrate1102or a surface of the device substrate1104. Alternatively, some of the layers of the acoustic Bragg reflector may be deposited on the surface of the piezoelectric plate on the sacrificial substrate1102and the remaining layers of the acoustic Bragg reflector may be deposited on a surface of the device substrate1104.

At1130, the piezoelectric plate on the sacrificial substrate1102and the device substrate1104may be bonded such that the layers of the acoustic Bragg reflector are sandwiched between the piezoelectric plate and the device substrate. The piezoelectric plate on the sacrificial substrate1102and the device substrate1104may be bonded using a wafer bonding process such as direct bonding, surface-activated or plasma-activated bonding, electrostatic bonding, or some other bonding technique. Note that, when one or more layers of the acoustic Bragg reflector are deposited on both the piezoelectric plate and the device substrate, the bonding will occur between or within layers of the acoustic Bragg reflector.

After the piezoelectric plate on the sacrificial substrate1102and the device substrate1104are bonded, the sacrificial substrate and any intervening layers are removed at1140to expose the surface of the piezoelectric plate (the surface that previously faced the sacrificial substrate). The sacrificial substrate may be removed, for example, by material-dependent wet or dry etching, polishing, or some other process.

A first conductor pattern, including IDTs of each SM XBAR and a first set of contact pads, is formed at1150by depositing and patterning one or more conductor materials on the surface of the piezoelectric plate that was exposed when the sacrificial substrate was removed at1140. The first conductor pattern may include two or more separately patterned conductor layers. A first conductor layer may be, for example, aluminum, an aluminum alloy, copper, a copper alloy, or some other conductive metal. Optionally, one or more other materials may be disposed below (i.e. between the conductor layer and the piezoelectric plate) and/or on top of the conductor layer. For example, a thin film of titanium, chrome, or other metal may be used to improve the adhesion between the conductor layer and the piezoelectric plate. A second conductor layer of gold, aluminum, copper or other higher conductivity metal may be formed over portions of the conductor pattern (for example the IDT bus bars, interconnections between the IDTs, and the first set of contact pads).

The first and second conductor layers may be formed at1150by depositing the conductor layer and, optionally, thin films of one or more other metals in sequence over the surface of the piezoelectric plate. The excess metal may then be removed by etching through patterned photoresist. The conductor layer can be etched, for example, by plasma etching, reactive ion etching, wet chemical etching, and other etching techniques.

Alternatively, the first and second conductor layers may be formed at1150using a lift-off process. Photoresist may be deposited over the piezoelectric plate and patterned to define the conductor pattern. The conductor layer and, optionally, one or more other layers may be deposited in sequence over the surface of the piezoelectric plate. The photoresist may then be removed, which removes the excess material, leaving the conductor pattern.

At1160, one or more optional front-side dielectric layers may be formed by depositing one or more layers of dielectric material on the front side of the piezoelectric plate. The one or more dielectric layers may be deposited using a conventional deposition technique such as sputtering, evaporation, or chemical vapor deposition. The one or more dielectric layers may be deposited over the entire surface of the piezoelectric plate, including on top of the conductor pattern. Alternatively, one or more lithography processes (using photomasks) may be used to limit the deposition of the dielectric layers to selected areas of the piezoelectric plate, such as only between the interleaved fingers of the IDTs. Masks may also be used to allow deposition of different thicknesses of dielectric materials on different portions of the piezoelectric plate. For example, a first dielectric layer having a first thickness t1 may be deposited over the IDTs of one or more shunt resonators. A second dielectric layer having a second thickness t2, where t2 is equal to or greater than zero and less than t1, may be deposited over the IDTs of series resonators.

After the conductor pattern and optional front-side dielectric layer are formed at1150and1160, the filter chip may be completed at1170. Actions that may occur at1170include depositing an encapsulation/passivation layer such as SiO2or Si3O4over all or a portion of the device and testing. Another action that may occur at1170is to tune the resonant frequencies of the resonators within the device by adding or removing metal or dielectric material from the front side of the device. After the filter chip is completed, the process ends at1195.

A variation of the process1100starts with a single-crystal piezoelectric wafer at1102instead of a thin piezoelectric plate on a sacrificial substrate of a different material. Ions are implanted to a controlled depth beneath a surface of the piezoelectric wafer (not shown inFIG.11). The portion of the wafer from the surface to the depth of the ion implantation is (or will become) the thin piezoelectric plate and the balance of the wafer is the sacrificial substrate. The acoustic Bragg reflector is formed at1120as previously described and the piezoelectric wafer and device substrate are bonded at1130such that the acoustic Bragg reflector is disposed between the ion-implanted surface of the piezoelectric wafer1102and the device substrate1104. At1140, the piezoelectric wafer may be split at the plane of the implanted ions (for example, using thermal shock), leaving a thin plate of piezoelectric material exposed and bonded to the acoustic Bragg reflector. The thickness of the thin plate piezoelectric material is determined by the energy (and thus depth) of the implanted ions. The process of ion implantation and subsequent separation of a thin plate is commonly referred to as “ion slicing”.

FIG.12A,FIG.12B, andFIG.12Care, in combination, a flow chart of process1200for fabricating a packaged SM XBAR filter. WhileFIG.12A,FIG.12B, andFIG.12Cillustrate the process1200with a silicon interposer with TSVs (through silicon vias), the process1200may also use a PCB or LTCC interposer.

The process1200starts at1205and ends at1295with a completed packaged SM XBAR filter.FIG.12A,FIG.12B, andFIG.12Cshow major process actions, each of which may involve multiple steps. Various conventional process steps (e.g. surface preparation, cleaning, inspection, baking, annealing, monitoring, testing, etc.) may be performed before, between, after, and during the steps shown inFIG.12A,FIG.12B, andFIG.12C. For each major process action, a corresponding schematic cross-sectional view is provided to illustrate the configuration of the work-in-progress at the conclusion of the action. Where appropriate, reference designators previously used inFIG.6are used to identify elements of the work-in-progress.

Referring toFIG.12A, at1210, an SM XBAR filter chip605is fabricated using, for example, the process1100ofFIG.11. The SM XBAR filter chip605includes a piezoelectric plate610attached to a substrate620with an acoustic Bragg reflector (not identified) sandwiched between the piezoelectric plate and the substrate. The substrate620may be high resistivity silicon or some other material. A first conductor pattern is formed on the surface of the piezoelectric plate610. The first conductor pattern has a first conductor level that includes IDTs with interleaved IDT fingers, such as fingers630.

The first conductor pattern includes a second conductor level which may overlay portions of the first conductor level. The second conductor level may be gold, aluminum, copper or some other metal. The second conductor level of the first conductor pattern includes a continuous conductor662around the perimeter of the SM XBAR filter chip605. The second conductor level also includes a first set of contact pads, such as pad672, in locations where portions of the first conductor pattern must be connected to circuitry external to the packaged SM XBAR filter.

At1220, a partially complete interposer650is prepared. Alternatively, but not shown inFIG.12A, a fully completed interposer may be prepared at1220. The partially complete interposer650includes a base652, which may be high resistivity silicon or some other material. A dielectric layer654, such as silicon dioxide, is formed on the surface of the base that will face the SM XBAR filter chip. The base652may have recesses655so that the surfaces of the base652that will face the IDTs (i.e. the bottoms of the recesses655) are sufficiently far from the IDTs. The dielectric layer654may or may not cover the recesses655. A second conductor pattern is formed on top of the dielectric layer654. The second conductor pattern may be or include the same material as the second level of the first conductor pattern. The second conductor pattern includes a continuous metal conductor664around the perimeter of the base652. The second conductor pattern also includes a second set of contact pads, such as pad674, in locations where portions of the first conductor pattern must be connected to circuitry external to the packaged SM XBAR filter. The arrangement of the continuous conductor664and pads674of second conductor pattern is typically a mirror image of the arrangement of the ring662and pads672of the first conductor pattern.

At1230, the SM XBAR filter chip605is bonded to the partially complete interposer650. Specifically, the continuous conductor662of the first conductor pattern is bonded to the continuous conductor664of the second conductor pattern, forming a hermetic seal around the perimeter of the SM XBAR filter chip605and partially complete interposer650. Simultaneously, pads on the SM XBAR filter chip605are bonded to corresponding pads, such as pad674, on the partially complete interposer650. A preferred method of bonding the SM XBAR filter chip605to the partially compete interposer650is thermocompression bonding, which uses a combination of heat and pressure to make bonds between metallic layers. Other methods, including ultrasonic bonding, and solder or eutectic bonding may be used.

Referring now toFIG.12B, at1240, one or both of the substrate620and the SM XBAR filter chip, and the base652of the partially completed interposer650optionally may be thinned to reduce the overall height of the packaged SM XBAR filter. The substrate620and/or the base652may be thinned, for example, by mechanical or chemo-mechanical polishing.

After the optional thinning of one or both of the substrate620and the base652, through silicon via are formed in a sequence of actions from1250to1280. The actions at1250to1280are specific to the use of a silicon wafer for the interposer base652. When the interposer is a PCB or LTCC circuit card, a fully completed interposed may be prepared at1220(FIG.12A), in which case the actions at1250to1280may not be performed.

At1250, deep reactive ion etching (DRIE) is used to etch holes1252from the back side (the lower side as shown inFIG.12B) of the base652through the base652to the dielectric layer654. The dielectric layer654is not affected by the DRIE process, so the depth of the etch holes will be precisely controlled and uniform. The locations of the etched holes1252correspond to the locations of the pads, such as pad674, of the second conductor pattern.

At1260, a dielectric layer1262is deposited over the back side of the base652and the interiors of the holes1252. The dielectric layer may be silicon dioxide, silicon nitride, aluminum oxide, or some other dielectric material. The dielectric layer may be deposited by a conventional process such as evaporation, sputtering, chemical vapor deposition, or some other process.

Referring now toFIG.12C, at1270, the dielectric layer at the ends of the holes1252is etched through a patterned photoresist mask to expose at least a portion of each contact pad (such as pad674) of the second conductor pattern.

At1280, a third conductor pattern1256is formed to create electric connections from the pads, such as pad674of the second conductor pattern, to corresponding pads, such as pad676on the exterior surface (the lower surface as shown inFIG.12C) of the base652. The third conductor pattern may include a primary conductive layer of gold, aluminum, copper or some other highly conductive material. A thin layer of some other metal, such as titanium or nickel may be disposed between the primary conductive layer and the base652to improve adhesion. The structures including the holes1252and the third conductor pattern1256are commonly referred to as “through silicon vias”. Once the through silicon vias are complete, the process1200ends at1295.

The entire process1200may be, and commonly will be, performed on whole wafers. A whole wafer containing multiple SM XBARs filter chips will be bonded to another wafer containing a corresponding number of partially complete interposers at1230. The subsequent actions form TSVs for all of the interposers simultaneously. Individual packaged SM XBAR filters may then be excised by dicing the bonded wafers after action1230.

FIG.13is a flow chart of another process1300for fabricating a packaged SM XBAR filter using an LTCC or PCB interposer. WhileFIG.13illustrates the process1300with an LTCC interposer, the same process can be used with a PCB interposer.

The process1300starts at1305and ends at1395with a completed packaged SM XBAR filter.FIG.13shows major process actions, each of which may involve multiple steps. Various conventional process steps (e.g. surface preparation, cleaning, inspection, baking, annealing, monitoring, testing, etc.) may be performed before, between, after, and during the steps shown inFIG.13. For each major process action, a corresponding schematic cross-sectional view is provided to illustrate the configuration of the work-in-progress at the conclusion of the action. Where appropriate, reference designators previously used inFIG.8are used to identify elements of the work-in-progress.

At1310, a SM XBAR filter chip805is fabricated using, for example, the process1100ofFIG.11. The SM XBAR filter chip805will typically be a portion of a wafer containing multiple SM XBAR filter chips. The SM XBAR filter chip805includes a piezoelectric plate810attached to a substrate820. An acoustic Bragg reflector (not identified) is sandwiched between the piezoelectric plate810and the substrate820. The substrate820may be high resistivity silicon or some other material.

A first conductor pattern, including at least first and second conductor levels, is formed on the surface of the piezoelectric plate810. The first conductor level includes IDTs with interleaved IDT fingers, such as fingers830. The second conductor level, which may overlay portions of the first conductor level, may be gold, aluminum, copper or some other metal. The second conductor level may include a first set of contact pads (not identified) in locations where portions of the first conductor pattern must be connected to circuitry external to the packaged SM XBAR filter. Solder balls or bumps872may be formed on the pads to allow the SM XBAR filter chip805to be reflow soldered to an interposer. Alternatively, gold balls or bumps may be formed on the pads to allow the SM XBAR filter chip805to be thermocompression bonded or ultrasonic bonded to an interposer. In another alternative, the balls or bumps may be formed on the interposer rather than the SM XBAR filter chip.

At1320, an interposer850is fabricated by assembling thin dielectric layers, some or all of which bear printed conductors. The layers of an LTCC interposer may be ceramic tape co-fired to form a rigid multilayer circuit card. The layers of a PCB interposer may be thin reinforced plastic sheets that are adhesive bonded to form a rigid multilayer circuit card. In either case, interposer850will typically be a portion of a larger panel including multiple interposers. The interposer has at least an upper (as shown inFIG.13) conductor pattern874that includes a second set of contact pads for connections to the SM XBAR filter chip and a lower conductor pattern878that includes a third set of contact pads for connection to circuitry external to the packaged SM XBAR filter. In the example ofFIG.13, the interposer850includes one intermediate conductor layer. An LTCC or PCB interposer for an SM XBAR filter may have more than three conductor layers. The availability of multiple conductor layers allows incorporation of passive components, such as inductors, into the interposer.

The LTCC interposer850may have recesses855to ensure sufficient spacing between the IDTs and the surfaces of the interposer facing the IDTs. Such recesses may be formed, for example, by punching openings in one or more of the ceramic layers prior to cofiring the layers of the interposer.

At1330, the SM XBAR filter chip850is flip-chip bonded to the interposer850. First, the SM XBAR filter chips within a wafer are tested, and good chips are excised from the wafer. The good chips are then bonded to the LTCC interposer850by soldering, thermocompression bonding, ultrasonic bonding, or some other bonding method. The bonding physically attaches the SM XBAR filter chip805to the interposer850and makes electrical connections between the SM XBAR filter chip805and the interposer850. The bonding typically does not make a seal to protect the SM XBAR filter chip805.

At1340, a polymer cover860is formed over the SM XBAR filter chip805to seal the space between the SM XBAR filter chip805and the interposer850. The cover850may be formed by injection molding or casting, for example. Individual covers may be formed over each SM XBAR filter chip, or a unitary cover850may be formed over the entire LTCC panel. In either case, packaged SM XBAR filters may be excised from the panel by, for example, sawing. The process1300then ends at1395.

FIG.14is a flow chart of another process1400for fabricating a packaged SM XBAR filter using a wafer-level built up interposer. The process1400starts at1405and ends at1495with a completed packaged SM XBAR filter.FIG.14shows major process actions, each of which may involve multiple steps. Various conventional process steps (e.g. surface preparation, cleaning, inspection, baking, annealing, monitoring, testing, etc.) may be performed before, between, after, and during the steps shown inFIG.14. For each major process action, a corresponding schematic cross-sectional view is provided to illustrate the configuration of the work-in-progress at the conclusion of the action. Where appropriate, reference designators previously used inFIG.10are used to identify elements of the work-in-progress.

At1410, a SM XBAR filter chip1005is fabricated using, for example, the process1100ofFIG.11. The SM XBAR filter chip1005will typically be a portion of a wafer containing multiple SM XBAR filter chips. The SM XBAR filter chip1005includes a piezoelectric plate1010attached to a substrate1020. The substrate1020may be high resistivity silicon or some other material. An acoustic Bragg reflector (not identified) is sandwiched between the substrate and the piezoelectric plate. A first conductor pattern is formed on the surface of the piezoelectric plate1010. The first conductor pattern includes IDTs with interleaved IDT fingers, such as fingers1030.

At1420, walls1052are formed on the piezoelectric plate1010. The walls1052may be formed with openings over the SM XBAR IDTs and openings where electrical connections to the SM XBAR filter chip will be made in a subsequent process action. The walls1052may be formed, for example, by coating the piezoelectric plate1010with a photopolymerizable material and then exposing the photopolymerizable material through a suitable mask. Depending on the required thickness of the walls, multiple layers of material may be coated and patterned in succession.

A1430, a cover layer1054is applied over the walls1052. The cover layer1054may be applied, for example, as a continuous film bonded to the walls1052by an adhesive. The cover layer1054spans the openings in the walls1052over the SM XBAR IDTs, forming an enclosed cavity1055over each IDT. The cover layer is patterned to form openings where electrical connections to the SM XBAR filter chip will be made in a subsequent process action.

At1440, a conductor pattern1070is formed. The conductor pattern1070includes pads1072on the external surface of the cover layer for connection to circuitry external to the packaged SM XBAR filter. The conductor pattern1070connects the pads1072to connection points1074on the SM XBAR filer chip1005. The conductor pattern1070may be aluminum, copper, gold, or a combination of materials deposited and patterned using conventional techniques. Once the conductor pattern is formed, the process1400ends at1495.

The entire process1400may be, and commonly will be, performed on whole wafers. Individual packaged SM XBAR filters may then be excised by sawing through the bonded wafers after the conductor pattern is formed at1440.

Closing Comments

Throughout this description, the embodiments and examples shown should be considered as exemplars, rather than limitations on the apparatus and procedures disclosed or claimed. Although many of the examples presented herein involve specific combinations of method acts or system elements, it should be understood that those acts and those elements may be combined in other ways to accomplish the same objectives. With regard to flowcharts, additional and fewer steps may be taken, and the steps as shown may be combined or further refined to achieve the methods described herein. Acts, elements and features discussed only in connection with one embodiment are not intended to be excluded from a similar role in other embodiments.

As used herein, “plurality” means two or more. As used herein, a “set” of items may include one or more of such items. As used herein, whether in the written description or the claims, the terms “comprising”, “including”, “carrying”, “having”, “containing”, “involving”, and the like are to be understood to be open-ended, i.e., to mean including but not limited to. Only the transitional phrases “consisting of” and “consisting essentially of”, respectively, are closed or semi-closed transitional phrases with respect to claims. Use of ordinal terms such as “first”, “second”, “third”, etc., in the claims to modify a claim element does not by itself connote any priority, precedence, or order of one claim element over another or the temporal order in which acts of a method are performed, but are used merely as labels to distinguish one claim element having a certain name from another element having a same name (but for use of the ordinal term) to distinguish the claim elements. As used herein, “and/or” means that the listed items are alternatives, but the alternatives also include any combination of the listed items.