Patent ID: 12211699

DETAILED DESCRIPTION

FIG.1toFIG.8depict a method of removing a step height on a gate structure according to a preferred embodiment of the present invention.

Please refer toFIG.1. The lower figure inFIG.1is a sectional view taken along line AA′ of the upper figure inFIG.1. As shown inFIG.1, a substrate10is provided. The substrate10can be a bulk silicon substrate, a germanium substrate, a gallium arsenide substrate, a silicon germanium substrate, an indium phosphide substrate, a gallium nitride substrate, a silicon carbide substrate, or a silicon on insulator (SOI) substrate. A gate structure12is disposed on the substrate10. Numerous gate structures12are shown inFIG.1as an example. The gate structure12includes a conductive material layer and an insulating material layer. The insulating material layer is disposed under the conductive material layer. The conductive material layer can be Al, W, or Ti. A source/drain doping region14is disposed in the substrate10at one side of the gate structure12. InFIG.1, each gate structure12has two source/drain doping regions14respectively disposed at two sides of the gate structure12. Furthermore, a dielectric layer16covers the gate structure12and the substrate10. An interlayer dielectric18covers the dielectric layer18, the gate structure12and the substrate10. The dielectric layer16and the interlayer dielectric18may be silicon oxide formed by a chemical vapor deposition, an atomic layer deposition or a physical vapor deposition. After that, a composite material layer20is formed to cover the interlayer dielectric18. The composite material layer20includes an etching stop layer20a, a sacrifice layer20band a metal-containing layer20cstacked from bottom to top. According to a preferred embodiment of the present invention, the sacrifice layer20bincludes silicon oxide, the etching stop layer20aincludes silicon nitride and the metal-containing layer20cincludes titanium nitride or tungsten nitride, but not limited to materials listed above. Any material that can be removed entirely by dilute hydrofluoric acid can be used as the sacrifice layer20b. Any material that can be removed entirely by phosphoric acid can be used as the etching stop layer20a. Next, a triple-layered photoresist22is formed to cover the composite material layer20. The triple-layered photoresist22includes an anti-reflective coating (ARC) layer22a, a hard mask22band a photoresist22c. Thereafter, part of the triple-layered photoresist22is removed. The triple-layered photoresist22which is patterned defines a segmenting region of a source/drain contact hole on the source/drain doping region14. The source/drain contact hole will be formed afterwards.

Please refer toFIG.2. The lower figure inFIG.2is a sectional view taken along line BB′ of the upper figure inFIG.2. As shown inFIG.2, the pattern on the triple-layered photoresist22which is patterned is transferred to the hard mask22and the ARC layer22a. Next, part of the composite material layer20is removed by taking the hard mask22band the ARC layer22aas a mask to form a step height H directly on the gate structure12. The step height H extends to overlap a source/drain doping region14. Then, the hard mask22band the ARC layer22aare removed. In details, after the step height H defining the segmenting region of the source/drain contact hole which will be formed above the source/drain doping region14, during the steps of removing part of the composite material layer20, the metal-containing layer20cnot covered by the hard mask22bis entirely removed, the sacrifice layer20bwhich is not covered by the hard mask22bis thinned, and the etching stop layer20awhich is covered by the sacrifice layer20bentirely remains. The step height H protrudes from the sacrifice layer20b. The step height H consists of the sacrifice layer20band the metal-containing layer20c.

Please refer toFIG.3. The lower figure inFIG.3is a sectional view taken along line CC′ of the upper figure inFIG.3. As shown inFIG.3, a patterned mask24such as a patterned triple-layered photoresist covers the step height H and the entirety of the substrate10. The structure of the triple-layered photoresist inFIG.3is the same as that of the triple-layered photoresist22. An opening24aof the patterned mask24defines the position of the source/drain contact hole. The source/drain doping region14will be exposed through the source/drain contact hole. Please refer toFIG.4. The lower figure inFIG.4is a sectional view taken along line DD′ of the upper figure inFIG.4. As shown inFIG.4, the sacrifice layer20b, the etching stop layer20a, the interlayer dielectric18and the dielectric layer16are etched by taking the patterned mask24and the step height H as masks to form a source/drain contact hole26. Now, the source/drain doping region14is exposed through the source/drain contact hole26. Next, the patterned mask24is removed entirely. It is noteworthy that the etchant does not etch the metal-containing layer20c, therefore the sacrifice layer20b, the etching stop layer the interlayer dielectric18and the dielectric layer16which are covered by the step height H are not etched. In this way, the source/drain contact hole26can be segmented.

As shown inFIG.5andFIG.6, a wet etching28is performed to remove the step height H. In details, as shown inFIG.5andFIG.6, the wet etching28includes removing the sacrifice layer20bentirely by using dilute hydrofluoric acid followed by removing the etching stop layer20aentirely by using phosphoric acid. Although dilute hydrofluoric acid does not etch the metal-containing layer20c, however, because the sacrifice layer20bis etched by dilute hydrofluoric acid, the metal-containing layer20closes its attaching surface and will be cleaned along with the sacrifice layer20b. Now, the step height H is completely removed. Because the etching stop layer20ais silicon nitride, silicon nitride and the material of the interlayer dielectric18have high etching selectivity with respective to phosphoric acid. Therefore, when the etching stop layer20ais removed by phosphoric acid, the interlayer dielectric18is not damaged. It is noteworthy that after the etching stop layer20ais removed, the interlayer dielectric18directly on the gate structure12is coplanar. Now, the method of removing the step height on the gate structure is completed.

As shown inFIG.7, a patterned triple-layered photoresist30is formed. The opening of the patterned triple-layered photoresist30defines the position of the gate contact hole. The gate structure12will be exposed from the gate contact hole later. As shown inFIG.8, the interlayer dielectric18is etched by taking the triple-layered photoresist30as a mask to form a gate contact hole32. Now, the gate structure12is exposed through the gate contact hole32. Finally, the patterned triple-layered photoresist30is entirely removed. After that, contact plugs can be respectively form in the gate contact hole32and the source/drain contact hole26.

FIG.9toFIG.10depict a fabricating method of a contact hole according to an example of the present invention, wherein elements inFIG.9andFIG.10which are substantially the same as those in the embodiment ofFIG.1toFIG.8are denoted by the same reference numerals; an accompanying explanation is therefore omitted. The difference between the example and the preferred embodiment is that the step height H′ is not removed after the source/drain contact hole26is formed. Moreover, the step height H′ consists of metal-containing layer20cand the interlayer dielectric18. The metal-containing layer20cis removed before forming the gate contact hole32, however, the protruded interlayer dielectric18is remained. As shown inFIG.10, because the protruded interlayer dielectric18is not removed, while forming the gate contact hole32, the protruded interlayer dielectric18needs to be etched. In this way, the gate structure12covered by the protruded interlayer dielectric18will have a gate contact hole32′ without enough thickness. On the other hand, the gate structure12which is not covered by the protruded interlayer dielectric18will have a gate contact hole32with enough thickness to expose the gate structure12.

In the preferred embodiment of the present invention, the step height H is removed by the wet etching28. In this way, the entire interlayer dielectric18has the same thickness when forming the gate contact hole32. Therefore, all the gate contact hole32formed in the preferred embodiment can expose the gate structure12.

Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.