Patent ID: 12253871

DETAILED DESCRIPTION

In this description, the same reference numbers depict same or similar (by function and/or structure) features. The drawings are not necessarily drawn to scale.

FIG.1shows a schematic diagram for an example voltage regulator100. The input for voltage regulator100is VDD102. The output for voltage regulator100is VOUT160. Resistors142and146are coupled in series between VOUT160and ground, and divide the voltage at VOUT160to provide a feedback voltage signal for voltage regulation. The feedback voltage terminal VFB144is coupled to a first input of error amplifier110. A second input of error amplifier110is coupled to a reference voltage circuit VREF104.

The output of error amplifier110is coupled to the input of buffer amplifier120. The output of buffer amplifier120is coupled to the gate of transistor130. The source of transistor130is coupled to VDD102. The drain of transistor130is coupled to VOUT160, the output of voltage regulator100. The load150includes resistor152and capacitor154coupled in parallel between VOUT160and ground.

Resistors142and146form a voltage divider for output voltage VOUT160, providing a feedback voltage VFB144. VFB144is compared to a reference voltage VREF104using amplifier110. The voltage of VREF104is selected to be equal to the voltage of VFB144when VOUT160is at a specified voltage. The output EAMPHIZ of amplifier110indicates whether the output voltage VOUT160is higher or lower than the specified voltage. The input of buffer amplifier120is coupled to the output of amplifier110. The output of buffer amplifier120is coupled to the gate of transistor130. If the voltage at VOUT160is below a specified value, the output of buffer amp120will be low, increasing the gate-to-source voltage (VGS) of transistor130. If the voltage at VOUT160is above the specified value, the VGSof transistor130will decrease. Decreasing the VGSof transistor130reduces the current through resistor152, thereby decreasing the voltage at VOUT160.

If a current demand from load150is higher than the current that transistor130can provide, the voltage at VOUT160may begin to drop. As the voltage at VOUT160drops, the output of error amplifier110, EAMPHIZ, is driven to ground, placing error amplifier110into saturation. While it is saturated, error amplifier110is unable to respond to inputs, and the output EAMPHIZ remains at ground.

Buffer amplifier120has a non-inverting input, so the output of buffer amplifier120is driven to ground when the input is at ground, which drives the gate of transistor130to ground. This creates a large VGSin transistor130, thereby causing a large current to flow through transistor130. The large current through load resistance152increases the voltage at VOUT160, which can cause a voltage overshoot at VOUT160.

A similar problem can occur when the voltage on VDD102drops. When the voltage on VDD102drops, the voltage at VOUT160may drop in response. As the voltage at VOUT160drops, the output of error amplifier110, EAMPHIZ, is driven to ground. With the input to buffer amplifier120at ground, the output of buffer amplifier120is driven to ground, thereby driving the gate of transistor130to ground. Grounding the gate of transistor130creates a large VGSin transistor130, thereby causing a large current to flow through transistor130and through load resistance152.

The large current through load resistance152increases the voltage at VOUT160, resulting in a voltage overshoot at VOUT160. So, a drop in the voltage on VDD102can drive the voltage regulator into a dropout condition. When the voltage on VDD102recovers, a high current will flow through transistor130due to the large VGS. The large current through transistor130can produce a voltage overshoot VOUT160as a result of the high current through the load resistance152.

A second problem may occur in some regulators that generate reference voltage VREF104off-chip. In some ultra-low noise architectures, the reference is externally generated off-chip to allow the use of a large external capacitor to filter out noise on the reference voltage signal. The reference voltage is generated by a reference current IREFflowing through a reference resistance having a filter capacitor in parallel with it. The magnitude of the reference current IREFis in the microamp range, whereas the current through transistor130can be in a range from hundreds of milliamps to amps. Because of this large difference between the current through transistor130and the IREFcurrent, there can be a large difference between the size of the body diode in transistor130and the size of the body diode in the IREFtransistor.

VOUT160will discharge quickly if VDD102drops. In at least one case, VOUT160is directly connected to an input of error amplifier110. If VDD102drops below VOUT, then VOUTwill drop to VDDminus the voltage drop across transistor130. VREFwill settle at a voltage lower than VDD102, but it will drop more slowly than VOUTbecause the IREFtransistor has a smaller body diode than transistor130, so it will take longer for VREFto discharge to lower than VDD. Error amplifier110is then forced into a dropout condition, driving EAMPHIZ close to ground. So, the gate of transistor130is at a voltage near ground, while the source of transistor130is high. The large VGSproduces a large current through transistor130, which causes a voltage overshoot on VOUT160.

FIG.2shows a schematic diagram for an example voltage regulator200with a current limit. The current limit circuit of voltage regulator200limits the output current during normal operation of the voltage regulator as well as when the voltage regulator is in a dropout condition.

The input for voltage regulator200is VDD202. The output for voltage regulator200is VOUT260. Resistors242and246are coupled in series between VOUT260and ground, and form a voltage divider on the voltage at VOUT260to provide feedback for voltage regulation. The feedback voltage terminal VFB244is coupled to a first input of error amplifier210. A second input of error amplifier210is coupled to a reference voltage terminal VREF204.

The output of error amplifier210is coupled to the input of buffer amplifier220. The output of buffer amplifier220is coupled to the gate of transistor230. The source of transistor230is coupled to VDD202. The drain of transistor230is coupled to VOUT260, the output of voltage regulator200. The load250includes resistor252and capacitor254coupled in parallel between VOUT260and ground.

Resistors242and246form a voltage divider for output voltage VOUT260, that provides a feedback voltage VFB244. VFB244is compared to a reference voltage VREF204using error amplifier210. The voltage at the voltage reference terminal VREF204is selected to be equal to the voltage at the feedback voltage terminal VFB244when the output voltage VOUT260is at a specified voltage. The output of amplifier210indicates whether the output voltage VOUT260is higher or lower than the specified voltage. The output of buffer amplifier220drives the gate of transistor230in response to the output of amplifier210. If the voltage at the output voltage terminal VOUT260needs to increase, the VGSof transistor230will increase. If the voltage at the output voltage terminal VOUT260needs to decrease, the VGSof transistor230will decrease. Decreasing the VGSof transistor230reduces the current through resistor252, decreasing the voltage at the output voltage terminal VOUT260.

A first current source ISENSE262is coupled between VDD202and a first terminal of resistor266. A second current source IREF264is coupled between VDD202and a first terminal of resistor268. The second terminals of resistors266and268are coupled to ground. Amplifier270has a first terminal coupled to resistor266, and a second terminal coupled to resistor268. The output of amplifier270is coupled to the gate of transistor274. Transistor274is coupled between VDD202and the input of buffer amplifier220.

Current source ISENSE262provides a current through resistor266. The voltage drop across resistor266is proportional to the current through transistor230, and is a first input to amplifier270. Current source IREF264sources a current through resistor268. The voltage drop across resistor268is proportional to a current limit threshold value, and is a second input to amplifier270. The output of amplifier270is a signal proportional to the difference between the current through transistor230and the current limit threshold.

If the current through transistor230exceeds the current limit threshold, the output of amplifier270pulls down the gate of transistor274, which pulls up the input to buffer amplifier220. The output of buffer amplifier220going low drives the gate of transistor230high, turning off transistor230.

Conversely, if the voltage at VDD)202drops below the dropout voltage, the voltage at VOUT260will drop, and voltage regulator200will go into a dropout condition. When a dropout condition occurs, error amplifier210will be driven to ground, thereby driving the gate of transistor230to ground. When the voltage at VDD202recovers, a relatively large current flows through transistor230, and the current limit circuit will become active to reduce the current through transistor230.

The current limit circuit of voltage regulator200may reduce the overshoot problem, but it is not a complete solution to the overshoot problem. The overshoot problem is made worse if the voltage drop at VDD202is fast, which can occur with a fast transient or a brownout condition, due to the bandwidth limitation of the circuit. The current limit control loop is not able to react to a line voltage transient that is faster than the bandwidth of the loop, resulting in saturation of the error amplifier.

FIG.3shows a schematic diagram for a voltage regulator300with a dropout voltage sensing circuit. The dropout voltage sensing circuit of voltage regulator300operates in a similar manner to the current limit loop of voltage regulator200. The primary difference between the two circuits is that the dropout voltage sensing circuit compares the voltage difference between VDDand VOUTto a reference voltage instead of comparing a current sensed through a transistor to a reference current.

The input for voltage regulator300is VDD302. The output for voltage regulator300is VOUT360. Resistors342and346are coupled in series between VOUT360and ground, and divide the voltage at VOUT360to provide a feedback voltage for voltage regulation. The feedback voltage terminal VFB344is coupled to a first input of error amplifier310. A second input of error amplifier310is coupled to a reference voltage terminal VREF304.

The output of error amplifier310is coupled to the input of buffer amplifier320. The output of buffer amplifier320is coupled to the gate of transistor330. The source of transistor330is coupled to VDD302. The drain of transistor330is coupled to VOUT360, the output of voltage regulator300. The load350includes resistor352and capacitor354coupled in parallel between VOUT360and ground.

Resistors342and346form a voltage divider for output voltage VOUT360that provides a feedback voltage VFB344. VFB344is compared to a reference voltage VREF304using error amplifier310. The value of VREF304is selected to be equal to the value of VFB344when VOUT360is at a specified voltage. The output of error amplifier310indicates whether the output voltage VOUT360is higher or lower than the specified voltage. The output of buffer amplifier320drives the gate of transistor330responsive to the output of error amplifier310. If the voltage at VOUT360needs to increase, the VGSof transistor330will increase. If the voltage at VOUT360needs to decrease, the VGSof transistor330will decrease. Decreasing the VGSof transistor330reduces the current through resistor352, decreasing the voltage at VOUT360.

Transistors362and366are coupled in series between VDD302and ground. Transistor362is a p-channel field effect transistor (PFET) with a source that is coupled to VDD302, and a gate that is coupled to the output of buffer amplifier320and the gate of transistor330. Transistor366is an n-channel field effect transistor (NFET) with a drain coupled to the drain of transistor362, and a source coupled to ground. Transistor368is an NFET having a source coupled to ground, and having a gate coupled to the gate and the drain of transistor366.

Resistor364is coupled between the drain of transistor368and VDD302. Comparator370has a first input coupled to the drain of transistor368, and has a second input coupled to VOUT360. The output372of comparator370is coupled to the gate of transistor374, and provides a signal proportional to the difference between the voltage at VOUT360and the voltage at the drain of transistor368. Transistor374is coupled between VDD302and the input to buffer amplifier320.

Transistor362senses the current through transistor330, which is the current provided to the load350. The voltage drop across resistor364is a reference dropout voltage, which is a function of the load current. The voltage drop across resistor364is compared to a voltage drop across transistor330, which is the voltage difference between VDD302and VOUT360. If the voltage difference between VDD302and VOUT360is less than the reference voltage, the output372of comparator370will turn on transistor374, pulling up the input to buffer amplifier320.

The voltage at the gate of transistor330is increased when the input to buffer amplifier320is pulled up, reducing the VGSof transistor330, and thus limiting the current through transistor330. Because the current is being limited, the voltage difference between VDD302and VOUT360will remain higher than the reference value. However, if there is a very fast line transient, the circuit may fail to maintain voltage regulation due to a limitation of the circuit bandwidth. If the bandwidth of the circuit is exceeded by the line transient, the circuit may not prevent a voltage dropout on VOUT360.

FIG.4shows a block diagram for an example comparator-based overshoot dampening circuit400in a voltage regulator. The overshoot dampening circuit400utilize two comparators that continually monitor for two respective fault conditions in place of current and voltage feedback loops. The outputs of the two comparators are logically OR'd together, allowing the circuit to respond appropriately if either of the fault conditions is detected. The first comparator compares VDDto a reference dropout voltage, and the second comparator compares VDDto VOUT.

A first offset voltage circuit VOS1474has an input coupled to VDD402and an output coupled to a first input of comparator1480. A second input of comparator1480is coupled to a reference voltage terminal404. A second offset voltage circuit VOS2476has an input coupled to VDD402and an output coupled to a first input of comparator2482. A second input of comparator2482is coupled to an output voltage terminal VOUT460. The output of comparator1480is coupled to a first input of OR gate484. The output of comparator2482is coupled to a second input of OR gate484.

The output of OR gate484is coupled to an input of transistor turn-off circuit486. An output of transistor turn-off circuit486is coupled to the control terminal of the regulator pass transistor (e.g.230). When the output of OR gate484goes high, the output of the transistor turn-off circuit486goes high causing the regulator pass transistor to turn off. The output of OR gate484is also coupled to the input of a one-shot falling edge detector488. After the output of OR gate484has gone high, the one-shot falling edge detector488monitors the output of OR gate484for a falling edge. A falling edge on the output of OR gate484indicates that the fault conditions that caused it to go high have ceased. In response to detecting a falling edge on the output of OR gate484, an output of the one-shot falling edge detector488provides a signal to the pulse generator circuit490. The pulse generator circuit490sends a pulse to the input of reference discharge circuit492triggering a discharge of the reference voltage. When the reference voltage is discharged, a signal is sent to the regulator startup circuit494which initiates a reset and restart of the voltage regulator.

A first offset voltage VOS1474is added to VDD402, and the sum is provided as a first input to comparator1480. Comparator1480compares the sum of VDD402plus VOS1474to a reference voltage VREF404and provides a high signal at the output of comparator1if the reference voltage VREF404is larger than the sum of VDD402and VOS1474.

A second offset voltage VOS2476is added to VDD402, and the sum is provided as a first input to comparator2482. Comparator2482compares VDD402plus VOS2476to the output voltage VOUT460, and provides a high signal at the output of comparator2if VOUT460is larger than the sum of VDD402and VOS2476.

Comparator1480and comparator2482each have an offset voltage added to VDD402as a first input, but the two offset voltages are different. VOS1474is a lower voltage than VOS2476to avoid impacting the operation of the circuit during normal operating conditions. The output of comparator1480will be high if VDD−VREFis less than VOS1. The output of comparator2482will be high if VDD−VOUTis less than VOS2. The outputs of comparator1480and comparator2482are coupled to the inputs of OR gate484. If the output of either comparator1480or comparator2482is high, the output of OR gate484will be high.

Comparator1480can detect a problem that sometimes occurs when the reference voltage VREF404is filtered by a large capacitor and the voltage at VDD402drops. In this case, the reference voltage VREF404will not be completely pulled down to the value of VDD402due to the residual charge on the capacitor, and reference voltage VREF404will remain higher than VDD402. In this situation, VDD)402is at a higher voltage than VOUT460. So, when the voltage at VDD402recovers, the voltage regulator may go into a dropout condition. Comparator1480monitors the voltage difference between VDD402and VREF404. If the voltage at VDD402drops and VDD—VREFis less than VOS1, the output of comparator1will go high.

The comparator2circuit serves a similar function to conventional dropout current limiting circuits by detecting and reporting a condition that indicates an overcurrent situation. The advantage that the comparator2circuit provides is that comparator2482is, in many cases, quicker to react to the condition than conventional dropout limiting circuits because it operates as an open loop circuit, not as a feedback circuit. In many conventional circuits, if VDD−VOUTis higher than a dropout limit, VDO, the dropout circuitry reduces the VGSacross the pass transistor, which reduces the current through the pass transistor. A similar result occurs with circuit400, but the pass transistor is instead turned off, stopping the flow of current through the pass transistor. If VDD−VOUTis higher than VOS2476, the output of OR gate484goes high, which triggers the transistor turn-off circuit to provide a high signal to the control terminal of the pass transistor, turning the pass transistor off.

If VDD−VREFis less than VOS1, the output of comparator1480will be high. The output of comparator2remains low as long as VDD−VOUTis more than VOS2. A voltage change in VREFmay lag a voltage change in VDDby a delay due to the residual charge on the capacitor filtering VREF. However, the voltage at VOUTfollows the voltage at VDDwith no delay. If the output of comparator1falls low, the output of OR gate484goes low, causing the output of transistor turn-off circuit486to go low. This turns on the pass transistor, allowing VDDto recover to its nominal voltage.

Without the inclusion of the one-shot falling edge detector circuit488, pulse generator490and the reference discharge circuit492in the circuit, a dropout followed by an overshoot could occur due to the lag between VREFand VDD. The one-shot falling edge detector circuit488detects the falling edge of the OR gate output and signals the pulse generator490that a falling edge occurred. The pulse generator490provides a pulse to the input of reference discharge circuit492triggering a discharge of the reference voltage. When the reference voltage is discharged, a signal is sent to the regulator startup circuit494which initiates a restart of the voltage regulator, thereby avoiding an overshoot condition.

FIG.5shows a schematic diagram500for an example comparator-based overshoot dampening circuit in a voltage regulator. The input voltage for the voltage regulator is VDD402. The output voltage for the voltage regulator is VOUT460. A feedback voltage terminal444is coupled to a first input of error amplifier410. Voltage reference generator circuit403provides a reference voltage at its output that is compared with a feedback voltage from the voltage regulator. Voltage reference generator circuit403has an input coupled to VDD402and an output coupled to the reference voltage terminal VREF404. Reference voltage filter circuit405is coupled between the reference voltage terminal VREF404and ground. Reference voltage filter circuit405filters noise from the reference voltage signal. A first input of error amplifier410is coupled to the reference voltage terminal VREF404. A feedback voltage terminal444is coupled to a second input of error amplifier410.

The output of error amplifier410is coupled to the input of buffer amplifier420. The output of buffer amplifier420is coupled to the gate of pass transistor430. The source of pass transistor430is coupled to VDD402. The drain of pass transistor430is coupled to VOUT460. The load450includes resistor452and capacitor454coupled in parallel between VOUT460and ground.

A first offset voltage circuit VOS1474has an input coupled to VDD402and an output coupled to a first input of comparator1480. A second input of comparator1480is coupled to a reference voltage terminal VREF404. A second offset voltage circuit VOS2476has an input coupled to VDD402and an output coupled to a first input of comparator2482. A second input of comparator2482is coupled to the output voltage terminal VOUT460. The output of comparator1480is coupled to a first input of OR gate484. The output of comparator2482is coupled to a second input of OR gate484.

The output of OR gate484is coupled to an input of transistor turn-off circuit486. In one example, transistor turn-off circuit486includes an OR gate. An output, PASSFET_OFF, of transistor turn-off circuit486is coupled to the control terminals of transistors474and475. Transistors474and475provide first and second levels of turn-off for pass transistor430, but either transistor474or transistor475may be omitted in some example circuits.

When the output of OR gate484goes high, the output of the transistor turn-off circuit486goes high, which turns off pass transistor430. The output of OR gate484is also coupled to the input of one-shot falling edge detector488. In response to the output of OR gate484going high, the one-shot falling edge detector488continuously monitors the output of OR gate484for a falling edge. A falling edge on the output of OR gate484indicates that the fault conditions that caused it to go high have ceased. In response to detecting a falling edge on the output of OR gate484, an output of the one-shot falling edge detector488provides a signal to the pulse generator circuit490. The pulse generator circuit490is coupled to the input of reference discharge circuit492, and sends a signal triggering a discharge of the reference voltage. The reference discharge circuit492is coupled to an input of the regulator startup circuit494, and sends a signal to the regulator startup circuit494that initiates a reset and restart of the voltage regulator.

A first offset voltage VOS1474is added to VDD402, and the sum is provided as a first input to comparator1480. Comparator1480compares VDD402plus VOS1474to a reference voltage VREF404, and provides a high signal at the output of comparator1if the reference voltage VREF404is larger than the sum of VDD402and VOS1474.

A second offset voltage VOS2476is added to VDD402, and the sum is provided as a first input to comparator2482. Comparator2482compares VDD402plus VOS2476to the output voltage VOUT460, and provides a high signal at the output of comparator2if VOUT460is larger than the sum of VDD402and VOS2476.

Comparator1480and comparator2482each have an offset voltage added to VDD402as a first input, but the two offset voltages are different. VOS1474is a lower voltage than VOS2476to avoid impacting the operation of the circuit during normal operating conditions. The output of comparator1480will be high if VDD−VREFis less than VOS1. The output of comparator2482will be high if VDD−VOUTis less than VOS2. The outputs of comparator1480and comparator2482are coupled to the inputs of OR gate484. If the output of either comparator1480or comparator2482is high, the output of OR gate484will be high.

Comparator1480can detect a problem that sometimes occurs when the reference voltage VREF404is filtered by a large capacitor and the voltage at VDD402drops. The reference voltage VREF404will not be completely pulled down to the value of VDD402due to the residual charge on the capacitor, and reference voltage VREF404remains higher than VDD402. In this situation, VDD402is at a higher voltage than VOUT460. So, when the voltage at VDD402recovers, the voltage regulator can go into a dropout condition. Comparator1480monitors the voltage difference between VDD402and VREF404. If the voltage at VDD402drops and VDD−VREFbecomes less than VOS1, the output of comparator1will go high. If VDD−VOUTis higher than VOS2476, the output of OR gate484goes high, which triggers the transistor turn-off circuit to provide a high signal to the control terminal of the pass transistor, turning the pass transistor off.

If VDD−VREFis less than VOS1, the output of comparator1480will be high. The output of comparator2remains low as long as VDD−VOUTis more than VOS2. A voltage change in VREFmay lag a voltage change in VDDby a delay due to the residual charge on the capacitor filtering VREF. However, the voltage at VOUTfollows the voltage at VDDwith no delay. If the output of comparator1falls low, the output of OR gate484goes low, causing the output of transistor turn-off circuit486to go low. This turns on the pass transistor, allowing VDDto recover to its nominal voltage.

FIG.6shows a flow chart600of an example method for implementing a comparator-based overshoot dampening circuit in a voltage regulator. In step610, the power source for the voltage regulator circuit VDDis enabled and its voltage ramps up to a specified value. In step620, the voltage regulator is enabled and power from VDDis applied as an input to the regulator. In step630, a reference voltage generation circuit receives power from VDDand begins charging up to its specified value. A reference voltage VREFis provided at a reference voltage terminal internal to the voltage regulator. A regulated output voltage VOUTramps up to its specified value and is available at the output voltage terminal. Step640is normal operation of the voltage regulator in which the regulator input voltage VDDand the regulator output voltage VOUTremain within specified limits.

In step650, the regulator input voltage VDDbegins to drop due to an unspecified cause. In response to the regulator input voltage VDDfalling below a specified value, a check is performed in step660for either of two conditions that can cause a circuit failure. If either VDD−VOUT<VOS1or VDD−VREF<VOS2are true, the process moves to step670. Each of the two relationships can be checked using a respective comparator, and the outputs of the two comparators logically OR′d together so that either of the two statements being true will trigger a true output of the OR gate. If both equations are false, then the voltage regulator remains in step660and continues to check for either of the two conditions.

In step670, the pass transistor is turned off to stop the current flow through the load. The output of the OR gate is continuously monitored in step680for a falling edge. The pass transistor will remain off as long as a falling edge is not detected in step680. In response to a falling edge being detected in step680, the reference voltage VREFand the output voltage VOUTare each discharged in step690. The voltage regulator is then reset/restarted and the process returns to step620.

In this description, “terminal,” “node,” “interconnection,” “lead” and “pin” are used interchangeably. Unless specifically stated to the contrary, these terms generally mean an interconnection between or a terminus of a device element, a circuit element, an integrated circuit, a device, or other electronics or semiconductor component.

In this description, “ground” includes a chassis ground, an Earth ground, a floating ground, a virtual ground, a digital ground, a common ground and/or any other form of ground connection applicable to, or suitable for, the teachings of this description.

In this description, even if operations are described in a particular order, some operations may be optional, and the operations are not necessarily required to be performed in that particular order to achieve specified results. In some examples, multitasking and parallel processing may be advantageous. Moreover, a separation of various system components in the embodiments described above does not necessarily require such separation in all embodiments.

Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims.