Patent ID: 12219246

DESCRIPTION OF THE EMBODIMENTS

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.FIG.1is a diagram illustrating a digital camera600, which is an image pickup device that serves as one example of electronic apparatuses of the embodiment. The digital camera600, which is an image pickup apparatus, is a digital camera with interchangeable lenses; and includes a camera body601. To the camera body601, a lens unit (lens barrel)602including lenses is detachably attached. The camera body601includes a housing611, a processing module100, and a sensor module900. The processing module100and the sensor module900are disposed in the housing611. The processing module100is one example of electronic modules, and is formed as a printed circuit board. The processing module100and the sensor module900are electrically connected with each other via a cable400. In the housing611, a battery (not illustrated) is disposed.

The sensor module900includes an image sensor901that is an image pickup device, and a printed wiring board902. The image sensor901is mounted on the printed wiring board902. The image sensor901may be a complementary metal oxide semiconductor (CMOS) image sensor or a charge coupled device (CCD) image sensor. The image sensor901has a function that converts the light having passed through the lens unit602, to an electrical signal.

The processing module100includes a semiconductor device200, a power supply device140, and a printed wiring board300. The semiconductor device200is one example of a first semiconductor device. The power supply device140is one example of a second semiconductor device.

The semiconductor device200and the power supply device140are mounted on the printed wiring board300. The printed wiring board300is a rigid wiring board. The semiconductor device200may be a digital signal processor; and has a function that receives an electrical signal from the image sensor901, corrects the electrical signal, and creates image data. The power supply device140supplies electric power from the battery (not illustrated) to components of the digital camera600, which includes the semiconductor device200. The power supply device140is an IC that includes power supply elements. The power supply device140applies a direct-current voltage to the semiconductor device200via the printed wiring board300, and thereby supplies electric power (i.e., power supply current) to the semiconductor device200for operating the semiconductor device200. In the printed wiring board300, a power supply path is formed for supplying the electric power (i.e., power supply current) from the power supply device140to the semiconductor device200. The power supply path includes a power supply line and a ground line.

FIG.2is a perspective view illustrating one portion of the processing module100of the embodiment. The semiconductor device200is a semiconductor package. In the present embodiment, the semiconductor device200is a ball grid array (BGA) semiconductor package. The semiconductor device200includes a package board201, and a semiconductor element202mounted on the package board201.

The semiconductor element202is a semiconductor chip, and includes a die2020that is sealed with sealing resin. The die2020includes a plurality of core circuits and a plurality of transmitting circuits (buffers). The plurality of core circuits receives a digital signal, and processes the digital signal. The plurality of transmitting circuits transmits a digital signal outputted from the plurality of core circuits, to an external device or another semiconductor device. In the present embodiment, the plurality of transmitting circuits includes a circuit2021, a circuit2022, and a circuit2023. The circuit2021is one example of a first circuit. Each of the circuits2022and2023is one example of a second circuit. That is, the semiconductor element202includes at least one first circuit and at least one second circuit. In the present embodiment, the semiconductor element202includes the single circuit2021and the two circuits2022and2023. Thus, the circuits2021to2023are included in the single semiconductor device200. Each of the circuits2021to2023is a semiconductor integrated circuit. The circuit2021is a universal serial bus (USB) transmitting circuit, for example. The circuits2022and2023are low voltage complementary metal oxide semiconductor (LVCMOS) transmitting circuits, for example. Each of the circuits2021to2023is one of the plurality of transmitting circuits. However, each of the circuits2021to2023may be one of the plurality of core circuits.

The package board201is one example of interposers. The semiconductor element202is electrically and mechanically connected to the package board201via a plurality of solder bumps203. The semiconductor device200has a plurality of terminals204, which is disposed on a main surface of the package board201(the package board201has a pair of main surfaces) opposite to a main surface of the package board201on which the semiconductor element202is mounted. The package board201is electrically and mechanically connected to the printed wiring board300via the plurality of terminals204. For example, each of the terminals204is a solder ball. The plurality of terminals204is disposed like a lattice.

The processing module100includes an RC series circuit51, and a plurality of (e.g., two) capacitors52and53. The RC series circuit51and the capacitors52and53are mounted on the printed wiring board300. The RC series circuit51is disposed, corresponding to the circuit2021. The capacitor52is disposed, corresponding to the circuit2022. The capacitor53is disposed, corresponding to the circuit2023. The RC series circuit51and the capacitors52and53are disposed on the power supply path for reducing the power-supply potential fluctuation, or the power supply noise, produced by the operation of the semiconductor device200. The RC series circuit51and the capacitors52and53are each disposed between the power supply line and the ground line of the power supply path. The RC series circuit51includes at least one resistor and at least one capacitor. In the present embodiment, the RC series circuit51is constituted by a resistor51R and a capacitor51C. The resistor51R and the capacitor51C are connected in series with each other.

The printed wiring board300includes an insulating board310. The insulating board310is formed like a flat board, and includes a pair of main surfaces311and312. The main surface312is opposite to the main surface311. In the present embodiment, the semiconductor device200is disposed on the main surface311of the insulating board310of the printed wiring board300, and the RC series circuit51and the capacitors52and53are disposed on the main surface312of the insulating board310of the printed wiring board300. When viewed in a Z direction, the RC series circuit51and the capacitors52and53are disposed at positions that overlap with the semiconductor device200. The Z direction is a direction that is perpendicular to the main surfaces311and312.

FIG.3is a schematic diagram for illustrating a wiring structure of a portion of the processing module100of the embodiment, on which the RC series circuit51and the capacitors52and53are mounted.FIG.4is an equivalent circuit diagram of an electric circuit100E included in the processing module100of the embodiment. The printed wiring board300includes a plurality of conductor layers301,302, and303, and solder resist layers (not illustrated). Each of the conductor layers301to303is a layer on which conductor patterns are formed. The conductor layer301is an outer layer, or a surface layer, formed on the main surface311; and the conductor layer302is an outer layer, or a surface layer, formed on the main surface312. The conductor layer303is an inner layer formed in the insulating board310, that is, between the conductor layer301and the conductor layer302. In each of the conductor layers301and302, the portion of the conductor patterns other than the pads used for solder joint is covered with a solder resist layer. The pads are solder mask defined (SMD) pads or non-solder mask defined (NSMD) pads.

The plurality of terminals204includes a power supply terminal211E, a ground terminal211G, a power supply terminal212E, a ground terminal212G, a power supply terminal213E, and a ground terminal213G. The power supply terminal211E is one example of a first power-supply terminal. The ground terminal211G is one example of a first ground terminal. The power supply terminal212E is one example of a second power-supply terminal. The ground terminal212G is one example of a second ground terminal. The power supply terminal213E is one example of the second power-supply terminal. The ground terminal213G is one example of the second ground terminal. The power supply terminal211E is electrically connected to a power supply terminal of the circuit2021, and the ground terminal211G is electrically connected to a ground terminal of the circuit2021. The power supply terminal212E is electrically connected to a power supply terminal of the circuit2022, and the ground terminal212G is electrically connected to a ground terminal of the circuit2022. The power supply terminal213E is electrically connected to a power supply terminal of the circuit2023, and the ground terminal213G is electrically connected to a ground terminal of the circuit2023.

The circuit2021is electrically connected to the printed wiring board300via the power supply terminal211E and the ground terminal211G. The circuit2022is electrically connected to the printed wiring board300via the power supply terminal212E and the ground terminal212G. The circuit2023is electrically connected to the printed wiring board300via the power supply terminal213E and the ground terminal213G.

The printed wiring board300includes a power supply line321E that is electrically connected with the power supply terminal211E, and a power supply line322E that is electrically connected with the power supply terminal212E and the power supply terminal213E. Thus, the circuit2021is electrically connected to the power supply line321E via the power supply terminal211E, and electrically connected to a ground line320G via the ground terminal211G. The circuit2022is electrically connected to the power supply line322E via the power supply terminal212E, and electrically connected to the ground line320G via the ground terminal212G. The circuit2023is electrically connected to the power supply line322E via the power supply terminal213E, and electrically connected to the ground line320G via the ground terminal213G. The power supply line321E is one example of a first power supply line. The power supply line322E is one example of a second power supply line. The printed wiring board300includes the ground line320G that is electrically connected with the ground terminals211G,212G, and213G. That is, the ground terminals211G,212G, and213G are electrically connected with each other via the common ground line320G.

The capacitor51C has a pair of electrodes11and12. The resistor51R has a pair of electrodes13and14. The capacitor52has a pair of electrodes15and16. The capacitor53has a pair of electrodes17and18.

The RC series circuit51, the capacitor52, and the capacitor53respectively reduce the power-supply potential fluctuation of the circuit2021, the circuit2022, and the circuit2023. Each of the capacitors51C,52, and53is a so-called bypass capacitor. The RC series circuit51is disposed between the power supply terminal211E and the ground terminal211G. The capacitor52is disposed between the power supply terminal212E and the ground terminal212G. The capacitor53is disposed between the power supply terminal213E and the ground terminal213G.

The power supply terminal211E of the semiconductor device200and the electrode11of the capacitor51C are electrically connected with each other via the power supply line321E. The power supply terminal212E of the semiconductor device200, the power supply terminal213E of the semiconductor device200, the electrode15of the capacitor52, and the electrode17of the capacitor53are electrically connected with each other via the power supply line322E. The ground terminals211G,212G, and213G of the semiconductor device200, the electrode14of the resistor51R, the electrode16of the capacitor52, and the electrode18of the capacitor53are electrically connected with each other via the ground line320G. The electrode12of the capacitor51C and the electrode13of the resistor51R are electrically connected with each other via a connection line323.

The power supply lines321E and322E and the ground line320G are the power supply path, via which the power supply device140supplies electric power to the semiconductor device200. Thus, the circuits2021,2022and2023of the semiconductor element202are supplied with the electric power, or the power supply current, by the power supply device140via the power supply lines321E and322E.

Each of the power supply line321E, the power supply line322E, the ground line320G, and the connection line323is a conductor formed on the insulating board310and made of a material such as copper.

The power supply line321E includes a power supply pattern331E formed in the conductor layer301, a power supply pattern341E formed in the conductor layer302, and a power supply via351E formed in contact with the power supply pattern331E and the power supply pattern341E.

The power supply via351E is a via conductor that connects the power supply pattern331E and the power supply pattern341E. A pad of the power supply pattern331E is joined with the power supply terminal211E. A pad of the power supply pattern341E is joined with the electrode11of the capacitor51C.

The power supply line322E includes power supply patterns332E and333E formed in the conductor layer301, and a power supply pattern342E formed in the conductor layer302. In addition, the power supply line322E includes a power supply via352E formed in contact with the power supply pattern332E and the power supply pattern342E, and a power supply via353E formed in contact with the power supply pattern333E and the power supply pattern342E.

The power supply via352E is a via conductor that connects the power supply pattern332E and the power supply pattern342E. The power supply via353E is a via conductor that connects the power supply pattern333E and the power supply pattern342E. A pad of the power supply pattern332E is joined with the power supply terminal212E. A pad of the power supply pattern333E is joined with the power supply terminal213E. One of two pads of the power supply pattern342E is joined with the electrode15of the capacitor52, and the other is joined with the electrode17of the capacitor53.

The ground line320G includes a ground pattern331G formed in the conductor layer301, a ground pattern332G formed in the conductor layer301, and a ground pattern333G formed in the conductor layer301. The ground line320G also includes a ground pattern341G formed in the conductor layer302, a ground pattern342G formed in the conductor layer302, and a ground pattern343G formed in the conductor layer302. The ground line320G also includes a ground via351G formed in contact with the ground pattern331G and the ground pattern341G. The ground line320G also includes a ground via352G formed in contact with the ground pattern332G and the ground pattern342G. The ground line320G also includes a ground via353G formed in contact with the ground pattern333G and the ground pattern343G.

The ground via351G is a via conductor that connects the ground pattern331G and the ground pattern341G. A pad of the ground pattern331G is joined with the ground terminal211G. A pad of the ground pattern341G is joined with the electrode14of the resistor51R.

The ground via352G is a via conductor that connects the ground pattern332G and the ground pattern342G. A pad of the ground pattern332G is joined with the ground terminal212G. A pad of the ground pattern342G is joined with the electrode16of the capacitor52.

The ground via353G is a via conductor that connects the ground pattern333G and the ground pattern343G. A pad of the ground pattern333G is joined with the ground terminal213G. A pad of the ground pattern343G is joined with the electrode18of the capacitor53.

One of two pads of the connection line323is joined with the electrode12of the capacitor51C, and the other is joined with the electrode13of the resistor51R.

The power supply via351E is disposed close to the capacitor51C. The power supply via352E is disposed close to the capacitor52. The power supply via353E is disposed close to the capacitor53. The ground via351G is disposed close to the resistor51R. The ground via352G is disposed close to the capacitor52. The ground via353G is disposed close to the capacitor53.

The power supply device140includes a power supply terminal1401(FIG.4) and a ground terminal1402. The power supply terminal1401of the power supply device140is electrically connected to the power supply line322E. The ground terminal1402of the power supply device140is electrically connected to the ground line320G. The power supply device140includes a power supply circuit1400that supplies electric power to the circuits2021,2022, and2023.

The ground line320G includes a ground pattern364G formed in the conductor layer302, and a ground via354G disposed close to the power supply device140. A pad of the ground pattern364G is joined with the ground terminal1402of the power supply device140. The ground pattern364G is in contact with the ground via354G, so that the ground pattern364G is connected to the ground via354G.

The ground line320G also includes a ground pattern350G formed in the conductor layer303, which is formed in the insulating board310(FIG.2). The ground pattern350G is a solid conductor pattern formed in almost all the conductor layer303. The ground pattern350G is in contact with the ground via351G, the ground via352G, the ground via353G, and the ground via354G in the conductor layer303; and is connected to the ground via351G, the ground via352G, the ground via353G, and the grand via354G.

In addition, a low pass filter is disposed between the power supply line321E and the power supply line322E. In the present embodiment, a ferrite bead160as the low pass filter is disposed between the power supply line321E and the power supply line322E. The ferrite bead160is an electric component that electrically connects the power supply line321E and the power supply line322E. The ferrite bead160is one example of noise filters. The ferrite bead160has a pair of electrodes21and22. The electrode21is joined with a pad of the power supply pattern341E of the power supply line321E. The electrode22is joined with a pad of the power supply pattern342E of the power supply line322E.

The power supply terminal1401of the power supply device140is electrically connected to the power supply terminals212E and213E of the semiconductor device200, the electrode15of the capacitor52, and the electrode17of the capacitor53via the power supply line322E. In addition, the power supply terminal1401of the power supply device140is electrically connected to the electrode22of the ferrite bead160via the power supply line322E. In addition, the power supply terminal1401of the power supply device140is electrically connected to the power supply terminal211E of the semiconductor device200and the electrode11of the capacitor51C via the power supply line322E, the ferrite bead160, and the power supply line321E.

The ground terminal1402of the power supply device140is electrically connected to the ground terminals211G,212G, and213G of the semiconductor device200via the ground line320G. In addition, the ground terminal1402of the power supply device140is electrically connected to the electrode14of the resistor51R, the electrode16of the capacitor52, and the electrode18of the capacitor53.

In the above-described wiring structure, the power supply device140applies a direct-current voltage between the power supply line322E and the ground line320G, and thereby supplies electric power, or power supply current, to the circuits2021,2022, and2023. The power supply terminal211E of the semiconductor device200is applied with a power supply potential by the power supply device140, via the power supply line322E, the ferrite bead160that is one example of noise filters, and the power supply line321E. The power supply terminals212E and213E of the semiconductor device200are applied with a power supply potential by the power supply device140, via the power supply line322E. The ground terminals211G to213G of the semiconductor device200are applied with a ground potential via the ground line320G.

The circuit2021includes a circuit element31and a capacitance component41. The circuit2022includes a circuit element32and a capacitance component42. The circuit2023includes a circuit element33and a capacitance component43. The circuit element31is one example of a first circuit element. The circuit element32is one example of a second circuit element. The circuit element33is one example of the second circuit element. The capacitance component41is one example of a first capacitance component. The capacitance component42is one example of a second capacitance component. The capacitance component43is one example of the second capacitance component. The capacitance components41,42, and43are capacitors that are called on-die capacitors.

The circuit element31transmits a digital signal S1. The circuit element32transmits a digital signal S2. The circuit element33transmits a digital signal S3. The digital signal S1transmitted by the circuit element31is one example of a first digital signal. The digital signal S2transmitted by the circuit element32is one example of a second digital signal. The digital signal S3transmitted by the circuit element33is one example of the second digital signal.

A transmission rate R1(bps) of the digital signal S1transmitted by the circuit element31is higher than transmission rates R2and R3(bps) of the digital signals S2and S3transmitted by the circuit elements32and33. In other words, the transmission rates R2and R3(bps) of the digital signals S2and S3are lower than the transmission rate R1(bps) of the digital signals S1. That is, R1>R2and R1>R3. The transmission rate R1is a first transmission rate. The transmission rate R2is a second transmission rate. The transmission rate R3is the second transmission rate.

A voltage amplitude A1of the digital signal S1transmitted by the circuit element31is smaller than voltage amplitudes A2and A3of the digital signals S2and S3transmitted by the circuit elements32and33. That is, A1<A2and A1<A3. The voltage amplitude A1is a first voltage amplitude. The voltage amplitude A2is a second voltage amplitude. The voltage amplitude A3is the second voltage amplitude. In addition, a capacitance C1of the capacitance component41is larger than capacitances C2and C3of the capacitance components42and43. In other words, the capacitances C2and C3of the capacitance components42and43are smaller than the capacitance C1of the capacitance component41. That is, C1>C2and C1>C3. The capacitance C1is a first capacitance. The capacitance C2is a second capacitance. The capacitance C3is the second capacitance. In addition, power supply currents I2and I3respectively suppled to the circuits2022and2023when the circuits2022and2023operate are larger than a power supply current I1supplied to the circuit2021when the circuit2021operates. That is, I1<I2and I1<I3. The power supply current I1is a first power-supply current. The power supply current I2is a second power-supply current. The power supply current I3is the second power-supply current.

Next, an electric circuit included in a processing module of a comparative example will be described.FIG.8is an equivalent circuit diagram of an electric circuit100EX included in the processing module of the comparative example. The electric circuit100EX includes a power supply device140X and three circuits2021X,2022X, and2023X. The power supply device140X and the circuits2021X,2022X, and2023X are electrically connected with each other via a power supply line321EX and a ground line320GX. The power supply device140X includes a power supply circuit1400X, a power supply terminal1401X, and a ground terminal1402X for supplying electric power to the circuits2021X to2023X. The power supply terminal1401X is connected to the power supply line321EX and the ground terminal1402X is connected to the ground line320GX.

The circuit2021X includes a circuit element31X and a capacitance component41X. For reducing the power-supply potential fluctuation of the circuit2021X, an RC series circuit51X is connected between the power supply line321EX and the ground line320GX. The RC series circuit51X is constituted by a capacitor51CX and a resistor51RX.

The circuit2022X includes a circuit element32X and a capacitance component42X. For reducing the power-supply potential fluctuation of the circuit2022X, a capacitor52X is connected between the power supply line321EX and the ground line320GX.

The circuit2023X includes a circuit element33X and a capacitance component43X. For reducing the power-supply potential fluctuation of the circuit2023X, a capacitor53X is connected between the power supply line321EX and the ground line320GX.

The ferrite bead160of the present embodiment is not disposed on the power supply line321EX of the electric circuit100EX of the comparative example. The configuration of the circuits2021X to2023X is the same as that of the circuits2021to2023. If the power supply noise produced by the operation of the circuits2022X and2023X propagates to the circuit2021X, the operation of the circuit2021X becomes unstable. The digital signal S1transmitted by the circuit2021X is higher in speed than the digital signals S2and S3transmitted by the circuits2022X and2023X. That is, the digital signals S2and S3are lower in speed than the digital signal S1. The voltage amplitude A1of the digital signal S1is smaller than the voltage amplitudes A2and A3of the digital signals S2and S3, and the capacitance C1of the capacitance component41X is larger than the capacitances C2and C3of the capacitance components42X and43X. In addition, power supply currents I2and I3respectively suppled to the circuits2022X and2023X when the circuits2022X and2023X operate are larger than the power supply current I1supplied to the circuit2021X when the circuit2021X operates. Thus, if the power supply noise produced by the operation of the circuits2022X and2023X propagates to the circuit2021X, the operation of the circuit2021X is affected by the power supply noise.

In the present embodiment, the power supply noise produced by the operation of the circuits2022and2023can be reduced from propagating to the circuit2021, by the ferrite bead160and the RC series circuit51. Since the power supply noise is reduced, the operation of the circuits2021to2023(in particular, the circuit2021) becomes stable. In addition, in the present embodiment, since the RC series circuit51, instead of only a capacitor, is connected between the power supply terminal211E and the ground terminal211G that are electrically connected with the circuit2021, the power-supply potential fluctuation can be effectively reduced.

Example

Hereinafter, experimental results obtained in Example 1 and Comparative Example 1 will be described. Comparative Example 1 is a specific example of the above-described comparative example. Example 1 is a specific example of the above-described embodiment.

Comparative Example 1

InFIG.8, the capacitance component41X and the capacitor51CX constitute a parallel circuit, and the parallel circuit and a parasitic inductance that is parasitic on each line segment constitute a resonance circuit. Note that each line segment includes not only the parasitic inductance but also a parasitic resistance. A characteristic of a source impedance Z11of the circuit element31X of the circuit2021X is affected by the resonance circuit.

Similarly, the capacitance component42X and the capacitor52X constitute a parallel circuit, and the parallel circuit and a parasitic inductance that is parasitic on each line segment constitute a resonance circuit. Note that each line segment includes not only the parasitic inductance but also a parasitic resistance. A characteristic of a source impedance Z11of the circuit element32X of the circuit2022X is affected by the resonance circuit.

Similarly, the capacitance component43X and the capacitor53X constitute a parallel circuit, and the parallel circuit and a parasitic inductance that is parasitic on each line segment constitute a resonance circuit. Note that each line segment includes not only the parasitic inductance but also a parasitic resistance. A characteristic of a source impedance Z11of the circuit element33X of the circuit2023X is affected by the resonance circuit.

FIG.9Ais a graph illustrating a simulation result on the source impedance characteristic of Comparative Example 1. InFIG.9A, the source impedance Z11corresponding to the circuit element31X is denoted by Z11X1, the source impedance Z11corresponding to the circuit element32X is denoted by Z11X2, and the source impedance Z11corresponding to the circuit element33X is denoted by Z11X3. InFIG.9A, the source impedance Z11X1is indicated by a solid line. InFIG.9A, the source impedance Z11X2is indicated by a broken line. InFIG.9A, the source impedance Z11X3is indicated by a dotted line.

In the simulation, the capacitance of the capacitance component41X was set at 800 pF, and the capacitance of the capacitance components42X and43X was set at 0 F. The capacitance of the capacitors51CX,52X, and53X was set at 1 μF. The electrical resistance value of the resistor51RX was set at 1.1Ω. The inductance value of the power supply line that connects the capacitor51CX and the circuit element31X was set at 1040 pH. The inductance value of the power supply line that connects the capacitor52X and the circuit element32X was set at 720 pH. The inductance value of the power supply line that connects the capacitor53X and the circuit element33X was set at 950 pH.

The source impedance Z11X2increases in a frequency band higher than a self-resonant frequency of the capacitor52X and the source impedance Z11X3increases in a frequency band higher than a self-resonant frequency of the capacitor53X. On the other hand, in the source impedance Z11X1, anti-resonance occurs in a frequency band higher than a self-resonant frequency of the capacitor51CX. The anti-resonance is caused by the capacitance component41X and the parasitic inductance of the power supply path of the printed wiring board and the semiconductor package. The resonant frequency ω at which the anti-resonance occurs in the circuit is expressed by the equation (1).

ω=1LC(1)

If a value of 1040 pH is substituted for L and a value of 800 pF is substituted for C in the equation (1), the resonant frequency ω becomes 174 MHz. The source impedance Z11X1of the circuit element31X has the maximum value, or the peak value, at the resonant frequency ω, caused by the occurrence of the anti-resonance. The source impedance Z11X1decreases in a frequency band higher than the resonant frequency ω.

Each of the circuit elements31X to33X is supplied with electric power, necessary for operating the circuit element, mainly from a capacitance component and a capacitor disposed close to the circuit element. At and near the frequency at which the anti-resonance occurs, each of the source impedances Z11X2and Z11X3is lower than the source impedance Z11X1. Thus, the circuit2021X is subjected to the interference of the power supply noise produced by the operation of the circuits2022X and2023X. In particular, in a case where the circuits2022X and2023X operate at low speed and the circuit2021X operates at high speed, the voltage amplitudes A2and A3of the digital signals S2and S3are larger than the voltage amplitude A1of the digital signal S1. Thus, the power-supply potential fluctuation measured in the circuit2021X becomes larger.

FIG.9Bis a graph illustrating a simulation result on the transfer impedance characteristic of Comparative Example 1. A transfer impedance Z12between the circuit element31X of the circuit2021X and the circuit element32X of the circuit2022X is denoted by Z12X12. A transfer impedance Z12between the circuit element31X of the circuit2021X and the circuit element33X of the circuit2023X is denoted by Z12X13. InFIG.9B, the transfer impedance Z12X12is indicated by a broken line. InFIG.9B, the transfer impedance Z12X13is indicated by a dotted line. In particular, the transfer impedance Z12X13has a higher value in a frequency band up to the frequency 174 MHz at which the anti-resonance occurs.

FIG.9Cis a graph illustrating a simulation result on the power-supply potential fluctuation of the circuit element31X of Comparative Example 1. As illustrated inFIG.9C, the maximum amplitude of the power-supply potential fluctuation is 112 mV. The circuit2021X operates in a cycle of 140 MHz, and the circuits2022X and2023X operate every 50 nsec. When the circuit2021X operates alone, the power-supply potential fluctuation obtained in the simulation is 86 mV. In this case, even if the resistance value of the resistor51RX is 0Ω, the power-supply potential fluctuation is 104 mV. Thus, the power-supply potential fluctuation is increased by the noise interference.

The present inventors have found that when electric power is supplied from the single power supply device140X to the two or more circuits2021X to2023X having different features, the noise interference occurs through the power supply path.

In addition, the present inventors have assumed that in the configuration for reducing the source impedance of the high-speed circuit2021X, if the low-speed circuits2022X and2023X are connected to the power supply line321EX having the same electric potential, the path for supplying current changes. Thus, the present inventors have assumed that since the circuit element31X is supplied with electric power from the capacitor52X or53X, the noise interference occurs.

In addition, the present inventors have studied a configuration in which a high-impedance noise filter is disposed between the circuit element31X and the circuit elements32X and33X a capacitor is disposed in place of the RC series circuit51X; and an RC series circuit is disposed in place of the capacitor52X. As a result, the present inventors have found that even in such a configuration, since the circuit element31X is supplied with electric power from the capacitor53X, the noise interference occurs.

Example 1

An electric circuit100E illustrated inFIG.4will be described. The capacitance C1of the capacitance component41of the circuit2021was set at 800 pF. The capacitance of the capacitor51C of the RC series circuit51was set at 1 μF. The electrical resistance value of the resistor51R of the RC series circuit51was set at 1.1Ω.

The capacitance C2of the capacitance component42of the circuit2022was approximated at 0 pF. The capacitance of the capacitors52was set at 1 μF. The capacitance C3of the capacitance component43of the circuit2023was also approximated at 0 pF. The capacitance of the capacitors53was also set at 1 μF. Note that the capacitances C1, C2, and C3of the capacitance components41,42, and43can be measured by using an instrument, such as an LCR meter or a network analyzer.

The inductance value of the power supply line that connects the capacitor51C and the circuit element31was set at 1040 pH. The inductance value of the power supply line that connects the capacitor52and the circuit element32was set at 720 pH. The inductance value of the power supply line that connects the capacitor53and the circuit element33was set at 950 pH. The ferrite bead160used is a low-pass-filer component that has an impedance value of 120Ω at 100 MHz.

By the way, if the capacitance of a capacitance component disposed in the semiconductor integrated circuit is increased, the source impedance is decreased in a high-frequency band. Thus, when the circuit operates at high speed, the power-supply potential fluctuation can be effectively reduced. For this reason, it is preferable that a capacitance component be disposed in the circuit (in particular, the circuit that operates at high speed), for reducing the power-supply potential fluctuation. On the other hand, an I/O power source included in a circuit that operates at low speed has high noise resistance. For this reason, it is preferable that no capacitance component be disposed in the circuit, and that a capacitor be disposed on the printed wiring board for reducing inductance and reducing the power-supply potential fluctuation.

In the circuit configuration illustrated inFIG.4, the source impedance Z11of each of the circuit elements31,32, and33was simulated.FIG.5Ais a graph illustrating a simulation result on the source impedance characteristic of Example 1. InFIG.5A, a source impedance Z11corresponding to the circuit element31is denoted by Z111, a source impedance Z11corresponding to the circuit element32is denoted by Z112, and a source impedance Z11corresponding to the circuit element33is denoted by Z113. InFIG.5A, the source impedance Z111is indicated by a solid line. InFIG.5A, the source impedance Z112is indicated by a broken line. InFIG.5A, the source impedance Z113is indicated by a dotted line.

The peak value of the source impedance Z111caused by the anti-resonance is made smaller than that of Comparative Example 1 at and near the anti-resonant frequency of 174 MHz, by the resistor51R and the ferrite bead160.

FIG.5Bis a graph illustrating a simulation result on the transfer impedance characteristic of Example 1. A transfer impedance Z12between the circuit element31of the circuit2021and the circuit element32of the circuit2022is denoted by Z1212. A transfer impedance Z12between the circuit element31of the circuit2021and the circuit element33of the circuit2023is denoted by Z1213. InFIG.5B, the transfer impedance Z1212is indicated by a broken line. InFIG.5B, the transfer impedance Z1213is indicated by a dotted line. In comparison with Comparative Example 1 illustrated inFIG.9B, the transfer impedances Z1212and Z1213have smaller values in a frequency band equal to or larger than 1 MHz, so that the noise interference is reduced. In particular, the transfer impedances Z1212and Z1213are significantly decreased at and near the frequency of 174 MHz at which the anti-resonance occurs in the circuit element31.

FIG.5Cis a graph illustrating a simulation result on the power-supply potential fluctuation of the circuit element31of Example 1. The maximum amplitude of the power-supply potential fluctuation is 77.9 mV. Thus, the noise interference is reduced, and the power-supply potential fluctuation is reduced.

In this manner, the transfer impedances Z1212and Z1213are reduced in both of a frequency band in which the low-speed circuit elements32and33are supplied with electric power from the capacitors52and53, and a frequency band in which the anti-resonance occurs in the high-speed circuit element31. Therefore, the noise interference is reduced between the circuit element31and the circuit elements32and33.

Even if the circuit elements32and33operate periodically, the noise interference is reduced between the circuit element31and the circuit elements32and33because the transfer impedances Z1212and Z1213are reduced in a frequency band in which the circuit elements32and33are supplied with electric power from the capacitors52and53. Note that a circuit element that operates periodically is, for example, a circuit element that transmits periodic signals.

The effective range of the value of each of the capacitance component41, the capacitor51C, the resistor51R, and the ferrite bead160is a range that allows the source impedance caused by the anti-resonance of the circuit element31, to be reduced. In addition, it is preferable that the anti-resonance of source impedance do not occur at half the operating frequency of the circuit element31and at double the operating frequency (i.e., the frequency of the second harmonic) of the circuit element31.

The source impedance in a case where the ferrite bead160is not disposed is determined by the capacitor51C, the capacitance component41, and the parasitic inductance of the power supply path. For example, inFIG.9A, the source impedance Z11X1is 5.9Ω at the frequency of 174 MHz at which the anti-resonance occurs. Thus, if the source impedance Z111is made smaller than 5.9Ω by adding the ferrite bead160, the noise interference can be reduced.

In the circuit configuration of Example 1, if the capacitance of the capacitance component41is decreased to 400 pF, the resonant frequency becomes 247 MHz. In this case, since the resonant frequency is lower than the frequency (i.e., 280 MHz) of the second harmonic, the noise interference can be effectively reduced.

If the electrical resistance value of the resistor51R is increased, the source impedance increases in a low-frequency band. Thus, it is preferable that the constant, or the electrical resistance value, of the resistor51R be not increased excessively. Specifically, it is preferable that the electrical resistance value of the resistor51R be determined in consideration of the source impedance obtained at half the operating frequency and at the frequency at which the anti-resonance occurs in the circuit elements32and33.

The capacitance of the capacitance component41is larger than the capacitance of the capacitance components42and43. In the simulation, the capacitance of the capacitance components42and43was set at 0 F for a case where capacitance cells are not disposed on the circuits2022and2023. However, the present disclosure is not limited to this. Since the circuits2022and2023have parasitic capacitance, the capacitance components42and43may be the parasitic capacitance.

In addition, the power supply device140may not be directly connected to the power supply line322E. For example, a noise filter (not illustrated) may be disposed between the power supply terminal1401of the power supply device140and the power supply line322E.

In addition, the ground line320G may include a plurality of grounds independent from each other, and the plurality of ground terminals211G to213G may be connected to respective ones of the plurality of grounds. The ground patterns independent from each other may be connected with each other via noise filters, such as ferrite beads.

In addition, each of the capacitors52and53may not necessarily be a single capacitor component, and may be a plurality of capacitor components connected in parallel with each other. In addition, for suppressing the increase of the source impedance, it is preferable that a resistor be not connected in series with each of the capacitors52and53.

In addition, since the capacitor51C and the resistor51R of the RC series circuit51have only to be connected in series with each other, the positional relationship between the capacitor51C and the resistor51R is not limited to the positional relationship illustrated inFIG.4. For example, the capacitor51C and the resistor51R may be interchanged in position. In addition, although the description has been made for the case where the electric circuit100E includes the single RC series circuit51, the present disclosure is not limited to this. For example, the electric circuit100E may include a plurality of RC series circuits51connected in parallel with each other.

In addition, although the description has been made for the case where the noise filter that electrically connects the power supply line321E and the power supply line322E is the ferrite bead160, the present disclosure is not limited to this. For example, it is preferable that the noise filter be a low pass filter that includes a chip inductor.

In addition, the noise filter has only to be a component that has an impedance larger than the source impedance of each of the circuit elements31,32, and33. For example, the noise filter may be a jumper wire.

In addition, the noise filter may not be a single noise filter. For example, another noise filter may be disposed on the ground line.

In addition, although the description has been made for the case where the circuits2021,2022, and2023are included in the identical semiconductor device200, the present disclosure is not limited to this. For example, the circuits2021,2022, and2023may be semiconductor devices different from each other.

In addition, although the description has been made for the case where the terminal structure of the semiconductor device200is BGA, the present disclosure is not limited to this. For example, the terminal structure of the semiconductor device200may be a land grid array (LGA) or a lead frame.

In addition, although the description has been made for the case where the resistor51R and the capacitors51C,52, and53are mounted on the main surface312of the printed wiring board300opposite to the main surface311on which the semiconductor device200is mounted, the present disclosure is not limited to this. In addition, although the description has been made for the case where the ground pattern350G of the printed wiring board300is formed in the conductor layer303that is an inner layer, the present disclosure is not limited to this. The ground line320G may have any wiring structure as long as the ground line320G has a low impedance.

Other Modifications

In the above-described embodiment, the description has been made for the case where the electric circuit100E includes the circuits2022and2023, as one example case in which the electric circuit100E includes a plurality of second circuits. However, the present disclosure is not limited to this.FIG.6is a diagram illustrating an electric circuit100E1of a modification.FIG.6illustrates an equivalent circuit of the electric circuit100E1. As illustrated inFIG.6, the present invention can also be applied when the electric circuit100E1includes a single second circuit, for example, when the electric circuit100E1does not include the circuit2023and the capacitor53.

In addition, since the RC series circuit has only to include at least one resistor and at least one capacitor, the RC series circuit can be variously modified.FIGS.7A to7Care diagrams each illustrating one example of an RC series circuit of a modification. Each ofFIGS.7A to7Cillustrates an equivalent circuit of an RC series circuit and a surrounding circuit connected to the RC series circuit.

An RC series circuit511of a modification illustrated inFIG.7Aincludes a single capacitor51C and two resistors51R1and51R2. The two resistors51R1and51R2are connected in parallel with each other. The capacitor51C and a parallel circuit constituted by the two resistors51R1and51R2are connected in series with each other. If the combined-resistance value of the parallel circuit, constituted by the two resisters51R1and51R2, is 1.1Ω, the electrical resistance value of each of the resistors51R1and51R2is 2.2Ω.

An RC series circuit512of a modification illustrated inFIG.7Bincludes two capacitors51C1and51C2and a single resistor51R. These components may be connected in series with each other in the order of the capacitor51C1, the resistor51R, and the capacitor51C2.

An RC series circuit513of a modification illustrated inFIG.7Cincludes two capacitors51C1and51C2and a single resistor51R. The two capacitors51C1and51C2are connected in parallel with each other. The resistor51R and a parallel circuit constituted by the two capacitors51C1and51C2are connected in series with each other.

In this manner, the configuration of the RC series circuit can be variously modified. In addition, a plurality of RC series circuits of a modification may be connected in parallel with each other.

The present invention is not limited to the above-described embodiment, and can be modified within a technical concept of the present invention. In addition, the effects described in the embodiment are merely examples of the most suitable effects produced by the present invention. Thus, the effects of the present invention are not limited to the effects described in the embodiment.

In the above-described embodiment, the description has been made for the case where the electronic module is applied to an image pickup apparatus, such as a digital camera, which is an electronic apparatus. However, the present disclosure is not limited to this. For example, the electronic module may be applied to other electronic apparatuses, such as mobile apparatuses, car-mounted apparatuses, and image-forming apparatuses. Examples of the image-forming apparatuses include printers, copying machines, facsimiles, and multifunction products that have these functions.

As described above, the above-described embodiment enables the circuit to operate stably.

While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.

This application claims the benefit of Japanese Patent Application No. 2021-62669, filed Apr. 1, 2021, which is hereby incorporated by reference herein in its entirety.