Patent ID: 12219320

DETAILED DESCRIPTION

The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 70 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.

Notwithstanding that the numerical ranges and parameters setting forth the broad scope of the disclosure are approximations, the numerical values set forth in the specific examples are reported as precisely as possible. Any numerical value, however, inherently contains certain errors necessarily resulting from the deviation normally found in the respective testing measurements. Also, as used herein, the terms “about,” “substantial” and “substantially” generally mean within 10%, 5%, 1% or 0.5% of a given value or range. Alternatively, the terms “about,” “substantial” and “substantially” mean within an acceptable standard error of the mean when considered by one of ordinary skill in the art. Other than in the operating/working examples, or unless otherwise expressly specified, all of the numerical ranges, amounts, values and percentages such as those for quantities of materials, durations of times, temperatures, operating conditions, ratios of amounts, and the likes thereof disclosed herein should be understood as modified in all instances by the terms “about,” “substantial” or “substantially.” Accordingly, unless indicated to the contrary, the numerical parameters set forth in the present disclosure and attached claims are approximations that can vary as desired. At the very least, each numerical parameter should at least be construed in light of the number of reported significant digits and by applying ordinary rounding techniques. Ranges can be expressed herein as being from one endpoint to another endpoint or between two endpoints. All ranges disclosed herein are inclusive of the endpoints, unless specified otherwise.

The present disclosure discusses structures and fabrication methods of Micro-electro mechanical system (MEMS) devices, such as MEMS microphones. Embodiments of the present disclosure are provided. Each embodiment discusses one or more of the features of the proposed MEMS devices. Throughout the present disclosure, one feature with reference to one embodiment is also applicable to another embodiment, unless stated otherwise. Like numerals used throughout the present disclosure indicate like features across different embodiments or drawings.

A MEMS microphone is categorized as one of three types, i.e., a capacitive type, a piezoresistive type and a piezoelectric type. The capacitive-type microphone generally includes a capacitor having a fixed electrode and a movable electrode, in which the movable electrode is configured to move in response to impinging acoustic waves. An electrical voltage or current signal of the capacitor is derived from the varying capacitance between the fixed electrode and movable electrode. The conventional piezoresistive-type microphone includes piezoresistive material used to form a diaphragm. During operation, sound waves cause the diaphragm to vibrate, which, in turn, causes resistance changes proportional to the vibration. Sound waves are thus converted into electrical signals.

A piezoelectric-type microphone generally includes a deformable membrane formed of piezoelectric materials that are used to convert acoustic energy into electrical signals and vice versa. The deformable membrane contains partitioned cantilever beams suspended in a cavity and configured to oscillate in response to received acoustic energy or controlling signals. The cantilever beams should provide sufficient flexibility for deflection to increase sensing sensitivity. On the other hand, the membrane should be rigid enough to withstand shock damage or high sound pressure.

In addition, in many applications the partitioned cantilever beams in the membrane are separated from one another at their tips around the center of the MEMS membrane. Such partitioned design may lead to the problem of beam mismatch or misalignment of the beam tips in a vertical direction perpendicular to the surface of the membrane. The beam mismatch may occur due to manufacturing variations in which some cantilever beams are formed to have a curved shape that bends upwardly while some other cantilever beams are formed to have a curved shape that bends downwardly before sensing is performed. The beam mismatch may leave undesired air gaps around the beam lips, and air leakage may occur due to the air gaps.

In order to address the above challenges, the present disclosure proposes a deformable membrane which is patterned into connected cantilever beams. The cantilever beams are patterned to be partially separated from one another by vias. Through the vias, each cantilever beam is anchored at one end and connected to an adjacent or opposite cantilever beam at another end. As a result of the connected cantilever beam design, the membrane robustness is enhanced. In addition, the via dimensions between adjacent cantilever beams are appropriately managed, and therefore the air pressure exerted onto the membrane can be effectively controlled. The effective control of the dimensions of the vias can facilitate capture of maximal acoustic energy using the cantilever beams while preventing the membrane from being damaged by venting excess air flow through the vias. Furthermore, since all cantilever beams are partially connected, the problem of beam mismatch is reduced or eliminated. In addition, the pattern that forms the cantilever beam allows high strain zones to exist not only in areas adjacent to the edge of the membrane, but also in zones closer to the center of the membrane, thereby increasing sensitivity of the microphone.

FIGS.1A to1Iare cross-sectional views of intermediate stages of a method of manufacturing a MEMS device10, in accordance with some embodiments. In some embodiments, the MEMS device10is a MEMS microphone. In some other embodiments, the MEMS device10is a MEMS acoustic sensor.

Referring toFIG.1A, a substrate102is formed or provided. In some embodiments, the substrate102is a carrier substrate and may be formed of glass, ceramic or other dielectric materials. The substrate102may be a semiconductor substrate, such as a bulk semiconductor, a semiconductor-on-insulator (SOI) substrate, or the like. Generally, an SOI substrate comprises a layer of a semiconductor material formed on an insulator layer. The insulator layer may be, for example, a buried oxide (BOX) layer, a silicon oxide layer, or the like. The insulator layer is provided on a substrate layer that is typically formed of silicon or glass. Other substrates, such as a multi-layered or gradient substrate, may also be used. The substrate102may be doped (e.g., with a P-type or an N-type dopant) or undoped. In some embodiments, the semiconductor material of the substrate102includes (monocrystalline) silicon; however, other materials are also possible, such as germanium; a compound semiconductor including silicon carbide, gallium arsenic, gallium phosphide, indium phosphide, indium arsenide, and/or indium antimonide; an alloy semiconductor including SiGe, GaAsP, AlInAs, AlGaAs, GalnAs, GaInP, and/or GaInAsP; or combinations thereof.

A first dielectric layer104is deposited over a first surface (e.g., front surface)102fof the substrate102. In some embodiments, the dielectric layer104includes silicon oxide; however, other materials, such as silicon nitride, silicon carbide and silicon oxynitride, may also be used. The dielectric layer104is formed by thermal oxidation, thermal nitridation, physical vapor deposition (PVD) including sputtering and evaporation, chemical vapor deposition (CVD), atomic layer deposition (ALD), a combination thereof, or the like.

In some embodiments, another second dielectric layer (not shown) is deposited on a second surface (e.g., back surface)102rof the substrate102. In some embodiments, the second dielectric layer includes silicon oxide; however, other materials, such as silicon nitride, silicon carbide and silicon oxynitride, may also be used. In some embodiments, the second dielectric layer comprises a material that is same as or different from that of the first dielectric layer104. The second dielectric layer is formed by thermal oxidation, thermal nitridation, PVD, CVD, ALD, a combination thereof, or the like.

A protection layer106is formed over the first surface102fof the substrate102. The protection layer106may provide mechanical support for the membrane120(shown inFIG.1C) subsequently formed thereon. The protection layer106is formed of a material different from the first dielectric layer104with respect to etching selectivity. In some embodiments, the protection layer106is formed of silicon (such as polysilicon), germanium, silicon carbide, gallium arsenic, gallium phosphide, indium phosphide, indium arsenide, indium antimonide, SiGe, GaAsP, AlInAs, AlGaAs, GalnAs, GaInP, GaInAsP; combinations thereof, or the like. The protection layer106may be formed by PVD, CVD, ALD, a combination thereof, or the like.

Subsequently, referring toFIG.1B, a first electrode layer110ais deposited over the protection layer106. In some embodiments, the first electrode layer110amay include conductive materials, e.g., materials having a high temperature coefficient of resistance. The first electrode layer110amay include gold, silver, copper, tin, platinum, zinc, molybdenum, calcium, lead, iron, nickel, lithium, titanium, tungsten, aluminum, titanium nitride, combinations thereof, or the like. The first electrode layer110amay be deposited to a thickness between about 5 nm and about 2000 nm. The first electrode layer110amay be deposited by a suitable deposition process, such as PVD, CVD, ALD, electroplating, screen-printing, and the like.

In some embodiments, the first electrode layer110acovers the protection layer106without patterns formed therein. In some embodiments, the first electrode layer110ais further partitioned by a patterning operation. Vias110v-1with a via pattern110pfrom a top-view perspective may be formed accordingly in the first electrode layer110ato partition the first electrode layer110ainto several portions. The patterning operation may be performed using photolithography and etching operations. Portions of the upper surface of the first dielectric layer104are thus exposed.

Referring toFIG.1C, a piezoelectric layer108is deposited over the first electrode layer110a. The piezoelectric layer108may include quartz single crystals, piezoelectric ceramics such as lithium niobate, gallium arsenide, zinc oxide, aluminum nitride and lead zirconate-titanate (PZT), polymer-film piezoelectrics such as polyvinylidene fluoride (PVDF), or the like. The piezoelectric layer108may be deposited to a thickness between about 5 nm and about 2000 nm. The piezoelectric layer108may be deposited by PVD, CVD, ALD, electroplating, screen-printing, sol-gel process, and the like.

Subsequently, a second electrode layer110bis deposited over the piezoelectric layer108. In some embodiments, the second electrode layer110bcovers the piezoelectric layer108without patterns therein. In some embodiments, the second electrode layer110bis formed by a patterning operation. Vias110v-2with a via pattern110qfrom a top-view perspective may be formed accordingly in the second electrode layer110bto partition the second electrode layer110binto several portions.

In some embodiments, the piezoelectric layer108along with the electrode layers110aand110bform a membrane, or a film,120of the MEMS device10and are configured to convert acoustic energy into electric charges in response to the deflection of the piezoelectric layer108. The numbers and configurations of piezoelectric layer108and the electrode layers110aand110bfor forming the membrane120are shown for illustrative purposes. Other materials and numbers of piezoelectric layers and electrode layers110suitable for forming the membrane120are also within the contemplated scope of the present disclosure. Throughout the present disclosure, the membrane120may also be referred to as a piezoelectric film. In some embodiments, during reflection of the membrane120, the protection layer106is configured to deflect along with the deflection of the membrane120but does not function to convert acoustic energy into charges.

A passivation layer116is deposited over the membrane120. In some embodiments, the passivation layer116includes dielectric materials, such as silicon oxide; however, other dielectric materials, such as silicon nitride, silicon carbide and silicon oxynitride, may also be used. The passivation layer116is formed by thermal oxidation, thermal nitridation, PVD, CVD, ALD, a combination thereof, or the like.

FIG.1Dillustrates the forming of recesses on an upper surface of the passivation layer116. A recess122ais formed through the passivation layer116and exposes the upper surface of the second electrode layer110b. The recess122amay be formed using an etching operation, such as a dry etching, a wet etching, an RIE, a plasma etching or the like, with the second electrode layer110bacting as an etch stop layer. In some embodiments, the recess122ahas a circular shape or polygonal shape from a top-view perspective.

Similarly, a recess122bis formed through the passivation layer116, the second electrode layer110band the piezoelectric layer108, and exposes the upper surface of the first electrode layer110a. The recesses122bmay be formed using an etching operation similar to that used to form the recess122a, in which more than one etch with different etchants may be conducted to etch different materials in the membrane120. In some embodiments, the recess122bhas circular shapes or polygonal shapes from a top-view perspective.

Referring toFIG.1E, conductive lines112aand112bare formed and patterned over the passivation layer116and in the corresponding recesses122aand122b. A conductive material is initially conformally deposited over the upper surface of the passivation layer116and in the recesses122aand122bby PVD, CVD, ALD, electroplating, screen-printing or any suitable deposition process. The conductive material may include gold, silver, copper, tin, platinum, zinc, molybdenum, calcium, lead, iron, nickel, lithium, titanium, tungsten, aluminum, titanium nitride, combinations thereof, or the like. A patterning operation is performed to remove excess portions of the conductive material over the surface of the passivation layer116and leave the patterns of the conductive lines112aand112bas desired. For example, the conductive line112ais electrically coupled to the upper surface of the second electrode layer110b, and the conductive line112bis electrically coupled to the upper surface of the first electrode layer110a. In some embodiments, each of the conductive lines112aand112bincludes a vertical portion on the sidewalls of the respective recesses122aand122b, and a horizontal portion extending over the surface of the passivation layer116. In some embodiments, the vertical portion and a portion of the horizontal portion of the conductive line112bis electrically coupled to the second electrode layer110b.

FIG.1Fillustrates the thickening of the passivation layer116. The thickened passivation layer116fills the recesses122aand122band covers the conductive lines112aand112b. The passivation layer116is thickened by thermal oxidation, thermal nitridation, PVD, CVD, ALD, a combination thereof, or the like. The passivation layer116may be deposited in a conformal manner, such that a dimple may be formed over each of the recesses122aand122b.

Subsequently, the passivation layer116and the membrane120are patterned through a patterning operation, as illustrated inFIG.1G. Vias118are formed through the passivation layer116, the membrane120(including the electrode layers110aand110band the piezoelectric layer108) and the protection layer106by an etching operation, such as a dry etching process. In some embodiments, the etch stops at the front surface of the first dielectric layer104facing the membrane120. In other embodiments, the vias118extend downwardly into the substrate102. Through the etching operation, the vias118are formed as having elongated lines and composing a via pattern from a top-view perspective, which defines the cantilever beams of the membrane120. Details of the arrangement of the via pattern in the membrane120are provided in subsequent paragraphs with reference withFIGS.2A to2D and3A to3D.

Referring toFIG.1H, a cavity124is formed in the substrate102. The cavity124may be formed through the substrate102by an etching operation, such as a dry etch, a wet etch, or a combination thereof. Portions of the thinned substrate102around the center are removed through a patterning operation, in which the cavity124has a polygonal shape or circular shape following the pattern of the membrane120as shown inFIGS.2A to2D and3A to3D. A patterned substrate102P (e.g., a periphery of the substrate102) is obtained by the etching operation and acts as an anchor fixing the membrane120. In some embodiments, the patterned substrate102P is further thinned to a thickness, e.g., in a range between about 200 μm to 500 μm.

FIG.1Iillustrates the patterning of the first dielectric layer104to form a patterned first dielectric layer104P. A wet etching operation may be utilized to remove portions of the first dielectric layer104to thereby form a cavity126in communication with the cavity124. A lower surface of the protection layer106is exposed to the cavity126through the patterning. In some embodiments, the cavity126has a polygonal shape or circular shape as shown inFIGS.2A to2D and3A to3D. In some embodiments, the etching operation is performed by subjecting the MEMS device10to vaporized HF. In some embodiments, the cavity126defined by the patterned first dielectric layer104P has a width equal to or greater than a width of the cavity124defined by the patterned substrate102P. In some embodiments, inner sidewalls of the patterned first dielectric layer104P defining the cavity126is aligned with inner sidewalls of the patterned substrate102P defining the cavity. In some embodiments, the patterned first dielectric layer104P has a thinner width than the width of the patterned substrate102P at the peripheral portion, therefore the cavity126is wider than the cavity124. In some embodiments, the patterned substrate102P fully overlaps the patterned first dielectric layer104P. The first cavity124or the second cavity126may include a polygonal shape, such as an octagonal shape. However, other shapes, such as a quadrilateral shape, a hexagonal shape and a circular shape, are also possible.

In some embodiments, the cavity124defines a deformable area201F of the membrane120in which the membrane120is deformable for performing sensing or actuation. The deformable area201F in the cross-sectional view corresponds to a top view201of the membrane120shown inFIG.2A.

In some embodiments, the passivation layer116is removed during the patterning of the first dielectric layer104. Through the removal of the passivation layer116, the conductive lines112aand112band an upper surface of the membrane120are exposed. Furthermore, sidewalls of the membrane120at edges180(shown inFIGS.2Ato2D and3A to3D) are also exposed. In a finalized condition, the membrane120is suspended over the cavities124and126with its sidewalls exposed and the membrane120is anchored at the patterned first dielectric layer104P. In addition, the contiguous membrane120can freely oscillate in the cavities124and126and the vias118of the membrane120are used as air vents and function to moderate air pressure differences on two surfaces of the membrane120for protecting the membrane120from damage. In some embodiments, additional operations are performed to form conductive features (not separately shown) electrically coupling the conductive lines112aand112bto external circuits for performing acoustic sensing or actuation.

FIG.1Jis a cross-sectional view of the MEMS device11, in accordance with some embodiments. The MEMS device11inFIG.1Jis similar to the MEMS device10, expect that the MEMS device11includes an additional via118on the right side of the membrane120. The additional via118exposes a portion of the patterned first dielectric layer104P. As a result, portions of the membrane120adjacent to the additional via118may form a cantilever beam configured to bend toward the center of the membrane120, details of which are provided in subsequent paragraphs. Further, a deformable area301F shown inFIG.1Jcorresponds to a top view301of the membrane120shown inFIG.3A.

FIGS.2A to2D and3A to3Dare schematic top views of various via patterns of the MEMS device10, in accordance with some embodiments. The schematic top views shown inFIGS.2A to2D and3A to3Dillustrate only the membrane120, and other features may be omitted for clarity.FIGS.2A to2D and3A to3Dshow edges180of the membrane120and portions of the membrane120corresponding to the underlying patterned first dielectric layer104P and the cavity126, in which the patterned first dielectric layer104P defines the cavity shape from a top-view perspective.FIGS.2A to2D and3A to3Dalso show that the membrane120has a movable portion suspended over the cavity126and an immovable portion coupled to and anchored at the patterned first dielectric layer104P. Details of the remaining portions of the membrane120between the edge180and the cavity126are not illustrated for simplicity.

FIG.2Ais a top view201of a via pattern118vof the membrane120. The piezoelectric layer108is illustrated inFIG.2Aas the exposed surface of the membrane120and the second electrode layer110bis omitted for clarity. The cross-sectional views ofFIGS.1A to1Iare taken along the sectional line AA shown inFIG.2A. The top view201only covers details of the deformable area201F of the membrane120inFIG.1I.

Referring toFIGS.2A and1I, the patterned first dielectric layer104P includes a circular shape or a ring shape in some embodiments. The membrane120is suspended over the cavity126and124and anchored at the patterned first dielectric layer104P through the piezoelectric layer108. In the present embodiment, a via pattern118vis formed of the vias118as first type lines, e.g., lines118a,118b,118c,118d,118e,118f,118gand118hfrom a top-view perspective. The via pattern118vpartitions the membrane120into multiple (e.g., eight) slices in which an exemplary slice120ais illustrated as a shaded region. In some embodiments, the via pattern118vor the resualtant slices120ais formed as a symmetrical pattern, e.g., with respect to the center of the membrane120. In some other embodimetns, the via patterns (e.g.,128v,138v, . . .188v) inFIGS.2B-3Dor their resualtant slices shown are also formed as symmetrical patterns, e.g., with respect to the center of the membrane120. The slices discussed throughout the present disclosure are configured as movable cantilever beams that can deflect in an (acoustic) sensing or actuation operation. The slices are generally identical in shape and area; however, these slices may have different shapes or areas in other embodiments. In some embodiments, the vias118are equally spaced apart from one another to form the slices of substantially identical shapes and equal areas. These slices are partially separated from each other by the vias118in which the vias118are formed as elongated lines when viewed from above. In some embodiments, each of the vias118has an elongated shape from a top-view perspective with a width and a length, in which the length is greater than five times the width. In some embodiments, each of the vias118has a width and a length greater than ten times the width. In some embodiments, the vias118not only form the via pattern118vbut also function as venting holes that allow air to flow through the membrane120.

In some embodiments, the membrane120has a width (or a diameter) from a top-view perspective between about 1 mm and about 10 mm, and the vias118have a line width from a top-view perspective between about 0.1 μm and about 4 μm, or between about 0.1 μm and about 1 μm. If the line width of the via118is greater than 4 μm, the problem of air leakage may be pronounced and the remaining membrane area may be insufficient to successfully capture energy of the impinging acoustic waves. If the line width of the via118is less than 0.1 μm, the resultant venting holes may be incapable of venting excess air and preventing the membrane from being damaged. In some embodiments, a ratio of a width of the line (via)118and the width of the membrane is between about 0.001 and about 0.1, or between about 0.005 and 0.05.

The slices of the membrane120are formed such that parts of the slices may move away from each other while other parts of the slices remain connected to one another. Using the slice120aas an example, each of the slices in the membrane120includes a first region212at one end and a second region214opposite to the first region212. Further, the via pattern118vdefines a connected region120xthat connects all slices. In some embodiments, each of the first type lines118ato118hexposes the patterned first dielectric layer104P, as shown inFIG.1J.

The first region212is anchored at the patterned first dielectric layer104P and the second region214is connected to other slices through the connected region120x. Throughout the present disclosure, the first regions212of the membrane120, which are anchored at the patterned first dielectric layer104P, are collectively referred to as an anchor region. Because the slices are all connected together through the connected region120x, the membrane120is contiguous across all of the slices and regarded as a patterned one-piece structure. Air is allowed to flow only through the predetermined via pattern118vinstead of through gaps between misaligned slices. As a result, the problem of slice misalignment at the second regions214is mitigated.

The performance of the individual slices is further influenced by their shapes and locations of their connections to other slices. The shape of each slice is determined by formation of the via pattern118v, i.e., the first type lines118athrough118h. The first type lines118ato118hare disposed so that the slices can generate as many high strain zones as possible. In some embodiments, each of the first type lines118athrough118hincludes a polyline structure. For example, the via118aincludes a five-segment polyline. However, the polyline of each first type line118athrough118hmay include other numbers of segments.

In some embodiments, each of the first type lines118ato118hincludes curved lines with no corners. In some embodiments, the via pattern118vis a radial pattern in which the lines118extend from the connected region120xand terminate at the locations of the membrane120directly over the patterned first dielectric layer104P. In some embodiments, the lines118extend in a spiral pattern. In some embodiments, adjacent pairs of lines118are not parallel to each other.

In some embodiments, the patterned first dielectric layer104P has a polygonal shape with sides and vertices connecting the sides. In such embodiments, the first type lines118athrough118hexpose the vertices of the patterned first dielectric layer104P. In some embodiments, the first type lines118athrough118hare formed to follow the sides of the patterned first dielectric layer104P, and an included angle formed thereby is greater than 0 degrees and less than 90 degrees.

In some embodiments, the vias118are formed over the patterned first dielectric layer104P. As a result, portions of the patterned first dielectric layer104P are exposed through the vias118. In some embodiments, each of the lines118includes at least a segment (i.e., a via segment) exposing the patterned first dielectric layer104P.

The piezoelectric layer108of the slice in the piezoelectric membrane120is configured to deflect and generate strain in response to impinging acoustic waves and convert the strain into charges. The electrode layer110aor110bof the slice is configured to collect the generated charges and transmit these charges to a storage region or a detection circuit. Each slice of the membrane120is suspended over the patterned first dielectric layer104P and configured to move with the first region212acting as a fixed anchor and the second region214and the connected region120xacting as pseudo anchors. This means some regions in the membrane120(referred to as non-anchor regions throughout the present disclosure) are configured to deflect with a greater magnitude than those in the anchor or pseudo anchor regions, such as the first regions212, the second regions214and the connected region120x. The deflection s around the non-anchor regions not only aid in generating high intensities of strain at areas around the first regions212adjacent to the patterned first dielectric layer104P, but also aid in generating high or medium intensities of strain at areas around the connected region120xand the second regions214of the slices. As a result, the overall device sensitivity is improved due to increased areas of high and medium intensities of strain. The efficiency of acoustic energy collection can be boosted, and the sensing or actuation performance is enhanced.

Referring toFIG.2B, a top view202of a via pattern128vis shown. The via pattern128vincludes three types of lines117,118and119that partition the membrane120into slices. Specifically, the first type lines118athrough118hextend radially from the anchor region212of the membrane120toward the center of the membrane120, and the second type lines117athrough117hare connected to respective first type lines118athrough118h. Further, third type lines119athrough119hbranch from the respective first type lines118athrough118hand are substantially parallel to the adjacent second type lines117athrough117h. Each slice, e.g., slice120a, includes a first region212anchored at the patterned first dielectric layer104P and a second region214defined by the respective second type line, e.g., line117a, and the third type line, e.g., line119b, of the adjacent slice. Further, the slices are connected to the connected region120x, which is defined by the second type lines117athrough117h, through the second region214.

In some embodiments, the via pattern128vallows the membrane120to move with the first regions212acting as fixed anchors and the connected region120xand the second regions214acting as pseudo anchors. As a consequence, deflections of greater magnitude occur around the non-anchor regions, such as the areas between the first regions212and the second regions214of the slices, and such deflections not only aid in generating high intensities of strain at areas around the first regions212adjacent to the patterned first dielectric layer104P, but also aid in generating high or medium intensities of strain at areas in the second regions214of the slices. As a result, the overall sensitivity is improved due to increased areas of high and medium intensities of strain, and the sensing or actuation performance is enhanced.

Referring toFIG.2C, a top view203of a via pattern138vis shown. The via pattern138vpartitions the membrane120into three types of slices, i.e., slices120a,120band120c. The via pattern138vincludes two types of lines118and128defining the three type of slices. Specifically, the first type lines118, including lines118athrough118h, have a cup shape with a cup bottom, in which the opening of the cup faces the center of the membrane and the cup bottom faces the edge180of the membrane120. The second type lines128, including lines128athrough128h, are straight line segments that meet at the center of the membrane120and are disposed radially toward the edge180of the membrane120. In some embodiments, the eight second type lines128form four straight lines crossing at the center of the membrane120from a top-view perspective. In some embodiments, the second type lines128are separated from the first type lines118.

A connected region120yis formed between the center and the first type lines118. In some embodiments, the first type lines118athrough118hpartition the membrane120into multiple first type slices102a. In some embodiments, each of the first type lines118athrough118hdefines a second type slice102b. In some embodiments, the radially arranged second type lines128partition the membrane120into multiple third type slices102c. The three types of slices120a,120band120care connected together through the connected region120y. In some embodiments, the second type slices120bare aligned with the respective third type slices120c.

During operation, the cup bottoms of the second type slices120bare movable and are configured to bend toward the connected region120ywith a greater deflection magnitude than the deflection magnitude of other portions of the second type slices120b. Similarly, the tips of the third type slices120cat the center of the membrane120are movable and are configured to bend toward the connected region120ywith a greater deflection magnitude than the magnitude of other portions of the third type slice120c.

In some embodiments, the via pattern138vallows the membrane120to move with the first regions212acting as fixed anchors and the connected region120yacting as a pseudo anchor. As a result, deflections of a greater magnitude occur around the non-anchor regions between the first regions212and the connected region120yand the non-anchor regions around the center of the membrane120, and such deflections not only aid in generating high intensities of strain at areas around the first regions212adjacent to the patterned first dielectric layer104P, but also aid in generating high or medium intensities of strain at areas in the connected region120y. As a result, the overall sensitivity is improved due to increased areas of high and medium intensities of strain, and the sensing or actuation performance is enhanced.

Referring toFIG.2D, a top view204of a via pattern148vis shown. The via pattern148vis regarded as a variant of the via pattern138vshown inFIG.2C, and the second type lines128, including lines128athrough128h, in the via pattern148vare polylines each including at least two line segments. In some embodiments, the individual second type lines128are separated from each other.

The via pattern148vincludes first type slices,120a, second type slices120b, third type slices120cand a connected region120ysimilar to those of the via pattern138v. Further, the via pattern148vincludes another connected region120xsimilar to that in the via pattern118v. The third type slices120care connected to one another through the connected region120x. In some embodiments, the first type slices120aare aligned with the respective third type slices120c.

In some embodiments, the via pattern148vallows the membrane120to move with the first regions212acting as fixed anchors and the connected region120yacting as pseudo anchors. As a consequence, deflections of greater magnitude occur around the non-anchor regions between the first regions212and the connected regions120yand the non-anchor region at the connected region120y, and such deflections not only aid in generating high intensities of strain at areas around the first regions212, but also aid in generating high or medium intensities of strain at areas in the connected region120y. As a result, the overall sensitivity is improved due to increased areas of high and medium intensities of strain, and the sensing or actuation performance is enhanced.

Referring toFIG.3A, a top view301of a via pattern158vis shown. The via pattern158vis regarded as a variant of the via pattern118vshown inFIG.2A, and the via pattern158vfurther includes second type lines138, e.g., lines138athrough138h. In some embodiments, each of the first type lines118, e.g., line118a, connects to a second type line138, e.g., line138a. The cross-sectional view ofFIG.1Jis taken along the sectional line BB shown inFIG.3A.

In some embodiments, each of the second type lines138includes two line segments. As an example, a second type line138ais formed of a first line segment138a-1and a second line segment138a-2in communication with the first line segment138a-1. In some embodiments, the first line segment138a-1is formed over the patterned first dielectric layer104P. In some embodiments, the first line segment138a-1exposes the patterned first dielectric layer104P. In some embodiments, the first line segment138a-1is formed on a side of the polygon of the membrane120. In some embodiments, the first line segment138a-1is connected to the respective first type line118a.

In some embodiments, the second line segment138a-2is connected to the first line segment138a-1and extends from the first region212of the membrane120toward the center of the membrane120. In some embodiments, the second line segment138a-2is at least partially parallel to a portion of the respective first type line118athrough118h, e.g., a line segment of the first type line118athat is connected to the first region212of the membrane120. In some embodiments, a width of the first type line segments138-1is different from a width of the second type line segments138-2.

In some embodiments, the second type lines138aaid in forming multiple additional second type slices120bout of the first type slices120a, in a manner similar to that of the formation of the second type slices120binFIG.2C. In some embodiments, the first type slices120aare in communication with the respective second type slices120bthrough a connected region120z. During operation, the second type slices120binclude movable sides adjacent to the first region212of the membrane120. The movable sides are configured to bend toward the connected region120xwith a greater deflection magnitude than the deflection magnitude of other portions of the second type slices120b.

In some embodiments, the via pattern158vallows the membrane120to move with the first regions212acting as fixed anchors and the connected regions120xand120zacting as pseudo anchors. As a consequence, deflections of greater magnitude occur in the non-anchor regions, including the outer portions of the second type slices120badjacent to the edge180and the areas between the first regions212and the second regions214, and such deflections not only aid in generating high intensities of strain at areas around the first regions212, but also aid in generating high or medium intensities of strain at areas in the connected regions120xand120z. As a result, the overall sensitivity is improved due to increased areas of high and medium intensities of strain, and the sensing or actuation performance is enhanced.

Referring toFIG.3B, a top view302of a via pattern168vis shown. The via pattern168vis regarded as a variant of the via pattern158vshown inFIG.3A, and the first type lines118athrough118hin the via pattern168vare formed as straight lines, or the first type lines118athrough118heach include only one line segment.

The second type lines138of the via pattern168vare similar to those of the via pattern158v. In some embodiments, each of the second type lines138includes three line segments. As an example, a second type line138ais formed of a first line segment138a-1, a second line segment138a-2and a second line segment138a-3in communication with one another. In some embodiments, the first line segment138a-1and the second line segment138a-2are formed over the patterned first dielectric layer104P. In some embodiments, the first line segment138a-1and the second line segment138a-2expose the patterned first dielectric layer104P. In some embodiments, the first line segment138a-1and the second line segment138a-2are formed on adjacent sides of the polygon of the membrane120and are connected at a vertex of the polygon of the membrane120. In some embodiments, the first line segment138a-1is connected to the respective first type line118a.

In some embodiments, the third line segment138a-3extends from the anchor region212of the membrane120toward the center of the membrane120. In some embodiments, the third line segment138a-3is at least partially parallel to the respective first type line118a. In some embodiments, the third line segment138a-3has a length less than a length of the first type line118a.

In some embodiments, the via pattern168vfunctions according to a principle similar to that of the via pattern158vand improves the overall sensitivity of the membrane120due to increased areas of high and medium intensities of strain, and the sensing or actuation performance is enhanced.

Referring toFIG.3C, a top view303of a via pattern178vis shown. The via pattern178vis regarded as a variant of the via pattern138vshown inFIG.2Cand the via pattern168vshown inFIG.3B, or a combination thereof. For example, the via pattern178valso includes first type lines118athrough118h, second type lines128athrough128hand third type lines138athrough138hthat cooperatively partition the membrane120into three types of slices, i.e., slices120a,120band120c, of which the first type lines118are polylines, similar to those of the via pattern168v, and the second type lines128are polylines, similar to those of the via pattern138v.

The via pattern178vfurther includes fourth type lines148, e.g., fourth type line148a, extending from an end of the respective third type line138toward an area surrounded by the first type line118and the third type line138. In some embodiments, the fourth type line148aextends between the first type line118and the second line segment138a-2of the third type line138a. In some embodiments, the fourth type lines148extend in a direction nonparallel to a direction in which the first type line118, e.g., line118a, or the second line segment138a-2, e.g., line138a-2, extends.

In some embodiments, each of the second type lines128in the via pattern178vincludes at least two line segments. For example, the second type line128ais formed of a first line segment128a-1and a second line segment128a-2. The second line segments128a-2of the second type lines128meet at the center of the surface of the membrane120. In some embodiments, the first line segment128a-1and the second line segment128a-2form an included angle of substantially 90 degrees. In some embodiments, the second type lines128are arranged in a spiral pattern. In some embodiments, the second type lines128in the via pattern178vare separated from the first type lines118and the third type lines138.

Similar to the slice configuration of the via pattern168v, a connected region120zaround each of the second type slices120bis formed in the via pattern178vbetween the second type slices120band the connected region120y. In some embodiments, the connected region120zis formed between the first type lines118, e.g., line118a, and the respective fourth type lines148, e.g., line148a.

In some embodiments, the via pattern178vfunctions according to a principle similar to that of the via pattern138vor168vand improves the overall sensitivity of the membrane120due to increased areas of high and medium intensities of strain, and the sensing or actuation performance is enhanced.

Referring toFIG.3D, a top view304of a via pattern188vis shown. The via pattern188vcan be regarded as a variant of the via pattern178vshown inFIG.3C, except that second type lines128of the via pattern188vinclude more line segments than the via pattern178v.

In some embodiments, each of the second type lines128is a polyline including at least four line segments, e.g., five line segments. In some embodiments, the second type lines128cut through the center of the membrane120and form multiple cups facing the center of the membrane120. In some embodiments, referring toFIGS.3C and3D, the second type lines128of the via pattern188vpartition the membrane into fourth type slices120din addition to the third type slices120c. The fourth type slices120dmay have a cup shape. The third type slices120care configured to bend toward the edge180of the membrane120. A connected region120wis formed around the lips of the cups in the fourth type slices120d. In some embodiments, the connected region120zis formed between the first type line118, e.g., line118a, and the corresponding fourth type line148, e.g., line148a, and the fourth type slices120dare configured to bend toward the center of the membrane120with the connected region120wacting as a pseudo anchor.

In some embodiments, the via pattern188vfunctions according to a principle similar to that of the via pattern178vand improves the overall sensitivity of the membrane120due to increased areas of high and medium intensities of strain, and the sensing or actuation performance is enhanced.

FIG.4is a schematic plan view401of the electrode layer of the MEMS device10, in accordance with some embodiments. InFIG.4the second electrode layer110bis used as an example. The second electrode layer110bis partitioned into several portions by a partitioning pattern401vcomposed of a partitioning pattern110vand the via pattern118v. As discussed previously with reference toFIG.1C, vias110v-1and110v-2with respective via patterns110pand110qmay be formed in the respective electrode layers110aand110bthrough patterning operations on the electrode layers110aand110b. The via110v-1is filled with the subsequently deposited piezoelectric layer108. As a result, a partitioning pattern110vfilled with piezoelectric materials is formed in the electrode layer110. In addition, although not shown inFIG.4but illustrated inFIG.1I, the via110v-2in the second electrode layer110bare not filled with piezoelectric materials, and expose the underlying piezoelectric layer108.

The electrode layer110aor110bis further patterned with a via pattern, e.g., the via pattern118v, by respective patterning operations described in relation toFIG.1Fduring patterning of the piezoelectric layer108. A resultant via pattern401vof the exemplary electrode layer110bis obtained accordingly. In some embodiments, the electrode layer patterning operation is absent during forming of the MEMS device10, and thus the electrode layer110conly includes the via pattern118videntical to that shown in the piezoelectric layer108.

In some embodiments, the via pattern118vis different from the partitioning pattern110vin that the via pattern118vis formed of hollow vias acting as venting holes of the MEMS device10, while the partitioning pattern110vis filled with solid materials, such as piezoelectric materials of the piezoelectric layer108. In some embodiments, the partitioning pattern110vincludes lines of elongated shapes that partition the second electrode layer110binto separate portions as electrodes. In some embodiments, the partitioning pattern110vincludes a first type line402and second type lines404connected to the first type line402. In some embodiments, the first type line402has a polygonal shape, such as an octagonal shape or a ring shape. For example, the first type line402separates the second electrode layer110binto a circular portion and a core portion. As can be seen inFIG.4, in a finalized MEMS device10the core portion is further patterned by the via pattern118vto form multiple core zones as electrodes with a connected region120xformed at the center of the second electrode layer110b.

In some embodiments, the second type lines404further partition the circular portion into multiple quadrilateral zones as electrodes. The quadrilateral zones may be electrically isolated from one another and electrically isolated from the core zones by the partitioning pattern110v.

Referring toFIG.1IandFIG.4, each of the conductive lines112may be electrically coupled to the electrode layers110aand110b. In some embodiments, some portions or zones in the electrode layer110aor110bmay be electrically coupled to one or more of the conductive lines112aand112b. Some other portions or zones may not be electrically coupled to any conductive lines in some other embodiments and thus are electrically insulated in the membrane120.

According to an embodiment, a semiconductor device includes a substrate; and a membrane over the substrate and configured to generate charges in response to an acoustic wave, the membrane being in a polygonal shape including vertices. The membrane includes a via pattern includes: first lines that partition the membrane into slices and extend to the vertices of the membrane such that the slices are separated from each other near an anchored region of the membrane and connected to each other around a central region; and second lines extending from the anchored region of the membrane toward the central region of the membrane, each of the first lines or each of the second lines including non-straight lines.

According to an embodiment, a MEMS device includes a dielectric layer over a substrate; and a membrane over the dielectric layer. The membrane includes: a piezoelectric layer configured to move in a cavity defined by the dielectric layer; an electrode layer over the piezoelectric layer; first vias running through the piezoelectric layer and the electrode layer, wherein the first vias include an elongated shape; and second vias formed through the electrode layer to define a core portion of the electrode layer separated from an edge of the electrode layer, wherein first vias intersect the second vias from a top-view perspective.

According to an embodiment, a method of manufacturing a MEMS device includes: providing a substrate; forming an electrode layer over the substrate; depositing a piezoelectric layer over the electrode layer to form a membrane with the electrode layer; forming a via running through the piezoelectric layer and the electrode layer, the via defining a first pattern partitioning the piezoelectric layer into slices such that the slices are joined to each other near a center of the membrane, wherein the first pattern includes elongated lines extending from a region near the center of the membrane toward an edge of the membrane, the first pattern being symmetric about the center of the membrane; and forming a cavity in the substrate beneath the membrane.

The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.