Patent ID: 12192401

DETAILED DESCRIPTION

The ensuing description provides embodiments only and is not intended to limit the scope, applicability, or configuration of the claims. Rather, the ensuing description will provide those skilled in the art with an enabling description for implementing the embodiments. It will be understood that various changes may be made in the function and arrangement of elements without departing from the spirit and scope of the appended claims.

Any reference in the description comprising a numeric reference number, without an alphabetic sub-reference identifier when a sub-reference identifier exists in the figures, when used in the plural, is a reference to any two or more elements with the like reference number. When such a reference is made in the singular form, but without identification of the sub-reference identifier, is a reference to one of the like numbered elements, but without limitation as to the particular one of the elements being referenced. Any explicit usage herein to the contrary or providing further qualification or identification shall take precedence.

The exemplary systems and methods of this disclosure will also be described in relation to analysis software, modules, and associated analysis hardware. However, to avoid unnecessarily obscuring the present disclosure, the following description omits well-known structures, components, and devices, which may be omitted from or shown in a simplified form in the figures or otherwise summarized.

For purposes of explanation, numerous details are set forth in order to provide a thorough understanding of the present disclosure. It should be appreciated, however, that the present disclosure may be practiced in a variety of ways beyond the specific details set forth herein.

FIG.1depicts system100in accordance with embodiments of the present disclosure. In one embodiment, first endpoint102and second endpoint104are initially engaged in a non-secure call with each other. First endpoint102is registered with server108via TCP signaling path110and second endpoint104is registered with server108via TLS signaling path112. As some or all of the signaling path (i.e., TCP signaling path110and TLS signaling path112) is unsecure, the call is considered unsecure. While each of first endpoint102and second endpoint104are illustrated as digital telephones, it should be appreciated that other form-factors may be utilized without departing from the scope of the embodiments disclosed, such as a personal computer, laptop, etc. with a Voice-over-IP (VoIP) client. In another embodiment, other communication devices, such a mobile phones comprising processors and network connections while utilizing data connectivity to the Internet, may similarly utilize a VoIP client and benefit from the embodiments provided herein to secure a previously unsecure call.

As is known in SIP, data packets, such as those comprising packetized voice communications, are exchanged on a separate real-time data channel, namely RTP data channel106. Optionally, while the call is underway, one or both of first endpoint102or second endpoint104may present a light, message, or other indicia that the call is unsecure, such as to notify users thereof of the current unsecure state in the hopes that the users will not discuss sensitive information.

FIG.2depicts interaction200in accordance with embodiments of the present disclosure. Interaction200illustrates operations of first endpoint102, server108, and second endpoint104, each of which comprise a network interface and at least one processor with instructions maintained in a non-transitory memory to cause the at least one processor to perform operations of interaction200.

Interaction200begins with first endpoint102and second endpoint104exchanging data packets via a data channel, namely RTP202. First endpoint102is registered with server108, as a portion of the signaling path, utilizing TCP (unsecure), while second endpoint104is registered utilizing TLS. As at least a portion of the signaling path is unsecure, the call is unsecured and vulnerable to eavesdropping. A user of first endpoint102initiates security in step204. As a result, step206sends a register TLS message to server108and, in response, receives reply message208of “200 OK” for the TLS message. At step210, first endpoint102is now registered on TLS. In another embodiment, step206sends the registration message directly to second endpoint104, and without sending the register TLS message to server108, in reply message208is then returned from second endpoint104to first endpoint102, which similarly omits server108.

Next, step212sends “INVITE-Replace-SRTP” message to server108which processes and forwards the message to second endpoint104in step214to initiate transition to a Secure Real-Time Transport Protocol (SRTP) connection, which may be embodied as a SIP “INVITE” message having header information, whether new or leveraging current header values, indicating “Replace-SRTP.” In embodiments wherein server108is omitted, such as when step206and208exchange messages directly between first endpoint102and second endpoint104and omit server108, step212and step214are combined, such that one “INVITE-Replace-SRTP” message is sent from first endpoint102directly to second endpoint104and omitting server108. Second endpoint104replies to first endpoint102with “200 OK-SRTP” in step216. At this point the call is now secure in step218and first endpoint102, and optionally second endpoint104, may present indicia of the call being secure. The data channel is now underway utilizing a secure real-time transport protocol, namely SRTP data channel220comprising point-to-point encryption between first endpoint102and second endpoint104.

FIG.3depicts interaction300in accordance with embodiments of the present disclosure. Interaction300illustrates operations of first endpoint102, server108, and second endpoint104, each of which comprise a network interface and at least one processor with instructions maintained in a non-transitory memory to cause the at least one processor to perform operations of interaction300.

Interaction300begins with first endpoint102and second endpoint104exchanging data packets via a data channel, namely RTP304. Sniffer302monitors the network, comprising at least a portion of the connections supporting RTP304and determines that a spoofed endpoint is present on the communication and the call is likely being monitored by an unauthorized entity. In response, sniffer302sends a signal to second endpoint104to secure the call in step306.

In response, second endpoint104sends “INVITE Replace-SRTP” to first endpoint102in step308to initiate transfer to a secure channel. In step310, which may be embodied as a SIP “INVITE” message having header information to indicate TLS registration, which may further leverage existing SIP message formats or include a new header, such as to indicate “Replace-SRTP.” First endpoint102then sends “REGISTER-TLS” to server108in step310and receives in response message “200 OK-TLS” in step312. First endpoint102is now on TLS in step314.

In another embodiment, such as a peer-to-peer connection that omits server108, steps310,312, and316/318may omit server108and exchange messages directly between first endpoint102and second endpoint104and omitting server108.

In response to being on TLS, first endpoint102sends message “INVITE Replaces-SRTP” in step316/318with headers that comprise an identifier sufficient to identify the call flow, which may comprise, at least in part, identifiers to maintain the call on non-SIP portions. Accordingly, one or more identifiers, such as Global Session Identifier (GSID), Universal Call Identifier (UCID), Associated-Global Session Identifier (“A-GSID”) are utilized in order to allow second endpoint104, server108and/or any other component to identify the call flow. Server108processes and forwards the message to second endpoint104in step318causing second endpoint104to respond to first endpoint102with “200 OK-SRTP” message, comprising the old UCID, GSID and/or A-GSID to identify the call flow in step320. Then, at step322the call is secure and the data channel between first endpoint102and second endpoint104utilizes SRTP channel324and discontinues RTP304.

FIG.4depicts system400in accordance with embodiments of the present disclosure. In one embodiment, first endpoint102, second endpoint104, and server108may be embodied, in whole or in part, as device402comprising various components and connections to other components and/or systems. The components are variously embodied and may comprise processor404. The term “processor,” as used herein, refers exclusively to electronic hardware components comprising electrical circuitry with connections (e.g., pin-outs) to convey encoded electrical signals to and from the electrical circuitry. Processor404may be further embodied as a single electronic microprocessor or multiprocessor device (e.g., multicore) having electrical circuitry therein which may further comprise a control unit(s), input/output unit(s), arithmetic logic unit(s), register(s), primary memory, and/or other components that access information (e.g., data, instructions, etc.), such as received via bus414, executes instructions, and outputs data, again such as via bus414. In other embodiments, processor404may comprise a shared processing device that may be utilized by other processes and/or process owners, such as in a processing array within a system (e.g., blade, multi-processor board, etc.) or distributed processing system (e.g., “cloud”, farm, etc.). It should be appreciated that processor404is a non-transitory computing device (e.g., electronic machine comprising circuitry and connections to communicate with other components and devices). Processor404may operate a virtual processor, such as to process machine instructions not native to the processor (e.g., translate the VAX operating system and VAX machine instruction code set into Intel® 9xx chipset code to enable VAX-specific applications to execute on a virtual VAX processor), however, as those of ordinary skill understand, such virtual processors are applications executed by hardware, more specifically, the underlying electrical circuitry and other hardware of the processor (e.g., processor404). Processor404may be executed by virtual processors, such as when applications (i.e., Pod) are orchestrated by Kubernetes. Virtual processors enable an application to be presented with what appears to be a static and/or dedicated processor executing the instructions of the application, while underlying non-virtual processor(s) are executing the instructions and may be dynamic and/or split among a number of processors.

In addition to the components of processor404, device402may utilize memory406and/or data storage408for the storage of accessible data, such as instructions, values, etc. Communication interface410facilitates communication with components, such as processor404via bus414with components not accessible via bus414. Communication interface410may be embodied as a network port, card, cable, or other configured hardware device. Additionally or alternatively, human input/output interface412connects to one or more interface components to receive and/or present information (e.g., instructions, data, values, etc.) to and/or from a human and/or electronic device. Examples of input/output devices430that may be connected to input/output interface include, but are not limited to, keyboard, mouse, trackball, printers, displays, sensor, switch, relay, speaker, microphone, still and/or video camera, etc. In another embodiment, communication interface410may comprise, or be comprised by, human input/output interface412. Communication interface410may be configured to communicate directly with a networked component or utilize one or more networks, such as network420and/or network424.

A network interconnecting first endpoint102, second endpoint104, and server108may be embodied, in whole or in part, as network420. Network420may be a wired network (e.g., Ethernet), wireless (e.g., WiFi, Bluetooth, cellular, etc.) network, or combination thereof and enable device402to communicate with networked component(s)422. In other embodiments, network420may be embodied, in whole or in part, as a telephony network (e.g., public switched telephone network (PSTN), private branch exchange (PBX), cellular telephony network, etc.)

Additionally or alternatively, one or more other networks may be utilized. For example, network424may represent a second network, which may facilitate communication with components utilized by device402. For example, network424may be an internal network of a business entity or other organization whereby components are trusted (or at least more so) as networked components422, which may be connected to network420comprising a public network (e.g., Internet) that may not be as trusted.

Components attached to network424may include memory426, data storage428, input/output device(s)430, and/or other components that may be accessible to processor404. For example, memory426and/or data storage428may supplement or supplant memory406and/or data storage408entirely or for a particular task or purpose. As another example, memory426and/or data storage428may be an external data repository (e.g., server farm, array, “cloud,” etc.) and enable device402, and/or other devices, to access data thereon. Similarly, input/output device(s)430may be accessed by processor404via human input/output interface412and/or via communication interface410either directly, via network424, via network420alone (not shown), or via networks424and420. Each of memory406, data storage408, memory426, data storage428comprise a non-transitory data storage comprising a data storage device.

It should be appreciated that computer readable data may be sent, received, stored, processed, and presented by a variety of components. It should also be appreciated that components illustrated may control other components, whether illustrated herein or otherwise. For example, one input/output device430may be a router, switch, port, or other communication component such that a particular output of processor404enables (or disables) input/output device430, which may be associated with network420and/or network424, to allow (or disallow) communications between two or more nodes on network420and/or network424. One of ordinary skill in the art will appreciate that other communication equipment may be utilized, in addition or as an alternative, to those described herein without departing from the scope of the embodiments.

In the foregoing description, for the purposes of illustration, methods were described in a particular order. It should be appreciated that in alternate embodiments, the methods may be performed in a different order than that described without departing from the scope of the embodiments. It should also be appreciated that the methods described above may be performed as algorithms executed by hardware components (e.g., circuitry) purpose-built to carry out one or more algorithms or portions thereof described herein. In another embodiment, the hardware component may comprise a general-purpose microprocessor (e.g., CPU, GPU) that is first converted to a special-purpose microprocessor. The special-purpose microprocessor then having had loaded therein encoded signals causing the, now special-purpose, microprocessor to maintain machine-readable instructions to enable the microprocessor to read and execute the machine-readable set of instructions derived from the algorithms and/or other instructions described herein. The machine-readable instructions utilized to execute the algorithm(s), or portions thereof, are not unlimited but utilize a finite set of instructions known to the microprocessor. The machine-readable instructions may be encoded in the microprocessor as signals or values in signal-producing components by, in one or more embodiments, voltages in memory circuits, configuration of switching circuits, and/or by selective use of particular logic gate circuits. Additionally or alternatively, the machine-readable instructions may be accessible to the microprocessor and encoded in a media or device as magnetic fields, voltage values, charge values, reflective/non-reflective portions, and/or physical indicia.

In another embodiment, the microprocessor further comprises one or more of a single microprocessor, a multi-core processor, a plurality of microprocessors, a distributed processing system (e.g., array(s), blade(s), server farm(s), “cloud”, multi-purpose processor array(s), cluster(s), etc.) and/or may be co-located with a microprocessor performing other processing operations. Any one or more microprocessor may be integrated into a single processing appliance (e.g., computer, server, blade, etc.) or located entirely, or in part, in a discrete component and connected via a communications link (e.g., bus, network, backplane, etc. or a plurality thereof).

Examples of general-purpose microprocessors may comprise, a central processing unit (CPU) with data values encoded in an instruction register (or other circuitry maintaining instructions) or data values comprising memory locations, which in turn comprise values utilized as instructions. The memory locations may further comprise a memory location that is external to the CPU. Such CPU-external components may be embodied as one or more of a field-programmable gate array (FPGA), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), random access memory (RAM), bus-accessible storage, network-accessible storage, etc.

These machine-executable instructions may be stored on one or more machine-readable mediums, such as CD-ROMs or other type of optical disks, floppy diskettes, ROMs, RAMs, EPROMs, EEPROMs, magnetic or optical cards, flash memory, or other types of machine-readable mediums suitable for storing electronic instructions. Alternatively, the methods may be performed by a combination of hardware and software.

In another embodiment, a microprocessor may be a system or collection of processing hardware components, such as a microprocessor on a client device and a microprocessor on a server, a collection of devices with their respective microprocessor, or a shared or remote processing service (e.g., “cloud” based microprocessor). A system of microprocessors may comprise task-specific allocation of processing tasks and/or shared or distributed processing tasks. In yet another embodiment, a microprocessor may execute software to provide the services to emulate a different microprocessor or microprocessors. As a result, a first microprocessor, comprised of a first set of hardware components, may virtually provide the services of a second microprocessor whereby the hardware associated with the first microprocessor may operate using an instruction set associated with the second microprocessor.

While machine-executable instructions may be stored and executed locally to a particular machine (e.g., personal computer, mobile computing device, laptop, etc.), it should be appreciated that the storage of data and/or instructions and/or the execution of at least a portion of the instructions may be provided via connectivity to a remote data storage and/or processing device or collection of devices, commonly known as “the cloud,” but may include a public, private, dedicated, shared and/or other service bureau, computing service, and/or “server farm.”

Examples of the microprocessors as described herein may include, but are not limited to, at least one of Qualcomm® Snapdragon® 800 and 801, Qualcomm® Snapdragon® 610 and 615 with 4G LTE Integration and 64-bit computing, Apple® A7 microprocessor with 64-bit architecture, Apple® M7 motion comicroprocessors, Samsung® Exynos® series, the Intel® Core™ family of microprocessors, the Intel® Xeon® family of microprocessors, the Intel® Atom™ family of microprocessors, the Intel Itanium® family of microprocessors, Intel® Core® i5-4670K and i7-4770K 22 nm Haswell, Intel® Core® i5-3570K 22 nm Ivy Bridge, the AMD® FX™ family of microprocessors, AMD® FX-4300, FX-6300, and FX-8350 32 nm Vishera, AMD® Kaveri microprocessors, Texas Instruments® Jacinto C6000™ automotive infotainment microprocessors, Texas Instruments® OMAP™ automotive-grade mobile microprocessors, ARM® Cortex™-M microprocessors, ARM® Cortex-A and ARM926EJ-S™ microprocessors, other industry-equivalent microprocessors, and may perform computational functions using any known or future-developed standard, instruction set, libraries, and/or architecture.

Any of the steps, functions, and operations discussed herein can be performed continuously and automatically.

The exemplary systems and methods of this invention have been described in relation to communications systems and components and methods for monitoring, enhancing, and embellishing communications and messages. However, to avoid unnecessarily obscuring the present invention, the preceding description omits a number of known structures and devices. This omission is not to be construed as a limitation of the scope of the claimed invention. Specific details are set forth to provide an understanding of the present invention. It should, however, be appreciated that the present invention may be practiced in a variety of ways beyond the specific detail set forth herein.

Furthermore, while the exemplary embodiments illustrated herein show the various components of the system collocated, certain components of the system can be located remotely, at distant portions of a distributed network, such as a LAN and/or the Internet, or within a dedicated system. Thus, it should be appreciated, that the components or portions thereof (e.g., microprocessors, memory/storage, interfaces, etc.) of the system can be combined into one or more devices, such as a server, servers, computer, computing device, terminal, “cloud” or other distributed processing, or collocated on a particular node of a distributed network, such as an analog and/or digital telecommunications network, a packet-switched network, or a circuit-switched network. In another embodiment, the components may be physical or logically distributed across a plurality of components (e.g., a microprocessor may comprise a first microprocessor on one component and a second microprocessor on another component, each performing a portion of a shared task and/or an allocated task). It will be appreciated from the preceding description, and for reasons of computational efficiency, that the components of the system can be arranged at any location within a distributed network of components without affecting the operation of the system. For example, the various components can be located in a switch such as a PBX and media server, gateway, in one or more communications devices, at one or more users' premises, or some combination thereof. Similarly, one or more functional portions of the system could be distributed between a telecommunications device(s) and an associated computing device.

Furthermore, it should be appreciated that the various links connecting the elements can be wired or wireless links, or any combination thereof, or any other known or later developed element(s) that is capable of supplying and/or communicating data to and from the connected elements. These wired or wireless links can also be secure links and may be capable of communicating encrypted information. Transmission media used as links, for example, can be any suitable carrier for electrical signals, including coaxial cables, copper wire, and fiber optics, and may take the form of acoustic or light waves, such as those generated during radio-wave and infra-red data communications.

Also, while the flowcharts have been discussed and illustrated in relation to a particular sequence of events, it should be appreciated that changes, additions, and omissions to this sequence can occur without materially affecting the operation of the invention.

A number of variations and modifications of the invention can be used. It would be possible to provide for some features of the invention without providing others.

In yet another embodiment, the systems and methods of this invention can be implemented in conjunction with a special purpose computer, a programmed microprocessor or microcontroller and peripheral integrated circuit element(s), an ASIC or other integrated circuit, a digital signal microprocessor, a hard-wired electronic or logic circuit such as discrete element circuit, a programmable logic device or gate array such as PLD, PLA, FPGA, PAL, special purpose computer, any comparable means, or the like. In general, any device(s) or means capable of implementing the methodology illustrated herein can be used to implement the various aspects of this invention. Exemplary hardware that can be used for the present invention includes computers, handheld devices, telephones (e.g., cellular, Internet enabled, digital, analog, hybrids, and others), and other hardware known in the art. Some of these devices include microprocessors (e.g., a single or multiple microprocessors), memory, nonvolatile storage, input devices, and output devices. Furthermore, alternative software implementations including, but not limited to, distributed processing or component/object distributed processing, parallel processing, or virtual machine processing can also be constructed to implement the methods described herein as provided by one or more processing components.

In yet another embodiment, the disclosed methods may be readily implemented in conjunction with software using object or object-oriented software development environments that provide portable source code that can be used on a variety of computer or workstation platforms. Alternatively, the disclosed system may be implemented partially or fully in hardware using standard logic circuits or VLSI design. Whether software or hardware is used to implement the systems in accordance with this invention is dependent on the speed and/or efficiency requirements of the system, the particular function, and the particular software or hardware systems or microprocessor or microcomputer systems being utilized.

In yet another embodiment, the disclosed methods may be partially implemented in software that can be stored on a storage medium, executed on programmed general-purpose computer with the cooperation of a controller and memory, a special purpose computer, a microprocessor, or the like. In these instances, the systems and methods of this invention can be implemented as a program embedded on a personal computer such as an applet, JAVA® or CGI script, as a resource residing on a server or computer workstation, as a routine embedded in a dedicated measurement system, system component, or the like. The system can also be implemented by physically incorporating the system and/or method into a software and/or hardware system.

Embodiments herein comprising software are executed, or stored for subsequent execution, by one or more microprocessors and are executed as executable code. The executable code being selected to execute instructions that comprise the particular embodiment. The instructions executed being a constrained set of instructions selected from the discrete set of native instructions understood by the microprocessor and, prior to execution, committed to microprocessor-accessible memory. In another embodiment, human-readable “source code” software, prior to execution by the one or more microprocessors, is first converted to system software to comprise a platform (e.g., computer, microprocessor, database, etc.) specific set of instructions selected from the platform's native instruction set.

Although the present invention describes components and functions implemented in the embodiments with reference to particular standards and protocols, the invention is not limited to such standards and protocols. Other similar standards and protocols not mentioned herein are in existence and are considered to be included in the present invention. Moreover, the standards and protocols mentioned herein and other similar standards and protocols not mentioned herein are periodically superseded by faster or more effective equivalents having essentially the same functions. Such replacement standards and protocols having the same functions are considered equivalents included in the present invention.

The present invention, in various embodiments, configurations, and aspects, includes components, methods, processes, systems and/or apparatus substantially as depicted and described herein, including various embodiments, subcombinations, and subsets thereof. Those of skill in the art will understand how to make and use the present invention after understanding the present disclosure. The present invention, in various embodiments, configurations, and aspects, includes providing devices and processes in the absence of items not depicted and/or described herein or in various embodiments, configurations, or aspects hereof, including in the absence of such items as may have been used in previous devices or processes, e.g., for improving performance, achieving ease, and\or reducing cost of implementation.

The foregoing discussion of the invention has been presented for purposes of illustration and description. The foregoing is not intended to limit the invention to the form or forms disclosed herein. In the foregoing Detailed Description for example, various features of the invention are grouped together in one or more embodiments, configurations, or aspects for the purpose of streamlining the disclosure. The features of the embodiments, configurations, or aspects of the invention may be combined in alternate embodiments, configurations, or aspects other than those discussed above. This method of disclosure is not to be interpreted as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment, configuration, or aspect. Thus, the following claims are hereby incorporated into this Detailed Description, with each claim standing on its own as a separate preferred embodiment of the invention.

Moreover, though the description of the invention has included description of one or more embodiments, configurations, or aspects and certain variations and modifications, other variations, combinations, and modifications are within the scope of the invention, e.g., as may be within the skill and knowledge of those in the art, after understanding the present disclosure. It is intended to obtain rights, which include alternative embodiments, configurations, or aspects to the extent permitted, including alternate, interchangeable and/or equivalent structures, functions, ranges, or steps to those claimed, whether or not such alternate, interchangeable and/or equivalent structures, functions, ranges, or steps are disclosed herein, and without intending to publicly dedicate any patentable subject matter.