Patent ID: 12191299

DETAILED DESCRIPTION

To provide a better understanding of the presented disclosure, preferred embodiments will be described in detail. The preferred embodiments of the present disclosure are illustrated in the accompanying drawings with numbered elements. In addition, the technical features in different embodiments described in the following may be replaced, recombined, or mixed with one another to constitute another embodiment without departing from the spirit of the present disclosure.

Please refer toFIG.1toFIG.9, which illustrate schematic diagrams of a fabricating process of a semiconductor device300according to the first embodiment in the present disclosure, withFIG.1,FIG.3,FIG.4,FIG.6andFIG.8respectively illustrating a top view of the semiconductor device300at various stages of formation, and withFIG.2,FIG.5,FIG.7, andFIG.9respectively illustrating a cross-sectional view of the semiconductor device300at various stages of formation. Firstly, a substrate100is provide, such as a silicon substrate, silicon containing substrate (such as SiC or SiGe), or a silicon-on-insulator (SOI) substrate. Next, at least one isolation structure is formed in the substrate100, for example is a shallow trench isolation (STI)202, to define an active structure200in the substrate100. The formation of the active structure200is accomplished by a photolithography process and an etching process, otherwise, by a self-aligned double patterning (SADP) process or a self-aligned reverse patterning (SARP) process, but not limited thereto.

In the present embodiment, the formation of the active structure200is preferably accomplished by the self-aligned double patterning process, and which includes but is not limited to be the following steps. Firstly, as shown inFIG.1andFIG.2, a first mask layer110, a second mask layer120, and a plurality of third mask130are sequentially formed on the substrate100. The first mask layer110, and the second mask layer120may respectively include a monolayer structure or a multilayer structure, for example including a material like oxide or nitride. Preferably, the first mask layer110includes a polysilicon layer, and the second mask layer120may include a nitride layer, but not limited thereto. Precisely, each of the mask patterns130is separately disposed on the second mask layer120by the same pitch, and is extended along a first direction D1, wherein the first direction D1is for example intersects and not perpendicular to the y-direction or the x-direction, as shown inFIG.1. In one embodiment, the formation of the mask patterns130is for example accomplished by a standard gate process, so that, the material of each of the mask patterns may include polysilicon or other suitable material, but not limited thereto.

As shown inFIG.1andFIG.2, a deposition process and an etching bask process are sequentially performed to form a spacer132on each of the mask patterns130, with the spacer132surrounding the sidewalls of each mask patter130. The spacer132for example includes silicon nitride or other materials having etching selectivity related to the mask patterns130. It is noteworthy that, in the present embodiment, each of the mask patterns130preferably includes a rectangular shape, so that, the spacer132surrounded each of the mask patterns130may therefore perform in a closed rectangular-framed shape from a top view as shown inFIG.1, but is not limited thereto. People well skilled in the art should fully understand that the mask patterns may also include other shapes based on practical product requirements, so that, the spacer may also perform in a square framed shape, circular shape, a racetrack shape, or the like.

Then, a photoresist layer134(for example including a suitable photoresist material) is formed on the substrate100, covering the mask patterns130and the spacer132, especially on two ends of each of the mask patterns130and two ends of each spacer132, as shown inFIG.1. It is noted that, the photoresist layer134for example also includes the closed rectangular-framed shape, and which includes a portion extended in a second direction (namely, the y-direction) and a portion extended in a third direction (namely, the x-direction), with the second direction being perpendicular to the third direction. The portion extended in the second direction (namely, the y-direction) has a width W1which is substantially the same as a width W2of the portion extended in the third direction (namely, the x-direction).

Then, the mask patterns130are completely removed, and an etching process is performed through the photoresist layer134and the spacer132, to transfer the patterns of the photoresist layer134and the spacer132into the second mask layer120underneath to form the structure as shown inFIG.3. Precisely speaking, after performing the etching process through the photoresist layer134and the spacer132, the second mask layer120is patterned to form a plurality of first patterns122which are parallel extended along the first direction D1, a plurality of second patterns124which are parallel extended along the second direction (namely, the y-direction), and a plurality of third patterns126which are parallel extended along the third direction (namely, the x-direction), wherein each of the first patterns122directly contacts the second patterns124or the third patterns126. It is noted that, the second patterns124and the third patterns126have the corresponding shape of the photoresist layer134, so as to together present in a closed rectangular-frame shape, disposed outside all of the first patterns122. Also, each of the second patterns124and each of the third patterns126respectively include the same width W1as the portion extended in the second direction (namely, the y-direction) and the same width W2as the portion extended in the third direction (namely, the x-direction), as shown inFIG.3. In one embodiment, the width W1may be the same as the width W2, but is not limited thereto.

As shown inFIG.3, after removing the photoresist layer134, a photoresist layer136(for example including a suitable photoresist material) is then formed on the substrate100, covering the first patterns122, the second patterns124and the third patterns126of the second mask layer120. It is noted that, the photoresist layer136completely covers all of the first patterns122, and partially covers the second patterns124and the third patterns126. With such arrangement, the partial width W1of each second pattern124or the partial width W2of each third pattern126may be exposed from the photoresist layer136, for example being about half of the width W1, or half of the width W2. People well skilled in the art should fully understand that the portion of the photoresist layer136either covering or uncovering on the width W1of each second pattern124, or the width W2of each third pattern126are not limited to the aforementioned ratio, and which may be further adjusted based on practical product requirements.

As shown inFIG.4toFIG.5, an etching process is performed through the photoresist layer136, to partially remove the second patterns124and the third patterns126of the second photoresist layer120. Then, the photoresist layer136is completely removed. Accordingly, the second patterns124and the third patterns126may be further patterned into second patterns124aand third patterns126a, with the width W1of each second pattern124being shrunk into a width W3, and with the width W2of each third pattern126being shrunk into a width W4. In addition, after performing the etching process through the photoresist layer136, a portion of the first mask layer110disposed underneath may be exposed thereby, as shown inFIG.4.

As shown inFIG.6toFIG.7, a photoresist layer140(for example including a suitable photoresist material) is formed on the substrate100, covering the first patterns122, the second patterns124a, and the third patterns126a. Precisely speaking, the photoresist layer140includes a first photoresist layer142and a second photoresist layer144, wherein the first photoresist layer142entirely covers all of the first patterns122and partially covers the second patterns124aand the third patterns126a, to expose the partial width W3of each second pattern124or the partial width W4of each third pattern126, for example being about half of the width W3, or half of the width W4, but is not limited thereto. Also, the first photoresist layer142further includes a plurality of separately and alternately arranged openings142a, which are in aligned with a portion of each first pattern122to exposed the portion of each first pattern122therefrom, as shown inFIG.6andFIG.7. On the other hand, the second photoresist layer144is disposed outside the first photoresist layer142, to partially cover the first mask layer110exposed at the outer side. It is noted that, the second photoresist layer144does not contact the first photoresist layer142, and the second photoresist layer144is spaced apart from the first photoresist layer142to expose a portion of the second mask layer120(including a portion of the second patterns124aand a portion of the third patterns126a) and a portion of the first mask layer110, as shown inFIG.6andFIG.7. Furthermore, it is also noted that the second photoresist layer144includes a first portion144aextended in the second direction (namely, the y-direction) and a second portion144bextended in the third direction (namely, the x-direction), and preferably, the first portion144aextended in the second direction (namely, the y-direction) and a second portion144bextended in the third direction (namely, the x-direction) also together present in the closed rectangular-framed shape, so as to be disposed outside the first photoresist layer142by the same pitch, but not limited thereto.

After that, an etching process is performed through the photoresist layer140, to remove the exposed first patterns122, the exposed second patterns124aand the exposed third patterns126a, the patterns of the photoresist layer140(namely, the pattern of the second photoresist layer144) is firstly transferred into a portion of the first mask layer110underneath, and the photoresist layer140is completely removed, to expose the first mask layer110, the rest portion of the first patterns122, the rest portion of the second patterns124aand the rest portion of the third patterns126a. Next, another etching process is performed through the rest portion of the first patterns122, the rest portion of the second patterns124a, the rest portion of the third patterns126a, and the patterned first mask layer110, to pattern the substrate100underneath, to form a plurality of shallow trenches102in the substrate100. In this way, the active structure200, au ne defined in the substrate100, and an insulating material (not shown in the drawings) such as silicon oxide, silicon nitride, or silicon oxynitride is filled in the shallow trench102, to form the shallow trench isolation202having coplanar top surface with the top surface of the substrate100, as shown inFIG.8andFIG.9.

Precisely speaking, the active structure200includes the first active area101, the second active area103, and the third active area105sequentially disposed from inner side to the outer side, with the second active area103including a closed pattern disposed outside the first active area101, and the third active area105also including a closed pattern disposed outside the second active area103. Accordingly, the second active area103may be disposed between the third active area105and the first active area101, and the shallow trench isolation202surrounds the active structure200, with a portion of the shallow trench isolation202being disposed between the second active area103and the third active area105, and between the second active area103and the first active area101. In the present embodiment, the first active area101is entirely surrounded by the second active area103, and both of the first active area101and second active area103are entirely surrounded by the third active area105, as shown inFIG.8, but is not limited thereto. The first active area101further includes a plurality of active area units101a,101bparallel extended along the first direction D1, wherein the active area units101a,101bare alternately and sequentially arranged along the first direction D1into a plurality of rows, thereby presenting a particular arrangement, such as an array arrangement as shown inFIG.8, but not limited thereto. It is noted that, a first portion of the active area units101ahas the same length L1in the first direction D1, and a second portion of the active area units101brespectively includes a different length from each other, which is also different from the length L1, for example being a length L2greater than the length L1, or being a length L3less than the length L1.

Preferably, the second portion of the active area units101bare disposed at two opposite sides of the first active area units101ain the third direction (namely, the x-direction), the second portion of the active area units101bmay directly contact the second active area103disposed outside all of the active area units101a,101b, and the first portion of the active area units101adoes not directly contact the second active area103. In the preset embodiment, the second active area103further includes a plurality of first edges103aextended along the second direction (namely, the y-direction), and a plurality of second edges103bextended along the third direction (namely, the x-direction), wherein each of the first edges103ais in connection with each of the second edges103bto present in the closed rectangular-framed shape, as shown inFIG.8. In addition, the first edges103aand the second edge103bmay include the same width W5with each other, for example being about a half of the width W3, W4of each second pattern124aor each third pattern126a, but is not limited thereto. On the other hand, the third active area105also includes a plurality of first edges105aextended along the second direction (namely, the y-direction), and a plurality of second edges105bextended along the third direction (namely, the x-direction), wherein each of the first edges105ais in connection with each of the second edges105bto also present in the closed rectangular-framed shape, as shown inFIG.8. The first edges105aand the second edge105bmay also include the same width W6with each other, and the width W5of each first edges103aor each second edges103bof the second active area103is greater than the width W6of each first edge105aor each second edge105bof the third active area105.

Through these arrangements, the semiconductor device300of the first embodiment in the present disclosure is accomplished, and which includes the first active area101, the second active area103, and the third active area105sequentially disposed from the inner side to the outer side. In this way, the second active area103enables to uniformly disperse the stresses suffered from first active area101and the shallow trench isolation202through the second portion of the active area units101bin connection with the second active area103, thereby further stabilizing the structure of the active area units101a,101bvia the rectangular frame surrounded at the outer side of the active area units101a,101b. Accordingly, any structural collapse or damages happened on the active area units101a,101bmay be sufficiently avoided. Also, the third active area105disposed at the outer side of both of the second active area103and the first active area101may further protect the inner structure, so as to maintain the structural integrity, and to avoid the possible deformation.

However, people in the art should fully realize that the semiconductor device and the fabricating method thereof are not be limited to aforementioned embodiment and may include other examples or may be achieved through other strategies to meet practical product requirements. The following description will detail the different embodiments of the semiconductor device and the fabricating method thereof in the present disclosure. To simplify the description, the following description will detail the dissimilarities among the different embodiments and the identical features will not be redundantly described. In order to compare the differences between the embodiments easily, the identical components in each of the following embodiments are marked with identical symbols.

Please refer toFIG.10toFIG.11, which illustrate a fabricating method of a semiconductor device400according to the second embodiment of the present disclosure. In the present embodiment, the formal steps of fabricating the semiconductor device400are substantially the same as those of the aforementioned first embodiment as shown inFIG.1toFIG.5, and which may not be redundantly described hereinafter. The difference between the fabricating method of the preset embodiment and the fabricating method of the aforementioned first embodiment is in that a photoresist layer340is formed on the substrate100to cover first patterns122, second patterns124a, and third patterns126aof the second mask layer120, and a first photoresist layer342of the photoresist layer340further includes a plurality of openings342adisposed at the inner side and a plurality of trenches343a,343bdisposed at the outer side and faced outwardly at the same time.

Precisely speaking, the photoresist layer340includes the first photoresist layer342and a second photoresist layer344, wherein the first photoresist layer342includes a plurality of edges (not shown in the drawings) extended along the second direction (namely, the y-direction), and a plurality of edges (not shown in the drawings) extended along the third direction (namely, x-direction), thereby presenting in a square shape to cover all of the first patterns122, and to partially cover the second patterns124aand the third patterns126a. With such arrangement, the partial width W3of each second pattern124aor the partial width W4of each third pattern126amay be exposed from the photoresist layer342, for example being about half of the width W3, or half of the width W4, but not limited thereto. Furthermore, the openings342aare separately and alternately arranged with each other along the first direction D1, to respectively expose a portion of each of the first patterns122underneath, as shown inFIG.10. The trenches343a,343bof the first photoresist layer342are sequentially arranged on the corresponding edges of the first photoresist layer342along the second direction (namely, the y-direction), or along the third direction (namely, the x-direction), to partially expose the second patterns124aor the third patterns126aunderneath. Preferably, the diameter (not shown in the drawings) of each of the trenches343a,343bis different from the diameter of each opening342a(not shown in the drawings), and preferably, the diameter of each trench343a,343bis greater than that of each opening342a, but not limited thereto. It is noted that, each of the trenches343a,343bis disposed toward the direction which is away from the openings342a, namely, being disposed to face to the second photoresist layer344, as shown inFIG.10. In one embodiment, each trench343amay include the same diameter O1in the second direction (namely, the y-direction), and each trench343balso includes the same diameter O2in the third direction (namely, the x-direction), wherein, the diameter O1may be optionally the same as the diameter O2, but not limited thereto.

On the other hand, the second photoresist layer344includes a first portion344aextended along the second direction (namely, the y-direction), and a second portion344bextended along the third direction (namely, the x-direction), to also present in the closed rectangular-framed shape. Then, the second photoresist layer344may be disposed outside the first photoresist layer342, to partially cover the first mask layer110disposed at the outermost portion of the first mask layer110. It is noted that, the second photoresist layer344does not contact the first photoresist layer342, and the second photoresist layer344and the first photoresist layer342are spaced apart from each other to expose a portion of the second mask layer120(including a portion of the second patterns124aand a portion of the third patterns126a) and a portion of the first mask layer110, as shown inFIG.10.

Then, an etching process is performed through the photoresist layer340, to remove the exposed first patterns122, the exposed second patterns124a, and the exposed third patterns126a, and to firstly transfer the patterns of the photoresist layer340(namely the pattern of the second photoresist layer344) into a portion of the first mask layer110. Following these, the photoresist layer340is completely removed, to expose the first mask layer110, the rest portion of the first patterns122, the rest portion of the second patterns124a, and the rest portion of the third patterns126a. Next, another etching process is performed through the rest portion of the first patterns122, the rest portion of the second patterns124a, the rest portion of the third patterns126a, and the patterned first mask layer110, to pattern the substrate100underneath, to form a plurality of shallow trenches (not shown in the drawings) in the substrate110. Accordingly, an active structure200amay be defined in the substrate110, and a deposition process and an etching process are sequentially performed to form the shallow trench isolation202filled in the shallow trenches, thereby accomplishing the semiconductor device400of the present embodiment, as shown inFIG.11.

The structure of the semiconductor device400is substantially the same as the structure of the semiconductor device300in the first embodiment, and which includes the substrate110, the active structure200a, and the shallow trench isolation202. The active structure200aalso includes the first active area101(including active area units101a,101b), a second active area303having a closed pattern, and the third active area105also having a closed pattern being sequentially disposed from the inner side to the outer side, and all the similarities between the active structure200and the active structure200awill but be redundantly described hereinafter. It is noted that, the second active area303of the present embodiment further includes a plurality of first edges303aextending along the second direction (namely, the y-direction), and a plurality of second edges303bextending along the third direction (namely, the x-direction), with each first edge303ain connection with each second edge303bto present in the closed rectangular-framed shape. Also, the trenches304disposed outwardly to the outer side are additionally disposed on each first edge303a, with each of the trenches304being faced to each first edge105aof the third active area105and having the same diameter O1in the second direction. The trenches306disposed outwardly to the outer side are additionally disposed on each second edge303b, with each of the trenches306being faced to each second edge105bof the third active area105and having the same diameter O2in the third direction. In one embodiment, the diameter O1of each trench304may be the same as the diameter O2of each trench306, but is not limited thereto. In another embodiment, the diameter O1of each trench304may also be different form the diameter O2of each trench306, or the trenches304and/or the trenches306may also include different diameters with each other.

In this way, the first edges303aand the second edges303bof the second active area303may respectively include a battlement-shaped contour which is preferably closed the third active area105disposed at the outer side, and far away from the first active area101disposed at the inner side. In other words, in the present embodiment, the second portion of the active area units101bdirectly contact one end of the first edges303awithout having the battlement-shaped contour, and another end of the first edges303adoes not contact any active area units101a,101b. with such arrangement, the second active area303also enables to uniformly disperse the stresses suffered from first active area101and the shallow trench isolation202through the second portion of the active area units101bwhich are in connection with the second active area303, and to stabilize the structure of the active area units101a,101bthrough the rectangular frame surrounding at the outside the active area units101a,101b, thereby effectively avoiding any structural collapse or damages happened on the active area units101a,101b. Additionally, the trenches304,306faced outwardly on the second active303may further disperse the stresses suffered from first active area101and the shallow trench isolation202to the outer side, to as to protect the integrity of the inner structure, and to prevent from possible deformation of the active area units101a,101b. The formation of the trenches304,306may be further integrated in the formation of the active structure200a, so that, and additional mask is not requested in the fabricating method of the present disclosure. In this way, the semiconductor device400is formed with improved structure and performance under a simplified process flow and a reduced cost.

Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.