Patent ID: 12230984

DETAILED DESCRIPTION

Detailed explanation follows regarding an example of an exemplary embodiment of the present disclosure, with reference to the drawings.FIG.1is a diagram illustrating a schematic configuration of a power supply device according to the present exemplary embodiment.

A power supply device10according to the present exemplary embodiment is configured including a battery12, a voltage detection equalization circuit18, a controller20, and a load22, and supplies power from the bane12to the load22. Note that in the configuration of the power supply device10, the controller20corresponds to a battery abnormality detection device.

The battery12is configured by a battery stack in which plural battery cells14are coupled together in series, and as an example a lithium-ion battery stack is employed therefor. An electric motor installed in a hybrid vehicle, an electric vehicle, or the like is an example of the load22, and this electric motor is driven by power from the battery12. The power supply device10may employ a 12V system, a 48V system, or another voltage system. An AC inverter, a refrigerator, and the like are examples of the load in cases in which a 48V system is employed. Note that examples of the load22in respective voltage systems are not limited thereto, and there may be various other loads.

A main relay16serving as a main switch is provided to the battery12. The main relay16is switched ON and OFF under the control of the controller20, and power supply from the battery12to the load22is switched ON and OFF as a result. Although an example is described in which the main relay16is provided inside a battery pack that houses the respective battery cells14of the battery12in the present exemplary embodiment, the main relay16may be provided outside the battery pack. Moreover, although an example is described in which the main relay16is provided on both a plus side and a minus side of the battery12in the present exemplary embodiment, configuration may be such that the main relay16is only provided on one of these sides.

The voltage detection equalization circuit18includes a function to detect voltages of the respective battery cells14, and a function to cause respective battery cells to discharge so as to equalize the voltages. As an example, in the present exemplary embodiment, an integrated circuit (IC) including a function to detect the voltages of the battery cells14and a function to cause the battery cells14to discharge is employed therefor.

The controller20controls the switching ON and OFF of the main relay16, and also control switching ON and OFF of equalization FETs24in the voltage detection equalization circuit18. The controller20also performs processing to detect for abnormalities in the battery12.

Explanation follows regarding detailed configuration of the respective battery cells of the battery12and the voltage detection equalization circuit18.FIG.2is a diagram illustrating a detailed configuration of the power supply device10, focusing on a single battery cell14.

A first terminal of a resistor Rsn that limits current is connected to a plus side of this battery cell14. An equalization FET24that equalizes the voltage of the voltage detection equalization circuit18is connected to a second terminal of the resistor Rsn. A first terminal of a resistor Rcn-1is connected to a minus side of the battery cell14. A second terminal of the resistor Rcn-1is connected to the equalization FET24. The equalization FET24functions as a switch that is switched ON and OFF under the control of the controller20. When the equalization FET24is switched ON, power in the battery cell14is discharged, Namely, the resistor Rsn, the equalization FET24, and the resistor Rcn-1correspond to a discharge circuit.

A first terminal of a resistor Rcn is also connected to the plus side of the battery cell14. A first terminal of an AD converter26of the voltage detection equalization circuit18is connected to a second terminal of the resistor Rcn. The first terminal of the resistor Rcn-1is connected to the minus side of the battery cell14. A second terminal of the AD converter26is connected to the second terminal of the resistor Rcn-1. Namely, the AD converter26and the equalization FET24are connected in parallel to the battery cell14. The AD converter26corresponds to a detector that detects the voltage of the battery cell14, performs analog-to-digital (AD) conversion, and outputs a voltage detection result for the battery cell14to the controller20. The AD converter26may employ a switchover circuit such as a multiplexer such that plural voltages are measured using a single AD converter26. Note that the resistors Rcn, Rcn-1configure circuitry that are common to an adjacent battery cell14. The resistors Rsn, Rcn, and Rcn-1respectively function as current limiting resistors.

A first terminal of a capacitor C is connected between the resistor Rcn and the AD converter26. A second terminal of the capacitor C is connected between the resistor Rcn-1and the AD converter26. The resistor Rcn and the capacitor C configure a low-pass filter.

Next, explanation follows regarding detailed configuration of the controller20.FIG.3is a block diagram illustrating the configuration of the controller20of the power supply device10according to the present exemplary embodiment.

As illustrated inFIG.3, the controller20includes a central processing unit (CPU)20A serving as an example of a hardware processor, read only memory (ROM)20B corresponding to memory, random access memory (RAM)20C, storage20D, and an interface (I/F)20E.

The CPU20A is a central processing unit that oversees overall operation of the device by loading and executing various programs. Various control programs, various parameters, and so on are pre-stored in the ROM20B. The RAM20C is employed as a workspace or the like when the various programs are executed by the CPU20A. The storage20D is configured by various memory such as flash memory, a hard disk drive (HDD), and a solid state drive (SSD), and stores various data, application programs, and the like. The I/F20E is connected to the voltage detection equalization circuit18and the main relay16. These respective sections of the controller20are electrically connected to one another by a system bus20F.

Using the above-described configuration, the controller20is able to access the ROM20B, the RAM20C, and the storage20D using the CPU20A, and to control the voltage detection equalization circuit18and the main relay16connected to the I/F20E.

The controller20of the power supply device10according to the present exemplary embodiment has a function of detecting for abnormalities in the battery12and in elements such as the capacitor C and the equalization FET24.

Specifically, the controller20acquires a voltage Va when the equalization FET24has been switched OFF, and a voltage Vb when the equalization FET24has been switched ON, from the AD converter26.

The controller20also estimates the voltage Va from the voltage Vb measured by the AD converter26using Equation (1) so as to compute an estimated voltage Va calc.

Va⁢calc=Vb×Rcn-1+RsnRsn(1)

If there are no abnormalities in the battery12or the respective elements, the estimated voltage Va calc is equivalent to the voltage Va. Thus, detection for abnormalities in the battery12and elements is performed by comparing the estimated voltage Va calc to the measured voltage Va. For example, an abnormality is determined to have occurred in cases in which the estimated voltage Va calc and the voltage Va diverge by a predetermined threshold or greater.

In cases in which an abnormality has been detected, as a failsafe, the controller20switches the main relay16OFF such that usage of the battery cell14where the abnormality was detected is stopped.

Next, detailed explanation follows regarding processing performed by the controller20of the power supply device10according to the present exemplary embodiment configured as described above.FIG.4is a flowchart illustrating an example of a flow of processing performed by the controller20of the power supply device10according to the present exemplary embodiment. Note that although the processing inFIG.4is described as processing with respect to a single battery cell14, this processing is performed on each of the battery cells14in sequence.

At step100, the CPU20A switches the equalization FET24OFF and acquires the voltage Va measured by the AD converter26. Processing then transitions to step102.

At step102, the CPU20A switches the equalization FET24ON and acquires the voltage Vb measured by the AD converter26. Processing then transitions to step104.

At step104, the CPU20A computes the voltage Va from the voltage Vb, and processing transitions to step106. Namely, the estimated voltage Va calc is computed from the voltage Vb using Equation (1) described previously.

At step106, the CPU20A compares the estimated voltage Va calc to the actual measured voltage Va, and processing transitions to step108.

At step108, the CPU20A determines whether or not |Va−Va calc| is a predetermined threshold or greater. Namely, determination is made as to whether or not the estimated voltage Va calc diverges from the actual measured voltage Va by the threshold or greater. The series of processing is ended in cases in which this determination is negative, whereas processing transitions to step110in cases in which this determination is affirmative.

At step110, the CPU20A determines whether or not the number of times at the threshold or greater has reached a predetermined number of times or greater. This determination as to whether or not the number of times at the threshold or greater has reached the predetermined number of times or greater is performed in order to suppress incorrect determination of an abnormality. The series of processing is ended in cases in which this determination is negative, whereas processing transitions to step112in cases in which this determination is affirmative. Note that the processing of step110may be omitted.

At step112, the CPU20A determines that an abnormality has occurred, switches the main relay16OFF, and ends the series of processing. Thus, power supply to the load22is stopped in cases in which an abnormality is determined to have occurred, thereby enabling a failsafe to be implemented in the event of an abnormality.

Thus, in the power supply device10according to the present exemplary embodiment, the voltage Va when the equalization FET24is OFF is estimated from the voltage Vb when the equalization FET24is ON, and this estimated voltage Va calc is compared to the measured voltage Va, thereby enabling any abnormalities in the battery cell14and elements such as the capacitor C to be detected.

In the processing inFIG.4, abnormality detection is performed on each of the plural battery cells14in sequence. Explanation follows regarding an example in which abnormality detection is performed collectively on plural of the battery cells14.

As illustrated inFIG.5, in the power supply device10according to the present exemplary embodiment, the resistors Rcn, Rcn-1configure common circuitry for adjacent battery cells14. Thus, if all of the equalization FETs24are switched ON, these adjacent battery cells14are affected, and so abnormality detection cannot be performed simultaneously on these adjacent battery cells14. Note thatFIG.5is a diagram illustrating a detailed configuration of the power supply device10, focusing on two adjacent battery cells14.

However, performing abnormality detection simultaneously on non-adjacent battery cells14enables the processing time to be reduced compared to the processing inFIG.4.

Specifically, the equalization FETs24of all the battery cells11are switched OFF, and the voltage Va of each of the battery cells14is measured and acquired. Next, the equalization FETs24of odd-numbered battery cells14are switched ON while the equalization FETs21of even-numbered battery cells14remain switched OFF, and the voltage Vb of each of the odd-numbered battery cells14is measured and acquired. Next, the equalization FETs24of the even-numbered battery cells14are switched ON and the equalization FETs24of the odd-numbered battery cells14are switched OFF, and the voltage Vb of each of the even-numbered battery cells14is measured and acquired, estimated voltage Va calc is then computed for each of the battery cells14, and the estimated voltage Va calc is compared to the measured voltage Va to detect for abnormalities in each of the battery cells14. This enables the processing time to be reduced compared to cases in which abnormality detection is performed on each of the battery cells14in sequence.

Next, detailed explanation follows regarding processing performed by the controller20of the power supply device10according to the present exemplary embodiment in a case in which abnormality detection is performed simultaneously on non-adjacent battery cells14.FIG.6is a flowchart illustrating an example of a flow of processing performed by the controller20of the power supply device10according to the present exemplary embodiment in a case in which abnormality detection is performed simultaneously on non-adjacent battery cells14. The processing inFIG.6may for example be implemented periodically at predetermined intervals.

At step200, the CPU20A determines whether or not the main relay16has been switched OFF. Since voltage measurement is to be performed plural times, this determination is performed to ensure that a situation is in place in which current is not flowing in the battery. If current is flowing, voltage measurement error could occur, leading to incorrect determination. Thus, in the present exemplary embodiment, as an example, determination is made as to whether or not the main relay16has been switched OFF. However, determination that a situation is in place in which current is not flowing in the battery12may be made by another method. The series of processing is ended in cases in which this determination is negative, whereas processing transitions to step202in cases in which this determination is affirmative.

At step202, the CPU20A switches the equalization FETs24OFF and acquires the voltage Va measured by the AD converters26. Processing then transitions to step204.

At step204, the CPU20A switches the equalization FETs24of only the odd-numbered battery cells14ON and acquires the voltages Vb measured by the corresponding AD converters26. Processing then transitions to step206.

At step206, the CPU20A switches the equalization FETs24of only the even-numbered battery cells14ON and acquires the voltages Vb measured by the corresponding AD converters26. Processing then transitions to step208.

At step208, the CPU20A computes the voltage Va from the voltage Vb for each of the battery cells14, and processing transitions to step210. Namely, the estimated voltage Va calc is computed from the voltage Vb using Equation (1) described previously.

At step210, the CPU20A compares the estimated voltage Va calc to the actual measured voltage Va for each of the battery cells14, and processing transitions to step212.

At step212, the CPU20A determines whether or not |Va−Va calc| is a predetermined threshold or greater. Namely, determination is made as to whether or not there is a battery cell14for which the estimated voltage Va calc diverges from the actual measured voltage Va by the threshold or greater. The series of processing is ended in cases in which this determination is negative, whereas processing transitions to step214in cases in which this determination is affirmative.

At step214, the CPU20A determines whether or not the number of times at the threshold or greater has reached a predetermined number of times or greater. This determination as to whether or not the number of times at the threshold or greater has reached the predetermined number of times or greater is performed in order to suppress incorrect determination of an abnormality for each of the battery cells. The series of processing is ended in cases in which this determination is negative, whereas processing transitions to step216in cases in which this determination is affirmative. Note that the processing of step214may be omitted.

At step216, the CPU20A determines that an abnormality has occurred, switches the main relay16OFF, and ends the series of processing. Thus, power supply to the load22is stopped in cases in which an abnormality is determined to have occurred, thereby enabling a failsafe to be implemented in the event of an abnormality.

In this manner, the voltages Vb are acquired when the equalization FETs24of non-adjacent battery cells14are ON, thereby enabling the voltages Vb of plural battery cells14to be acquired simultaneously. This enables the processing time to be reduced compared to abnormality detection performed by acquiring the voltages Va and Vb of each of the battery cells14in sequence as in the processing inFIG.4.

Note that although an example has been described in which the battery cells14are divided into odd-numbered and even-numbered battery cells when switching the corresponding equalization FETs24ON to acquire the voltages Vb in the processing inFIG.6, there is no limitation thereto. As long as the equalization FETs24of non-adjacent battery cells14are switched ON and the corresponding voltages Vb are acquired, there is no limitation to using odd-numbered and even-numbered battery cells.

Moreover, although an example has been described in which the AD converters26that detect the voltages of the respective battery cells and the equalization FET24are contained in a single IC in the present exemplary embodiment, there is no limitation thereto. For example, as illustrated inFIG.7, an IC28for voltage detection that contains the AD converters26, and an IC30for voltage equalization that contains the equalization FETs24, may be configured as separate ICs. Note thatFIG.7is a diagram illustrating an example in which the AD converters26and the equalization FETs24are contained in separate ICs. Alternatively, plural ICs may be provided, each IC containing AD converters26and equalization FETs24and applied to a prescribed number of battery cells14. Alternatively, in cases in which an IC containing AD converters26and an IC containing equalization FETs24are provided, plural of each type of IC may be provided with each IC similarly handling a prescribed number of battery cells14.

Moreover, although the voltage Va is estimated from the voltage Vb in the above exemplary embodiment, there is no limitation thereto. The voltage Vb may be estimated from the voltage Va, and the estimated voltage Vb calc compared to the measured voltage Vb to determine whether or not an abnormality has occurred. In such cases, the controller estimates the voltage Vb from the voltage Va measured by the AD converter26using Equation (2) below to compute the estimated voltage Vb calc. If no abnormalities have occurred, the estimated voltage Vb calc is equivalent to the voltage Vb.

Vb⁢calc=Va×RsnRcn-1+Rsn(2)

Note that although the processing executed by the controller20in the above exemplary embodiment is described as software processing performed by the CPU loading and executing a program, there is no limitation to a CPU, and for example a graphics processing unit (GPU) may be employed instead. Alternatively, the processing may for example be performed by hardware such as an application specific integrated circuit (ASIC) or a field-programmable gate array (FPGA). Alternatively, the processing may be performed by a combination of both hardware and software. In cases in which the processing is software processing, the program may be stored in and distributed through various non-transitory storage media.

Furthermore, the present disclosure is not limited to the above description, and various other modifications may be implemented within a range not departing from the spirit of the present disclosure.

An object of the present disclosure is to provide a battery abnormality detection device capable of detecting abnormalities including failure and leakage of elements.

A first aspect of the present disclosure is a battery abnormality detection device that includes: a memory; and a processor coupled to the memory, the processor being configured to: for an equalization circuit including a discharge circuit provided with a switch that, in a case of being switched ON, causes a battery cell to discharge, and including a detector connected to the battery cell in parallel to the discharge circuit so as to detect a voltage of the battery cell, acquire a first voltage in a case in which the switch has been switched OFF and a second voltage in a case in which the switch has been switched ON, as detected by the detector, and estimate, from a detected value of one of the acquired first voltage or second voltage, an estimated value of another of the acquired first voltage or second voltage, and determine whether or not an abnormality has occurred in the equalization circuit based on the detected value and the estimated value.

In the first aspect, the equalization circuit includes the discharge circuit and the detector. The discharge circuit includes the switch, and causes the battery cell to discharge by switching the switch ON. The detector is connected to the battery cell in parallel to the discharge circuit so as to detect the voltage of the battery cell.

This enables abnormalities including failure or leakage of elements such as a switch or a capacitor included in the equalization circuit to be detected.

A second aspect of the present disclosure is the battery abnormality detection device of the first aspect, wherein: the equalization circuit is connected between a plurality of the battery cells connected together in series by connection through an interposed common circuit; and the processor is configured to switch to ON a switch corresponding to each of a plurality of the battery cells that are non-adjacent, and to acquire respective second voltages of the plurality of battery cells from the detector. This enables the processing time to be reduced compared to cases in which the second voltage of each of the battery cells is acquired in sequence.

A third aspect of the present disclosure is the battery abnormality detection device of the first or second claim, wherein the processor is configured to determine the abnormality a plurality of times, and to determine that an abnormality has occurred in the equalization circuit in a case in which a number of times a difference between the detected value and the estimated value has been a predetermined threshold or greater has reached a predetermined number of times or greater. This enables incorrect determination of an abnormality to be suppressed.

A fourth aspect of the present disclosure is the battery abnormality detection device of any of the first to third aspects, wherein a main switch enabling ON/OFF switching of power supply from the battery cell to a load is switched OFF by the processor in a case in which an abnormality has been detected in the equalization circuit. This enables an abnormality failsafe in which the power supply is stopped to be implemented in cases in which an abnormality has occurred.

A fifth aspect of the present disclosure is a battery abnormality detection method, the battery abnormality detection method that includes, for an equalization circuit including a discharge circuit provided with a switch that, in a case of being switched ON, causes a battery cell to discharge and including a detector connected to the battery cell in parallel to the discharge circuit so as to detect a voltage of the battery cell, by a processor: acquiring a first voltage in a case in which the switch has been switched OFF and a second voltage in a case in which the switch has been switched ON, as detected by the detector, and estimating, from a detected value of one of the acquired first voltage or second voltage, an estimated value of another of the acquired first voltage or second voltage and determining whether or not an abnormality has occurred in the equalization circuit based on the detected value and the estimated value.

A sixth aspect of the present disclosure is a non-transitory computer readable recording medium recorded with a program executable by a computer to perform battery abnormality detection processing that includes, for an equalization circuit including a discharge circuit provided with a switch that, in a case of being switched ON, causes a battery cell to discharge and including a detector connected to the battery cell in parallel to the discharge circuit so as to detect a voltage of the battery cell: acquiring a first voltage in a case in which the switch has been switched OFF and a second voltage in a case in which the switch has been switched ON, as detected by the detector, and estimating, from a detected value of one of the acquired first voltage or second voltage, an estimated value of another of the acquired first voltage or second voltage, and determining whether or not an abnormality has occurred in the equalization circuit based on the detected value and the estimated value.

The present disclosure provides a battery abnormality detection device capable of detecting abnormalities including failure and leakage of elements.