Patent ID: 12199022

DESCRIPTION OF EXEMPLARY EMBODIMENTS

Hereinafter, the invention will be described through embodiments of the invention, but the following embodiments do not limit the present invention according to claims. In addition, not all of the combinations of features described in the embodiments are essential for a solving means of the invention. Note that, in the present specification and the drawings, elements having substantially the same functions and configurations are denoted by the same reference numerals, and redundant descriptions for them are omitted. Also, elements not directly related to the present invention are omitted from the drawings. In one drawing, elements having the same function and configuration are representatively denoted by a reference numeral, and the reference numerals for others may be omitted.

As used herein, one of directions parallel to a depth direction of an output element is referred to as “upper”, and the other is referred to as “lower”. One of two main surfaces of a substrate, a layer or other member is referred to as an “upper surface”, and the other surface is referred to as a “lower surface”. The “upper” and “lower” directions are not limited to a gravity direction or a direction at a time of mounting a semiconductor module.

As used herein, technical matters may be described with orthogonal coordinate axes consisting of an X axis, a Y axis, and a Z axis. The orthogonal coordinate axes are merely for specifying relative positions of components, and thus not for limiting to a specific direction. For example, the Z axis is not limited to indicate a height direction with respect to the ground. A+Z axis direction and a −Z axis direction are directions opposite to each other. When a direction is referred to as a “Z axis direction” without these “+” and “−” signs, it means the Z axis direction is parallel to +Z and −Z axes. As used herein, the X and Y axes are orthogonal axes parallel to an upper surface and a lower surface of the output element. Also, the Z axis is an axis perpendicular to the upper surface and the lower surface of the output element. As used herein, a direction of the Z axis may be referred to as a depth direction. In addition, as used herein, a direction parallel to the upper surface and the lower surface of the output element, which includes the X and Y axes, may be referred to as a horizontal direction.

As used herein, phrases such as “same” or “equal” may be used even when there is an error caused due to a variation in a manufacturing step or the like. This error is within a range of 10% or less, for example.

FIG.1illustrates one example of a semiconductor module100according to one embodiment of the present invention. The semiconductor module100may function as a power conversion device such as an inverter or a converter. An electronic circuit including an output element40and the like is accommodated inside the semiconductor module100. The semiconductor module100of the present example includes a resin case10, a base plate15, and an insulating substrate21.

The electronic circuit including the output element40and the like is accommodated inside the resin case10. In the present example, the resin case10is provided surrounding an accommodation space194for accommodating a plurality of output elements40. By way of example, the resin case10is connected to the base plate15on which the insulating substrate21is arranged. Note that, even though it is omitted from illustration ofFIG.1, a corner of the resin case10may have a through hole such as a screw hole for fixing the semiconductor module100to an outside. The resin case10may have a side wall provided so as to surround the accommodation space194.

The resin case10is provided with a plurality of main terminals70. In the present example, the resin case10is provided with a main terminal70-1, a main terminal70-2, a main terminal70-3, and a main terminal70-4. The plurality of main terminals70are electrically connected to an electronic circuit arranged on the insulating substrate21. The main terminals70are formed of conductive materials. For example, each main terminal70serves as a current path for a large current that flows into a power device such as a SiCMOSFET. The main terminal70of the present example has a plate shape.

The main terminals70-2and70-3are examples of output terminals. The main terminals70-2and70-3are connected to a load being external to the module, and configured to output an output current from the output element40to the load being external to the module.

The resin case10is provided with a gate terminal50and a sense terminal60. In the present example, the resin case10is provided with a gate terminal50-1, a gate terminal50-2, a sense terminal60-1, a sense terminal60-2, and a sense terminal60-3. The gate terminal50and the sense terminal60may have areas smaller than an area of the main terminal70as seen in a top view. The gate terminal50and the sense terminal60are electrically connected to an electronic circuit arranged on the insulating substrate21. By applying the gate terminal50with a gate voltage, the gate voltage is applied to a gate pad of each output element40. Therefore, by controlling the gate voltage, each output element40can be controlled. Further, a sense current can be measured by the sense terminal60. That is, the sense terminal60is configured to detect a current that flows in the output element. The gate terminal50and the sense terminal60are connected to a circuit pattern26through a wire27.

In the present example, the resin case10and the base plate15are molded with resin such as thermosetting resin with which they can be formed through injection molding, or ultraviolet curing resin with which they can be formed through UV molding. The resin may contain one or more polymer materials selected from a polyphenylene sulfide (PPS) resin, a polybutylene terephthalate (PBT) resin, a polyamide (PA) resin, an acrylonitrile butadiene styrene (ABS) resin, an acrylic resin and the like.

One or more insulating substrates21are arranged on the base plate15. In the present example, an insulating substrate21-1and an insulating substrate21-2are arranged alongside each other in an X axis direction on the base plate15. At least one output element40is arranged on the insulating substrate21. In the present example, three output elements40-1and three output elements40-2are arranged on the insulating substrate21-1, and three output elements40-3and three output elements40-4are arranged on the insulating substrate21-2. In the present example, the output elements40-1and40-2are arranged on an upper surface of a circuit pattern26-1on the insulating substrate21-1. The output elements40-3and40-4are arranged on an upper surface of a circuit pattern26-2on the insulating substrate21-2.

In the present example, the output elements40-1and40-3are SiCMOSFETs, and the output elements40-2and40-4are FWDs (Free Wheel Diodes). The output elements40-1and40-3can be IGBTs. An RC (Reverse Conducting)-IGBT being a combination of an IGBT, a FWD, and the like can be arranged on the insulating substrate21. A main electrode and a gate pad are provided on front surfaces of the output elements40-1and40-3. By way of example, the main electrode is a source electrode. Back-surface electrodes are provided on back surfaces of the output elements40-1and40-3. By way of example, the back-surface electrodes are drain electrodes. If the output elements40-1and40-3are the IGBTs, the source electrode may be read as being an emitter electrode, and a drain electrode may be read as being a collector electrode. Anode electrodes are provided on front surfaces of the output elements40-2and40-4. Cathode electrodes are provided on back surfaces of the output elements40-2and40-4. The output elements40-1and40-2may constitute an upper arm of the semiconductor module100. The output elements40-3and40-4may constitute a lower arm of the semiconductor module100.

The circuit pattern26is arranged on an upper surface of the insulating substrate21. The circuit pattern26is a wiring pattern provided on the insulating substrate21. The circuit pattern26may be formed by directly bonding a copper plate or an aluminum plate, or a plated plate of these materials, or bonding the same through a brazing layer, to the insulating substrate21consisting of aluminum oxide ceramics, silicon nitride ceramics, aluminum nitride ceramics, or the like. The insulating substrate21may be consisting of ceramics added with zirconium oxide, yttrium oxide, or the like. The circuit pattern26may be consisting of an alloy containing at least any one of copper or aluminum. The insulating substrate21and the circuit pattern26may be formed by sticking an insulation sheet on a conductive member such as a copper plate or an aluminum plate. In other words, the insulating substrate21and the circuit pattern26may be a plate member made of conductive member and an insulating member formed integrally. The each output element40and each circuit pattern26are connected through the wire27.

In the present example, an encapsulation resin12is provided inside the resin case10, as illustrated inFIGS.5and6. The encapsulation resin12is configured to encapsulate the output element40, the circuit pattern26, and the wire27. In other words, the encapsulation resin12is for covering an entire output element40, an entire circuit pattern26and an entire wire27so that the output element40, the circuit pattern26, and the wire27are not to be exposed. By virtue of the encapsulation resin12, the output element40, the circuit pattern26, and the wire27can be protected. By way of example, the encapsulation resin12is a silicon gel.

The resin case10is provided with a connecting portion72and a connecting portion74. The connecting portions72and74are provided in the resin case10and the accommodation space194. In the present example, at least a part of the connecting portions72and74is provided in the resin case10. Further, at least a part of the connecting portions72and74is provided in the accommodation space194. In the present example, there is a gap76between the connecting portion72and the connecting portion74, so that the connecting portions72and74are not directly connected. The connecting portion72is connected to the circuit pattern26through the wire27. The connecting portions72and74are electrically connected to the main terminals70-2and70-3. The connecting portion74is directly connected to the main terminals70-2and70-3. The connecting portions72and74are connected via an inductor84(refer toFIG.2). Therefore, the connecting portion72is connected to the main terminals70-2and70-3via the inductor84or the connecting portion74.

FIG.2illustrates one example of circuitry of the output element40of the semiconductor module100. In the present example, only one output element is illustrated for each of the output elements40-1,40-2,40-3, and40-4, whereas the each of the output elements40can have three output elements connected in parallel. The drain electrode of the output element40-1and the cathode electrode of the output element40-2are connected to the main terminal70-1. The source electrode of the output element40-3and the anode electrode of the output element40-4are connected to the main terminal70-4. The gate pad of the output element40-1is connected to the gate terminal50-1. The gate pad of the output element40-3is connected to the gate terminal50-2.

The upper arm composed of the output elements40-1and40-2, and the lower arm composed of the output elements40-3and40-4are connected through an arm-to-arm wiring line62. InFIG.2, the arm-to-arm wiring line62is shown with a bold line. More specifically, the source electrode of the output element40-1and the anode electrode of the output element40-2, and the drain electrode of the output element40-3and the cathode electrode of the output element40-4are connected through the arm-to-arm wiring line62. The arm-to-arm wiring line62is connected to the main terminals70-2and70-3via a connection point C1. The arm-to-arm wiring line62is connected to the sense terminal60-2via a connection point C2. That is, the connection points C1and C2are provided on the arm-to-arm wiring line62.

The inductor84is provided between the connection point C1for connecting the arm-to-arm wiring line62with the main terminal70(the main terminals70-2and70-3in the present example), and the main terminal70. In other words, the inductor84is provided between the source electrode of the output element40-1and the anode electrode of the output element40-2, and the main terminal70. The inductor84is provided between the drain electrode of the output element40-3and the cathode electrode of the output element40-4, and the main terminal70. Other than the inductor84, wiring inductances generated by the wire27and the circuit pattern26on the insulating substrate21may be provided between the source electrode of the output element40-1and the anode electrode of the output element40-2, and the main terminal70. Other than the inductor84, wiring inductances generated by the wire27and the circuit pattern26on the insulating substrate21may be provided between the drain electrode of the output element40-3and cathode electrode of the output element40-4, and the main terminal70. A wiring inductance may also be provided between the connection point C1for connecting the arm-to-arm wiring line62and the main terminal70, and the main terminal70. Overall, the wiring inductances and the inductance generated by the inductor84are provided between the connection point C1for connecting the arm-to-arm wiring line62with the main terminal70, and the main terminal70.

The inductor84is not provided between the connection point C2for connecting the arm-to-arm wiring line62with the sense terminal60-2, and the sense terminal60-2. That is, the inductor84is not provided between the source electrode of the output element40-1and the anode electrode of the output element40-2, and the sense terminal60-2. The inductor84is not provided between the drain electrode of the output element40-3and the cathode electrode of the output element40-4, and the sense terminal60-2. Wiring inductances generated by the wire27and the circuit pattern26on the insulating substrate21may be provided between the source electrode of the output element40-1and the anode electrode of the output element40-2, and the sense terminal60-2. Wiring inductances generated by the wire27and the circuit pattern26on the insulating substrate21may be provided between the drain electrode of the output element40-3and the cathode electrode of the output element40-4, and the sense terminal60-2. A wiring inductance may also be provided between the connection point C2for connecting the arm-to-arm wiring line62with the sense terminal60-2, and the sense terminal60-2. Overall, the wiring inductances are provided between the connection point C2for connecting the arm-to-arm wiring line62with the sense terminal60-2, and the sense terminal60-2, but an inductance generated by the inductor84is not provided between them.

Note that, the wiring inductances generated by the wire27and the circuit pattern26are significantly less than the inductance generated by the inductor84. Preferably, the wiring inductances generated by the wire27and the circuit pattern26are one-tenth of the inductance generated by the inductor84, or less. More preferably, the wiring inductances generated by the wire27and the circuit pattern26are one-twentieth of the inductance generated by the inductor84, or less. With such a configuration, loss that is caused due to inner wiring lines can be reduced and a destructive failure in the output element40can be prevented at a same time.

The connection point C1and the connection point C2are separately shown inFIG.2, whereas the connection points C1and C2can be one point. When the connection points C1and C2are conducted with each other with very low impedance, the connection points C1and C2can be one point.

FIG.3illustrates one example of connection of the output element40of the semiconductor module100to an outside. In the present example, the semiconductor module100is externally connected to a power supply140, a load160, and a controller180.

The power supply140is configured to supply the semiconductor module100with power. The power supply140is connected to the main terminal70-1and the main terminal70-4.

The load160is connected to the main terminals70-2and70-3. An output current from the output element40is output to the load160via the main terminals70-2and70-3(i.e., output terminals).

The controller180is configured to control the output element40. In the present example, the controller180is connected to the gate terminals50-1and50-2and the sense terminals60-1,60-2, and60-3. The controller180may control the output element40by controlling a gate voltage to be applied to the gate terminals50-1and50-2. The controller180may control the output element40by measuring a sense current from the sense terminal60. For example, the controller180is configured to cut off the gate voltage from being applied, when a measured value of the sense current is an abnormal value. That is, the controller180is configured to output a cut-off signal for cutting off the output element40, when the measured value of the sense current is the abnormal value. The controller180may measure the sense current from any one of the sense terminals60-1,60-2, and60-3, or measure sense currents from all of the sense terminals60-1,60-2, and60-3.

As shown inFIG.3, if a short-circuit is generated in the load160that is connected to the main terminals70-2and70-3(i.e., output terminals), a current that flows into the output element40is rapidly increased. If the current that flows into the output element40is increased by three times of a rated current of the output element40or more, the current that flows into the output element40is saturated. In that case, a voltage applied to the output element40is increased, and short-circuit energy is generated in the output element40. Therefore, if the short-circuit is generated in the load160, the output element40experiences a destructive failure because of the short-circuit energy unless current that flows in the output element40is cut-off. In particular, if the output element40is a SiCMOSFET, because of its low short-circuit withstand capability, the output element40is likely to experience a destructive failure.

A period of time until the current that flows in the output element40is saturated is affected by an inductance of an output wire connected to an output terminal. If the inductance of the output wire connected to the output terminal is dozens of nH or less, not enough time can be obtained from detecting a short-circuit in the load160to cutting off a gate voltage to be applied.

In the present example, the inductor84having inductance of 1 μH or more is provided between the connection point C1and the output terminal (i.e., the main terminals70-2and70-3). By virtue of providing the output wire connected to the output terminal with the inductance of 1 μH or more, a rapid increase in current can be prevented, and more time can be obtained before current is saturated. Therefore, enough time can be obtained for the controller180to output the cut-off signal for cutting off the output element40, and thereby a destructive failure of the output element40can be prevented.

If the load160is short-circuited, the controller180is configured to detect the short-circuit and output the cut-off signal for cutting off the output element40before the output element40has a saturation current. Detecting the short-circuit by the controller180may mean that detecting an abnormal value in a measured value of the sense current from the sense terminal60, for example. Detecting the abnormal value in the measured value of the sense current may mean that detecting if the sense current is at the rated current of the output element40. Outputting the cut-off signal for cutting off the output element40may mean that cutting off a gate voltage to be applied to the output element40.

The inductance of the inductor84may be one-tenth of an inductance of the load160, or less. By making the inductor84have the inductance of one-tenth of the inductance of the load160or less, influence from the inductor84can be minimized while no short-circuit is generated. The inductance of the inductor84may be one-hundredth of the inductance of the load160, or less. The inductance of the inductor84may be one-thousandth of the inductance of the load160, or less. The inductance of the load160is 10 μH or more, by way of example.

FIG.4illustrates one example of an arrangement of the inductor84in the semiconductor module100. InFIG.4, the inductor84is shown with a dotted line. Also, a direction of a current to flow from the connecting portion72to the output terminal is shown with arrows. In the present example, the inductor84is connected to the connecting portion72. In addition, the inductor84is connected to at least one of the output terminal or the connecting portion74. The inductor84is arranged so as to encircle a circuit including the output element40, as seen in a top view. A number of times for the inductor84to encircle the circuit including the output element40is referred to as a number of windings of a wiring line of the inductor84. As seen in a top view, the resin case10has four sides that surround the circuit including the output element40. One encircling may be counted when the inductor84is wound around from a start point on any side to an end point on this side via other three sides. The start point and the end point may be apart from each other on this side. The number of windings of the wiring line of the inductor84may be at least one or more. InFIG.4, the number of windings of the wiring line of the inductor84is one. In order to increase an inductance of the inductor84, it is preferable that the number of windings of the wiring line of the inductor84is at least one or more.

InFIG.4, a circuit pattern26-3is a circuit pattern26in the circuit pattern26-1, which is connected to the main electrodes of the output elements40-1and40-2with the wire27. Also, a circuit pattern26-4is a circuit pattern26in the circuit pattern26-2, which is connected to the back-surface electrodes of the output elements40-3and40-4. InFIG.4, the circuit patterns26-3and26-4, and the connecting portion72are examples of the arm-to-arm wiring line62illustrated inFIG.2. At least a part of the arm-to-arm wiring line62may form the circuit pattern26. At least a part of the arm-to-arm wiring line62may form the connecting portion72. The connection point C1may be a point having an electric potential equal to those of the main electrodes of the output elements40-1and40-2. The connection point C1may be a point having an electric potential equal to those of the back-surface electrodes of the output elements40-3and40-4. InFIG.4, the connection point C1is provided on the circuit pattern26-4, and is a connection point on the wire27connected to the connecting portion72.

The connection point C2may be a point having an electric potential equal to those of the main electrodes of the output elements40-1and40-2. The connection point C2may be a point having an electric potential equal to those of the back-surface electrodes of the output elements40-3and40-4. InFIG.4, the connection point C2is provided on the circuit pattern26-3, and is a connection point on the wire27electrically connected to the sense terminal60-2.

The wiring line of the inductor84may be a band-form conductor. The wiring line of the inductor84is formed of copper, aluminum, copper alloy, or aluminum alloy, by way of example. The wiring line of the inductor84may have a width of from 1.0 mm to 10.0 mm in a Z axis direction. The inductor84may have a thickness of from 0.1 mm to 1.0 mm in a thickness direction of a side wall of the resin case10(i.e., a direction perpendicular to an extending direction of the inductor84). With such a configuration, electrical resistance can be reduced in an output current while increasing the inductance of the inductor84. The inductor84may have a length of from 100 mm to 1500 mm. With such a length, the electrical resistance can be reduced in the output current while providing a predefined inductance.

InFIG.4, the wiring line of the inductor84is provided surrounding the accommodation space194, as seen in a top view. In order to surround the accommodation space194, the wiring line of the inductor84is provided along the side wall of the resin case10. In the present example, the wiring line of the inductor84is provided inside the resin case10. That is, the wiring line of the inductor84is embedded in a resin part of the resin case10. A part of the wiring line of the inductor84may be exposed from the resin case10. Since the wiring line of the inductor84is provided in the resin case10, the semiconductor module100can be prevented from being oversized.

FIG.5illustrates one example of a schematic view of the connecting portion72of the semiconductor module100. InFIG.5, a cross section X-Z of the semiconductor module100is illustrated. In the cross section, the semiconductor module100includes the resin case10, the encapsulation resin12, the base plate15, the insulating substrate21, the circuit pattern26, the wire27, the output element40, the main terminal70-2, the connecting portion72, and the inductor84. In the cross section, the main terminal70-2and the inductor84are directly connected.

In the cross section, the wiring line of the inductor84is provided farther outward inside the resin case10than the connecting portion72. With such a configuration, the wiring line of the inductor84can be provided inside the resin case10, and thereby the semiconductor module100can be prevented from being oversized.

FIG.6illustrates one example of a schematic view of the connecting portion74of the semiconductor module100. InFIG.6, a cross section X-Z of the semiconductor module100is illustrated. In the cross section, the semiconductor module100includes the resin case10, the encapsulation resin12, the base plate15, the insulating substrate21, the circuit pattern26, the output element40, the main terminal70-3, the connecting portion74, and the inductor84. In the cross section, the main terminal70-3, the connecting portion74, and the inductor84are directly connected.

Similar toFIG.5, the wiring line of the inductor84is provided farther outward in the resin case10than the connecting portion74in the cross section. With such a configuration, the wiring line of the inductor84can be provided inside the resin case10, and thereby the semiconductor module100can be prevented from being oversized.

FIG.7illustrates one example of an arrangement of an inductor84in a semiconductor module200. In view of a configuration of the inductor84, the semiconductor module200illustrated inFIG.7is different from the semiconductor module100illustrated inFIG.4. Other than that, the semiconductor module200may have a same configuration as that of the semiconductor module100.

InFIG.7, a number of windings of a wiring line of the inductor84is two. An inductance of the inductor84can be increased by increasing the number of windings of the wiring line of the inductor84, and thus a destructive failure in an output element40can be prevented. The number of windings of the wiring line of the inductor84can be three or more. The number of windings of the wiring line of the inductor84is preferably a number that allows the wiring line to be inside the resin case10. The inductor84may be concentrically arranged as seen in a top view.

FIG.8illustrates one example of a schematic view of a connecting portion72of the semiconductor module200. InFIG.8, a cross section X-Z of the semiconductor module200is illustrated. In the cross section, the semiconductor module200includes the resin case10, an encapsulation resin12, a base plate15, an insulating substrate21, a circuit pattern26, a wire27, the output element40, a main terminal70-2, the connecting portion72, and the inductor84. The inductor84has a first portion86and a second portion88in the cross section. In the inductor84, the first portion86is arranged farther inward than the second portion88. In the cross section, the main terminal70-2and the second portion88are directly connected.

In the cross section, the wiring line of the inductor84is provided farther outward in the resin case10than the connecting portion72. In the present example, both of the first portion86and the second portion88are provided farther outward in the resin case10than the connecting portion72. With such a configuration, the wiring line of the inductor84can be provided inside the resin case10, and thereby the semiconductor module200can be prevented from being oversized. In addition, in order to prevent the semiconductor module200from being oversized, it is preferable to provide at least a part of the first portion86, the second portion88, and the connecting portion72within a same range in a Z axis direction.

FIG.9illustrates one example of a schematic view of a connecting portion74of the semiconductor module200. InFIG.9, a cross section X-Z of the semiconductor module200is illustrated. In the cross section, the semiconductor module200includes the resin case10, the encapsulation resin12, the base plate15, the insulating substrate21, the circuit pattern26, the output element40, a main terminal70-3, the connecting portion74, and the inductor84. The inductor84has a first portion86and a second portion88in the cross section. In the cross section, the main terminal70-3, the connecting portion74, and the second portion88are directly connected.

Similar toFIG.8, the wiring line of the inductor84is provided farther outward in the resin case10than the connecting portion74in the cross section. In the present example, both of the first portion86and the second portion88are provided farther outward in the resin case10than the connecting portion74. With such a configuration, the wiring line of the inductor84can be provided inside the resin case10, and thereby the semiconductor module200can be prevented from being oversized. In addition, in order to prevent the semiconductor module200from being oversized, it is preferable to provide at least a part of the first portion86, the second portion88, and the connecting portion74within a same range in a Z axis direction.

FIG.10illustrates one example of a schematic view of a connecting portion72of the semiconductor module300. In view of a configuration of an encapsulation resin12, the semiconductor module300illustrated inFIG.10is different from the semiconductor module100illustrated inFIG.5. Other than that, the semiconductor module300may have a same configuration as that of the semiconductor module100.

The encapsulation resin12may contain silicon gel, and material having permeability higher than that of silicon gel. In the present example, the encapsulation resin12includes a silicon gel layer14and a high permeability layer16. The silicon gel layer14may contain silicon gel. The high permeability layer16may be provided on the silicon gel layer14. The high permeability layer16may contain material having permeability higher than that of the silicon gel layer14. The high permeability layer16contains a soft magnetic material, a metal material such as iron, an oxide material such as ferrite, and the like. The high permeability layer16may contain silicon gel. The silicon gel layer14may not contain a soft magnetic material. Since the encapsulation resin12has the high permeability layer16, an inductance of an inductor84can be increased further.

It is preferable that the high permeability layer16is not in direct contact with a circuit pattern26, a wire27, an output element40, and the like. This is because if the high permeability layer16contains the metal material etc., the circuit pattern26, the wire27, the output element40, and the like may be affected by the metal material etc.

In the present example, the encapsulation resin12is shown as being provided with the silicon gel layer14and the high permeability layer16, whereas the encapsulation resin12is not limited to be provided with two layers like this example. The encapsulation resin12can only have one layer and contain silicon gel and material having permeability higher than that of silicon gel. In other words, this one layer can contain the silicon gel and the material having permeability higher than that of the silicon gel. The encapsulation resin12can be provided with three or more layers.

FIG.11illustrates one example of arrangements of an inductor84and a material90in a semiconductor module400. The semiconductor module400illustrated inFIG.11is different from the semiconductor module100illustrated inFIG.5in that the semiconductor module400includes the material90. Other than that, the semiconductor module400may have a same configuration as that of the semiconductor module100. InFIG.11, the material90is shown with a dot-dash line.

In the present example, the semiconductor module400includes the material90. The material90may have permeability higher than that of an encapsulation resin12. The material90has permeability higher than that of silicon gel, for example. The material90is a metal material such as iron, by way of example. The material90is provided inside a resin case10. Further, the material90is preferably provided farther inward in the semiconductor module400than the inductor84. An inductance of the inductor84can be increased further by providing the material90, which has permeability higher than that of silicon gel, farther inward in the semiconductor module400than the inductor84. The material90may be provided in a ring-shape as seen in a top view.

FIG.12illustrates one example of a schematic view of a connecting portion72of the semiconductor module400. InFIG.12, a cross section X-Z of the semiconductor module400is illustrated. In the cross section, the semiconductor module400includes the resin case10, the encapsulation resin12, a base plate15, an insulating substrate21, a circuit pattern26, a wire27, an output element40, a main terminal70-2, the connecting portion72, the inductor84, and the material90. In the cross section, the main terminal70-2and the inductor84are directly connected.

In the cross section, a wiring line of the inductor84and the material90are provided farther outward in the resin case10than the connecting portion72. With such a configuration, the wiring line of the inductor84and the material90can be provided inside the resin case10, and thereby the semiconductor module400can be prevented from being oversized. In addition, because the wiring line of the inductor84and the material90increase an inductance of the inductor84, they are preferably provided within a same range in a Z axis direction. In order to further increase the inductance of the inductor84, the encapsulation resin12may include a high permeability layer16as shown inFIG.10.

FIG.13illustrates one example of a schematic view of a connecting portion74of the semiconductor module400. InFIG.13, a cross section X-Z of the semiconductor module400is illustrated. In the cross section, the semiconductor module400includes the resin case10, the encapsulation resin12, the base plate15, the insulating substrate21, the circuit pattern26, the output element40, a main terminal70-3, the connecting portion74, the inductor84, and the material90. In the cross section, the main terminal70-3, the connecting portion74, and the inductor84are directly connected.

Similar toFIG.12, in the cross section, the wiring line of the inductor84and the material90are provided farther outward in the resin case10than the connecting portion74. With such a configuration, the wiring line of the inductor84and the material90can be provided inside the resin case10, and thereby the semiconductor module400can be prevented from being oversized. In addition, because the wiring line of the inductor84and the material90increase an inductance of the inductor84, they are preferably provided within a same range in a Z axis direction.

FIG.14illustrates one example of a semiconductor module500according to a comparative example. The semiconductor module500illustrated inFIG.14is different from the semiconductor module100illustrated inFIG.1in that the semiconductor module500includes no inductor84. Other than that, the semiconductor module500may have a same configuration as that of the semiconductor module100.

In the present example, the semiconductor module500includes a connecting portion78instead of a connecting portion72and a connecting portion74. The connecting portion78is connected to a circuit pattern26through a wire27. The connecting portion78is connected to a main terminal70-2and a main terminal70-3.

FIG.15illustrates changes in current and voltage of the output elements40of the semiconductor modules100and500when the loads160are short-circuited. InFIG.15, a bold line shows the change in the current of the output element40of the semiconductor module100. InFIG.15, a thick dotted line shows the change in the voltage of the output element40of the semiconductor module100. InFIG.15, a thin line shows the change in the current of the output element40of the semiconductor module500. InFIG.15, a thin dotted line shows the change in the voltage of the output element40of the semiconductor module500. Note that, the changes in the current and voltage in the output element40of each semiconductor module may be measured by the sense terminals60-1,60-2, and60-3, or may be measured by any one of the sense terminals60.

In the semiconductor module500of the comparative example, when a short-circuit is generated on a side of the load160, a voltage applied to the output element40becomes almost zero, instantaneously. Accompanying to that, current that flows in the output element40is rapidly increased. In the semiconductor module500of the comparative example, since there is no inductor84provided, current enters into a saturation region instantaneously. When the current enters into the saturation region, voltage between the power supply140and a ground is applied, and thus the voltage is increased rapidly. As a result, an amount of energy becomes very high due to high voltage and current keep being applied, and the output element40may experience a destructive failure after detecting the current increase but before cutting off a gate voltage to be applied to the output element40.

Similarly, in the semiconductor module100, when a short-circuit is generated on a side of the load160, a voltage applied to the output element40becomes almost zero, instantaneously. Accompanying to that, current that flows in the output element40is increased, but since the semiconductor module100is provided with the inductor84, it takes time until the current enters into a saturation region. Also, voltage is increased by only a small amount before the current enters into the saturation region. The current increase is detected before the current enters into the saturation region, and then a gate voltage to be applied to the output element40is cut-off. Therefore, with a small amount of energy, the output element40will not experience a problem of the destructive failure.

In the present example, a rated current A of the output element40is shown as a detection current with a current value at a beginning of a detection, and 3 A being a current three times as much as the rated current is shown as a saturation current. In the semiconductor module100, T1is a period of time for the detection current to reach the saturation current. In the semiconductor module500, T2is a period of time for the detection current to reach the saturation current. Since the semiconductor module100includes the inductor84having an inductance of 1 μH or more, a rapid increase in current can be prevented, and thus the time T1can be greater than the time T2.

The time T1is preferably 10 μs or more. With the time T1being 10 μs or more, there can be enough time from the detecting to the cutting off. A gradient of the change in the output current may be di/dt<(3 A−A)/10 μs=2 A×105A/s. When the rated current A is 30 A, the gradient of the change in the output current can be di/dt<6×106A/s for the time T1to be 10 μs or more. The greater a value of the time T1is, the more preferable it is.

While the present invention have been described with the embodiments, the technical scope of the present invention is not limited to the above described embodiments. It is apparent to persons skilled in the art that various alterations and improvements can be added to the above-described embodiments. It is also apparent from the description of the claims that embodiments added with such alterations or improvements can be included in the technical scope of the present invention.

EXPLANATION OF REFERENCES

10: resin case;12: encapsulation resin;14: silicon gel layer;15: base plate;16: high permeability layer;21: insulating substrate;26: circuit pattern;27: wire;40: output element;50: gate terminal;60: sense terminal;62: arm-to-arm wiring line;70: main terminal;72: connecting portion;74: connecting portion;76: gap;78: connecting portion;84: inductor;86: first portion;88: second portion;90: material;100: semiconductor module;140: power supply;160: load;180: controller;194: accommodation space;200: semiconductor module;300: semiconductor module;400: semiconductor module;500: semiconductor module.