Patent ID: 12242394

DETAILED DESCRIPTION

In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding. One or more embodiments may be practiced without these specific details. Features described in one embodiment may be combined with features described in a different embodiment. In some examples, well-known structures and devices are described with reference to a block diagram form in order to avoid unnecessarily obscuring the present invention.1. GENERAL OVERVIEW2. ARCHITECTURAL OVERVIEW2.1 EXAMPLE CLASS FILE STRUCTURE2.2 EXAMPLE VIRTUAL MACHINE ARCHITECTURE2.3 LOADING, LINKING, AND INITIALIZING3. TRANSITIONING BETWEEN THREAD-CONFINED MEMORY SEGMENT VIEWS AND SHARED MEMORY SEGMENT VIEWS3.1 TYPES OF MEMORY SEGMENT VIEWS3.2 METHODS FOR TRANSITIONING BETWEEN THREAD-CONFINED MEMORY SEGMENT VIEWS AND SHARED MEMORY SEGMENT VIEWS3.3 EXAMPLE MEMORY SEGMENT VIEW OPERATIONS4. MISCELLANEOUS; EXTENSIONS5. HARDWARE OVERVIEW

1. GENERAL OVERVIEW

A system may include a memory segment view that is confined to access by a particular thread. That particular thread may seek to modify access permissions of the memory segment view such that additional and/or different thread(s) are permitted to access the memory referenced in the confined memory segment view. The system can allocate a new memory segment view, copy a reference to the physical memory segment from the confined memory segment view into the new memory segment view, and configure the new memory segment view to be accessible by those threads. The system can then provide a reference to the new memory segment view for use.

One or more embodiments described in this Specification and/or recited in the claims may not be included in this General Overview section.

2. ARCHITECTURAL OVERVIEW

FIG.1illustrates an example architecture in which techniques described herein may be practiced. Software and/or hardware components described with relation to the example architecture may be omitted or associated with a different set of functionality than described herein. Software and/or hardware components, not described herein, may be used within an environment in accordance with one or more embodiments. Accordingly, the example environment should not be constructed as limiting the scope of any of the claims.

As illustrated inFIG.1, a computing architecture100includes source code files101which are compiled by a compiler102into class files103representing the program to be executed. The class files103are then loaded and executed by an execution platform112, which includes a runtime environment113, an operating system111, and one or more application programming interfaces (APIs)110that enable communication between the runtime environment113and the operating system111. The runtime environment113includes a virtual machine104comprising various components, such as a memory manager105(which may include a garbage collector), a class file verifier106to check the validity of class files103, a class loader107to locate and build in-memory representations of classes, an interpreter108for executing the virtual machine104code, and a just-in-time (JIT) compiler109for producing optimized machine-level code.

In an embodiment, the computing architecture100includes source code files101that contain code that has been written in a particular programming language, such as Java, C, C++, C#, Ruby, Perl, and so forth. Thus, the source code files101adhere to a particular set of syntactic and/or semantic rules for the associated language. For example, code written in Java adheres to the Java Language Specification. However, since specifications are updated and revised over time, the source code files101may be associated with a version number indicating the revision of the specification to which the source code files101adhere. The exact programming language used to write the source code files101is generally not critical.

In various embodiments, the compiler102converts the source code, which is written according to a specification directed to the convenience of the programmer, to either machine or object code, which is executable directly by the particular machine environment, or an intermediate representation (“virtual machine code/instructions”), such as bytecode, which is executable by a virtual machine104that is capable of running on top of a variety of particular machine environments. The virtual machine instructions are executable by the virtual machine104in a more direct and efficient manner than the source code. Converting source code to virtual machine instructions includes mapping source code functionality from the language to virtual machine functionality that utilizes underlying resources, such as data structures. Often, functionality that is presented in simple terms via source code by the programmer is converted into more complex steps that map more directly to the instruction set supported by the underlying hardware on which the virtual machine104resides.

In general, programs are executed either as a compiled or an interpreted program. When a program is compiled, the code is transformed globally from a first language to a second language before execution. Since the work of transforming the code is performed ahead of time; compiled code tends to have excellent run-time performance. In addition, since the transformation occurs globally before execution, the code can be analyzed and optimized using techniques such as constant folding, dead code elimination, inlining, and so forth. However, depending on the program being executed, the startup time can be significant. In addition, inserting new code would require the program to be taken offline, re-compiled, and re-executed. For many dynamic languages (such as Java) which are designed to allow code to be inserted during the program's execution, a purely compiled approach may be inappropriate. When a program is interpreted, the code of the program is read line-by-line and converted to machine-level instructions while the program is executing. As a result, the program has a short startup time (can begin executing almost immediately), but the run-time performance is diminished by performing the transformation on the fly. Furthermore, since each instruction is analyzed individually, many optimizations that rely on a more global analysis of the program cannot be performed.

In some embodiments, the virtual machine104includes an interpreter108and a JIT compiler109(or a component implementing aspects of both), and executes programs using a combination of interpreted and compiled techniques. For example, the virtual machine104may initially begin by interpreting the virtual machine instructions representing the program via the interpreter108while tracking statistics related to program behavior, such as how often different sections or blocks of code are executed by the virtual machine104. Once a block of code surpasses a threshold (is “hot”), the virtual machine104invokes the JIT compiler109to perform an analysis of the block and generate optimized machine-level instructions which replaces the “hot” block of code for future executions. Since programs tend to spend most time executing a small portion of overall code, compiling just the “hot” portions of the program can provide similar performance to fully compiled code, but without the start-up penalty. Furthermore, although the optimization analysis is constrained to the “hot” block being replaced, there still exists far greater optimization potential than converting each instruction individually. There are a number of variations on the above described example, such as tiered compiling.

In order to provide clear examples, the source code files101have been illustrated as the “top level” representation of the program to be executed by the execution platform112. Although the computing architecture100depicts the source code files101as a “top level” program representation, in other embodiments the source code files101may be an intermediate representation received via a “higher level” compiler that processed code files in a different language into the language of the source code files101. Some examples in the following disclosure assume that the source code files101adhere to a class-based object-oriented programming language. However, this is not a requirement to utilizing the features described herein.

In an embodiment, compiler102receives as input the source code files101and converts the source code files101into class files103that are in a format expected by the virtual machine104. For example, in the context of the JVM, the Java Virtual Machine Specification defines a particular class file format to which the class files103are expected to adhere. In some embodiments, the class files103contain the virtual machine instructions that have been converted from the source code files101. However, in other embodiments, the class files103may contain other structures as well, such as tables identifying constant values and/or metadata related to various structures (classes, fields, methods, and so forth).

The following discussion assumes that each of the class files103represents a respective “class” defined in the source code files101(or dynamically generated by the compiler102/virtual machine104). However, the aforementioned assumption is not a strict requirement and will depend on the implementation of the virtual machine104. Thus, the techniques described herein may still be performed regardless of the exact format of the class files103. In some embodiments, the class files103are divided into one or more “libraries” or “packages”, each of which includes a collection of classes that provide related functionality. For example, a library may contain one or more class files that implement input/output (I/O) operations, mathematics tools, cryptographic techniques, graphics utilities, and so forth. Further, some classes (or fields/methods within those classes) may include access restrictions that limit their use to within a particular class/library/package or to classes with appropriate permissions.

2.1 Example Class File Structure

FIG.2illustrates an example structure for a class file200in block diagram form according to an embodiment. In order to provide clear examples, the remainder of the disclosure assumes that the class files103of the computing architecture100adhere to the structure of the example class file200described in this section. However, in a practical environment, the structure of the class file200will be dependent on the implementation of the virtual machine104. Further, one or more features discussed herein may modify the structure of the class file200to, for example, add additional structure types. Therefore, the exact structure of the class file200is not critical to the techniques described herein. For the purposes of Section 2.1, “the class” or “the present class” refers to the class represented by the class file200.

InFIG.2, the class file200includes a constant table201, field structures208, class metadata207, and method structures209. In an embodiment, the constant table201is a data structure which, among other functions, acts as a symbol table for the class. For example, the constant table201may store data related to the various identifiers used in the source code files101such as type, scope, contents, and/or location. The constant table201has entries for value structures202(representing constant values of type int, long, double, float, byte, string, and so forth), class information structures203, name and type information structures204, field reference structures205, and method reference structures206derived from the source code files101by the compiler102. In an embodiment, the constant table201is implemented as an array that maps an index i to structure j. However, the exact implementation of the constant table201is not critical.

In some embodiments, the entries of the constant table201include structures which index other constant table201entries. For example, an entry for one of the value structures202representing a string may hold a tag identifying its “type” as string and an index to one or more other value structures202of the constant table201storing char, byte or int values representing the ASCII characters of the string.

In an embodiment, field reference structures205of the constant table201hold an index into the constant table201to one of the class information structures203representing the class defining the field and an index into the constant table201to one of the name and type information structures204that provides the name and descriptor of the field. Method reference structures206of the constant table201hold an index into the constant table201to one of the class information structures203representing the class defining the method and an index into the constant table201to one of the name and type information structures204that provides the name and descriptor for the method. The class information structures203hold an index into the constant table201to one of the value structures202holding the name of the associated class.

The name and type information structures204hold an index into the constant table201to one of the value structures202storing the name of the field/method and an index into the constant table201to one of the value structures202storing the descriptor.

In an embodiment, class metadata207includes metadata for the class, such as version number(s), number of entries in the constant pool, number of fields, number of methods, access flags (whether the class is public, private, final, abstract, etc.), an index to one of the class information structures203of the constant table201that identifies the present class, an index to one of the class information structures203of the constant table201that identifies the superclass (if any), and so forth.

In an embodiment, the field structures208represent a set of structures that identifies the various fields of the class. The field structures208store, for each field of the class, accessor flags for the field (whether the field is static, public, private, final, etc.), an index into the constant table201to one of the value structures202that holds the name of the field, and an index into the constant table201to one of the value structures202that holds a descriptor of the field.

In an embodiment, the method structures209represent a set of structures that identifies the various methods of the class. The method structures209store, for each method of the class, accessor flags for the method (e.g. whether the method is static, public, private, synchronized, etc.), an index into the constant table201to one of the value structures202that holds the name of the method, an index into the constant table201to one of the value structures202that holds the descriptor of the method, and the virtual machine instructions that correspond to the body of the method as defined in the source code files101.

In an embodiment, a descriptor represents a type of a field or method. For example, the descriptor may be implemented as a string adhering to a particular syntax. While the exact syntax is not critical, a few examples are described below.

In an example where the descriptor represents a type of the field, the descriptor identifies the type of data held by the field. In an embodiment, a field can hold a basic type, an object, or an array. When a field holds a basic type, the descriptor is a string that identifies the basic type (e.g., “B”, byte, “C”=char, “D”=double, “F”=float, “I”=int, “J”=long int, etc.). When a field holds an object, the descriptor is a string that identifies the class name of the object (e.g. “L ClassName”). “L” in this case indicates a reference, thus “L ClassName” represents a reference to an object of class ClassName. When the field is an array, the descriptor identifies the type held by the array. For example, “[B” indicates an array of bytes, with “[” indicating an array and “B” indicating that the array holds the basic type of byte. However, since arrays can be nested, the descriptor for an array may also indicate the nesting. For example, “M., ClassName” indicates an array where each index holds an array that holds objects of class ClassName. In some embodiments, the ClassName is fully qualified and includes the simple name of the class, as well as the pathname of the class. For example, the ClassName may indicate where the file is stored in the package, library, or file system hosting the class file200.

In the case of a method, the descriptor identifies the parameters of the method and the return type of the method. For example, a method descriptor may follow the general form “({ParameterDescriptor}) ReturnDescriptor”, where the {ParameterDescriptor} is a list of field descriptors representing the parameters and the ReturnDescriptor is a field descriptor identifying the return type. For instance, the string “V” may be used to represent the void return type. Thus, a method defined in the source code files101as “Object m(int I, double d, Thread t) { . . . }” matches the descriptor “(I D L Thread) L Object”.

In an embodiment, the virtual machine instructions held in the method structures209include operations which reference entries of the constant table201. Using Java as an example, consider the following class:

class A{int add12and13( ) {return B.addTwo(12, 13);}}

In the above example, the Java method add12and13 is defined in class A, takes no parameters, and returns an integer. The body of method add12and13 calls static method addTwo of class B which takes the constant integer values 12 and 13 as parameters, and returns the result. Thus, in the constant table201, the compiler102includes, among other entries, a method reference structure that corresponds to the call to the method B.addTwo. In Java, a call to a method compiles down to an invoke command in the bytecode of the JVM (in this case invokestatic as addTwo is a static method of class B). The invoke command is provided an index into the constant table201corresponding to the method reference structure that identifies the class defining addTwo “B”, the name of addTwo “addTwo”, and the descriptor of addTwo “(I I)I”. For example, assuming the aforementioned method reference is stored at index4, the bytecode instruction may appear as “invokestatic #4”.

Since the constant table201refers to classes, methods, and fields symbolically with structures carrying identifying information, rather than direct references to a memory location, the entries of the constant table201are referred to as “symbolic references”. One reason that symbolic references are utilized for the class files103is because, in some embodiments, the compiler102is unaware of how and where the classes will be stored once loaded into the runtime environment113. As will be described in Section 2.3, eventually the run-time representations of the symbolic references are resolved into actual memory addresses by the virtual machine104after the referenced classes (and associated structures) have been loaded into the runtime environment and allocated concrete memory locations.

2.2 Example Virtual Machine Architecture

FIG.3illustrates an example virtual machine memory layout300in block diagram form according to an embodiment. In order to provide clear examples, the remaining discussion will assume that the virtual machine104adheres to the virtual machine memory layout300depicted inFIG.3. In addition, although components of the virtual machine memory layout300may be referred to as memory “areas”, there is no requirement that the memory areas are contiguous.

In the example illustrated byFIG.3, the virtual machine memory layout300is divided into a shared area301and a thread area307. The shared area301represents an area in memory where structures shared among the various threads executing on the virtual machine104are stored. The shared area301includes a heap302and a per-class area303. In an embodiment, the heap302represents the run-time data area from which memory for class instances and arrays is allocated. In an embodiment, the per-class area303represents the memory area where the data pertaining to the individual classes are stored. In an embodiment, the per-class area303includes, for each loaded class, a run-time constant pool304representing data from the constant table201of the class, field and method data306(for example, to hold the static fields of the class), and the method code305representing the virtual machine instructions for methods of the class.

The thread area307represents a memory area where structures specific to individual threads are stored. InFIG.3, the thread area307includes thread structures308and thread structures311, representing the per-thread structures utilized by different threads. In order to provide clear examples, the thread area307depicted inFIG.3assumes two threads are executing on the virtual machine104. However, in a practical environment, the virtual machine104may execute any arbitrary number of threads, with the number of thread structures scaled accordingly.

In an embodiment, thread structures308includes program counter309and virtual machine stack310. Similarly, thread structures311includes program counter312and virtual machine stack313. In an embodiment, program counter309and program counter312store the current address of the virtual machine instruction being executed by their respective threads.

Thus, as a thread steps through the instructions, the program counters are updated to maintain an index to the current instruction. In an embodiment, virtual machine stack310and virtual machine stack313each store frames for their respective threads that hold local variables and partial results, and is also used for method invocation and return.

In an embodiment, a frame is a data structure used to store data and partial results, return values for methods, and perform dynamic linking. A new frame is created each time a method is invoked. A frame is destroyed when the method that caused the frame to be generated completes. Thus, when a thread performs a method invocation, the virtual machine104generates a new frame and pushes that frame onto the virtual machine stack associated with the thread.

When the method invocation completes, the virtual machine104passes back the result of the method invocation to the previous frame and pops the current frame off of the stack. In an embodiment, for a given thread, one frame is active at any point. This active frame is referred to as the current frame, the method that caused generation of the current frame is referred to as the current method, and the class to which the current method belongs is referred to as the current class.

FIG.4illustrates an example frame400in block diagram form according to an embodiment. In order to provide clear examples, the remaining discussion will assume that frames of virtual machine stack310and virtual machine stack313adhere to the structure of frame400.

In an embodiment, frame400includes local variables401, operand stack402, and run-time constant pool reference table403. In an embodiment, the local variables401are represented as an array of variables that each hold a value, for example, Boolean, byte, char, short, int, float, or reference. Further, some value types, such as longs or doubles, may be represented by more than one entry in the array. The local variables401are used to pass parameters on method invocations and store partial results. For example, when generating the frame400in response to invoking a method, the parameters may be stored in predefined positions within the local variables401, such as indexes1-N corresponding to the first to Nth parameters in the invocation.

In an embodiment, the operand stack402is empty by default when the frame400is created by the virtual machine104. The virtual machine104then supplies instructions from the method code305of the current method to load constants or values from the local variables401onto the operand stack402. Other instructions take operands from the operand stack402, operate on them, and push the result back onto the operand stack402. Furthermore, the operand stack402is used to prepare parameters to be passed to methods and to receive method results. For example, the parameters of the method being invoked could be pushed onto the operand stack402prior to issuing the invocation to the method. The virtual machine104then generates a new frame for the method invocation where the operands on the operand stack402of the previous frame are popped and loaded into the local variables401of the new frame. When the invoked method terminates, the new frame is popped from the virtual machine stack and the return value is pushed onto the operand stack402of the previous frame.

In an embodiment, the run-time constant pool reference table403contains a reference to the run-time constant pool304of the current class. The run-time constant pool reference table403is used to support resolution. Resolution is the process whereby symbolic references in the constant pool304are translated into concrete memory addresses, loading classes as necessary to resolve as-yet-undefined symbols and translating variable accesses into appropriate offsets into storage structures associated with the run-time location of these variables.

2.3 Loading, Linking, and Initializing

In an embodiment, the virtual machine104dynamically loads, links, and initializes classes. Loading is the process of finding a class with a particular name and creating a representation from the associated class file200of that class within the memory of the runtime environment113. For example, creating the run-time constant pool304, method code305, and field and method data306for the class within the per-class area303of the virtual machine memory layout300. Linking is the process of taking the in-memory representation of the class and combining it with the run-time state of the virtual machine104so that the methods of the class can be executed. Initialization is the process of executing the class constructors to set the starting state of the field and method data306of the class and/or create class instances on the heap302for the initialized class.

The following are examples of loading, linking, and initializing techniques that may be implemented by the virtual machine104. However, in many embodiments the steps may be interleaved, such that an initial class is loaded, then during linking a second class is loaded to resolve a symbolic reference found in the first class, which in turn causes a third class to be loaded, and so forth. Thus, progress through the stages of loading, linking, and initializing can differ from class to class. Further, some embodiments may delay (perform “lazily”) one or more functions of the loading, linking, and initializing process until the class is actually required. For example, resolution of a method reference may be delayed until a virtual machine instruction invoking the method is executed. Thus, the exact timing of when the steps are performed for each class can vary greatly between implementations.

To begin the loading process, the virtual machine104starts up by invoking the class loader107which loads an initial class. The technique by which the initial class is specified will vary from embodiment to embodiment. For example, one technique may have the virtual machine104accept a command line argument on startup that specifies the initial class.

To load a class, the class loader107parses the class file200corresponding to the class and determines whether the class file200is well-formed (meets the syntactic expectations of the virtual machine104). If not, the class loader107generates an error. For example, in Java the error might be generated in the form of an exception which is thrown to an exception handler for processing. Otherwise, the class loader107generates the in-memory representation of the class by allocating the run-time constant pool304, method code305, and field and method data306for the class within the per-class area303.

In some embodiments, when the class loader107loads a class, the class loader107also recursively loads the super-classes of the loaded class. For example, the virtual machine104may ensure that the super-classes of a particular class are loaded, linked, and/or initialized before proceeding with the loading, linking and initializing process for the particular class.

During linking, the virtual machine104verifies the class, prepares the class, and performs resolution of the symbolic references defined in the run-time constant pool304of the class.

To verify the class, the virtual machine104checks whether the in-memory representation of the class is structurally correct. For example, the virtual machine104may check that each class except the generic class Object has a superclass, check that final classes have no sub-classes and final methods are not overridden, check whether constant pool entries are consistent with one another, check whether the current class has correct access permissions for classes/fields/structures referenced in the constant pool304, check that the virtual machine104code of methods will not cause unexpected behavior (e.g. making sure a jump instruction does not send the virtual machine104beyond the end of the method), and so forth. The exact checks performed during verification are dependent on the implementation of the virtual machine104. In some cases, verification may cause additional classes to be loaded, but does not necessarily require those classes to also be linked before proceeding. For example, assume Class A contains a reference to a static field of Class B. During verification, the virtual machine104may check Class B to ensure that the referenced static field actually exists, which might cause loading of Class B, but not necessarily the linking or initializing of Class B. However, in some embodiments, certain verification checks can be delayed until a later phase, such as being checked during resolution of the symbolic references. For example, some embodiments may delay checking the access permissions for symbolic references until those references are being resolved.

To prepare a class, the virtual machine104initializes static fields located within the field and method data306for the class to default values. In some cases, setting the static fields to default values may not be the same as running a constructor for the class. For example, the verification process may zero out or set the static fields to values that the constructor would expect those fields to have during initialization.

During resolution, the virtual machine104dynamically determines concrete memory address from the symbolic references included in the run-time constant pool304of the class. To resolve the symbolic references, the virtual machine104utilizes the class loader107to load the class identified in the symbolic reference (if not already loaded). Once loaded, the virtual machine104has knowledge of the memory location within the per-class area303of the referenced class and its fields/methods. The virtual machine104then replaces the symbolic references with a reference to the concrete memory location of the referenced class, field, or method. In an embodiment, the virtual machine104caches resolutions to be reused in case the same class/name/descriptor is encountered when the virtual machine104processes another class. For example, in some cases, class A and class B may invoke the same method of class C. Thus, when resolution is performed for class A, that result can be cached and reused during resolution of the same symbolic reference in class B to reduce overhead.

In some embodiments, the step of resolving the symbolic references during linking is optional. For example, an embodiment may perform the symbolic resolution in a “lazy” fashion, delaying the step of resolution until a virtual machine instruction that requires the referenced class/method/field is executed.

During initialization, the virtual machine104executes the constructor of the class to set the starting state of that class. For example, initialization may initialize the field and method data306for the class and generate/initialize any class instances on the heap302created by the constructor. For example, the class file200for a class may specify that a particular method is a constructor that is used for setting up the starting state. Thus, during initialization, the virtual machine104executes the instructions of that constructor.

In some embodiments, the virtual machine104performs resolution on field and method references by initially checking whether the field/method is defined in the referenced class. Otherwise, the virtual machine104recursively searches through the super-classes of the referenced class for the referenced field/method until the field/method is located, or the top-level superclass is reached, in which case an error is generated.

3. TRANSITIONING BETWEEN THREAD-CONFINED MEMORY SEGMENT VIEWS AND SHARED MEMORY SEGMENT VIEWS

A memory segment includes a set of bytes, each byte corresponding to a respective memory address. The memory segment may be referenced and accessed via a memory segment view. A memory segment view creates a view over a contiguous memory segment. The memory segment view includes particular spatial and temporal bounds. The memory segment view may specify spatial bounds of a memory segment (e.g. as the upper and lower memory address views which act as the segment bounds). The memory segment view may also specify temporal bounds of the memory segment (e.g., that the memory segment is created, used and then closed (e.g., de-allocated) when no longer in use). A memory segment view may further include a reference to a particular physical memory address of a memory segment. A memory address view includes a particular offset within a memory segment view. A memory address view may also specify a link to the memory segment view it refers to.

There are many ways in which a memory segment view can be instantiated and used to access the memory referenced by the view. There are many ways to allocate memory segments from a variety of sources. Once a memory segment view associated with the memory segment has been instantiated, a thread can access the memory segment view its associated memory segment view using various techniques. A memory segment may be de-allocated explicitly via an instruction from a thread to close a memory segment view, provided that there are no other memory segment views that reference the memory segment.

3.1 Types of Memory Segment Views

FIG.5shows a plurality of threads502, and memory segment views504,506, and508. Each of the memory segment views is accessible in a different way.

One form of memory access mode is thread confinement. In this mode, a memory segment view is associated with an owner thread that is established during instantiation of the memory segment view. The owner thread may be identified via a reference stored in the memory segment view itself. Alternatively, an owner thread may be identified in a mapping between memory segment views and owners that is external to the memory segment view. In some embodiments, threads can be statically confined, such that the owning thread is established once at instantiation and cannot be altered. That is, if thread A creates memory segment view S, we say that A owns S. This implies that no thread other than A can access and/or close the memory segment view. Furthermore, termination of an owner thread may be used to proactively deallocate the memory referenced by the confined memory segment view that was owned by the now-terminated thread.

This access mode is useful for a client which needs to perform some off-heap allocation in order to pass a struct to a native library. This access mode is useful for clients that need to serialize some complex Java object graph into native memory.

In other aspects, a memory segment view may be confined to access by a single thread (e.g., the memory segment has a single owner), but the owner may be changed over the life-cycle of the memory segment view. This leads to an access mode where multiple threads can access the same memory segment view, provided they do so one at a time.

Any thread that wants to access a memory segment view must acquire it first. If this operation is successful, the memory segment view goes into an acquired state, and cannot be claimed by a different thread. That is, the memory segment view will act as if it was statically confined to the thread which acquired it. Once a thread has finished working with the memory segment view, the thread can release the memory segment view, thus making the memory segment view available to other threads. A memory segment view may be closed only if the view is not owned by any thread.

This access mode is more flexible than its static counterpart, and may be useful when modeling producer/consumer use cases; that is, one thread acquires a memory segment view and writes data to the memory referenced by the memory segment view, then releases the memory segment view so that another thread can acquire the same memory segment view and read the data before releasing it again.

As an example,FIG.5shows memory segment view504, which is a confined memory segment view that is owned by thread502a. Thus, only thread502acan access or close memory segment504.

In other cases, it may be beneficial to share the same memory segment view across multiple threads in a way that makes it impossible for any of the threads accessing the shared memory segment view to do so after the memory segment view has already been closed by another thread.

A shared memory segment view starts off in a state where it is not owned by any thread. The shared memory segment view includes a field corresponding to an owner thread, the field may include a null value. Any thread that wants to access the memory referenced by the memory segment view needs to acquire it first. When a thread acquires the shared memory segment view, a new confined memory segment view that references the memory referenced in the shared memory segment view is instantiated, and the owner of the new confined memory segment view is set to the thread that acquired the shared memory segment view. Additionally, an acquisition counter associated with the shared memory segment view is incremented. When the thread releases the confined memory segment view, the acquisition counter associated with the shared memory segment view is decremented. Multiple threads may acquire the same shared memory segment view simultaneously. This means that, at any given point in time, a shared memory segment view can have zero, one, or many owning threads. As discussed above, a shared memory segment can only be closed if no thread has acquired it (e.g., the acquisition counter is zero). This is what makes accessing a shared memory segment safe.

When a memory segment view has multiple owners, it is possible for the threads owning it to perform racy read/write operations. That is, if a first thread attempts to perform a read access of the memory referenced by the memory segment view and a second thread simultaneously attempts to perform a write access operation on the same memory, the information read by the first thread may not reflect the information written to the segment by the second thread. Thus, while this model helps to ensure that no thread can access an already closed memory segment view, it does not guarantee correctness of access across multiple threads. That is, threads accessing the memory in a concurrent fashion must implement a synchronization strategy to help ensure correctness. This can be done using atomic operations (e.g. compare and swap), explicit read/write locks, and/or via any other known synchronization techniques.

This access mode is useful in a one-publisher/many-subscribers use case, where one thread writes to a memory segment, then makes the memory segment available for multiple threads to read, possibly in a concurrent fashion. Alternatively, this access mode is useful for an off-heap cache whose contents must be made available to more than just one thread at a time.

As an example,FIG.5shows a shared memory segment view506that has been acquired by threads502b,502c, and502d. Thus, the threads502b,502c, and502dcan access the memory segment view506. However, threads502aand502eare not able to access the memory segment view. Additionally, none of these threads are able to close the memory segment view506while any thread has acquired the memory segment. Additionally,FIG.5shows a shared memory segment view508that has been acquired by all threads502. Thus, all threads502are able to access the memory segment view508.

3.2 Methods for Transitioning Between Thread-Confined Memory Segment Views and Shared Memory Segment Views

FIG.6shows a method for transitioning between a confined memory segment view and a shared memory segment view. One or more operations illustrated inFIG.6may be modified, rearranged, or omitted all together. Additional operations (not illustrated) may be executed. Accordingly, the particular sequence of operations illustrated inFIG.6should not be construed as limiting the scope of one or more embodiments.

In an embodiment, a system instantiates a first confined memory segment view (Operation602). Based on the memory segment view, memory may be allocated. The instantiation of the first confined memory segment view may include a reference to a particular thread requesting the instantiation. A reference to the particular thread can be stored in an owner field corresponding to the first memory segment view. The owner field may be stored as a part of the first memory segment view itself. Alternatively or in addition, the owner field can be stored in a separately-maintained table that includes a mapping between memory segment views and owners. Moreover, the first memory segment view may also store information regarding spatial and/or temporal bounds of the memory, and/or a reference to a segment of memory.

In an embodiment, the system receives a request to change access permissions for the first memory segment view (Operation604). In some embodiments, the request to change the access permissions may include a request to change the owner of the first memory segment view. The request to change access permissions may include a request to transition the first confined memory segment view from a confined memory segment view accessible to a single owner thread to a shared memory segment view accessible to any thread. Alternatively, the request may be to transition the first confined memory segment view from one single-owner thread to another single-owner thread. Alternatively, the request may specify a particular group of threads that may access the first memory segment view.

In an embodiment, the request to change access includes a reference to the thread making the request to change access to the first memory segment view. The system may validate the request. Validating the request may include verifying that the thread making the request to change access permissions matches the particular thread stored in the owner field corresponding to the first memory segment view. That is, only the owner of the first memory segment view may be permitted to change the access permissions of the memory segment view.

In response to receiving a validated request to change access permissions for the first memory segment view, the system may instantiate a second memory segment view (Operation606). If the request to change access permissions included a reference to the one or more threads that should become the new owner (e.g., in response to a request to change ownership), instantiating the second memory segment view may include storing the reference in the owner field associated with the second memory segment view. Otherwise (e.g., in response to a request to transition a thread from a confined thread to a shared thread), allocating the second memory segment view may include storing null in the owner field associated with the second memory segment view.

Additionally, the system may cause any pending input/output (I/O) operations that access the first memory segment to complete (Operation608). That is, the system may commit any pending write operations that reference the first memory segment, and/or may complete any pending read operations that reference the first memory segment.

Following completion of any pending I/O operations that access the first memory segment, the system may copy metadata, including the reference to the first memory segment from the first memory segment view to the second memory segment view (Operation610). Copying the metadata may include copying one or more properties of the first memory segment view to the second memory segment view. In embodiments, copying metadata includes copying metadata without copying any data from the first memory segment.

Additionally, the system terminates the first memory segment view (Operation612). Termination includes marking the first memory segment view as inactive. The system may also return, to one or more of the owner of the second memory segment and the thread that requested to change access permissions of the first memory segment, a reference to the second memory segment.

In response to determining that no memory segment view is currently associated with the memory segment, the system may de-allocate the memory segment. That is, the de-allocation of the memory segment may be performed as part of a garbage collection process, rather than being explicitly performed by any of the memory segment views. In some embodiments, the system may rely on an acquisition counter to determine a number of existing memory segment views associated with a memory segment, such that the memory segment may be de-allocated only when the acquisition counter is equal to zero.

In some embodiments, the second memory segment view may be shared with (e.g., owned by) a particular thread pool. The memory segment associated with the memory segment view may be de-allocated directly, but may not be de-allocated until the thread pool that owns the memory segment view is shut down.

3.3 Example Memory Segment View Operations

FIGS.7through9show three example operations for use of memory segment views.

FIG.7shows an example method for using a static confined memory segment view to access a memory segment. One or more operations illustrated inFIG.7may be modified, rearranged, or omitted all together. Additional operations (not illustrated) may be executed. Accordingly, the particular sequence of operations illustrated inFIG.7should not be construed as limiting the scope of one or more embodiments.

A thread A may create (instantiate) a memory segment view S (Operation702). The memory segment view S may be created as a confined memory segment view. Additionally, a memory segment may be allocated associated with the memory segment view S. Creation of the memory segment view S may include storing a reference to thread A in the owner field associated with memory segment view S, and storing a reference to the physical memory segment associated with the memory segment view S.

Thread A may operate on the memory segment via the memory segment view S (Operation704). The operations may comprise, for example, accessing data stored in the memory segment, writing data to the memory segment, and/or operating on data stored by the memory segment.

Once Thread A has completed all operations on the memory segment (e.g., via the memory segment view S), Thread A may close the memory segment view S (Operation706). In response to receiving the command to close the memory segment view S, the system may determine that no other memory segment view references the memory segment. Accordingly, the system may de-allocate the memory associated with the memory segment view S as part of closing the memory segment view S.

FIG.8shows an example method for transitioning a confined memory segment view from one owner to a different owner. One or more operations illustrated inFIG.8may be modified, rearranged, or omitted all together. Additional operations (not illustrated) may be executed. Accordingly, the particular sequence of operations illustrated inFIG.8should not be construed as limiting the scope of one or more embodiments.

A thread A may create (instantiate) a memory segment view S1 (Operation802). The memory segment view S1 may be created as a confined memory segment view. Additionally, a memory segment may be allocated and associated with the memory segment view S1. Creation of the memory segment view S1 may include storing a reference to thread A in the owner field associated with memory segment view S1, and storing a reference to the physical memory segment associated with the memory segment view S1.

Thread A may operate on the physical memory segment via the memory segment view S1 (Operation804). The operations may comprise, for example, accessing data stored in the memory segment, writing data to the memory segment, and/or operating on data stored by the memory segment.

Once Thread A has completed all operations on the memory segment (e.g., via the memory segment view S), Thread A may request to change ownership of the memory segment S1 (Operation806). The request to change ownership of the memory segment S1 may include a reference to Thread B.

In response to receiving the request to change ownership, the system can create (instantiate) a new memory segment view S2 (Operation808). Creation of the memory segment view S2 may include storing the reference to thread B received in the request in the owner field associated with memory segment view S2, and copying the reference to the physical memory segment from the memory segment view S1 to the memory segment view S2. Additionally, the system can mark the memory segment view S1 as inactive, such that any attempt to access the memory segment via the memory segment view S1 will fail.

Thread B may operate on the physical memory segment via the memory segment view S2 (Operation810). The operations may comprise, for example, accessing data stored in the memory segment, writing data to the memory segment, and/or operating on data stored by the memory segment.

Once Thread B has completed all operations on the memory segment (e.g., via the memory segment view S2), Thread B may close the memory segment view S2 (Operation812). In response to receiving the command to close the memory segment view S2, the system may determine that no other active memory segment view references the memory segment. Accordingly, the system may de-allocate the memory associated with the memory segment view S2 as part of closing the memory segment view S2.

FIG.9shows an example method for transitioning a memory segment view from a confined memory segment view to a shared memory segment view. One or more operations illustrated inFIG.9may be modified, rearranged, or omitted all together. Additional operations (not illustrated) may be executed. Accordingly, the particular sequence of operations illustrated inFIG.9should not be construed as limiting the scope of one or more embodiments.

A thread A may create (instantiate) a memory segment view S1 (Operation902). The memory segment view S1 may be created as a confined memory segment view. Additionally, a memory segment may be allocated and associated with the memory segment view S1. Creation of the memory segment view S1 may include storing a reference to thread A in the owner field associated with memory segment view S1, and storing a reference to the physical memory segment associated with the memory segment view S1.

Thread A may operate on the physical memory segment via the memory segment view S1 (Operation904). The operations may comprise, for example, accessing data stored in the memory segment, writing data to the memory segment, and/or operating on data stored by the memory segment.

Once Thread A has completed all operations on the memory segment (e.g., via the memory segment view S1), Thread A may request to convert the confined memory segment S1 to a shared memory segment view (Operation906).

In response to receiving the request to convert the memory segment, the system can create (instantiate) a new shared memory segment view S2 (Operation908). Creation of the shared memory segment view S2 may include storing null in the owner field associated with the shared memory segment view S2, and copying the reference to the physical memory segment from the memory segment view S1 to the shared memory segment view S2. The system can also create an acquisition counter associated with the shared memory segment view S2. The shared memory segment view S2 has no owner, and thus does not allow any thread to access the memory segment directly. Rather, a thread may acquire the memory segment view S2 to access the memory segment referenced by the shared memory segment view. Additionally, the system can mark the memory segment view S1 as inactive, such that any attempt to access the memory segment via the memory segment view S1 will fail.

Thread B may send a request to acquire the shared memory segment view S2 (Operation910). Acquiring the shared memory segment view allows Thread B to access the memory segment associated with the shared memory segment view S2.

In response to receiving the request to acquire the shared memory segment, the system can create (instantiate) a new memory segment view S3 (Operation912). The memory segment view S3 can be created as a confined memory segment. Creation of the memory segment view S3 may include storing a reference to thread B in the owner field associated with memory segment view S3, and copying the reference to the physical memory segment from the memory segment view S2 to the memory segment view S3. Additionally, the system can increment the acquisition counter associated with shared memory segment view S2.

Thread B may operate on the physical memory segment via the memory segment view S3 (Operation914). The operations may comprise, for example, accessing data stored in the memory segment, writing data to the memory segment, and/or operating on data stored by the memory segment.

Once Thread B has completed all operations on the memory segment (e.g., via the memory segment view S3), Thread B may close the memory segment view S3 (Operation916). In response to receiving the command to close the memory segment view S3, the system may decrement the acquisition counter associated with shared memory segment view S2. Because the shared memory segment view is active, the system does not de-allocate the memory associated with the memory segment view S3 (and memory segment view S2) as part of closing the memory segment view S3. Operations910-914may be repeated many times, in serial or concurrently, for many different threads.

Thread A may close the shared memory segment view S2 (Operation918). In response to receiving the command to close the memory segment view S2, the system may determine that no other active memory segment view references the memory segment (e.g., that the acquisition counter is 0). Accordingly, the system may de-allocate the memory associated with the memory segment view S2 as part of closing the memory segment view S2.

4. MISCELLANEOUS; EXTENSIONS

Embodiments are directed to a system with one or more devices that include a hardware processor and that are configured to perform any of the operations described herein and/or recited in any of the claims below.

In an embodiment, a non-transitory computer readable storage medium comprises instructions which, when executed by one or more hardware processors, causes performance of any of the operations described herein and/or recited in any of the claims.

Any combination of the features and functionalities described herein may be used in accordance with one or more embodiments. In the foregoing specification, embodiments have been described with reference to numerous specific details that may vary from implementation to implementation. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense. The sole and exclusive indicator of the scope of the invention, and what is intended by the applicants to be the scope of the invention, is the literal and equivalent scope of the set of claims that issue from this application, in the specific form in which such claims issue, including any subsequent correction.

5. HARDWARE OVERVIEW

According to one embodiment, the techniques described herein are implemented by one or more special-purpose computing devices. The special-purpose computing devices may be hard-wired to perform the techniques, or may include digital electronic devices such as one or more application-specific integrated circuits (ASICs) or field programmable gate arrays (FPGAs) that are persistently programmed to perform the techniques, or may include one or more general purpose hardware processors programmed to perform the techniques pursuant to program instructions in firmware, memory, other storage, or a combination. Such special-purpose computing devices may also combine custom hard-wired logic, ASICs, or FPGAs with custom programming to accomplish the techniques. The special-purpose computing devices may be desktop computer systems, portable computer systems, handheld devices, networking devices or any other device that incorporates hard-wired and/or program logic to implement the techniques.

For example,FIG.10is a block diagram that illustrates a computer system1000upon which an embodiment of the invention may be implemented. Computer system1000includes a bus1002or other communication mechanism for communicating information, and a hardware processor1004coupled with bus1002for processing information. Hardware processor1004may be, for example, a general purpose microprocessor.

Computer system1000also includes a main memory1006, such as a random access memory (RAM) or other dynamic storage device, coupled to bus1002for storing information and instructions to be executed by processor1004. Main memory1006also may be used for storing temporary variables or other intermediate information during execution of instructions to be executed by processor1004. Such instructions, when stored in non-transitory storage media accessible to processor1004, render computer system1000into a special-purpose machine that is customized to perform the operations specified in the instructions.

Computer system1000further includes a read only memory (ROM)1008or other static storage device coupled to bus1002for storing static information and instructions for processor1004. A storage device1010, such as a magnetic disk or optical disk, is provided and coupled to bus1002for storing information and instructions.

Computer system1000may be coupled via bus1002to a display1012, such as a cathode ray tube (CRT), for displaying information to a computer user. An input device1014, including alphanumeric and other keys, is coupled to bus1002for communicating information and command selections to processor1004. Another type of user input device is cursor control1016, such as a mouse, a trackball, or cursor direction keys for communicating direction information and command selections to processor1004and for controlling cursor movement on display1012. This input device typically has two degrees of freedom in two axes, a first axis (e.g., x) and a second axis (e.g., y), that allows the device to specify positions in a plane.

Computer system1000may implement the techniques described herein using customized hard-wired logic, one or more ASICs or FPGAs, firmware and/or program logic which in combination with the computer system causes or programs computer system1000to be a special-purpose machine. According to one embodiment, the techniques herein are performed by computer system1000in response to processor1004executing one or more sequences of one or more instructions contained in main memory1006. Such instructions may be read into main memory1006from another storage medium, such as storage device1010. Execution of the sequences of instructions contained in main memory1006causes processor1004to perform the process steps described herein. In alternative embodiments, hard-wired circuitry may be used in place of or in combination with software instructions.

The term “storage media” as used herein refers to any non-transitory media that store data and/or instructions that cause a machine to operate in a specific fashion. Such storage media may comprise non-volatile media and/or volatile media. Non-volatile media includes, for example, optical or magnetic disks, such as storage device1010. Volatile media includes dynamic memory, such as main memory1006. Common forms of storage media include, for example, a floppy disk, a flexible disk, hard disk, solid state drive, magnetic tape, or any other magnetic data storage medium, a CD-ROM, any other optical data storage medium, any physical medium with patterns of holes, a RAM, a PROM, and EPROM, a FLASH-EPROM, NVRAM, any other memory chip or cartridge.

Storage media is distinct from but may be used in conjunction with transmission media. Transmission media participates in transferring information between storage media. For example, transmission media includes coaxial cables, copper wire and fiber optics, including the wires that comprise bus1002. Transmission media can also take the form of acoustic or light waves, such as those generated during radio-wave and infra-red data communications.

Various forms of media may be involved in carrying one or more sequences of one or more instructions to processor1004for execution. For example, the instructions may initially be carried on a magnetic disk or solid state drive of a remote computer. The remote computer can load the instructions into its dynamic memory and send the instructions over a telephone line using a modem. A modem local to computer system1000can receive the data on the telephone line and use an infra-red transmitter to convert the data to an infra-red signal. An infra-red detector can receive the data carried in the infra-red signal and appropriate circuitry can place the data on bus1002. Bus1002carries the data to main memory1006, from which processor1004retrieves and executes the instructions. The instructions received by main memory1006may optionally be stored on storage device1010either before or after execution by processor1004.

Computer system1000also includes a communication interface1018coupled to bus1002. Communication interface1018provides a two-way data communication coupling to a network link1020that is connected to a local network1022. For example, communication interface1018may be an integrated services digital network (ISDN) card, cable modem, satellite modem, or a modem to provide a data communication connection to a corresponding type of telephone line. As another example, communication interface1018may be a local area network (LAN) card to provide a data communication connection to a compatible LAN. Wireless links may also be implemented. In any such implementation, communication interface1018sends and receives electrical, electromagnetic or optical signals that carry digital data streams representing various types of information.

Network link1020typically provides data communication through one or more networks to other data devices. For example, network link1020may provide a connection through local network1022to a host computer1024or to data equipment operated by an Internet Service Provider (ISP)1026. ISP1026in turn provides data communication services through the world wide packet data communication network now commonly referred to as the “Internet”1028. Local network1022and Internet1028both use electrical, electromagnetic or optical signals that carry digital data streams. The signals through the various networks and the signals on network link1020and through communication interface1018, which carry the digital data to and from computer system1000, are example forms of transmission media.

Computer system1000can send messages and receive data, including program code, through the network(s), network link1020and communication interface1018. In the Internet example, a server1030might transmit a requested code for an application program through Internet1028, ISP1026, local network1022and communication interface1018.

The received code may be executed by processor1004as it is received, and/or stored in storage device1010, or other non-volatile storage for later execution.

In the foregoing specification, embodiments of the invention have been described with reference to numerous specific details that may vary from implementation to implementation. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense. The sole and exclusive indicator of the scope of the invention, and what is intended by the applicants to be the scope of the invention, is the literal and equivalent scope of the set of claims that issue from this application, in the specific form in which such claims issue, including any subsequent correction.