Patent ID: 12244225

DETAILED DESCRIPTION

Circuits, devices and related techniques disclosed herein relate generally to converters. More specifically, circuits, devices and related techniques disclosed herein relate to systems and methods for reducing effects of leakage inductance energy in flyback DC-DC converters. In some embodiments, a flyback DC-DC converter can include a clamping switch and a damping resistor that are arranged to reduce the effects of leakage inductance energy. By reducing the effects of leakage inductance energy, power losses in the flyback DC-DC converter can be reduced resulting in an overall improvement in efficiency of the converter. Further, the reduction of the effects of leakage inductance energy in the converter can substantially reduce the amplitude of voltage spikes on internal nodes, and resulting in a reduction in dV/dt on the internal nodes of the converter, therefor reducing voltage stresses on the internal components of the converter. Thus, the maximum voltage rating of the internal components of the converter can be reduced, resulting in savings in system costs. Moreover, a reduction in dV/dt in the converter can result in an improved electromagnetic interference (EMI) performance of the converter.

In various embodiments, an adaptive control technique of an on-time of the clamping switch can be employed to control a starting time and a duration of the turn-on of the clamping switch, thereby reducing oscillations and voltage spikes. In some embodiments, in a flyback DC-DC converter, the clamping switch is arranged to operate such that a sum of a first time period and second time period equals to a sum of third time period and fourth time period, where the first time period is a delay time period from a time that the main switch is turned off to the time that the clamping switch is turned on, the second time period is a time period from when the clamping switch enters its on-state to the time that the clamping switch is turned off, the third time period is a resonance time period of a resonator formed by a leakage inductance of the transformer and a capacitance of the first capacitor, and the fourth time period is a time period for discharging of the leakage inductance of the transformer into the first capacitor. Embodiments of the disclosure further enable improvement of efficiency during light-load operation. Various inventive embodiments are described herein, including methods, processes, systems, devices, and the like.

Several illustrative embodiments will now be described with respect to the accompanying drawings, which form a part hereof. The ensuing description provides embodiment(s) only and is not intended to limit the scope, applicability, or configuration of the disclosure. Rather, the ensuing description of the embodiment(s) will provide those skilled in the art with an enabling description for implementing one or more embodiments. It is understood that various changes may be made in the function and arrangement of elements without departing from the spirit and scope of this disclosure. In the following description, for the purposes of explanation, specific details are set forth in order to provide a thorough understanding of certain inventive embodiments. However, it will be apparent that various embodiments may be practiced without these specific details. The figures and description are not intended to be restrictive. The word “example” or “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any embodiment or design described herein as “exemplary” or “example” is not necessarily to be construed as preferred or advantageous over other embodiments or designs.

FIG.1illustrates a flyback DC-DC converter circuit100with a clamping switch and a damping resistor according to an embodiment of the disclosure. As shown inFIG.1, the flyback DC-DC converter circuit100can include an input circuit102and an output circuit104. The flyback DC-DC converter circuit100can include a transformer134having a primary side winding128, a magnetic core129and a secondary side winding130. The transformer134can be arranged to provide isolation between the input circuit102and the output circuit104.

The flyback DC-DC converter circuit100can include a main switch122(Q1) with a drain140, a source142and a gate144. In some embodiments, the main switch122may include a body diode126and an output capacitor124that can be connected between a source terminal and a drain terminal of the main switch122. The main switch122can be controlled by a pulse width modulated (PWM) controller circuit106. The PWM controller circuit106can cause the main switch122to turn on, thereby closing a loop in the primary side. In this way, energy is built up in the primary side winding128. When the main switch122is turned off, the energy built up in the primary side winding128can be transferred to the secondary side, resulting in the output circuit104supplying energy to an output load.

A non-ideality of a flyback transformer can be its leakage inductance. An ideal transformer may have perfect coupling between the primary and secondary windings with no losses. However, in practice, the coupling can be less than 100 percent leaving what is in effect an inductance in series with the primary coil. The leakage inductance of the transformer can be represented by an inductor114having a leakage inductance Lk. Therefore, when the main switch122is turned off, there can be a relatively high voltage spike generated across the inductor114. A combination of the inductor114and any capacitances in the circuit can cause ringing to appear at the drain140. The ringing frequency created may also degrade the EMI spectrum of the flyback DC-DC converter. Embodiments of the present disclosure can reduce the effects of the leakage inductance, thereby reducing EMI radiation.

In the flyback DC-DC converter circuit100, inductor114represents a leakage inductance (Lk) of the flyback DC-DC converter and inductor132represents a magnetizing inductance (Lm) of the flyback DC-DC converter. The flyback DC-DC converter circuit100can include a clamping switch120and a damping resistor112. In some embodiments, switch120may include a body diode118that is connected between a source terminal and a drain terminal of the switch120. Output capacitor116is an output capacitance of the switch120and may be connected between the source terminal and the drain terminal of the switch120. A resistor110and a storage capacitor108having a capacitance of Cscan be coupled to the damping resistor112at node150. In some embodiments, storage capacitor108can include a plurality of capacitors connected in parallel, while in alternate or additional embodiments, the storage capacitor108can include a plurality of capacitors connected in series. The PWM controller circuit106can be coupled to the gate146of the clamping switch120. A current iLkof the leakage inductance Lkcan flow through the clamping switch120and/or the body diode118. In various embodiments, the clamping switch120can be, for example, a silicon MOSFET or a compound semiconductor switch, such as a GaN based HEMT.

When the main switch122is turned off, the leakage inductance energy of Lkcan be stored in the storage capacitor108through the switch120and/or diode118. During the time period for charging of the storage capacitor108, the leakage inductance current iLk canmay flow clock-wise through the body diode118and the damping resistor112to the storage capacitor108. Resistor110can provide damping of some of the stored energy in the storage capacitor108. The charging of the storage capacitor108allows for the absorption of the leakage inductance energy into the storage capacitor108. The remainder of energy stored in the storage capacitor108can subsequently be released by a counter-clock-wise flow of the current iLkthrough the damping resistor112and the clamping switch120to the primary side winding128. The released energy into the primary side winding128can then be transmitted to the secondary side winding130through resonance of the storage capacitor108and the leakage inductance Lk. This can cause oscillations and voltage spikes at various nodes of the circuit100. Embodiments of the present disclosure can reduce these effects by precisely controlling a turn-on time of the clamping switch120. The clamping switch120can be turned on after a delay time Tdelayfollowing the turn-off of the main switch122. The delay time Tdelaycan be controlled by the PWM controller circuit106.

This is illustrated inFIGS.2A,2B and2Ctiming diagrams. As shown inFIG.2A, during a first time period206the gate144is in a high state and the main switch122is on. At the end of the first time period206the main switch122is turned off where a voltage at the gate144(Vg1) goes to a low state, the PWM controller circuit106may provide a delay time Tdelay202. A gate voltage (Vga) at the gate146can go high thereby turning on the clamping switch120. The delay time Tdelaycan be controlled so as not to exceed a time period TS204, where TSis the time that it takes for the current iLkto charge the storage capacitor108. The relationship between Tdelayand TScan be expressed as Tdelay≤Ts.FIG.2Bshows drain to source voltage (Vds) of the main switch122. As can be seen, during time period214, embodiments of the present disclosure can eliminate voltage spikes on Vdsand eliminate ringing and/or oscillations of Vds.FIG.2Cshows the leakage inductance current iLkas a function of time. As can be seen, the leakage inductance current iLkrises during a first time period206(clock-wise flow) and reverses direction (counter-clock-wise flow) during a second time period208.

After the main switch122is turned off, the clamping switch120may not be turned on immediately, but it can be turned on after a delay Tdelay. The on-time of the clamping switch120is denoted by time duration (Tc)210. In order to reduce oscillations due to release of leakage inductance current, the delay Tdelaymay be set to be less than or equal to the time period Ts(the time that it takes for the current iLkto charge the storage capacitor108), i.e., Tdelay≤Ts. During the second time period208, the clamping switch120may be on and the stored energy in the storage capacitor108may be transmitted to the secondary side winding130through the resonance formed by the capacitance of storage capacitor108and the leakage inductance of the transformer Lk.

FIG.2Dshows leakage inductance current iLkas a function of time for various turn-on delay times of the clamping switch120. Waveform224shows iLkwhere Tdelay>Ts, as compared to waveform226where Tdelay≤Ts. As can be seen, by setting Tdelay≤Ts, embodiments of the disclosure can eliminate high frequency oscillations, such as the oscillation shown at228. By turning on the clamping switch120during charging of the storage capacitor108, i.e., Tdelay≤Ts, high frequency oscillations can be eliminated, thereby improving the electro-magnetic compatibility (EMC) performance of the converter. The high frequency oscillation at228may be caused by the resonance formed by the output capacitor116of the clamping switch120and the leakage inductance Lk. This resonance can be eliminated by timely turning-off the clamping switch120.

In some embodiments, in order to reduce ringing and/or oscillations in the currents during the absorption of the leakage inductance energy into storage capacitor108, and during the release of the energy stored in the storage capacitor108, the sum of the delay Tdelayand the on-time duration Tc210can be set to be equal or slightly greater than the sum of the time Tsfor absorbing the leakage inductance energy and the resonance period TR, where the resonance period TRis the period of resonance between the leakage inductance Lkand the capacitance Cs. Thus,
Tdelay+Tc≥2π√{square root over (LkCs)}+TsEquation (1)
where Lkis the leakage inductance of the transformer134, Csis a value of the capacitance of the storage capacitor108, and Tsis the time for absorbing the leakage inductance energy into the storage capacitor108. In some embodiments, a size of the clamping switch120can be smaller than the size of main switch122, i.e. the on-resistance (Rdson) of the clamping switch120can be higher than the Rdson of the main switch122. For example, the Rdson of the clamping switch can be 3 to 5 ohm for a 650 V rated device, while the Rdson of the main switch can 0.150 ohm for a 650 V rated device. However, other suitable values for on-resistance and voltage ratings can be used. In various embodiments, the clamping switch may be a silicon MOSFET or a gallium nitride (GaN) based switch. In some embodiments, the GaN based clamping switch can be integrated into the same die as the main switch. In various embodiments, the GaN based clamping switch can allow for improved reverse recovery characteristics compared to those of silicon MOSFETs.

FIG.2Eshows leakage inductance current iLkas a function of time for various turn-on delay times of the clamping switch120. Waveform230shows iLkwhere the clamping switch120is turned off ahead of time. It can be seen from that the leakage inductance current can have a high frequency oscillation at234, which can be caused by the resonance between the output capacitor116of the clamping switch120and the leakage inductance Lk. Waveform232shows iLkwhere the on time Tcsatisfies equation (1) according to embodiments of the disclosure, thereby high frequency oscillations can be eliminated and the EMC performance of the converter can be improved.

As shown inFIG.1, a damping resistor112can be employed in the path of the leakage inductance current iLkin order to reduce oscillation peaks during the charging and discharging of the storage capacitor108. By reducing current oscillation peaks in the primary side, a current stress in the output rectifier diode on the secondary side can also be reduced. In order to determine a value of a resistance Rdampof the damping resistor112, the currents produced during the absorption and release of leakage inductance energy may be critically damped or overdamped. The critically damped or overdamped condition can suppress oscillation peaks and can set a boundary value for the value of the damping resistor. The value of the resistance of the damping resistor Rdampmay be expressed as:

Rdamp≥2⁢LkCs
where Lkis the leakage inductance, and Csis the capacitance of the storage capacitor108.

FIG.2Fshows a comparison of an addition of the damping resistor112Rdampon a secondary side output current149. Waveform222shows that the output current149may peak at a relatively lower value with the implementation of the damping resistor112in circuit100, as compared to waveform220where there is no damping resistor112included in circuit100.

FIG.3illustrates a flyback DC-DC converter circuit300, which is similar to circuit100, with an addition of a diode302according to an embodiment of the disclosure. In circuit300a diode302has been added between nodes304and306, i.e. the diode302can be connected in parallel with the clamping switch120. The body diode118of the clamping switch may have a relatively high voltage drop during conduction, thus when the leakage inductance current iLkis flowing through the body diode118to the storage capacitor108, there can be some power loss present which can reduce the efficiency of the converter. The diode302can be connected in parallel with the clamping switch in order to provide a low voltage drop path for the leakage inductance current iLk, thus reducing power losses during the clock-wise conduction of the leakage inductance current iLk.

FIG.4illustrates a flyback DC-DC converter circuit400, which is similar to circuit100, where the damping resistor112has been placed between a cathode of the diode302and the clamping switch120according to an embodiment of the disclosure. In circuit400, the damping resistor112can be connected between nodes404and406. In this embodiment, during the absorption of the leakage inductance energy by the storage capacitor108, the current iLkdoes not flow through the damping resistor112because it flows through the diode302. This can reducing power losses and improve converter efficiency. Therefore, circuit400can provide for an improved efficiency for the converter.

FIG.5illustrates a flyback DC-DC converter circuit500, which is similar to circuit300, where a blocking diode502is added according to an embodiment of the disclosure. In circuit500, the blocking diode502is added between nodes504and506. The blocking diode502is connected in a direction that is opposite to the direction of diode302. The addition of blocking diode502can eliminate reverse recovery current of the clamping switch120, where timing of absorption and release of the leakage inductance energy through the clamping switch120is improved. This embodiment can be utilized when a silicon MOSFET is used for the clamping switch120, because silicon MOSFETS may have relatively long reverse recovery characteristics.

FIG.6illustrates a flyback DC-DC converter circuit600, which is similar to circuit500, where the damping resistor112has been connected between nodes602and604according to an embodiment of the disclosure. By connecting the damping resistor112between nodes602and604, during the absorption of the leakage inductance energy by the storage capacitor108the current iLkdoes not flow through the damping resistor112because it flows through the diode302. This can reducing power losses and improve converter efficiency. Therefore, circuit600can provide for an improved efficiency for the converter.

In some embodiments, combination of the circuits and methods disclosed herein can be utilized to achieve an absorption and release of the leakage inductance energy of a transformer, and to reduce the effects of leakage inductance energy such as oscillations, ringing and voltage spikes on internal nodes of a power converter. Although circuits and methods are described and illustrated herein with respect to one particular configuration of a flyback DC-DC converter, embodiments of the disclosure are suitable for reducing the effects of leakage inductance energy of a transformer in other power converter configurations, such as, but not limited to, active clamp forward converters, and push-pull converters.

In the foregoing specification, embodiments of the disclosure have been described with reference to numerous specific details that can vary from implementation to implementation. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense. The sole and exclusive indicator of the scope of the disclosure, and what is intended by the applicants to be the scope of the disclosure, is the literal and equivalent scope of the set of claims that issue from this application, in the specific form in which such claims issue, including any subsequent correction. The specific details of particular embodiments can be combined in any suitable manner without departing from the spirit and scope of embodiments of the disclosure.

Additionally, spatially relative terms, such as “bottom or “top” and the like can be used to describe an element and/or feature's relationship to another element(s) and/or feature(s) as, for example, illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and/or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as a “bottom” surface can then be oriented “above” other elements or features. The device can be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

Terms “and,” “or,” and “an/or,” as used herein, may include a variety of meanings that also is expected to depend at least in part upon the context in which such terms are used. Typically, “or” if used to associate a list, such as A, B, or C, is intended to mean A, B, and C, here used in the inclusive sense, as well as A, B, or C, here used in the exclusive sense. In addition, the term “one or more” as used herein may be used to describe any feature, structure, or characteristic in the singular or may be used to describe some combination of features, structures, or characteristics. However, it should be noted that this is merely an illustrative example and claimed subject matter is not limited to this example. Furthermore, the term “at least one of” if used to associate a list, such as A, B, or C, can be interpreted to mean any combination of A, B, and/or C, such as A, B, C, AB, AC, BC, AA, AAB, ABC, AABBCCC, etc.

Reference throughout this specification to “one example,” “an example,” “certain examples,” or “exemplary implementation” means that a particular feature, structure, or characteristic described in connection with the feature and/or example may be included in at least one feature and/or example of claimed subject matter. Thus, the appearances of the phrase “in one example,” “an example,” “in certain examples,” “in certain implementations,” or other like phrases in various places throughout this specification are not necessarily all referring to the same feature, example, and/or limitation. Furthermore, the particular features, structures, or characteristics may be combined in one or more examples and/or features.

In the preceding detailed description, numerous specific details have been set forth to provide a thorough understanding of claimed subject matter. However, it will be understood by those skilled in the art that claimed subject matter may be practiced without these specific details. In other instances, methods and apparatuses that would be known by one of ordinary skill have not been described in detail so as not to obscure claimed subject matter. Therefore, it is intended that claimed subject matter not be limited to the particular examples disclosed, but that such claimed subject matter may also include all aspects falling within the scope of appended claims, and equivalents thereof.