Patent ID: 12206382

DETAILED DESCRIPTION

The text below provides a detailed description of the present disclosure in conjunction with specific embodiments illustrated in the attached drawings. However, these embodiments do not limit the present disclosure. The scope of protection for the present disclosure covers changes made to the structure, method, or function by persons having ordinary skill in the art on the basis of these embodiments.

To facilitate the presentation of the drawings in the present disclosure, the sizes of certain structures or portions may be enlarged relative to other structures or portions. Therefore, the drawings in the present disclosure are only for the purpose of illustrating the basic structure of the subject matter of the present disclosure. The same numbers in different drawings represent the same or similar elements unless otherwise represented.

Additionally, terms in the text indicating relative spatial position, such as “top”, “bottom”, “upper”, “lower”, “above”, “below”, and so forth, are used for explanatory purposes in describing the relationship between a unit or feature depicted in a drawing and another unit or feature therein. Terms indicating relative spatial position may refer to positions other than those depicted in the drawings when a device is being used or operated. For example, if a device shown in a drawing is flipped over, a unit which is described as being positioned “below” or “under” another unit or feature will be located “above” the other unit or feature. Therefore, the illustrative term “below” may include positions both above and below. A device may be oriented in other ways (e.g., rotated 90 degrees or facing another direction), and descriptive terms that appear in the text and are related to space should be interpreted accordingly. When a component or layer is said to be “above” another member or layer or “connected to” another member or layer, it may be directly above the other member or layer or directly connected to the other member or layer, or there may be an intermediate component or layer.

Generally, a thin film bulk acoustic wave (BAW) resonator may include a top electrode, a piezoelectric layer, a lower electrode, and at least one cavity disposed below or above the piezoelectric layer. In a cavity-release BAW structure, a bottom cavity is formed by using an etching and releasing process. During a wafer level packaging (WLP) process of the cavity-release resonator, gold-gold (Au—Au) bonding or dry film bonding is generally used for bonding a cap wafer to a bottom substrate. Since the cavity-release resonator generally uses buffered oxide etchant (BOE) or Dilute Hydrofluoric Acid (DHF) as an etching and releasing solution, gold (Au) is generally used as a pad metal layer in the BAW structure. If the bonding layer of BAW structure includes a dry film, the adhesion between the dry film and Au may be poor. As a result, dry film delamination might occur in subsequent fabrication processes.

In order to solve the problem of the poor adhesion between the dry film bonding layer and the Au pad metal layer, according to some embodiments of the present disclosure, a silicon nitride (SiNx) or silicon oxide (SiO2) layer is formed between the dry film bonding layer and the Au pad metal.

In addition, when the SiNxor SiO2layer directly contacts the Au pad metal layer, Au will dissolve with Si, and abnormal black spots will be formed on the surface of the pad metal layer. In order to solve this problem, according to some embodiments of the present disclosure, the composition of the pad metal layer is changed to include a chromium (Cr) layer at the interface between the Au layer and the SiNxor SiO2layer.

FIG.1is a cross-sectional view of a bulk acoustic wave (BAW) resonator1000, according to an embodiment of the present disclosure.

As illustrated inFIG.1, BAW resonator1000includes a bottom substrate210, a piezoelectric layer140disposed above bottom substrate210, a cap wafer250disposed above piezoelectric layer140, a top electrode130disposed on piezoelectric layer140, a bottom electrode150disposed below piezoelectric layer140, a first pad metal layer230disposed on and electrically connected to top electrode130, a second pad metal layer220disposed on and electrically connected to bottom electrode150, a top bonding layer260disposed below cap wafer250, for bonding cap wafer250with piezoelectric layer140, and a bond contacting layer240disposed between top bonding layer260and each one of first pad metal layer230and second pad metal layer220.

Bottom substrate210may include a material, such as silicon (Si), silicon carbon (SiC), aluminum oxide, quartz, glass (SiO2), or sapphire (Al2O3).

Piezoelectric layer140may include a material with piezoelectric properties, such as aluminum nitride (AlN), zinc oxide (ZnO), lithium niobate (LiNbO3), lithium tantalate (LiTaO3), lead zirconate titanate (PZT), barium strontium titanate (BST), etc., or a stacked combination of two or more of those materials. When the material of piezoelectric layer140is aluminum nitride (AlN), the aluminum nitride may be doped with a certain proportion of rare earth elements, for example, scandium, erbium, lanthanum, etc.

Top and bottom electrodes130and150may include any suitable conductive material, including various metal materials with conductive properties such as molybdenum (Mo), aluminum (Al), copper (Cu), platinum (Pt), tantalum (Ta), tungsten (W), palladium (Pd), ruthenium (Ru), etc., or a stacked combination of two or more of those conductive metal materials.

A frame layer160is disposed on at least a portion of a lower surface of bottom electrode150. Frame layer160is used to form a raised structure165along an edge of bottom electrode150. Raised structure165protrudes towards a bottom cavity500a. Frame layer160may include a conductive material, which may be the same as the material of bottom electrode150or may be different from the material of bottom electrode150. Additionally or alternatively, in an embodiment, frame layer160may be disposed on at least a portion of a top surface of top electrode130, to form a raised structure along an edge of top electrode130. The raised structure protrudes from top electrode130in a direction away from bottom electrode150.

A top passivation layer120is disposed above, and covers a top surface of, top electrode130. A bottom passivation layer170is disposed below, and covers bottom surfaces of, bottom electrode150and frame layer160. Top passivation layer120may include aluminum nitride (AlN). Bottom passivation layer170may include a material such as silicon nitride (SiN), aluminum nitride (AlN), silicon oxide (SiO2), silicon oxynitride (SiNO), etc., or a stacked combination of two or more of those materials.

A sacrificial layer180is disposed between bottom substrate210and piezoelectric layer140. Sacrificial layer180may include silicon oxide (SiO2). The bottom cavity500ais formed in sacrificial layer180.

A bottom bonding layer200is disposed between bottom substrate210and sacrificial layer180. Bottom bonding layer200includes a protruding structure202surrounding bottom cavity500a. Bottom bonding layer200may include silicon oxide, silicon nitride, etc., or a stacked combination of those materials.

A boundary layer190overlays bottom bonding layer200. Boundary layer190may include non-conductive materials such as silicon (Si), silicon nitride (SiN), aluminum nitride (AlN), or a stacked combination of two or more of those materials. Boundary layer190contacts piezoelectric layer140, or contacts bottom electrode150via frame layer160and bottom passivation layer170. An edge of bottom electrode150is located inside bottom cavity500a.

Top passivation layer120is provided with a top electrode contact window that exposes a portion of top electrode130. A first pad metal layer230is disposed above top passivation layer120and is electrically connected to top electrode130via the top electrode contact window. Piezoelectric layer140is provided with a bottom electrode contact window that exposes a portion of bottom electrode150. A second pad metal layer220is disposed above piezoelectric layer140and is electrically connected to bottom electrode150via the bottom electrode contact window.

Each one of first pad metal layer230and second pad metal layer220may include a stack of Cr/Au/Cr layers, or a stack of Ti/Au/Cr layers, arranged in an order from bottom to top. When each one of first pad metal layer230and second pad metal layer220includes the stack of Cr/Au/Cr layers, the stack of Cr/Au/Cr layers includes a first chromium (Cr) layer having a thickness of about several tens of nano meters (e.g., 30±20 nm) disposed on and contacting first pad metal layer230or second pad metal layer220, a gold (Au) layer having a thickness of about several hundreds of nano meters to several micro meters (e.g., 1 μm±200 nm) disposed on the first Cr layer, and a second Cr layer having a thickness of about several tens of nano meters (e.g., 50±20 nm) disposed on the Au layer and contacting bond contacting layer240. When each one of first pad metal layer230and second pad metal layer220includes the stack of Ti/Au/Cr layers, the stack of Ti/Au/Cr layers includes a Ti layer having a thickness of about several tens of nano meters (e.g., 30±20 nm) disposed on and contacting first pad metal layer230or second pad metal layer220, an Au layer having a thickness of about several hundreds of nano meters to several micro meters (e.g., 1 μm±200 nm) disposed on the Ti layer, and a Cr layer having a thickness of about several tens of nano meters (e.g., 50±20 nm) disposed on the Au layer and contacting bond contacting layer240.

Bond contacting layer240includes at least one of a silicon nitride (SiNx) layer or a silicon oxide (SiO2) layer. Top bonding layer260includes a dry film.

A top cavity500bis disposed above piezoelectric layer140and covered by cap wafer250. Top cavity500bis surrounded by top bonding layer260and bond contacting layer240. An edge of top electrode130is disposed within top cavity500b.

A top electrode through hole401extends through cap wafer250, top bonding layer260, and bond contacting layer240, and exposes a portion of first pad metal layer230. A bottom electrode through hole402extends through cap wafer250, top bonding layer260, and bond contacting layer240, and exposes a portion of second pad metal layer220.

A first metal filling271is filled in top electrode through hole401and electrically connected to first pad metal layer230. A second metal filling272is filled in bottom electrode through hole402and electrically connected to second pad metal layer220. First and second metal fillings271and272may include a conductive metal material, such as copper (Cu).

A first solder bump281is disposed on first metal filling271. A second solder bump282is disposed on second metal filling272.

FIG.2is a flow chart of a process2000of fabricating BAW resonator1000, according to an embodiment of the present disclosure.FIGS.3A-3Uare sectional views of structures formed in process2000, according to an embodiment of the present disclosure.

As illustrated inFIGS.2and3A, in step S1, a temporary substrate100is obtained, and a silicon oxide layer110is formed on temporary substrate100. Temporary substrate100may include, for example, silicon (Si), silicon carbide (SiC), aluminum oxide, quartz, or glass, etc. Silicon oxide layer110may be obtained by oxidizing a silicon substrate, or may be deposited on temporary substrate100through a chemical vapor deposition (CVD) process.

As illustrated inFIGS.2and3B, in step S2, a top passivation layer120, a top electrode layer130, a piezoelectric layer140, and a bottom electrode layer150are sequentially deposited on silicon oxide layer110. Top passivation layer120may include aluminum nitride (AlN). Top and bottom electrode layers130and150may include any suitable conductive material, such as various metal materials with conductive properties or a stack of several conductive metal materials, such as molybdenum (Mo), aluminum (Al), copper (Cu), platinum (Pt), tantalum (Ta), tungsten (W), palladium (Pd), ruthenium (Ru), etc. In the present embodiment, top and bottom electrode layers130and150include molybdenum (Mo). Piezoelectric layer140may include materials with piezoelectric properties or their stacked combination, such as aluminum nitride (AlN), zinc oxide (ZnO), lithium niobate (LiNbO3), lithium tantalate (LiTaO3), lead zirconate titanate (PZT), barium strontium titanate (BST), etc. When the material of piezoelectric layer140is aluminum nitride (AlN), the aluminum nitride itself may also be doped with a certain proportion of rare earth elements, such as scandium, erbium, lanthanum, etc.

As illustrated inFIGS.2and3C, in step S3, a frame layer160is formed on bottom electrode layer150, and then frame layer160is patterned. Frame layer160may include a conductive material, which may be the same as the material of bottom electrode layer150or may be different from the material of bottom electrode layer150. The patterning of frame layer160may be achieved either by using a Lift-off process or by using a patterned etching method.

As illustrated inFIGS.2and3D, in step S4, bottom passivation layer170is deposited on the surfaces of bottom electrode layer150and frame layer160. The material of bottom passivation layer170may be silicon nitride (SiN), aluminum nitride (AlN), Silicon oxide (SiO2), silicon oxynitride (SiNO), or other materials, or a stacked combination of two or more of those materials.

As illustrated inFIGS.2and3E, in step S5, bottom passivation layer170, frame layer160, and bottom electrode layer150are patterned to form patterned bottom passivation layer170, patterned frame layer160, and patterned bottom electrode150. The patterned frame layer160includes raised structure165at an edge of bottom electrode150. The patterning may be achieved by etching, such as a plasma etching process, a wet chemical etching process, or a combination of the two.

As illustrated inFIGS.2and3F, in step S6, a sacrificial layer180is deposited on the structure inFIG.3E, and is patterned by etching to form trench350. The material of sacrificial layer180may be silicon oxide. Trench350surrounds a portion of sacrificial layer180which will be removed during a subsequent etching and releasing process, thereby forming bottom cavity500a. Trench350is used to define the range of bottom cavity500a. Trench350exposes a portion of bottom passivation layer170and a portion of piezoelectric layer140.

As illustrated inFIGS.2and3G, in step S7, boundary layer190is deposited. The material of boundary layer190may be silicon (Si), silicon nitride (SiN), aluminum nitride (AlN), or other non-conductive materials, or a stacked combination of two or more of those materials. Boundary layer190is deposited in trench350, thereby defining a stop boundary during the subsequent etching and releasing process for forming bottom cavity500a.

As illustrated inFIGS.2and3H, in step S8, bottom bonding layer200is deposited on boundary layer190, and fills in trench350. Then, surface planarization and polishing are performed on bottom bonding layer200. A portion of bottom bonding layer200that fills in trench350constitutes a protruding structure202that surrounds the part of sacrificial layer180which will be removed to form bottom cavity500a. Bottom bonding layer200is used to bond bottom substrate210. The material of bottom bonding layer200may be silicon oxide, silicon nitride, or other materials, or a stacked combination of two or more of these materials. In the present embodiment, silicon oxide is used for bottom bonding layer200. The surface planarization and polishing may be achieved by a chemical mechanical polishing (CMP) process.

As illustrated inFIGS.2and3I, in step S9, bottom substrate210is bonded to bottom bonding layer200. Bottom substrate210may be a cap wafer that includes a material such as silicon (Si), carbon silicon (SiC), aluminum oxide, quartz, glass (SiO2), or sapphire (Al2O3).

As illustrated inFIGS.2and3J, in step S10, the structure illustrated inFIG.31is flipped over, and temporary substrate100and silicon oxide layer110are removed. The removing of temporary substrate100may be performed by a grinding process, a plasma dry etching process, a wet chemical etching process, or a combination thereof. In the present embodiment, temporary substrate100is made of silicon material, and is removed by a combination of grinding and wet chemical etching, or a combination of grinding and plasma dry etching. Silicon oxide layer110may be removed by plasma dry etching, wet chemical etching, or a combination of the two.

As illustrated inFIGS.2and3K, in step S11, top passivation layer120and top electrode layer130are patterned by etching, to form patterned top passivation layer120and top electrode130. The etching process may be a plasma etching process, a wet chemical etching process, or a combination of the two.

As illustrated inFIGS.2and3L, in step S12, piezoelectric layer140is etched to form bottom electrode contact window142for bottom electrode150, and top passivation layer120is etched to form top electrode contact window122for top electrode130.

As illustrated inFIGS.2and3M, in step S13, a metal layer is formed on the structure illustrated inFIG.3Lby vapor deposition. Then, the metal layer is patterned by lift-off to form first pad metal layer230and second pad metal layer220. First pad metal layer230is formed on top passivation layer120, and contacts top electrode130via top electrode contact window122. Second pad metal layer220is formed on piezoelectric layer140, and contacts bottom electrode150via bottom electrode contact window142. Each one of first pad metal layer230and second pad metal layer220may include a stack of Cr/Au/Cr layers, or a stack of Ti/Au/Cr layers, arranged in an order from bottom to top.

As illustrated inFIGS.2and3N, in step S14, bond contacting layer240is formed on the structure illustrated inFIG.3Mby plasma enhanced chemical vapor deposition (PECVD) process. Then, bond contacting layer240is patterned by etching to partially cover first pad metal layer230and second pad metal layer220. The patterned bond contacting layer240includes a space for forming top cavity500b, and exposes portions of first pad metal layer230and second pad metal layer220. Bond contacting layer240may include at least one of a silicon nitride (SiNx) layer or a silicon oxide (SiO2) layer.

As illustrated inFIGS.2and3O, in step S15, the portion of sacrificial layer180surrounded by protruding structure202is etched and released via a releasing hole (not shown) formed in piezoelectric layer140, to form bottom cavity500a. In the present embodiment, sacrificial layer180is made from silicon oxide, and the etching and releasing process of sacrificial layer180may be performed by using hydrofluoric acid solution wet etching, buffered oxide etchant (BOE) solution wet etching, or hydrofluoric acid vapor corrosion, or a combination of these processes. The etching of the sacrificial layer180stops at boundary layer190.

As illustrated inFIGS.2and3P, in step S16, cap wafer250is obtained. Then, top bonding layer260is formed on cap wafer250, and is patterned to leave a space for top cavity500band leave spaces for top electrode through hole401and bottom electrode through hole402.

As illustrated inFIGS.2and3Q, in step S17, cap wafer250formed with top bonding layer260is bonded to the structure illustrated inFIG.3Pvia top bonding layer260and bond contacting layer240.

As a result, as illustrated inFIG.3R, top cavity500bis formed above piezoelectric layer140and is covered by cap wafer250. Top cavity500bis surrounded by top bonding layer260and bond contacting layer240.

As illustrated inFIGS.2and3S, in step S18, cap wafer250is etched to form top electrode through hole401and second electrode through hole402. Top electrode through hole401extends through cap wafer250, top bonding layer260, and bond contacting layer240and exposes a portion of first pad metal layer230. Second electrode through hole402extends through cap wafer250, top bonding layer260, and bond contacting layer240, and exposes a portion of second pad metal layer220.

As illustrated inFIGS.2and3T, in step S19, first and second metal fillings271and272are respectively filled in top and bottom electrode through holes401and402. Metal fillings271and272may be made from a conductive metal material such as, for example copper (Cu).

As illustrated inFIGS.2and3U, in step S20, first and second solder bumps281and282are respectively formed on top of first and second metal fillings271and272. As a result, BAW resonator1000illustrated inFIG.1is fabricated.

Other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.