A semiconductor package comprising: a lower package including a lower package substrate and a memory controller on the lower package substrate ; an upper package stacked on the lower package , the upper package including an upper package substrate and a memory device on the upper package substrate ; and a plurality of vertical interconnections electrically connecting the lower package to the upper package , wherein the semiconductor package (500a; 500b) is configured to cause the memory controller to output a first data clock signal (WCKO) used for a channel that is an independent data interface between the memory controller and the memory device , branch the first data clock signal (WCKO), and provide the branched first data clock signal (WCKO) to the memory device , characterized in that the semiconductor package (500a; 500b) is configured to transmit the branched first data clock signal (WCKO) to n pads of the memory device , where n is a natural number that is equal to or greater than 2;the memory device comprises receivers (222, 224; 1122, 1124, 1126, 1128) connected to the n pads , the receivers (212, 214; 1122, 1124, 1126, 1128) configured to receive the branched first data clock signal (WCKO) through the n pads of the memory device that are used for the channel, and provide the branched first data clock signal (WCKO) to an inside of the memory device ;the memory controller comprises a data clock generator configured to generate the first data clock signal (WCKO) used for the channel and transmitters (212, 214; 1112, 1114, 1116, 1118) configured to transmit the first data clock signal (WCKO), and the transmitters are configured to be disabled except for one transmitter (212; 1112) for transmitting the first data clock signal (WCKO). a lower package including a lower package substrate and a memory controller on the lower package substrate ; an upper package stacked on the lower package , the upper package including an upper package substrate and a memory device on the upper package substrate ; and a plurality of vertical interconnections electrically connecting the lower package to the upper package , wherein the semiconductor package (500a; 500b) is configured to cause the memory controller to output a first data clock signal (WCKO) used for a channel that is an independent data interface between the memory controller and the memory device , branch the first data clock signal (WCKO), and provide the branched first data clock signal (WCKO) to the memory device , characterized in that the semiconductor package (500a; 500b) is configured to transmit the branched first data clock signal (WCKO) to n pads of the memory device , where n is a natural number that is equal to or greater than 2;the memory device comprises receivers (222, 224; 1122, 1124, 1126, 1128) connected to the n pads , the receivers (212, 214; 1122, 1124, 1126, 1128) configured to receive the branched first data clock signal (WCKO) through the n pads of the memory device that are used for the channel, and provide the branched first data clock signal (WCKO) to an inside of the memory device ;the memory controller comprises a data clock generator configured to generate the first data clock signal (WCKO) used for the channel and transmitters (212, 214; 1112, 1114, 1116, 1118) configured to transmit the first data clock signal (WCKO), and the transmitters are configured to be disabled except for one transmitter (212; 1112) for transmitting the first data clock signal (WCKO). <EOS>