Signal-alignment circuitry, comprising: phase-rotation circuitry (1020; 2020; 4000) connected to receive a plurality of input clock signals and operable to generate therefrom a plurality of output clock signals; divider circuitry (2032; 2034) connected to said phase-rotation circuitry and configured to output derived clock signals by division of corresponding said output signals; and control circuitry (1050; 2050) configured to control the amount of phase rotation applied by the phase-rotation circuitry (1020; 2020; 4000) to carry out a plurality of alignment operations, the alignment operations comprising: one or more first operations each comprising causing the phase of one or more of said output clock signals to rotate relative to the phase of one or more of the other said output clock signals, so as to bring said derived clock signals into a given phase relationship; and one or more second operations each comprising causing the phases of all of said output clock signals to rotate together, so as to bring said output or derived clock signals into a given phase relationship with said input clock signals or an external-reference signal, wherein: the signal-alignment circuitry comprises a derived-signal phase detector operable to detect phase differences between at least first and second said derived clock signals; and the control circuitry (1050; 2050) is operable to carry out one or more of the first operations in dependence upon a phase difference detected by the derived-signal phase detector . phase-rotation circuitry (1020; 2020; 4000) connected to receive a plurality of input clock signals and operable to generate therefrom a plurality of output clock signals; divider circuitry (2032; 2034) connected to said phase-rotation circuitry and configured to output derived clock signals by division of corresponding said output signals; and control circuitry (1050; 2050) configured to control the amount of phase rotation applied by the phase-rotation circuitry (1020; 2020; 4000) to carry out a plurality of alignment operations, the alignment operations comprising: one or more first operations each comprising causing the phase of one or more of said output clock signals to rotate relative to the phase of one or more of the other said output clock signals, so as to bring said derived clock signals into a given phase relationship; and one or more second operations each comprising causing the phases of all of said output clock signals to rotate together, so as to bring said output or derived clock signals into a given phase relationship with said input clock signals or an external-reference signal, wherein: the signal-alignment circuitry comprises a derived-signal phase detector operable to detect phase differences between at least first and second said derived clock signals; and the control circuitry (1050; 2050) is operable to carry out one or more of the first operations in dependence upon a phase difference detected by the derived-signal phase detector . one or more first operations each comprising causing the phase of one or more of said output clock signals to rotate relative to the phase of one or more of the other said output clock signals, so as to bring said derived clock signals into a given phase relationship; and one or more second operations each comprising causing the phases of all of said output clock signals to rotate together, so as to bring said output or derived clock signals into a given phase relationship with said input clock signals or an external-reference signal, the signal-alignment circuitry comprises a derived-signal phase detector operable to detect phase differences between at least first and second said derived clock signals; and the control circuitry (1050; 2050) is operable to carry out one or more of the first operations in dependence upon a phase difference detected by the derived-signal phase detector . <EOS>