A high-voltage output driver for a sensor device with reverse current blocking, comprising: - a supply node (SN) to apply a supply voltage (VHV), - an output node (OP) to provide an output signal (OS) of the high-voltage output driver , - a driver transistor (MP0) being disposed between the supply node (SN) and the output node (OP), - a bulk control circuit to apply a bulk control voltage (Vwell) to a bulk node (BMP0) of the driver transistor (MPO), - a gate control circuit to apply a gate control voltage (GCV) to the gate node (GMP0) of the driver transistor (MPO), - wherein the high-voltage output driver is operated in a first operation mode in which the potential (QP) at the output node (OP) is lower than the supply voltage (VHV), and in a second operation mode in which the potential (QP) at the output node (OP) is higher than the supply voltage (VHV), - wherein the bulk control circuit is configured to apply the level of a bulk control voltage (Vwell) to the bulk node (BMP0) of the driver transistor (MP0) in dependence on operating the high-voltage output driver in the first and second operation mode, - wherein the high-voltage output driver comprises a detection circuit being configured to sense the bulk control voltage (Vwell) to detect the first and the second operation mode of the high-voltage output driver , the detection circuit being arranged, during the first operation mode, to enable pulling up of the potential at the gate node (GMP0) of the driver transistor (MP0) to the supply voltage (VHV) and, during the second operation mode, to allow pulling up of the potential at the gate node (GMP0) of the driver transistor (MP0) to the potential (QP) at the output node (OP) by disabling pulling up of the potential at the gate node (GMP0) of the driver transistor (MP0) to the supply voltage (VHV) in response to the detection of the first and second operation mode. - a supply node (SN) to apply a supply voltage (VHV), - an output node (OP) to provide an output signal (OS) of the high-voltage output driver , - a driver transistor (MP0) being disposed between the supply node (SN) and the output node (OP), - a bulk control circuit to apply a bulk control voltage (Vwell) to a bulk node (BMP0) of the driver transistor (MPO), - a gate control circuit to apply a gate control voltage (GCV) to the gate node (GMP0) of the driver transistor (MPO), - wherein the high-voltage output driver is operated in a first operation mode in which the potential (QP) at the output node (OP) is lower than the supply voltage (VHV), and in a second operation mode in which the potential (QP) at the output node (OP) is higher than the supply voltage (VHV), - wherein the bulk control circuit is configured to apply the level of a bulk control voltage (Vwell) to the bulk node (BMP0) of the driver transistor (MP0) in dependence on operating the high-voltage output driver in the first and second operation mode, - wherein the high-voltage output driver comprises a detection circuit being configured to sense the bulk control voltage (Vwell) to detect the first and the second operation mode of the high-voltage output driver , the detection circuit being arranged, during the first operation mode, to enable pulling up of the potential at the gate node (GMP0) of the driver transistor (MP0) to the supply voltage (VHV) and, during the second operation mode, to allow pulling up of the potential at the gate node (GMP0) of the driver transistor (MP0) to the potential (QP) at the output node (OP) by disabling pulling up of the potential at the gate node (GMP0) of the driver transistor (MP0) to the supply voltage (VHV) in response to the detection of the first and second operation mode. <EOS>