A method for manufacturing a semiconductor device, comprising: forming an electrode of a semiconductor element by laminating a junction layer , a diffusion-suppressing layer including an Ni layer, and a pad layer on an upper surface of a semiconductor substrate in the order mentioned, the pad layer including an Au layer; forming a through hole in the semiconductor substrate immediately below the electrode so as to penetrate the semiconductor substrate and expose the diffusion suppressing layer ; forming a wiring on a back surface of the semiconductor substrate and on an inner surface of the through hole formed in the semiconductor substrate so as to be electrically connected to the electrode, characterised in that the wiring is formed of Au and in that the method further comprises the following steps: mounting the semiconductor device, after forming the wiring , on a mounting substrate via solder , wherein the solder is a metal including Au and Sn, said solder filling the through hole , wherein the solder , the wiring and the junction layer mix to form an alloyed solder wherein an intermetallic compound (18") is formed by the Ni of the diffusion suppressing layer and the Sn of the alloyed solder which fills the through hole, the intermetallic compound (18") being formed within the alloyed solder and near the interface between the alloyed solder and the diffusion suppressing layer . forming an electrode of a semiconductor element by laminating a junction layer , a diffusion-suppressing layer including an Ni layer, and a pad layer on an upper surface of a semiconductor substrate in the order mentioned, the pad layer including an Au layer; forming a through hole in the semiconductor substrate immediately below the electrode so as to penetrate the semiconductor substrate and expose the diffusion suppressing layer ; forming a wiring on a back surface of the semiconductor substrate and on an inner surface of the through hole formed in the semiconductor substrate so as to be electrically connected to the electrode, characterised in that the wiring is formed of Au and in that the method further comprises the following steps: mounting the semiconductor device, after forming the wiring , on a mounting substrate via solder , wherein the solder is a metal including Au and Sn, said solder filling the through hole , wherein the solder , the wiring and the junction layer mix to form an alloyed solder wherein an intermetallic compound (18") is formed by the Ni of the diffusion suppressing layer and the Sn of the alloyed solder which fills the through hole, the intermetallic compound (18") being formed within the alloyed solder and near the interface between the alloyed solder and the diffusion suppressing layer . mounting the semiconductor device, after forming the wiring , on a mounting substrate via solder , wherein the solder is a metal including Au and Sn, said solder filling the through hole , wherein the solder , the wiring and the junction layer mix to form an alloyed solder wherein an intermetallic compound (18") is formed by the Ni of the diffusion suppressing layer and the Sn of the alloyed solder which fills the through hole, the intermetallic compound (18") being formed within the alloyed solder and near the interface between the alloyed solder and the diffusion suppressing layer . <EOS>