A voltage sensor for tracking a secondary-side voltage of an isolated switched-mode power converter, the voltage sensor comprising: a first sense terminal configured to receive a first sense voltage (VSENP) corresponding to the secondary-side voltage (V RECT ); a first level shifter for shifting the first sense voltage (VSENP), thereby providing a first level-shifted voltage (VSHFTP); a first input buffer configured to receive the first level-shifted voltage (VSHFTP), and to provide a first buffered output (VBUFP) having a voltage corresponding to the first level-shifted voltage (VSHFTP) and having a first buffered current which is higher than a current at the input of the first input buffer ; a tracking analog-to-digital converter, ADC, having an ADC input coupled to the first buffer output and configured to output a digital value (VRECT_DIG) corresponding to the secondary-side voltage; and an edge-detect comparator which is connected to the first sense terminal and is configured to detect a voltage pulse of the secondary-side voltage and, responsive to said pulse detection, to activate the tracking ADC , wherein the tracking ADC comprises: a digital-to-analog converter, DAC, having a DAC output (VTRK); a DAC register whose stored value determines a voltage of the DAC output (VTRK); a DAC comparator configured to compare a voltage of the ADC input with a voltage of the DAC output (VTRK) and provide a DAC comparator output indicating which of these voltages is higher; and an ADC controller configured to update the stored value of the DAC register based upon the DAC comparator output, wherein activating the tracking ADC comprises preloading the DAC register with a value from a previous active interval of the tracking ADC . a first sense terminal configured to receive a first sense voltage (VSENP) corresponding to the secondary-side voltage (V RECT ); a first level shifter for shifting the first sense voltage (VSENP), thereby providing a first level-shifted voltage (VSHFTP); a first input buffer configured to receive the first level-shifted voltage (VSHFTP), and to provide a first buffered output (VBUFP) having a voltage corresponding to the first level-shifted voltage (VSHFTP) and having a first buffered current which is higher than a current at the input of the first input buffer ; a tracking analog-to-digital converter, ADC, having an ADC input coupled to the first buffer output and configured to output a digital value (VRECT_DIG) corresponding to the secondary-side voltage; and an edge-detect comparator which is connected to the first sense terminal and is configured to detect a voltage pulse of the secondary-side voltage and, responsive to said pulse detection, to activate the tracking ADC , wherein the tracking ADC comprises: a digital-to-analog converter, DAC, having a DAC output (VTRK); a DAC register whose stored value determines a voltage of the DAC output (VTRK); a DAC comparator configured to compare a voltage of the ADC input with a voltage of the DAC output (VTRK) and provide a DAC comparator output indicating which of these voltages is higher; and an ADC controller configured to update the stored value of the DAC register based upon the DAC comparator output, wherein activating the tracking ADC comprises preloading the DAC register with a value from a previous active interval of the tracking ADC . a digital-to-analog converter, DAC, having a DAC output (VTRK); a DAC register whose stored value determines a voltage of the DAC output (VTRK); a DAC comparator configured to compare a voltage of the ADC input with a voltage of the DAC output (VTRK) and provide a DAC comparator output indicating which of these voltages is higher; and an ADC controller configured to update the stored value of the DAC register based upon the DAC comparator output, wherein activating the tracking ADC comprises preloading the DAC register with a value from a previous active interval of the tracking ADC . <EOS>