An analog-to-digital converter, ADC, circuitry, comprising: an input (104; 204a, 204b) configured to receive an analog input signal to be converted to a digital representation, and a reference input signal; an integrator (102; 202) comprising a capacitor (110; 210a, 210b), wherein the integrator (102; 202) is configured to switch between integrating the analog input signal for ramping an integrator output and allow a charge to build up on the capacitor and integrating the reference input signal for returning integrator output towards a threshold; a comparator (120; 220) configured to compare integrator output to the threshold; and a timer (150; 250) configured to determine a time duration during which the reference input signal is integrated for changing the integrator output to reach the threshold, wherein the time duration provides a digital representation of an analog input signal value; characterized in that the ADC circuitry (100; 200) further comprises a feedforward noise shaping loop (130; 130a, 130b; 230a, 230b) comprising at least one noise shaping capacitor (131-134) configured to store a quantization error signal remaining on the integrator output based on digitizing a first sample of the analog input signal, wherein the comparator (120; 220) is configured to receive a feedforward noise shaping signal from the feedforward noise shaping loop (130; 130a, 130b; 230a, 230b) based on the quantization error signal stored by the at least one noise shaping capacitor (131-134) for changing the threshold of the comparator (120; 220) for digitizing a later sample of the analog input signal following the first sample. an input (104; 204a, 204b) configured to receive an analog input signal to be converted to a digital representation, and a reference input signal; an integrator (102; 202) comprising a capacitor (110; 210a, 210b), wherein the integrator (102; 202) is configured to switch between integrating the analog input signal for ramping an integrator output and allow a charge to build up on the capacitor and integrating the reference input signal for returning integrator output towards a threshold; a comparator (120; 220) configured to compare integrator output to the threshold; and a timer (150; 250) configured to determine a time duration during which the reference input signal is integrated for changing the integrator output to reach the threshold, wherein the time duration provides a digital representation of an analog input signal value; characterized in that the ADC circuitry (100; 200) further comprises a feedforward noise shaping loop (130; 130a, 130b; 230a, 230b) comprising at least one noise shaping capacitor (131-134) configured to store a quantization error signal remaining on the integrator output based on digitizing a first sample of the analog input signal, wherein the comparator (120; 220) is configured to receive a feedforward noise shaping signal from the feedforward noise shaping loop (130; 130a, 130b; 230a, 230b) based on the quantization error signal stored by the at least one noise shaping capacitor (131-134) for changing the threshold of the comparator (120; 220) for digitizing a later sample of the analog input signal following the first sample. <EOS>