An apparatus comprising: a first input-output memory management circuit of a memory , having an input-output memory management unique identification; a second input-output memory management circuit of the memory , having an input-output memory management unique identification; the first input-output memory management circuit coupled with a first device having a requester identification; the second input-output memory management circuit coupled with second first device having a requester identification; and a processor to execute secure arbitration mode firmware to perform assigning a first unique identification value for the input-output memory management unique identification of the first input-output memory management circuit by the processor in a secure arbitration mode; assigning a second unique identification value for the input-output memory management unique identification of the second input-output memory management circuit by the processor in the secure arbitration mode; sending the first unique identification value to the first device during a secure assignment of the first device to a first trusted domain of the memory by the processor in the secure arbitration mode; sending the second unique identification value to the second device during a secure assignment of the second device to a second trusted domain of the memory by the processor in the secure arbitration mode; and sending, by the processor in the secure arbitration mode, a request from the processor to a third device coupled to the memory for an identification value, and blocking access to the first trusted domain for the third device unless the third device sends the first unique identification value in a response message, wherein the first device and the third device have a same requester identification value. a first input-output memory management circuit of a memory , having an input-output memory management unique identification; a second input-output memory management circuit of the memory , having an input-output memory management unique identification; the first input-output memory management circuit coupled with a first device having a requester identification; the second input-output memory management circuit coupled with second first device having a requester identification; and a processor to execute secure arbitration mode firmware to perform assigning a first unique identification value for the input-output memory management unique identification of the first input-output memory management circuit by the processor in a secure arbitration mode; assigning a second unique identification value for the input-output memory management unique identification of the second input-output memory management circuit by the processor in the secure arbitration mode; sending the first unique identification value to the first device during a secure assignment of the first device to a first trusted domain of the memory by the processor in the secure arbitration mode; sending the second unique identification value to the second device during a secure assignment of the second device to a second trusted domain of the memory by the processor in the secure arbitration mode; and sending, by the processor in the secure arbitration mode, a request from the processor to a third device coupled to the memory for an identification value, and blocking access to the first trusted domain for the third device unless the third device sends the first unique identification value in a response message, wherein the first device and the third device have a same requester identification value. <EOS>