A microelectronic package comprising: a substrate having a first region and a second region , the substrate having a first surface and a second surface remote from the first surface; at least one microelectronic element overlying the first surface within the first region; electrically conductive elements exposed at at least one of the first surface and the second surface of the substrate within the second region, at least some of the conductive elements being electrically connected to the at least one microelectronic element; wire bonds , each defining a base joined to a respective one of the conductive elements, and each wire bond having a second portion extending in a direction of a length of the respective wire bond away from the respective base, the second portion extending upwardly relative to the at least one surface of the substrate at an angle between 25° and 90°, the wire bonds further having ends remote from the substrate and remote from the bases; and a dielectric encapsulation layer extending from at least one of the first or second surfaces and covering portions of the wire bonds such that covered portions of the wire bonds are separated from one another by the encapsulation layer, the encapsulation layer overlying at least the second region of the substrate, wherein unencapsulated portions of the wire bonds are defined by portions of the wire bonds that are uncovered by the encapsulation layer; characterized in that the end of said at least one of the wire bonds is defined as a tip that is tapered in one direction extending beyond a cylindrical portion of the at least one of the wire bonds immediately adjacent the tip, in which the tip has a centroid that is offset in a radial direction from an axis of the cylindrical portion of the wire bond; and the unencapsulated portions of the dielectric encapsulation layer include the ends of the wire bonds. a substrate having a first region and a second region , the substrate having a first surface and a second surface remote from the first surface; at least one microelectronic element overlying the first surface within the first region; electrically conductive elements exposed at at least one of the first surface and the second surface of the substrate within the second region, at least some of the conductive elements being electrically connected to the at least one microelectronic element; wire bonds , each defining a base joined to a respective one of the conductive elements, and each wire bond having a second portion extending in a direction of a length of the respective wire bond away from the respective base, the second portion extending upwardly relative to the at least one surface of the substrate at an angle between 25° and 90°, the wire bonds further having ends remote from the substrate and remote from the bases; and a dielectric encapsulation layer extending from at least one of the first or second surfaces and covering portions of the wire bonds such that covered portions of the wire bonds are separated from one another by the encapsulation layer, the encapsulation layer overlying at least the second region of the substrate, wherein unencapsulated portions of the wire bonds are defined by portions of the wire bonds that are uncovered by the encapsulation layer; characterized in that the end of said at least one of the wire bonds is defined as a tip that is tapered in one direction extending beyond a cylindrical portion of the at least one of the wire bonds immediately adjacent the tip, in which the tip has a centroid that is offset in a radial direction from an axis of the cylindrical portion of the wire bond; and the unencapsulated portions of the dielectric encapsulation layer include the ends of the wire bonds. <EOS>