An error-compensated direct digital modulation device , comprising: a direct digital radio frequency modulator, DDRM, , configured to generate a radio frequency, RF, signal based on a modulation of a digital baseband signal ; an error estimator configured to determine an error signal resulting from a deviation based on the generated RF signal and a representation of the digital baseband signal ; and an error compensator configured to subtract the error signal from the RF signal to provide an error compensated RF signal ; characterized in that the DDRM is a quadrature DDRM comprising an in-phase DDRM and a quadrature DDRM ; the device further comprising one of a digital-to-analog converter, DAC, or a second DDRM configured to provide the error signal as an analog error signal, wherein the one of the DAC or the second DDRM is configured to provide the error signal by using a first clock signal (F4LO, 1111); the device further comprising a quadrature clock generator configured to generate a first differential input clock signal (LOp_I, LOn_I, 1113) and a second differential input clock signal (LOp_Q, LOn_Q, 1114) based on a second clock signal (F2LO_p, F2LO_n, 1112), wherein the second clock signal (F2LO_p, F2LO_n, 1112) is derived from the first clock signal (F4LO, 1111), in particular by a clock divider ; and wherein the first differential input clock signal (LOp_I, LOn_I, 1113) and the second differential input clock signal (LOp_Q, LOn_Q, 1114) have orthogonal phases; wherein the in-phase DDRM is configured to modulate the digital baseband signal by using the first differential input clock signal to generate a first differential current corresponding to the in-phase of the RF signal and the quadrature DDRM is configured to modulate the digital baseband signal by using the second differential input clock signal to generate a second differential current corresponding to the quadrature of the RF signal . a direct digital radio frequency modulator, DDRM, , configured to generate a radio frequency, RF, signal based on a modulation of a digital baseband signal ; an error estimator configured to determine an error signal resulting from a deviation based on the generated RF signal and a representation of the digital baseband signal ; and an error compensator configured to subtract the error signal from the RF signal to provide an error compensated RF signal ; characterized in that the DDRM is a quadrature DDRM comprising an in-phase DDRM and a quadrature DDRM ; the device further comprising one of a digital-to-analog converter, DAC, or a second DDRM configured to provide the error signal as an analog error signal, wherein the one of the DAC or the second DDRM is configured to provide the error signal by using a first clock signal (F4LO, 1111); the device further comprising a quadrature clock generator configured to generate a first differential input clock signal (LOp_I, LOn_I, 1113) and a second differential input clock signal (LOp_Q, LOn_Q, 1114) based on a second clock signal (F2LO_p, F2LO_n, 1112), wherein the second clock signal (F2LO_p, F2LO_n, 1112) is derived from the first clock signal (F4LO, 1111), in particular by a clock divider ; and wherein the first differential input clock signal (LOp_I, LOn_I, 1113) and the second differential input clock signal (LOp_Q, LOn_Q, 1114) have orthogonal phases; wherein the in-phase DDRM is configured to modulate the digital baseband signal by using the first differential input clock signal to generate a first differential current corresponding to the in-phase of the RF signal and the quadrature DDRM is configured to modulate the digital baseband signal by using the second differential input clock signal to generate a second differential current corresponding to the quadrature of the RF signal . <EOS>