A display apparatus, comprising: a display panel comprising a plurality of gate lines (GL), a plurality of data lines (DL), and a plurality of subpixels (SP), each of the plurality of subpixels (SP) including a subpixel electrode (SPE) connected to one of the plurality of gate lines (GL) and one of the plurality of data lines (DL) through a switching element (TR); a gate driver configured to output a plurality of gate signals (G1 to G9) to the plurality of gate lines (GL) and to deactivate at least one of the plurality of gate signals (G1 to G6) in a P-th frame; anda data driver configured to output a plurality of data voltages to the plurality of data lines (DL), wherein P is a positive integer characterized by a timing controller configured to determine a driving mode of the gate driver based on the comparison of a parameter between image data of a present frame and image data of a previous frame, wherein when the comparison result is higher than a threshold, the driving mode is determined to be in a first mode, and when the comparison result is lower, the driving mode is determined to be in a second mode; when the driving mode is determined to be in the first mode, the gate driver is configured to activate each of the gate lines (GL) in every frame, and when the driving mode is determined to be in the second mode, the gate driver is configured to group all the gate lines (GL) in different groups and to deactivate at least one gate line of one of the groups per frame such that in consecutive frames the same gate line is not deactivated; a scanning time of the at least non activated gate line per frame is occupied by scanning pulses applied to the activated gate lines; and the gate signals (G1 to G9) applied to some of the gate lines (GL) are deactivated according to the frames. a display panel comprising a plurality of gate lines (GL), a plurality of data lines (DL), and a plurality of subpixels (SP), each of the plurality of subpixels (SP) including a subpixel electrode (SPE) connected to one of the plurality of gate lines (GL) and one of the plurality of data lines (DL) through a switching element (TR); a gate driver configured to output a plurality of gate signals (G1 to G9) to the plurality of gate lines (GL) and to deactivate at least one of the plurality of gate signals (G1 to G6) in a P-th frame; anda data driver configured to output a plurality of data voltages to the plurality of data lines (DL), wherein P is a positive integer characterized by a timing controller configured to determine a driving mode of the gate driver based on the comparison of a parameter between image data of a present frame and image data of a previous frame, wherein when the comparison result is higher than a threshold, the driving mode is determined to be in a first mode, and when the comparison result is lower, the driving mode is determined to be in a second mode; when the driving mode is determined to be in the first mode, the gate driver is configured to activate each of the gate lines (GL) in every frame, and when the driving mode is determined to be in the second mode, the gate driver is configured to group all the gate lines (GL) in different groups and to deactivate at least one gate line of one of the groups per frame such that in consecutive frames the same gate line is not deactivated; a scanning time of the at least non activated gate line per frame is occupied by scanning pulses applied to the activated gate lines; and the gate signals (G1 to G9) applied to some of the gate lines (GL) are deactivated according to the frames. <EOS>