An integrated circuit comprising: a plurality of logarithmic addition-accumulator circuits to, in operation, perform iterative logarithmic addition and accumulate operations, wherein each logarithmic addition-accumulator circuit includes: a logarithmic addition circuit to add a first input data, having a logarithmic data format, and a filter weight data, having the logarithmic data format, and, based thereon, output first sum data, having the logarithmic data format, a first data format conversion circuitry, coupled to the logarithmic addition circuit of the associated logarithmic addition-accumulator circuit, to convert the logarithmic data format of the first sum data, which is received from the logarithmic addition circuit of the associated logarithmic addition-accumulator circuit, to a floating point data format or a fixed point data format, and to output the first sum data, having the floating point data format or the fixed point data format, an accumulator, coupled to the first data format conversion circuitry of the associated logarithmic addition-accumulator circuit, to add a second input data and the first sum data, output by the first data format conversion circuitry of the associated logarithmic addition-accumulator circuit, to generate first accumulation data; and a data output circuit having a first input to receive the first accumulation data from the accumulator following a final one of the iterative logarithmic and accumulate operations, the data output circuit additionally having a second input and an output; and wherein the plurality of logarithmic addition-accumulator circuits are connected in series via their respective data output circuits, with the output of the data output circuit within each of the logarithmic addition-accumulator circuits coupled to the second input of the data output circuit within a subsequent one of the logarithmic addition-accumulator circuits to form a shift register via which the first accumulation data generated within each of the accumulators of the logarithmic addition-accumulator circuits may be sequentially shifted out. a logarithmic addition circuit to add a first input data, having a logarithmic data format, and a filter weight data, having the logarithmic data format, and, based thereon, output first sum data, having the logarithmic data format, a first data format conversion circuitry, coupled to the logarithmic addition circuit of the associated logarithmic addition-accumulator circuit, to convert the logarithmic data format of the first sum data, which is received from the logarithmic addition circuit of the associated logarithmic addition-accumulator circuit, to a floating point data format or a fixed point data format, and to output the first sum data, having the floating point data format or the fixed point data format, an accumulator, coupled to the first data format conversion circuitry of the associated logarithmic addition-accumulator circuit, to add a second input data and the first sum data, output by the first data format conversion circuitry of the associated logarithmic addition-accumulator circuit, to generate first accumulation data; and a data output circuit having a first input to receive the first accumulation data from the accumulator following a final one of the iterative logarithmic and accumulate operations, the data output circuit additionally having a second input and an output; and wherein the plurality of logarithmic addition-accumulator circuits are connected in series via their respective data output circuits, with the output of the data output circuit within each of the logarithmic addition-accumulator circuits coupled to the second input of the data output circuit within a subsequent one of the logarithmic addition-accumulator circuits to form a shift register via which the first accumulation data generated within each of the accumulators of the logarithmic addition-accumulator circuits may be sequentially shifted out. <EOS>