Circuitry for a relaxation oscillator, comprising: a current swapping circuit having a first output and a second output , the current swapping circuit arranged for sourcing a first current (I1) from the first output and a second current from the second output in response to a first logic state of a first switching signal (SS1) and a second logic state of a second switching signal (SS2), and sourcing the first current (I1) from the second output and the second current from the first output in response to a second logic state of the first switching signal (SS1) and a first logic state of the second switching signal (SS2); and a first current leg coupled to the first output of the current swapping circuit , the first current leg arranged for receiving the first current (I1) when sourced from the first output and generating a first leg voltage from the first current (I1) in response to a first logic state of a third switching signal (SS3) and a second logic state of a fourth switching signal (SS4), and receiving the second current when sourced from the first output and generating a second leg voltage from the second current in response to the first logic state of the third switching signal (SS3) and the second logic state of the fourth switching signal (SS4); a second current leg coupled to the second output of the current swapping circuit , the second current leg arranged for receiving the second current when sourced from the second output and generating a third leg voltage from the second current in response to a second logic state of the third switching signal (SS3) and a first logic state of the fourth switching signal (SS4), and receiving the first current (I1) when sourced from the second output and generating a fourth leg voltage from the first current (I1) in response to the second logic state of the third switching signal (SS3) and the first logic state of the fourth switching signal (SS4). a current swapping circuit having a first output and a second output , the current swapping circuit arranged for sourcing a first current (I1) from the first output and a second current from the second output in response to a first logic state of a first switching signal (SS1) and a second logic state of a second switching signal (SS2), and sourcing the first current (I1) from the second output and the second current from the first output in response to a second logic state of the first switching signal (SS1) and a first logic state of the second switching signal (SS2); and a first current leg coupled to the first output of the current swapping circuit , the first current leg arranged for receiving the first current (I1) when sourced from the first output and generating a first leg voltage from the first current (I1) in response to a first logic state of a third switching signal (SS3) and a second logic state of a fourth switching signal (SS4), and receiving the second current when sourced from the first output and generating a second leg voltage from the second current in response to the first logic state of the third switching signal (SS3) and the second logic state of the fourth switching signal (SS4); a second current leg coupled to the second output of the current swapping circuit , the second current leg arranged for receiving the second current when sourced from the second output and generating a third leg voltage from the second current in response to a second logic state of the third switching signal (SS3) and a first logic state of the fourth switching signal (SS4), and receiving the first current (I1) when sourced from the second output and generating a fourth leg voltage from the first current (I1) in response to the second logic state of the third switching signal (SS3) and the first logic state of the fourth switching signal (SS4). <EOS>