A processor comprising: a first bounds register to store a first bound value for a stack to be stored in a memory; a second bounds register to store a second bound value for the stack; a checker logic to determine, prior to an exit point at a conclusion of a function to be executed on the processor , whether a value of a stack pointer is within a range between the first bound value and the second bound value; an exception logic to prevent a return to a caller of the function if the stack pointer value is not within the range; characterized by a set of control transfer termination, CTT, instructions including a multi-byte opcode; and a logic to store a random value in a first register prior to a call to the function, and responsive to at least one of the CTT instructions encountered after a control transfer operation that returns from the function, determine whether a CTT instruction is the first instruction encountered following the return from the function and, if the function is validly terminated via a CTT instruction following the return from the function, determine whether a current value of the first register equals the random value, and if so, continue execution of a caller of the function, and otherwise, if the first instruction encountered following the return from the function is not a CTT instruction report a fault to terminate execution, wherein a first CTT instruction of the set of CTT instructions is used to identify valid locations in a program where a control transfer may be validly performed using an indirect CALL or an indirect jump, JMP, instruction, and a second CTT instruction of the set of CTT instructions is used to identify valid locations in a program where a control transfer may be validly performed using a RET instruction. a first bounds register to store a first bound value for a stack to be stored in a memory; a second bounds register to store a second bound value for the stack; a checker logic to determine, prior to an exit point at a conclusion of a function to be executed on the processor , whether a value of a stack pointer is within a range between the first bound value and the second bound value; an exception logic to prevent a return to a caller of the function if the stack pointer value is not within the range; characterized by a set of control transfer termination, CTT, instructions including a multi-byte opcode; and a logic to store a random value in a first register prior to a call to the function, and responsive to at least one of the CTT instructions encountered after a control transfer operation that returns from the function, determine whether a CTT instruction is the first instruction encountered following the return from the function and, if the function is validly terminated via a CTT instruction following the return from the function, determine whether a current value of the first register equals the random value, and if so, continue execution of a caller of the function, and otherwise, if the first instruction encountered following the return from the function is not a CTT instruction report a fault to terminate execution, wherein a first CTT instruction of the set of CTT instructions is used to identify valid locations in a program where a control transfer may be validly performed using an indirect CALL or an indirect jump, JMP, instruction, and a second CTT instruction of the set of CTT instructions is used to identify valid locations in a program where a control transfer may be validly performed using a RET instruction. <EOS>