A display device comprising: a substrate comprising a display area (DA), a peripheral area (PA) outside the display area, and a pad area (PADA) in the peripheral area; a first main voltage line arranged in the peripheral area of the substrate and between an edge of the display area and the pad area, and a first connector extending from the first main voltage line to the pad area; and a second main voltage line arranged in the peripheral area (PA) of the substrate and corresponding to another edge of the display area (DA), and a second connector extending from the second main voltage line to the pad area, wherein each of the first connector and the second connector comprises a structure in which a first conductive layer (M1) and a second conductive layer (M2) are stacked, a first insulating layer is arranged between the first conductive layer (M1) and the second conductive layer (M2), and a second insulating layer is arranged on the second conductive layer, the peripheral area comprises an open area (OA) in which the first insulating layer and the second insulating layer are removed, the open area (OA) surrounding the display area (DA), wherein an end of the first insulating layer directing toward the open area (OA) is covered by an end of the second insulating layer such that the end of the second insulating layer defines a boundary of the open area (OA) extending between the first connector and the second connector, and the first connector and the second connector extend beyond the boundary into the open area such that parts of the first connector and the second connector are exposed in the open area, and the second insulating layer comprises a first portion and a second portion , the second portion being disposed at the boundary of the open area (OA) and extending between the first connector and the second connector , wherein the second portion of the second insulating layer has a thickness less than the thickness of the first portion of the second insulating layer. a substrate comprising a display area (DA), a peripheral area (PA) outside the display area, and a pad area (PADA) in the peripheral area; a first main voltage line arranged in the peripheral area of the substrate and between an edge of the display area and the pad area, and a first connector extending from the first main voltage line to the pad area; and a second main voltage line arranged in the peripheral area (PA) of the substrate and corresponding to another edge of the display area (DA), and a second connector extending from the second main voltage line to the pad area, wherein each of the first connector and the second connector comprises a structure in which a first conductive layer (M1) and a second conductive layer (M2) are stacked, a first insulating layer is arranged between the first conductive layer (M1) and the second conductive layer (M2), and a second insulating layer is arranged on the second conductive layer, the peripheral area comprises an open area (OA) in which the first insulating layer and the second insulating layer are removed, the open area (OA) surrounding the display area (DA), wherein an end of the first insulating layer directing toward the open area (OA) is covered by an end of the second insulating layer such that the end of the second insulating layer defines a boundary of the open area (OA) extending between the first connector and the second connector, and the first connector and the second connector extend beyond the boundary into the open area such that parts of the first connector and the second connector are exposed in the open area, and the second insulating layer comprises a first portion and a second portion , the second portion being disposed at the boundary of the open area (OA) and extending between the first connector and the second connector , wherein the second portion of the second insulating layer has a thickness less than the thickness of the first portion of the second insulating layer. <EOS>