A quad flat package (QFP) comprising: a semiconductor chip ; a paddle to support the semiconductor chip ; a molding portion to surround the semiconductor chip ; a plurality of leads formed on four sides of the molding portion ; and a plurality of bonding wires to electrically connect the plurality of leads to the semiconductor chip , wherein the paddle is exposed to outside from at least one corner of a lower surface of the molding portion , such that the at least one corner of the lower surface consists only of a terminal end of the paddle ; wherein the paddle comprises: a paddle center arranged below the semiconductor chip to support the semiconductor chip ; the at least one paddle terminal end forming the at least one corner of the lower surface of the molding portion ; and at least one paddle connection to connect the paddle center to the at least one paddle terminal end ; and characterized in that the plurality of bonding wires comprises: a first bonding wire that electrically connects a lead that corresponds to the ground among the plurality of leads , to the at least one paddle connection ; and a second bonding wire that electrically connects the paddle center to the semiconductor chip . a semiconductor chip ; a paddle to support the semiconductor chip ; a molding portion to surround the semiconductor chip ; a plurality of leads formed on four sides of the molding portion ; and a plurality of bonding wires to electrically connect the plurality of leads to the semiconductor chip , wherein the paddle is exposed to outside from at least one corner of a lower surface of the molding portion , such that the at least one corner of the lower surface consists only of a terminal end of the paddle ; wherein the paddle comprises: a paddle center arranged below the semiconductor chip to support the semiconductor chip ; the at least one paddle terminal end forming the at least one corner of the lower surface of the molding portion ; and at least one paddle connection to connect the paddle center to the at least one paddle terminal end ; and characterized in that the plurality of bonding wires comprises: a first bonding wire that electrically connects a lead that corresponds to the ground among the plurality of leads , to the at least one paddle connection ; and a second bonding wire that electrically connects the paddle center to the semiconductor chip . a paddle center arranged below the semiconductor chip to support the semiconductor chip ; the at least one paddle terminal end forming the at least one corner of the lower surface of the molding portion ; and at least one paddle connection to connect the paddle center to the at least one paddle terminal end ; and characterized in that the plurality of bonding wires comprises: a first bonding wire that electrically connects a lead that corresponds to the ground among the plurality of leads , to the at least one paddle connection ; and a second bonding wire that electrically connects the paddle center to the semiconductor chip . a first bonding wire that electrically connects a lead that corresponds to the ground among the plurality of leads , to the at least one paddle connection ; and a second bonding wire that electrically connects the paddle center to the semiconductor chip . <EOS>