A demodulator comprising: a pinned photodiode configured to generate majority and minority carriers in response to an incident modulation signal; at least one storage node configured to store the minority carriers generated by the pinned photodiode; and at least one transfer gate connected between the storage node and the pinned photodiode and arranged for being driven by a transfer signal for transferring the minority carriers generated by the pinned photodiode towards the storage node ; the pinned photodiode comprising: an epitaxial semiconductor layer doped with a first dopant (p, n) of a first conductivity type; a semiconductor region doped with a second dopant (n, p) of a second conductivity type opposite to the first conductivity type, formed within the epitaxial semiconductor layer; and a pinning layer highly doped with a third dopant (p+, n+) of the first conductivity type formed on top of the semiconductor region, characterised in that the pinning layer is split into at least two separate regions spaced apart by an electrical insulating element including a Shallow Trench Isolation, each region being arranged for being biased independently by a respective biasing signal for creating a gradient of potential within the semiconductor region . a pinned photodiode configured to generate majority and minority carriers in response to an incident modulation signal; at least one storage node configured to store the minority carriers generated by the pinned photodiode; and at least one transfer gate connected between the storage node and the pinned photodiode and arranged for being driven by a transfer signal for transferring the minority carriers generated by the pinned photodiode towards the storage node ; the pinned photodiode comprising: an epitaxial semiconductor layer doped with a first dopant (p, n) of a first conductivity type; a semiconductor region doped with a second dopant (n, p) of a second conductivity type opposite to the first conductivity type, formed within the epitaxial semiconductor layer; and a pinning layer highly doped with a third dopant (p+, n+) of the first conductivity type formed on top of the semiconductor region, characterised in that the pinning layer is split into at least two separate regions spaced apart by an electrical insulating element including a Shallow Trench Isolation, each region being arranged for being biased independently by a respective biasing signal for creating a gradient of potential within the semiconductor region . an epitaxial semiconductor layer doped with a first dopant (p, n) of a first conductivity type; a semiconductor region doped with a second dopant (n, p) of a second conductivity type opposite to the first conductivity type, formed within the epitaxial semiconductor layer; and a pinning layer highly doped with a third dopant (p+, n+) of the first conductivity type formed on top of the semiconductor region, characterised in that the pinning layer is split into at least two separate regions spaced apart by an electrical insulating element including a Shallow Trench Isolation, each region being arranged for being biased independently by a respective biasing signal for creating a gradient of potential within the semiconductor region . <EOS>