A system comprising: a memory unit ; a first processing unit configured to write data into a memory region of the memory unit ; a second processing unit configured to read data from the memory region; a first control unit configured to control the first processing unit's access to the memory unit ; and a second control unit configured to control the second processing unit's access to the memory unit ; wherein the second control unit is further configured to: obtain, from the first control unit , a first memory address associated with a guarded writing region in the memory region of the memory unit , wherein the first processing unit writes data into the guarded writing region of the memory region of the memory unit using a first memory accessing pattern; receive a read request from the second processing unit , the read request having an associated second memory address; for the second processing unit to read data from the memory region ; delay execution of the read request in response to a determination that the second memory address falls within the guarded writing region; and read data from the memory region based on the read request in response to a determination that the second memory address falls outside of the guarded writing region , wherein the second control unit reads data from the memory region using a second memory accessing pattern different from the first memory accessing pattern. a memory unit ; a first processing unit configured to write data into a memory region of the memory unit ; a second processing unit configured to read data from the memory region; a first control unit configured to control the first processing unit's access to the memory unit ; and a second control unit configured to control the second processing unit's access to the memory unit ; wherein the second control unit is further configured to: obtain, from the first control unit , a first memory address associated with a guarded writing region in the memory region of the memory unit , wherein the first processing unit writes data into the guarded writing region of the memory region of the memory unit using a first memory accessing pattern; receive a read request from the second processing unit , the read request having an associated second memory address; for the second processing unit to read data from the memory region ; delay execution of the read request in response to a determination that the second memory address falls within the guarded writing region; and read data from the memory region based on the read request in response to a determination that the second memory address falls outside of the guarded writing region , wherein the second control unit reads data from the memory region using a second memory accessing pattern different from the first memory accessing pattern. obtain, from the first control unit , a first memory address associated with a guarded writing region in the memory region of the memory unit , wherein the first processing unit writes data into the guarded writing region of the memory region of the memory unit using a first memory accessing pattern; receive a read request from the second processing unit , the read request having an associated second memory address; for the second processing unit to read data from the memory region ; delay execution of the read request in response to a determination that the second memory address falls within the guarded writing region; and read data from the memory region based on the read request in response to a determination that the second memory address falls outside of the guarded writing region , wherein the second control unit reads data from the memory region using a second memory accessing pattern different from the first memory accessing pattern. <EOS>