A solid state drive apparatus comprising: a housing (100; 100a; 100b; 100c; 100d; 100e) having a top cover and a lower cover , an inner space and a plurality of vent channels (110; 110a; 110b; 110c; 110d) penetrating a first vertical side wall (SW1) at a first side of the housing (100; 100a; 100b; 100c; 100d; 100e) and a connector opening penetrating a second vertical side wall (SW2) at a second side of the housing (100; 100a; 100b; 100c; 100d; 100e) opposite the first side of the housing (100; 100a; 100b; 100c; 100d; 100e); and a package substrate module (400; 400a) in the inner space and having a package base substrate (410; 410a) and a plurality of semiconductor chips (420; 420a) mounted on the package base substrate (410; 410a), wherein each of the plurality of vent channels (110; 110a; 110b; 110c; 110d) extends inwardly from an outer surface of the first side wall (SW1) to an inner surface , facing the inner space , of the first side wall (SW1) such that a vertical level of at least a portion of each of the plurality of vent channels (110; 110a; 110b; 110c; 110d) varies between the outer surface and the inner surface , wherein the housing (100; 100a; 100b; 100c; 100d; 100e) has an outer side portion (112; 112a; 112b; 112c; 112d) defining a first side of each of the plurality of vent channels (110; 110a; 110b; 110c; 110d) and an inner side portion (114; 114a; 114b; 114c; 114d) defining a second side of each of the plurality of vent channels (110; 110a; 110b; 110c; 110d), and wherein the vertical level of each of the plurality of vent channels (110; 110a; 110b; 110c; 110d) increases from the outer side portion (112; 112a; 112b; 112c; 112d) toward the inner side portion (114; 114a; 114b; 114c; 114d) of the housing (100; 100a; 100b; 100c; 100d; 100e). a housing (100; 100a; 100b; 100c; 100d; 100e) having a top cover and a lower cover , an inner space and a plurality of vent channels (110; 110a; 110b; 110c; 110d) penetrating a first vertical side wall (SW1) at a first side of the housing (100; 100a; 100b; 100c; 100d; 100e) and a connector opening penetrating a second vertical side wall (SW2) at a second side of the housing (100; 100a; 100b; 100c; 100d; 100e) opposite the first side of the housing (100; 100a; 100b; 100c; 100d; 100e); and a package substrate module (400; 400a) in the inner space and having a package base substrate (410; 410a) and a plurality of semiconductor chips (420; 420a) mounted on the package base substrate (410; 410a), wherein each of the plurality of vent channels (110; 110a; 110b; 110c; 110d) extends inwardly from an outer surface of the first side wall (SW1) to an inner surface , facing the inner space , of the first side wall (SW1) such that a vertical level of at least a portion of each of the plurality of vent channels (110; 110a; 110b; 110c; 110d) varies between the outer surface and the inner surface , wherein the housing (100; 100a; 100b; 100c; 100d; 100e) has an outer side portion (112; 112a; 112b; 112c; 112d) defining a first side of each of the plurality of vent channels (110; 110a; 110b; 110c; 110d) and an inner side portion (114; 114a; 114b; 114c; 114d) defining a second side of each of the plurality of vent channels (110; 110a; 110b; 110c; 110d), and wherein the vertical level of each of the plurality of vent channels (110; 110a; 110b; 110c; 110d) increases from the outer side portion (112; 112a; 112b; 112c; 112d) toward the inner side portion (114; 114a; 114b; 114c; 114d) of the housing (100; 100a; 100b; 100c; 100d; 100e). <EOS>