A semiconductor device , comprising: a semiconductor substrate comprising a first surface in which an integrated circuit , an I/O pad electrically connected to the integrated circuit, a color filter layer comprising, in a region in which pixels of a solid-state imaging element of the integrated circuit are formed, an RGB color filter corresponding to each of the pixels and a passivation layer , and a condensing micro-lens array formed at a place corresponding to the solid-state imaging element on the color filter layer , are formed, and a second surface which is an opposite side to the first surface; a transparent glass substrate ; a cavity dam formed on the transparent glass substrate and serving as a spacer surrounding the peripheries of the condensing micro-lens array and the color filter layer , wherein a two-stage through-hole is formed in the semiconductor substrate , the two-stage through hole comprising a first shape portion formed in the semiconductor substrate and having a tapered shape which has a wall surface and of which a diameter of an opening becomes smaller toward a bottom of the hole from the second surface side to a predetermined position of the semiconductor substrate in a thickness direction, and comprising a second shape portion formed in the semiconductor substrate and having a perpendicular cylindrical shape which extends from the first shape portion to the I/O pad on the first surface side; an inorganic insulating film which is formed on the wall surface of the two-stage through-hole and the second surface; a through-electrode of a metal layer which is formed on the I/O pad and the wall surface of the two-stage through-hole , wherein the inorganic insulating film is formed with a thickness allowing penetration to the I/O pad by exposing the I/O pad from the inorganic insulating film by an overall etching process without using a resist mask; and a wiring pattern formed on the second surface and connected to the through-electrode . a semiconductor substrate comprising a first surface in which an integrated circuit , an I/O pad electrically connected to the integrated circuit, a color filter layer comprising, in a region in which pixels of a solid-state imaging element of the integrated circuit are formed, an RGB color filter corresponding to each of the pixels and a passivation layer , and a condensing micro-lens array formed at a place corresponding to the solid-state imaging element on the color filter layer , are formed, and a second surface which is an opposite side to the first surface; a transparent glass substrate ; a cavity dam formed on the transparent glass substrate and serving as a spacer surrounding the peripheries of the condensing micro-lens array and the color filter layer , wherein a two-stage through-hole is formed in the semiconductor substrate , the two-stage through hole comprising a first shape portion formed in the semiconductor substrate and having a tapered shape which has a wall surface and of which a diameter of an opening becomes smaller toward a bottom of the hole from the second surface side to a predetermined position of the semiconductor substrate in a thickness direction, and comprising a second shape portion formed in the semiconductor substrate and having a perpendicular cylindrical shape which extends from the first shape portion to the I/O pad on the first surface side; an inorganic insulating film which is formed on the wall surface of the two-stage through-hole and the second surface; a through-electrode of a metal layer which is formed on the I/O pad and the wall surface of the two-stage through-hole , wherein the inorganic insulating film is formed with a thickness allowing penetration to the I/O pad by exposing the I/O pad from the inorganic insulating film by an overall etching process without using a resist mask; and a wiring pattern formed on the second surface and connected to the through-electrode . <EOS>