An organic light emitting diode display device , comprising: a substrate including a plurality of sub-pixels (SP) classified into a plurality of horizontal pixel lines (PR1, PR2, PR3, PR4); a gate line (GL) and a sensing line (SL) spaced apart from each other on the substrate ; a data line (DL) and a power line (PL) crossing the gate line (GL) and the sensing line (SL) and spaced apart from each other; and first and second reference lines (RL1, RL2) supplying first and second reference voltages (REF1, REF2), respectively, and connected to adjacent two, respectively, of the plurality of horizontal pixel lines, characterized in that the display device is configured to supply the first reference voltage (REF1) to the plurality of sub-pixels (SP) in odd ones of the plurality of horizontal pixel lines (PR1, PR2, PR3, PR4) through the first reference line (RL1), and configured to supply the second reference voltage (REF2) to the plurality of sub-pixels (SP) in even ones of the plurality of horizontal pixel lines (PR1, PR2, PR3, PR4) through the second reference line (RL2), wherein the plurality of horizontal pixel lines (PR1, PR2, PR3, PR4) include (n)th, (n+1)th and (n+2)th horizontal pixel lines, means for providing that turn-on sections of sensing voltages (SENS) supplied to the (n)th and (n+1)th horizontal pixel lines overlap each other, and the turn-on sections of the sensing voltages (SENS) supplied to the (n+1)th and (n+2)th horizontal pixel lines are separated from each other, and wherein the first reference voltage (REF1) is supplied to the plurality of sub-pixels (SP) in the (n)th horizontal pixel line through the first reference line (RL1), and the second reference voltage (REF2) is supplied to the plurality of sub-pixels (SP) in the (n+1)th horizontal pixel line through the second reference line (RL2). a substrate including a plurality of sub-pixels (SP) classified into a plurality of horizontal pixel lines (PR1, PR2, PR3, PR4); a gate line (GL) and a sensing line (SL) spaced apart from each other on the substrate ; a data line (DL) and a power line (PL) crossing the gate line (GL) and the sensing line (SL) and spaced apart from each other; and first and second reference lines (RL1, RL2) supplying first and second reference voltages (REF1, REF2), respectively, and connected to adjacent two, respectively, of the plurality of horizontal pixel lines, characterized in that the display device is configured to supply the first reference voltage (REF1) to the plurality of sub-pixels (SP) in odd ones of the plurality of horizontal pixel lines (PR1, PR2, PR3, PR4) through the first reference line (RL1), and configured to supply the second reference voltage (REF2) to the plurality of sub-pixels (SP) in even ones of the plurality of horizontal pixel lines (PR1, PR2, PR3, PR4) through the second reference line (RL2), wherein the plurality of horizontal pixel lines (PR1, PR2, PR3, PR4) include (n)th, (n+1)th and (n+2)th horizontal pixel lines, means for providing that turn-on sections of sensing voltages (SENS) supplied to the (n)th and (n+1)th horizontal pixel lines overlap each other, and the turn-on sections of the sensing voltages (SENS) supplied to the (n+1)th and (n+2)th horizontal pixel lines are separated from each other, and wherein the first reference voltage (REF1) is supplied to the plurality of sub-pixels (SP) in the (n)th horizontal pixel line through the first reference line (RL1), and the second reference voltage (REF2) is supplied to the plurality of sub-pixels (SP) in the (n+1)th horizontal pixel line through the second reference line (RL2). <EOS>