An integrated circuit (10; 60; 70) comprising: a first ground plane (22; 26) associated with a first set of circuits that have a first operational temperature requirement; a second ground plane (26; 76) associated with a second set of circuits that have a second operational temperature requirement that is higher than the first operational temperature requirement, the second ground plane (26; 76) being substantially thermally isolated from the first ground plane (22; 26); and a superconducting coupler (34; 84) that electrically couples the first ground plane (22; 26) and the second ground plane (26; 76) while maintaining relative thermal isolation between the first ground plane (22; 26) and the second ground plane (26; 76); characterized in that the integrated circuit further comprises: a thermal sink layer (12; 62); a first thermally conductive via (32; 82) that couples the first ground plane (22; 26) to the thermal sink layer (12; 62); and a second thermally conductive via (30; 80) that couples the second ground plane (26; 76) to the thermal sink layer (12; 62), wherein the first thermally conductive via (32; 82) has an appropriate volume of thermal conductive material greater than a volume of thermal conductive material of the second thermally conductive via (30; 80), proportional to respective heat loads of the first and second sets of circuits, to remove heat from the first set of circuits with less gradient than the second set of circuits . a first ground plane (22; 26) associated with a first set of circuits that have a first operational temperature requirement; a second ground plane (26; 76) associated with a second set of circuits that have a second operational temperature requirement that is higher than the first operational temperature requirement, the second ground plane (26; 76) being substantially thermally isolated from the first ground plane (22; 26); and a superconducting coupler (34; 84) that electrically couples the first ground plane (22; 26) and the second ground plane (26; 76) while maintaining relative thermal isolation between the first ground plane (22; 26) and the second ground plane (26; 76); characterized in that the integrated circuit further comprises: a thermal sink layer (12; 62); a first thermally conductive via (32; 82) that couples the first ground plane (22; 26) to the thermal sink layer (12; 62); and a second thermally conductive via (30; 80) that couples the second ground plane (26; 76) to the thermal sink layer (12; 62), wherein the first thermally conductive via (32; 82) has an appropriate volume of thermal conductive material greater than a volume of thermal conductive material of the second thermally conductive via (30; 80), proportional to respective heat loads of the first and second sets of circuits, to remove heat from the first set of circuits with less gradient than the second set of circuits . a thermal sink layer (12; 62); a first thermally conductive via (32; 82) that couples the first ground plane (22; 26) to the thermal sink layer (12; 62); and a second thermally conductive via (30; 80) that couples the second ground plane (26; 76) to the thermal sink layer (12; 62), wherein the first thermally conductive via (32; 82) has an appropriate volume of thermal conductive material greater than a volume of thermal conductive material of the second thermally conductive via (30; 80), proportional to respective heat loads of the first and second sets of circuits, to remove heat from the first set of circuits with less gradient than the second set of circuits . <EOS>