Agate drive circuit for a power transistor , the gate drive circuit comprising: a first capacitor (C1), a first terminal (T11) of the first capacitor (C1) being electrically coupled to a gate terminal (G) of the power transistor , a first switch (SW1) being arranged between a second terminal (T21) of the first capacitor (C1) and a first predetermined voltage (Vp1), a measurement circuit for measuring a differential voltage across the first capacitor (C1), a reference source for generating a reference voltage (Vref), a second capacitor (C2), a first terminal (T12) of the second capacitor (C2) being electrically coupled to the second terminal (T21) of the first capacitor (C1), a second terminal (T22) of the second capacitor (C2) being electrically coupled to a control terminal of the first switch (SW1), a pre-charge circuit being configured to generate a boost voltage (Vboost) at the second terminal (T21) of the first capacitor (C1) during the pre-charge of the first capacitor (C1), the gate drive circuit being configured to pre-charge the first capacitor (C1) to obtain a second predetermined voltage (Vp2) across the first capacitor (C1), the gate drive circuit being further configured to arrange the first switch (SW1) in an on state for turning on the power transistor to electrically couple the first predetermined voltage (Vp1) to the second terminal (T21) of the first capacitor (C1) being pre-charged at the second predetermined voltage (Vp2), the measurement circuit being configured to arrange the first switch (SW1) in an off state when the differential voltage across the first capacitor (C1) has changed with respect to the second predetermined voltage (Vp2) by the reference voltage (Vref). a first capacitor (C1), a first terminal (T11) of the first capacitor (C1) being electrically coupled to a gate terminal (G) of the power transistor , a first switch (SW1) being arranged between a second terminal (T21) of the first capacitor (C1) and a first predetermined voltage (Vp1), a measurement circuit for measuring a differential voltage across the first capacitor (C1), a reference source for generating a reference voltage (Vref), a second capacitor (C2), a first terminal (T12) of the second capacitor (C2) being electrically coupled to the second terminal (T21) of the first capacitor (C1), a second terminal (T22) of the second capacitor (C2) being electrically coupled to a control terminal of the first switch (SW1), a pre-charge circuit being configured to generate a boost voltage (Vboost) at the second terminal (T21) of the first capacitor (C1) during the pre-charge of the first capacitor (C1), the gate drive circuit being configured to pre-charge the first capacitor (C1) to obtain a second predetermined voltage (Vp2) across the first capacitor (C1), the gate drive circuit being further configured to arrange the first switch (SW1) in an on state for turning on the power transistor to electrically couple the first predetermined voltage (Vp1) to the second terminal (T21) of the first capacitor (C1) being pre-charged at the second predetermined voltage (Vp2), the measurement circuit being configured to arrange the first switch (SW1) in an off state when the differential voltage across the first capacitor (C1) has changed with respect to the second predetermined voltage (Vp2) by the reference voltage (Vref). <EOS>