A method for performing a secure boot of a data processing system , the method comprising: processing a command issued from a processor of the data processing system , the command directed to a memory ; determining that the command is a command that causes the memory to be modified; incrementing a first counter value of a first counter in response to the determining that the command is a command that causes the memory to be modified; setting a modification flag to a first logic state in response to incrementing the first counter , wherein the set modification flag indicating that the memory has been modified so that the first counter is not incremented for subsequent modification commands, such that the first counter value indicates how many boot cycles include reception of a modification command by the memory controller ; determining that the first counter value of the first counter is not equal to a second counter value of a second counter ; and performing cryptographic verification of the memory in response to the first and second counter values not being equal, otherwise continuing with the secure boot process if the first and second counter values are equal; incrementing the second counter in response to the cryptographic verification of the memory being successful, such that the second counter value indicates how many times the memory has been cryptographically verified; resetting the modification flag to a second logic state in response to a subsequent restart of the data processing system ; and wherein the first counter is under the control of a memory controller of the memory and the second counter is under the control of the processor . processing a command issued from a processor of the data processing system , the command directed to a memory ; determining that the command is a command that causes the memory to be modified; incrementing a first counter value of a first counter in response to the determining that the command is a command that causes the memory to be modified; setting a modification flag to a first logic state in response to incrementing the first counter , wherein the set modification flag indicating that the memory has been modified so that the first counter is not incremented for subsequent modification commands, such that the first counter value indicates how many boot cycles include reception of a modification command by the memory controller ; determining that the first counter value of the first counter is not equal to a second counter value of a second counter ; and performing cryptographic verification of the memory in response to the first and second counter values not being equal, otherwise continuing with the secure boot process if the first and second counter values are equal; incrementing the second counter in response to the cryptographic verification of the memory being successful, such that the second counter value indicates how many times the memory has been cryptographically verified; resetting the modification flag to a second logic state in response to a subsequent restart of the data processing system ; and wherein the first counter is under the control of a memory controller of the memory and the second counter is under the control of the processor . <EOS>