An apparatus comprising a block-based processor , wherein the block-based processor is configured to execute atomic blocks of instructions according to an instruction set architecture, the block-based processor comprising: an instruction scheduler configured to issue at least one instruction; and one or more custom function blocks , the custom function blocks being configured to receive one or more input operands for the at least one instruction, which is not directly supported by the block-based processor's instruction set architecture, ISA, perform a custom function indicated by the at least one instruction, and generate an instruction completion signal indicating completion of the custom function performed by the respective function block, characterized in that : the block-based processor is configured to: initiate execution of an instruction block containing a plurality of instructions encoded according to the block-based processor instruction set, wherein the instruction block comprises a block header encoding data indicating that the instruction block contains instructions to execute particular custom instructions that require a custom function block to be configured; load a configuration bitstream by the block-based processor in response to executing said instruction block specifying the use of the custom function block. wherein the configuration bitstream comprises configuration information for configuring the custom function block; and execute one of the instructions of said instruction block, the executed instruction specifying use of the custom function block implemented with the configurable logic device. an instruction scheduler configured to issue at least one instruction; and one or more custom function blocks , the custom function blocks being configured to receive one or more input operands for the at least one instruction, which is not directly supported by the block-based processor's instruction set architecture, ISA, perform a custom function indicated by the at least one instruction, and generate an instruction completion signal indicating completion of the custom function performed by the respective function block, characterized in that : the block-based processor is configured to: initiate execution of an instruction block containing a plurality of instructions encoded according to the block-based processor instruction set, wherein the instruction block comprises a block header encoding data indicating that the instruction block contains instructions to execute particular custom instructions that require a custom function block to be configured; load a configuration bitstream by the block-based processor in response to executing said instruction block specifying the use of the custom function block. wherein the configuration bitstream comprises configuration information for configuring the custom function block; and execute one of the instructions of said instruction block, the executed instruction specifying use of the custom function block implemented with the configurable logic device. initiate execution of an instruction block containing a plurality of instructions encoded according to the block-based processor instruction set, wherein the instruction block comprises a block header encoding data indicating that the instruction block contains instructions to execute particular custom instructions that require a custom function block to be configured; load a configuration bitstream by the block-based processor in response to executing said instruction block specifying the use of the custom function block. wherein the configuration bitstream comprises configuration information for configuring the custom function block; and execute one of the instructions of said instruction block, the executed instruction specifying use of the custom function block implemented with the configurable logic device. <EOS>