A semiconductor device, comprising: first to M-th semiconductor dies (210_1 to 210_M) stacked in a first direction (D3), each of the first to M-th semiconductor dies (210_1 to 210_M) including: a substrate ; first to K-th through silicon vias (230_1 to 230_K) passing through the substrate in the first direction (D3), wherein each of "M" and "K" is independently an integer of 2 or more; and a first circuit provided with a voltage (VDD) and a current through a power supply line electrically connected to the first through silicon via (230_1), wherein an (N+1)-th semiconductor die (210_N+1) of the first to M-th semiconductor dies (210_1 to 210_M) is stacked on an N-th semiconductor die (210_N) of the first to M-th semiconductor dies (210_1 to 210_M), "N" being an integer that is not less than 1 and is not more than (M-1), wherein each of the first to K-th through silicon vias (230_1 to 230_K) of the N-th semiconductor die (210_N) is electrically connected to a corresponding through silicon via of the first to K-th through silicon vias (230_1 to 230_K) of the (N+1)-th semiconductor die (210_N+1) that is spaced apart therefrom when seen in a plan view, and wherein the first to K-th through silicon vias (230_1 to 230_K) of the first semiconductor die (210_1) are connected to a power source supplying the voltage (VDD) and the current, and characterized in that for the each of the first to M-th semiconductor dies (210_1 to 210_M): the first to K-th through silicon vias (230_1 to 230_K) are divided into first to G-th groups ((230_1, 230_2), (230_3, 230_4), (230_5, 230_6), (230_7, 230_K)), wherein "G" is an integer that is not less than 2 and not more than (K-1), and each group of the first to G-th groups ((230_1, 230_2), (230_3, 230_4), (230_5, 230_6), (230_7, 230_K)) includes at least two through silicon vias which are electrically connected to each other, through silicon vias included in any one group not being electrically connected to through silicon vias included in another group. a substrate ; first to K-th through silicon vias (230_1 to 230_K) passing through the substrate in the first direction (D3), wherein each of "M" and "K" is independently an integer of 2 or more; and a first circuit provided with a voltage (VDD) and a current through a power supply line electrically connected to the first through silicon via (230_1), wherein an (N+1)-th semiconductor die (210_N+1) of the first to M-th semiconductor dies (210_1 to 210_M) is stacked on an N-th semiconductor die (210_N) of the first to M-th semiconductor dies (210_1 to 210_M), "N" being an integer that is not less than 1 and is not more than (M-1), wherein each of the first to K-th through silicon vias (230_1 to 230_K) of the N-th semiconductor die (210_N) is electrically connected to a corresponding through silicon via of the first to K-th through silicon vias (230_1 to 230_K) of the (N+1)-th semiconductor die (210_N+1) that is spaced apart therefrom when seen in a plan view, and wherein the first to K-th through silicon vias (230_1 to 230_K) of the first semiconductor die (210_1) are connected to a power source supplying the voltage (VDD) and the current, and characterized in that for the each of the first to M-th semiconductor dies (210_1 to 210_M): the first to K-th through silicon vias (230_1 to 230_K) are divided into first to G-th groups ((230_1, 230_2), (230_3, 230_4), (230_5, 230_6), (230_7, 230_K)), wherein "G" is an integer that is not less than 2 and not more than (K-1), and each group of the first to G-th groups ((230_1, 230_2), (230_3, 230_4), (230_5, 230_6), (230_7, 230_K)) includes at least two through silicon vias which are electrically connected to each other, through silicon vias included in any one group not being electrically connected to through silicon vias included in another group. <EOS>