A device for executing a matrix multiplication operation, comprising: a controlling unit, configured to decode a matrix operation instruction and control operation process of the matrix operation instruction; and a matrix operation unit connected with said controlling unit; said matrix operation unit is, configured to receive the decoded matrix operation instruction and an inputting matrix, and perform a matrix multiplication operation on the inputting matrix according to the decoded matrix operation instruction; the matrix operation unit being a customized hardware circuit; wherein the matrix operation unit comprises a main operation unit and a plurality of slave operation units; each of the plurality of slave operation units is configured to implement a vector dot product operation, and the vector dot product operation comprises an element-wise multiplication of two vectors and a summation of the multiplication results; wherein each slave operation unit comprises a vector element-wise multiplication unit, an addition tree unit, and an accumulation unit; the vector element-wise multiplication unit is configured to perform an element-wise multiplication of the two vectors, the addition tree unit is configured to add result vectors of the element-wise multiplication to obtain a number, and the accumulation unit is configured to accumulate results of the addition tree unit; wherein the main operation unit comprises a vector element-wise multiplication unit, an addition tree unit, and an accumulation unit; the vector element-wise multiplication unit is configured to perform an element-wise multiplication of the two vectors, the addition tree unit is configured to add result vectors of the element-wise multiplication to obtain a number, and the accumulation unit is configured to accumulate results of the addition tree unit. a controlling unit, configured to decode a matrix operation instruction and control operation process of the matrix operation instruction; and a matrix operation unit connected with said controlling unit; said matrix operation unit is, configured to receive the decoded matrix operation instruction and an inputting matrix, and perform a matrix multiplication operation on the inputting matrix according to the decoded matrix operation instruction; the matrix operation unit being a customized hardware circuit; wherein the matrix operation unit comprises a main operation unit and a plurality of slave operation units; each of the plurality of slave operation units is configured to implement a vector dot product operation, and the vector dot product operation comprises an element-wise multiplication of two vectors and a summation of the multiplication results; wherein each slave operation unit comprises a vector element-wise multiplication unit, an addition tree unit, and an accumulation unit; the vector element-wise multiplication unit is configured to perform an element-wise multiplication of the two vectors, the addition tree unit is configured to add result vectors of the element-wise multiplication to obtain a number, and the accumulation unit is configured to accumulate results of the addition tree unit; wherein the main operation unit comprises a vector element-wise multiplication unit, an addition tree unit, and an accumulation unit; the vector element-wise multiplication unit is configured to perform an element-wise multiplication of the two vectors, the addition tree unit is configured to add result vectors of the element-wise multiplication to obtain a number, and the accumulation unit is configured to accumulate results of the addition tree unit. <EOS>