A pixel circuit comprising: a preset unit , a compensation unit , a data writing unit , a driving unit , an energy storage unit , a light emitting unit , a first scanning signal terminal (S1), a second scanning signal terminal (S2), a third scanning signal terminal (S3), a control signal terminal (EM), a data signal terminal (Data), a first electric level terminal (V1), and a second electric level terminal (V2), wherein the preset unit is connected to the first scanning signal terminal (S1), a first node (a), a second node (b), a third node (c) and the second electric level terminal (V2), and is configured to connect the first node (a) and the third node (c) to the second electric level terminal (V2), and to connect the first scanning signal terminal (S1) to the second node (b), under the control of a signal of the first scanning signal terminal (S1), wherein the compensation unit is connected to the second scanning signal terminal (S2), the first node (a), the second node (b), the third node (c), a fourth node (d) and the second electric level terminal (V2), and is configured to connect the first node (a) and the third node (c) to the second electric level terminal (V2), and to connect the fourth node (d) to the second node (b), under the control of a signal of the second scanning signal terminal (S2), wherein the data writing unit is connected to the third scanning signal terminal (S3), the data signal terminal (Data) and the first node (a), and is configured to connect the data signal terminal (Data) to the first node (a) under the control of a signal of the third scanning signal terminal (S3), wherein the energy storage unit is connected to the first node (a) and the second node (b), and is configured to store a voltage between the first node (a) and the second node (b), wherein the driving unit is connected to the second node (b), the third node (c) and the fourth node (d), and is configured to output a driving signal to the third node (c) under the control of the voltage between the second node (b) and the third node (c), wherein the light emitting unit comprises a light emission control unit and a light emitting component, and wherein the light emission control unit is connected to the control signal terminal (EM), the third node (c), the fourth node (d), the first electric level terminal (V1) and the light emitting component, the light emitting component is connected to the light emission control unit and the second electric level terminal (V2), the light emission control unit is configured to connect the first electric level terminal (V1) to the fourth node (d) and to connect the third node (c) to the light emitting component under the control of the signal of the control signal terminal (EM), the light emitting component is configured to emit light under the control of the driving signal and a signal of the second electric level terminal (V2); wherein the driving unit comprises a second transistor (M2), and wherein a control electrode of the second transistor (M2) is connected to the second node (b), a first terminal of the second transistor (M2) is connected to the fourth node (d), and a second terminal of the second (M2) transistor is connected to the third node (c). <EOS>