A light sensor , comprising a semiconductor substrate and a pixel array disposed on the semiconductor substrate , wherein the pixel array comprises a plurality of pixels, and the semiconductor substrate comprises a first surface and a second surface opposite to the first surface , wherein each of the pixels comprises: a photodiode (PD), disposed at the semiconductor substrate and adjacent to the first surface , and configured to sense light to generate charges; a first floating diffusion region (FDN1), disposed in the semiconductor substrate and adjacent to the first surface , and configured to collect the charges during a sampling operation; a first gate (G1), disposed on the semiconductor substrate , and configured to selectively control the charges to enter the first floating diffusion region (FDN1); wherein the photodiode (PD) has a first terminal and a second terminal , wherein the first terminal faces the first floating diffusion region (FDN1), and the second terminal faces away from the first floating diffusion region (FDN1), characterized in that each of the pixels further comprises: a PIN diode made of polysilicon material, disposed on the photodiode (PD), wherein the PIN diode has an N-type region , an intrinsic region , and a P-type region , wherein the N-type region is closer to the first floating diffusion region (FDN1) than the P-type region is; the PIN diode is reverse-biased so that the electrical potential of the first terminal of the photodiode (PD) is higher than that of the second terminal ; and the PIN diode at least partially overlaps with the photodiode (PD) as viewed from the first surface of the semiconductor substrate to the second surface , in a direction perpendicular to the first surface . a photodiode (PD), disposed at the semiconductor substrate and adjacent to the first surface , and configured to sense light to generate charges; a first floating diffusion region (FDN1), disposed in the semiconductor substrate and adjacent to the first surface , and configured to collect the charges during a sampling operation; a first gate (G1), disposed on the semiconductor substrate , and configured to selectively control the charges to enter the first floating diffusion region (FDN1); wherein the photodiode (PD) has a first terminal and a second terminal , wherein the first terminal faces the first floating diffusion region (FDN1), and the second terminal faces away from the first floating diffusion region (FDN1), characterized in that each of the pixels further comprises: a PIN diode made of polysilicon material, disposed on the photodiode (PD), wherein the PIN diode has an N-type region , an intrinsic region , and a P-type region , wherein the N-type region is closer to the first floating diffusion region (FDN1) than the P-type region is; the PIN diode is reverse-biased so that the electrical potential of the first terminal of the photodiode (PD) is higher than that of the second terminal ; and the PIN diode at least partially overlaps with the photodiode (PD) as viewed from the first surface of the semiconductor substrate to the second surface , in a direction perpendicular to the first surface . a PIN diode made of polysilicon material, disposed on the photodiode (PD), wherein the PIN diode has an N-type region , an intrinsic region , and a P-type region , wherein the N-type region is closer to the first floating diffusion region (FDN1) than the P-type region is; the PIN diode is reverse-biased so that the electrical potential of the first terminal of the photodiode (PD) is higher than that of the second terminal ; and the PIN diode at least partially overlaps with the photodiode (PD) as viewed from the first surface of the semiconductor substrate to the second surface , in a direction perpendicular to the first surface . <EOS>