A non-transitory computer readable storage medium configured to store instructions, the instructions when executed by a processor cause the processor to: receive a specification for a design of an electronic circuit; parse the specification to identify one or more sentences, each sentence specifying a condition for the design of the electronic circuit to satisfy; for each sentence of the one or more identified sentences, determine whether the sentence is translatable, wherein said determining comprises: applying a plurality of weak learners, each weak learner receiving a set of tokens extracted from the sentence and outputs a binary label; applying a binary classifier based on the binary labels for each of the plurality of weak learners; and responsive to determining that a target sentence is translatable: generate a parse tree for the target sentence; generate a probabilistic shift-reduce schedule for the generated parse tree, wherein the probabilistic shift-reduce schedule includes a sequence of shift-reduce actions; and generate code by parsing the target sentence using the generated probabilistic shift-reduce schedule, the code being used to verify the condition specified in the target sentence, wherein after the verification the design of the electronic circuit is finalized and taped-out. receive a specification for a design of an electronic circuit; parse the specification to identify one or more sentences, each sentence specifying a condition for the design of the electronic circuit to satisfy; for each sentence of the one or more identified sentences, determine whether the sentence is translatable, wherein said determining comprises: applying a plurality of weak learners, each weak learner receiving a set of tokens extracted from the sentence and outputs a binary label; applying a binary classifier based on the binary labels for each of the plurality of weak learners; and applying a plurality of weak learners, each weak learner receiving a set of tokens extracted from the sentence and outputs a binary label; applying a binary classifier based on the binary labels for each of the plurality of weak learners; and responsive to determining that a target sentence is translatable: generate a parse tree for the target sentence; generate a probabilistic shift-reduce schedule for the generated parse tree, wherein the probabilistic shift-reduce schedule includes a sequence of shift-reduce actions; and generate code by parsing the target sentence using the generated probabilistic shift-reduce schedule, the code being used to verify the condition specified in the target sentence, wherein after the verification the design of the electronic circuit is finalized and taped-out. generate a parse tree for the target sentence; generate a probabilistic shift-reduce schedule for the generated parse tree, wherein the probabilistic shift-reduce schedule includes a sequence of shift-reduce actions; and generate code by parsing the target sentence using the generated probabilistic shift-reduce schedule, the code being used to verify the condition specified in the target sentence, wherein after the verification the design of the electronic circuit is finalized and taped-out. <EOS>