A system comprising: a display ; a controller ; a buffer; an interface to receive a header byte of a secondary data packet from a source , wherein the secondary data packet is in compliance with a DisplayPort specification, the header byte including a first bit, a second bit and a third bit, wherein: the first bit indicates to the display whether to enter a self refresh display mode, the second bit indicates to the display whether to store a frame for display into the buffer by indicating whether a frame sent to the display is an updated frame changed from a previously sent frame, and the third bit indicates whether a main link between the source and the display is to remain in a normal state or is to enter a standby state; and the controller is operable to perform commands responsive to respective values of the first, second and third bits, wherein the command responsive to the value of the first bit causes the display to enter the self refresh display mode wherein a frame is captured in the buffer and repeatedly output to the display , the command responsive to the value of the second bit causes the display to wake up, store the updated frame in the buffer, return to the low power state and use the updated frame for the self refresh display mode, and the command responsive to the value of the third bit causes the display to reduce power of the main link. a display ; a controller ; a buffer; an interface to receive a header byte of a secondary data packet from a source , wherein the secondary data packet is in compliance with a DisplayPort specification, the header byte including a first bit, a second bit and a third bit, wherein: the first bit indicates to the display whether to enter a self refresh display mode, the second bit indicates to the display whether to store a frame for display into the buffer by indicating whether a frame sent to the display is an updated frame changed from a previously sent frame, and the third bit indicates whether a main link between the source and the display is to remain in a normal state or is to enter a standby state; and the controller is operable to perform commands responsive to respective values of the first, second and third bits, wherein the command responsive to the value of the first bit causes the display to enter the self refresh display mode wherein a frame is captured in the buffer and repeatedly output to the display , the command responsive to the value of the second bit causes the display to wake up, store the updated frame in the buffer, return to the low power state and use the updated frame for the self refresh display mode, and the command responsive to the value of the third bit causes the display to reduce power of the main link. the first bit indicates to the display whether to enter a self refresh display mode, the second bit indicates to the display whether to store a frame for display into the buffer by indicating whether a frame sent to the display is an updated frame changed from a previously sent frame, and the third bit indicates whether a main link between the source and the display is to remain in a normal state or is to enter a standby state; and the controller is operable to perform commands responsive to respective values of the first, second and third bits, wherein the command responsive to the value of the first bit causes the display to enter the self refresh display mode wherein a frame is captured in the buffer and repeatedly output to the display , the command responsive to the value of the second bit causes the display to wake up, store the updated frame in the buffer, return to the low power state and use the updated frame for the self refresh display mode, and the command responsive to the value of the third bit causes the display to reduce power of the main link. <EOS>