A semiconductor device, comprising: a substrate ; and a plurality of capacitor elements on the substrate , wherein each capacitor element comprises: a first electrode comprising a first pad and first terminals connected to the first pad , wherein the first terminals extend vertically and in a direction perpendicular away from the substrate ; and a second electrode comprising a second pad and second terminals connected to the second pad , wherein the second terminals extend vertically and in a direction perpendicular toward the substrate , wherein the first terminals and the second terminals are staggered in an interdigitating manner and are separated by an interlayer dielectric layer ; and wherein the plurality of capacitor elements are successively stacked on the substrate , wherein the first pad of a lower one of the capacitor elements is connected to the second pad of an upper one of the capacitor elements ; and wherein the second pad of the lower one of the capacitor elements is connected to the first pad of the upper one of the capacitor elements , characterized in that the semiconductor device further comprises a further plurality of capacitor elements on the opposite surface of the substrate ; a first IC element disposed above the plurality of capacitor elements on an upper surface of the substrate ; and a second IC element disposed below the further plurality of capacitor elements under a lower surface of the substrate . a substrate ; and a plurality of capacitor elements on the substrate , wherein each capacitor element comprises: a first electrode comprising a first pad and first terminals connected to the first pad , wherein the first terminals extend vertically and in a direction perpendicular away from the substrate ; and a second electrode comprising a second pad and second terminals connected to the second pad , wherein the second terminals extend vertically and in a direction perpendicular toward the substrate , wherein the first terminals and the second terminals are staggered in an interdigitating manner and are separated by an interlayer dielectric layer ; and wherein the plurality of capacitor elements are successively stacked on the substrate , wherein the first pad of a lower one of the capacitor elements is connected to the second pad of an upper one of the capacitor elements ; and wherein the second pad of the lower one of the capacitor elements is connected to the first pad of the upper one of the capacitor elements , a first electrode comprising a first pad and first terminals connected to the first pad , wherein the first terminals extend vertically and in a direction perpendicular away from the substrate ; and a second electrode comprising a second pad and second terminals connected to the second pad , wherein the second terminals extend vertically and in a direction perpendicular toward the substrate , wherein the first terminals and the second terminals are staggered in an interdigitating manner and are separated by an interlayer dielectric layer ; and wherein the plurality of capacitor elements are successively stacked on the substrate , wherein the first pad of a lower one of the capacitor elements is connected to the second pad of an upper one of the capacitor elements ; and wherein the second pad of the lower one of the capacitor elements is connected to the first pad of the upper one of the capacitor elements , characterized in that the semiconductor device further comprises a further plurality of capacitor elements on the opposite surface of the substrate ; a first IC element disposed above the plurality of capacitor elements on an upper surface of the substrate ; and a second IC element disposed below the further plurality of capacitor elements under a lower surface of the substrate . <EOS>