A light detecting device comprising: a current mirror circuit including a first current mirror transistor and a second current mirror transistor ; a pixel array including a plurality of pixels arranged in columns and rows, the plurality of pixels including: a first pixel including a first photoelectric conversion region , a first reset transistor , a first amplification transistor and a first select transistor , a second pixel including a second photoelectric conversion region , a second reset transistor , a second amplification transistor and a second select transistor ; a plurality of signal lines (219-n) which are provided with the first pixel and the second pixel , the plurality of signal lines (219-n) including: a first signal line (VSL_D) coupled to the first current mirror transistor and the first select transistor , a second signal line (VSL_S) coupled to the second current mirror transistor and the second select transistor , wherein the second signal line (VSL_S) is configured to output a pixel signal, a common signal line (Vcom) coupled to the first amplification transistor and the second amplification transistor ; a comparator configured to receive the pixel signal; and wherein a source or a drain of the first reset transistor is coupled to a predetermined potential (Vrst) which is different from a power source voltage (Vdd), wherein the first current mirror transistor and the second current mirror transistor are directly coupled to the power source voltage (Vdd), wherein the first pixel is shielded from light. a current mirror circuit including a first current mirror transistor and a second current mirror transistor ; a pixel array including a plurality of pixels arranged in columns and rows, the plurality of pixels including: a first pixel including a first photoelectric conversion region , a first reset transistor , a first amplification transistor and a first select transistor , a second pixel including a second photoelectric conversion region , a second reset transistor , a second amplification transistor and a second select transistor ; a first pixel including a first photoelectric conversion region , a first reset transistor , a first amplification transistor and a first select transistor , a second pixel including a second photoelectric conversion region , a second reset transistor , a second amplification transistor and a second select transistor ; a plurality of signal lines (219-n) which are provided with the first pixel and the second pixel , the plurality of signal lines (219-n) including: a first signal line (VSL_D) coupled to the first current mirror transistor and the first select transistor , a second signal line (VSL_S) coupled to the second current mirror transistor and the second select transistor , wherein the second signal line (VSL_S) is configured to output a pixel signal, a common signal line (Vcom) coupled to the first amplification transistor and the second amplification transistor ; a first signal line (VSL_D) coupled to the first current mirror transistor and the first select transistor , a second signal line (VSL_S) coupled to the second current mirror transistor and the second select transistor , wherein the second signal line (VSL_S) is configured to output a pixel signal, a common signal line (Vcom) coupled to the first amplification transistor and the second amplification transistor ; a comparator configured to receive the pixel signal; and wherein a source or a drain of the first reset transistor is coupled to a predetermined potential (Vrst) which is different from a power source voltage (Vdd), wherein the first current mirror transistor and the second current mirror transistor are directly coupled to the power source voltage (Vdd), wherein the first pixel is shielded from light. <EOS>