A method for securing against N-order side-channel attacks, with N a predetermined integer, a cryptographic process using in a plurality of encryption rounds an initial Substitution box S 0 stored in a computer readable memory circuit of a cryptographic device that includes a processing system having at least one hardware processor, comprising performed by the processing system the steps of: - accessing (E11) in the computer readable memory circuit said initial Substitution box S 0 , - generating (E12) a first randomized substitution box S 1 by masking said initial substitution box S 0 such that S 1 (x XOR m 1 ) = S 0 (x) XOR m 2 , with m 1, m 2 uniformly-distributed random values, for any input value x of the initial substitution box S 0 , - generating (E13) a first transrandomized Substitution box S from the first randomized substitution box S 1 and from masks m 1,1, m' 1,1 such that S [x] = S 1 [x xor (m 1 xor m 1,1 )] xor (m 2 xor m' 1,1 ) for any input value x of the first transrandomized Substitution box S , - generating (E14) from the first transrandomized Substitution box S a N-1th transrandomized Substitution box S(1, N-1) by performing iteratively N-2 times a step of generation of a ith transrandomized Substitution box S(1, i) from a i-1th transrandomized substitution box S(1, i-1) and from a plurality of masks m 1,i, m' 1,i, m 1,i-1, m' 1,i-1 such that S(1, i)[x] = S(1, i-1)[x xor (m 1,i-1 xor m 1,i )] xor (m' 1,i-1 xor m' 1,i ) for any input value x of the ith transrandomized substitution box S(1, i), with i an integer comprised in {2,..N-1}, - performing the cryptographic process using (E15) the N-1th transrandomized Substitution box S(1, N-1) instead of the initial Substitution box So in at least said first round of the cryptographic process, where said masks are uniformly-distributed random values and 'XOR' is the Boolean exclusive OR operation, and said operation "transrandomization" of a Substitution box S from (m i , m j ) to (m k , m l ) consists in computing said Substitution box S masked with said masks m k and m l, called transrandomized Substitution box, from said Substitution box S masked with said masks m i and m j , with i, j, k and I integers comprised in {2,..N-1}. - accessing (E11) in the computer readable memory circuit said initial Substitution box S 0 , - generating (E12) a first randomized substitution box S 1 by masking said initial substitution box S 0 such that S 1 (x XOR m 1 ) = S 0 (x) XOR m 2 , with m 1, m 2 uniformly-distributed random values, for any input value x of the initial substitution box S 0 , - generating (E13) a first transrandomized Substitution box S from the first randomized substitution box S 1 and from masks m 1,1, m' 1,1 such that S [x] = S 1 [x xor (m 1 xor m 1,1 )] xor (m 2 xor m' 1,1 ) for any input value x of the first transrandomized Substitution box S , - generating (E14) from the first transrandomized Substitution box S a N-1th transrandomized Substitution box S(1, N-1) by performing iteratively N-2 times a step of generation of a ith transrandomized Substitution box S(1, i) from a i-1th transrandomized substitution box S(1, i-1) and from a plurality of masks m 1,i, m' 1,i, m 1,i-1, m' 1,i-1 such that S(1, i)[x] = S(1, i-1)[x xor (m 1,i-1 xor m 1,i )] xor (m' 1,i-1 xor m' 1,i ) for any input value x of the ith transrandomized substitution box S(1, i), with i an integer comprised in {2,..N-1}, - performing the cryptographic process using (E15) the N-1th transrandomized Substitution box S(1, N-1) instead of the initial Substitution box So in at least said first round of the cryptographic process, <EOS>