A current zero-cross detection device , comprising a current transformer (CT1, CT2), a first sampling switch (S11, S21), a second sampling switch (S12, S22), a sampling resistor (R2, R4) and a comparator (T1, T2), wherein the current transformer (CT1, CT2) comprises a primary winding and a secondary winding; wherein: the primary winding is configured to be connected with a circuit for detecting a current through the circuit; two ends of the secondary winding are connected respectively to drain electrodes of the first sampling switch (S11, S21) and the second sampling switch (S12, S22); a source electrode of the first sampling switch (S11, S21) is connected to a source electrode of the second sampling switch (S12, S22), and the source electrodes are connected to ground; two ends of the sampling resistor (R2, R4) are respectively connected to the drain electrode and source electrode of the second sampling switch (S12, S22); a negative input end of the comparator (T1, T2) is connected to the drain electrode of the second sampling switch (S12, S22), and a positive input end of the comparator (T1, T2) is connected to a reference voltage; and the first sampling switch (S11, S21) and the second sampling switch (S12, S22) are in an ON or OFF state, characterized in that , current flowing through the current transformer (CT1, CT2) is sampled via the first sampling switch (S11, S21) and the sampling resistor (R2, R4), and energy stored in the current transformer (CT1, CT2) is reset via a parasitic capacitor of the first sampling switch (S11, S21) and the sampling resistor (R2, R4), wherein voltage of the sampling resistor (R2, R4) is compared with the reference voltage of the comparator (T1, T2), and when the voltage of the sampling resistor (R2, R4) is less than the reference voltage of the comparator (T1, T2), the comparator (T1, T2) is configured to invert and output a high level, thus the current zero-cross is detected. the primary winding is configured to be connected with a circuit for detecting a current through the circuit; two ends of the secondary winding are connected respectively to drain electrodes of the first sampling switch (S11, S21) and the second sampling switch (S12, S22); a source electrode of the first sampling switch (S11, S21) is connected to a source electrode of the second sampling switch (S12, S22), and the source electrodes are connected to ground; two ends of the sampling resistor (R2, R4) are respectively connected to the drain electrode and source electrode of the second sampling switch (S12, S22); a negative input end of the comparator (T1, T2) is connected to the drain electrode of the second sampling switch (S12, S22), and a positive input end of the comparator (T1, T2) is connected to a reference voltage; and the first sampling switch (S11, S21) and the second sampling switch (S12, S22) are in an ON or OFF state, characterized in that , current flowing through the current transformer (CT1, CT2) is sampled via the first sampling switch (S11, S21) and the sampling resistor (R2, R4), and energy stored in the current transformer (CT1, CT2) is reset via a parasitic capacitor of the first sampling switch (S11, S21) and the sampling resistor (R2, R4), wherein voltage of the sampling resistor (R2, R4) is compared with the reference voltage of the comparator (T1, T2), and when the voltage of the sampling resistor (R2, R4) is less than the reference voltage of the comparator (T1, T2), the comparator (T1, T2) is configured to invert and output a high level, thus the current zero-cross is detected. <EOS>