mhurhangee/patent-ind-claim-en huggingface dataset:
A hardware unit to perform a matrix multiplication, the hardware unit comprising: a multiplier stage comprising a plurality of multipliers , each multiplier configured to multiply a first data element (D1) and a second data element (D2) to produce a multiplication data element; one or more adder stages following the multiplier stage that form an adder tree to produce a sum of the multiplication data elements, each adder stage comprising one or more adders configured to add at least two data elements output by a previous stage to produce an addition data element; wherein at least one multiplier and/or at least one adder is preceded by a storage element corresponding to each bit of the data elements input to the at least one adder and/or the at least one multiplier ; and control logic configured to clock gate a portion of the storage elements corresponding to a data element in response to determining from a bit width of the first data element and/or a bit width of the second data element that a portion of that data element can be treated as having a zero value; characterised in that the at least one adder and/or the at least one multiplier comprises a multiplier and the control logic is configured to clock gate a portion of the storage elements corresponding to the first data element of the multiplier when the bit width of the first data element is less than a maximum bit width and clock gate a portion of the storage elements corresponding to the second data element of the multiplier when the bit width of the second data element is less than the maximum bit width. a multiplier stage comprising a plurality of multipliers , each multiplier configured to multiply a first data element (D1) and a second data element (D2) to produce a multiplication data element; one or more adder stages following the multiplier stage that form an adder tree to produce a sum of the multiplication data elements, each adder stage comprising one or more adders configured to add at least two data elements output by a previous stage to produce an addition data element; wherein at least one multiplier and/or at least one adder is preceded by a storage element corresponding to each bit of the data elements input to the at least one adder and/or the at least one multiplier ; and control logic configured to clock gate a portion of the storage elements corresponding to a data element in response to determining from a bit width of the first data element and/or a bit width of the second data element that a portion of that data element can be treated as having a zero value; characterised in that the at least one adder and/or the at least one multiplier comprises a multiplier and the control logic is configured to clock gate a portion of the storage elements corresponding to the first data element of the multiplier when the bit width of the first data element is less than a maximum bit width and clock gate a portion of the storage elements corresponding to the second data element of the multiplier when the bit width of the second data element is less than the maximum bit width.
A capacitive pressure sensor, comprising: a first sensor device formed from a set of layers, comprising a closed cavity having upper and lower electrodes , wherein the cavity shape is changed in dependence on a pressure exerted on the cavity roof; a second sensor structure formed from the same set of layers, comprising a cavity having upper and lower electrodes , wherein the cavity roof is vented to the area above the cavity roof such that the cavity is not changed by pressure applied to the cavity roof within a pressure sensing range of the pressure sensor; and a capacitance measurement arrangement for measuring a capacitance between the electrodes of the first sensor device and a capacitance between the electrodes of the second sensor structure, characterized in that the capacitive pressure sensor comprises an integrated circuit which is a CMOS integrated circuit, wherein the first sensor device and the second sensor structure are provided over the integrated circuit, the lower electrodes connect to a top metal layer of the CMOS integrated circuit by means of interconnect vias, the lower electrodes are Ti/TiN electrodes, and the cavities are formed over the lower electrodes. a first sensor device formed from a set of layers, comprising a closed cavity having upper and lower electrodes , wherein the cavity shape is changed in dependence on a pressure exerted on the cavity roof; a second sensor structure formed from the same set of layers, comprising a cavity having upper and lower electrodes , wherein the cavity roof is vented to the area above the cavity roof such that the cavity is not changed by pressure applied to the cavity roof within a pressure sensing range of the pressure sensor; and a capacitance measurement arrangement for measuring a capacitance between the electrodes of the first sensor device and a capacitance between the electrodes of the second sensor structure,
A method for wireless communication at a user equipment, UE, comprising: identifying that the UE is in communication with a serving cell via a first component carrier in accordance with a time division duplexing, TDD, configuration that includes one or more downlink portions and one or more uplink portions; identifying that the UE is configured to receive uplink preemption indications via a second component carrier, wherein the uplink preemption indications indicate that uplink traffic on the first component carrier is to be preempted; determining whether to monitor the second component carrier for uplink preemption indications pertaining to the one or more uplink portions on the first component carrier, characterized in that the determining comprises determining to monitor the second component carrier for uplink preemption indications based at least in part on a received indication; monitoring for uplink preemption indications via the first component carrier during the one or more downlink portions of the TDD configuration; refraining from monitoring for uplink preemption indications via the second component carrier during at least one downlink portion of the one or more downlink portions of the TDD configuration; and monitoring for uplink preemption indications via the second component carrier during at least one uplink portion of the one or more uplink portions on the first component carrier. identifying that the UE is in communication with a serving cell via a first component carrier in accordance with a time division duplexing, TDD, configuration that includes one or more downlink portions and one or more uplink portions; identifying that the UE is configured to receive uplink preemption indications via a second component carrier, wherein the uplink preemption indications indicate that uplink traffic on the first component carrier is to be preempted; determining whether to monitor the second component carrier for uplink preemption indications pertaining to the one or more uplink portions on the first component carrier, characterized in that the determining comprises determining to monitor the second component carrier for uplink preemption indications based at least in part on a received indication; monitoring for uplink preemption indications via the first component carrier during the one or more downlink portions of the TDD configuration; refraining from monitoring for uplink preemption indications via the second component carrier during at least one downlink portion of the one or more downlink portions of the TDD configuration; and monitoring for uplink preemption indications via the second component carrier during at least one uplink portion of the one or more uplink portions on the first component carrier.
An apparatus, comprising: a laser scanner ; an optical source situated to produce a fiducial source beam ; an optical fiducial pattern generator situated to produce with the fiducial source beam at least one transient optical fiducial (102, 204a-f, 320a-i, 650a-d, 726) on a laser processing target that is in a field of view of the laser scanner situated to scan a laser processing beam across the laser processing target , so that a positioning of the laser processing beam on the laser processing target becomes adjustable relative to the at least one transient optical fiducial (102, 204a-f, 320a-i, 650a-d, 726); an optical detector optically coupled to the laser processing target through the laser scanner to a subfield field of view (510a-d) of the field of view based on a scan position of one or more scan optics of the laser scanner, wherein the optical detector is situated to detect the at least one transient optical fiducial (102, 204a-f, 320a-i, 650a-d, 726) in the subfield; and a controller coupled to the optical detector and the laser scanner and configured to compare the detected position of the at least one transient optical fiducial (102, 204a-f, 320a-i, 650a-d, 726) to a position of the laser processing beam, to update a scan error correction table based on the comparison, and to scan the laser processing beam according to the updated scan error correction table . a laser scanner ; an optical source situated to produce a fiducial source beam ; an optical fiducial pattern generator situated to produce with the fiducial source beam at least one transient optical fiducial (102, 204a-f, 320a-i, 650a-d, 726) on a laser processing target that is in a field of view of the laser scanner situated to scan a laser processing beam across the laser processing target , so that a positioning of the laser processing beam on the laser processing target becomes adjustable relative to the at least one transient optical fiducial (102, 204a-f, 320a-i, 650a-d, 726); an optical detector optically coupled to the laser processing target through the laser scanner to a subfield field of view (510a-d) of the field of view based on a scan position of one or more scan optics of the laser scanner, wherein the optical detector is situated to detect the at least one transient optical fiducial (102, 204a-f, 320a-i, 650a-d, 726) in the subfield; and a controller coupled to the optical detector and the laser scanner and configured to compare the detected position of the at least one transient optical fiducial (102, 204a-f, 320a-i, 650a-d, 726) to a position of the laser processing beam, to update a scan error correction table based on the comparison, and to scan the laser processing beam according to the updated scan error correction table .
A system frequency detector , comprising: an orthogonal coordinate signal generator generating an orthogonal two-phase voltage signal from a three-phase voltage signal of three-phase alternating current power of a power system by converting the three-phase voltage signal into a two-phase voltage signal orthogonal to the three-phase voltage signal, converting the two-phase voltage signal into a voltage signal of a rotating coordinate system, calculating a moving average of the voltage signal of the rotating coordinate system, and performing an inverse transformation of the voltage signal of the rotating coordinate system after calculating the moving average; and a frequency calculator including an angular frequency calculator (AFP) calculating an angular frequency of the power system based on the two-phase voltage signal after calculating the moving average generated by the orthogonal coordinate signal generator , and an arithmetic unit calculating a system frequency of the power system from the angular frequency by multiplying the angular frequency by 1/2 π , the frequency calculator further including a rate limiter provided in series with the arithmetic unit , the rate limiter limiting a change of the system frequency equal to or greater than a prescribed change rate. an orthogonal coordinate signal generator generating an orthogonal two-phase voltage signal from a three-phase voltage signal of three-phase alternating current power of a power system by converting the three-phase voltage signal into a two-phase voltage signal orthogonal to the three-phase voltage signal, converting the two-phase voltage signal into a voltage signal of a rotating coordinate system, calculating a moving average of the voltage signal of the rotating coordinate system, and performing an inverse transformation of the voltage signal of the rotating coordinate system after calculating the moving average; and a frequency calculator including an angular frequency calculator (AFP) calculating an angular frequency of the power system based on the two-phase voltage signal after calculating the moving average generated by the orthogonal coordinate signal generator , and an arithmetic unit calculating a system frequency of the power system from the angular frequency by multiplying the angular frequency by 1/2 π , the frequency calculator further including a rate limiter provided in series with the arithmetic unit , the rate limiter limiting a change of the system frequency equal to or greater than a prescribed change rate.
A semiconductor-ferromagnetic insulator-superconductor hybrid device, comprising: a semiconductor component ; a ferromagnetic insulator component ; and a superconductor component ; wherein the semiconductor component has at least three facets ; wherein the ferromagnetic insulator component is arranged on a first facet and a second facet ; and wherein the superconductor component is arranged on a third facet and extends over the ferromagnetic insulator component on at least the second facet . a semiconductor component ; a ferromagnetic insulator component ; and a superconductor component ; wherein the semiconductor component has at least three facets ; wherein the ferromagnetic insulator component is arranged on a first facet and a second facet ; and wherein the superconductor component is arranged on a third facet and extends over the ferromagnetic insulator component on at least the second facet .
A pressing ring configured to fit onto a spigot formed on a second passage forming member being inserted into a socket formed on a first passage forming member to be joined to the second passage forming member , wherein a peripheral wall protruding inward in a radial direction is formed on an inner periphery of a rear of the socket , and a sealing member insertion space between an opening end face and the peripheral wall of the socket is formed between an outer circumference of the spigot and an inner circumference of the socket ; wherein the pressing ring is configured to be used for a joint including an annular sealing member lying in the sealing member insertion space ; the pressing ring is configured to be opposed to the opening end face of the socket from outside while being fit onto the spigot ; the pressing ring is configured to be moved by a pressing member along an axis of the passage forming member in a pressing direction so as to press the sealing member into the sealing member insertion space , and the pressing ring having a pressing face is configured to come into contact with an end of the sealing member , contact portions configured to come into contact with the socket so as to keep a distance from the pressing face to the opening end face of the socket at a predetermined distance, the pressing ring being characterized by having an escaping portion that allows escape of a part of the sealing member pressed by the pressing face ; wherein the escaping portion is a recessed portion that is, in use, opened near the opening end face of the socket opposed to the escaping portion , and the escaping portion is circumferentially formed outside the pressing face in the radial direction and is recessed from the pressing face in a drawing direction of the spigot .
A method for the production of (E)1-chloro-3,3,3-trifluoropropene comprising the steps of: (a) operating one agitated reaction vessel or a series of more than one agitated reaction vessel, each vessel in succession converting a portion of the original reactants fed to the first of the reaction vessels, with all of the reaction vessels being run simultaneously and operating in a continuous fashion; (b) conducting, in each of the reaction vessels, a series of fluorination reactions of a starting material selected from the group consisting of 1,1,1,3,3-pentachloropropane and 1,3,3,3-tetrachloropropene, and any mixtures thereof, using HF without the use of a catalyst and with simultaneous removal of by-product HCl and the product (E)1-chloro-3,3,3-trifluoropropene, wherein each reaction vessel is maintained at a temperature range of 65°C to 175°C; (c) recycling at least a portion of (i) unreacted starting material, (ii) HF and (iii) under-fluorinated by-products back to step (b); (d) separating and purifying by-product HCl; (e) separating excess HF back to step (b); (f) purifying the desired product, (E)1-chloro-3,3,3-trifluoropropene; and (g) isomerization of any by-product (Z)1-chloro-3,3,3-trifluoropropene to (E)1-chloro-3,3,3-trifluoropropene to maximize the process yield. (a) operating one agitated reaction vessel or a series of more than one agitated reaction vessel, each vessel in succession converting a portion of the original reactants fed to the first of the reaction vessels, with all of the reaction vessels being run simultaneously and operating in a continuous fashion; (b) conducting, in each of the reaction vessels, a series of fluorination reactions of a starting material selected from the group consisting of 1,1,1,3,3-pentachloropropane and 1,3,3,3-tetrachloropropene, and any mixtures thereof, using HF without the use of a catalyst and with simultaneous removal of by-product HCl and the product (E)1-chloro-3,3,3-trifluoropropene, wherein each reaction vessel is maintained at a temperature range of 65°C to 175°C; (c) recycling at least a portion of (i) unreacted starting material, (ii) HF and (iii) under-fluorinated by-products back to step (b); (d) separating and purifying by-product HCl; (e) separating excess HF back to step (b); (f) purifying the desired product, (E)1-chloro-3,3,3-trifluoropropene; and (g) isomerization of any by-product (Z)1-chloro-3,3,3-trifluoropropene to (E)1-chloro-3,3,3-trifluoropropene to maximize the process yield.
A key/cylinder lock combination having a flat key, in particular a reversible key for cylinder locks, having a flat profile body which is secured against reproduction and having a predefined structured cross-sectional surface, furthermore grooves and/or depression portions (7 to 10) for coding situated on the longitudinal broad sides and/or longitudinal narrow sides of the flat profile body, wherein the grooves extend in parallel to one another and form the profiling of the key, wherein the flat profile body, on its longitudinal broad side, has at least one rib extending in parallel to the grooves and protruding over the respective surface of the profile body, characterized in that on the key blank, the rib is present over the entire portion of the longitudinal extension of the flat profile body and can be shortened for the purpose of coding to a defined length depending on further machining, wherein a supplementary coding possibility is created over the length of the rib and/or its position relative to selected depression portions, the protruding rib is situated at a distance from the key inserting edge in the longitudinal direction of the flat profile body, the rib forms an upper first coding plane sensed by sensing pin pairs within the cylinder lock, provided first depressions in a surface that is free from the rib form a second, middle coding plane, and provided second depressions having a depth larger than that of the first depressions in the surface that is free from the rib form a third coding plane, each of which are sensed by associated pins within the cylinder lock.
Tool for machining materials, having: a basic body of a low-alloy steel and one or more sintered cutters , which have at least one cutting edge (8; 41) and a base (17; 39) and the base (17; 39) of which is welded onto the basic body (4; 34), wherein the cutting edge (8; 41) consists of a hard metal which contains at least 82% by volume tungsten carbide and a metallic binder of a cobalt-nickel-based alloy or a cobalt-based alloy, wherein a hardness of the hard metal is greater than 1300 HV10, and characterized in that the base (17; 39) consists of a composite which is made up of 40% by volume to 60% by volume metal carbide and a metallic binder, wherein at least 95% by volume of the metallic binder consists of nickel and wherein a hardness of the composite is less than 800 HV10. a basic body of a low-alloy steel and one or more sintered cutters , which have at least one cutting edge (8; 41) and a base (17; 39) and the base (17; 39) of which is welded onto the basic body (4; 34), wherein the cutting edge (8; 41) consists of a hard metal which contains at least 82% by volume tungsten carbide and a metallic binder of a cobalt-nickel-based alloy or a cobalt-based alloy, wherein a hardness of the hard metal is greater than 1300 HV10, and characterized in that the base (17; 39) consists of a composite which is made up of 40% by volume to 60% by volume metal carbide and a metallic binder, wherein at least 95% by volume of the metallic binder consists of nickel and wherein a hardness of the composite is less than 800 HV10.
Computer-implemented method for providing training data for training of a data-driven model, particularly a depth completion model, as a machine-learning model, wherein the data-driven model is to be trained to generate dense depth maps from sensor acquired raw depth maps, comprising the steps of: - providing (S1) multiple synthetic dense depth map data items (D syn ) from CAD data of various synthetic scenes, wherein synthetic dense depth map data items (D syn ) are ideal synthetic dense depth map items of the CAD data of various synthetic scenes; - providing (S2) multiple real raw depth map data items (D raw_real ) obtained from real-world depth sensor measurements of real-world scenes; - training (S3) a generative model for obtaining a trained generator model for generating generated raw depth map data items (D raw_syn ) from the synthetic dense depth map data items (D syn ); - applying (S4) the trained generator model to generate training data from provided synthetic dense depth map data (D syn ). - providing (S1) multiple synthetic dense depth map data items (D syn ) from CAD data of various synthetic scenes, wherein synthetic dense depth map data items (D syn ) are ideal synthetic dense depth map items of the CAD data of various synthetic scenes; - providing (S2) multiple real raw depth map data items (D raw_real ) obtained from real-world depth sensor measurements of real-world scenes; - training (S3) a generative model for obtaining a trained generator model for generating generated raw depth map data items (D raw_syn ) from the synthetic dense depth map data items (D syn ); - applying (S4) the trained generator model to generate training data from provided synthetic dense depth map data (D syn ).