A method of controlling a frequency of a clock signal for a processing unit , the method comprising: switching between the selection of: a first clock generator for providing a processing unit clock signal for executing an application; and a second clock generator for providing the processing unit clock signal for executing the application, wherein a frequency of a clock signal provided by the second clock generator is less than a frequency of the clock signal provided by the first clock generator ; accessing in memory , a plurality of settings, wherein each setting comprises a maximum frequency for the first clock generator in that setting and a minimum frequency for the second clock generator in that setting; in response to a detected at least one condition indicating a requirement to increase the frequency of the clock signal, changing from a current one of the settings to a higher one of the settings, wherein the higher one of the settings has a higher maximum frequency for the first clock generator and a higher minimum frequency for the second clock generator than the current one of the settings; and in response to a detected at least one condition indicating a requirement to decrease the frequency of the clock signal, changing from the higher one of the settings to a lower one of the settings, wherein the higher one of the settings has a higher maximum frequency for the first clock generator and a higher minimum frequency for the second clock generator than the lower one of the settings. switching between the selection of: a first clock generator for providing a processing unit clock signal for executing an application; and a second clock generator for providing the processing unit clock signal for executing the application, wherein a frequency of a clock signal provided by the second clock generator is less than a frequency of the clock signal provided by the first clock generator ; a first clock generator for providing a processing unit clock signal for executing an application; and a second clock generator for providing the processing unit clock signal for executing the application, wherein a frequency of a clock signal provided by the second clock generator is less than a frequency of the clock signal provided by the first clock generator ; accessing in memory , a plurality of settings, wherein each setting comprises a maximum frequency for the first clock generator in that setting and a minimum frequency for the second clock generator in that setting; in response to a detected at least one condition indicating a requirement to increase the frequency of the clock signal, changing from a current one of the settings to a higher one of the settings, wherein the higher one of the settings has a higher maximum frequency for the first clock generator and a higher minimum frequency for the second clock generator than the current one of the settings; and in response to a detected at least one condition indicating a requirement to decrease the frequency of the clock signal, changing from the higher one of the settings to a lower one of the settings, wherein the higher one of the settings has a higher maximum frequency for the first clock generator and a higher minimum frequency for the second clock generator than the lower one of the settings. <EOS>