A thermal increase system coupled to a cavity with two electrodes for containing a load , the thermal increase system comprising: a radio frequency, RF, signal source configured to supply an RF signal; a transmission path electrically coupled between the RF signal source and first and second electrodes that are positioned across the cavity; an impedance matching network electrically coupled along the transmission path, wherein the impedance matching network includes first and second input nodes (1001-1, 1001-2, 1241-1, 1241-2), first and second output nodes (1002-1, 1002-2, 1242-1, 1242-2), a first variable capacitor coupled between the first input node and the first output node; a second variable capacitor coupled between the second input node and the second output node; a first inductor coupled in series with the first variable capacitor between the first input node and the first output node; a second inductor coupled in series with the second variable capacitor between the second input node and the second output node; and a third variable capacitor coupled between respective first and second intermediate nodes between the first inductor and the first variable capacitor, and between the second inductor and the second variable capacitor respectively; power detection circuitry (730, 730', 730", 1180) configured to detect reflected signal power along the transmission path; and a controller configured to modify, based on the reflected signal power, capacitance values of the first and second variable capacitors of the impedance matching network to reduce the reflected signal power. a radio frequency, RF, signal source configured to supply an RF signal; a transmission path electrically coupled between the RF signal source and first and second electrodes that are positioned across the cavity; an impedance matching network electrically coupled along the transmission path, wherein the impedance matching network includes first and second input nodes (1001-1, 1001-2, 1241-1, 1241-2), first and second output nodes (1002-1, 1002-2, 1242-1, 1242-2), a first variable capacitor coupled between the first input node and the first output node; a second variable capacitor coupled between the second input node and the second output node; a first inductor coupled in series with the first variable capacitor between the first input node and the first output node; a second inductor coupled in series with the second variable capacitor between the second input node and the second output node; and a third variable capacitor coupled between respective first and second intermediate nodes between the first inductor and the first variable capacitor, and between the second inductor and the second variable capacitor respectively; first and second input nodes (1001-1, 1001-2, 1241-1, 1241-2), first and second output nodes (1002-1, 1002-2, 1242-1, 1242-2), a first variable capacitor coupled between the first input node and the first output node; a second variable capacitor coupled between the second input node and the second output node; a first inductor coupled in series with the first variable capacitor between the first input node and the first output node; a second inductor coupled in series with the second variable capacitor between the second input node and the second output node; and a third variable capacitor coupled between respective first and second intermediate nodes between the first inductor and the first variable capacitor, and between the second inductor and the second variable capacitor respectively; power detection circuitry (730, 730', 730", 1180) configured to detect reflected signal power along the transmission path; and a controller configured to modify, based on the reflected signal power, capacitance values of the first and second variable capacitors of the impedance matching network to reduce the reflected signal power. <EOS>