A method for forming a semiconductor substrate arrangement comprising: forming a mask on a semiconductor substrate , the semiconductor substrate comprising a dielectric insulation layer , and a first metallization layer arranged on the dielectric insulation layer , and the mask comprising at least one opening, wherein the first metallization layer is arranged between the mask and the dielectric insulation layer ; forming a layer of electrically conductive coating on the first metallization layer , wherein the layer of electrically conductive coating is formed in the at least one opening on those regions of the first metallization layer that are not covered by the mask ; and after forming the layer of electrically conductive coating , removing the mask from the semiconductor substrate , wherein forming the mask comprises either applying an even layer of material on the first metallization layer such that a thickness (d30) of the mask in a vertical direction (z) in a region adjacent to the edges of the mask equals a thickness (d32) in the vertical direction (z) of regions of the mask further away from the edges, or applying the material of the mask on the first metallization layer such that the thickness (d30) of the mask in the region adjacent to the edges of the mask is greater than the thickness (d32) of the regions of the mask further away from the edges, wherein the vertical direction (z) is perpendicular to a top surface of the semiconductor substrate ; the region adjacent to the edges of the mask is a region that is arranged within 2mm or within 4mm from an edge of the mask ; and the mask is formed such that an angle (α) between a top surface of the semiconductor substrate and the edge of the mask is between 90 and 130°. forming a mask on a semiconductor substrate , the semiconductor substrate comprising a dielectric insulation layer , and a first metallization layer arranged on the dielectric insulation layer , and the mask comprising at least one opening, wherein the first metallization layer is arranged between the mask and the dielectric insulation layer ; forming a layer of electrically conductive coating on the first metallization layer , wherein the layer of electrically conductive coating is formed in the at least one opening on those regions of the first metallization layer that are not covered by the mask ; and after forming the layer of electrically conductive coating , removing the mask from the semiconductor substrate , wherein forming the mask comprises either applying an even layer of material on the first metallization layer such that a thickness (d30) of the mask in a vertical direction (z) in a region adjacent to the edges of the mask equals a thickness (d32) in the vertical direction (z) of regions of the mask further away from the edges, or applying the material of the mask on the first metallization layer such that the thickness (d30) of the mask in the region adjacent to the edges of the mask is greater than the thickness (d32) of the regions of the mask further away from the edges, wherein the vertical direction (z) is perpendicular to a top surface of the semiconductor substrate ; the region adjacent to the edges of the mask is a region that is arranged within 2mm or within 4mm from an edge of the mask ; and the mask is formed such that an angle (α) between a top surface of the semiconductor substrate and the edge of the mask is between 90 and 130°. <EOS>