A microelectronic unit , comprising: a semiconductor substrate having a front surface and a rear surface remote therefrom and embodying a plurality of active semiconductor devices therein, the substrate having a plurality of conductive pads exposed at the front surface and a plurality of openings arranged in a symmetric or asymmetric distribution across an area of the rear surface, with at least m openings spaced apart in a first direction along the rear surface and n openings spaced apart in a second direction along the rear surface transverse to the first direction, each of m and n being greater than 1; first and second conductive vias electrically connected with respective first and second pads of the plurality of conductive pads, wherein each via extends through a portion of the substrate; pluralities of first and second conductive interconnects extending within respective ones of the openings, each first conductive interconnect connected to the first conductive via, each second conductive interconnect connected to the second conductive via; and first and second conductive contacts exposed at the rear surface for interconnection with an external element, the first and second conductive contacts being electrically connected to the first and second conductive interconnects, respectively, wherein the plurality of first conductive interconnects is separated from the plurality of second conductive interconnects in a horizontal direction substantially parallel to the front surface by at least one of the plurality of openings, the at least one opening at least partially filled with an insulating dielectric material ; and the microelectronic unit further comprises at least one first aperture and at least one second aperture, each aperture extending from two or more of the openings to at least a bottom surface of a respective one of the pads, wherein the first and second conductive vias extends within respective first and second apertures. a semiconductor substrate having a front surface and a rear surface remote therefrom and embodying a plurality of active semiconductor devices therein, the substrate having a plurality of conductive pads exposed at the front surface and a plurality of openings arranged in a symmetric or asymmetric distribution across an area of the rear surface, with at least m openings spaced apart in a first direction along the rear surface and n openings spaced apart in a second direction along the rear surface transverse to the first direction, each of m and n being greater than 1; first and second conductive vias electrically connected with respective first and second pads of the plurality of conductive pads, wherein each via extends through a portion of the substrate; pluralities of first and second conductive interconnects extending within respective ones of the openings, each first conductive interconnect connected to the first conductive via, each second conductive interconnect connected to the second conductive via; and first and second conductive contacts exposed at the rear surface for interconnection with an external element, the first and second conductive contacts being electrically connected to the first and second conductive interconnects, respectively, wherein the plurality of first conductive interconnects is separated from the plurality of second conductive interconnects in a horizontal direction substantially parallel to the front surface by at least one of the plurality of openings, the at least one opening at least partially filled with an insulating dielectric material ; and the microelectronic unit further comprises at least one first aperture and at least one second aperture, each aperture extending from two or more of the openings to at least a bottom surface of a respective one of the pads, wherein the first and second conductive vias extends within respective first and second apertures. <EOS>