A processor comprising: a shadow stack pointer, SSP, register , the SSP register to store a first SSP to identify a top of a first currently active shadow stack ; a decode unit to decode a shadow stack protection instruction, the shadow stack protection instruction to indicate a second SSP, the second SSP to identify a top of a second shadow stack , the shadow stack protection instruction to restore a state of the second shadow stack and to switch to the second shadow stack ; and an execution unit coupled with the decode unit , the execution unit , in response to the shadow stack protection instruction, to: perform one or more security checks, including to determine whether the second SSP indicated by the shadow stack protection instruction matches an SSP stored on the second shadow stack ; if at least one of the security checks fail: not update the SSP register to the second SSP; and cause an exception; and if all of the security checks succeed: change the SSP stored on the second shadow stack ; and update the SSP register to the second SSP, thereby restoring the state of the second shadow stack and switching to the second shadow stack , wherein the first shadow stack and the second shadow stack each represents a stack type data structure that is separate from a stack , is stored in a memory and is to store control information that represent return address related information , and wherein the shadow stack protection instruction is a restore shadow stack pointer instruction . a shadow stack pointer, SSP, register , the SSP register to store a first SSP to identify a top of a first currently active shadow stack ; a decode unit to decode a shadow stack protection instruction, the shadow stack protection instruction to indicate a second SSP, the second SSP to identify a top of a second shadow stack , the shadow stack protection instruction to restore a state of the second shadow stack and to switch to the second shadow stack ; and an execution unit coupled with the decode unit , the execution unit , in response to the shadow stack protection instruction, to: perform one or more security checks, including to determine whether the second SSP indicated by the shadow stack protection instruction matches an SSP stored on the second shadow stack ; if at least one of the security checks fail: not update the SSP register to the second SSP; and cause an exception; and if all of the security checks succeed: change the SSP stored on the second shadow stack ; and update the SSP register to the second SSP, thereby restoring the state of the second shadow stack and switching to the second shadow stack , perform one or more security checks, including to determine whether the second SSP indicated by the shadow stack protection instruction matches an SSP stored on the second shadow stack ; if at least one of the security checks fail: not update the SSP register to the second SSP; and cause an exception; and not update the SSP register to the second SSP; and cause an exception; and if all of the security checks succeed: change the SSP stored on the second shadow stack ; and update the SSP register to the second SSP, thereby restoring the state of the second shadow stack and switching to the second shadow stack , change the SSP stored on the second shadow stack ; and update the SSP register to the second SSP, thereby restoring the state of the second shadow stack and switching to the second shadow stack , wherein the first shadow stack and the second shadow stack each represents a stack type data structure that is separate from a stack , is stored in a memory and is to store control information that represent return address related information , and wherein the shadow stack protection instruction is a restore shadow stack pointer instruction . <EOS>