A display device , comprising: a display unit comprising transistors (TR) disposed in a display area (DPA) and signal lines (DL) arranged in a non-display area (NDA) located along an edge of the display area (DPA) , at least one of the signal lines (DL) being electrically connected to the transistors (TR); and an input sensing unit disposed over the display unit and comprising sensing electrodes (TE) disposed on the display area (DPA), sensing lines arranged on the non-display area (NDA), and a first dummy pattern disposed on the non-display area (NDA) and spaced apart from the sensing electrodes (TE), at least one of the sensing lines (SL) being electrically connected to the sensing electrodes (TE), wherein the sensing electrodes (TE) are included in a first conductive layer , wherein the first dummy pattern and the sensing lines (SL) are included in the first conductive layer , wherein the signal lines (DL) include a first signal line which is spaced farthest from the display area (DPA) in the non-display area (DPA) of the display unit , wherein the first dummy pattern only partially overlaps the first signal line in a plan view, wherein the first dummy pattern and the first signal line constitute an alignment mark (AM) for position recognition, wherein the alignment mark (AM) comprises a first portion (P1) having a first area and a second portion (P2) having a second area and protruding from the first portion (PI), and wherein, in a plan view, a non-overlap portion of the first dummy pattern that does not overlap the first signal line is the same as the second portion (P2) of the alignment mark (AM) in a plan view, and wherein, in a plan view, a full width portion of the first signal line including an overlap portion of the first signal line that overlaps the first dummy pattern and extending to both sides of said overlap portion into the extension direction of the first signal line, is the same as the first portion of the alignment mark in a plan view. a display unit comprising transistors (TR) disposed in a display area (DPA) and signal lines (DL) arranged in a non-display area (NDA) located along an edge of the display area (DPA) , at least one of the signal lines (DL) being electrically connected to the transistors (TR); and an input sensing unit disposed over the display unit and comprising sensing electrodes (TE) disposed on the display area (DPA), sensing lines arranged on the non-display area (NDA), and a first dummy pattern disposed on the non-display area (NDA) and spaced apart from the sensing electrodes (TE), at least one of the sensing lines (SL) being electrically connected to the sensing electrodes (TE), wherein the sensing electrodes (TE) are included in a first conductive layer , wherein the first dummy pattern and the sensing lines (SL) are included in the first conductive layer , wherein the signal lines (DL) include a first signal line which is spaced farthest from the display area (DPA) in the non-display area (DPA) of the display unit , wherein the first dummy pattern only partially overlaps the first signal line in a plan view, wherein the first dummy pattern and the first signal line constitute an alignment mark (AM) for position recognition, wherein the alignment mark (AM) comprises a first portion (P1) having a first area and a second portion (P2) having a second area and protruding from the first portion (PI), and wherein, in a plan view, a non-overlap portion of the first dummy pattern that does not overlap the first signal line is the same as the second portion (P2) of the alignment mark (AM) in a plan view, and wherein, in a plan view, a full width portion of the first signal line including an overlap portion of the first signal line that overlaps the first dummy pattern and extending to both sides of said overlap portion into the extension direction of the first signal line, is the same as the first portion of the alignment mark in a plan view. <EOS>