A capacitive logic cell comprising a variable capacitance capacitor (C) comprising first (s), second (d), third (g1), fourth (g2) and fifth (r ; r1) electrodes electrically insulated one from each other, the capacitor (C) comprising a fixed assembly comprising the first electrode (s), and a mobile assembly comprising the second electrode (d), wherein: the first (s) and second (d) electrodes define a first variable capacitance of the capacitor (C) according to the position of the mobile assembly relative to the fixed assembly; the third electrode (g1) is connected to a node (in1) of application of a first logic input signal (A; A1) of the cell; the fourth electrode (g2) is connected to a node (in2) of application of a second logic input signal (B; A2) of the cell; the fifth electrode (r; r1) is connected to a node (GND; GND1) of application of a first reference potential of the cell; and the position of the second electrode (d) relative to the first electrode (s) is a function of a combination of the first (A; A1) and second (B; A2) logic input signals, wherein: the mobile assembly is mobile in translation with respect to the fixed assembly to vary the surface area of the second electrode (d) opposite the first electrode (s) without varying the distance between the first (s) and second (d) electrodes; or the mobile assembly is mobile in translation with respect to the fixed assembly to vary the distance between the first (s) and second (d) electrodes without varying the surface area of the second electrode (d) opposite the first electrode (s), and wherein: the second electrode (d) is connected to a node (sup) of application of a power supply voltage (PC) of the cell; the first electrode (s) is connected to a node (out) supplying a first logic output signal (S) of the cell; and an output capacitance (C I ) is connected between the first electrode (s) dans the node (GND; GND1) of application of the first reference potential of the cell. the first (s) and second (d) electrodes define a first variable capacitance of the capacitor (C) according to the position of the mobile assembly relative to the fixed assembly; the third electrode (g1) is connected to a node (in1) of application of a first logic input signal (A; A1) of the cell; the fourth electrode (g2) is connected to a node (in2) of application of a second logic input signal (B; A2) of the cell; the fifth electrode (r; r1) is connected to a node (GND; GND1) of application of a first reference potential of the cell; and the position of the second electrode (d) relative to the first electrode (s) is a function of a combination of the first (A; A1) and second (B; A2) logic input signals, the mobile assembly is mobile in translation with respect to the fixed assembly to vary the surface area of the second electrode (d) opposite the first electrode (s) without varying the distance between the first (s) and second (d) electrodes; or the mobile assembly is mobile in translation with respect to the fixed assembly to vary the distance between the first (s) and second (d) electrodes without varying the surface area of the second electrode (d) opposite the first electrode (s), the second electrode (d) is connected to a node (sup) of application of a power supply voltage (PC) of the cell; the first electrode (s) is connected to a node (out) supplying a first logic output signal (S) of the cell; and an output capacitance (C I ) is connected between the first electrode (s) dans the node (GND; GND1) of application of the first reference potential of the cell. <EOS>