A vehicle display device comprising: a main microcomputer that generates information data; and a sub microcomputer that generates an image to be displayed on a display element on the basis of the information data, wherein at least a signal line through which the main microcomputer transmits the information data to the sub microcomputer, and separately from this signal line, a signal line through which the main microcomputer transmits a chip select signal that is a signal for selecting a transmission destination of the information data are connected between the main microcomputer and the sub microcomputer , so that communication is executable between the main microcomputer and the sub microcomputer , the main microcomputer executes a transmission process of transmitting the information data to the sub microcomputer on the basis of a first timer counter that is a timer counter counted by the main microcomputer for every predetermined time, the sub microcomputer executes a reception process of the information data on the basis of a second timer counter that is a timer counter counted by the sub microcomputer for the every predetermined time, the main microcomputer executes, when a count value of the first timer counter becomes a prescribed value, either one of switching from a Lo level to a Hi level or switching from the Hi level to the Lo level of the chip select signal to be transmitted to the sub microcomputer , and the first timer counter and the second timer counter are synchronized in accordance with either the one of the switching from the Lo level to the Hi level or the switching from the Hi level to the Lo level of the chip select signal being executed. a main microcomputer that generates information data; and a sub microcomputer that generates an image to be displayed on a display element on the basis of the information data, wherein at least a signal line through which the main microcomputer transmits the information data to the sub microcomputer, and separately from this signal line, a signal line through which the main microcomputer transmits a chip select signal that is a signal for selecting a transmission destination of the information data are connected between the main microcomputer and the sub microcomputer , so that communication is executable between the main microcomputer and the sub microcomputer , the main microcomputer executes a transmission process of transmitting the information data to the sub microcomputer on the basis of a first timer counter that is a timer counter counted by the main microcomputer for every predetermined time, the sub microcomputer executes a reception process of the information data on the basis of a second timer counter that is a timer counter counted by the sub microcomputer for the every predetermined time, the main microcomputer executes, when a count value of the first timer counter becomes a prescribed value, either one of switching from a Lo level to a Hi level or switching from the Hi level to the Lo level of the chip select signal to be transmitted to the sub microcomputer , and the first timer counter and the second timer counter are synchronized in accordance with either the one of the switching from the Lo level to the Hi level or the switching from the Hi level to the Lo level of the chip select signal being executed. <EOS>