A semiconductor package apparatus , comprising: one or more substrates ; and logic coupled to the one or more substrates, wherein the logic is at least partly implemented in one or more of configurable logic and fixed-functionality hardware logic, the logic coupled to the one or more substrates configured to: track a modification to a processor cache line; characterized in that the logic is configured to : set an indicator to indicate if the modification relates to a transaction, and set the indicator to indicate if the modification relates to a speculative execution corresponding to the transaction; detect a power transition; determine if an address of the processor cache line corresponds to an application direct address range, in response to the detected power transition; and flush the processor cache line to the persistent memory based on a state of the indicator indicating whether the modification relates to a speculative execution and in response to the detected power transition. one or more substrates ; and logic coupled to the one or more substrates, wherein the logic is at least partly implemented in one or more of configurable logic and fixed-functionality hardware logic, the logic coupled to the one or more substrates configured to: track a modification to a processor cache line; characterized in that the logic is configured to : set an indicator to indicate if the modification relates to a transaction, and set the indicator to indicate if the modification relates to a speculative execution corresponding to the transaction; detect a power transition; determine if an address of the processor cache line corresponds to an application direct address range, in response to the detected power transition; and flush the processor cache line to the persistent memory based on a state of the indicator indicating whether the modification relates to a speculative execution and in response to the detected power transition. track a modification to a processor cache line; characterized in that the logic is configured to : set an indicator to indicate if the modification relates to a transaction, and set the indicator to indicate if the modification relates to a speculative execution corresponding to the transaction; detect a power transition; determine if an address of the processor cache line corresponds to an application direct address range, in response to the detected power transition; and flush the processor cache line to the persistent memory based on a state of the indicator indicating whether the modification relates to a speculative execution and in response to the detected power transition. set an indicator to indicate if the modification relates to a transaction, and set the indicator to indicate if the modification relates to a speculative execution corresponding to the transaction; detect a power transition; determine if an address of the processor cache line corresponds to an application direct address range, in response to the detected power transition; and flush the processor cache line to the persistent memory based on a state of the indicator indicating whether the modification relates to a speculative execution and in response to the detected power transition. detect a power transition; determine if an address of the processor cache line corresponds to an application direct address range, in response to the detected power transition; and flush the processor cache line to the persistent memory based on a state of the indicator indicating whether the modification relates to a speculative execution and in response to the detected power transition. <EOS>