A touch control unit, comprising: a plurality of touch sub-units, each of which comprising a sensor thin film transistor, TFT, a sensing capacitor (C S ) a reading induction line (T read ) and a memory capacitor (C st ), capacitance of the memory capacitor (C st ) being less than that of the sensing capacitor (C S ); a gate electrode of the sensor TFT being connected with a gate line of an array substrate which comprises intersected gate lines (G n-1 to G n+1 ) and data lines (D m-1 to D m+1 ) thereon to define pixel areas; one of source and drain electrodes of the sensor TFT being connected with the reading induction line (T read ); one end of the sensing capacitor (C S ) being connected with the other one of the source and drain electrodes of the sensor TFT; one end of the memory capacitor (C st ) being connected with the other one of the source and drain electrodes of the sensor TFT, and the other end being connected with a voltage stabilizing electrode, and wherein intersection of adjacent two gate lines (G n-1 , G n ) and adjacent two data lines (D m , D m+1 ) of the array substrate corresponds to one pixel area, and several pixel areas are correspondingly provided with one touch sub-unit; characterized in that in the touch sub-unit provided for the pixel areas corresponding to intersection of a gate line (G n1 ), a gate line (G n ), a data line (D m ), and a data line (D m1 ), the gate electrode of the sensor TFT thereof is connected with any one of the gate lines (G n1 to G n ), wherein the gate line (G n1 ) and the gate line (G n ) are gate lines that are not adjacent in their locations, and the data line (D m1 ) and the data line (D m ) are data lines that are not adjacent in their locations, and wherein the voltage stabilizing electrode is a common electrode on the array substrate, or a common electrode on a color filter substrate. a plurality of touch sub-units, each of which comprising a sensor thin film transistor, TFT, a sensing capacitor (C S ) a reading induction line (T read ) and a memory capacitor (C st ), capacitance of the memory capacitor (C st ) being less than that of the sensing capacitor (C S ); a gate electrode of the sensor TFT being connected with a gate line of an array substrate which comprises intersected gate lines (G n-1 to G n+1 ) and data lines (D m-1 to D m+1 ) thereon to define pixel areas; one of source and drain electrodes of the sensor TFT being connected with the reading induction line (T read ); one end of the sensing capacitor (C S ) being connected with the other one of the source and drain electrodes of the sensor TFT; one end of the memory capacitor (C st ) being connected with the other one of the source and drain electrodes of the sensor TFT, and the other end being connected with a voltage stabilizing electrode, and wherein intersection of adjacent two gate lines (G n-1 , G n ) and adjacent two data lines (D m , D m+1 ) of the array substrate corresponds to one pixel area, and several pixel areas are correspondingly provided with one touch sub-unit; characterized in that in the touch sub-unit provided for the pixel areas corresponding to intersection of a gate line (G n1 ), a gate line (G n ), a data line (D m ), and a data line (D m1 ), the gate electrode of the sensor TFT thereof is connected with any one of the gate lines (G n1 to G n ), wherein the gate line (G n1 ) and the gate line (G n ) are gate lines that are not adjacent in their locations, and the data line (D m1 ) and the data line (D m ) are data lines that are not adjacent in their locations, and wherein the voltage stabilizing electrode is a common electrode on the array substrate, or a common electrode on a color filter substrate. <EOS>