A patient interface module (PIM, 104) for an intraluminal ultrasound imaging system , the PIM configured for communication with a plurality of intraluminal imaging devices that each comprise an ultrasound imaging component , wherein the PIM comprises a field programmable gate array (FPGA), wherein the FPGA comprises: a plurality of reconfigurable logic blocks that each include a plurality of logic elements interconnected by a plurality of reconfigurable interconnection elements ; a configuration memory coupled to the plurality of reconfigurable logic blocks; and a processing component coupled to the configuration memory , the processing component configured to: detect a device attribute of a first intraluminal imaging device or a second intraluminal imaging device when either one of the intraluminal imaging devices is brought in communication with the PIM; and load a first configuration data or a second configuration data to the configuration memory based on the detected device attribute and dynamically reconfigure the plurality of reconfigurable logic blocks in run-time to implement: a first or a second communication interface for communicating with the associated first or second intraluminal imaging device; and a first or a second sequencer for controlling the ultrasound imaging component of the associated first or second intraluminal image. a plurality of reconfigurable logic blocks that each include a plurality of logic elements interconnected by a plurality of reconfigurable interconnection elements ; a configuration memory coupled to the plurality of reconfigurable logic blocks; and a processing component coupled to the configuration memory , the processing component configured to: detect a device attribute of a first intraluminal imaging device or a second intraluminal imaging device when either one of the intraluminal imaging devices is brought in communication with the PIM; and load a first configuration data or a second configuration data to the configuration memory based on the detected device attribute and dynamically reconfigure the plurality of reconfigurable logic blocks in run-time to implement: a first or a second communication interface for communicating with the associated first or second intraluminal imaging device; and a first or a second sequencer for controlling the ultrasound imaging component of the associated first or second intraluminal image. detect a device attribute of a first intraluminal imaging device or a second intraluminal imaging device when either one of the intraluminal imaging devices is brought in communication with the PIM; and load a first configuration data or a second configuration data to the configuration memory based on the detected device attribute and dynamically reconfigure the plurality of reconfigurable logic blocks in run-time to implement: a first or a second communication interface for communicating with the associated first or second intraluminal imaging device; and a first or a second sequencer for controlling the ultrasound imaging component of the associated first or second intraluminal image. a first or a second communication interface for communicating with the associated first or second intraluminal imaging device; and a first or a second sequencer for controlling the ultrasound imaging component of the associated first or second intraluminal image. <EOS>