A memory device comprising: an insulating structure including a first surface and a plurality of protrusion portions protruding from the first surface in a first direction (D1), the plurality of protrusion portions being spaced apart from each other in a second direction (D2) perpendicular to the first direction: a recording material layer on the insulating structure, the recording material layer including a variable resistance material and extending along protruding surfaces of the protrusion portions; a channel layer on the recording material layer and extending along a surface of the recording material layer; a gate insulating layer on the channel layer; and a plurality of gate electrodes on the gate insulating layer spaced apart from each other along the second direction, each of the plurality of gate electrodes facing one of a plurality of second surfaces of the insulating structure, the plurality of second surfaces of the insulating structure being a plurality of protruding upper surfaces of the plurality of protrusion portions, wherein the recording material layer includes a plurality of switching areas (A sw ) respectively located on the plurality of second surfaces and facing the plurality of gate electrodes, each switching area has two ends in the second direction, and both ends of each switching area contact the channel layer, and wherein the recording material layer covers the protrusion portions and extends onto the first surface of the insulating structure so that an electrical distance (L se ) between adjacent ends of adjacent switching areas, determined along a path of the recording material layer, is greater than a physical distance between the adjacent ends of the adjacent switching areas. an insulating structure including a first surface and a plurality of protrusion portions protruding from the first surface in a first direction (D1), the plurality of protrusion portions being spaced apart from each other in a second direction (D2) perpendicular to the first direction: a recording material layer on the insulating structure, the recording material layer including a variable resistance material and extending along protruding surfaces of the protrusion portions; a channel layer on the recording material layer and extending along a surface of the recording material layer; a gate insulating layer on the channel layer; and a plurality of gate electrodes on the gate insulating layer spaced apart from each other along the second direction, each of the plurality of gate electrodes facing one of a plurality of second surfaces of the insulating structure, the plurality of second surfaces of the insulating structure being a plurality of protruding upper surfaces of the plurality of protrusion portions, wherein the recording material layer includes a plurality of switching areas (A sw ) respectively located on the plurality of second surfaces and facing the plurality of gate electrodes, each switching area has two ends in the second direction, and both ends of each switching area contact the channel layer, and wherein the recording material layer covers the protrusion portions and extends onto the first surface of the insulating structure so that an electrical distance (L se ) between adjacent ends of adjacent switching areas, determined along a path of the recording material layer, is greater than a physical distance between the adjacent ends of the adjacent switching areas. <EOS>