A cache memory system comprising: a content addressable memory having an array of content addressable memory elements comprising a plurality of rows of content addressable elements and a plurality of columns of content addressable elements , wherein each of the content addressable elements of the array further comprises: a first Josephson magnetic random-access memory, JMRAM, cell and a second Josephson magnetic random-access memory, JMRAM, cell ; a first superconducting quantum interference device SQUID; and a second superconducting quantum interference device SQUID, wherein an input bit of an input address to each of the content addressable memory elements is compared with: a first state of the first SQUID of that respective content addressable memory element and a second state of the second SQUID of that respective content addressable memory element to generate an output signal from that respective content addressable memory element; and a Josephson magnetic random-access memory JMRAM data cache , coupled to the content addressable memory , the JMRAM data cache comprising a plurality of word lines, wherein each of the plurality of word lines is coupled via a connecting cell element to a corresponding one of the plurality of rows of the content addressable memory elements , wherein the connecting cell element is configured to provide a continuous conduction path for forwarding the output signal to a respective one of the plurality of the word lines of the JMRAM data cache , wherein the output signal is configured to activate, without requiring decoding, one of the plurality of the word lines. a content addressable memory having an array of content addressable memory elements comprising a plurality of rows of content addressable elements and a plurality of columns of content addressable elements , wherein each of the content addressable elements of the array further comprises: a first Josephson magnetic random-access memory, JMRAM, cell and a second Josephson magnetic random-access memory, JMRAM, cell ; a first superconducting quantum interference device SQUID; and a second superconducting quantum interference device SQUID, wherein an input bit of an input address to each of the content addressable memory elements is compared with: a first state of the first SQUID of that respective content addressable memory element and a second state of the second SQUID of that respective content addressable memory element to generate an output signal from that respective content addressable memory element; and a first Josephson magnetic random-access memory, JMRAM, cell and a second Josephson magnetic random-access memory, JMRAM, cell ; a first superconducting quantum interference device SQUID; and a second superconducting quantum interference device SQUID, wherein an input bit of an input address to each of the content addressable memory elements is compared with: a first state of the first SQUID of that respective content addressable memory element and a second state of the second SQUID of that respective content addressable memory element to generate an output signal from that respective content addressable memory element; and a Josephson magnetic random-access memory JMRAM data cache , coupled to the content addressable memory , the JMRAM data cache comprising a plurality of word lines, wherein each of the plurality of word lines is coupled via a connecting cell element to a corresponding one of the plurality of rows of the content addressable memory elements , wherein the connecting cell element is configured to provide a continuous conduction path for forwarding the output signal to a respective one of the plurality of the word lines of the JMRAM data cache , wherein the output signal is configured to activate, without requiring decoding, one of the plurality of the word lines. <EOS>