A trench gate insulated gate bipolar transistor, i.e. IGBT, comprising: a substrate ; a first-conductivity-type channel layer in which an impurity is introduced, being provided on the substrate ; two first-conductivity-type floating layers provided respectively on two sides of the channel layer , the first-conductivity-type floating layers being deeper than the channel layer ; two emitter trenches disposed between the two floating layers , the emitter trenches being respectively in contact with the floating layers ; at least two gate trenches disposed between the two emitter trenches ; at least two source diffusion layers disposed between the at least two gate trenches , the source diffusion layers being respectively in contact with the gate trenches ; an insulation film which covers a top surface of the channel layer , the two floating layers , the two emitter trenches , the at least two gate trenches , and a part of the at least two source diffusion layers , the insulating film having a plurality of holes ; and an emitter electrode formed on the insulating film and having a plurality of parts buried in each hole of the insulation film , the holes of the insulating film include i) a first hole for connection of the emitter electrode to the channel layer between the at least two gate trenches , ii) a second hole for connection of the emitter electrode to the channel layer between one of the two emitter trenches and an opposing gate trench of the at least two gate trenches , and (iii) a third hole for connection of the emitter electrode to the channel layer between the other of the two emitter trenches and an opposing gate trench of the at least two gate trenches . a substrate ; a first-conductivity-type channel layer in which an impurity is introduced, being provided on the substrate ; two first-conductivity-type floating layers provided respectively on two sides of the channel layer , the first-conductivity-type floating layers being deeper than the channel layer ; two emitter trenches disposed between the two floating layers , the emitter trenches being respectively in contact with the floating layers ; at least two gate trenches disposed between the two emitter trenches ; at least two source diffusion layers disposed between the at least two gate trenches , the source diffusion layers being respectively in contact with the gate trenches ; an insulation film which covers a top surface of the channel layer , the two floating layers , the two emitter trenches , the at least two gate trenches , and a part of the at least two source diffusion layers , the insulating film having a plurality of holes ; and an emitter electrode formed on the insulating film and having a plurality of parts buried in each hole of the insulation film , the holes of the insulating film include i) a first hole for connection of the emitter electrode to the channel layer between the at least two gate trenches , ii) a second hole for connection of the emitter electrode to the channel layer between one of the two emitter trenches and an opposing gate trench of the at least two gate trenches , and (iii) a third hole for connection of the emitter electrode to the channel layer between the other of the two emitter trenches and an opposing gate trench of the at least two gate trenches . <EOS>