A pixel circuit of a display device comprising a display panel and a panel driver , the pixel circuit comprising: a light emitting diode configured to emit light in accordance with a drive current; a current source comprising a driving transistor (125-1, 125-2) connected to the light emitting diode , wherein the current source is configured to provide the drive current having a different amplitude to the light emitting diode in accordance with a level of a voltage applied to a gate terminal of the driving transistor (125-1, 125-2); an amplitude setting circuit configured to apply a voltage level determined by the panel driver to the gate terminal of the driving transistor (125-1, 125-2); and a pulse width control circuit configured to control a duration of the drive current by controlling the voltage applied to the gate terminal of the driving transistor (125-1, 125-2), based on a pulse width control voltage from the panel driver , characterized in that the pulse width control circuit comprises: a first switching element , a second switching element and a second capacitor ; wherein: the first switching element has an output terminal connected to the gate terminal of the driving transistor (125-1, 125-2) and an input terminal connected to a power supply terminal (VDD, VSS); the second switching element is connected between a control terminal and the output terminal of the first switching element and has a gate terminal configured to receive a control signal; the second capacitor has a first terminal connected to the control terminal of the first switching element and a second terminal to which the pulse width control voltage is applied. a light emitting diode configured to emit light in accordance with a drive current; a current source comprising a driving transistor (125-1, 125-2) connected to the light emitting diode , wherein the current source is configured to provide the drive current having a different amplitude to the light emitting diode in accordance with a level of a voltage applied to a gate terminal of the driving transistor (125-1, 125-2); an amplitude setting circuit configured to apply a voltage level determined by the panel driver to the gate terminal of the driving transistor (125-1, 125-2); and a pulse width control circuit configured to control a duration of the drive current by controlling the voltage applied to the gate terminal of the driving transistor (125-1, 125-2), based on a pulse width control voltage from the panel driver , a first switching element , a second switching element and a second capacitor ; wherein: the first switching element has an output terminal connected to the gate terminal of the driving transistor (125-1, 125-2) and an input terminal connected to a power supply terminal (VDD, VSS); the second switching element is connected between a control terminal and the output terminal of the first switching element and has a gate terminal configured to receive a control signal; the second capacitor has a first terminal connected to the control terminal of the first switching element and a second terminal to which the pulse width control voltage is applied. the first switching element has an output terminal connected to the gate terminal of the driving transistor (125-1, 125-2) and an input terminal connected to a power supply terminal (VDD, VSS); the second switching element is connected between a control terminal and the output terminal of the first switching element and has a gate terminal configured to receive a control signal; the second capacitor has a first terminal connected to the control terminal of the first switching element and a second terminal to which the pulse width control voltage is applied. <EOS>