A method for determining timing skew associated with an element under test of a multi-bit feedback digital to analog converter DAC , the feedback DAC being part of an analog-to-digital converter, ADC , comprising: shorting an analog input of the ADC to ground; applying a pseudo random dither signal to an input of the element wherein the feedback DAC has an output which is coupled to the analog input of the ADC, having a feedback loop configuration comprising the feedback DAC, and an input which is coupled to a digital output of the ADC; applying a clock signal to the feedback DAC, the clock signal being also applied to the element under test, wherein the clock signal is subject to a timing skew when applied to the element under test; wherein while the pseudo random dither signal is applied to the input of the element under test, the digital output of the ADC is applied to other elements of the feedback DAC ; determining a cross-correlation between the pseudo random dither signal and the digital output of the ADC, wherein the cross-correlation is a sliding product of the pseudo random dither signal and the digital output of the ADC; and determining the timing skew associated with the element under test of the feedback digital to analog converter based on the cross-correlation, wherein determining the timing skew further comprises determining a ratio of a value next to a peak value of the cross-correlation to a sum of the peak value of the cross correlation and the value next to the peak value of the cross-correlation, wherein the peak value of the cross-correlation corresponds to the value of the cross-correlation at a lag, I = 0 and wherein the value next to the peak value of the cross-correlation corresponds to the value of the cross-correlation at a lag, I = 1. shorting an analog input of the ADC to ground; applying a pseudo random dither signal to an input of the element wherein the feedback DAC has an output which is coupled to the analog input of the ADC, having a feedback loop configuration comprising the feedback DAC, and an input which is coupled to a digital output of the ADC; applying a clock signal to the feedback DAC, the clock signal being also applied to the element under test, wherein the clock signal is subject to a timing skew when applied to the element under test; wherein while the pseudo random dither signal is applied to the input of the element under test, the digital output of the ADC is applied to other elements of the feedback DAC ; determining a cross-correlation between the pseudo random dither signal and the digital output of the ADC, wherein the cross-correlation is a sliding product of the pseudo random dither signal and the digital output of the ADC; and determining the timing skew associated with the element under test of the feedback digital to analog converter based on the cross-correlation, wherein determining the timing skew further comprises determining a ratio of a value next to a peak value of the cross-correlation to a sum of the peak value of the cross correlation and the value next to the peak value of the cross-correlation, wherein the peak value of the cross-correlation corresponds to the value of the cross-correlation at a lag, I = 0 and wherein the value next to the peak value of the cross-correlation corresponds to the value of the cross-correlation at a lag, I = 1. <EOS>