A system comprising: a digital pulse width modulator subsystem ; a first path coupled to an output of the digital pulse width modulator subsystem and configured to drive an open-loop driver stage ; a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator , wherein one of the first path and the second path is selected for processing a signal based on one or more characteristics of the signal; and characterized by further comprising a calibration subsystem configured to detect a first gain of the first path, wherein the calibration subsystem is configured to use an integrator of the closed-loop analog pulse width modulator to determine the first gain of the first path in an analogue domain and, based on the detected first gain, to match a second gain of the second path in order that: the first gain of the first path and the second gain of the second path are approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching; wherein, when calibration is enabled, the integrator is configured to receive the output of the digital pulse width modulator subsystem at one input and the output of the open-loop driver stage at another input such that the output of the integrator is indicative of the detected first gain. a digital pulse width modulator subsystem ; a first path coupled to an output of the digital pulse width modulator subsystem and configured to drive an open-loop driver stage ; a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator , wherein one of the first path and the second path is selected for processing a signal based on one or more characteristics of the signal; and characterized by further comprising a calibration subsystem configured to detect a first gain of the first path, wherein the calibration subsystem is configured to use an integrator of the closed-loop analog pulse width modulator to determine the first gain of the first path in an analogue domain and, based on the detected first gain, to match a second gain of the second path in order that: the first gain of the first path and the second gain of the second path are approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching; wherein, when calibration is enabled, the integrator is configured to receive the output of the digital pulse width modulator subsystem at one input and the output of the open-loop driver stage at another input such that the output of the integrator is indicative of the detected first gain. the first gain of the first path and the second gain of the second path are approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching; wherein, when calibration is enabled, the integrator is configured to receive the output of the digital pulse width modulator subsystem at one input and the output of the open-loop driver stage at another input such that the output of the integrator is indicative of the detected first gain. <EOS>