An in-cell touch panel comprising: a first substrate and a second substrate disposed oppositely to each other; gate signal lines and data signal lines crossing each other and wherein adjacent two gate signal lines and data signal lines enclose a pixel; a common electrode layer which is divided into a plurality of self-capacitance electrodes by a plurality of strip-like slits (a) and partitioning gaps (b) and disposed on a side of the second substrate , which side faces the first substrate , a touch sensing chip and a plurality of wires connecting the self-capacitance electrodes to the touch sensing chip ; wherein the common electrode layer comprises the plurality of self-capacitance electrodes which are independent from each other and are distributed along an extending direction of each of the strip-like slits (a) and a direction crossing the strip-like slits (a); and the touch sensing chip is configured to apply common electrode signals to the self-capacitance electrodes in a display time period and determine touch positions by detecting capacitance value variation of self-capacitance electrodes in a touch time period; characterized in that every two adjacent rows of pixels constitute a pixel group and two gate signal lines for providing gate scanning signals respectively for these two rows of pixels are provided between these two rows of pixels, or two gate signal lines are provided between adjacent rows of pixels and every two adjacent columns of pixels as one pixel group share one data signal line between these two columns of pixels; and the wires are disposed at gaps between adjacent pixel groups and an extension direction of the wires is same as that of the gate signal lines or the data signal lines . a first substrate and a second substrate disposed oppositely to each other; gate signal lines and data signal lines crossing each other and wherein adjacent two gate signal lines and data signal lines enclose a pixel; a common electrode layer which is divided into a plurality of self-capacitance electrodes by a plurality of strip-like slits (a) and partitioning gaps (b) and disposed on a side of the second substrate , which side faces the first substrate , a touch sensing chip and a plurality of wires connecting the self-capacitance electrodes to the touch sensing chip ; wherein the common electrode layer comprises the plurality of self-capacitance electrodes which are independent from each other and are distributed along an extending direction of each of the strip-like slits (a) and a direction crossing the strip-like slits (a); and the touch sensing chip is configured to apply common electrode signals to the self-capacitance electrodes in a display time period and determine touch positions by detecting capacitance value variation of self-capacitance electrodes in a touch time period; characterized in that every two adjacent rows of pixels constitute a pixel group and two gate signal lines for providing gate scanning signals respectively for these two rows of pixels are provided between these two rows of pixels, or two gate signal lines are provided between adjacent rows of pixels and every two adjacent columns of pixels as one pixel group share one data signal line between these two columns of pixels; and the wires are disposed at gaps between adjacent pixel groups and an extension direction of the wires is same as that of the gate signal lines or the data signal lines . <EOS>