A transmitting apparatus comprising: an encoder configured to encode input bits to generate parity bits, wherein the parity bits are generated based on a low-density parity check, LDPC, code, a code rate of the LDPC code being 6/15 and a code length of the LDPC code being 64800; an interleaver comprising: a parity interleaver configured to interleave the parity bits, a group interleaver configured to split a codeword comprising the input bits and the interleaved parity bits into a plurality of bit groups and interleave the plurality of bit groups, and a block interleaver configured to interleave the bits of the interleaved plurality of bit groups using a plurality of columns to provide an interleaved codeword; a mapper configured to map the bits of the interleaved codeword onto constellation points for 16-quadrature amplitude modulation, QAM; and a transmitter configured to transmit a signal based on the constellation points, wherein the parity bits are generated based on a parity check matrix of the LDPC code, wherein the parity check matrix comprises an information sub-matrix corresponding to the information bits with a quasi-cyclic structure and a parity sub-matrix corresponding to the parity bits with a dual diagonal structure, wherein the number of the plurality of columns for the 16-QAM is 4, and wherein the plurality of bit groups are interleaved based on the following equation: Y j = X π j for 0 ≤ j < N group where X j is a jth bit group among the plurality of bit groups, Y j is a jth bit group among the interleaved plurality of bit groups, N group is a number of the plurality of bit groups, and π(j) denotes a permutation order, and wherein π(j) is defined as follows: an encoder configured to encode input bits to generate parity bits, wherein the parity bits are generated based on a low-density parity check, LDPC, code, a code rate of the LDPC code being 6/15 and a code length of the LDPC code being 64800; an interleaver comprising: a parity interleaver configured to interleave the parity bits, a group interleaver configured to split a codeword comprising the input bits and the interleaved parity bits into a plurality of bit groups and interleave the plurality of bit groups, and a block interleaver configured to interleave the bits of the interleaved plurality of bit groups using a plurality of columns to provide an interleaved codeword; a parity interleaver configured to interleave the parity bits, a group interleaver configured to split a codeword comprising the input bits and the interleaved parity bits into a plurality of bit groups and interleave the plurality of bit groups, and a block interleaver configured to interleave the bits of the interleaved plurality of bit groups using a plurality of columns to provide an interleaved codeword; a mapper configured to map the bits of the interleaved codeword onto constellation points for 16-quadrature amplitude modulation, QAM; and a transmitter configured to transmit a signal based on the constellation points, wherein the parity bits are generated based on a parity check matrix of the LDPC code, wherein the parity check matrix comprises an information sub-matrix corresponding to the information bits with a quasi-cyclic structure and a parity sub-matrix corresponding to the parity bits with a dual diagonal structure, wherein the number of the plurality of columns for the 16-QAM is 4, and wherein the plurality of bit groups are interleaved based on the following equation: Y j = X π j for 0 ≤ j < N group where X j is a jth bit group among the plurality of bit groups, Y j is a jth bit group among the interleaved plurality of bit groups, N group is a number of the plurality of bit groups, and π(j) denotes a permutation order, and wherein π(j) is defined as follows: <EOS>