A method of programming a NAND memory device which includes a plurality of memory cells coupled to a plurality of word lines (WL 1 -WL N ) and a plurality of bit lines (BL 1 -BL M ), the method comprising: performing a coarse programming on a selected word line (WL n ) among the plurality of word lines (WL 1 -WL N ); performing the coarse programming on an unselected word line (WL n+1 ) among the plurality of word lines (WL 1 -WL N ), the unselected word line (WL n+1 ) being adjacent to the selected word line (WL n ) on a bit line side; pre-charging an unselected bit line (BL m ) among the plurality of bit lines (BL 1 -BL M ) by applying a first pre-pulse voltage (V PP1 ) having a first width (W1) to the unselected bit line (BL m ) during a first period after performing the coarse programming on the selected word line (WL n ) and the adjacent unselected word line (WL n+1 ) ; performing a first action; and performing a fine programming on the selected word line (WL n ) during a second period subsequent to the first period, wherein the first action is either - turning on a channel between the unselected bit line (BL m ) and the unselected word line (WL n+1 ) at a start of the first period and turning off the channel between the unselected bit line (BL m ) and the unselected word line (WL n+1 ) prior to an end of the first period by applying a second pre-pulse voltage (V PP2 ) having a second width (W2) to the unselected word line (WL n+1 ), wherein the second width (W2) is smaller than the first width (W1), wherein a rising edge of the first pre-pulse voltage (V PP1 ) is aligned with a rising edge of the second pre-pulse voltage (V PP2 ); or - reducing a channel voltage of the selected word line (WL n ) during the first period. performing a coarse programming on a selected word line (WL n ) among the plurality of word lines (WL 1 -WL N ); performing the coarse programming on an unselected word line (WL n+1 ) among the plurality of word lines (WL 1 -WL N ), the unselected word line (WL n+1 ) being adjacent to the selected word line (WL n ) on a bit line side; pre-charging an unselected bit line (BL m ) among the plurality of bit lines (BL 1 -BL M ) by applying a first pre-pulse voltage (V PP1 ) having a first width (W1) to the unselected bit line (BL m ) during a first period after performing the coarse programming on the selected word line (WL n ) and the adjacent unselected word line (WL n+1 ) ; performing a first action; and performing a fine programming on the selected word line (WL n ) during a second period subsequent to the first period, wherein the first action is either - turning on a channel between the unselected bit line (BL m ) and the unselected word line (WL n+1 ) at a start of the first period and turning off the channel between the unselected bit line (BL m ) and the unselected word line (WL n+1 ) prior to an end of the first period by applying a second pre-pulse voltage (V PP2 ) having a second width (W2) to the unselected word line (WL n+1 ), wherein the second width (W2) is smaller than the first width (W1), wherein a rising edge of the first pre-pulse voltage (V PP1 ) is aligned with a rising edge of the second pre-pulse voltage (V PP2 ); or - reducing a channel voltage of the selected word line (WL n ) during the first period. - turning on a channel between the unselected bit line (BL m ) and the unselected word line (WL n+1 ) at a start of the first period and turning off the channel between the unselected bit line (BL m ) and the unselected word line (WL n+1 ) prior to an end of the first period by applying a second pre-pulse voltage (V PP2 ) having a second width (W2) to the unselected word line (WL n+1 ), wherein the second width (W2) is smaller than the first width (W1), wherein a rising edge of the first pre-pulse voltage (V PP1 ) is aligned with a rising edge of the second pre-pulse voltage (V PP2 ); or - reducing a channel voltage of the selected word line (WL n ) during the first period. <EOS>