A thin-film transistor (TFT) substrate manufacturing method, comprising the following steps: Step S1: providing a metal foil , depositing a graphene film on the metal foil , and applying an operation of changing graphene band gap to obtain a graphene semiconductor active layer ; Step S2: forming, through deposition, an inorganic insulation layer on the graphene semiconductor active layer ; Step S3: forming an organic base on the inorganic insulation layer to form a primary structure; Step S4: turning up-side down the primary structure formed in Step S3 to set the organic base as a bottommost layer and the metal foil as a topmost layer, and forming a photoresist layer , through a patterning operation with a mask, on the metal foil ; Step S5: subjecting the metal foil to etching by using the photoresist layer as a shielding layer so as to form a source electrode and a drain electrode that are spaced from each other; Step S6: forming an organic insulation layer on the photoresist layer and the graphene semiconductor active layer , and forming, through deposition, a gate electrode conductor layer on the organic insulation layer ; and Step S7: applying a photoresist peeling agent to remove the photoresist layer and also to have portions of the organic insulation layer and the gate electrode conductor layer that are located on the photoresist layer removed simultaneously with the photoresist layer such that a gate insulation layer is obtained with a remaining portion of the organic insulation layer so as to be located on the graphene semiconductor active layer and between the source electrode and the drain electrode and a gate electrode is obtained with a remaining portion of the gate electrode conductor layer so as to be located on the gate insulation layer . Step S1: providing a metal foil , depositing a graphene film on the metal foil , and applying an operation of changing graphene band gap to obtain a graphene semiconductor active layer ; Step S2: forming, through deposition, an inorganic insulation layer on the graphene semiconductor active layer ; Step S3: forming an organic base on the inorganic insulation layer to form a primary structure; Step S4: turning up-side down the primary structure formed in Step S3 to set the organic base as a bottommost layer and the metal foil as a topmost layer, and forming a photoresist layer , through a patterning operation with a mask, on the metal foil ; Step S5: subjecting the metal foil to etching by using the photoresist layer as a shielding layer so as to form a source electrode and a drain electrode that are spaced from each other; Step S6: forming an organic insulation layer on the photoresist layer and the graphene semiconductor active layer , and forming, through deposition, a gate electrode conductor layer on the organic insulation layer ; and Step S7: applying a photoresist peeling agent to remove the photoresist layer and also to have portions of the organic insulation layer and the gate electrode conductor layer that are located on the photoresist layer removed simultaneously with the photoresist layer such that a gate insulation layer is obtained with a remaining portion of the organic insulation layer so as to be located on the graphene semiconductor active layer and between the source electrode and the drain electrode and a gate electrode is obtained with a remaining portion of the gate electrode conductor layer so as to be located on the gate insulation layer . <EOS>