A display panel comprising: a base substrate having a front surface and a rear surface and comprising a hole area (PA) in which a through-hole (MH) passing through the front surface and the rear surface and a groove part (GV) surrounding the through-hole (MH) and recessed from the front surface are defined, an active area (DA) surrounding the hole area (PA), and a peripheral area (NDA) adjacent to the active area (DA); a circuit layer comprising a first circuit insulating layer disposed on the base substrate, a second circuit insulating layer disposed on the first circuit insulating layer , and a thin film transistor (TR1) disposed on the active area (DA); a display layer comprising a first display insulating layer disposed on the circuit layer, a second display insulating layer disposed on the first display insulating layer , and a light emitting element (OD) disposed on the active area (DA) and connected to the thin film transistor (TR1); a guide pattern (GPT) disposed on the circuit layer and disposed between the light emitting element (OD) and the groove part (GV) and including a plurality of patterns (GPTs) spaced apart from each other and radially arranged around the through-hole (MH); and an encapsulation layer which covers the light emitting element (OD) and comprises a first inorganic layer disposed on the active area (DA) and the hole area (PA), a second inorganic layer disposed on the first inorganic layer , and an organic layer disposed between the first inorganic layer and the second inorganic layer , wherein the organic layer covers at least a portion of the guide pattern (GPT). a base substrate having a front surface and a rear surface and comprising a hole area (PA) in which a through-hole (MH) passing through the front surface and the rear surface and a groove part (GV) surrounding the through-hole (MH) and recessed from the front surface are defined, an active area (DA) surrounding the hole area (PA), and a peripheral area (NDA) adjacent to the active area (DA); a circuit layer comprising a first circuit insulating layer disposed on the base substrate, a second circuit insulating layer disposed on the first circuit insulating layer , and a thin film transistor (TR1) disposed on the active area (DA); a display layer comprising a first display insulating layer disposed on the circuit layer, a second display insulating layer disposed on the first display insulating layer , and a light emitting element (OD) disposed on the active area (DA) and connected to the thin film transistor (TR1); a guide pattern (GPT) disposed on the circuit layer and disposed between the light emitting element (OD) and the groove part (GV) and including a plurality of patterns (GPTs) spaced apart from each other and radially arranged around the through-hole (MH); and an encapsulation layer which covers the light emitting element (OD) and comprises a first inorganic layer disposed on the active area (DA) and the hole area (PA), a second inorganic layer disposed on the first inorganic layer , and an organic layer disposed between the first inorganic layer and the second inorganic layer , wherein the organic layer covers at least a portion of the guide pattern (GPT). <EOS>