An apparatus for filtering noises in an input signal (B), comprising: a hysteresis filter circuit configured to filter hysteresis noises in the input signal (B) to obtain a first signal (C); an impulse noise filter circuit comprising a negative noise filter circuit configured to filter negative impulse noises in the first signal (C) to obtain a second signal (D); and a positive noise filter circuit coupled with the negative noise filter circuit in parallel, and configured to filter positive impulse noises in the first signal (C) to obtain a third signal (E); and a combiner circuit configured to combine the second signal (D) and the third signal (E) to obtain an output, signal (F); wherein the negative noise filter circuit comprises a first RC filter coupled with a first comparator in series, with the first RC filter receiving the first signal (C) and the first comparator outputting the second signal (D); and the positive noise filter circuit comprises a second RC filter coupled with a second comparator in series, with the second RC filter receiving the first signal (C) and the second comparator outputting the third signal (E); wherein the first RC filter comprises a first transistor and the second RC filter comprises a second transistor, the first transistor and the second transistor are configured to receive the first signal (C) such that the corresponding capacitors (C1, C2) in the first RC filter and the second RC filter are short-circuited when the first signal (C) is in high level. a hysteresis filter circuit configured to filter hysteresis noises in the input signal (B) to obtain a first signal (C); an impulse noise filter circuit comprising a negative noise filter circuit configured to filter negative impulse noises in the first signal (C) to obtain a second signal (D); and a positive noise filter circuit coupled with the negative noise filter circuit in parallel, and configured to filter positive impulse noises in the first signal (C) to obtain a third signal (E); and a negative noise filter circuit configured to filter negative impulse noises in the first signal (C) to obtain a second signal (D); and a positive noise filter circuit coupled with the negative noise filter circuit in parallel, and configured to filter positive impulse noises in the first signal (C) to obtain a third signal (E); and a combiner circuit configured to combine the second signal (D) and the third signal (E) to obtain an output, signal (F); wherein the negative noise filter circuit comprises a first RC filter coupled with a first comparator in series, with the first RC filter receiving the first signal (C) and the first comparator outputting the second signal (D); and the positive noise filter circuit comprises a second RC filter coupled with a second comparator in series, with the second RC filter receiving the first signal (C) and the second comparator outputting the third signal (E); wherein the first RC filter comprises a first transistor and the second RC filter comprises a second transistor, the first transistor and the second transistor are configured to receive the first signal (C) such that the corresponding capacitors (C1, C2) in the first RC filter and the second RC filter are short-circuited when the first signal (C) is in high level. <EOS>