A semiconductor device comprising: an output transistor provided between an input terminal (VBAT) supplied with electric power from outside and an output terminal (OUT) configured to be coupled to a load; a control circuit configured to switch on-off state of the output transistor by controlling a gate voltage of the output transistor with reference to a voltage at the output terminal (OUT); a negative potential clamp circuit configured to turn on the output transistor regardless of control from the control circuit when a negative voltage lower than a predetermined voltage is applied to the output terminal (OUT); a surge protection circuit provided between the input terminal (VBAT) and a ground terminal (VSS) and configured to enter a conduction state when a surge voltage is applied to the input terminal (VBAT); and a first gate protection Zener diode forward provided from the output terminal (OUT) to a gate of the output transistor , characterised in that the negative potential clamp circuit includes: one or more Zener diodes forward provided from the gate of the output transistor to the ground terminal (VSS); an N-channel MOS transistor provided between the one or more Zener diodes and the ground terminal (VSS); and a body diode formed between a source and a drain of the N-channel MOS transistor , as a backflow prevention diode serially and backward provided for the one or more Zener diodes . an output transistor provided between an input terminal (VBAT) supplied with electric power from outside and an output terminal (OUT) configured to be coupled to a load; a control circuit configured to switch on-off state of the output transistor by controlling a gate voltage of the output transistor with reference to a voltage at the output terminal (OUT); a negative potential clamp circuit configured to turn on the output transistor regardless of control from the control circuit when a negative voltage lower than a predetermined voltage is applied to the output terminal (OUT); a surge protection circuit provided between the input terminal (VBAT) and a ground terminal (VSS) and configured to enter a conduction state when a surge voltage is applied to the input terminal (VBAT); and a first gate protection Zener diode forward provided from the output terminal (OUT) to a gate of the output transistor , characterised in that the negative potential clamp circuit includes: one or more Zener diodes forward provided from the gate of the output transistor to the ground terminal (VSS); an N-channel MOS transistor provided between the one or more Zener diodes and the ground terminal (VSS); and a body diode formed between a source and a drain of the N-channel MOS transistor , as a backflow prevention diode serially and backward provided for the one or more Zener diodes . one or more Zener diodes forward provided from the gate of the output transistor to the ground terminal (VSS); an N-channel MOS transistor provided between the one or more Zener diodes and the ground terminal (VSS); and a body diode formed between a source and a drain of the N-channel MOS transistor , as a backflow prevention diode serially and backward provided for the one or more Zener diodes . <EOS>