Method to recover from an error state (E) in a serial communication with an integrated circuit card , where a serial communication protocol includes a transition from said error state (E) to a reset state (R) upon reception of a reset signal (RS) by said integrated circuit card , said serial communication including operating on a serial communication interface comprising at least a serial clock signal line (SCK) coupling a transmitter device and said integrated circuit card and on which a clock signal (CKS) is transmitted from the transmitter device to said integrated circuit card , said method including, upon detection of an error state (E), embedding at the transmitter device said reset signal in a serial clock signal (SCK) sent to the integrated circuit card as reference clock signal on said serial clock signal line (CKS), said reset signal being represented by a variation (VC) of parameters of the clock signal, checking (230, CC) the presence of said variation (VC) of parameters of the clock signal at the integrated circuit card , upon detecting (CC) the presence of said variation (VC) of parameters of the clock signal at the integrated circuit card performing said transition from an error state (E) to a reset state (R), said transmitter device also entering a reset state (R) after said operation of embedding at the transmitter device said reset signal, wherein upon detection of an error state (E) the transmitter device and the integrated circuit card enter a clock processing state (CP) during which they perform such variation (VC) of parameters of the clock signal and checking (CC) the presence of said variation of parameters of the clock signal, respectively, then the transmitter and the integrated circuit card enter the reset state (R) not subsequent, but aligned in time. said serial communication including operating on a serial communication interface comprising at least a serial clock signal line (SCK) coupling a transmitter device and said integrated circuit card and on which a clock signal (CKS) is transmitted from the transmitter device to said integrated circuit card , said method including, upon detection of an error state (E), embedding at the transmitter device said reset signal in a serial clock signal (SCK) sent to the integrated circuit card as reference clock signal on said serial clock signal line (CKS), said reset signal being represented by a variation (VC) of parameters of the clock signal, checking (230, CC) the presence of said variation (VC) of parameters of the clock signal at the integrated circuit card , upon detecting (CC) the presence of said variation (VC) of parameters of the clock signal at the integrated circuit card performing said transition from an error state (E) to a reset state (R), said transmitter device also entering a reset state (R) after said operation of embedding at the transmitter device said reset signal, wherein upon detection of an error state (E) the transmitter device and the integrated circuit card enter a clock processing state (CP) during which they perform such variation (VC) of parameters of the clock signal and checking (CC) the presence of said variation of parameters of the clock signal, respectively, then the transmitter and the integrated circuit card enter the reset state (R) not subsequent, but aligned in time. <EOS>