A semiconductor device comprising: at least one vertical-cavity surface-emitting laser, VCSEL, device formed from a layer structure that includes at least one bottom n-type layer , at least one intermediate p-type layer formed above the at least one bottom n-type layer , an n-type modulation doped quantum well structure formed above the at least one intermediate p-type layer , at least one spacer layer formed between the at least one intermediate p-type layer and the n-type modulation doped quantum well structure , and at least one top p-type layer formed above the n-type modulation doped quantum well structure ; an annealed oxygen implant region disposed vertically in the layer structure within the at least one spacer layer and configured to surround the VCSEL device; and an annealed n-type ion implant region disposed vertically in the layer structure within the at least one top p-type layer and configured to overlie the annealed oxygen implant region and surround the VCSEL device; an anode that contacts the at least one top p-type layer of the at least one VCSEL device; and a cathode that contacts the at least one bottom n-type layer of the at least one VCSEL device; wherein the anode and the cathode are electrically coupled to the at least one VCSEL device; wherein the anode overlies both the annealed n-type ion implant region and the annealed oxygen implant region ; and wherein the at least one intermediate p-type layer has a built-in hole charge Q p , the at least one bottom n-type layer has a built-in electron charge Q n , and the built-in hole charge Q p relative to the built-in electron charge Q n is configured for diode current-voltage characteristics of the VCSEL device based on voltages applied to the anode and the cathode . at least one vertical-cavity surface-emitting laser, VCSEL, device formed from a layer structure that includes at least one bottom n-type layer , at least one intermediate p-type layer formed above the at least one bottom n-type layer , an n-type modulation doped quantum well structure formed above the at least one intermediate p-type layer , at least one spacer layer formed between the at least one intermediate p-type layer and the n-type modulation doped quantum well structure , and at least one top p-type layer formed above the n-type modulation doped quantum well structure ; an annealed oxygen implant region disposed vertically in the layer structure within the at least one spacer layer and configured to surround the VCSEL device; and an annealed n-type ion implant region disposed vertically in the layer structure within the at least one top p-type layer and configured to overlie the annealed oxygen implant region and surround the VCSEL device; an anode that contacts the at least one top p-type layer of the at least one VCSEL device; and a cathode that contacts the at least one bottom n-type layer of the at least one VCSEL device; wherein the anode and the cathode are electrically coupled to the at least one VCSEL device; wherein the anode overlies both the annealed n-type ion implant region and the annealed oxygen implant region ; and wherein the at least one intermediate p-type layer has a built-in hole charge Q p , the at least one bottom n-type layer has a built-in electron charge Q n , and the built-in hole charge Q p relative to the built-in electron charge Q n is configured for diode current-voltage characteristics of the VCSEL device based on voltages applied to the anode and the cathode . <EOS>