A data processing system , comprising: a memory channel comprising at least one rank (134/ 136/ 138); and a data processor coupled to said memory channel and adapted to access said at least one rank (134/ 136/ 138), said data processor having refresh logic , wherein in response to an activation of said refresh logic , said data processor : generates refresh cycles to a bank of said memory channel , wherein said data processor selects one of a first state and a second state (606/608), wherein said first state corresponds to a first auto-refresh command that causes said data processor to auto-refresh said bank , and said second state corresponds to a second auto-refresh command (710/720) that causes said data processor to auto-refresh a selected subset of said bank ; initiates a switch between said first state and said second state (606/608) in response to said refresh logic detecting a first condition (618/622) related to said bank , wherein said data processor detects said first condition (618/622) in response to one or more of: a number of pending refreshes to said bank , a number of pending memory access requests to said bank , a priority of said pending memory access requests to said bank , and a type of said pending memory access requests to said bank ; and initiates a switch between said second state (606/608) and said first state in response to a detection of a second condition (620/624). a memory channel comprising at least one rank (134/ 136/ 138); and a data processor coupled to said memory channel and adapted to access said at least one rank (134/ 136/ 138), said data processor having refresh logic , wherein in response to an activation of said refresh logic , said data processor : generates refresh cycles to a bank of said memory channel , wherein said data processor selects one of a first state and a second state (606/608), wherein said first state corresponds to a first auto-refresh command that causes said data processor to auto-refresh said bank , and said second state corresponds to a second auto-refresh command (710/720) that causes said data processor to auto-refresh a selected subset of said bank ; initiates a switch between said first state and said second state (606/608) in response to said refresh logic detecting a first condition (618/622) related to said bank , wherein said data processor detects said first condition (618/622) in response to one or more of: a number of pending refreshes to said bank , a number of pending memory access requests to said bank , a priority of said pending memory access requests to said bank , and a type of said pending memory access requests to said bank ; and initiates a switch between said second state (606/608) and said first state in response to a detection of a second condition (620/624). generates refresh cycles to a bank of said memory channel , wherein said data processor selects one of a first state and a second state (606/608), wherein said first state corresponds to a first auto-refresh command that causes said data processor to auto-refresh said bank , and said second state corresponds to a second auto-refresh command (710/720) that causes said data processor to auto-refresh a selected subset of said bank ; initiates a switch between said first state and said second state (606/608) in response to said refresh logic detecting a first condition (618/622) related to said bank , wherein said data processor detects said first condition (618/622) in response to one or more of: a number of pending refreshes to said bank , a number of pending memory access requests to said bank , a priority of said pending memory access requests to said bank , and a type of said pending memory access requests to said bank ; and initiates a switch between said second state (606/608) and said first state in response to a detection of a second condition (620/624). <EOS>