A system for receiving signals from an array antenna that includes a first number of antenna elements , comprising codes generator module configured to generate a first number of different code signals each characterized by a unique code; a first number of multipliers , a first number of filter modules each preceding a respective multiplier of said first number of multipliers , and each configured to filter a respective array antenna element analog signal , wherein the array antenna element analog signals have the same center frequency and occupy the same bandwidth, wherein each filter module of the first number of filter modules is configured to generate a respective filtered array antenna element analog signal after filtering of a respective array antenna element analog signal , wherein each filter module is configured to reduce side-lobes in the frequency domain of the respective filtered array antenna element analog signal with respect to the respective array antenna element analog signal , wherein said first number of multipliers are each configured to receive said respective filtered array antenna element analog signal and a respective code signal of said first number of code signals and generate a corresponding multiplied analog signal characterized by its unique code, giving rise to a first number of multiplied analog signals ; a second number of summation modules configured to receive the first number of multiplied analog signals from said multipliers and generate a second number of summed analog signals ; a second number of analog to digital converters configured to receive said summed analog signals and generate said second number of summed digital signals; said summed digital signals are capable of being fed to a digital processor being configured to utilize said codes for generating a processed signal of said array antenna, wherein said second number falls in the range of 1 to less than said first number. codes generator module configured to generate a first number of different code signals each characterized by a unique code; a first number of multipliers , a first number of filter modules each preceding a respective multiplier of said first number of multipliers , and each configured to filter a respective array antenna element analog signal , wherein the array antenna element analog signals have the same center frequency and occupy the same bandwidth, wherein each filter module of the first number of filter modules is configured to generate a respective filtered array antenna element analog signal after filtering of a respective array antenna element analog signal , wherein each filter module is configured to reduce side-lobes in the frequency domain of the respective filtered array antenna element analog signal with respect to the respective array antenna element analog signal , wherein said first number of multipliers are each configured to receive said respective filtered array antenna element analog signal and a respective code signal of said first number of code signals and generate a corresponding multiplied analog signal characterized by its unique code, giving rise to a first number of multiplied analog signals ; a second number of summation modules configured to receive the first number of multiplied analog signals from said multipliers and generate a second number of summed analog signals ; a second number of analog to digital converters configured to receive said summed analog signals and generate said second number of summed digital signals; said summed digital signals are capable of being fed to a digital processor being configured to utilize said codes for generating a processed signal of said array antenna, wherein said second number falls in the range of 1 to less than said first number. <EOS>