An electronic device , comprising: a first voltage to current converter (60, MN1, MP1, MP2) generating a first current (I1) as a function of a first input voltage (V1) and a second voltage to current converter (62, MN2) generating a second current (I2) as a function of a second input voltage (V2), a third voltage to current converter (64, MN3) generating a reference current (Iref) as a function of a reference voltage (Vref); a current summing node (A) coupled to receive the first current (I1), second current (I2), and reference current (Iref) such that the first current (I1) is sourced to the current summing node (A), the second current (I2) is sunk from the current summing node (A), and the reference current is sunk from the current summing node (A); a buffer having an input and providing an output signal (Vout; VoutA), its input coupled to the current summing node (A), the output signal (Vout; VoutA) resulting from a comparison of said first (I1) and second (I2) currents generated as a function of first and second voltages (V1, V2), as well as said current (Iref) generated as a function of the reference voltage (Vref), wherein the buffer is configured to output the reference voltage (Vref) where the first current (I1) is greater than a sum of the second current (I2) and the reference current (Iref); wherein the buffer is configured to output a ground voltage where the first current (I1) is less than the sum of the second current (I2) and the reference current (Iref), wherein the electronic device is configured to generate a monitor signal based upon said output signal (Vout; VoutA) resulting from said comparison of said first (I1) and second (I2) currents generated as a function of said first and second voltages (V1, V2), as well as said current (Iref) generated as a function of the reference voltage (Vref). a first voltage to current converter (60, MN1, MP1, MP2) generating a first current (I1) as a function of a first input voltage (V1) and a second voltage to current converter (62, MN2) generating a second current (I2) as a function of a second input voltage (V2), a third voltage to current converter (64, MN3) generating a reference current (Iref) as a function of a reference voltage (Vref); a current summing node (A) coupled to receive the first current (I1), second current (I2), and reference current (Iref) such that the first current (I1) is sourced to the current summing node (A), the second current (I2) is sunk from the current summing node (A), and the reference current is sunk from the current summing node (A); a buffer having an input and providing an output signal (Vout; VoutA), its input coupled to the current summing node (A), the output signal (Vout; VoutA) resulting from a comparison of said first (I1) and second (I2) currents generated as a function of first and second voltages (V1, V2), as well as said current (Iref) generated as a function of the reference voltage (Vref), wherein the buffer is configured to output the reference voltage (Vref) where the first current (I1) is greater than a sum of the second current (I2) and the reference current (Iref); wherein the buffer is configured to output a ground voltage where the first current (I1) is less than the sum of the second current (I2) and the reference current (Iref), wherein the electronic device is configured to generate a monitor signal based upon said output signal (Vout; VoutA) resulting from said comparison of said first (I1) and second (I2) currents generated as a function of said first and second voltages (V1, V2), as well as said current (Iref) generated as a function of the reference voltage (Vref). <EOS>