An electronic circuit comprising: a first power rail ; a second power rail ; and a field effect transistor , FET, comprising: a first terminal coupled directly or indirectly to the first power rail; a second terminal coupled directly or indirectly to the second power rail; a channel of semiconductive material connecting the first terminal to the second terminal; a gate terminal to which a voltage may be applied to control a conductivity of said channel, said channel providing a conduction path from the first terminal to the second terminal; and a gate dielectric arranged to insulate the gate terminal from said channel, characterised in that said circuit comprises a layer or other body of dielectric material , said gate dielectric being a first portion of said layer or other body of dielectric material, and in that the first power rail comprises a first rail portion arranged on a first side of a second portion of the layer or other body of dielectric material, and the second power rail comprises a second rail portion arranged on a second side of the second portion of the layer or other body of dielectric material, said second side being opposite said first side, whereby said second portion of the layer or other body of dielectric material separates said first and second rail portions and with said first and second rail portions provides a capacitance to said circuit or, in other words, forms a capacitor. a first power rail ; a second power rail ; and a field effect transistor , FET, comprising: a first terminal coupled directly or indirectly to the first power rail; a second terminal coupled directly or indirectly to the second power rail; a channel of semiconductive material connecting the first terminal to the second terminal; a gate terminal to which a voltage may be applied to control a conductivity of said channel, said channel providing a conduction path from the first terminal to the second terminal; and a gate dielectric arranged to insulate the gate terminal from said channel, a first terminal coupled directly or indirectly to the first power rail; a second terminal coupled directly or indirectly to the second power rail; a channel of semiconductive material connecting the first terminal to the second terminal; a gate terminal to which a voltage may be applied to control a conductivity of said channel, said channel providing a conduction path from the first terminal to the second terminal; and a gate dielectric arranged to insulate the gate terminal from said channel, characterised in that said circuit comprises a layer or other body of dielectric material , said gate dielectric being a first portion of said layer or other body of dielectric material, and in that the first power rail comprises a first rail portion arranged on a first side of a second portion of the layer or other body of dielectric material, and the second power rail comprises a second rail portion arranged on a second side of the second portion of the layer or other body of dielectric material, said second side being opposite said first side, whereby said second portion of the layer or other body of dielectric material separates said first and second rail portions and with said first and second rail portions provides a capacitance to said circuit or, in other words, forms a capacitor. <EOS>