A motor control unit for controlling a three-phase electric motor on a basis of PWM signals that are generated for each of a plurality of PWM periods (Tc) included in a current control period (Ta), the motor control unit comprising: a PWM count generator as a PWM duty calculator that generates PWM counts of three phases for each current control period (Ta) on the basis of a three-phase voltage command value (V UVW *) which is calculated for each current control period (Ta); a common-mode noise reducer to which the generated PWM counts are supplied from the PWM count generator , a PWM count setter provided in the common mode noise reducer that sets the PWM counts (Cu, Cv, Cw) of the three phases generated for a specific current control period (Ta) by the PWM count generator, as PWM counts of the respective phases for each of the plurality of PWM periods (Tc) within the specific current control period (Ta); a PWM count changer provided in the common mode noise reducer that when the PWM count changer determines that, out of all possible combinations of any two of the three phases, at least one of the combinations has a difference (ΔCuv, ΔCvw, ΔCuw) in PWM count less than a threshold value (α), changes the PWM count of at least one of the two phases of the at least one of the combinations for each of the plurality of PWM periods (Tc) within the specific current control period (Ta), without changing a total of the PWM counts of the at least one of the two phases within the specific current control period (Ta), such that each of the combinations has a difference in PWM count greater than or equal to the threshold value (α); and a PWM signal generator as a PWM outputter that generates the PWM signals for the respective phases for each of the plurality of PWM periods (Tc), on the basis of the PWM counts that are set for the respective phases for each of the plurality of PWM periods (Tc) within the specific current control period (Ta) and that are changed by the PWM count changer. a PWM count generator as a PWM duty calculator that generates PWM counts of three phases for each current control period (Ta) on the basis of a three-phase voltage command value (V UVW *) which is calculated for each current control period (Ta); a common-mode noise reducer to which the generated PWM counts are supplied from the PWM count generator , a PWM count setter provided in the common mode noise reducer that sets the PWM counts (Cu, Cv, Cw) of the three phases generated for a specific current control period (Ta) by the PWM count generator, as PWM counts of the respective phases for each of the plurality of PWM periods (Tc) within the specific current control period (Ta); a PWM count changer provided in the common mode noise reducer that when the PWM count changer determines that, out of all possible combinations of any two of the three phases, at least one of the combinations has a difference (ΔCuv, ΔCvw, ΔCuw) in PWM count less than a threshold value (α), changes the PWM count of at least one of the two phases of the at least one of the combinations for each of the plurality of PWM periods (Tc) within the specific current control period (Ta), without changing a total of the PWM counts of the at least one of the two phases within the specific current control period (Ta), such that each of the combinations has a difference in PWM count greater than or equal to the threshold value (α); and a PWM signal generator as a PWM outputter that generates the PWM signals for the respective phases for each of the plurality of PWM periods (Tc), on the basis of the PWM counts that are set for the respective phases for each of the plurality of PWM periods (Tc) within the specific current control period (Ta) and that are changed by the PWM count changer. <EOS>