A computer device comprising at least one processor in communication with at least one memory device , wherein the at least one processor is programmed to: generate a model for simulating a portion of an assembly line based on a plurality of inspection data of that assembly line , wherein the assembly line includes at least a first device , a first inspection station subsequent to the first device , and a plurality of second devices , wherein the plurality of second devices are subsequent to the first device , wherein the assembly line includes a second inspection station subsequent to a second device of the plurality of second devices of the assembly line , and wherein the plurality of inspection data includes a first plurality of scan data of a plurality of semiconductor wafers at the first inspection station and a second plurality of scan data of the plurality of semiconductor wafers at the second inspection station ; store, in the at least one memory device , the model for simulating a portion of the assembly line ; receive scan data of a first inspection of a semiconductor wafer being assembled, wherein the first inspection is positioned at the first inspection station in the assembly line subsequent to the first device in the assembly line and prior to the plurality of second devices ; execute the model using the scan data as inputs to generate a final profile of the semiconductor wafer, wherein the model simulates an actual profile of the semiconductor wafer upon reaching the second inspection station ; compare the final profile to one or more thresholds; determine if the final profile exceeds at least one of the one or more thresholds; and if the determination is that the final profile exceeds at least one of the one or more thresholds, cause the first device to be adjusted. generate a model for simulating a portion of an assembly line based on a plurality of inspection data of that assembly line , wherein the assembly line includes at least a first device , a first inspection station subsequent to the first device , and a plurality of second devices , wherein the plurality of second devices are subsequent to the first device , wherein the assembly line includes a second inspection station subsequent to a second device of the plurality of second devices of the assembly line , and wherein the plurality of inspection data includes a first plurality of scan data of a plurality of semiconductor wafers at the first inspection station and a second plurality of scan data of the plurality of semiconductor wafers at the second inspection station ; store, in the at least one memory device , the model for simulating a portion of the assembly line ; receive scan data of a first inspection of a semiconductor wafer being assembled, wherein the first inspection is positioned at the first inspection station in the assembly line subsequent to the first device in the assembly line and prior to the plurality of second devices ; execute the model using the scan data as inputs to generate a final profile of the semiconductor wafer, wherein the model simulates an actual profile of the semiconductor wafer upon reaching the second inspection station ; compare the final profile to one or more thresholds; determine if the final profile exceeds at least one of the one or more thresholds; and if the determination is that the final profile exceeds at least one of the one or more thresholds, cause the first device to be adjusted. <EOS>