Arrangement for ascertaining an unambiguous circuit board identifier (SIG), by way of which an electronic component (BE) attached to a circuit board (PCB) can be unambiguously linked to the circuit board (PCB), wherein the arrangement at least has: - a PUF unit (RO-PUF) with ring oscillators (RO1, RO2, RO3, RO4), which ascertains the circuit board identifier (SIG) on the basis of frequencies (f1, f2, f3, f4) of the ring oscillators (RO1, RO2, RO3, RO4) and which is arranged in the electronic component (BE), - and delay elements (VE1, VE2, VE3, VE4), which are attached to the circuit board (PCB), wherein in each case a delay element (VE1, VE2, VE3, VE4) forms an oscillator loop of a ring oscillator (RO1, RO2, RO3, RO4) of the PUF unit (RO-PUF), characterised in that the delay elements (VE1, VE2, VE3, VE4) are embodied as conductor paths guided on the circuit board (PCB), that each delay element (VE1, VE2, VE3, VE4) has first sections (LE11, LE21), which are guided on a first conducting layer (L1) of the circuit board (PCB), and second sections (LE12, LE22), which are guided on a second conducting layer (L2) of the circuit board (PCB), that the first sections (LE11, LE21) of the respective delay elements (VE1, VE2, VE3, VE4) guided on the first conducting layer (L1) of the circuit board (PCB) and the second sections (LE12, LE22) of the respective delay elements (VE1, VE2, VE3, VE4) guided on the second conducting layer (L2) of the circuit board (PCB) are connected via electrical vias (D1, D2), and that two delay elements (VE1, VE2, VE3, VE4) in each case are arranged on the circuit board (PCB) in such a manner that the respective first sections (LE11, LE21) of the two delay elements (VE1, VE2, VE3, VE4) in each case overlap with the respective two sections (LE12, LE22) of the two delay elements (VE1, VE2, VE3, VE4) in each case at at least one point. - a PUF unit (RO-PUF) with ring oscillators (RO1, RO2, RO3, RO4), which ascertains the circuit board identifier (SIG) on the basis of frequencies (f1, f2, f3, f4) of the ring oscillators (RO1, RO2, RO3, RO4) and which is arranged in the electronic component (BE), - and delay elements (VE1, VE2, VE3, VE4), which are attached to the circuit board (PCB), wherein in each case a delay element (VE1, VE2, VE3, VE4) forms an oscillator loop of a ring oscillator (RO1, RO2, RO3, RO4) of the PUF unit (RO-PUF), characterised in that the delay elements (VE1, VE2, VE3, VE4) are embodied as conductor paths guided on the circuit board (PCB), that each delay element (VE1, VE2, VE3, VE4) has first sections (LE11, LE21), which are guided on a first conducting layer (L1) of the circuit board (PCB), and second sections (LE12, LE22), which are guided on a second conducting layer (L2) of the circuit board (PCB), that the first sections (LE11, LE21) of the respective delay elements (VE1, VE2, VE3, VE4) guided on the first conducting layer (L1) of the circuit board (PCB) and the second sections (LE12, LE22) of the respective delay elements (VE1, VE2, VE3, VE4) guided on the second conducting layer (L2) of the circuit board (PCB) are connected via electrical vias (D1, D2), and that two delay elements (VE1, VE2, VE3, VE4) in each case are arranged on the circuit board (PCB) in such a manner that the respective first sections (LE11, LE21) of the two delay elements (VE1, VE2, VE3, VE4) in each case overlap with the respective two sections (LE12, LE22) of the two delay elements (VE1, VE2, VE3, VE4) in each case at at least one point. <EOS>