Device (12; 32) for a serial bus system , having a transmission signal analysis module for counting edges of a transmission signal (TxD) that is to be sent to a bus of the bus system in order to exchange a message between subscriber stations of the bus system , a transmission module for sending a message based on the transmission signal (TxD) to the bus , a received signal analysis module for counting edges of a received signal (Rx_In) generated from a signal transmitted on the bus based on the transmission signal (TxD), wherein the bus states of the signal transmitted on the bus for the message in a first communication phase (451; 453, 451) differ from bus states (U_D0, U_D1) of the signal transmitted on the bus in a second communication phase of the message , the signal transmitted on the bus based on the transmission signal (TxD) being able to be overlapped by a signal that has been put onto the bus by another subscriber station of the bus system , and an evaluation module for evaluating the difference that arises from a comparison of the edges counted by the transmission signal analysis module and the edges counted by the received signal analysis module , wherein if the signal propagation time on the bus that the signal (CAN_H, CAN_L) generated from the transmission signal (TxD) has before the received signal (Rx_In) is received at the device (12; 32) is greater than the bit time (t_b2) of the received signal (Rx_In), the evaluation module is configured to signal whether the absolute value of the difference is less than or equal to a predetermined value, or whether the absolute value of the difference is greater than the predetermined value, and wherein the predetermined value is greater than zero. a transmission module for sending a message based on the transmission signal (TxD) to the bus , a received signal analysis module for counting edges of a received signal (Rx_In) generated from a signal transmitted on the bus based on the transmission signal (TxD), wherein the bus states of the signal transmitted on the bus for the message in a first communication phase (451; 453, 451) differ from bus states (U_D0, U_D1) of the signal transmitted on the bus in a second communication phase of the message , the signal transmitted on the bus based on the transmission signal (TxD) being able to be overlapped by a signal that has been put onto the bus by another subscriber station of the bus system , and an evaluation module for evaluating the difference that arises from a comparison of the edges counted by the transmission signal analysis module and the edges counted by the received signal analysis module , wherein if the signal propagation time on the bus that the signal (CAN_H, CAN_L) generated from the transmission signal (TxD) has before the received signal (Rx_In) is received at the device (12; 32) is greater than the bit time (t_b2) of the received signal (Rx_In), the evaluation module is configured to signal whether the absolute value of the difference is less than or equal to a predetermined value, or whether the absolute value of the difference is greater than the predetermined value, and wherein the predetermined value is greater than zero. <EOS>