A trench-type DMOS device, comprising: a substrate of a first conductive type, the substrate serving as a common drain region; an active region of a second conductive type formed on the substrate ; a first dielectric layer formed on the substrate , the first dielectric layer defining a plurality of trenches extending from a surface of the first dielectric layer to an interior of the substrate , the plurality of trenches comprising a first trench located in the active region ; conductive material filled in the plurality of trenches; an oxide layer positioned between the conductive material and trench walls of the plurality of trenches; a source electrode region located in the active region and adjacent to the first trench ; a second dielectric layer covering the first dielectric layer and the plurality of trenches; and a metallic layer covering the second dielectric layer , wherein the plurality of trenches comprises a second trench , the first trench being in communication with the second trench , and the metallic layer comprises a first electrode region and a second electrode region insulated from each other, the first electrode region is electrically connected to the source electrode region via a first conductive pole which extends through the first dielectric layer and the second dielectric layer , thereby forming a source electrode, the second electrode region is electrically connected to the conductive material in the second trench via a second conductive pole which extends through the second dielectric layer , thereby forming a gate electrode, characterized in that the second trench is located outside the active region . a substrate of a first conductive type, the substrate serving as a common drain region; an active region of a second conductive type formed on the substrate ; a first dielectric layer formed on the substrate , the first dielectric layer defining a plurality of trenches extending from a surface of the first dielectric layer to an interior of the substrate , the plurality of trenches comprising a first trench located in the active region ; conductive material filled in the plurality of trenches; an oxide layer positioned between the conductive material and trench walls of the plurality of trenches; a source electrode region located in the active region and adjacent to the first trench ; a second dielectric layer covering the first dielectric layer and the plurality of trenches; and a metallic layer covering the second dielectric layer , wherein the plurality of trenches comprises a second trench , the first trench being in communication with the second trench , and the metallic layer comprises a first electrode region and a second electrode region insulated from each other, the first electrode region is electrically connected to the source electrode region via a first conductive pole which extends through the first dielectric layer and the second dielectric layer , thereby forming a source electrode, the second electrode region is electrically connected to the conductive material in the second trench via a second conductive pole which extends through the second dielectric layer , thereby forming a gate electrode, characterized in that the second trench is located outside the active region . <EOS>