A circuit arrangement for combined protection of a load from temporary and transient overvoltages with emergency operation of the load in the presence of a temporary overvoltage and with integrated follow current limitation, wherein the circuit arrangement includes network-side input terminals (E) and load-side output terminals (A), and wherein a first surge arrester is provided between the network-side input terminals (E) and a second surge arrester is provided in an output-side parallel branch between the load-side output terminals (A) for follow current limitation, wherein at least one respective controlled semiconductor switch is provided in a series branch between the input and output terminals (E; A) and in the output-side parallel branch, wherein a mechanical switch (S) and a series capacitor (C Längs ) are each connected in parallel with the semiconductor switch (HL Längs ) in the series branch, furthermore, the semiconductor switch (HL Quer ) in the parallel branch is part of a series circuit which comprises a parallel circuit made up of the second surge arrester and a parallel capacitor (C Quer ), with a series inductance (L) in the series branch between one of the input terminals (E), on the one hand, and the parallel circuit made up of the series capacitor (C Längs ), the controlled semiconductor switch (HL Längs ) in the series branch and the mechanical switch (S), on the other hand, and with a microcontroller (μC) for controlling the semiconductor switches (HL Längs , HL Qouer ), wherein the microcontroller (μC) is connected to a current detector (SD) in the series branch, and wherein the series and parallel capacitors (C Längs /C Quer ) form a capacitive voltage divider. wherein the circuit arrangement includes network-side input terminals (E) and load-side output terminals (A), and wherein a first surge arrester is provided between the network-side input terminals (E) and a second surge arrester is provided in an output-side parallel branch between the load-side output terminals (A) for follow current limitation, wherein at least one respective controlled semiconductor switch is provided in a series branch between the input and output terminals (E; A) and in the output-side parallel branch, wherein a mechanical switch (S) and a series capacitor (C Längs ) are each connected in parallel with the semiconductor switch (HL Längs ) in the series branch, furthermore, the semiconductor switch (HL Quer ) in the parallel branch is part of a series circuit which comprises a parallel circuit made up of the second surge arrester and a parallel capacitor (C Quer ), with a series inductance (L) in the series branch between one of the input terminals (E), on the one hand, and the parallel circuit made up of the series capacitor (C Längs ), the controlled semiconductor switch (HL Längs ) in the series branch and the mechanical switch (S), on the other hand, and with a microcontroller (μC) for controlling the semiconductor switches (HL Längs , HL Qouer ), wherein the microcontroller (μC) is connected to a current detector (SD) in the series branch, and wherein the series and parallel capacitors (C Längs /C Quer ) form a capacitive voltage divider. <EOS>