An integration circuit having a first input terminal (In1) configured to receive a first input signal (I1), a second input terminal (In2) configured to receive a second input signal , an output terminal (Out) configured to provide an output signal (Vout) as a function of the first and the second input signal (I1, I2), a first and a second amplifier (A1, A2), each of the first and second amplifier (A1, A2) having a non-inverting input terminal, an inverting input terminal and an output and a capacitor (C) which is switchably coupled in a feedback loop either of the first or of the second amplifier (A1, A2) such that the capacitor (C) and said first or second amplifier (A1, A2), respectively, form an inverting integrator (Int) providing the output signal (Vout), wherein the feedback loop of the first amplifier (A1) extends between the output of the first amplifier (A1) and its inverting input terminal, and the feedback loop of the second amplifier (A2) extends between the output of the second amplifier (A2) and its inverting input terminal, wherein the integration circuit is configured to be operated in a first, a second, a third and a fourth subphase, wherein the first or second amplifier (A1, A2) which does not form the inverting integrator (Int) in said first, second, third and fourth subphase is configured in unity feedback forming a dummy amplifier, wherein in each of : the first and second subphases the first amplifier (A1) is configured as the inverting integrator and the second amplifier (A2) is configured as the dummy amplifier, and wherein in the first subphase the inverting integrator (Int) is configured to receive the first input signal (I1) and the dummy amplifier is configured to receive the second input signal (I2), and in the second subphase the inverting integrator (Int) is configured to receive the second input signal and the dummy amplifier is configured to receive the first input signal (I1), wherein in each of the third and fourth subphases the second amplifier (A2) : is configured as the inverting integrator (Int) and the first amplifier (A1) is configured as the dummy amplifier, and wherein in the third subphase the inverting integrator (Int) is configured to receive the first input signal (I1) and the dummy amplifier is configured to receive the second input signal (I2), and in the fourth subphase the inverting integrator (Int) is configured to receive the second input signal and the dummy amplifier is configured to receive the first input signal (I1), wherein the output signal (Vout) is provided as a function of a time continuous integration of a ratio of the first and the second input signal (I1, I2), wherein the integration circuit is configured to be operated during a predefined measurement period which is divided in a first and a second phase, wherein the first phase of the predefined measurement period comprises at least one first and one second subphase, and wherein the second phase of the predefined measurement period comprises at least one third and one fourth subphase, wherein the inverting input terminal of the first amplifier (A1) is switchably connected either to the first or to the second input terminal (In1, In2) as a function of the first, second, third and fourth subphase, and the non-inverting input terminal is configured to receive a reference signal (Vref), and the inverting input terminal of the second amplifier (A2) is switchably connected either to the first or to the second input terminal (In1, In2) as a function of the first, second, third and fourth subphase, and the non-inverting input terminal is configured to receive the reference signal (Vref). <EOS>