A solid state non-volatile memory storage drive configured to be connected to a computing device , the solid state non-volatile memory storage drive comprising: an array of two-terminal memory cells arranged to be operated in conjunction with a plurality of wordlines and a plurality of bitlines ; and a memory controller configured to access at least a subset of the two-terminal memory cells , the subset comprising equal or less than a page of two-terminal memory cells, and configured to write a set of data to and overwrite the set of data at the subset of the two-terminal memory cells, providing the solid state non-volatile memory storage drive a write amplification less than 2 and equal to or greater than one; characterized in that each bit line from the plurality of bitlines is coupled to first terminals of a first plurality of two-terminal memory cells , and wherein each wordline from the plurality of word lines is coupled by one single word line select transistor to second terminals of a second plurality of two-terminal memory cells , further comprising a local wordline connected to respective ones of the subset of the two-terminal memory elements at respective second terminals thereof, the local wordline configured to be activated by one of the plurality of word lines , wherein the one of the plurality of word lines is configured to activate a plurality of local word lines , including the local wordline , that are respectively connected to respective subsets of the page of two-terminal memory cells ; wherein activation of one of the plurality of local word lines allows writing the set of data to and overwriting the set of data at one of the respective subsets of the page of two-terminal memory cells . an array of two-terminal memory cells arranged to be operated in conjunction with a plurality of wordlines and a plurality of bitlines ; and a memory controller configured to access at least a subset of the two-terminal memory cells , the subset comprising equal or less than a page of two-terminal memory cells, and configured to write a set of data to and overwrite the set of data at the subset of the two-terminal memory cells, providing the solid state non-volatile memory storage drive a write amplification less than 2 and equal to or greater than one; characterized in that each bit line from the plurality of bitlines is coupled to first terminals of a first plurality of two-terminal memory cells , and wherein each wordline from the plurality of word lines is coupled by one single word line select transistor to second terminals of a second plurality of two-terminal memory cells , further comprising a local wordline connected to respective ones of the subset of the two-terminal memory elements at respective second terminals thereof, the local wordline configured to be activated by one of the plurality of word lines , wherein the one of the plurality of word lines is configured to activate a plurality of local word lines , including the local wordline , that are respectively connected to respective subsets of the page of two-terminal memory cells ; wherein activation of one of the plurality of local word lines allows writing the set of data to and overwriting the set of data at one of the respective subsets of the page of two-terminal memory cells . <EOS>