An integrated circuit device comprising: a substrate; a voltage monitor circuit formed on the substrate; a trimming circuit formed on the substrate including: a successive approximation register circuit having an input coupled to an output of the voltage monitor circuit ; a beta multiplier circuit having: an input coupled to an output of the successive approximation register circuit , an output coupled to a first input of the voltage monitor circuit, and a variable resistance circuit , wherein a resistance value of the variable resistance circuit is controlled by the output of the successive approximation register circuit ; a first buffer having a current input node coupled to the output of the beta multiplier circuit; and a second buffer having an input connected to an output of the first buffer, and an output coupled to the first input of the voltage monitor circuit; wherein the beta multiplier circuit further comprises: a first current mirror ; a second current mirror coupled to the first current mirror; a voltage to current converter circuit coupled to the first current mirror, and wherein the voltage to current converter circuit is coupled to the current input node of the first buffer ; and wherein a change in the resistance value of the variable resistance circuit changes the value of the current provided to the first buffer . a substrate; a voltage monitor circuit formed on the substrate; a trimming circuit formed on the substrate including: a successive approximation register circuit having an input coupled to an output of the voltage monitor circuit ; a beta multiplier circuit having: an input coupled to an output of the successive approximation register circuit , an output coupled to a first input of the voltage monitor circuit, and a variable resistance circuit , wherein a resistance value of the variable resistance circuit is controlled by the output of the successive approximation register circuit ; a successive approximation register circuit having an input coupled to an output of the voltage monitor circuit ; a beta multiplier circuit having: an input coupled to an output of the successive approximation register circuit , an output coupled to a first input of the voltage monitor circuit, and a variable resistance circuit , wherein a resistance value of the variable resistance circuit is controlled by the output of the successive approximation register circuit ; an input coupled to an output of the successive approximation register circuit , an output coupled to a first input of the voltage monitor circuit, and a variable resistance circuit , wherein a resistance value of the variable resistance circuit is controlled by the output of the successive approximation register circuit ; a first buffer having a current input node coupled to the output of the beta multiplier circuit; and a second buffer having an input connected to an output of the first buffer, and an output coupled to the first input of the voltage monitor circuit; wherein the beta multiplier circuit further comprises: a first current mirror ; a second current mirror coupled to the first current mirror; a voltage to current converter circuit coupled to the first current mirror, and wherein the voltage to current converter circuit is coupled to the current input node of the first buffer ; and wherein a change in the resistance value of the variable resistance circuit changes the value of the current provided to the first buffer . a first current mirror ; a second current mirror coupled to the first current mirror; a voltage to current converter circuit coupled to the first current mirror, and wherein the voltage to current converter circuit is coupled to the current input node of the first buffer ; and wherein a change in the resistance value of the variable resistance circuit changes the value of the current provided to the first buffer . <EOS>