A display device (EA) comprising: a base layer (BS) comprising a first region (AR1), a second region (AR2) surrounding the first region (AR1), and a third region (AR3) surrounding the second region (AR2); first signal line parts (SLP1) disposed on the second region (AR2) and the third region (AR3) and arranged spaced apart from each other in a first direction (DR1); second signal line parts (SLP2) disposed on the second region (AR2) and the third region (AR3) and arranged spaced apart from each other in a second direction (DR2) crossing the first direction (DR1); and pixels (PX) disposed on the third region (AR3) and electrically connected to one first signal line part (SLP1) among the first signal line parts (SLP1), wherein each of the first signal line parts (SLP1) comprises: a first line (LN1b); a second line (LN2b) spaced apart from the first line (LN1b); and a first connection part (CEP1) configured to connect the first line (LN1b) and the second line (LN2b) through a through hole defined in an insulating layer configured to cover at least one of the first line (LN1b) and the second line (LN2b), and wherein the first connection parts (CEP1) comprise a plurality of overlapped connection parts (CEP-O), the plurality of overlapped connection parts (CEP-O) overlaps the second signal line parts (SLP2), and wherein at least a portion of each of two adjacent overlapped connection parts (CEP-O) among the plurality of overlapped connection parts do not overlap each other when viewed in the first direction (DR1). a base layer (BS) comprising a first region (AR1), a second region (AR2) surrounding the first region (AR1), and a third region (AR3) surrounding the second region (AR2); first signal line parts (SLP1) disposed on the second region (AR2) and the third region (AR3) and arranged spaced apart from each other in a first direction (DR1); second signal line parts (SLP2) disposed on the second region (AR2) and the third region (AR3) and arranged spaced apart from each other in a second direction (DR2) crossing the first direction (DR1); and pixels (PX) disposed on the third region (AR3) and electrically connected to one first signal line part (SLP1) among the first signal line parts (SLP1), wherein each of the first signal line parts (SLP1) comprises: a first line (LN1b); a second line (LN2b) spaced apart from the first line (LN1b); and a first connection part (CEP1) configured to connect the first line (LN1b) and the second line (LN2b) through a through hole defined in an insulating layer configured to cover at least one of the first line (LN1b) and the second line (LN2b), and a first line (LN1b); a second line (LN2b) spaced apart from the first line (LN1b); and a first connection part (CEP1) configured to connect the first line (LN1b) and the second line (LN2b) through a through hole defined in an insulating layer configured to cover at least one of the first line (LN1b) and the second line (LN2b), and wherein the first connection parts (CEP1) comprise a plurality of overlapped connection parts (CEP-O), the plurality of overlapped connection parts (CEP-O) overlaps the second signal line parts (SLP2), and wherein at least a portion of each of two adjacent overlapped connection parts (CEP-O) among the plurality of overlapped connection parts do not overlap each other when viewed in the first direction (DR1). <EOS>