A semiconductor III-V structure, comprising: - a substrate; - an epitaxial III-N semiconducting layer stack on top of said substrate, said epitaxial III-N semiconducting layer stack comprising an active layer, said active layer comprising ∘ a first active III-N layer ; and ∘ a second active III-N layer ; with a two dimensional Electron Gas between said first active III-N layer and said second active III-N layer ; - a protection layer stack for the active layer for use as a mask comprising: ∘ a III-V evaporation layer on said second III-N active layer , wherein the III-V evaporation layer has a thickness of 2-10 nm thick; ∘ a III-V etch stop layer on top of the III-V evaporation layer ; and ∘ a mask layer on top of the etch stop layer ; wherein said mask layer and said III-V etch stop layer are locally removed in a gate region and/or source and drain regions, leaving said III-V evaporation layer intact, and wherein said III-V evaporation layer is evaporated in said gate region and/or said source and drain regions, thereby exposing said second active III-N layer ; and wherein said semiconductor III-V structure further comprises: - a gate comprising a III-V material, said gate being selectively and epitaxially re-grown through said protection layer stack on said second active III-N layer in said gate region; and/or - a source selectively and epitaxially re-grown through said protection layer stack on said second active III-N layer in said source region, and a drain selectively and epitaxially re-grown through said protection layer stack on said second active III-N layer in said drain region. - a substrate; - an epitaxial III-N semiconducting layer stack on top of said substrate, said epitaxial III-N semiconducting layer stack comprising an active layer, said active layer comprising ∘ a first active III-N layer ; and ∘ a second active III-N layer ; with a two dimensional Electron Gas between said first active III-N layer and said second active III-N layer ; ∘ a first active III-N layer ; and ∘ a second active III-N layer ; with a two dimensional Electron Gas between said first active III-N layer and said second active III-N layer ; - a protection layer stack for the active layer for use as a mask comprising: ∘ a III-V evaporation layer on said second III-N active layer , wherein the III-V evaporation layer has a thickness of 2-10 nm thick; ∘ a III-V etch stop layer on top of the III-V evaporation layer ; and ∘ a mask layer on top of the etch stop layer ; wherein said mask layer and said III-V etch stop layer are locally removed in a gate region and/or source and drain regions, leaving said III-V evaporation layer intact, and wherein said III-V evaporation layer is evaporated in said gate region and/or said source and drain regions, thereby exposing said second active III-N layer ; ∘ a III-V evaporation layer on said second III-N active layer , wherein the III-V evaporation layer has a thickness of 2-10 nm thick; ∘ a III-V etch stop layer on top of the III-V evaporation layer ; and ∘ a mask layer on top of the etch stop layer ; - a gate comprising a III-V material, said gate being selectively and epitaxially re-grown through said protection layer stack on said second active III-N layer in said gate region; and/or - a source selectively and epitaxially re-grown through said protection layer stack on said second active III-N layer in said source region, and a drain selectively and epitaxially re-grown through said protection layer stack on said second active III-N layer in said drain region. <EOS>