A RADAR cascaded synchronization system comprising: a first one of a plurality of RADAR systems forming a master including: a clock modulation circuit configured to transmit a sequence of clock cycles of a clock , and to change the amplitude of the sequence of clock cycles in response to a Ramp Frame Start, RFS, signal , wherein a code is defined by a duration of the sequence of modulated clock cycles and wherein an additional code is defined by a different duration of the sequence of modulated clock cycles, a Local Oscillator, LO, transmitter circuit configured to transmit an LO signal , and a master state machine configured to communicate the code or the additional code to the clock modulation circuit to generate the sequence of modulated clock cycles for at least the duration; and a second one of the RADAR systems forming a slave including: a clock demodulation circuit configured to receive the sequence of clock cycles and to recover the clock and the RFS signal therefrom, wherein a clock leading edge of the clock is phase aligned to an RFS leading edge of the RFS signal, a decoder configured to determine the code or the additional code by determining the duration of the sequence of modulated clock cycles, and an LO receiver circuit configured to receive the LO signal and perform an action with a radio frequency circuit based on the code or the additional code determined by the decoder, wherein the code and the additional code correspond to different actions. a clock modulation circuit configured to transmit a sequence of clock cycles of a clock , and to change the amplitude of the sequence of clock cycles in response to a Ramp Frame Start, RFS, signal , wherein a code is defined by a duration of the sequence of modulated clock cycles and wherein an additional code is defined by a different duration of the sequence of modulated clock cycles, a Local Oscillator, LO, transmitter circuit configured to transmit an LO signal , and a master state machine configured to communicate the code or the additional code to the clock modulation circuit to generate the sequence of modulated clock cycles for at least the duration; and a second one of the RADAR systems forming a slave including: a clock demodulation circuit configured to receive the sequence of clock cycles and to recover the clock and the RFS signal therefrom, wherein a clock leading edge of the clock is phase aligned to an RFS leading edge of the RFS signal, a decoder configured to determine the code or the additional code by determining the duration of the sequence of modulated clock cycles, and an LO receiver circuit configured to receive the LO signal and perform an action with a radio frequency circuit based on the code or the additional code determined by the decoder, wherein the code and the additional code correspond to different actions. a clock demodulation circuit configured to receive the sequence of clock cycles and to recover the clock and the RFS signal therefrom, wherein a clock leading edge of the clock is phase aligned to an RFS leading edge of the RFS signal, a decoder configured to determine the code or the additional code by determining the duration of the sequence of modulated clock cycles, and an LO receiver circuit configured to receive the LO signal and perform an action with a radio frequency circuit based on the code or the additional code determined by the decoder, wherein the code and the additional code correspond to different actions. <EOS>