A semiconductor device manufacturing method comprising: an irradiation step of performing two proton irradiation processes with different acceleration energy levels from a rear surface (D0) of a silicon substrate of an n-type; an annealing step of activating the protons radiated in the irradiation step using annealing to form two n-type silicon layers with a higher impurity concentration than the silicon substrate in a surface layer of the rear surface (DO) of the silicon substrate , wherein the impurity concentration distributions of the two n-type silicon layers have the same peak position in a depth direction of the semiconductor substrate , the impurity concentration distribution of the first n-type silicon layer being narrower than the impurity concentration distribution of the second n-type silicon layer ; a grinding step of grinding the rear surface (D0) of the silicon substrate such that the two n-type silicon layers are sequentially exposed on the rear surface (D0), which grinding step is applied after the annealing step; a contact forming step of forming a p+ collector layer , which is a contact portion with an output electrode , on the rear surface (D0) of the silicon substrate after the annealing step, which contact forming step is applied after the grinding step; and an output electrode forming step of forming the output electrode that comes into contact with the p+ collector layer , wherein, in the irradiation step, a projected range of each of the two proton irradiation processes is adjusted such that a portion which will be the surface layer of the rear surface (D0) of the silicon substrate after the grinding step is disposed in the two n-type silicon layers in a depth direction of the silicon substrate . an irradiation step of performing two proton irradiation processes with different acceleration energy levels from a rear surface (D0) of a silicon substrate of an n-type; an annealing step of activating the protons radiated in the irradiation step using annealing to form two n-type silicon layers with a higher impurity concentration than the silicon substrate in a surface layer of the rear surface (DO) of the silicon substrate , wherein the impurity concentration distributions of the two n-type silicon layers have the same peak position in a depth direction of the semiconductor substrate , the impurity concentration distribution of the first n-type silicon layer being narrower than the impurity concentration distribution of the second n-type silicon layer ; a grinding step of grinding the rear surface (D0) of the silicon substrate such that the two n-type silicon layers are sequentially exposed on the rear surface (D0), which grinding step is applied after the annealing step; a contact forming step of forming a p+ collector layer , which is a contact portion with an output electrode , on the rear surface (D0) of the silicon substrate after the annealing step, which contact forming step is applied after the grinding step; and an output electrode forming step of forming the output electrode that comes into contact with the p+ collector layer , wherein, in the irradiation step, a projected range of each of the two proton irradiation processes is adjusted such that a portion which will be the surface layer of the rear surface (D0) of the silicon substrate after the grinding step is disposed in the two n-type silicon layers in a depth direction of the silicon substrate . <EOS>