A light emitting diode chip comprising: a substrate ; a first conductivity type semiconductor layer disposed on the substrate ; a mesa disposed on the first conductivity type semiconductor layer and comprising an active layer and a second conductivity type semiconductor layer ; an insulation layer covering the first conductivity type semiconductor layer and the mesa , the insulation layer comprising at least one first opening exposing the first conductivity type semiconductor layer and a second opening disposed on the mesa ; a first pad electrode disposed on the insulation layer and electrically connected to the first conductivity type semiconductor layer through the first opening ; and a second pad electrode disposed on the insulation layer and electrically connected to the second conductivity type semiconductor layer through the second opening , wherein the first opening of the insulation layer comprises a first region (140a1) covered by the first pad electrode and a second region (140a2) exposed outside the first pad electrode , wherein the first pad electrode contacts to a region of the first conductivity type semiconductor layer exposed by the first region (140a1) of the first opening , and wherein a region of the first conductivity type semiconductor layer is exposed by the second region (140a2) of the first opening and the first pad electrode , characterized in that the first opening exposes the upper surface and the side surface of the first conductivity type semiconductor layer , wherein the second region (140a2) of the first opening is formed on the upper surface of the first conductive type semiconductor layer and extends to the side surface of the first conductive type semiconductor layer . a substrate ; a first conductivity type semiconductor layer disposed on the substrate ; a mesa disposed on the first conductivity type semiconductor layer and comprising an active layer and a second conductivity type semiconductor layer ; an insulation layer covering the first conductivity type semiconductor layer and the mesa , the insulation layer comprising at least one first opening exposing the first conductivity type semiconductor layer and a second opening disposed on the mesa ; a first pad electrode disposed on the insulation layer and electrically connected to the first conductivity type semiconductor layer through the first opening ; and a second pad electrode disposed on the insulation layer and electrically connected to the second conductivity type semiconductor layer through the second opening , wherein the first opening of the insulation layer comprises a first region (140a1) covered by the first pad electrode and a second region (140a2) exposed outside the first pad electrode , wherein the first pad electrode contacts to a region of the first conductivity type semiconductor layer exposed by the first region (140a1) of the first opening , and wherein a region of the first conductivity type semiconductor layer is exposed by the second region (140a2) of the first opening and the first pad electrode , characterized in that the first opening exposes the upper surface and the side surface of the first conductivity type semiconductor layer , wherein the second region (140a2) of the first opening is formed on the upper surface of the first conductive type semiconductor layer and extends to the side surface of the first conductive type semiconductor layer . <EOS>