An apparatus for adjusting a data transmission rate, wherein the apparatus comprising: a processor , a memory , a buffer , a bus system , a receiver , and a transmitter ; wherein the processor , the memory , the buffer , the receiver , and the transmitter are connected to each other by using the bus system , wherein the memory is configured to store an instruction, and the processor is configured to execute the instruction stored by the memory , so as to control the receiver to receive a signal, control the transmitter to send a signal, and control the buffer to buffer data; the processor is configured to acquire information for resource scheduling that is determined by a base station according to information about resource quantity, wherein the information about resource quantity indicates a quantity of resources which the base station is able to schedule; the receiver is configured to receive first frequency domain data transmitted at a first transmission rate; the buffer is configured to: according to information for resource scheduling, buffer first frequency domain data borne by an occupied data bearer unit, and discard first frequency domain data borne by an idle data bearer unit; and the transmitter is configured to transmit, at a second transmission rate, the buffered first frequency domain data, wherein the second transmission rate is lower than the first transmission rate, characterized in that before the transmitter transmits, at the second transmission rate, the buffered first frequency domain data, the processor is further configured to determine reference signal data comprised in received frequency domain data of downlink physical layer transmitted at the first transmission rate; and the buffer is further configure to buffer the reference signal data. a processor , a memory , a buffer , a bus system , a receiver , and a transmitter ; wherein the processor , the memory , the buffer , the receiver , and the transmitter are connected to each other by using the bus system , wherein the memory is configured to store an instruction, and the processor is configured to execute the instruction stored by the memory , so as to control the receiver to receive a signal, control the transmitter to send a signal, and control the buffer to buffer data; the processor is configured to acquire information for resource scheduling that is determined by a base station according to information about resource quantity, wherein the information about resource quantity indicates a quantity of resources which the base station is able to schedule; the receiver is configured to receive first frequency domain data transmitted at a first transmission rate; the buffer is configured to: according to information for resource scheduling, buffer first frequency domain data borne by an occupied data bearer unit, and discard first frequency domain data borne by an idle data bearer unit; and the transmitter is configured to transmit, at a second transmission rate, the buffered first frequency domain data, wherein the second transmission rate is lower than the first transmission rate, characterized in that before the transmitter transmits, at the second transmission rate, the buffered first frequency domain data, the processor is further configured to determine reference signal data comprised in received frequency domain data of downlink physical layer transmitted at the first transmission rate; and the buffer is further configure to buffer the reference signal data. <EOS>