Integrated circuitry , comprising: a clock path for carrying a clock signal from a clock source to a circuit block, the circuit block being operable based on said clock signal; clock buffer circuitry provided along said clock path for buffering said clock signal; and a tuneable inductance connected to said clock path, wherein: the tuneable inductance comprises an array of inductors (L 1 to L 4 ) and switching circuitry configured to switch each of the inductors into or out of circuit based upon a control signal; the array has N inductors L 1 to L N , where N is an integer greater than 2; the inductors have respective mutually different inductance values L 1 to L N ; the inductance values are set such that different combinations of those inductors provide a range of different overall inductance values of said tuneable inductance, each said combination comprising one, some or all of those inductors, with at least one of those inductors switched into circuit and up to N-1 of those inductors switched out of circuit; said range of different overall inductance values includes a maximum overall inductance value L MAX and a minimum overall inductance value L MIN ; and the inductance values L 1 to L N are set such that said different overall inductance values are substantially evenly distributed from L MAX to L MIN . a clock path for carrying a clock signal from a clock source to a circuit block, the circuit block being operable based on said clock signal; clock buffer circuitry provided along said clock path for buffering said clock signal; and a tuneable inductance connected to said clock path, wherein: the tuneable inductance comprises an array of inductors (L 1 to L 4 ) and switching circuitry configured to switch each of the inductors into or out of circuit based upon a control signal; the array has N inductors L 1 to L N , where N is an integer greater than 2; the inductors have respective mutually different inductance values L 1 to L N ; the inductance values are set such that different combinations of those inductors provide a range of different overall inductance values of said tuneable inductance, each said combination comprising one, some or all of those inductors, with at least one of those inductors switched into circuit and up to N-1 of those inductors switched out of circuit; said range of different overall inductance values includes a maximum overall inductance value L MAX and a minimum overall inductance value L MIN ; and the inductance values L 1 to L N are set such that said different overall inductance values are substantially evenly distributed from L MAX to L MIN . the tuneable inductance comprises an array of inductors (L 1 to L 4 ) and switching circuitry configured to switch each of the inductors into or out of circuit based upon a control signal; the array has N inductors L 1 to L N , where N is an integer greater than 2; the inductors have respective mutually different inductance values L 1 to L N ; the inductance values are set such that different combinations of those inductors provide a range of different overall inductance values of said tuneable inductance, each said combination comprising one, some or all of those inductors, with at least one of those inductors switched into circuit and up to N-1 of those inductors switched out of circuit; said range of different overall inductance values includes a maximum overall inductance value L MAX and a minimum overall inductance value L MIN ; and the inductance values L 1 to L N are set such that said different overall inductance values are substantially evenly distributed from L MAX to L MIN . <EOS>