A computer program product for emulating instructions in a computing environment, the computer program product comprising: a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: determining from a first instruction defined for a first computer architecture that the first instruction includes a non-contiguous register operand specifier having a first portion and a second portion, non-contiguous with the first portion; obtaining the non-contiguous register operand specifier from the first instruction comprising obtaining the first portion from a first field (V1) of the first instruction and the second portion from a second field (RXB) of the first instruction, the first field separated from the second field by at least one intervening field, wherein a portion of the opcode of the first instruction specifies the first field and the second field used to designate the non-contiguous specifier; generating a contiguous register operand specifier using the first portion and the second portion obtained from the first instruction, the generating using one or more rules stored in memory or external storage depending on the format of the instruction specified by the opcode of the first instruction; using the contiguous register operand specifier in place of the non-contiguous register operand specifier to indicate a resource to be used in execution of a second instruction, the second instruction defined for a second computer architecture different from the first computer architecture and emulating a function of the first instruction; and executing the second instruction to emulate the function of the first instruction, the executing using the resource indicated by the contiguous register operand specifier without further regard to the non-contiguous register operand specifier. determining from a first instruction defined for a first computer architecture that the first instruction includes a non-contiguous register operand specifier having a first portion and a second portion, non-contiguous with the first portion; obtaining the non-contiguous register operand specifier from the first instruction comprising obtaining the first portion from a first field (V1) of the first instruction and the second portion from a second field (RXB) of the first instruction, the first field separated from the second field by at least one intervening field, wherein a portion of the opcode of the first instruction specifies the first field and the second field used to designate the non-contiguous specifier; generating a contiguous register operand specifier using the first portion and the second portion obtained from the first instruction, the generating using one or more rules stored in memory or external storage depending on the format of the instruction specified by the opcode of the first instruction; using the contiguous register operand specifier in place of the non-contiguous register operand specifier to indicate a resource to be used in execution of a second instruction, the second instruction defined for a second computer architecture different from the first computer architecture and emulating a function of the first instruction; and executing the second instruction to emulate the function of the first instruction, the executing using the resource indicated by the contiguous register operand specifier without further regard to the non-contiguous register operand specifier. <EOS>