A wafer-level package comprising: a plurality of dies (602_1, 602_2, 702_1, 702_2, 702_3, 702_4, 802_1, 802_2, 902_1, 902_2, 902_3, 902_4), comprising at least a first die and a second die, wherein the dies are arranged in a side-by-side fashion, and a first side of the first die is adjacent to a first side of the second die; and a plurality of connection paths, configured to connect input/output pads, hereinafter I/O pads, arranged on the first side of the first die to I/O pads arranged on the first side of the second die, wherein adjacent I/O pads on the first side of the first die are connected to adjacent I/O pads on the first side of the second die via connection paths on only a single layer such that the connection paths have no crossing connection paths, whereby the first die and the second die are identical dies such that a circuit design of the first die is the same as a circuit design of the second die, the I/O pads arranged on the first side of the first die are rotationally symmetric and comprise a first set of I/O pads and a second set of I/O pads, and the I/O pads arranged on the first side of the second die are rotationally symmetric and comprise a first set of I/O pads and a second set of I/O pads, such that the I/O pads of a non-rotated first or second die exactly match the I/O pads of said first or second die rotated by a predefined rotation angle, the first set of I/O pads arranged on the first side of the first die is configured to transmit signals to the second set of I/O pads arranged on the first side of the second die, and the second set of I/O pads arranged on the first side of the first die is configured to receive signals from the first set of I/O pads arranged on the first side of the second die, and each of the first side of the first die and the first side of the second die is a same side of an identical die. a plurality of dies (602_1, 602_2, 702_1, 702_2, 702_3, 702_4, 802_1, 802_2, 902_1, 902_2, 902_3, 902_4), comprising at least a first die and a second die, wherein the dies are arranged in a side-by-side fashion, and a first side of the first die is adjacent to a first side of the second die; and a plurality of connection paths, configured to connect input/output pads, hereinafter I/O pads, arranged on the first side of the first die to I/O pads arranged on the first side of the second die, wherein adjacent I/O pads on the first side of the first die are connected to adjacent I/O pads on the first side of the second die via connection paths on only a single layer such that the connection paths have no crossing connection paths, whereby the first die and the second die are identical dies such that a circuit design of the first die is the same as a circuit design of the second die, the I/O pads arranged on the first side of the first die are rotationally symmetric and comprise a first set of I/O pads and a second set of I/O pads, and the I/O pads arranged on the first side of the second die are rotationally symmetric and comprise a first set of I/O pads and a second set of I/O pads, such that the I/O pads of a non-rotated first or second die exactly match the I/O pads of said first or second die rotated by a predefined rotation angle, the first set of I/O pads arranged on the first side of the first die is configured to transmit signals to the second set of I/O pads arranged on the first side of the second die, and the second set of I/O pads arranged on the first side of the first die is configured to receive signals from the first set of I/O pads arranged on the first side of the second die, and each of the first side of the first die and the first side of the second die is a same side of an identical die. <EOS>