An array of memory cells , comprising: a plurality of first conductive lines (102-0, 102-1, ..., 102-N, 104-0, 104-1, ..., 104-N) formed in a first direction; a plurality of second conductive lines (102-0, 102-1, ..., 102-N, 104-0, 104-1, ..., 104-N) formed in a second direction; and a plurality of memory cells located between the plurality of first conductive lines and the plurality of second conductive lines, each one of the plurality of memory cells comprising: a memory element comprising one or more memory materials ; and a resistor, wherein the resistor comprises a resistor material that is formed in series with the one or more memory materials ; wherein the resistor comprises a first resistor and a second resistor, and wherein: the first resistor is formed between the memory element and a respective one of the first conductive lines; and the second resistor is formed between the memory element and a respective one of the second conductive lines; wherein the first resistor is continuous across multiple memory cells of the plurality of memory cells, characterised in that the second resistor is isolated such that it is not continuous across multiple memory cells of the plurality of memory cells. a plurality of first conductive lines (102-0, 102-1, ..., 102-N, 104-0, 104-1, ..., 104-N) formed in a first direction; a plurality of second conductive lines (102-0, 102-1, ..., 102-N, 104-0, 104-1, ..., 104-N) formed in a second direction; and a plurality of memory cells located between the plurality of first conductive lines and the plurality of second conductive lines, each one of the plurality of memory cells comprising: a memory element comprising one or more memory materials ; and a resistor, wherein the resistor comprises a resistor material that is formed in series with the one or more memory materials ; wherein the resistor comprises a first resistor and a second resistor, and wherein: the first resistor is formed between the memory element and a respective one of the first conductive lines; and the second resistor is formed between the memory element and a respective one of the second conductive lines; wherein the first resistor is continuous across multiple memory cells of the plurality of memory cells, characterised in that the second resistor is isolated such that it is not continuous across multiple memory cells of the plurality of memory cells. a memory element comprising one or more memory materials ; and a resistor, wherein the resistor comprises a resistor material that is formed in series with the one or more memory materials ; wherein the resistor comprises a first resistor and a second resistor, and wherein: the first resistor is formed between the memory element and a respective one of the first conductive lines; and the second resistor is formed between the memory element and a respective one of the second conductive lines; the first resistor is formed between the memory element and a respective one of the first conductive lines; and the second resistor is formed between the memory element and a respective one of the second conductive lines; wherein the first resistor is continuous across multiple memory cells of the plurality of memory cells, <EOS>