An electrical circuit comprising at least two unit cells which are configured on a flat substrate which extends in one layer, wherein each comprise three contact points with different functions, comprising at least three dielectric layers which are arranged on the unit cells, and comprising at least three contact surfaces which are arranged parallel to the layer above the contact points and/or the substrate, wherein the unit cells are transistors comprising a source contact point , a drain contact point and a gate contact point as contact points of different functions, wherein the gate contact points of the transistors are connected via a common bus , wherein the contact points with the same function are electrically connected via at least one through-plating through the dielectric layers to at least one contact surface that is common for at least some of the contact points with the same function, wherein a first dielectric layer comprises at least one opening above the source and drain contact points and the common bus , and wherein on the dielectric layer for each function at least one region of a first conductive layer is arranged as part of the through-plating, which extends into the openings such that it is in electrical contact with the contact points and the bus of the corresponding function, wherein on the first conductive layer a second dielectric layer is arranged, which at least partially covers the regions of the first conductive layers corresponding to the three functions and comprises at least one opening to each of the regions of the first conductive layer covered by it, wherein on the second dielectric layer for each function at least one region of a second conductive layer as part of the through-plating is arranged, which extends into the openings in the second dielectric layer such that they are in electrical contact with at least one region of the underlying regions of the first conductive layer, wherein on the second conductive layer a third dielectric layer is arranged, which at least partially covers the regions of the second conductive layer corresponding to the three functions and comprises at least one opening to each of the regions of the second conductive layer covered by it, wherein on the third dielectric layer for each function at least one region of a third conductive layer is arranged, which extends into the openings in the third dielectric layer such that it is in electrical contact with at least one region of the underlying regions of the second conductive layer, wherein the regions for each function of the third electrical layer forming the contact surfaces, such that the contact points with the same function are commonly contactable from the outside via the corresponding contact surface, wherein the regions of the first, second and third conductive layers are each arranged in a layer and wherein the regions of different functions are electrically separated from each other, wherein the contact points are elongated and the openings at least partially extend longitudinally parallel to the contact points, and wherein the unit cells are arranged on a circular substrate, wherein the contact points are at least partially formed as at least portions of circular rings and wherein the contact surfaces are formed as sectors of a circular area which is arranged parallel to the substrate with substantially the same dimensions as the latter. <EOS>