A processor comprising: a source vector register to store a plurality of source data elements; a destination vector register to store a plurality of destination data elements; a control vector register to store a plurality of control data elements, each control data element corresponding to one of the destination data elements and including an N bit value indicating whether a source data element is to be copied to the corresponding destination data element; vector permute logic to compare the N bit value of each control data element to an N bit portion of an immediate to determine whether to copy a source data element to the corresponding destination data element, wherein if the N bit values match, then the vector permute logic is to identify a source data element using an index value included in the control data element and to responsively copy the source data element to the corresponding destination data element in the destination vector register ; characterized in that for a destination data element which corresponds to a control data element having an N bit value which is not equal to the N bit portion of the immediate, the vector permute logic is to leave a current value in the destination data element unmodified; the vector permute logic is to execute a plurality of vector permute instructions, each having a different immediate value and a different source vector register to permute values from the different source vector registers into the destination vector register ; the processor further comprises: a mask register to store a mask value, wherein the vector permute logic is to perform write masking on data elements copied to the destination vector register using the mask value. a source vector register to store a plurality of source data elements; a destination vector register to store a plurality of destination data elements; a control vector register to store a plurality of control data elements, each control data element corresponding to one of the destination data elements and including an N bit value indicating whether a source data element is to be copied to the corresponding destination data element; vector permute logic to compare the N bit value of each control data element to an N bit portion of an immediate to determine whether to copy a source data element to the corresponding destination data element, wherein if the N bit values match, then the vector permute logic is to identify a source data element using an index value included in the control data element and to responsively copy the source data element to the corresponding destination data element in the destination vector register ; characterized in that for a destination data element which corresponds to a control data element having an N bit value which is not equal to the N bit portion of the immediate, the vector permute logic is to leave a current value in the destination data element unmodified; the vector permute logic is to execute a plurality of vector permute instructions, each having a different immediate value and a different source vector register to permute values from the different source vector registers into the destination vector register ; the processor further comprises: a mask register to store a mask value, wherein the vector permute logic is to perform write masking on data elements copied to the destination vector register using the mask value. <EOS>