An array substrate for a display device, the array substrate comprising a base , a conductive pattern layer disposed on the base , a transparent electrode layer, and an insulating layer disposed between the conductive pattern layer and the transparent electrode layer, the conductive pattern layer comprising a plurality of first conductive patterns, the transparent electrode layer comprising a plurality of transparent electrodes, each of the plurality of transparent electrodes being electrically coupled to a corresponding one of the plurality of first conductive patterns through a corresponding via hole in the insulating layer; wherein at each position where one of said via holes is located, a stepped structure is formed between the first conductive pattern corresponding to the via hole and the base and the insulating layer such that a groove is formed at an upper surface of the array substrate at a position corresponding to the via hole, wherein the array substrate comprises a display region and a periphery region surrounding the display region, wherein the transparent electrode layer is a common electrode layer , and the plurality of transparent electrodes is a plurality of common electrodes located in the display region, wherein each of the plurality of first conductive patterns is a common electrode line , a portion of each common electrode line located in the display region comprises a plurality of electrode line parts and a plurality of connection parts , wherein the electrode line parts and the connection parts are alternately disposed and coupled to each other, and each connection part is located at a position of the common electrode line corresponding to a via hole, characterised in that the width of the connection part is greater than the width of the electrode line part . the conductive pattern layer comprising a plurality of first conductive patterns, the transparent electrode layer comprising a plurality of transparent electrodes, each of the plurality of transparent electrodes being electrically coupled to a corresponding one of the plurality of first conductive patterns through a corresponding via hole in the insulating layer; wherein at each position where one of said via holes is located, a stepped structure is formed between the first conductive pattern corresponding to the via hole and the base and the insulating layer such that a groove is formed at an upper surface of the array substrate at a position corresponding to the via hole, wherein the array substrate comprises a display region and a periphery region surrounding the display region, wherein the transparent electrode layer is a common electrode layer , and the plurality of transparent electrodes is a plurality of common electrodes located in the display region, wherein each of the plurality of first conductive patterns is a common electrode line , a portion of each common electrode line located in the display region comprises a plurality of electrode line parts and a plurality of connection parts , wherein the electrode line parts and the connection parts are alternately disposed and coupled to each other, and each connection part is located at a position of the common electrode line corresponding to a via hole, characterised in that the width of the connection part is greater than the width of the electrode line part . <EOS>