An imaging device comprising: a plurality of pixels (P) formed in any of a plurality of semiconductor substrates that is stacked, the plurality of pixels (P) being each configured to perform photoelectric conversion; a memory unit formed in any of the plurality of semiconductor substrates, the memory unit being configured to store image data generated on a basis of a result of the photoelectric conversion; a memory control unit formed in any of the plurality of semiconductor substrates, the memory control unit being configured to perform a read operation on a basis of first internal address information (ADR_R1), the read operation being for reading, from the memory unit , image data corresponding to the first internal address information (ADR_R1) among pieces of the image data; and a bus interface formed in any of the plurality of semiconductor substrates, the bus interface being configured to perform communication for first address information (ADR_R) with an external device , supply the memory control unit with the first internal address information (ADR_R1), and transmit the image data read by the memory control unit to the external device , wherein the bus interface is configured to receive the first address information (ADR_R) from the external device and convert the first address information (ADR_R) to the first internal address information (ADR_R1); the imaging device further comprises a signal processing unit configured to perform a signal process corresponding to the first internal address information (ADR_R1) among a plurality of signal processes on a basis of the image data stored in the memory unit ; and the bus interface is configured to designate, by using the first internal address information (ADR_R1), the signal process to be performed by the signal processing unit . a plurality of pixels (P) formed in any of a plurality of semiconductor substrates that is stacked, the plurality of pixels (P) being each configured to perform photoelectric conversion; a memory unit formed in any of the plurality of semiconductor substrates, the memory unit being configured to store image data generated on a basis of a result of the photoelectric conversion; a memory control unit formed in any of the plurality of semiconductor substrates, the memory control unit being configured to perform a read operation on a basis of first internal address information (ADR_R1), the read operation being for reading, from the memory unit , image data corresponding to the first internal address information (ADR_R1) among pieces of the image data; and a bus interface formed in any of the plurality of semiconductor substrates, the bus interface being configured to perform communication for first address information (ADR_R) with an external device , supply the memory control unit with the first internal address information (ADR_R1), and transmit the image data read by the memory control unit to the external device , wherein the bus interface is configured to receive the first address information (ADR_R) from the external device and convert the first address information (ADR_R) to the first internal address information (ADR_R1); the imaging device further comprises a signal processing unit configured to perform a signal process corresponding to the first internal address information (ADR_R1) among a plurality of signal processes on a basis of the image data stored in the memory unit ; and the bus interface is configured to designate, by using the first internal address information (ADR_R1), the signal process to be performed by the signal processing unit . <EOS>