An information protection method based on a plurality of sub-areas for a micro control unit (MCU) chip, wherein the MCU chip comprises a central processing unit (CPU) with a Harvard architecture and the MCU chip comprises an instruction bus, a data bus, a flash controller and a user area of a flash memory; the flash controller is configured to divide the user area into a plurality of sub-areas, each sub-area is corresponding to a sub-area working state, respectively, the method comprising: determining a first sub-area of the plurality of sub-areas accessed by the instruction bus when the instruction bus accesses the user area; entering a first sub-area working state corresponding to the determined first sub-area; determining a second sub-area of the plurality of sub-areas accessed by the instruction bus when the instruction bus subsequently accesses the user area; if the first sub-area is inconsistent with the second sub-area, entering a transition state after the second sub-area has been determined to be inconsistent with the first sub-area; determining whether the duration of the transition state reaches a preset waiting time set to ensure data accessing of the first sub-area is completely accomplished; if yes, entering a second sub-area working state corresponding to the second sub-area; and in the first sub-area working state, the instruction bus is allowed to access the user area, the data bus is allowed to access the first sub-area, but the data bus is prohibited from accessing other sub-areas of the plurality of sub-areas; in the transition state, the instruction bus is temporarily prohibited from accessing the user area, the data bus is allowed to access the first sub-area, but the data bus is prohibited from accessing other sub-areas of the plurality of sub-areas; in the second sub-area working state, the instruction bus is allowed to access the user area, the data bus is prohibited from accessing other sub-areas of the plurality of sub-areas but allowed to access the second sub-area. determining a first sub-area of the plurality of sub-areas accessed by the instruction bus when the instruction bus accesses the user area; entering a first sub-area working state corresponding to the determined first sub-area; determining a second sub-area of the plurality of sub-areas accessed by the instruction bus when the instruction bus subsequently accesses the user area; if the first sub-area is inconsistent with the second sub-area, entering a transition state after the second sub-area has been determined to be inconsistent with the first sub-area; determining whether the duration of the transition state reaches a preset waiting time set to ensure data accessing of the first sub-area is completely accomplished; if yes, entering a second sub-area working state corresponding to the second sub-area; and in the first sub-area working state, the instruction bus is allowed to access the user area, the data bus is allowed to access the first sub-area, but the data bus is prohibited from accessing other sub-areas of the plurality of sub-areas; in the transition state, the instruction bus is temporarily prohibited from accessing the user area, the data bus is allowed to access the first sub-area, but the data bus is prohibited from accessing other sub-areas of the plurality of sub-areas; in the second sub-area working state, the instruction bus is allowed to access the user area, the data bus is prohibited from accessing other sub-areas of the plurality of sub-areas but allowed to access the second sub-area. <EOS>