An assortment of substrates for semiconductor circuits the assortment comprising at least one first substrate and at least one second substrate , the first substrate and the second substrate in the assortment having at least one semiconductor circuit mounting location (12; 221, 222) with an array of electrically-conductive formations providing electrical interface nodes for said at least one semiconductor circuit mounting location, wherein: the at least one first substrate comprises a first rectangular-shape substrate having a first width (X) and a first length (Y) as well as a semiconductor circuit mounting location centrally thereof with electrically-conductive formations providing a first pattern of electrical interface nodes at first , second and third sides of said first rectangular shape and a first set (R1, R3) of electrical interface nodes at a fourth side of said first rectangular shape, the at least one second substrate comprises a second rectangular-shape substrate having a second width (X') equal to said first width (X), a second length (Y') and a median line (ML) extending in the direction of said second width (X') as well as a pair of semiconductor circuit mounting locations on opposite sides of said median line (ML) with electrically-conductive formations providing a second pattern of electrical interface nodes, wherein said second pattern of electrical interface nodes comprises two unmorphed replicas of said first pattern of electrical interface nodes arranged mutually rotated 180° on opposite sides of said median line (ML) plus two second sets (R2, R4) of electrical interface nodes located between the semiconductor circuit mounting locations in said pair of semiconductor circuit mounting locations , wherein said second sets of electrical interface nodes comprise smaller morphed replicas (R2, R4) of said first set (R1, R3) of electrical interface nodes arranged mutually rotated 180° on opposite sides of said median line, wherein said second length (Y') is less than twice said first length (Y). the at least one first substrate comprises a first rectangular-shape substrate having a first width (X) and a first length (Y) as well as a semiconductor circuit mounting location centrally thereof with electrically-conductive formations providing a first pattern of electrical interface nodes at first , second and third sides of said first rectangular shape and a first set (R1, R3) of electrical interface nodes at a fourth side of said first rectangular shape, the at least one second substrate comprises a second rectangular-shape substrate having a second width (X') equal to said first width (X), a second length (Y') and a median line (ML) extending in the direction of said second width (X') as well as a pair of semiconductor circuit mounting locations on opposite sides of said median line (ML) with electrically-conductive formations providing a second pattern of electrical interface nodes, wherein said second pattern of electrical interface nodes comprises two unmorphed replicas of said first pattern of electrical interface nodes arranged mutually rotated 180° on opposite sides of said median line (ML) plus two second sets (R2, R4) of electrical interface nodes located between the semiconductor circuit mounting locations in said pair of semiconductor circuit mounting locations , wherein said second sets of electrical interface nodes comprise smaller morphed replicas (R2, R4) of said first set (R1, R3) of electrical interface nodes arranged mutually rotated 180° on opposite sides of said median line, wherein said second length (Y') is less than twice said first length (Y). <EOS>