A voltage reference circuit comprising: a supply terminal configured to be connected to a supply voltage; a ground terminal configured to be connected to a ground voltage; a first current source and a Zener diode connected in series between the supply terminal and the ground terminal and having a first node therebetween and configured to supply a Zener voltage (Vz) at the first node; an output node (Vref_hv) configured to provide a voltage reference (Vref_hv, Vref); and a complementary to absolute temperature, CTAT, circuit connected between the first node and the output node; characterised in that the CTAT circuit comprises: a first voltage divider , and a first bipolar transistor (Q1) and a second bipolar transistor (Q2), each having a base, a collector and an emitter, having their respective emitters connected at a second node (Vs), and configured to, in operation, have equal collector-emitter currents, wherein the base of the first bipolar transistor is connected to the first node and the base of the second bipolar transistor is connected to a centre node of the first voltage divider, and wherein the first voltage divider consists of a first resistance connected between the output node (Vref_hv) and the centre node and a second resistance connected between the centre node and the emitter of the second bipolar transistor. a supply terminal configured to be connected to a supply voltage; a ground terminal configured to be connected to a ground voltage; a first current source and a Zener diode connected in series between the supply terminal and the ground terminal and having a first node therebetween and configured to supply a Zener voltage (Vz) at the first node; an output node (Vref_hv) configured to provide a voltage reference (Vref_hv, Vref); and a complementary to absolute temperature, CTAT, circuit connected between the first node and the output node; characterised in that the CTAT circuit comprises: a first voltage divider , and a first bipolar transistor (Q1) and a second bipolar transistor (Q2), each having a base, a collector and an emitter, having their respective emitters connected at a second node (Vs), and configured to, in operation, have equal collector-emitter currents, wherein the base of the first bipolar transistor is connected to the first node and the base of the second bipolar transistor is connected to a centre node of the first voltage divider, and wherein the first voltage divider consists of a first resistance connected between the output node (Vref_hv) and the centre node and a second resistance connected between the centre node and the emitter of the second bipolar transistor. a first voltage divider , and a first bipolar transistor (Q1) and a second bipolar transistor (Q2), each having a base, a collector and an emitter, having their respective emitters connected at a second node (Vs), and configured to, in operation, have equal collector-emitter currents, wherein the base of the first bipolar transistor is connected to the first node and the base of the second bipolar transistor is connected to a centre node of the first voltage divider, and wherein the first voltage divider consists of a first resistance connected between the output node (Vref_hv) and the centre node and a second resistance connected between the centre node and the emitter of the second bipolar transistor. <EOS>