System (Sys) for controlled starting and operating of a redundant energy bus (EB) provided for the failsafe supply to a number of electrical consumers (E), by way of which decentralized functional units (E, S, W, Bue, AC) which are arranged in an industrial installation, in particular a railway installation, and can be characterised as electrical consumers can be supplied with electrical energy, wherein: a) the system (Sys) comprises a number of network node units (SND), which are arranged sequentially between two feed points (PS1, PS2) of a ring-shaped energy bus (EB) and which are designed to provide the decentralized functional units (E) with access to the energy bus (EB) and optionally also to a databus (CB) b) each network node unit (SND) has a logic unit (FPGA), a computer unit (CPU) and a switching module (S), wherein the logic unit (FPGA) is designed to control the switching module (S) c) each switching module (S) has at least one switch (S1, S2) which can be controlled by the logic unit (FPGA) for switching an electrical supply access to the two feed points (PS1, PS2) of the energy bus (EB) and at least one further load switch (S3), which can be controlled by the logic unit (FPGA), for an electrical supply access to the decentralized functional unit (E), characterised in that d) an RC element (R9, C5) and a comparator (N1) are introduced into a control circuit of the load switch (S3) and the logic unit (FPGA) is designed in respect of its start-up so that d1) a delay time achieved by means of the introduced RC element (R9, C5) and the comparator (N1) is longer than the length of time required to start up the logic unit (FPGA) and d2) an influencing unit which can be controlled by the logic unit (FPGA), in particular an optocoupler, is provided for the capacitor (C5) of the RC element (R9, C5), with which the voltage over the capacitor (C5) can be short-circuited and the automatic switching-on of the load switch (S3), which is otherwise projected when the supply voltage of the energy bus (EB) is present on the network node unit (SND), can be prevented. a) the system (Sys) comprises a number of network node units (SND), which are arranged sequentially between two feed points (PS1, PS2) of a ring-shaped energy bus (EB) and which are designed to provide the decentralized functional units (E) with access to the energy bus (EB) and optionally also to a databus (CB) b) each network node unit (SND) has a logic unit (FPGA), a computer unit (CPU) and a switching module (S), wherein the logic unit (FPGA) is designed to control the switching module (S) c) each switching module (S) has at least one switch (S1, S2) which can be controlled by the logic unit (FPGA) for switching an electrical supply access to the two feed points (PS1, PS2) of the energy bus (EB) and at least one further load switch (S3), which can be controlled by the logic unit (FPGA), for an electrical supply access to the decentralized functional unit (E), characterised in that d) an RC element (R9, C5) and a comparator (N1) are introduced into a control circuit of the load switch (S3) and the logic unit (FPGA) is designed in respect of its start-up so that d1) a delay time achieved by means of the introduced RC element (R9, C5) and the comparator (N1) is longer than the length of time required to start up the logic unit (FPGA) and d2) an influencing unit which can be controlled by the logic unit (FPGA), in particular an optocoupler, is provided for the capacitor (C5) of the RC element (R9, C5), with which the voltage over the capacitor (C5) can be short-circuited and the automatic switching-on of the load switch (S3), which is otherwise projected when the supply voltage of the energy bus (EB) is present on the network node unit (SND), can be prevented. <EOS>