A semiconductor device comprising: a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type which is selectively provided in the active region in a surface layer of a first surface of the first semiconductor region , the active region being surrounded by an edge termination structure portion ; a first electrode which comes into contact with the second semiconductor region so as to define a junction therewith; a third semiconductor region of the first conductivity type which is provided in a surface layer of a second surface of the first semiconductor region opposite to the first surface and has a higher impurity concentration than the first semiconductor region , the third semiconductor region extending from the active region to the edge termination structure portion ; a single fourth semiconductor region of the second conductivity type having a substantially rectangular shape in a plan view and being uniformly formed across the entire central portion of the active region , said fourth semiconductor region being provided in the first semiconductor region at a position deeper than the third semiconductor region from the second surface of the first semiconductor region ; and a second electrode which comes into contact with the third semiconductor region , wherein, in a plan view, the fourth semiconductor region is enclosed by the outer circumferential end portion of said junction, the region comprised between the outer circumferential end portion of said junction and the outer circumferential end portion of the fourth semiconductor region having a substantially rectangular frame shape with a width (t1) larger than the diffusion length of a minority carrier in the first semiconductor region . a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type which is selectively provided in the active region in a surface layer of a first surface of the first semiconductor region , the active region being surrounded by an edge termination structure portion ; a first electrode which comes into contact with the second semiconductor region so as to define a junction therewith; a third semiconductor region of the first conductivity type which is provided in a surface layer of a second surface of the first semiconductor region opposite to the first surface and has a higher impurity concentration than the first semiconductor region , the third semiconductor region extending from the active region to the edge termination structure portion ; a single fourth semiconductor region of the second conductivity type having a substantially rectangular shape in a plan view and being uniformly formed across the entire central portion of the active region , said fourth semiconductor region being provided in the first semiconductor region at a position deeper than the third semiconductor region from the second surface of the first semiconductor region ; and a second electrode which comes into contact with the third semiconductor region , wherein, in a plan view, the fourth semiconductor region is enclosed by the outer circumferential end portion of said junction, the region comprised between the outer circumferential end portion of said junction and the outer circumferential end portion of the fourth semiconductor region having a substantially rectangular frame shape with a width (t1) larger than the diffusion length of a minority carrier in the first semiconductor region . <EOS>