Method for making a three-dimensional integrated electronic circuit comprising at least steps for: - making a first portion of electrically conductive material on at least one first dielectric layer covering at least one first semiconductor layer ; then - making at least one second dielectric layer covering at least the first portion of electrically conductive material such that the first portion of electrically conductive material is arranged between the first and second dielectric layers , and at least one second semiconductor layer arranged on the second dielectric layer ; then - making a first electronic component in the second semiconductor layer ; then - deposition and planarization of a third dielectric layer covering the first electronic component , silicides of contacts of the first electronic component being not made before the deposition of the third dielectric layer ; then - turning over of the structure; then - firmly attaching the third dielectric layer to a substrate ; then - making a second electronic component in the first semiconductor layer , comprising the making of silicide on the access areas of the at least one second electronic component ; then - deposition and planarization of a fourth dielectric layer covering the second electronic component ; then - making a first contact through at least the fourth dielectric layer and the first dielectric layer and electrically connecting the second electronic component to the first portion of electrically conductive material ; then - turning over of the structure; then - removal of the substrate ; then - making a second contact through the third dielectric layer and at least a part of the second dielectric layer and electrically connecting the first electronic component to the first portion of electrically conductive material , such that the first portion of electrically conductive material and the first and second contacts form an electrical interconnection electrically linking the first and second electronic components together. - making a first portion of electrically conductive material on at least one first dielectric layer covering at least one first semiconductor layer ; then - making at least one second dielectric layer covering at least the first portion of electrically conductive material such that the first portion of electrically conductive material is arranged between the first and second dielectric layers , and at least one second semiconductor layer arranged on the second dielectric layer ; then - making a first electronic component in the second semiconductor layer ; then - deposition and planarization of a third dielectric layer covering the first electronic component , silicides of contacts of the first electronic component being not made before the deposition of the third dielectric layer ; then - turning over of the structure; then - firmly attaching the third dielectric layer to a substrate ; then - making a second electronic component in the first semiconductor layer , comprising the making of silicide on the access areas of the at least one second electronic component ; then - deposition and planarization of a fourth dielectric layer covering the second electronic component ; then - making a first contact through at least the fourth dielectric layer and the first dielectric layer and electrically connecting the second electronic component to the first portion of electrically conductive material ; then - turning over of the structure; then - removal of the substrate ; then - making a second contact through the third dielectric layer and at least a part of the second dielectric layer and electrically connecting the first electronic component to the first portion of electrically conductive material , such that the first portion of electrically conductive material and the first and second contacts form an electrical interconnection electrically linking the first and second electronic components together. <EOS>