An apparatus comprising: a first power semiconductor switch; a second power semiconductor switch coupled in series or in parallel with the first semiconductor switch; a first driver circuit configured to drive a control terminal of the first power semiconductor switch responsive to a first control signal; and a second driver circuit configured to drive a control terminal of the second power semiconductor switch responsive to a second control signal; a first control circuit configured to generate the first control signal responsive to a drive signal that commands transitions of the first and second semiconductor switches between off and on states in unison, the first control circuit generating the first control signal according to a comparison of a voltage at the control terminal of the first semiconductor switch to a first reference voltage that varies for transitions of the first semiconductor switch between the off and on states in a manner defined by a first predetermined profile to provide a desired dynamic behavior for the voltage at the control terminal of the first semiconductor switch for the transitions of the first semiconductor switch between the off and on states; a second control circuit configured to generate the second control signal responsive to the drive signal, the second control circuit generating the second control signal according to a comparison of a voltage at the control terminal of the second semiconductor switch to a second reference voltage that varies for transitions of the second semiconductor switch between the off and on states in a manner defined by a second predetermined profile to provide a desired dynamic behavior for the voltage at the control terminal of the second semiconductor switch for the transitions of the second semiconductor switch between the off and on states. a first power semiconductor switch; a second power semiconductor switch coupled in series or in parallel with the first semiconductor switch; a first driver circuit configured to drive a control terminal of the first power semiconductor switch responsive to a first control signal; and a second driver circuit configured to drive a control terminal of the second power semiconductor switch responsive to a second control signal; a first control circuit configured to generate the first control signal responsive to a drive signal that commands transitions of the first and second semiconductor switches between off and on states in unison, the first control circuit generating the first control signal according to a comparison of a voltage at the control terminal of the first semiconductor switch to a first reference voltage that varies for transitions of the first semiconductor switch between the off and on states in a manner defined by a first predetermined profile to provide a desired dynamic behavior for the voltage at the control terminal of the first semiconductor switch for the transitions of the first semiconductor switch between the off and on states; a second control circuit configured to generate the second control signal responsive to the drive signal, the second control circuit generating the second control signal according to a comparison of a voltage at the control terminal of the second semiconductor switch to a second reference voltage that varies for transitions of the second semiconductor switch between the off and on states in a manner defined by a second predetermined profile to provide a desired dynamic behavior for the voltage at the control terminal of the second semiconductor switch for the transitions of the second semiconductor switch between the off and on states. <EOS>