An integrated circuit device comprising a hardened multiplier ; hardened adder circuitry ; first input circuitry to the hardened multiplier, wherein the first input circuitry is configured to receive a first operand , wherein a first component of the first operand comprises a first value and a second component of the first operand comprises a second value ; second input circuitry to the hardened multiplier, wherein the second input circuitry is configured to receive a second operand , wherein a first component of the second operand includes a third value ; multiplier circuitry of the hardened multiplier, wherein the multiplication circuitry is configured to multiply the first operand and the second operand in a single multiply operation to produce a product that contains a plurality of results equivalent to a corresponding plurality of distinct multiply operations, wherein the product comprises a first component that contains a first result of the plurality of results, wherein the first result is equivalent to a first multiply operation based on the first value , and wherein the product comprises a second component that contains a second result of the plurality of results, wherein the second result is equivalent to a second multiply operation based on the second value , characterised in that the integrated circuit device comprises soft logic circuitry configured to determine a first accumulated value based at least in part on the first result and a second accumulated value based at least in part on the second result; and bypass circuitry configured to bypass the hardened adder circuitry of the integrated circuit device. a hardened multiplier ; hardened adder circuitry ; first input circuitry to the hardened multiplier, wherein the first input circuitry is configured to receive a first operand , wherein a first component of the first operand comprises a first value and a second component of the first operand comprises a second value ; second input circuitry to the hardened multiplier, wherein the second input circuitry is configured to receive a second operand , wherein a first component of the second operand includes a third value ; multiplier circuitry of the hardened multiplier, wherein the multiplication circuitry is configured to multiply the first operand and the second operand in a single multiply operation to produce a product that contains a plurality of results equivalent to a corresponding plurality of distinct multiply operations, wherein the product comprises a first component that contains a first result of the plurality of results, wherein the first result is equivalent to a first multiply operation based on the first value , and wherein the product comprises a second component that contains a second result of the plurality of results, wherein the second result is equivalent to a second multiply operation based on the second value , characterised in that the integrated circuit device comprises soft logic circuitry configured to determine a first accumulated value based at least in part on the first result and a second accumulated value based at least in part on the second result; and bypass circuitry configured to bypass the hardened adder circuitry of the integrated circuit device. <EOS>