A processor comprising: a decode unit to decode an exception handler return instruction ; and an exception handler return execution unit coupled with the decode unit , characterized in that the exception handler return execution unit, responsive to the exception handler return instruction, to: determine whether an exception, which corresponds to the exception handler return instruction, was taken within a nonmaskable interrupt, called NMI, handler, as indicated by a preserved indication of whether the exception was taken within the NMI handler, wherein the preserved indication is a copy of a NMI disable control value at the time of the preservation; not configure the processor to enable delivery of the subsequently received NMI to the NMI handler if the exception, which corresponds to the exception handler return instruction, was taken within the NMI handler; and configure the processor to enable the delivery of the subsequently received NMI to the NMI handler if the exception was not taken within the NMI handler, wherein the exception handler return execution unit is to said configure or said not configure the processor to said enable the delivery of the subsequently received NMI to the NMI handler through an NMI disable control of the processor. a decode unit to decode an exception handler return instruction ; and an exception handler return execution unit coupled with the decode unit , characterized in that the exception handler return execution unit, responsive to the exception handler return instruction, to: determine whether an exception, which corresponds to the exception handler return instruction, was taken within a nonmaskable interrupt, called NMI, handler, as indicated by a preserved indication of whether the exception was taken within the NMI handler, wherein the preserved indication is a copy of a NMI disable control value at the time of the preservation; not configure the processor to enable delivery of the subsequently received NMI to the NMI handler if the exception, which corresponds to the exception handler return instruction, was taken within the NMI handler; and configure the processor to enable the delivery of the subsequently received NMI to the NMI handler if the exception was not taken within the NMI handler, determine whether an exception, which corresponds to the exception handler return instruction, was taken within a nonmaskable interrupt, called NMI, handler, as indicated by a preserved indication of whether the exception was taken within the NMI handler, wherein the preserved indication is a copy of a NMI disable control value at the time of the preservation; not configure the processor to enable delivery of the subsequently received NMI to the NMI handler if the exception, which corresponds to the exception handler return instruction, was taken within the NMI handler; and configure the processor to enable the delivery of the subsequently received NMI to the NMI handler if the exception was not taken within the NMI handler, wherein the exception handler return execution unit is to said configure or said not configure the processor to said enable the delivery of the subsequently received NMI to the NMI handler through an NMI disable control of the processor. <EOS>