A multilayer structure comprising: a silicon-on-insulator substrate comprising (i) a single crystal semiconductor handle layer layer comprising two major, generally parallel surfaces, one of which is a front surface of the single crystal semiconductor handle layer and the other of which is a back surface of the single crystal semiconductor handle layer, a circumferential edge joining the front and back surfaces of the single crystal semiconductor handle layer, a central plane between and parallel to the front surface and the back surface of the single crystal semiconductor handle layer, a central axis perpendicular to the central plane, and a bulk region between the front and back surfaces of the single crystal semiconductor handle layer, (ii) a dielectric layer in interfacial contact with the front surface of the single crystal semiconductor handle layer, and (iii) a silicon layer in interfacial contact with the dielectric layer, wherein the silicon layer has a thickness between about 0.5 nanometer and about 4 nanometers, as measured along the central axis, and further wherein the silicon layer comprises a hydride-terminated surface; a first silicon germanium layer in interfacial contact with the hydride-terminated surface of the silicon layer, wherein the first silicon germanium layer comprises silicon and germanium and has a formula of Si x Ge 1-x , wherein x is between about 0.2 and about 0.8, molar ratio; and a second silicon germanium layer in interfacial contact with the first silicon germanium layer, wherein the second silicon germanium layer comprises silicon and germanium and has a formula Si y Ge 1-y , wherein y is between about 0.3 and about 0.9, molar ratio. a silicon-on-insulator substrate comprising (i) a single crystal semiconductor handle layer layer comprising two major, generally parallel surfaces, one of which is a front surface of the single crystal semiconductor handle layer and the other of which is a back surface of the single crystal semiconductor handle layer, a circumferential edge joining the front and back surfaces of the single crystal semiconductor handle layer, a central plane between and parallel to the front surface and the back surface of the single crystal semiconductor handle layer, a central axis perpendicular to the central plane, and a bulk region between the front and back surfaces of the single crystal semiconductor handle layer, (ii) a dielectric layer in interfacial contact with the front surface of the single crystal semiconductor handle layer, and (iii) a silicon layer in interfacial contact with the dielectric layer, wherein the silicon layer has a thickness between about 0.5 nanometer and about 4 nanometers, as measured along the central axis, and further wherein the silicon layer comprises a hydride-terminated surface; a first silicon germanium layer in interfacial contact with the hydride-terminated surface of the silicon layer, wherein the first silicon germanium layer comprises silicon and germanium and has a formula of Si x Ge 1-x , wherein x is between about 0.2 and about 0.8, molar ratio; and a second silicon germanium layer in interfacial contact with the first silicon germanium layer, wherein the second silicon germanium layer comprises silicon and germanium and has a formula Si y Ge 1-y , wherein y is between about 0.3 and about 0.9, molar ratio. <EOS>