A method of forming a copper pillar bump semiconductor package, comprising: providing a finished semiconductor wafer comprising a semiconductor substrate having a passivation layer formed of silicon dioxide or silicon nitride and formed thereon covering a surface of the semiconductor substrate and exposing only one or more bond pads ; forming a first organic insulation layer on the semiconductor wafer ; patterning the first organic insulation layer to cover a first area at an interface of the bond pad and the passivation layer , to cover a second area of a bump pad to be formed, and to form islands of the first organic insulation layer along a path of a redistribution layer to be formed from the bond pad to the bump pad, the first organic insulation layer being removed from the bond pad and from the remaining area of the semiconductor wafer outside the first area, the second area and the islands of first organic insulation layer ; forming a first seed metal layer on the first organic insulation layer and the semiconductor wafer ; forming the redistribution layer on the semiconductor wafer over the bond pad and the first organic insulation layer , the redistribution layer being formed to include the bump pad being spaced apart from the bond pad and a conductive trace connecting the bond pad to the bump pad, the bump pad being formed over the second area of the first organic insulation layer and the conductive trace being formed over the islands of the first organic insulation layer ; removing the first seed metal layer not formed under the redistribution layer ; forming a second seed metal layer on the redistribution layer and the semiconductor wafer ; forming a copper pillar bump on the second seed metal layer and above the bump pad; removing the second seed metal layer not formed under the copper pillar bump ; and reflowing the copper pillar bump to form a rounded solder cap for the copper pillar bump by rounding out a solder cap layer . providing a finished semiconductor wafer comprising a semiconductor substrate having a passivation layer formed of silicon dioxide or silicon nitride and formed thereon covering a surface of the semiconductor substrate and exposing only one or more bond pads ; forming a first organic insulation layer on the semiconductor wafer ; patterning the first organic insulation layer to cover a first area at an interface of the bond pad and the passivation layer , to cover a second area of a bump pad to be formed, and to form islands of the first organic insulation layer along a path of a redistribution layer to be formed from the bond pad to the bump pad, the first organic insulation layer being removed from the bond pad and from the remaining area of the semiconductor wafer outside the first area, the second area and the islands of first organic insulation layer ; forming a first seed metal layer on the first organic insulation layer and the semiconductor wafer ; forming the redistribution layer on the semiconductor wafer over the bond pad and the first organic insulation layer , the redistribution layer being formed to include the bump pad being spaced apart from the bond pad and a conductive trace connecting the bond pad to the bump pad, the bump pad being formed over the second area of the first organic insulation layer and the conductive trace being formed over the islands of the first organic insulation layer ; removing the first seed metal layer not formed under the redistribution layer ; forming a second seed metal layer on the redistribution layer and the semiconductor wafer ; forming a copper pillar bump on the second seed metal layer and above the bump pad; removing the second seed metal layer not formed under the copper pillar bump ; and reflowing the copper pillar bump to form a rounded solder cap for the copper pillar bump by rounding out a solder cap layer . <EOS>