A computing device comprising a processor configured to: receive source code at a compiler, wherein the source code includes: at least one compound conditional having a plurality of conditions; and for each condition of the plurality of conditions, a respective code block including one or more instructions to evaluate the condition; for each ordering of a plurality of orderings of the plurality of conditions, determine that the ordering satisfies one or more legality constraints, wherein a legality constraint is denotes a constraint based on one or more syntactic properties of one or more conditions with a particular ordering for which it is to be determined that said particular ordering satisfies said constraint; for each ordering of the plurality of orderings that satisfy the one or more legality constraints, determine a respective estimated computational cost for that ordering; reorder the plurality of conditions to have an ordering that has a lowest estimated computational cost of the plurality of orderings that satisfy the one or more legality constraints; and compile the source code with the reordered plurality of conditions into assembly code, wherein the processor is configured to determine the respective estimated computational cost for each ordering at least in part by assigning an estimated cost score to each instruction included in the ordering and summing the respective estimated cost scores assigned to each instruction, wherein assigning an estimated cost score to each instruction includes reading an estimated cost score associated with an operation indicated by a respective instruction from an estimated computational cost table, the estimated computational cost table indicating, for a plurality of operations, respective estimated cost scores. receive source code at a compiler, wherein the source code includes: at least one compound conditional having a plurality of conditions; and for each condition of the plurality of conditions, a respective code block including one or more instructions to evaluate the condition; at least one compound conditional having a plurality of conditions; and for each condition of the plurality of conditions, a respective code block including one or more instructions to evaluate the condition; for each ordering of a plurality of orderings of the plurality of conditions, determine that the ordering satisfies one or more legality constraints, wherein a legality constraint is denotes a constraint based on one or more syntactic properties of one or more conditions with a particular ordering for which it is to be determined that said particular ordering satisfies said constraint; for each ordering of the plurality of orderings that satisfy the one or more legality constraints, determine a respective estimated computational cost for that ordering; reorder the plurality of conditions to have an ordering that has a lowest estimated computational cost of the plurality of orderings that satisfy the one or more legality constraints; and compile the source code with the reordered plurality of conditions into assembly code, wherein the processor is configured to determine the respective estimated computational cost for each ordering at least in part by assigning an estimated cost score to each instruction included in the ordering and summing the respective estimated cost scores assigned to each instruction, wherein assigning an estimated cost score to each instruction includes reading an estimated cost score associated with an operation indicated by a respective instruction from an estimated computational cost table, the estimated computational cost table indicating, for a plurality of operations, respective estimated cost scores. <EOS>