A terminal device , comprising a processor , a first Universal Serial Bus USB connector , and a first resistor, wherein the processor comprises: an analog to digital converter ADC, a general purpose input/output GPIO module, and a USB physical layer USB_PHY module connected to the GPIO module, wherein pins of the first USB connector comprise a first ID signal pin (1002_1); one end of the first ID signal pin (1002_1) is separately connected to the ADC and the GPIO module, and is connected to a power supply by means of the first resistor, and the other end of the first ID signal pin (1002_1) is connected to an OTG device ; when the first ID signal pin (1002_1) is connected to a second ID signal pin (2001_1) of the OTG device , the terminal device obtains a voltage value of the first ID signal pin (1002_1) by using the ADC; characterized by , if the voltage value is not zero, the terminal device determines a resistance value of a second resistor of the OTG device according to the voltage value, a voltage value of the power supply, and a resistance value of the first resistor; and the terminal device determines a device type of the OTG device according to the resistance value of the second resistor, and sends the device type of the OTG device to the USB_PHY module by using the GPIO module, wherein the USB_PHY module is configured to support a USB standard interface to process output data or input data from the first USB connector, and triggers, by using the USB_PHY module, a USB OTG protocol stack to load a driver or a configuration corresponding to the device type; if the voltage value is zero, determining that the OTG device is a standard OTG device; and triggering, by using the USB_PHY module, the USB protocol stack to load a driver or a configuration corresponding to the standard OTG device. an analog to digital converter ADC, a general purpose input/output GPIO module, and a USB physical layer USB_PHY module connected to the GPIO module, wherein pins of the first USB connector comprise a first ID signal pin (1002_1); one end of the first ID signal pin (1002_1) is separately connected to the ADC and the GPIO module, and is connected to a power supply by means of the first resistor, and the other end of the first ID signal pin (1002_1) is connected to an OTG device ; when the first ID signal pin (1002_1) is connected to a second ID signal pin (2001_1) of the OTG device , the terminal device obtains a voltage value of the first ID signal pin (1002_1) by using the ADC; characterized by , if the voltage value is not zero, the terminal device determines a resistance value of a second resistor of the OTG device according to the voltage value, a voltage value of the power supply, and a resistance value of the first resistor; and the terminal device determines a device type of the OTG device according to the resistance value of the second resistor, and sends the device type of the OTG device to the USB_PHY module by using the GPIO module, wherein the USB_PHY module is configured to support a USB standard interface to process output data or input data from the first USB connector, and triggers, by using the USB_PHY module, a USB OTG protocol stack to load a driver or a configuration corresponding to the device type; if the voltage value is zero, determining that the OTG device is a standard OTG device; and triggering, by using the USB_PHY module, the USB protocol stack to load a driver or a configuration corresponding to the standard OTG device. <EOS>