A method for performing layered low-density parity-check, LDPC, decoding, the method comprising: receiving log-likelihood ratios, LLRs, corresponding to bits encoded using LDPC encoding; updating the LLRs corresponding to the encoded bits corresponding to columns of a parity check matrix, PCM, the LLRs indicating a probability of a value of each of the encoded bits, wherein each row of the PCM corresponds to a parity check for the encoded bits; iteratively decoding the encoded bits using the PCM, wherein for each iteration of decoding processing all rows of the PCM, for each row of the PCM, the LLRs are updated based on a processing of the row of the PCM and a parity check corresponding to the row of the PCM is performed on the LLRs used for the processing of said PCM row, said parity check returning as a result either true or false; maintaining a single overall parity bit for tracking whether the number of false parity check results within an iteration of decoding is even or odd; setting the overall parity bit to true at a beginning of each iteration of decoding; for each processing of the row of the PCM, adding a result of the parity check for the LLRs to the overall parity bit during the iteration of decoding; maintaining a sign flip bit; setting the sign flip bit to true at the beginning of each iteration of decoding; setting the sign flip bit to false when a sign of any LLR changes during the iteration of decoding; and stopping iteratively decoding the encoded bits at the end of the iteration of decoding when the sign flip bit and the overall parity bit are set to true indicating that no LLR sign flip occurred and the number of false parity check results is even. receiving log-likelihood ratios, LLRs, corresponding to bits encoded using LDPC encoding; updating the LLRs corresponding to the encoded bits corresponding to columns of a parity check matrix, PCM, the LLRs indicating a probability of a value of each of the encoded bits, wherein each row of the PCM corresponds to a parity check for the encoded bits; iteratively decoding the encoded bits using the PCM, wherein for each iteration of decoding processing all rows of the PCM, for each row of the PCM, the LLRs are updated based on a processing of the row of the PCM and a parity check corresponding to the row of the PCM is performed on the LLRs used for the processing of said PCM row, said parity check returning as a result either true or false; maintaining a single overall parity bit for tracking whether the number of false parity check results within an iteration of decoding is even or odd; setting the overall parity bit to true at a beginning of each iteration of decoding; for each processing of the row of the PCM, adding a result of the parity check for the LLRs to the overall parity bit during the iteration of decoding; maintaining a sign flip bit; setting the sign flip bit to true at the beginning of each iteration of decoding; setting the sign flip bit to false when a sign of any LLR changes during the iteration of decoding; and stopping iteratively decoding the encoded bits at the end of the iteration of decoding when the sign flip bit and the overall parity bit are set to true indicating that no LLR sign flip occurred and the number of false parity check results is even. <EOS>