A display screen, used in an electronic device and comprising: a display unit , a gate driver on array circuit connected to the display unit , and a detection unit connected to the gate driver on array circuit, wherein the gate driver on array circuit is configured to: generate a scan signal, and drive, by using the scan signal, the display unit to perform displaying; and the detection unit is configured to: detect the scan signal of the gate driver on array circuit, and obtain and output a feedback signal (FB), wherein the detection unit comprises a first transistor (T1), a second transistor (T2), and a third transistor (T3), characterised in that the feedback signal (FB) is configured to determine whether a plurality of gate lines of the display unit are driven simultaneously; a gate of the first transistor (T1) is configured to receive a first voltage (VGH), a source of the first transistor (T1) is configured to receive a second voltage (VGL), a drain of the first transistor (T1) is connected to a source of the second transistor (T2), the first voltage (VGH) is a switch-on voltage of a transistor in the gate driver on array circuit, the second voltage (VGL) is a switch-off voltage of the transistor in the gate driver on array circuit, and a common terminal of the drain of the first transistor (T1) and the source of the second transistor (T2) is configured to output the feedback signal (FB); a gate of the second transistor (T2) is connected to a scan signal output by one GoA unit of the gate driver on array circuit, and a drain of the second (T2) is connected to a drain of the third transistor (T3); and a gate of the third transistor (T3) is connected to a scan signal output by another GoA unit of the gate driver on array circuit, and a source of the third transistor (T3) is configured to receive the first voltage (VGH). the gate driver on array circuit is configured to: generate a scan signal, and drive, by using the scan signal, the display unit to perform displaying; and the detection unit is configured to: detect the scan signal of the gate driver on array circuit, and obtain and output a feedback signal (FB), wherein the detection unit comprises a first transistor (T1), a second transistor (T2), and a third transistor (T3), characterised in that the feedback signal (FB) is configured to determine whether a plurality of gate lines of the display unit are driven simultaneously; a gate of the first transistor (T1) is configured to receive a first voltage (VGH), a source of the first transistor (T1) is configured to receive a second voltage (VGL), a drain of the first transistor (T1) is connected to a source of the second transistor (T2), the first voltage (VGH) is a switch-on voltage of a transistor in the gate driver on array circuit, the second voltage (VGL) is a switch-off voltage of the transistor in the gate driver on array circuit, and a common terminal of the drain of the first transistor (T1) and the source of the second transistor (T2) is configured to output the feedback signal (FB); a gate of the second transistor (T2) is connected to a scan signal output by one GoA unit of the gate driver on array circuit, and a drain of the second (T2) is connected to a drain of the third transistor (T3); and a gate of the third transistor (T3) is connected to a scan signal output by another GoA unit of the gate driver on array circuit, and a source of the third transistor (T3) is configured to receive the first voltage (VGH). <EOS>