Rectifier circuit, - wherein the rectifier circuit has a rectifier , - wherein the rectifier has at least three outputs at each of which the rectifier is designed to provide a potential (U+, U0, U-), - wherein one of the potentials provided (U+, U0, U-) is a high potential (U+), which is higher than all the other potentials provided (U0, U-), - wherein a further one of the potentials provided (U+, U0, U-) is a low potential (U-), which is lower than all the other potentials provided (U+, U0), - wherein, with the exception of the high potential (U+) and the low potential (U-), the potentials provided (U+, U0, U-) are medium potentials (U0) that lie between the high potential and the low potential (U+, U-), - wherein the rectifier circuit has a plurality of feed lines via which in each case a phase voltage (L1, L2, L3) of a supply network can be supplied to the rectifier , - wherein the rectifier circuit has inductors arranged in the feed lines , characterised in - that the rectifier circuit has at least one clamping circuit , - that the clamping circuit has a series circuit of two diode circuits so that the series circuit has a node arranged between the two diode circuits and two end points , - that one of the end points is connected to one of the outputs at which the rectifier is designed to provide one of the medium potentials (U0), - that the other end point is connected to another one of the outputs , - that the clamping circuit has an overall capacitor circuit via which the node is connected to a reference potential (PE), - that the overall capacitor circuit has at least one series circuit consisting of two partial capacitor circuits , - that one partial capacitor circuit connects the node to a line section of one of the feed lines , - that the other partial capacitor circuit connects the same line section to the reference potential (PE) and - that the inductor arranged in the corresponding feed line is arranged between the rectifier and the line section. - wherein the rectifier circuit has a rectifier , - wherein the rectifier has at least three outputs at each of which the rectifier is designed to provide a potential (U+, U0, U-), - wherein one of the potentials provided (U+, U0, U-) is a high potential (U+), which is higher than all the other potentials provided (U0, U-), - wherein a further one of the potentials provided (U+, U0, U-) is a low potential (U-), which is lower than all the other potentials provided (U+, U0), - wherein, with the exception of the high potential (U+) and the low potential (U-), the potentials provided (U+, U0, U-) are medium potentials (U0) that lie between the high potential and the low potential (U+, U-), - wherein the rectifier circuit has a plurality of feed lines via which in each case a phase voltage (L1, L2, L3) of a supply network can be supplied to the rectifier , - wherein the rectifier circuit has inductors arranged in the feed lines , - that the rectifier circuit has at least one clamping circuit , - that the clamping circuit has a series circuit of two diode circuits so that the series circuit has a node arranged between the two diode circuits and two end points , - that one of the end points is connected to one of the outputs at which the rectifier is designed to provide one of the medium potentials (U0), - that the other end point is connected to another one of the outputs , - that the clamping circuit has an overall capacitor circuit via which the node is connected to a reference potential (PE), - that the overall capacitor circuit has at least one series circuit consisting of two partial capacitor circuits , - that one partial capacitor circuit connects the node to a line section of one of the feed lines , - that the other partial capacitor circuit connects the same line section to the reference potential (PE) and - that the inductor arranged in the corresponding feed line is arranged between the rectifier and the line section. <EOS>