A flip-chip integrated circuit comprising: a circuit substrate 2. with drive electronics comprising passive components and interconnects on a first surface thereof; an active semiconductor device comprising a substrate with layers of semiconductor material and a plurality of terminals , each of said terminals being in electrical contact with one of said layers of semiconductor material , said active semiconductor device being flip-chip mounted on said circuit substrate 50, 80, 90 ), at least one of said terminals being in electrical contact with said drive electronics; a conductive via formed in a hole through said circuit substrate, the conductive via being in electrical contact with one of said plurality of terminals through a bonding pad and comprising a first layer of conductive material that covers the inside of the hole ; a first heat sink base plate coupled to a first heat sink; and a second layer of conductive material, on a second surface of said circuit substrate opposite the first surface, arranged adjacent to said first heat sink base plate and in electrical and thermal contact with said first layer of conductive material, said second layer of conductive material forming a ground for said conductive via, wherein the first layer of conductive material and the second layer of conductive material together provide the electrical contact to ground for the active semiconductor device and are configured to dissipate heat from the active semiconductor device, and wherein the circuit substrate comprises gallium arsenide. a circuit substrate 2. with drive electronics comprising passive components and interconnects on a first surface thereof; an active semiconductor device comprising a substrate with layers of semiconductor material and a plurality of terminals , each of said terminals being in electrical contact with one of said layers of semiconductor material , said active semiconductor device being flip-chip mounted on said circuit substrate 50, 80, 90 ), at least one of said terminals being in electrical contact with said drive electronics; a conductive via formed in a hole through said circuit substrate, the conductive via being in electrical contact with one of said plurality of terminals through a bonding pad and comprising a first layer of conductive material that covers the inside of the hole ; a first heat sink base plate coupled to a first heat sink; and a second layer of conductive material, on a second surface of said circuit substrate opposite the first surface, arranged adjacent to said first heat sink base plate and in electrical and thermal contact with said first layer of conductive material, said second layer of conductive material forming a ground for said conductive via, wherein the first layer of conductive material and the second layer of conductive material together provide the electrical contact to ground for the active semiconductor device and are configured to dissipate heat from the active semiconductor device, and wherein the circuit substrate comprises gallium arsenide. wherein the first layer of conductive material and the second layer of conductive material together provide the electrical contact to ground for the active semiconductor device and are configured to dissipate heat from the active semiconductor device, and wherein the circuit substrate comprises gallium arsenide. <EOS>