A variable gain amplifier comprising: a first transistor having a control terminal, a first current handling terminal, and a second current handling terminal, the first transistor being connected to receive at its control terminal an AC first input voltage (Vin-) for modulating a current through the first transistor, the second current terminal providing an output current (lout) of the first transistor; a first resistor having a first terminal coupled to the first current handling terminal of the first transistor; a first MOSFET having a control terminal, a first current handling terminal and a second current handling terminal, wherein the second current handling terminal of the first MOSFET is coupled to a second terminal of the first resistor, and wherein the first current handling terminal of the first MOSFET is coupled to ground, the first MOSFET being configured to receive at its control terminal a combined bias voltage and a signal (Vctrl2) proportional to the first input voltage; a second transistor having a control terminal, a first current handling terminal, and a second current handling terminal, the second transistor receiving at its control terminal a second input voltage (Vin+) for modulating a current through the second transistor, the second input voltage being complimentary to the first input voltage; a second resistor having a first terminal coupled to the second current handling terminal of the second transistor; and a gain control voltage (Vctrl) coupled to a second terminal of the second resistor, wherein the first terminal of the second resistor is coupled to the gate of the first MOSFET to supply the combined bias voltage and the signal (Vctrl2) proportional to the first input voltage. a first transistor having a control terminal, a first current handling terminal, and a second current handling terminal, the first transistor being connected to receive at its control terminal an AC first input voltage (Vin-) for modulating a current through the first transistor, the second current terminal providing an output current (lout) of the first transistor; a first resistor having a first terminal coupled to the first current handling terminal of the first transistor; a first MOSFET having a control terminal, a first current handling terminal and a second current handling terminal, wherein the second current handling terminal of the first MOSFET is coupled to a second terminal of the first resistor, and wherein the first current handling terminal of the first MOSFET is coupled to ground, the first MOSFET being configured to receive at its control terminal a combined bias voltage and a signal (Vctrl2) proportional to the first input voltage; a second transistor having a control terminal, a first current handling terminal, and a second current handling terminal, the second transistor receiving at its control terminal a second input voltage (Vin+) for modulating a current through the second transistor, the second input voltage being complimentary to the first input voltage; a second resistor having a first terminal coupled to the second current handling terminal of the second transistor; and a gain control voltage (Vctrl) coupled to a second terminal of the second resistor, wherein the first terminal of the second resistor is coupled to the gate of the first MOSFET to supply the combined bias voltage and the signal (Vctrl2) proportional to the first input voltage. <EOS>