A Controller Area Network, CAN, device comprising: a compare module configured to interface with a CAN transceiver that is configured to be coupled to a CAN bus , the compare module having; a receive data, RXD, input interface configured to receive data from the CAN transceiver; a transmit data, TXD, output interface configured to output data to the CAN transceiver; a CAN decoder configured to decode an identifier of a CAN message received from the RXD input interface; an identifier memory configured to store an entry that corresponds to at least one identifier; compare logic configured to compare a received identifier from a CAN message to the entry that is stored in the identifier memory and to output a match signal when the comparison indicates that the received identifier of the CAN message matches the entry that is stored at the CAN device; a signal generator configured to output, in response to the match signal, a signal to invalidate the CAN message, wherein the signal is output from the TXD output interface to the CAN transceiver; wherein the signal generated by the signal generator provides for one or more dominant bits that are timed so that at least one of: one or more bits at bit positions immediately following a FDF field is made dominant; and the FDF field is made dominant; wherein the CAN decoder is further configured to decode the bit immediately following a FDF field of a CAN message received from the RXD input interface, wherein the compare logic is configured to determine whether or not said bit is recessive and to output a disable signal when said bit is recessive; and wherein the CAN device, in response to the disable signal, is configured to prevent transmission by the CAN transceiver to the CAN bus until a beginning of an ACK slot or until an indication that the bit rate used on the bus is below a threshold rate. a compare module configured to interface with a CAN transceiver that is configured to be coupled to a CAN bus , the compare module having; a receive data, RXD, input interface configured to receive data from the CAN transceiver; a transmit data, TXD, output interface configured to output data to the CAN transceiver; a CAN decoder configured to decode an identifier of a CAN message received from the RXD input interface; an identifier memory configured to store an entry that corresponds to at least one identifier; compare logic configured to compare a received identifier from a CAN message to the entry that is stored in the identifier memory and to output a match signal when the comparison indicates that the received identifier of the CAN message matches the entry that is stored at the CAN device; a signal generator configured to output, in response to the match signal, a signal to invalidate the CAN message, wherein the signal is output from the TXD output interface to the CAN transceiver; wherein the signal generated by the signal generator provides for one or more dominant bits that are timed so that at least one of: one or more bits at bit positions immediately following a FDF field is made dominant; and the FDF field is made dominant; wherein the CAN decoder is further configured to decode the bit immediately following a FDF field of a CAN message received from the RXD input interface, wherein the compare logic is configured to determine whether or not said bit is recessive and to output a disable signal when said bit is recessive; and wherein the CAN device, in response to the disable signal, is configured to prevent transmission by the CAN transceiver to the CAN bus until a beginning of an ACK slot or until an indication that the bit rate used on the bus is below a threshold rate. <EOS>