A method of forming a trench isolation structure for an integrated circuit, the method comprising: forming a nitride layer over a semiconductor substrate ; performing a trench etch process through portions of the nitride layer and the semiconductor substrate to form a trench ; depositing a trench oxide layer over remaining portions of the nitride layer and extending into the trench to form a filled trench ; depositing a sacrificial planarizing layer over the trench oxide layer , the sacrificial planarizing layer being etch-selective with respect to the trench oxide layer ; performing a multi-step planarizing etch process that includes: removing the sacrificial planarizing layer and decreasing surface variations in an upper surface of the trench oxide layer ; removing of remaining portions of the trench oxide layer outside the filled trench ; and removing the remaining portions of the nitride layer such that the remaining oxide of the filled trench defines a trench isolation structure that projects above an exposed upper surface of the semiconductor substrate ; characterized in that the multi-step planarizing etch process comprises performing a first tuned etch to open the sacrificial planarizing layer with respect to the trench oxide layer , then a second etch selective to the trench oxide layer with respect to the remaining sacrificial planarizing layer , and then a third non-selective etch with respect to the trench oxide layer and the sacrificial planarizing layer until the planarizing layer is removed. forming a nitride layer over a semiconductor substrate ; performing a trench etch process through portions of the nitride layer and the semiconductor substrate to form a trench ; depositing a trench oxide layer over remaining portions of the nitride layer and extending into the trench to form a filled trench ; depositing a sacrificial planarizing layer over the trench oxide layer , the sacrificial planarizing layer being etch-selective with respect to the trench oxide layer ; performing a multi-step planarizing etch process that includes: removing the sacrificial planarizing layer and decreasing surface variations in an upper surface of the trench oxide layer ; removing of remaining portions of the trench oxide layer outside the filled trench ; and removing the remaining portions of the nitride layer such that the remaining oxide of the filled trench defines a trench isolation structure that projects above an exposed upper surface of the semiconductor substrate ; characterized in that the multi-step planarizing etch process comprises performing a first tuned etch to open the sacrificial planarizing layer with respect to the trench oxide layer , then a second etch selective to the trench oxide layer with respect to the remaining sacrificial planarizing layer , and then a third non-selective etch with respect to the trench oxide layer and the sacrificial planarizing layer until the planarizing layer is removed. removing the sacrificial planarizing layer and decreasing surface variations in an upper surface of the trench oxide layer ; removing of remaining portions of the trench oxide layer outside the filled trench ; and removing the remaining portions of the nitride layer such that the remaining oxide of the filled trench defines a trench isolation structure that projects above an exposed upper surface of the semiconductor substrate ; characterized in that the multi-step planarizing etch process comprises performing a first tuned etch to open the sacrificial planarizing layer with respect to the trench oxide layer , then a second etch selective to the trench oxide layer with respect to the remaining sacrificial planarizing layer , and then a third non-selective etch with respect to the trench oxide layer and the sacrificial planarizing layer until the planarizing layer is removed. <EOS>