An apparatus comprising: an input port; an inductor (L) having a first terminal coupled to a first terminal of the input port; a first switch (S 1 ) configured to couple and decouple a second terminal of the input port and a second terminal of the inductor; at least two serially-coupled capacitors (C 1 , C n ); at least two serially-coupled second switches (S 21 , S 2n ) coupled in parallel with the first switch and configured to selectively route current from the inductor to the at least two serially-coupled capacitors; a rectifier circuit (D 1 , D 2 ) configured to couple the at least two serially-coupled second switches (S 21 , S 2n ) to the at least two serially-coupled capacitors (C 1 , C n ); and a control circuit configured to close the first switch (S 1 ) to charge the inductor from a power source at the input port in spaced apart charging phases and to operate the at least two serially-coupled second switches (S 21 , S 2n ) to discharge the charged inductor into different individual ones of the at least two serially-coupled capacitors in respective spaced apart discharging phases and thereby develop a voltage across a load coupled in parallel with the at least two serially-coupled capacitors, wherein respective ones of the charging phases to charge the inductor are interleaved with respective ones of the discharging phases to discharge the inductor, characterized in that the first switch (S 1 ) comprises a silicon carbide (SiC) field-effect transistor, FET, (Q 1 ) and that the at least two serially-coupled second switches (S 21 , S 2n ) comprise insulated gate bipolar transistors, IGBTs, (Q 21 , Q 22 ), and that the control circuit is configured to operate each of the at least two serially-coupled second switches (S 21 , S 2n ) at a frequency less than or equal to half of a switching frequency of the first switch (S 1 ). an input port; an inductor (L) having a first terminal coupled to a first terminal of the input port; a first switch (S 1 ) configured to couple and decouple a second terminal of the input port and a second terminal of the inductor; at least two serially-coupled capacitors (C 1 , C n ); at least two serially-coupled second switches (S 21 , S 2n ) coupled in parallel with the first switch and configured to selectively route current from the inductor to the at least two serially-coupled capacitors; a rectifier circuit (D 1 , D 2 ) configured to couple the at least two serially-coupled second switches (S 21 , S 2n ) to the at least two serially-coupled capacitors (C 1 , C n ); and a control circuit configured to close the first switch (S 1 ) to charge the inductor from a power source at the input port in spaced apart charging phases and to operate the at least two serially-coupled second switches (S 21 , S 2n ) to discharge the charged inductor into different individual ones of the at least two serially-coupled capacitors in respective spaced apart discharging phases and thereby develop a voltage across a load coupled in parallel with the at least two serially-coupled capacitors, wherein respective ones of the charging phases to charge the inductor are interleaved with respective ones of the discharging phases to discharge the inductor, characterized in that the first switch (S 1 ) comprises a silicon carbide (SiC) field-effect transistor, FET, (Q 1 ) and that the at least two serially-coupled second switches (S 21 , S 2n ) comprise insulated gate bipolar transistors, IGBTs, (Q 21 , Q 22 ), and that the control circuit is configured to operate each of the at least two serially-coupled second switches (S 21 , S 2n ) at a frequency less than or equal to half of a switching frequency of the first switch (S 1 ). <EOS>