A method of making a thin film transistor, the method comprising: forming a first insulation layer on a semiconductor layer ; forming a gate electrode on the first insulation layer, the gate electrode overlapping with a part of the semiconductor layer, the gate electrode including a first part and a second part adjacent to the first part in a direction parallel to the semiconductor layer, a width (W2) of the second part being greater than a width (W1) of the first part; forming a second insulation layer on the gate electrode; forming a contact hole through the first insulation layer, the second insulation layer, and the gate electrode; and forming a source electrode and a drain electrode electrically connected to the semiconductor layer through the contact hole, the source electrode and the drain electrode being arranged such that the first part of the gate electrode is between the source electrode and the drain electrode, and the width (W3) of a space between the source electrode and the drain electrode is greater than the width (W1) of the first part; wherein the forming of the contact hole includes designating a region overlapped with at least a part of the gate electrode as a contact hole forming region, and removing the gate electrode, the first insulation layer and the second insulation layer from the contact hole forming region; wherein the first part of the gate electrode includes a first side and a second side , the first side facing the source electrode and the second side facing the drain electrode; and wherein the forming of the contact hole includes surface-processing an exposed part of the gate electrode through the contact hole, at least one of the first side and the second side being thereby formed with a groove having a dented shape that tapers gradually from an upper side of the first part and a lower side of the first part toward a central part of the first part. forming a first insulation layer on a semiconductor layer ; forming a gate electrode on the first insulation layer, the gate electrode overlapping with a part of the semiconductor layer, the gate electrode including a first part and a second part adjacent to the first part in a direction parallel to the semiconductor layer, a width (W2) of the second part being greater than a width (W1) of the first part; forming a second insulation layer on the gate electrode; forming a contact hole through the first insulation layer, the second insulation layer, and the gate electrode; and forming a source electrode and a drain electrode electrically connected to the semiconductor layer through the contact hole, the source electrode and the drain electrode being arranged such that the first part of the gate electrode is between the source electrode and the drain electrode, and the width (W3) of a space between the source electrode and the drain electrode is greater than the width (W1) of the first part; wherein the forming of the contact hole includes designating a region overlapped with at least a part of the gate electrode as a contact hole forming region, and removing the gate electrode, the first insulation layer and the second insulation layer from the contact hole forming region; wherein the first part of the gate electrode includes a first side and a second side , the first side facing the source electrode and the second side facing the drain electrode; and wherein the forming of the contact hole includes surface-processing an exposed part of the gate electrode through the contact hole, at least one of the first side and the second side being thereby formed with a groove having a dented shape that tapers gradually from an upper side of the first part and a lower side of the first part toward a central part of the first part. <EOS>