An apparatus for electrostatic discharge (ESD) protection of an integrated circuit pad receiving a data signal, comprising: a plurality of ESD fingers (300, 400a,b), wherein each of the plurality of ESD fingers comprises a signal pad connection coupled with said integrated circuit pad , a distributed base connection , a NMOS transistor comprising drain and source respectively coupled to the signal pad connection and the distributed base connection , and a gate formed by a polysilicon layer and coupled to a gate connection, and a first bipolar NPN transistor comprising a base coupled with the distributed base connection and an emitter collector path coupling a ground connection with said signal pad connection ; a second NPN bipolar device sharing a collector and a base with the first bipolar NPN transistor , and comprising an emitter coupled with the distributed base connection; wherein the bases of the first NPN bipolar device and the second NPN bipolar device are coupled with the ground connection via a first resistor ; wherein said signal pad connections , said distributed base connections , said gate connections , and said ground connections of each of said plurality of ESD fingers (300, 400a,b) are connected with each other, respectively. a plurality of ESD fingers (300, 400a,b), wherein each of the plurality of ESD fingers comprises a signal pad connection coupled with said integrated circuit pad , a distributed base connection , a NMOS transistor comprising drain and source respectively coupled to the signal pad connection and the distributed base connection , and a gate formed by a polysilicon layer and coupled to a gate connection, and a first bipolar NPN transistor comprising a base coupled with the distributed base connection and an emitter collector path coupling a ground connection with said signal pad connection ; a second NPN bipolar device sharing a collector and a base with the first bipolar NPN transistor , and comprising an emitter coupled with the distributed base connection; wherein the bases of the first NPN bipolar device and the second NPN bipolar device are coupled with the ground connection via a first resistor ; a signal pad connection coupled with said integrated circuit pad , a distributed base connection , a NMOS transistor comprising drain and source respectively coupled to the signal pad connection and the distributed base connection , and a gate formed by a polysilicon layer and coupled to a gate connection, and a first bipolar NPN transistor comprising a base coupled with the distributed base connection and an emitter collector path coupling a ground connection with said signal pad connection ; a second NPN bipolar device sharing a collector and a base with the first bipolar NPN transistor , and comprising an emitter coupled with the distributed base connection; wherein the bases of the first NPN bipolar device and the second NPN bipolar device are coupled with the ground connection via a first resistor ; wherein said signal pad connections , said distributed base connections , said gate connections , and said ground connections of each of said plurality of ESD fingers (300, 400a,b) are connected with each other, respectively. <EOS>