A method for accessing an extended memory , wherein a computer is connected to an extended memory system by using a memory bus, the extended memory system comprises an extended memory controller and the extended memory, and when the computer needs to access to-be-accessed data stored in the extended memory, the method comprises: receiving , by the extended memory controller, N+1 memory access requests serially sent by a processor system in the computer, wherein access addresses comprised in all the memory access requests are different from each other and point to a same physical address, whereby the physical address is an address of the to-be-accessed data stored in the extended memory, N≥1, and N is an integer; determining , by the extended memory controller when receiving a first memory access request of the N+1 memory access requests, the physical address according to the access address carried in the first memory access request, sending, to the extended memory, a read request for obtaining the to-be-accessed data, and returning a specific response message to the processor system, wherein the read request comprises the physical address; before receiving the to-be-accessed data returned by the extended memory, each time another memory access request after the first memory access request of the N+1 memory access requests is received, returning , by the extended memory controller, a specific response message to the processor system within an access delay specified in a memory bus protocol; writing , by the extended memory controller after receiving the to-be-accessed data returned by the extended memory, the to-be-accessed data into a data buffer, and stopping returning a specific response message to the processor system; and reading , by the extended memory controller when receiving another memory access request of the N+1 memory access requests, the to-be-accessed data from the data buffer, and returning the to-be-accessed data to the processor system. receiving , by the extended memory controller, N+1 memory access requests serially sent by a processor system in the computer, wherein access addresses comprised in all the memory access requests are different from each other and point to a same physical address, whereby the physical address is an address of the to-be-accessed data stored in the extended memory, N≥1, and N is an integer; determining , by the extended memory controller when receiving a first memory access request of the N+1 memory access requests, the physical address according to the access address carried in the first memory access request, sending, to the extended memory, a read request for obtaining the to-be-accessed data, and returning a specific response message to the processor system, wherein the read request comprises the physical address; before receiving the to-be-accessed data returned by the extended memory, each time another memory access request after the first memory access request of the N+1 memory access requests is received, returning , by the extended memory controller, a specific response message to the processor system within an access delay specified in a memory bus protocol; writing , by the extended memory controller after receiving the to-be-accessed data returned by the extended memory, the to-be-accessed data into a data buffer, and stopping returning a specific response message to the processor system; and reading , by the extended memory controller when receiving another memory access request of the N+1 memory access requests, the to-be-accessed data from the data buffer, and returning the to-be-accessed data to the processor system. <EOS>