A diode comprising: an anode electrode layer ; a cathode electrode layer ; a buffer layer of a first conductivity type formed between the anode electrode layer and the cathode electrode layer in a region extending to a location at a distance of 30 μm or more from the cathode electrode layer ; a first semiconductor layer of the first conductivity type formed in a region between the anode electrode layer and the buffer layer , and being in contact with the buffer layer ; and a second semiconductor layer of a second conductivity type formed in a region between the anode electrode layer and the first semiconductor layer of the first conductivity type, wherein a carrier concentration in the first semiconductor layer is lower than a carrier concentration in the buffer layer , the carrier concentration in the buffer layer is less than 1×10 15 cm -3 , wherein the diode further comprises a third semiconductor layer of the first conductivity type adjacent to the buffer layer , the third semiconductor layer has a carrier concentration of 1×10 15 cm -3 or more, wherein the cathode electrode layer , the third semiconductor layer , the buffer layer , the first semiconductor layer , the second semiconductor layer and the anode electrode layer are arranged over each other in this order along a first direction, the diode being characterised in that a low carrier lifetime control layer at which a carrier lifetime becomes low is buried within the third semiconductor layer , and the low carrier lifetime control layer has a specific resistance distribution exhibiting a high resistance peak independently of an impurity concentration distribution in the third semiconductor layer , the low carrier lifetime control layer consisting of a plurality of portions located in a plane perpendicular to said first direction and spaced apart from each other. an anode electrode layer ; a cathode electrode layer ; a buffer layer of a first conductivity type formed between the anode electrode layer and the cathode electrode layer in a region extending to a location at a distance of 30 μm or more from the cathode electrode layer ; a first semiconductor layer of the first conductivity type formed in a region between the anode electrode layer and the buffer layer , and being in contact with the buffer layer ; and a second semiconductor layer of a second conductivity type formed in a region between the anode electrode layer and the first semiconductor layer of the first conductivity type, wherein a carrier concentration in the first semiconductor layer is lower than a carrier concentration in the buffer layer , the carrier concentration in the buffer layer is less than 1×10 15 cm -3 , wherein the diode further comprises a third semiconductor layer of the first conductivity type adjacent to the buffer layer , the third semiconductor layer has a carrier concentration of 1×10 15 cm -3 or more, wherein the cathode electrode layer , the third semiconductor layer , the buffer layer , the first semiconductor layer , the second semiconductor layer and the anode electrode layer are arranged over each other in this order along a first direction, the diode being characterised in that a low carrier lifetime control layer at which a carrier lifetime becomes low is buried within the third semiconductor layer , and the low carrier lifetime control layer has a specific resistance distribution exhibiting a high resistance peak independently of an impurity concentration distribution in the third semiconductor layer , the low carrier lifetime control layer consisting of a plurality of portions located in a plane perpendicular to said first direction and spaced apart from each other. <EOS>