A current regulator circuit for an IC device including a load introducing noise due to rapidly changing current demand of the load , the current regulator circuit comprising: an input adapted to receive a regulated voltage signal (V IN ); an output adapted to provide an output voltage (V OUT ) at a desired voltage level to the IC device, the output voltage (V OUT ) exhibiting the noise from the load ; a first field effect transistor, FET, including a first source electrode coupled to the input, a first drain electrode coupled to the output, and a first gate electrode; a voltage clamp circuit connected to the output, the voltage clamp circuit configured to conduct a varying current based upon the noise; a constant current source adapted to provide a constant current; a second FET including a second source electrode connected to the output, a second drain electrode connected to the constant current source and to the first gate electrode, and a second gate electrode connected to the voltage clamp circuit to mirror the varying current in the second FET ; wherein the voltage clamp circuit comprises: a fifth FET including a fifth source electrode coupled to the output, a fifth drain electrode, and a fifth gate electrode coupled to the fifth drain electrode and to the second gate electrode; a first diode including a first cathode coupled to the fifth drain electrode, and a first anode; a second diode including a second cathode coupled to the first anode and a second anode coupled to a ground plane. an input adapted to receive a regulated voltage signal (V IN ); an output adapted to provide an output voltage (V OUT ) at a desired voltage level to the IC device, the output voltage (V OUT ) exhibiting the noise from the load ; a first field effect transistor, FET, including a first source electrode coupled to the input, a first drain electrode coupled to the output, and a first gate electrode; a voltage clamp circuit connected to the output, the voltage clamp circuit configured to conduct a varying current based upon the noise; a constant current source adapted to provide a constant current; a second FET including a second source electrode connected to the output, a second drain electrode connected to the constant current source and to the first gate electrode, and a second gate electrode connected to the voltage clamp circuit to mirror the varying current in the second FET ; wherein the voltage clamp circuit comprises: a fifth FET including a fifth source electrode coupled to the output, a fifth drain electrode, and a fifth gate electrode coupled to the fifth drain electrode and to the second gate electrode; a first diode including a first cathode coupled to the fifth drain electrode, and a first anode; a second diode including a second cathode coupled to the first anode and a second anode coupled to a ground plane. a fifth FET including a fifth source electrode coupled to the output, a fifth drain electrode, and a fifth gate electrode coupled to the fifth drain electrode and to the second gate electrode; a first diode including a first cathode coupled to the fifth drain electrode, and a first anode; a second diode including a second cathode coupled to the first anode and a second anode coupled to a ground plane. <EOS>