An Infra-Red (IR) detector comprising: a dielectric membrane formed on a semiconductor substrate which comprises a back etched portion, wherein the dielectric membrane comprises: a buried oxide layer ; dielectric layers ; a passivation layer ; and a CMOS metal wherein the CMOS metal includes any of Aluminium, Copper, Tungsten, or Titanium; a thermopile, the thermopile comprising a plurality of thermocouples connected together on the dielectric membrane, wherein each thermocouple comprises first and second thermal junctions, the first thermal junction being a hot junction and the second thermal junction being a cold junction; wherein each thermocouple comprises at least first and second dissimilar materials in which the first material is made of a single crystal silicon layer, and the single crystal silicon layer comprises a lowly N or P doped base strip with ends comprising highly N+ doped or highly P+ doped single crystal silicon, and wherein the CMOS metal is used to electrically connect the first and second dissimilar materials at the hot and cold thermal junctions; and wherein said N+ or P+ layer forms a source layer or a drain layer of an n-channel or p-channel MOSFET integrated on the same chip as the IR detector, and wherein the device further comprises a polysilicon gate on top of the single crystal silicon layer, wherein the polysilicon gate is arranged to create an inversion layer of the MOSFET in the single crystal silicon layer. a dielectric membrane formed on a semiconductor substrate which comprises a back etched portion, wherein the dielectric membrane comprises: a buried oxide layer ; dielectric layers ; a passivation layer ; and a CMOS metal a buried oxide layer ; dielectric layers ; a passivation layer ; and a CMOS metal wherein the CMOS metal includes any of Aluminium, Copper, Tungsten, or Titanium; a thermopile, the thermopile comprising a plurality of thermocouples connected together on the dielectric membrane, wherein each thermocouple comprises first and second thermal junctions, the first thermal junction being a hot junction and the second thermal junction being a cold junction; wherein each thermocouple comprises at least first and second dissimilar materials in which the first material is made of a single crystal silicon layer, and the single crystal silicon layer comprises a lowly N or P doped base strip with ends comprising highly N+ doped or highly P+ doped single crystal silicon, and wherein the CMOS metal is used to electrically connect the first and second dissimilar materials at the hot and cold thermal junctions; and wherein said N+ or P+ layer forms a source layer or a drain layer of an n-channel or p-channel MOSFET integrated on the same chip as the IR detector, and wherein the device further comprises a polysilicon gate on top of the single crystal silicon layer, wherein the polysilicon gate is arranged to create an inversion layer of the MOSFET in the single crystal silicon layer. wherein each thermocouple comprises at least first and second dissimilar materials in which the first material is made of a single crystal silicon layer, and the single crystal silicon layer comprises a lowly N or P doped base strip with ends comprising highly N+ doped or highly P+ doped single crystal silicon, and wherein the CMOS metal is used to electrically connect the first and second dissimilar materials at the hot and cold thermal junctions; and wherein said N+ or P+ layer forms a source layer or a drain layer of an n-channel or p-channel MOSFET integrated on the same chip as the IR detector, and wherein the device further comprises a polysilicon gate on top of the single crystal silicon layer, wherein the polysilicon gate is arranged to create an inversion layer of the MOSFET in the single crystal silicon layer. <EOS>