A data acquisition system, comprising: a signal input terminal ; an analog-to-digital converter, ADC ; an analog front end, AFE circuit coupled to the ADC and the signal input terminal , the AFE circuit comprising: a programmable gain amplifier ; and a common mode amplifier coupled to the programmable gain amplifier, the common mode amplifier comprising: a first input coupled to a non-inverting input of the programmable gain amplifier; a second input coupled to an inverting input of the programmable gain amplifier; a third input to receive a common-mode input voltage (V INCM ); and an output coupled to the non-inverting input and the inverting input of the programmable gain amplifier; floating input detection circuitry coupled to the AFE circuit ; wherein the floating input detection circuitry comprises coarse detection circuitry comprising: a first comparator configured to compare the signal provided at the output of the common mode amplifier (Vx) to a first threshold voltage (V TH ); and a second comparator configured to compare the signal provided at the output of the common mode amplifier (Vx) to a second threshold voltage (V TL ); wherein the floating input detection circuitry is configured to find the signal input terminal to be not floating based on: an output of the first comparator indicating that an amplitude of the signal provided at the output of the common mode amplifier is greater than the first threshold voltage; or an output of the second comparator indicating that an amplitude of the signal provided at the output of the common mode amplifier is less than the second threshold voltage. a signal input terminal ; an analog-to-digital converter, ADC ; an analog front end, AFE circuit coupled to the ADC and the signal input terminal , the AFE circuit comprising: a programmable gain amplifier ; and a common mode amplifier coupled to the programmable gain amplifier, the common mode amplifier comprising: a first input coupled to a non-inverting input of the programmable gain amplifier; a second input coupled to an inverting input of the programmable gain amplifier; a third input to receive a common-mode input voltage (V INCM ); and an output coupled to the non-inverting input and the inverting input of the programmable gain amplifier; a programmable gain amplifier ; and a common mode amplifier coupled to the programmable gain amplifier, the common mode amplifier comprising: a first input coupled to a non-inverting input of the programmable gain amplifier; a second input coupled to an inverting input of the programmable gain amplifier; a third input to receive a common-mode input voltage (V INCM ); and an output coupled to the non-inverting input and the inverting input of the programmable gain amplifier; floating input detection circuitry coupled to the AFE circuit ; a first comparator configured to compare the signal provided at the output of the common mode amplifier (Vx) to a first threshold voltage (V TH ); and a second comparator configured to compare the signal provided at the output of the common mode amplifier (Vx) to a second threshold voltage (V TL ); wherein the floating input detection circuitry is configured to find the signal input terminal to be not floating based on: an output of the first comparator indicating that an amplitude of the signal provided at the output of the common mode amplifier is greater than the first threshold voltage; or an output of the second comparator indicating that an amplitude of the signal provided at the output of the common mode amplifier is less than the second threshold voltage. an output of the first comparator indicating that an amplitude of the signal provided at the output of the common mode amplifier is greater than the first threshold voltage; or an output of the second comparator indicating that an amplitude of the signal provided at the output of the common mode amplifier is less than the second threshold voltage. <EOS>