A single slope analog to digital converter, ADC, comprising: a voltage slope generator ; a reference voltage generator configured to generate a first reference voltage, a second reference voltage, and a third reference voltage, where the first reference voltage equals the sum of the second reference voltage and the third reference voltage; wherein the second reference voltage and the third reference voltage are derived from the first reference voltage; a first comparator configured to compare a voltage to a voltage output from the voltage slope generator; a first register , Reg1, configured to store a first count based upon the first reference voltage being input into the first comparator; a fourth register , Reg4, configured to store a second count based upon the second reference voltage being input into the first comparator; a third register , Reg3, configured to store a third count based upon the third reference voltage being input into the first comparator; a second register , Reg2, configured to store a fourth count based upon a first input voltage being input into the first comparator, wherein the first input voltage is the voltage to be converted to a digital value by the ADC; and an output circuit configured to calculate a digital value for the first input voltage based upon the first, second, third, and fourth counts, wherein the digital value, Vx, for the first input voltage is calculated as: V X = Vref Reg 1 + Reg 2 − Reg 3 − Reg 4 2 ⋅ Reg 1 − Reg 3 − Reg 4 , where Vref is the first voltage reference, Reg1 is the first count stored in the first register, Reg2 is the second count stored in the second register, Reg3 is the third count stored in the third register, and Reg4 is the fourth count stored in the fourth register. a voltage slope generator ; a reference voltage generator configured to generate a first reference voltage, a second reference voltage, and a third reference voltage, where the first reference voltage equals the sum of the second reference voltage and the third reference voltage; wherein the second reference voltage and the third reference voltage are derived from the first reference voltage; a first comparator configured to compare a voltage to a voltage output from the voltage slope generator; a first register , Reg1, configured to store a first count based upon the first reference voltage being input into the first comparator; a fourth register , Reg4, configured to store a second count based upon the second reference voltage being input into the first comparator; a third register , Reg3, configured to store a third count based upon the third reference voltage being input into the first comparator; a second register , Reg2, configured to store a fourth count based upon a first input voltage being input into the first comparator, wherein the first input voltage is the voltage to be converted to a digital value by the ADC; and an output circuit configured to calculate a digital value for the first input voltage based upon the first, second, third, and fourth counts, wherein the digital value, Vx, for the first input voltage is calculated as: V X = Vref Reg 1 + Reg 2 − Reg 3 − Reg 4 2 ⋅ Reg 1 − Reg 3 − Reg 4 , where Vref is the first voltage reference, Reg1 is the first count stored in the first register, Reg2 is the second count stored in the second register, Reg3 is the third count stored in the third register, and Reg4 is the fourth count stored in the fourth register. <EOS>