A circuit arrangement, comprising: an array of multiply-and-accumulate, MAC, circuits, wherein each MAC circuit includes a cache configured for storage of a plurality of kernels, and the MAC circuits are configured to: receive each set of different sets of data elements of an input feature map, IFM, at a first rate or a second rate; perform first MAC operations on each set of the data elements and a first one of the kernels (H) associated with a first output feature map, OFM, depth index (d 2 ) during a first MAC cycle, wherein a rate of MAC cycles is faster than the first rate and the second rate; perform second MAC operations on each set of the data elements and a second one of the kernels (H) associated with a second OFM depth index (d 2 ) during a second MAC cycle that consecutively follows the first MAC cycle; perform, for each set of the sets of data elements received at the first rate, third MAC operations on the set of the data elements and a third one of the kernels (H) associated with a third OFM depth index (d 2 ) during a third MAC cycle that consecutively follows the second MAC cycle; and perform, for each set of the sets of data elements received at the second rate, fourth MAC operations on another set of the sets of data elements and a fourth one of the kernels (H) associated with a fourth OFM depth index (d 2 ) during the third MAC cycle. an array of multiply-and-accumulate, MAC, circuits, wherein each MAC circuit includes a cache configured for storage of a plurality of kernels, and the MAC circuits are configured to: receive each set of different sets of data elements of an input feature map, IFM, at a first rate or a second rate; perform first MAC operations on each set of the data elements and a first one of the kernels (H) associated with a first output feature map, OFM, depth index (d 2 ) during a first MAC cycle, wherein a rate of MAC cycles is faster than the first rate and the second rate; perform second MAC operations on each set of the data elements and a second one of the kernels (H) associated with a second OFM depth index (d 2 ) during a second MAC cycle that consecutively follows the first MAC cycle; perform, for each set of the sets of data elements received at the first rate, third MAC operations on the set of the data elements and a third one of the kernels (H) associated with a third OFM depth index (d 2 ) during receive each set of different sets of data elements of an input feature map, IFM, at a first rate or a second rate; perform first MAC operations on each set of the data elements and a first one of the kernels (H) associated with a first output feature map, OFM, depth index (d 2 ) during a first MAC cycle, wherein a rate of MAC cycles is faster than the first rate and the second rate; perform second MAC operations on each set of the data elements and a second one of the kernels (H) associated with a second OFM depth index (d 2 ) during a second MAC cycle that consecutively follows the first MAC cycle; perform, for each set of the sets of data elements received at the first rate, third MAC operations on the set of the data elements and a third one of the kernels (H) associated with a third OFM depth index (d 2 ) during a third MAC cycle that consecutively follows the second MAC cycle; and perform, for each set of the sets of data elements received at the second rate, fourth MAC operations on another set of the sets of data elements and a fourth one of the kernels (H) associated with a fourth OFM depth index (d 2 ) during the third MAC cycle. <EOS>