An avionics computing system comprising: a first processing board comprising a first processing device and a first control device; a second processing board comprising a second processing device and a second control device; and a communications interface communicatively coupled to the first processing board, the communications interface comprising one or more input/output ports configured to facilitate communication between the computing system and one or more external devices; wherein the first processing device is configured to host a first software application associated with a first design assurance level, the second processing device is configured to host a second software application associated with a second design assurance level, and the first design assurance level is a higher design assurance level than the second design assurance level; wherein the first control device of the first processing board is communicatively coupled to the second control device of the second processing board via a shared bus, and wherein the first control device is configured to regulate communications associated with the communications interface based on the respective design assurance levels of the first and second processing devices, such that the first processing device receives a higher priority than the second processing device and such that if the first processing device sends a communication request and a current communication status indicates that the second processing device is currently communicating with the port, communication access of the second processing device is interrupted and communication access to the first device is provided; and if the second processing device sends a communication request and the current communication status indicates that the first processing device is currently communicating with the port, communication access to the second processing device is denied. a first processing board comprising a first processing device and a first control device; a second processing board comprising a second processing device and a second control device; and a communications interface communicatively coupled to the first processing board, the communications interface comprising one or more input/output ports configured to facilitate communication between the computing system and one or more external devices; wherein the first processing device is configured to host a first software application associated with a first design assurance level, the second processing device is configured to host a second software application associated with a second design assurance level, and the first design assurance level is a higher design assurance level than the second design assurance level; wherein the first control device of the first processing board is communicatively coupled to the second control device of the second processing board via a shared bus, and wherein the first control device is configured to regulate communications associated with the communications interface based on the respective design assurance levels of the first and second processing devices, such that the first processing device receives a higher priority than the second processing device and such that if the first processing device sends a communication request and a current communication status indicates that the second processing device is currently communicating with the port, communication access of the second processing device is interrupted and communication access to the first device is provided; and if the second processing device sends a communication request and the current communication status indicates that the first processing device is currently communicating with the port, communication access to the second processing device is denied. <EOS>