A method of wafer-scale integration of semiconductor devices comprising: - providing a semiconductor wafer comprising integrated circuits , - providing a further semiconductor wafer , which differs from the semiconductor wafer in diameter and semiconductor material, with electrically conductive contact pads , - providing a handling wafer , - dividing the further semiconductor wafer into dies by means of wafer dicing, - arranging the dies on the handling wafer , an electrically conductive contact layer being arranged between the dies and the handling wafer , and permanently fastening the dies to the handling wafer , - bonding the dies to the semiconductor wafer by a bonding layer , gaps between the dies forming a void in the shape of a pattern of trenches, - forming a plurality of openings in the semiconductor wafer above the contact pads of the dies to uncover surface areas of the contact pads , - forming a plurality of further openings in the semiconductor wafer above the voids to uncover surface areas of the contact layer , - covering a sidewall of the openings with an insulation , - covering a sidewall of the further openings and the voids with a further insulation , - applying metal layers forming through-wafer contacts in the further openings on the uncovered surface areas of the contact layer and on the further insulation , said metal layers connecting said contact layer with said integrated circuits and - applying further metal layers forming further through-wafer contacts in the openings on the uncovered surface areas of the contact pads and on the insulation , said further metal layers connecting said contact pads with said integrated circuits . - providing a semiconductor wafer comprising integrated circuits , - providing a further semiconductor wafer , which differs from the semiconductor wafer in diameter and semiconductor material, with electrically conductive contact pads , - providing a handling wafer , - dividing the further semiconductor wafer into dies by means of wafer dicing, - arranging the dies on the handling wafer , an electrically conductive contact layer being arranged between the dies and the handling wafer , and permanently fastening the dies to the handling wafer , - bonding the dies to the semiconductor wafer by a bonding layer , gaps between the dies forming a void in the shape of a pattern of trenches, - forming a plurality of openings in the semiconductor wafer above the contact pads of the dies to uncover surface areas of the contact pads , - forming a plurality of further openings in the semiconductor wafer above the voids to uncover surface areas of the contact layer , - covering a sidewall of the openings with an insulation , - covering a sidewall of the further openings and the voids with a further insulation , - applying metal layers forming through-wafer contacts in the further openings on the uncovered surface areas of the contact layer and on the further insulation , said metal layers connecting said contact layer with said integrated circuits and - applying further metal layers forming further through-wafer contacts in the openings on the uncovered surface areas of the contact pads and on the insulation , said further metal layers connecting said contact pads with said integrated circuits . <EOS>