A multiple-path amplifier being a Doherty power amplifier comprising: a semiconductor die ; first and second amplifier input terminals and an amplifier output terminal integrally-formed with the semiconductor die ; and at least two amplifier cells (340-347) positioned between the first and second amplifier input terminals and the amplifier output terminal , wherein the at least two amplifier cells (340-347) are positioned side-by-side and directly adjacent to each other on the semiconductor die , and each amplifier cell (340-347) of the at least two amplifier cells includes a first transistor integrally-formed with the semiconductor die , wherein the first transistor has a first transistor input and a first transistor output , wherein the first transistor input is coupled to the first amplifier input terminal , a second transistor integrally-formed with the semiconductor die , wherein the second transistor has a second transistor input and a second transistor output , wherein the second transistor input is coupled to the second amplifier input terminal , a combining node coupled to the second transistor output and to the amplifier output terminal , a first phase shift element electrically connected between the first transistor output and the combining node , and wherein either the first transistor is a carrier transistor and the second transistor is a peaking transistor or, alternatively, the first transistor is a peaking transistor and the second transistor is a carrier transistor. a semiconductor die ; first and second amplifier input terminals and an amplifier output terminal integrally-formed with the semiconductor die ; and at least two amplifier cells (340-347) positioned between the first and second amplifier input terminals and the amplifier output terminal , wherein the at least two amplifier cells (340-347) are positioned side-by-side and directly adjacent to each other on the semiconductor die , and each amplifier cell (340-347) of the at least two amplifier cells includes a first transistor integrally-formed with the semiconductor die , wherein the first transistor has a first transistor input and a first transistor output , wherein the first transistor input is coupled to the first amplifier input terminal , a second transistor integrally-formed with the semiconductor die , wherein the second transistor has a second transistor input and a second transistor output , wherein the second transistor input is coupled to the second amplifier input terminal , a combining node coupled to the second transistor output and to the amplifier output terminal , a first phase shift element electrically connected between the first transistor output and the combining node , and a first transistor integrally-formed with the semiconductor die , wherein the first transistor has a first transistor input and a first transistor output , wherein the first transistor input is coupled to the first amplifier input terminal , a second transistor integrally-formed with the semiconductor die , wherein the second transistor has a second transistor input and a second transistor output , wherein the second transistor input is coupled to the second amplifier input terminal , a combining node coupled to the second transistor output and to the amplifier output terminal , a first phase shift element electrically connected between the first transistor output and the combining node , and wherein either the first transistor is a carrier transistor and the second transistor is a peaking transistor or, alternatively, the first transistor is a peaking transistor and the second transistor is a carrier transistor. <EOS>