HF circuit (HFS) comprising - a first transmission port (TX1), a first reception port (RX1), a common port (GP), and a third port (P3), - a first duplexer (DU1) with a transmission filter (TXF), which is connected between the first transmission port (TX1) and the common port (GP), and a reception filter (RXF), which is connected between the first reception port (RX1) and the common port (GP), - a third filter (F3), which is connected between the third port (P3) and the common port (GP), - a first phase shifter (PS1), which is connected between the first duplexer (DU1) and the common port (GP) of the HF circuit (HFS), - a second phase shifter (PS2), which is connected between the third filter (F3) and the common port (GP) of the HF circuit (HFS), wherein - the third filter (F3) is a bandpass filter, - the HF circuit (HFS) is provided to simultaneously transmit transmission signals via the transmission filter (TXF) and the third filter (F3), or reception signals via the reception filter (RXF) and the third filter (F3), characterized in that at least one filter (TXF, RXF, F3) can be tuned or all filters (TXF, RXF, F3) can be tuned, wherein at least one phase shifter (PS, PS1, PS2) or all phase shifters (PS, PS1, PS2) each comprise - a serial capacitive element, - two parallel paths, each having an inductive element, and - a capacitive element which connects the two parallel paths to ground, and wherein at least one filter (TXF, RXF, F3, F6) comprises a filter topology with - a parallel inductive element (IE), - three serial capacitive elements (KE), and - four parallel paths (PP), each with a parallel circuit with a capacitive element and an inductive element. - a first transmission port (TX1), a first reception port (RX1), a common port (GP), and a third port (P3), - a first duplexer (DU1) with a transmission filter (TXF), which is connected between the first transmission port (TX1) and the common port (GP), and a reception filter (RXF), which is connected between the first reception port (RX1) and the common port (GP), - a third filter (F3), which is connected between the third port (P3) and the common port (GP), - a first phase shifter (PS1), which is connected between the first duplexer (DU1) and the common port (GP) of the HF circuit (HFS), - a second phase shifter (PS2), which is connected between the third filter (F3) and the common port (GP) of the HF circuit (HFS), wherein - the third filter (F3) is a bandpass filter, - the HF circuit (HFS) is provided to simultaneously transmit transmission signals via the transmission filter (TXF) and the third filter (F3), or reception signals via the reception filter (RXF) and the third filter (F3), characterized in that at least one filter (TXF, RXF, F3) can be tuned or all filters (TXF, RXF, F3) can be tuned, wherein at least one phase shifter (PS, PS1, PS2) or all phase shifters (PS, PS1, PS2) each comprise - a serial capacitive element, - two parallel paths, each having an inductive element, and - a capacitive element which connects the two parallel paths to ground, and - a serial capacitive element, - two parallel paths, each having an inductive element, and - a capacitive element which connects the two parallel paths to ground, and wherein at least one filter (TXF, RXF, F3, F6) comprises a filter topology with - a parallel inductive element (IE), - three serial capacitive elements (KE), and - four parallel paths (PP), each with a parallel circuit with a capacitive element and an inductive element. - a parallel inductive element (IE), - three serial capacitive elements (KE), and - four parallel paths (PP), each with a parallel circuit with a capacitive element and an inductive element. <EOS>