An integrated-circuit image sensor, comprising a pixel array having: a first photodetector formed within a substrate; a floating diffusion formed within the substrate; first and second gate elements (881 and 883) disposed adjacent one another over a first charge transfer region of the substrate between the first photodetector and the floating diffusion , the first and second gate elements (881 and 883) respectively controlling first and second serial sections of the first charge transfer region; a first row line extending in a row direction within the pixel array and coupled to the first gate element ; a first column line extending in a column direction within the pixel array and coupled to the second gate element , wherein the first and the second gate elements (881 and 883) are disposed closely enough to one another that the resulting overlapping electrostatic fields form a continuous enhancement channel in the first charge transfer region extending between the first photodetector and the floating diffusion when both row and column control signals are asserted, while maintaining an ability to interrupt the channel when either one of the row and column control signals are deasserted; further comprising row circuitry being configured to assert, as at least part of the row control signal on the first row line, a partial-transfer pulse at a first time and a full-transfer pulse at a second time, the partial-transfer pulse enabling a partial transfer of charge from the first photodetector to the floating diffusion if charge accumulated within the first photodetector exceeds a threshold level, and the full-transfer pulse conditionally enabling a full transfer of charge from the first photodetector to the floating diffusion, the full transfer of charge effecting a reset of the photodetector, in particular wherein the partial-transfer pulse and full transfer pulse differ from one another in respect to at least one of amplitude or duration. a first photodetector formed within a substrate; a floating diffusion formed within the substrate; first and second gate elements (881 and 883) disposed adjacent one another over a first charge transfer region of the substrate between the first photodetector and the floating diffusion , the first and second gate elements (881 and 883) respectively controlling first and second serial sections of the first charge transfer region; a first row line extending in a row direction within the pixel array and coupled to the first gate element ; a first column line extending in a column direction within the pixel array and coupled to the second gate element , wherein the first and the second gate elements (881 and 883) are disposed closely enough to one another that the resulting overlapping electrostatic fields form a continuous enhancement channel in the first charge transfer region extending between the first photodetector and the floating diffusion when both row and column control signals are asserted, while maintaining an ability to interrupt the channel when either one of the row and column control signals are deasserted; further comprising row circuitry being configured to assert, as at least part of the row control signal on the first row line, a partial-transfer pulse at a first time and a full-transfer pulse at a second time, the partial-transfer pulse enabling a partial transfer of charge from the first photodetector to the floating diffusion if charge accumulated within the first photodetector exceeds a threshold level, and the full-transfer pulse conditionally enabling a full transfer of charge from the first photodetector to the floating diffusion, the full transfer of charge effecting a reset of the photodetector, in particular wherein the partial-transfer pulse and full transfer pulse differ from one another in respect to at least one of amplitude or duration. <EOS>