An integrated circuit for temperature detection comprising: a closed loop circuit branch comprising: a first bipolar junction transistor, BJT, (Q1) having a first collector configured to receive a first current and a first emitter coupled to ground, a first resistor (R3) having one terminal coupled to a first base of the first BJT (Q1) and another terminal coupled to a junction node (N1), and an amplifier (A1) having an output coupled to the junction node (N1) and a non-inverting input coupled to the first collector of the first BJT and an inverting input configured to receive a bias voltage (Vbias); and an open loop circuit branch comprising: a second BJT (Q2) having a second collector configured to receive a second current (I2) and a second emitter coupled to ground, a second resistor (R1) having one terminal coupled to a second base of the second BJT (Q2) and another terminal coupled to the junction node (N1) of the closed loop circuit branch, a third resistor (R2) having one terminal coupled to the second base of the second BJT (Q2) and another terminal coupled to ground, and a comparator (A2) having an inverting input coupled to the second collector of the second BJT (Q2) and a non-inverting input configured to receive a bias voltage (Vbias), and an output configured to provide a digital voltage signal (Vout) that corresponds to a temperature reading. a closed loop circuit branch comprising: a first bipolar junction transistor, BJT, (Q1) having a first collector configured to receive a first current and a first emitter coupled to ground, a first resistor (R3) having one terminal coupled to a first base of the first BJT (Q1) and another terminal coupled to a junction node (N1), and an amplifier (A1) having an output coupled to the junction node (N1) and a non-inverting input coupled to the first collector of the first BJT and an inverting input configured to receive a bias voltage (Vbias); and a first bipolar junction transistor, BJT, (Q1) having a first collector configured to receive a first current and a first emitter coupled to ground, a first resistor (R3) having one terminal coupled to a first base of the first BJT (Q1) and another terminal coupled to a junction node (N1), and an amplifier (A1) having an output coupled to the junction node (N1) and a non-inverting input coupled to the first collector of the first BJT and an inverting input configured to receive a bias voltage (Vbias); and an open loop circuit branch comprising: a second BJT (Q2) having a second collector configured to receive a second current (I2) and a second emitter coupled to ground, a second resistor (R1) having one terminal coupled to a second base of the second BJT (Q2) and another terminal coupled to the junction node (N1) of the closed loop circuit branch, a third resistor (R2) having one terminal coupled to the second base of the second BJT (Q2) and another terminal coupled to ground, and a comparator (A2) having an inverting input coupled to the second collector of the second BJT (Q2) and a non-inverting input configured to receive a bias voltage (Vbias), and an output configured to provide a digital voltage signal (Vout) that corresponds to a temperature reading. a second BJT (Q2) having a second collector configured to receive a second current (I2) and a second emitter coupled to ground, a second resistor (R1) having one terminal coupled to a second base of the second BJT (Q2) and another terminal coupled to the junction node (N1) of the closed loop circuit branch, a third resistor (R2) having one terminal coupled to the second base of the second BJT (Q2) and another terminal coupled to ground, and a comparator (A2) having an inverting input coupled to the second collector of the second BJT (Q2) and a non-inverting input configured to receive a bias voltage (Vbias), and an output configured to provide a digital voltage signal (Vout) that corresponds to a temperature reading. <EOS>