A method for manufacturing a plurality of light emitting elements, the method comprising: providing a semiconductor wafer comprising: a substrate , an n-side nitride semiconductor layer containing an n-type impurity and located on the substrate , a p-side nitride semiconductor layer containing a p-type impurity and located on the n-side nitride semiconductor layer , and an active layer located between the n-side nitride semiconductor layer and the p-side nitride semiconductor layer ; forming a protective layer on an upper face of the p-side nitride semiconductor layer in regions that include each of the borders of areas to become the plurality of light emitting elements; reducing an electrical resistance of the p-side nitride semiconductor layer in areas where no protective layer has been formed while allowing the p-side nitride semiconductor layer in areas where the protective layer is formed to retain its high resistance by annealing the semiconductor wafer; irradiating a laser beam on the substrate so as to form modified regions in the substrate serving as a starting point when dividing the semiconductor wafer; and obtaining a plurality of light emitting elements by dividing the semiconductor wafer in which the modified regions have been formed in the substrate , characterised in that with respect to each of the plurality of light emitting elements obtained, the entire peripheral portion of the p-side nitride semiconductor layer is flush with the entire peripheral portions of the substrate , the n-side nitride semiconductor layer , the active layer , and the protective layer . providing a semiconductor wafer comprising: a substrate , an n-side nitride semiconductor layer containing an n-type impurity and located on the substrate , a p-side nitride semiconductor layer containing a p-type impurity and located on the n-side nitride semiconductor layer , and an active layer located between the n-side nitride semiconductor layer and the p-side nitride semiconductor layer ; a substrate , an n-side nitride semiconductor layer containing an n-type impurity and located on the substrate , a p-side nitride semiconductor layer containing a p-type impurity and located on the n-side nitride semiconductor layer , and an active layer located between the n-side nitride semiconductor layer and the p-side nitride semiconductor layer ; forming a protective layer on an upper face of the p-side nitride semiconductor layer in regions that include each of the borders of areas to become the plurality of light emitting elements; reducing an electrical resistance of the p-side nitride semiconductor layer in areas where no protective layer has been formed while allowing the p-side nitride semiconductor layer in areas where the protective layer is formed to retain its high resistance by annealing the semiconductor wafer; irradiating a laser beam on the substrate so as to form modified regions in the substrate serving as a starting point when dividing the semiconductor wafer; and obtaining a plurality of light emitting elements by dividing the semiconductor wafer in which the modified regions have been formed in the substrate , characterised in that with respect to each of the plurality of light emitting elements obtained, the entire peripheral portion of the p-side nitride semiconductor layer is flush with the entire peripheral portions of the substrate , the n-side nitride semiconductor layer , the active layer , and the protective layer . <EOS>