Optical sensor arrangement, comprising - a light sensor , - a current source , - an analog-to-digital converter that comprises an amplifier , a reference capacitor and a digital control circuit , and -a supply voltage terminal which is coupled to the reference capacitor , - a switch which selectively couples the light sensor or the current source to an input of the amplifier via an input of the analog-to-digital converter , wherein a further output of the digital control circuit is coupled to a control terminal of the switch , -a first bias source that is connected to a further input of the amplifier , characterized in that the analog-to-digital converter comprises - a reference switch , wherein the reference capacitor is coupled via the reference switch to the input of the amplifier and is designed for providing a charge package (QREF) to the input of the amplifier , - an integrating capacitor which couples an output of the amplifier to the input of the amplifier , and - a comparator having an input that is connected to the output of the amplifier , wherein an output of the comparator is connected to the digital control circuit and a control output of the digital control circuit is connected to a control terminal of the reference switch , - a second bias source which is connected to a further input of the comparator , wherein the current source is realized as a variable current source such that a value of a calibration current (ICAL) of the current source is set by a trimming signal (ST) that is a digital signal, and wherein the reference capacitor is designed such that a capacitance value (CREF) of the reference capacitor is set by a trim control signal (SDC) that is a digital signal. - a light sensor , - a current source , - an analog-to-digital converter that comprises an amplifier , a reference capacitor and a digital control circuit , and -a supply voltage terminal which is coupled to the reference capacitor , - a switch which selectively couples the light sensor or the current source to an input of the amplifier via an input of the analog-to-digital converter , wherein a further output of the digital control circuit is coupled to a control terminal of the switch , -a first bias source that is connected to a further input of the amplifier , - a reference switch , wherein the reference capacitor is coupled via the reference switch to the input of the amplifier and is designed for providing a charge package (QREF) to the input of the amplifier , - an integrating capacitor which couples an output of the amplifier to the input of the amplifier , and - a comparator having an input that is connected to the output of the amplifier , wherein an output of the comparator is connected to the digital control circuit and a control output of the digital control circuit is connected to a control terminal of the reference switch , - a second bias source which is connected to a further input of the comparator , wherein the current source is realized as a variable current source such that a value of a calibration current (ICAL) of the current source is set by a trimming signal (ST) that is a digital signal, and wherein the reference capacitor is designed such that a capacitance value (CREF) of the reference capacitor is set by a trim control signal (SDC) that is a digital signal. wherein an output of the comparator is connected to the digital control circuit and a control output of the digital control circuit is connected to a control terminal of the reference switch , - a second bias source which is connected to a further input of the comparator , wherein the current source is realized as a variable current source such that a value of a calibration current (ICAL) of the current source is set by a trimming signal (ST) that is a digital signal, and wherein the reference capacitor is designed such that a capacitance value (CREF) of the reference capacitor is set by a trim control signal (SDC) that is a digital signal. <EOS>