A circuit comprising: an input register configured to receive an input vector of input elements, wherein the input vector is received as a staggered input such that each input element of the input vector is received at each cycle in an order beginning with a lowest-order bit position of the input vector; a control register configured to receive a control vector of control elements, wherein each control element of the control vector corresponds to a respective input element of the input vector, and wherein each control element of the control vector specifies a permutation of a corresponding input element of the input vector, the permutation specifying a number of positions to rotate the corresponding input element of the input vector; and a permute execution circuit configured to generate an output vector of output elements corresponding to a permutation of the input vector, wherein generating each output element of the output vector comprises: accessing, at a particular position of the input register, a particular input element of the input vector; accessing, at the control register, a particular control element of the control vector corresponding to the particular input element of the input vector; selecting a particular position of the output vector based on i) the particular position of the particular input element in the input register and ii) a number of positions to rotate the particular element of the input vector specified by the particular control element of the control vector; and outputting the particular input element of the input vector as an output element at the particular position of the output vector. an input register configured to receive an input vector of input elements, wherein the input vector is received as a staggered input such that each input element of the input vector is received at each cycle in an order beginning with a lowest-order bit position of the input vector; a control register configured to receive a control vector of control elements, wherein each control element of the control vector corresponds to a respective input element of the input vector, and wherein each control element of the control vector specifies a permutation of a corresponding input element of the input vector, the permutation specifying a number of positions to rotate the corresponding input element of the input vector; and a permute execution circuit configured to generate an output vector of output elements corresponding to a permutation of the input vector, wherein generating each output element of the output vector comprises: accessing, at a particular position of the input register, a particular input element of the input vector; accessing, at the control register, a particular control element of the control vector corresponding to the particular input element of the input vector; selecting a particular position of the output vector based on i) the particular position of the particular input element in the input register and ii) a number of positions to rotate the particular element of the input vector specified by the particular control element of the control vector; and outputting the particular input element of the input vector as an output element at the particular position of the output vector. accessing, at a particular position of the input register, a particular input element of the input vector; accessing, at the control register, a particular control element of the control vector corresponding to the particular input element of the input vector; selecting a particular position of the output vector based on i) the particular position of the particular input element in the input register and ii) a number of positions to rotate the particular element of the input vector specified by the particular control element of the control vector; and outputting the particular input element of the input vector as an output element at the particular position of the output vector. <EOS>