A discrete-time high voltage generating circuitry comprising: - a high voltage source (HV_SUP); - a current mirror circuitry (CURMIR) configured to receive a supply current from the high voltage source and to provide an output current; - a high voltage control circuitry ; - a high voltage output (HV_OUT); and - a current mirror control transistor (i1) configured to control a reference current from the high voltage source towards the current mirror circuitry (CURMIR), wherein the current mirror circuitry is configured to be activated by providing a logical high value at a gate of the current mirror control transistor (i1); characterized in that the high voltage control circuitry is configured to use the output current for generating a discrete-time high voltage at the high voltage output (HV_OUT) during defined high voltage periods (BIAS), and to set the high voltage output to a zero current state during periods (READ) different than the defined high voltage periods, wherein the high voltage control circuitry comprises - a voltage division network comprising two capacitors (C1, C2) connected in series, wherein the voltage division network is configured to receive part of the output current; and - a comparator (comp1) configured to compare a voltage level between the two capacitors of the voltage division network to a preset reference voltage (VREF) and, in response to the comparing, provide in its output a logical signal for controlling the current mirror circuitry (CURMIR) and for controlling provision of the output current; and - at least one reset switch (sw4, sw5) configured to cause resetting voltages over the capacitors (C1, C2) of the voltage division network to essentially zero voltage prior to enabling discrete-time high voltage generation and after disabling discrete-time high voltage generation. - a high voltage source (HV_SUP); - a current mirror circuitry (CURMIR) configured to receive a supply current from the high voltage source and to provide an output current; - a high voltage control circuitry ; - a high voltage output (HV_OUT); and - a current mirror control transistor (i1) configured to control a reference current from the high voltage source towards the current mirror circuitry (CURMIR), wherein the current mirror circuitry is configured to be activated by providing a logical high value at a gate of the current mirror control transistor (i1); - a voltage division network comprising two capacitors (C1, C2) connected in series, wherein the voltage division network is configured to receive part of the output current; and - a comparator (comp1) configured to compare a voltage level between the two capacitors of the voltage division network to a preset reference voltage (VREF) and, in response to the comparing, provide in its output a logical signal for controlling the current mirror circuitry (CURMIR) and for controlling provision of the output current; and - at least one reset switch (sw4, sw5) configured to cause resetting voltages over the capacitors (C1, C2) of the voltage division network to essentially zero voltage prior to enabling discrete-time high voltage generation and after disabling discrete-time high voltage generation. <EOS>