A light receiving element comprising a plurality of pixels , each pixel comprising: an on-chip lens ; a wiring layer ; and a semiconductor layer disposed between the on-chip lens and the wiring layer , wherein the semiconductor layer includes: a photodiode (PD); a first transfer transistor (TRG1) configured to transfer electric charge generated in the photodiode (PD) from the photodiode (PD) to a first charge storage portion being a first floating diffusion region (FD1); an interpixel separation portion that separates the semiconductor layer of the pixel from a semiconductor layer of an adjacent pixel , for at least part of the semiconductor layer in the depth direction, characterized in that a second transfer transistor (TRG2) is configured to transfer electric charge generated in the photodiode (PD) from the photodiode (PD) to a second charge storage portion being a second floating diffusion region (FD2) and the wiring layer has at least one layer being closest to the semiconductor layer and including an infrared light blocking member configured to prevent light that has not been photoelectrically converted from being scattered by a metal film of the wiring layer and entering an adjacent pixel , and the light blocking member is disposed to overlap with the photodiode (PD) in a plan view. an on-chip lens ; a wiring layer ; and a semiconductor layer disposed between the on-chip lens and the wiring layer , wherein the semiconductor layer includes: a photodiode (PD); a first transfer transistor (TRG1) configured to transfer electric charge generated in the photodiode (PD) from the photodiode (PD) to a first charge storage portion being a first floating diffusion region (FD1); an interpixel separation portion that separates the semiconductor layer of the pixel from a semiconductor layer of an adjacent pixel , for at least part of the semiconductor layer in the depth direction, characterized in that a second transfer transistor (TRG2) is configured to transfer electric charge generated in the photodiode (PD) from the photodiode (PD) to a second charge storage portion being a second floating diffusion region (FD2) and the wiring layer has at least one layer being closest to the semiconductor layer and including an infrared light blocking member configured to prevent light that has not been photoelectrically converted from being scattered by a metal film of the wiring layer and entering an adjacent pixel , and the light blocking member is disposed to overlap with the photodiode (PD) in a plan view. a photodiode (PD); a first transfer transistor (TRG1) configured to transfer electric charge generated in the photodiode (PD) from the photodiode (PD) to a first charge storage portion being a first floating diffusion region (FD1); an interpixel separation portion that separates the semiconductor layer of the pixel from a semiconductor layer of an adjacent pixel , for at least part of the semiconductor layer in the depth direction, characterized in that a second transfer transistor (TRG2) is configured to transfer electric charge generated in the photodiode (PD) from the photodiode (PD) to a second charge storage portion being a second floating diffusion region (FD2) and the wiring layer has at least one layer being closest to the semiconductor layer and including an infrared light blocking member configured to prevent light that has not been photoelectrically converted from being scattered by a metal film of the wiring layer and entering an adjacent pixel , and the light blocking member is disposed to overlap with the photodiode (PD) in a plan view. <EOS>