A method for executing program instructions on a processor, comprising: issuing instructions for execution during a normal-execution mode; and upon determining that an unresolved data dependency during execution of an instruction in the normal-execution mode has caused a data-dependent stall condition, transitioning execution from the normal execution mode to a lookahead mode, said transitioning to lookahead mode including checkpointing state information for the processor but not architectural registers; wherein executing in the lookahead mode comprises: speculatively executing subsequent instructions to prefetch future loads; and when an instruction retires during the lookahead mode, a working register which serves as a destination register for the instruction is not copied to an architectural register, and a working register which serves as a destination register for the instruction is not de-allocated right away, but is instead de-allocated at a later time when a strand that is not operating in lookahead mode requires a working register and the working register file is full, and wherein the architectural register is marked as invalid when the working register is de-allocated; and when the unresolved data dependency that originally caused the move out of normal-execution mode is finally resolved, resuming execution in the normal-execution mode from the instruction that caused the unresolved data dependency; wherein not updating architectural registers eliminates the need to checkpoint the architectural registers prior to entering the lookahead mode. issuing instructions for execution during a normal-execution mode; and upon determining that an unresolved data dependency during execution of an instruction in the normal-execution mode has caused a data-dependent stall condition, transitioning execution from the normal execution mode to a lookahead mode, said transitioning to lookahead mode including checkpointing state information for the processor but not architectural registers; wherein executing in the lookahead mode comprises: speculatively executing subsequent instructions to prefetch future loads; and when an instruction retires during the lookahead mode, a working register which serves as a destination register for the instruction is not copied to an architectural register, and a working register which serves as a destination register for the instruction is not de-allocated right away, but is instead de-allocated at a later time when a strand that is not operating in lookahead mode requires a working register and the working register file is full, and wherein the architectural register is marked as invalid when the working register is de-allocated; and speculatively executing subsequent instructions to prefetch future loads; and when an instruction retires during the lookahead mode, a working register which serves as a destination register for the instruction is not copied to an architectural register, and a working register which serves as a destination register for the instruction is not de-allocated right away, but is instead de-allocated at a later time when a strand that is not operating in lookahead mode requires a working register and the working register file is full, and wherein the architectural register is marked as invalid when the working register is de-allocated; and when the unresolved data dependency that originally caused the move out of normal-execution mode is finally resolved, resuming execution in the normal-execution mode from the instruction that caused the unresolved data dependency; wherein not updating architectural registers eliminates the need to checkpoint the architectural registers prior to entering the lookahead mode.