An insulated gate bipolar transistor, comprising - a semiconductor substrate having a top and a bottom surface, a gate insulation film formed on the top surface, said gate insulation film comprising at least one contact opening, - said semiconductor substrate comprising • an emitter layer of first conductivity type adjoining said bottom surface, • a drift region of second conductivity type adjoining said emitter layer, • a channel region of first conductivity type formed in the drift region underneath the contact opening and underneath part of the gate insulation film, • one or more source regions of second conductivity type disposed in the channel region and delimiting a base contact area; - a gate electrode formed on the gate insulation film. - a bottom metallization layer formed on the bottom surface, - a top metallization layer covering the contact opening and being contacted by one or more source regions, characterized in that - a first base region of first conductivity type is disposed in the channel region so that it encompasses the one or more source regions, but does not adjoin the second main surface underneath the gate oxide layer, and in that - a second base region of first conductivity type is disposed in the semiconductor substrate to a region underneath the base contact area so that it partially overlaps with the channel region and with the first base region and does not extend or overlap laterally the one or more source regions, wherein the first and second base regions (81, 82) have a higher doping concentration than the channel region. - a semiconductor substrate having a top and a bottom surface, a gate insulation film formed on the top surface, said gate insulation film comprising at least one contact opening, - said semiconductor substrate comprising • an emitter layer of first conductivity type adjoining said bottom surface, • a drift region of second conductivity type adjoining said emitter layer, • a channel region of first conductivity type formed in the drift region underneath the contact opening and underneath part of the gate insulation film, • one or more source regions of second conductivity type disposed in the channel region and delimiting a base contact area; • an emitter layer of first conductivity type adjoining said bottom surface, • a drift region of second conductivity type adjoining said emitter layer, • a channel region of first conductivity type formed in the drift region underneath the contact opening and underneath part of the gate insulation film, • one or more source regions of second conductivity type disposed in the channel region and delimiting a base contact area; - a gate electrode formed on the gate insulation film. - a bottom metallization layer formed on the bottom surface, - a top metallization layer covering the contact opening and being contacted by one or more source regions, characterized in that - a first base region of first conductivity type is disposed in the channel region so that it encompasses the one or more source regions, but does not adjoin the second main surface underneath the gate oxide layer, and in that - a second base region of first conductivity type is disposed in the semiconductor substrate to a region underneath the base contact area so that it partially overlaps with the channel region and with the first base region and does not extend or overlap laterally the one or more source regions, wherein the first and second base regions (81, 82) have a higher doping concentration than the channel region.