A multi-level inverter comprising: n H-bridge multi-level legs (1340, 1360), each of which has multiple cascaded H-bridge inverters (1342, 1344, 1346, 1362, 1364, 1366), wherein n is an integer larger than 1; and a coupled inductor having n windings wound around a core and coupled together at a junction node of the n windings, wherein the n H-bridge multi-level legs are coupled in parallel through the coupled inductor, each of the n H-bridge multi-level legs (1340, 1360) is coupled to a respective one of the n windings for providing an input voltage (V1, V2) with multiple voltage levels to the respective one of the n windings, and the junction node of the n winding is configured to form an output terminal of the multi-level inverter for providing multi-level output levels, each of the cascaded H-bridge inverters (1342, 1344, 1346, 1362, 1364, 1366) includes a first half bridge leg (F11, F21, F31, F41, F51, F61) and a second half bridge leg (F12, F22, F32, F42, F52, F62) that are connected in parallel to each other, each first and second half bridge leg (F12, F22, F32, F42, F52, F62) includes a high side switch (QHA1, QHA2, QHA3, QAH4, QAH5, QAH6) and a low side switch (QLA1, QLA2, QLA3, QAL4, QLH5, QLH6) coupled in series to each other at a respective first and second half bridge leg junction, each first half bridge leg junction of a first H-bridge inverter (1342, 1362, F11, F41) from the multiple cascaded H-bridge inverters in all of the n H-bridge multi-level legs is connected to a common junction node, each second half bridge leg junction of each of the multiple cascaded H-bridge inverters (1342,1344, 1362,1364, F12, F22, F42, F52) with exception of a last H-bridge inverter (1346,1366,F32,F62) in each of the n H-bridge multi-level legs is connected to the first half bridge leg junction of a consecutive H-bridge inverter (1344, 1346, 1364, 1366, F21, F31, F51, F61) from the respective multiple cascaded H-bridge inverters in the respective H-bridge multi-level leg, the second half bridge leg junction of the last H-bridge inverter (1346,1366, F31, F61) from the multiple cascaded H-bridge inverters in each of the n H-bridge multi-level legs is connected to said respective one of the n windings, and the input voltages provided by the n H-bridge multi-level legs (1340, 1360) to the n windings have a phase shift ( θ) relative to each other. n H-bridge multi-level legs (1340, 1360), each of which has multiple cascaded H-bridge inverters (1342, 1344, 1346, 1362, 1364, 1366), wherein n is an integer larger than 1; and a coupled inductor having n windings wound around a core and coupled together at a junction node of the n windings, wherein the n H-bridge multi-level legs are coupled in parallel through the coupled inductor, each of the n H-bridge multi-level legs (1340, 1360) is coupled to a respective one of the n windings for providing an input voltage (V1, V2) with multiple voltage levels to the respective one of the n windings, and the junction node of the n winding is configured to form an output terminal of the multi-level inverter for providing multi-level output levels, each of the cascaded H-bridge inverters (1342, 1344, 1346, 1362, 1364, 1366) includes a first half bridge leg (F11, F21, F31, F41, F51, F61) and a second half bridge leg (F12, F22, F32, F42, F52, F62) that are connected in parallel to each other, each first and second half bridge leg (F12, F22, F32, F42, F52, F62) includes a high side switch (QHA1, QHA2, QHA3, QAH4, QAH5, QAH6) and a low side switch (QLA1, QLA2, QLA3, QAL4, QLH5, QLH6) coupled in series to each other at a respective first and second half bridge leg junction, each first half bridge leg junction of a first H-bridge inverter (1342, 1362, F11, F41) from the multiple cascaded H-bridge inverters in all of the n H-bridge multi-level legs is connected to a common junction node, each second half bridge leg junction of each of the multiple cascaded H-bridge inverters (1342,1344, 1362,1364, F12, F22, F42, F52) with exception of a last H-bridge inverter (1346,1366,F32,F62) in each of the n H-bridge multi-level legs is connected to the first half bridge leg junction of a consecutive H-bridge inverter (1344, 1346, 1364, 1366, F21, F31, F51, F61) from the respective multiple cascaded H-bridge inverters in the respective H-bridge multi-level leg, the second half bridge leg junction of the last H-bridge inverter (1346,1366, F31, F61) from the multiple cascaded H-bridge inverters in each of the n H-bridge multi-level legs is connected to said respective one of the n windings, and the input voltages provided by the n H-bridge multi-level legs (1340, 1360) to the n windings have a phase shift ( θ) relative to each other.