An organic light emitting diode display comprising: a display area, in which first scan lines, second scan lines, and emission lines are disposed to intersect data lines, and pixels (Pj) are disposed in a matrix; a data driver configured to supply a data voltage (Data) to the data lines; and a shift register configured to supply a first scan signal (SCAN1(j)) to the first scan lines (SL1(j)), supply a second scan signal (SCAN2(j)) to the second scan lines (SL2(j)), and supply an emission control signal (EM(j)) to the emission lines, wherein the shift register includes: a pair of first scan signal stages (SCAN1D(j), SCAN1D(j+1)) configured to sequentially supply the first scan signal (SCAN1) to pixels (Pj, Pj+1) arranged on two adjacent horizontal lines (HLn, HLn+1); a pair of second scan signal stages (SCAN2D(j), SCAN2D(j+1)) configured to sequentially supply the second scan signal (SCAN2) to the pixels (Pj, Pj+1) arranged on the two adjacent horizontal lines (HLn, HLn+1); and an emission control signal stage (EMD(j)) configured to simultaneously supply the emission control signal (EM(j)) to the pixels (Pj, Pj+1) arranged on the two adjacent horizontal lines (HLn, HLn+1), wherein a first stage (SCAN1D(j)) of the pair of first scan signal stages and a second stage (SCAN2D(j+1)) of the pair of second scan signal stages are both disposed on one of a left or right side of the display area, and a first stage (SCAN2D(j)) of the pair of second scan signal stages and a second stage (SCAN1D(j+1)) of the pair of first scan signal stages are both disposed on the other one of the left or right side of the display area. a display area, in which first scan lines, second scan lines, and emission lines are disposed to intersect data lines, and pixels (Pj) are disposed in a matrix; a data driver configured to supply a data voltage (Data) to the data lines; and a shift register configured to supply a first scan signal (SCAN1(j)) to the first scan lines (SL1(j)), supply a second scan signal (SCAN2(j)) to the second scan lines (SL2(j)), and supply an emission control signal (EM(j)) to the emission lines, wherein the shift register includes: a pair of first scan signal stages (SCAN1D(j), SCAN1D(j+1)) configured to sequentially supply the first scan signal (SCAN1) to pixels (Pj, Pj+1) arranged on two adjacent horizontal lines (HLn, HLn+1); a pair of second scan signal stages (SCAN2D(j), SCAN2D(j+1)) configured to sequentially supply the second scan signal (SCAN2) to the pixels (Pj, Pj+1) arranged on the two adjacent horizontal lines (HLn, HLn+1); and an emission control signal stage (EMD(j)) configured to simultaneously supply the emission control signal (EM(j)) to the pixels (Pj, Pj+1) arranged on the two adjacent horizontal lines (HLn, HLn+1), a pair of first scan signal stages (SCAN1D(j), SCAN1D(j+1)) configured to sequentially supply the first scan signal (SCAN1) to pixels (Pj, Pj+1) arranged on two adjacent horizontal lines (HLn, HLn+1); a pair of second scan signal stages (SCAN2D(j), SCAN2D(j+1)) configured to sequentially supply the second scan signal (SCAN2) to the pixels (Pj, Pj+1) arranged on the two adjacent horizontal lines (HLn, HLn+1); and an emission control signal stage (EMD(j)) configured to simultaneously supply the emission control signal (EM(j)) to the pixels (Pj, Pj+1) arranged on the two adjacent horizontal lines (HLn, HLn+1), wherein a first stage (SCAN1D(j)) of the pair of first scan signal stages and a second stage (SCAN2D(j+1)) of the pair of second scan signal stages are both disposed on one of a left or right side of the display area, and a first stage (SCAN2D(j)) of the pair of second scan signal stages and a second stage (SCAN1D(j+1)) of the pair of first scan signal stages are both disposed on the other one of the left or right side of the display area.