A chopper amplifier with tracking of multiple input offsets, the chopper amplifier comprising: an input chopping circuit configured to chop a differential input signal to generate a chopped input signal; an amplification circuit configured to amplify the chopped input signal to generate an amplified signal, wherein the amplification circuit comprises two differential transistor pairs of input transistors (7,8) that are selectable, wherein the two differential transistor pairs of input transistors includes an n-type differential transistor pair and a p-type differential transistor pair; an output chopping circuit configured to chop the amplified signal to generate a chopped output signal; and a control circuit configured to select the n-type differential transistor pair or the p-type differential transistor pair of input transistors from the two differential transistor pairs of input transistors based on sensing an input common-mode voltage of the chopper amplifier, wherein the selected differential transistor pair of input transistors is configured to amplify the chopped input signal; and an offset correction circuit comprising a feedback loop coupled to the output chopping circuit and configured to generate an input offset compensation signal for the chopper amplifier circuitry to suppress a chopping ripple, wherein the offset correction circuit separately tracks an input offset of each of the two differential transistor pairs of input transistors (7,8) and wherein the offset correction circuit comprises respective tracking circuit (17, 18) for each of the two differential transistor pairs of input transistors (7, 8), the offset correction circuit being configured to receive two enable signals from the control circuit, the said two enable signals being based on the said selection of the differential transistor input pair (7,8) by the control circuit and wherein a respective one of the said two enable signals activates the respective tracking circuit (17, 18) in the offset correction circuit for the selected differential transistor pair (7, 8). an input chopping circuit configured to chop a differential input signal to generate a chopped input signal; an amplification circuit configured to amplify the chopped input signal to generate an amplified signal, wherein the amplification circuit comprises two differential transistor pairs of input transistors (7,8) that are selectable, wherein the two differential transistor pairs of input transistors includes an n-type differential transistor pair and a p-type differential transistor pair; an output chopping circuit configured to chop the amplified signal to generate a chopped output signal; and a control circuit configured to select the n-type differential transistor pair or the p-type differential transistor pair of input transistors from the two differential transistor pairs of input transistors based on sensing an input common-mode voltage of the chopper amplifier, wherein the selected differential transistor pair of input transistors is configured to amplify the chopped input signal; and an offset correction circuit comprising a feedback loop coupled to the output chopping circuit and configured to generate an input offset compensation signal for the chopper amplifier circuitry to suppress a chopping ripple, wherein the offset correction circuit separately tracks an input offset of each of the two differential transistor pairs of input transistors (7,8) and wherein the offset correction circuit comprises respective tracking circuit (17, 18) for each of the two differential transistor pairs of input transistors (7, 8), the offset correction circuit being configured to receive two enable signals from the control circuit, the said two enable signals being based on the said selection of the differential transistor input pair (7,8) by the control circuit and wherein a respective one of the said two enable signals activates the respective tracking circuit (17, 18) in the offset correction circuit for the selected differential transistor pair (7, 8).