A computer program product for facilitating processing within a computing environment, the computer program product comprising: at least one computer-readable storage medium having program instructions (19, 120, 138) embodied therewith, the program instructions (19, 120, 138) being readable by a processor, wherein the program instructions, when executed by the processor, cause the processor to perform a method comprising: receiving, at the processor, from an operating system of the computing environment a reset dynamic address translation protection instruction with an operation code field indicating a reset address translation protection operation is to be performed, the reset dynamic address translation protection instruction being part of an instruction set architecture, and being a single instruction issued by the operating system, and being received, by the processor, based on an application executing on the processor encountering an address translation protection bit exception due to a write access to a storage block being blocked by an address translation protection bit in a specified translation table entry associated with the storage block, the translation table entry being in a translation lookaside buffer cache at the processor; executing the reset dynamic address translation protection instruction, by the processor, to perform the reset address translation protection operation, the executing the reset dynamic address translation protection instruction comprising: determining, by the processor, that the address translation protection bit in the specified translation table entry associated with the storage block in the translation lookaside buffer cache at the processor is to be reset; and based on the determining, resetting the address translation protection bit to deactivate write protection for the storage block, the resetting without waiting for an action by one or more other processors of the computing environment; clearing any translation lookaside buffer entries in the processor associated with the specified translation table entry; and wherein the determining, resetting and clearing are performed as part of executing the single reset dynamic address translation protection instruction. receiving, at the processor, from an operating system of the computing environment a reset dynamic address translation protection instruction with an operation code field indicating a reset address translation protection operation is to be performed, the reset dynamic address translation protection instruction being part of an instruction set architecture, and being a single instruction issued by the operating system, and being received, by the processor, based on an application executing on the processor encountering an address translation protection bit exception due to a write access to a storage block being blocked by an address translation protection bit in a specified translation table entry associated with the storage block, the translation table entry being in a translation lookaside buffer cache at the processor; executing the reset dynamic address translation protection instruction, by the processor, to perform the reset address translation protection operation, the executing the reset dynamic address translation protection instruction comprising: determining, by the processor, that the address translation protection bit in the specified translation table entry associated with the storage block in the translation lookaside buffer cache at the processor is to be reset; and based on the determining, resetting the address translation protection bit to deactivate write protection for the storage block, the resetting without waiting for an action by one or more other processors of the computing environment; clearing any translation lookaside buffer entries in the processor associated with the specified translation table entry; and wherein the determining, resetting and clearing are performed as part of executing the single reset dynamic address translation protection instruction. determining, by the processor, that the address translation protection bit in the specified translation table entry associated with the storage block in the translation lookaside buffer cache at the processor is to be reset; and based on the determining, resetting the address translation protection bit to deactivate write protection for the storage block, the resetting without waiting for an action by one or more other processors of the computing environment; clearing any translation lookaside buffer entries in the processor associated with the specified translation table entry; and wherein the determining, resetting and clearing are performed as part of executing the single reset dynamic address translation protection instruction.