Method for manufacturing of a photovoltaic device comprising the steps of: a. providing a silicon-based substrate having a first face, said silicon-based substrate having a p-type or n-type doping; b. depositing an intrinsic buffer layer on said first face; c. depositing a patterned first silicon layer on predetermined regions of said intrinsic buffer layer thereby leaving interstices between said predefined regions, said first silicon layer having a doping of a first type being one of p-type or n-type, said first silicon layer comprising an at least partially microcrystalline layer at its side away from said silicon-based substrate; d. simultaneously depositing a microcrystalline silicon layer which forms said second silicon layer on said first silicon layer such that the second silicon layer is in contact with the first silicon layer, and said third silicon layer on said intrinsic buffer layer exclusively at said interstices, said second silicon layer having a doping of a second type being the other of p-type or n-type with respect to the doping of said first silicon layer, said third silicon layer being amorphous at least at its side facing said silicon-based substrate and being at least partially microcrystalline at its side away from said silicon-based substrate and having a doping of said second type, said second silicon layer and said third silicon layer each defining a tunnel layer, with the doping and the thickness of said tunnel layer being chosen so that the second silicon layer does not impede the charge collecting operation of the photovoltaic device. e. depositing electrically conducting pads on said second silicon layer and said third silicon layer. a. providing a silicon-based substrate having a first face, said silicon-based substrate having a p-type or n-type doping; b. depositing an intrinsic buffer layer on said first face; c. depositing a patterned first silicon layer on predetermined regions of said intrinsic buffer layer thereby leaving interstices between said predefined regions, said first silicon layer having a doping of a first type being one of p-type or n-type, said first silicon layer comprising an at least partially microcrystalline layer at its side away from said silicon-based substrate; d. simultaneously depositing a microcrystalline silicon layer which forms said second silicon layer on said first silicon layer such that the second silicon layer is in contact with the first silicon layer, and said third silicon layer on said intrinsic buffer layer exclusively at said interstices, said second silicon layer having a doping of a second type being the other of p-type or n-type with respect to the doping of said first silicon layer, said third silicon layer being amorphous at least at its side facing said silicon-based substrate and being at least partially microcrystalline at its side away from said silicon-based substrate and having a doping of said second type, said second silicon layer and said third silicon layer each defining a tunnel layer, with the doping and the thickness of said tunnel layer being chosen so that the second silicon layer does not impede the charge collecting operation of the photovoltaic device. e. depositing electrically conducting pads on said second silicon layer and said third silicon layer.