An apparatus for converting between a logical address of a data storage device, and a physical address corresponding to an individual memory storage element within said data storage device, said apparatus comprising: a memory for storing, in a data translation table, address data describing a plurality of logical addresses and a plurality of physical addresses, wherein the data translation table contains a plurality of data entries, each data entry specifying a logical address and the respective physical address of a memory storage element and wherein each data entry is assigned an index value; and a processor for: (a) reading logical address request data describing a logical address of data to be retrieved and setting an index variable to 1; and (b) reading logical addresses stored in the data translation table and comparing the logical address of data to be retrieved with the logical address of the data entry that is assigned to the index value of the index variable; (c) if the logical address of data to be retrieved is greater than or equal to the logical address of the data entry assigned to the index value of the index variable, incrementing the index variable and repeating steps (b) and (c) above; and (d) if the logical address of data to be retrieved is smaller than the logical address of the data entry assigned to the index value of the index variable, determining the physical address corresponding to the logical address of data to be retrieved as being the sum of the physical address of the data entry assigned to the index value of the (index variable -1) and the difference between the logical address of data to be retrieved and the logical address of the data entry that is assigned to the index value of the (index variable -1). a memory for storing, in a data translation table, address data describing a plurality of logical addresses and a plurality of physical addresses, wherein the data translation table contains a plurality of data entries, each data entry specifying a logical address and the respective physical address of a memory storage element and wherein each data entry is assigned an index value; and a processor for: (a) reading logical address request data describing a logical address of data to be retrieved and setting an index variable to 1; and (b) reading logical addresses stored in the data translation table and comparing the logical address of data to be retrieved with the logical address of the data entry that is assigned to the index value of the index variable; (c) if the logical address of data to be retrieved is greater than or equal to the logical address of the data entry assigned to the index value of the index variable, incrementing the index variable and repeating steps (b) and (c) above; and (d) if the logical address of data to be retrieved is smaller than the logical address of the data entry assigned to the index value of the index variable, determining the physical address corresponding to the logical address of data to be retrieved as being the sum of the physical address of the data entry assigned to the index value of the (index variable -1) and the difference between the logical address of data to be retrieved and the logical address of the data entry that is assigned to the index value of the (index variable -1). (a) reading logical address request data describing a logical address of data to be retrieved and setting an index variable to 1; and (b) reading logical addresses stored in the data translation table and comparing the logical address of data to be retrieved with the logical address of the data entry that is assigned to the index value of the index variable; (c) if the logical address of data to be retrieved is greater than or equal to the logical address of the data entry assigned to the index value of the index variable, incrementing the index variable and repeating steps (b) and (c) above; and (d) if the logical address of data to be retrieved is smaller than the logical address of the data entry assigned to the index value of the index variable, determining the physical address corresponding to the logical address of data to be retrieved as being the sum of the physical address of the data entry assigned to the index value of the (index variable -1) and the difference between the logical address of data to be retrieved and the logical address of the data entry that is assigned to the index value of the (index variable -1).