A computer system comprising: one or more processors; and one or more computer-readable media having stored thereon computer-executable instructions that are executable by the one or more processors to cause the computer system to record a replay-able trace of execution of a multi-threaded process, the computer-executable instructions including instructions that are executable to cause the computer system to perform at least the following: identify a trace memory model, which is a memory model that defines one or more orderable events that are to be ordered across a plurality of threads of the multi-threaded process; execute the plurality of threads concurrently across one or more processing units of the one or more processors; and during execution of the plurality of threads, record a separate replay-able trace for each thread independently, including, for each thread: recording initial state for the thread; recording at least one memory read performed by at least one processor instruction executed by the thread that takes memory as input; recording register values and/or memory values that were changed by execution of non-deterministic instructions, recording input register values at the beginning of a series of deterministic instructions, or recording input memory values that deterministic instruction consume; and recording at least one orderable event performed by the thread with a monotonically increasing number that orders the event among other orderable events across the plurality of threads. one or more processors; and one or more computer-readable media having stored thereon computer-executable instructions that are executable by the one or more processors to cause the computer system to record a replay-able trace of execution of a multi-threaded process, the computer-executable instructions including instructions that are executable to cause the computer system to perform at least the following: identify a trace memory model, which is a memory model that defines one or more orderable events that are to be ordered across a plurality of threads of the multi-threaded process; execute the plurality of threads concurrently across one or more processing units of the one or more processors; and during execution of the plurality of threads, record a separate replay-able trace for each thread independently, including, for each thread: recording initial state for the thread; recording at least one memory read performed by at least one processor instruction executed by the thread that takes memory as input; recording register values and/or memory values that were changed by execution of non-deterministic instructions, recording input register values at the beginning of a series of deterministic instructions, or recording input memory values that deterministic instruction consume; and recording at least one orderable event performed by the thread with a monotonically increasing number that orders the event among other orderable events across the plurality of threads. identify a trace memory model, which is a memory model that defines one or more orderable events that are to be ordered across a plurality of threads of the multi-threaded process; execute the plurality of threads concurrently across one or more processing units of the one or more processors; and during execution of the plurality of threads, record a separate replay-able trace for each thread independently, including, for each thread: recording initial state for the thread; recording at least one memory read performed by at least one processor instruction executed by the thread that takes memory as input; recording register values and/or memory values that were changed by execution of non-deterministic instructions, recording input register values at the beginning of a series of deterministic instructions, or recording input memory values that deterministic instruction consume; and recording at least one orderable event performed by the thread with a monotonically increasing number that orders the event among other orderable events across the plurality of threads. recording initial state for the thread; recording at least one memory read performed by at least one processor instruction executed by the thread that takes memory as input; recording register values and/or memory values that were changed by execution of non-deterministic instructions, recording input register values at the beginning of a series of deterministic instructions, or recording input memory values that deterministic instruction consume; and recording at least one orderable event performed by the thread with a monotonically increasing number that orders the event among other orderable events across the plurality of threads.