A method of fetching an instruction from memory for execution in a programmable processor, in which instructions may cross a memory line boundary, the method comprising: initially fetching a first line of instruction data in response to a first address; determining if the first line of instruction data contains a first piece of an instruction to be fetched that crosses a memory line boundary between the first line of instruction data and a second line of instruction data, the first and second line of instruction data corresponding to the first address and a second address respectively; upon determining that the instruction to be fetched crosses the memory line boundary, determining, based on a hit or miss signal from the cache whether or not a line of cache memory corresponding to the second address contains a second piece of the instruction to be fetched; and characterised by: upon determining that the cache memory corresponding to the second address does not contain the second piece of the instruction to be fetched: recycling the first address for a subsequent re-fetching of the first line of instruction data from the cache memory; pre-fetching the second line of instruction data from a higher level memory resource and loading the pre-fetched second line of instruction data into the cache memory; re-fetching the first line of instruction data from the cache memory using said recycled first address; fetching the pre-fetched second line of instruction data using the second address; and outputting a combined instruction based on the first piece of the instruction contained in the re-fetched first line of the instruction data and the second piece of the instruction contained in the fetched pre-fetched second line of the instruction data. initially fetching a first line of instruction data in response to a first address; determining if the first line of instruction data contains a first piece of an instruction to be fetched that crosses a memory line boundary between the first line of instruction data and a second line of instruction data, the first and second line of instruction data corresponding to the first address and a second address respectively; upon determining that the instruction to be fetched crosses the memory line boundary, determining, based on a hit or miss signal from the cache whether or not a line of cache memory corresponding to the second address contains a second piece of the instruction to be fetched; and characterised by: upon determining that the cache memory corresponding to the second address does not contain the second piece of the instruction to be fetched: recycling the first address for a subsequent re-fetching of the first line of instruction data from the cache memory; pre-fetching the second line of instruction data from a higher level memory resource and loading the pre-fetched second line of instruction data into the cache memory; re-fetching the first line of instruction data from the cache memory using said recycled first address; fetching the pre-fetched second line of instruction data using the second address; and outputting a combined instruction based on the first piece of the instruction contained in the re-fetched first line of the instruction data and the second piece of the instruction contained in the fetched pre-fetched second line of the instruction data. recycling the first address for a subsequent re-fetching of the first line of instruction data from the cache memory; pre-fetching the second line of instruction data from a higher level memory resource and loading the pre-fetched second line of instruction data into the cache memory; re-fetching the first line of instruction data from the cache memory using said recycled first address; fetching the pre-fetched second line of instruction data using the second address; and outputting a combined instruction based on the first piece of the instruction contained in the re-fetched first line of the instruction data and the second piece of the instruction contained in the fetched pre-fetched second line of the instruction data.