A thin film transistor substrate comprising: a substrate; a first thin film transistor disposed on the substrate and including a poly crystalline semiconductor layer, a first gate electrode over the poly crystalline semiconductor layer, a first source electrode and a first drain electrode; a gate insulating layer covering the poly crystalline semiconductor layer, wherein the first gate electrode is disposed on the gate insulating layer and overlaps with the poly crystalline semiconductor layer; a second thin film transistor disposed on the substrate and including a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode and a second drain electrode; an intermediate insulating layer including a nitride layer and disposed on the first gate electrode; and an oxide layer covering the second gate electrode and disposed on the intermediate insulating layer, wherein the first source electrode and the first drain electrode include the same material as the second gate electrode, wherein the oxide semiconductor layer is disposed on the oxide layer and overlapped with the second gate electrode, wherein the first source electrode, the first drain electrode and the second gate electrode are disposed between the intermediate insulating layer and the oxide layer, wherein the first source electrode is connected to one portion of the poly crystalline semiconductor layer through a source contact hole penetrating the intermediate insulating layer and the gate insulating layer, wherein the first drain electrode is connected to another portion of the poly crystalline semiconductor layer through a drain contact hole penetrating the intermediate insulating layer and the gate insulating layer, wherein the second source electrode contacts one portion of the oxide semiconductor layer, and wherein the second drain electrode contacts another portion of the oxide semiconductor layer; and wherein the second source electrode and the second drain electrode are disposed on the oxide semiconductor layer, wherein the second gate electrode is connected to a gate line including the same material with the first gate electrode, through a gate contact hole penetrating the intermediate insulating layer, wherein the gate line is formed at the same layer with the first gate electrode, wherein the second source electrode is connected to a data line including the same material with the second gate electrode, through a data contact hole penetrating the oxide layer, and wherein the data line is formed at the same layer with the second gate electrode. a substrate; a first thin film transistor disposed on the substrate and including a poly crystalline semiconductor layer, a first gate electrode over the poly crystalline semiconductor layer, a first source electrode and a first drain electrode; a gate insulating layer covering the poly crystalline semiconductor layer, wherein the first gate electrode is disposed on the gate insulating layer and overlaps with the poly crystalline semiconductor layer; a second thin film transistor disposed on the substrate and including a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode and a second drain electrode; an intermediate insulating layer including a nitride layer and disposed on the first gate electrode; and an oxide layer covering the second gate electrode and disposed on the intermediate insulating layer, wherein the first source electrode and the first drain electrode include the same material as the second gate electrode, wherein the oxide semiconductor layer is disposed on the oxide layer and overlapped with the second gate electrode, wherein the first source electrode, the first drain electrode and the second gate electrode are disposed between the intermediate insulating layer and the oxide layer, wherein the first source electrode is connected to one portion of the poly crystalline semiconductor layer through a source contact hole penetrating the intermediate insulating layer and the gate insulating layer, wherein the first drain electrode is connected to another portion of the poly crystalline semiconductor layer through a drain contact hole penetrating the intermediate insulating layer and the gate insulating layer, wherein the second source electrode contacts one portion of the oxide semiconductor layer, and wherein the second drain electrode contacts another portion of the oxide semiconductor layer; and wherein the second source electrode and the second drain electrode are disposed on the oxide semiconductor layer, wherein the second gate electrode is connected to a gate line including the same material with the first gate electrode, through a gate contact hole penetrating the intermediate insulating layer, wherein the gate line is formed at the same layer with the first gate electrode, wherein the second source electrode is connected to a data line including the same material with the second gate electrode, through a data contact hole penetrating the oxide layer, and wherein the data line is formed at the same layer with the second gate electrode.