An amplifier for amplifying a periodic signal, comprising: a switching transistor comprising a gate node, a source node coupled to a ground node, and a drain node, wherein the gate node is configured to receive the periodic signal; a dc bias circuit configured to bias the drain node of the switching transistor, wherein the dc bias circuit is coupled to the drain node through a choke inductor; a shunt capacitor coupled between the source node and the drain node of the switching transistor; a plurality of series inductors coupled between the drain node of the switching transistor and respectively a first terminal of a respective series capacitor of a plurality of series capacitors; and a plurality of antennas, wherein each one of the antennas comprises an equivalent inductance in series with an equivalent resistance; and a plurality of parallel capacitors respectively coupled between a second terminal of the respective series capacitor of the plurality of series capacitors and the ground node, wherein each one of the parallel capacitors is coupled in parallel to a corresponding antenna's equivalent inductance and equivalent resistance; wherein each series capacitor of the plurality of series capacitors is configured with a capacitance value to cause the series capacitor to resonate with the respective series inductor of the plurality of series inductors at a fundamental frequency of the periodic signal; wherein each parallel capacitor of the plurality of parallel capacitors is configured with a capacitance value to cause the parallel capacitor to resonate with the equivalent inductance of the respective corresponding antenna of the plurality of antennas at the fundamental frequency of the periodic signal; wherein the choke inductor is configured with an inductance value to cause the choke inductor to resonate with the parasitic capacitance of the switching transistor and the shunt capacitor at the fundamental frequency of the periodic signal. a switching transistor comprising a gate node, a source node coupled to a ground node, and a drain node, wherein the gate node is configured to receive the periodic signal; a dc bias circuit configured to bias the drain node of the switching transistor, wherein the dc bias circuit is coupled to the drain node through a choke inductor; a shunt capacitor coupled between the source node and the drain node of the switching transistor; a plurality of series inductors coupled between the drain node of the switching transistor and respectively a first terminal of a respective series capacitor of a plurality of series capacitors; and a plurality of antennas, wherein each one of the antennas comprises an equivalent inductance in series with an equivalent resistance; and a plurality of parallel capacitors respectively coupled between a second terminal of the respective series capacitor of the plurality of series capacitors and the ground node, wherein each one of the parallel capacitors is coupled in parallel to a corresponding antenna's equivalent inductance and equivalent resistance; wherein each series capacitor of the plurality of series capacitors is configured with a capacitance value to cause the series capacitor to resonate with the respective series inductor of the plurality of series inductors at a fundamental frequency of the periodic signal; wherein each parallel capacitor of the plurality of parallel capacitors is configured with a capacitance value to cause the parallel capacitor to resonate with the equivalent inductance of the respective corresponding antenna of the plurality of antennas at the fundamental frequency of the periodic signal; wherein the choke inductor is configured with an inductance value to cause the choke inductor to resonate with the parasitic capacitance of the switching transistor and the shunt capacitor at the fundamental frequency of the periodic signal.