A circuit for generating a reference voltage with trim adjustment, the circuit comprising: a differential error amplifier having a first input, a second input and an amplifier output; a transconductance gain stage comprising a primary transconductance amplifier and a secondary transconductance amplifier both connected to the amplifier output, the secondary transconductance amplifier configured for generating a trim current using at least one of a plurality of selectable parallel elements within the secondary transconductance amplifier, wherein the secondary transconductance amplifier is configured to receive a trim vector input for adjusting the gain of the secondary transconductance amplifier; a first current branch including two resistors connected in series, wherein the first current branch has an input, a trim node between the two resistors, and an output; a second current branch including three resistors connected in series, wherein the second current branch has an input, a trim node between a first and a second resistor of the three resistors corresponding to the first branch, and an output; wherein the input of the first and second current branch (540, 550) is connected to an output of the primary transconductance amplifier, wherein the trim node of the first and second current branch (540, 550) is connected to an output of the secondary transconductance amplifier, and wherein the output of the first current branch is connected the first input of the differential error amplifier, and wherein a feedback node between the second resistor and a third resistor of the three resistors of the second current branch is connected to the second input of the differential error amplifier; a diode array including a plurality of diode-connected transistors, wherein one of the plurality of diode-connected transistors is connected between the output of the first current branch and ground, and wherein the remaining ones of the diode-connected transistors are connected in parallel between the output of the second current branch and ground; wherein the reference voltage is generated at the output of the primary transconductance amplifier. a differential error amplifier having a first input, a second input and an amplifier output; a transconductance gain stage comprising a primary transconductance amplifier and a secondary transconductance amplifier both connected to the amplifier output, the secondary transconductance amplifier configured for generating a trim current using at least one of a plurality of selectable parallel elements within the secondary transconductance amplifier, wherein the secondary transconductance amplifier is configured to receive a trim vector input for adjusting the gain of the secondary transconductance amplifier; a first current branch including two resistors connected in series, wherein the first current branch has an input, a trim node between the two resistors, and an output; a second current branch including three resistors connected in series, wherein the second current branch has an input, a trim node between a first and a second resistor of the three resistors corresponding to the first branch, and an output; wherein the input of the first and second current branch (540, 550) is connected to an output of the primary transconductance amplifier, wherein the trim node of the first and second current branch (540, 550) is connected to an output of the secondary transconductance amplifier, and wherein the output of the first current branch is connected the first input of the differential error amplifier, and wherein a feedback node between the second resistor and a third resistor of the three resistors of the second current branch is connected to the second input of the differential error amplifier; a diode array including a plurality of diode-connected transistors, wherein one of the plurality of diode-connected transistors is connected between the output of the first current branch and ground, and wherein the remaining ones of the diode-connected transistors are connected in parallel between the output of the second current branch and ground; wherein the reference voltage is generated at the output of the primary transconductance amplifier.