An apparatus that compensates for misalignment of a data strobe signal and one or more data bit signals on a synchronous data bus, the apparatus (300, 400) comprising: a synchronous lag receiver, configured to receive one of a plurality of distributed strobe signals and one of the one or more data bit signals, and configured to delay registering of said one of the one or more data bit signals by a propagation time, wherein said one of the plurality of data strobe signals is generated by a distribution network that introduces additional propagation length, load, and buffering associated with each of said plurality of distributed strobe signals such that said each of said plurality of distributed strobe signals lags a corresponding one of the one or more data bit signals in phase by a same amount, said synchronous lag receiver comprising: a first plurality of matched inverters, configured to generate successively delayed versions of said one of the data bit signals; a first mux, coupled to said first plurality of matched inverters, configured to receive a value on a lag bus that indicates said propagation time, and configured to select one of said successively delayed versions of said one of the data bit signals that corresponds to said value; and a bit receiver, configured to receive said one of said successively delayed versions of said one of the one or more data bit signals and said one of said plurality of distributed strobe signals, and configured to register the state of said one of said successively delayed versions of said one of the one or more data bit signals upon assertion of said one of said plurality of distributed strobe signals; characterized in that said propagation time is determined by employing a replica of said distribution network to measure said propagation time between assertion of a pulse signal input to said replica and assertion of an output signal generated by said replica. a synchronous lag receiver, configured to receive one of a plurality of distributed strobe signals and one of the one or more data bit signals, and configured to delay registering of said one of the one or more data bit signals by a propagation time, wherein said one of the plurality of data strobe signals is generated by a distribution network that introduces additional propagation length, load, and buffering associated with each of said plurality of distributed strobe signals such that said each of said plurality of distributed strobe signals lags a corresponding one of the one or more data bit signals in phase by a same amount, said synchronous lag receiver comprising: a first plurality of matched inverters, configured to generate successively delayed versions of said one of the data bit signals; a first mux, coupled to said first plurality of matched inverters, configured to receive a value on a lag bus that indicates said propagation time, and configured to select one of said successively delayed versions of said one of the data bit signals that corresponds to said value; and a bit receiver, configured to receive said one of said successively delayed versions of said one of the one or more data bit signals and said one of said plurality of distributed strobe signals, and configured to register the state of said one of said successively delayed versions of said one of the one or more data bit signals upon assertion of said one of said plurality of distributed strobe signals; a first plurality of matched inverters, configured to generate successively delayed versions of said one of the data bit signals; a first mux, coupled to said first plurality of matched inverters, configured to receive a value on a lag bus that indicates said propagation time, and configured to select one of said successively delayed versions of said one of the data bit signals that corresponds to said value; and a bit receiver, configured to receive said one of said successively delayed versions of said one of the one or more data bit signals and said one of said plurality of distributed strobe signals, and configured to register the state of said one of said successively delayed versions of said one of the one or more data bit signals upon assertion of said one of said plurality of distributed strobe signals;