A programmable multiplier circuit for multiplying an input voltage signal (V RF) by a binary coefficient, the multiplier circuit comprising: a transconductor comprising a first amplifying transistor (T A0) configured to convert the input voltage signal (V RF) to a current signal (I RF), the first amplifying transistor (T A0) having a gate configured to receive the input voltage signal (V RF); and a coefficient multiplier coupled to the transconductor and configured to multiply the current signal (I RF) by the binary coefficient to generate an amplified current signal (I OUT), wherein the coefficient multiplier comprises m switches (SW 1 -SW m) configured to steer fractions of the current signal (I RF) toward an output to generate the amplified current signal (I OUT), wherein m is the number of binary bits used to represent the binary coefficient, wherein the transconductor further comprises a second amplifying transistor (T A1) and a first control switch (T DR1) configured to activate or deactivate the second amplifying transistor in response to a control signal to dynamically adjust a dynamic range and a power consumption of the programmable multiplier circuit in response to the control signal, wherein a gate of the second amplifying transistor (T A1) is coupled to the gate of the first amplifying transistor (T A0), a first electrode of the second amplifying transistor (T A1) is coupled to the first control switch, and a second electrode of the second amplifying transistor (T A1) is coupled to the second electrode of the first amplifying transistor (T A0), wherein the gates of the first (T A0) and the second (T A1) amplifying transistors are connected to the input voltage (V RF), and wherein a first electrode of the first amplifying transistor (T A0) is coupled to a first voltage source (V DD), and a second electrode of the first amplifying transistor (T A0) is coupled to an input of the coefficient multiplier. a transconductor comprising a first amplifying transistor (T A0) configured to convert the input voltage signal (V RF) to a current signal (I RF), the first amplifying transistor (T A0) having a gate configured to receive the input voltage signal (V RF); and a coefficient multiplier coupled to the transconductor and configured to multiply the current signal (I RF) by the binary coefficient to generate an amplified current signal (I OUT), wherein the coefficient multiplier comprises m switches (SW 1 -SW m) configured to steer fractions of the current signal (I RF) toward an output to generate the amplified current signal (I OUT), wherein m is the number of binary bits used to represent the binary coefficient, wherein the transconductor further comprises a second amplifying transistor (T A1) and a first control switch (T DR1) configured to activate or deactivate the second amplifying transistor in response to a control signal to dynamically adjust a dynamic range and a power consumption of the programmable multiplier circuit in response to the control signal, wherein a gate of the second amplifying transistor (T A1) is coupled to the gate of the first amplifying transistor (T A0), a first electrode of the second amplifying transistor (T A1) is coupled to the first control switch, and a second electrode of the second amplifying transistor (T A1) is coupled to the second electrode of the first amplifying transistor (T A0), wherein the gates of the first (T A0) and the second (T A1) amplifying transistors are connected to the input voltage (V RF), and wherein a first electrode of the first amplifying transistor (T A0) is coupled to a first voltage source (V DD), and a second electrode of the first amplifying transistor (T A0) is coupled to an input of the coefficient multiplier.