A method for manufacturing a solid-state image sensing device provided with a semiconductor substrate having an imaging region in which a plurality of pixels are formed, wherein the imaging region is formed with: photoelectron conversion sections to convert incident light into an electric charge; and amplification transistors to amplify an electric signal based on the electric charge, each of the amplification transistors including: a source region and a drain region formed in the semiconductor substrate in the manner of being isolated from each other; a channel region interposed between the source region and the drain region; a gate insulation film formed over the channel region; and a gate electrode formed over the gate insulation film, the method comprising the steps of: (a) forming the gate insulation film over the semiconductor substrate; (b) forming a first conductive film over the gate insulation film; (c) patterning the first conductive film and forming the gate electrode; (d) after the step (c), forming the source region and the drain region in the semiconductor substrate; characterized in that the method further comprises the steps of: (e) after the step (d), in plan view, introducing fluorine only into part of the gate electrode overlapping with the channel region and not introducing fluorine into the interior of the semiconductor substrate; and (f) after the step (e), heating the semiconductor substrate wherein the method further comprises, after the step (d) and before the step (e), the steps of: (g) forming, over the semiconductor substrate, an interlayer insulation film that is an interlayer insulation film to cover the gate electrode and comprises a first insulation film and a second insulation film formed over the first insulation film; and (h) in plan view, patterning the interlayer insulation film so as to expose the first insulation film over the overlapping part by removing the second insulation film formed over the part overlapping with the channel region in the gate electrode, and wherein in the step (e), after the step (h), fluorine is implanted into the overlapping part by using the patterned interlayer insulation film as a mask. photoelectron conversion sections to convert incident light into an electric charge; and amplification transistors to amplify an electric signal based on the electric charge, a source region and a drain region formed in the semiconductor substrate in the manner of being isolated from each other; a channel region interposed between the source region and the drain region; a gate insulation film formed over the channel region; and a gate electrode formed over the gate insulation film, (a) forming the gate insulation film over the semiconductor substrate; (b) forming a first conductive film over the gate insulation film; (c) patterning the first conductive film and forming the gate electrode; (d) after the step (c), forming the source region and the drain region in the semiconductor substrate; characterized in that the method further comprises the steps of: (e) after the step (d), in plan view, introducing fluorine only into part of the gate electrode overlapping with the channel region and not introducing fluorine into the interior of the semiconductor substrate; and (f) after the step (e), heating the semiconductor substrate wherein the method further comprises, after the step (d) and before the step (e), the steps of: (g) forming, over the semiconductor substrate, an interlayer insulation film that is an interlayer insulation film to cover the gate electrode and comprises a first insulation film and a second insulation film formed over the first insulation film; and (h) in plan view, patterning the interlayer insulation film so as to expose the first insulation film over the overlapping part by removing the second insulation film formed over the part overlapping with the channel region in the gate electrode, and (e) after the step (d), in plan view, introducing fluorine only into part of the gate electrode overlapping with the channel region and not introducing fluorine into the interior of the semiconductor substrate; and (f) after the step (e), heating the semiconductor substrate (g) forming, over the semiconductor substrate, an interlayer insulation film that is an interlayer insulation film to cover the gate electrode and comprises a first insulation film and a second insulation film formed over the first insulation film; and (h) in plan view, patterning the interlayer insulation film so as to expose the first insulation film over the overlapping part by removing the second insulation film formed over the part overlapping with the channel region in the gate electrode, and