A chip, divided into a main functional area, a transition area, and a protection area, wherein the transition area is located between the main functional area and the protection area; the chip comprises a field oxide, a metal layer, and a passivation layer that are sequentially stacked on a semiconductor substrate, wherein the field oxide and the passivation layer are located in the transition area and the protection area, and the metal layer is located in the main functional area and the transition area; and in the transition area, the field oxide comprises a primary field oxide and at least one secondary field oxide that are disposed at intervals, wherein the secondary field oxide is located on a side of the primary field oxide facing the main functional area, the metal layer extends from the main functional area to a side of the primary field oxide facing away from the semiconductor substrate, and the passivation layer extends from a side of the metal layer facing away from the semiconductor substrate to a side of the metal layer facing away from the main functional area, wherein in the transition area, the passivation layer further extends from the side of the metal layer facing away from the main functional area to a side of the primary field oxide facing away from the main functional area; and the metal layer covers a part of a surface on the side of the primary field oxide facing away from the semiconductor substrate, and the passivation layer extends from the side of the metal layer facing away from the semiconductor substrate through the side of the primary field oxide facing away from the semiconductor substrate to the side of the primary field oxide facing away from the main functional area. the chip comprises a field oxide, a metal layer, and a passivation layer that are sequentially stacked on a semiconductor substrate, wherein the field oxide and the passivation layer are located in the transition area and the protection area, and the metal layer is located in the main functional area and the transition area; and in the transition area, the field oxide comprises a primary field oxide and at least one secondary field oxide that are disposed at intervals, wherein the secondary field oxide is located on a side of the primary field oxide facing the main functional area, the metal layer extends from the main functional area to a side of the primary field oxide facing away from the semiconductor substrate, and the passivation layer extends from a side of the metal layer facing away from the semiconductor substrate to a side of the metal layer facing away from the main functional area, wherein in the transition area, the passivation layer further extends from the side of the metal layer facing away from the main functional area to a side of the primary field oxide facing away from the main functional area; and the metal layer covers a part of a surface on the side of the primary field oxide facing away from the semiconductor substrate, and the passivation layer extends from the side of the metal layer facing away from the semiconductor substrate through the side of the primary field oxide facing away from the semiconductor substrate to the side of the primary field oxide facing away from the main functional area.