An input receiver for receiving a high power domain input signal (205, 702) from a high power domain powered by a high power supply voltage (VDDPX), wherein the input receiver is within a low power domain powered by a low power supply voltage (VDDIX), comprising: a waveform splitter configured to split the high power domain input signal into a high voltage signal (PADSIG_P) that is greater than or equal to the low power supply voltage and into a low voltage signal (PADSIG_N) that is less than or equal to the low power supply voltage, wherein the high power supply voltage is greater than the low power supply voltage; a low voltage input receiver coupled to the low voltage signal, the low voltage input receiver powered by the low power supply voltage and ground; a dynamic high power supply shifter coupled to the high voltage power supply voltage and configured to output a shifted high power supply voltage (VDDPX_RX); a dynamic low power supply shifter coupled to the low voltage power supply voltage and configured to output a shifted low power supply voltage (VDDIX_RX); a high voltage input receiver coupled to the high voltage signal, the high voltage input receiver powered by the shifted high power supply voltage and the shifted low power supply voltage; a high voltage input receiver replica coupled to the high voltage signal, the high voltage input receiver replica powered by the high power supply voltage and low power supply voltage; wherein the dynamic high power supply shifter receives input from the voltage input receiver replica and low voltage input receiver to control the dynamic high power supply shifter; wherein the dynamic low power supply shifter receives input from the voltage input receiver replica and low voltage input receiver to control the dynamic low power supply shifter; wherein, the shifted high power supply voltage and shifted low power supply voltage are shifted to lower voltage levels (VDDPX_RX, VDDIX RX) when an output (RX_N) of the low voltage input receiver goes high, wherein the output of the low voltage input receiver switches to high as the voltage level of the input signal increases and reaches a voltage level; the shifted low power supply voltage (VDDIX _RX) is increased to the low power supply voltage level (VDDIX) when an output of the high voltage input receiver goes high, wherein the output of the high voltage input receiver goes high as the input signal continues to increase and reaches a voltage level; and the shifted high power supply voltage (VDDPX_RX) is increased to the high power supply voltage level (VDDPX) when an output of the high voltage input receiver replica output goes high, wherein the output of the high voltage input receiver replica output goes high as the input signal continues to increase and reaches a voltage level. a waveform splitter configured to split the high power domain input signal into a high voltage signal (PADSIG_P) that is greater than or equal to the low power supply voltage and into a low voltage signal (PADSIG_N) that is less than or equal to the low power supply voltage, wherein the high power supply voltage is greater than the low power supply voltage; a low voltage input receiver coupled to the low voltage signal, the low voltage input receiver powered by the low power supply voltage and ground; a dynamic high power supply shifter coupled to the high voltage power supply voltage and configured to output a shifted high power supply voltage (VDDPX_RX); a dynamic low power supply shifter coupled to the low voltage power supply voltage and configured to output a shifted low power supply voltage (VDDIX_RX); a high voltage input receiver coupled to the high voltage signal, the high voltage input receiver powered by the shifted high power supply voltage and the shifted low power supply voltage; a high voltage input receiver replica coupled to the high voltage signal, the high voltage input receiver replica powered by the high power supply voltage and low power supply voltage; wherein the dynamic high power supply shifter receives input from the voltage input receiver replica and low voltage input receiver to control the dynamic high power supply shifter; wherein the dynamic low power supply shifter receives input from the voltage input receiver replica and low voltage input receiver to control the dynamic low power supply shifter; wherein, the shifted high power supply voltage and shifted low power supply voltage are shifted to lower voltage levels (VDDPX_RX, VDDIX RX) when an output (RX_N) of the low voltage input receiver goes high, wherein the output of the low voltage input receiver switches to high as the voltage level of the input signal increases and reaches a voltage level; the shifted low power supply voltage (VDDIX _RX) is increased to the low power supply voltage level (VDDIX) when an output of the high voltage input receiver goes high, wherein the output of the high voltage input receiver goes high as the input signal continues to increase and reaches a voltage level; and the shifted high power supply voltage (VDDPX_RX) is increased to the high power supply voltage level (VDDPX) when an output of the high voltage input receiver replica output goes high, wherein the output of the high voltage input receiver replica output goes high as the input signal continues to increase and reaches a voltage level.