An electronic circuit comprising: a bistable circuit connected between a first power source supplied with a first power-supply voltage and a second power source supplied with a second power-supply voltage lower than the first power-supply voltage, the bistable circuit including: a first inverter and a second inverter that form a loop; the electronic circuit characterized by comprising: a switch that turns on and off in synchronization with a clock signal (C, CB) and is located in the loop; a clock supply circuit configured to supply the clock signal (C, CB) to the switch; and a power-supply circuit configured to supply a first voltage as a power-supply voltage, which is a difference between the first power-supply voltage and the second power-supply voltage, while the clock supply circuit is not supplying the clock signal (C,CB), and supply a second voltage higher than the first voltage as the power-supply voltage while the clock supply circuit is supplying the clock signal (C, CB); wherein the first inverter and the second inverter are inverter circuits configured to switch between a first mode and a second mode; the power-supply circuit supplies the first voltage as the power-supply voltage while the inverter circuits are in the first mode and the clock supply circuit is not supplying the clock signal (C,CB), and supplies the second voltage as the power-supply voltage while the inverter circuits are in the second mode and the clock supply circuit is supplying the clock signal (C, CB); and the first mode is a mode that exhibits hysteresis in a transfer characteristic and the second mode is a mode that exhibits no hysteresis in a transfer characteristic, and/or the first mode is a mode of which the transfer characteristic is steeper than the transfer characteristic of the second mode. a bistable circuit connected between a first power source supplied with a first power-supply voltage and a second power source supplied with a second power-supply voltage lower than the first power-supply voltage, the bistable circuit including: a first inverter and a second inverter that form a loop; the electronic circuit characterized by comprising: a switch that turns on and off in synchronization with a clock signal (C, CB) and is located in the loop; a clock supply circuit configured to supply the clock signal (C, CB) to the switch; and a power-supply circuit configured to supply a first voltage as a power-supply voltage, which is a difference between the first power-supply voltage and the second power-supply voltage, while the clock supply circuit is not supplying the clock signal (C,CB), and supply a second voltage higher than the first voltage as the power-supply voltage while the clock supply circuit is supplying the clock signal (C, CB); wherein the first inverter and the second inverter are inverter circuits configured to switch between a first mode and a second mode; the power-supply circuit supplies the first voltage as the power-supply voltage while the inverter circuits are in the first mode and the clock supply circuit is not supplying the clock signal (C,CB), and supplies the second voltage as the power-supply voltage while the inverter circuits are in the second mode and the clock supply circuit is supplying the clock signal (C, CB); and the first mode is a mode that exhibits hysteresis in a transfer characteristic and the second mode is a mode that exhibits no hysteresis in a transfer characteristic, and/or the first mode is a mode of which the transfer characteristic is steeper than the transfer characteristic of the second mode. a switch that turns on and off in synchronization with a clock signal (C, CB) and is located in the loop; a clock supply circuit configured to supply the clock signal (C, CB) to the switch; and a power-supply circuit configured to supply a first voltage as a power-supply voltage, which is a difference between the first power-supply voltage and the second power-supply voltage, while the clock supply circuit is not supplying the clock signal (C,CB), and supply a second voltage higher than the first voltage as the power-supply voltage while the clock supply circuit is supplying the clock signal (C, CB); wherein the first inverter and the second inverter are inverter circuits configured to switch between a first mode and a second mode; the power-supply circuit supplies the first voltage as the power-supply voltage while the inverter circuits are in the first mode and the clock supply circuit is not supplying the clock signal (C,CB), and supplies the second voltage as the power-supply voltage while the inverter circuits are in the second mode and the clock supply circuit is supplying the clock signal (C, CB); and the first mode is a mode that exhibits hysteresis in a transfer characteristic and the second mode is a mode that exhibits no hysteresis in a transfer characteristic, and/or the first mode is a mode of which the transfer characteristic is steeper than the transfer characteristic of the second mode.