A computer system comprising: a system memory (144A, 144B); a plurality of active devices (142A, 142B), wherein each of the plurality of active devices includes a processing unit, a write-back cache, and an interface that interfaces the active device to an address network and a data network, and wherein the plurality of active devices and the system memory are configured to perform memory accesses by conveying address transactions on the address network and data on the data network using split-transaction packets, wherein the address network is a point-to-point switched network configured to broadcast address transactions and serves as an ordering point for transactions involving a given cache block; wherein the plurality of active devices (142A, 142B) and system memory (144A, 144B) are further configured to implement a coherence protocol in which changes in ownership status of cache blocks occur in response to reception of address packets and in which access rights transition in response to receiving address packets, sending data packets, and receiving data packets; wherein a first active device of the plurality of active devices is configured to convey a read-to-share transaction on the address network to request a read-only copy of a cache block corresponding to a load operation initiated by the processing unit of the first active device; wherein a second active device of the plurality of active devices is configured to convey data corresponding to the cache block on the data network in response to the read-to-share transaction; wherein a third active device of the plurality of active devices is configured to convey an intervening read-to-own transaction, to request a writable copy of the cache block, on the address network after the read-to-share transaction is conveyed on the address network by the first active device but prior to the first active device receiving the data corresponding to the cache block; wherein the first active device is configured to provide a transient read access right to the cache block in response to receiving the read-to-own transaction dependent upon an indication that the load operation is the oldest uncommitted load operation initiated by the processing unit of the first active device and to otherwise maintain the cache block in an invalid state upon receiving the data if the load operation is not the oldest uncommitted load operation; and wherein the transient read access right allows the load operation to be completed to avoid starvation when the data corresponding to the cache block is received by the first active device and, following completion of the load operation, results in the state of the cache block in the first active device to be downgraded to invalid. a system memory (144A, 144B); a plurality of active devices (142A, 142B), wherein each of the plurality of active devices includes a processing unit, a write-back cache, and an interface that interfaces the active device to an address network and a data network, and wherein the plurality of active devices and the system memory are configured to perform memory accesses by conveying address transactions on the address network and data on the data network using split-transaction packets, wherein the address network is a point-to-point switched network configured to broadcast address transactions and serves as an ordering point for transactions involving a given cache block; wherein the plurality of active devices (142A, 142B) and system memory (144A, 144B) are further configured to implement a coherence protocol in which changes in ownership status of cache blocks occur in response to reception of address packets and in which access rights transition in response to receiving address packets, sending data packets, and receiving data packets; wherein a first active device of the plurality of active devices is configured to convey a read-to-share transaction on the address network to request a read-only copy of a cache block corresponding to a load operation initiated by the processing unit of the first active device; wherein a second active device of the plurality of active devices is configured to convey data corresponding to the cache block on the data network in response to the read-to-share transaction; wherein a third active device of the plurality of active devices is configured to convey an intervening read-to-own transaction, to request a writable copy of the cache block, on the address network after the read-to-share transaction is conveyed on the address network by the first active device but prior to the first active device receiving the data corresponding to the cache block; wherein the first active device is configured to provide a transient read access right to the cache block in response to receiving the read-to-own transaction dependent upon an indication that the load operation is the oldest uncommitted load operation initiated by the processing unit of the first active device and to otherwise maintain the cache block in an invalid state upon receiving the data if the load operation is not the oldest uncommitted load operation; and wherein the transient read access right allows the load operation to be completed to avoid starvation when the data corresponding to the cache block is received by the first active device and, following completion of the load operation, results in the state of the cache block in the first active device to be downgraded to invalid.