A pixel comprising a first sub-pixel, a third sub-pixel, and a second sub-pixel arranged in a second direction, and a bridge pattern, wherein each of the first sub-pixel, the second sub-pixel, and the third sub-pixel comprise: an emission area and a non-emission area; a pixel circuit including at least one transistor (T1, T2, T3) and a storage capacitor (Cst); a first alignment electrode disposed on the pixel circuit, and extending in the second direction; a second alignment electrode extending in the second direction, and spaced apart from the first alignment electrode in a first direction intersecting the second direction; a light emitting element disposed between the second alignment electrode and the first alignment electrode, and including a first end adjacent to the second alignment electrode and a second end adjacent to the first alignment electrode; wherein the bridge pattern and the storage capacitor (Cst) are spaced apart in the first direction from the first alignment electrode and the second alignment electrode, and are not disposed between the first alignment electrode and the second alignment electrode, wherein the bridge pattern is electrically connected to the storage capacitor, wherein the bridge pattern comprises: a first bridge pattern electrically connected to the storage capacitor of the first sub-pixel; a second bridge pattern electrically connected to the storage capacitor of the second sub-pixel; and a third bridge pattern electrically connected to the storage capacitor of the third sub-pixel, and wherein, in a plan view, the first bridge pattern, the third bridge pattern, and the second bridge pattern are arranged in a same column in the second direction, and wherein, in a plan view, the storage capacitor of the first sub-pixel, the storage capacitor of the second sub-pixel, and the storage capacitor of the third sub-pixel are arranged in a same column in the second direction. an emission area and a non-emission area; a pixel circuit including at least one transistor (T1, T2, T3) and a storage capacitor (Cst); a first alignment electrode disposed on the pixel circuit, and extending in the second direction; a second alignment electrode extending in the second direction, and spaced apart from the first alignment electrode in a first direction intersecting the second direction; a light emitting element disposed between the second alignment electrode and the first alignment electrode, and including a first end adjacent to the second alignment electrode and a second end adjacent to the first alignment electrode; wherein the bridge pattern and the storage capacitor (Cst) are spaced apart in the first direction from the first alignment electrode and the second alignment electrode, and are not disposed between the first alignment electrode and the second alignment electrode, wherein the bridge pattern is electrically connected to the storage capacitor, wherein the bridge pattern comprises: a first bridge pattern electrically connected to the storage capacitor of the first sub-pixel; a second bridge pattern electrically connected to the storage capacitor of the second sub-pixel; and a third bridge pattern electrically connected to the storage capacitor of the third sub-pixel, and a first bridge pattern electrically connected to the storage capacitor of the first sub-pixel; a second bridge pattern electrically connected to the storage capacitor of the second sub-pixel; and a third bridge pattern electrically connected to the storage capacitor of the third sub-pixel, and wherein, in a plan view, the first bridge pattern, the third bridge pattern, and the second bridge pattern are arranged in a same column in the second direction, and wherein, in a plan view, the storage capacitor of the first sub-pixel, the storage capacitor of the second sub-pixel, and the storage capacitor of the third sub-pixel are arranged in a same column in the second direction.