A circuit (300a, 300b, 300c, 300d) for sensing an input voltage (V HV), the circuit providing an output, the circuit comprising: a first series combination of first and second voltage-controlled semiconductor resistors, the first series combination being connected in parallel with a second series combination of third and fourth voltage-controlled semiconductor resistors, wherein each voltage-controlled semiconductor resistor includes a gate (31, 32, 33, 34), and wherein the first voltage-controlled semiconductor resistor is connected directly to the third voltage-controlled semiconductor resistor; and a reference source (V REF, I REF); wherein: the reference source is connected to the first series combination and also to the second series combination; the gates of the first and fourth voltage-controlled semiconductor resistors are held equipotential by means of a first electrical interconnector, and the gates of the second and third voltage-controlled semiconductor resistors are held equipotential by means of a second electrical interconnector; the first and second electrical interconnectors are provided with respective connectors (316, 312) for applying the input voltage therebetween; and the output is arranged to be derived from either: a) a potential difference between: i) a first point between the first and second voltage-controlled semiconductor resistors, and ii) a second point between the third and fourth voltage-controlled semiconductor resistors; or b) a current flowing between: i) a first point between the first and second voltage-controlled semiconductor resistors, and ii) a second point between the third and fourth voltage-controlled semiconductor resistors. a first series combination of first and second voltage-controlled semiconductor resistors, the first series combination being connected in parallel with a second series combination of third and fourth voltage-controlled semiconductor resistors, wherein each voltage-controlled semiconductor resistor includes a gate (31, 32, 33, 34), and wherein the first voltage-controlled semiconductor resistor is connected directly to the third voltage-controlled semiconductor resistor; and a reference source (V REF, I REF); wherein: the reference source is connected to the first series combination and also to the second series combination; the gates of the first and fourth voltage-controlled semiconductor resistors are held equipotential by means of a first electrical interconnector, and the gates of the second and third voltage-controlled semiconductor resistors are held equipotential by means of a second electrical interconnector; the first and second electrical interconnectors are provided with respective connectors (316, 312) for applying the input voltage therebetween; and the output is arranged to be derived from either: a) a potential difference between: i) a first point between the first and second voltage-controlled semiconductor resistors, and ii) a second point between the third and fourth voltage-controlled semiconductor resistors; or b) a current flowing between: i) a first point between the first and second voltage-controlled semiconductor resistors, and ii) a second point between the third and fourth voltage-controlled semiconductor resistors. the reference source is connected to the first series combination and also to the second series combination; the gates of the first and fourth voltage-controlled semiconductor resistors are held equipotential by means of a first electrical interconnector, and the gates of the second and third voltage-controlled semiconductor resistors are held equipotential by means of a second electrical interconnector; the first and second electrical interconnectors are provided with respective connectors (316, 312) for applying the input voltage therebetween; and the output is arranged to be derived from either: a) a potential difference between: i) a first point between the first and second voltage-controlled semiconductor resistors, and ii) a second point between the third and fourth voltage-controlled semiconductor resistors; or b) a current flowing between: i) a first point between the first and second voltage-controlled semiconductor resistors, and ii) a second point between the third and fourth voltage-controlled semiconductor resistors. a) a potential difference between: i) a first point between the first and second voltage-controlled semiconductor resistors, and ii) a second point between the third and fourth voltage-controlled semiconductor resistors; or i) a first point between the first and second voltage-controlled semiconductor resistors, and ii) a second point between the third and fourth voltage-controlled semiconductor resistors; or b) a current flowing between: i) a first point between the first and second voltage-controlled semiconductor resistors, and ii) a second point between the third and fourth voltage-controlled semiconductor resistors. i) a first point between the first and second voltage-controlled semiconductor resistors, and ii) a second point between the third and fourth voltage-controlled semiconductor resistors.