A method of forming a memory device, comprising: forming a bottom electrode above an electrically conductive structure embedded in an interconnect dielectric material, wherein the electrically conductive structure further comprises a diffusion barrier liner located on a bottom surface and lateral sidewalls of the electrically conductive structure; forming a magnetic tunnel junction stack above the bottom electrode, the magnetic tunnel junction stack comprising a magnetic reference layer above the bottom electrode, a tunnel barrier layer above the magnetic reference layer, and a magnetic free layer above the tunnel barrier layer; recessing opposed lateral portions of the magnetic free layer; and forming sidewall spacers on the opposed lateral portions of the magnetic free layer for, at least in part, confining an active region formed by the magnetic free layer and the tunnel barrier layer; characterized by: recessing the bottom electrode; the magnetic tunnel junction stack further comprising: a non-magnetic spacer layer located on the magnetic free layer, a second magnetic free layer located on the non-magnetic spacer layer, and a magnetic tunnel junction cap layer located on at least one of the magnetic free layer and the second magnetic free layer; wherein recessing the opposed lateral portions of the magnetic free layer further comprises: forming a patterned hardmask layer above the magnetic free layer; and etching the opposed lateral portions of the magnetic free layer; and wherein the patterned hardmask layer comprises a metal as a bottommost material, and a sacrificial dielectric material as a topmost material. forming a bottom electrode above an electrically conductive structure embedded in an interconnect dielectric material, wherein the electrically conductive structure further comprises a diffusion barrier liner located on a bottom surface and lateral sidewalls of the electrically conductive structure; forming a magnetic tunnel junction stack above the bottom electrode, the magnetic tunnel junction stack comprising a magnetic reference layer above the bottom electrode, a tunnel barrier layer above the magnetic reference layer, and a magnetic free layer above the tunnel barrier layer; recessing opposed lateral portions of the magnetic free layer; and forming sidewall spacers on the opposed lateral portions of the magnetic free layer for, at least in part, confining an active region formed by the magnetic free layer and the tunnel barrier layer; characterized by: recessing the bottom electrode; a non-magnetic spacer layer located on the magnetic free layer, a second magnetic free layer located on the non-magnetic spacer layer, and a magnetic tunnel junction cap layer located on at least one of the magnetic free layer and the second magnetic free layer; wherein recessing the opposed lateral portions of the magnetic free layer further comprises: forming a patterned hardmask layer above the magnetic free layer; and etching the opposed lateral portions of the magnetic free layer; and forming a patterned hardmask layer above the magnetic free layer; and etching the opposed lateral portions of the magnetic free layer; and wherein the patterned hardmask layer comprises a metal as a bottommost material, and a sacrificial dielectric material as a topmost material.