A method for fabricating a dual trench structure, the method comprising: providing a wafer comprising a semiconductor layer including a top surface; providing a plurality of charge compensation trenches open to said top surface and formed within said semiconductor layer, wherein said plurality of charge compensation trenches comprises a plurality of charge compensation trench surfaces (341, 343); providing a termination trench open to said top surface and formed within said semiconductor layer, wherein said termination trench comprises a termination trench surface (351, 353); forming a first shield oxide layer of a first predetermined thickness on said plurality of charge compensation trench surfaces and said termination trench surface; forming a plurality of voids through centers of said plurality of charge compensation trenches during formation of said first shield oxide layer, wherein said first predetermined thickness of said first shield oxide layer is sufficient to allow formation of said voids; filling said plurality of charge compensation trenches and said termination trench with poly-silicon covering said first shield oxide layer, wherein the poly-silicon filling said plurality of charge compensation trenches form electrodes and wherein the poly-silicon filing said termination trench forms sacrificial material; performing recess etch of said poly-silicon to below said top surface of said semiconductor layer; forming a photoresist layer isolating said plurality of charge compensation trenches; and etching poly-silicon from said termination trench to expose said first shield oxide layer of said first predetermined thickness. providing a wafer comprising a semiconductor layer including a top surface; providing a plurality of charge compensation trenches open to said top surface and formed within said semiconductor layer, wherein said plurality of charge compensation trenches comprises a plurality of charge compensation trench surfaces (341, 343); providing a termination trench open to said top surface and formed within said semiconductor layer, wherein said termination trench comprises a termination trench surface (351, 353); forming a first shield oxide layer of a first predetermined thickness on said plurality of charge compensation trench surfaces and said termination trench surface; forming a plurality of voids through centers of said plurality of charge compensation trenches during formation of said first shield oxide layer, wherein said first predetermined thickness of said first shield oxide layer is sufficient to allow formation of said voids; filling said plurality of charge compensation trenches and said termination trench with poly-silicon covering said first shield oxide layer, wherein the poly-silicon filling said plurality of charge compensation trenches form electrodes and wherein the poly-silicon filing said termination trench forms sacrificial material; performing recess etch of said poly-silicon to below said top surface of said semiconductor layer; forming a photoresist layer isolating said plurality of charge compensation trenches; and etching poly-silicon from said termination trench to expose said first shield oxide layer of said first predetermined thickness.