A double-face-cooled semiconductor module having incorporated therein an upper and lower arms series circuit of an inverter circuit, comprising: a first heat dissipation member having a heat dissipation surface on one side and first conducting member and a second conducting member formed on another side through an insulation member; a second heat dissipation member having a heat dissipation surface on one side and a third conducting member and a fourth conducting member on another side through an insulation member, wherein the other sides of the first and second heat dissipation members (522, 562) are arranged facing each other; fixing portions (536, 545) provided on the first and second conducting members (534, 544) that fix collector surfaces of semiconductor chips (52, 62; 538, 547) of the upper and lower arms of the semiconductor module; and gate conductors (555, 559) provided on the first and second conducting members (534, 544) formed on the first heat dissipation member, connected to gate terminals (553, 557) of the semiconductor module, wherein gate electrode terminals (54, 64; 662) of the semiconductor chips and the gate conductors (555, 559) are electrically connected to each other, respectively; and signal conductors (554, 558) of signal terminals (552, 556) provided on the other side of the first heat dissipation member, wherein the third and fourth conducting members (574, 584) are connected to emitter surfaces of the semiconductor chips (52, 62; 538, 547) fixed to the first heat dissipation member; the fixing portions (536, 545) and the gate conductors (555, 559) provided on the first and second conducting members (534, 544) on the first heat dissipation member have the same height as seen from the first heat dissipation member; the fixing portions (536, 545) and the gate conductors (555, 559) are both convex and soldered to the collector surfaces of the semiconductor chips (52, 62; 538, 547) arranged opposite to the fixing portions (536, 545); a gate electrode terminal of the gate electrode terminals (54, 64; 662) provided on an emitter surface side of a semiconductor chip (52; 538) of the semiconductor chips (52, 62; 538, 547) and a gate conductor of the gate conductors (555, 559) are electrically connected through wire bonding; and a signal emitter electrode of the semiconductor chip and a signal conductor of the signal conductors (554, 558) are electrically connected through wire bonding. a first heat dissipation member having a heat dissipation surface on one side and first conducting member and a second conducting member formed on another side through an insulation member; a second heat dissipation member having a heat dissipation surface on one side and a third conducting member and a fourth conducting member on another side through an insulation member, wherein the other sides of the first and second heat dissipation members (522, 562) are arranged facing each other; fixing portions (536, 545) provided on the first and second conducting members (534, 544) that fix collector surfaces of semiconductor chips (52, 62; 538, 547) of the upper and lower arms of the semiconductor module; and gate conductors (555, 559) provided on the first and second conducting members (534, 544) formed on the first heat dissipation member, connected to gate terminals (553, 557) of the semiconductor module, wherein gate electrode terminals (54, 64; 662) of the semiconductor chips and the gate conductors (555, 559) are electrically connected to each other, respectively; and signal conductors (554, 558) of signal terminals (552, 556) provided on the other side of the first heat dissipation member,