A circuit, comprising: - at least one first voltage regulator having a first output voltage selection pin set (SEL1_LDO1, SEL2_LDO1, SEL3_LDO1), the at least one first voltage regulator configured to receive a first digital signal at the first output voltage selection pin set (SEL1_LDO1, SEL2_LDO1, SEL3_LDO1) and activatable to produce a first output voltage (OUT_LDO1, Vo1) which is a function of the first digital signal received at the first output voltage selection pin set (SEL1_LDO1, SEL2_LDO1, SEL3_LDO1), - at least one second voltage regulator having a second output voltage selection pin set (SEL1_LDO2, SEL2_LDO2, SEL3_LDO2), the at least one second voltage regulator configured to receive a second digital signal at the second output voltage selection pin set (SEL1_LDO2, SEL2_LDO2, SEL3_LDO2) and activatable to produce a second output voltage (OUT_LDO2, Vo2) which is a function of the second digital signal received at the second output voltage selection pin set (SEL1_LDO2, SEL2_LDO2, SEL3_LDO2), wherein the at least one first voltage regulator and the at least one second voltage regulator are operable (14, V CC_OP1) in a voltage tracking mode with the second output voltage (OUT_LDO2, Vo2) of the at least one second voltage regulator tracking the first output voltage (OUT_LDO1, Vo1) of the at least one first voltage regulator as a result of the first digital signal received at the first output voltage selection pin set (SEL1_LDO1, SEL2_LDO1, SEL3_LDO1) and the second digital signal received at the second output voltage selection pin set (SEL1_LDO2, SEL2_LDO2, SEL3_LDO2) having a same value, - an overvoltage sensor configured to detect overvoltage events occurring at the output of the at least one first voltage regulator (LDO1, Vo1), and - control circuitry coupled to the overvoltage sensor, the control circuitry configured to avoid operation of the at least one first voltage regulator and the at least one second voltage regulator in the voltage tracking mode as a result of an overvoltage event detected at the output of the at least one first voltage regulator (LDO1, Vo1). - at least one first voltage regulator having a first output voltage selection pin set (SEL1_LDO1, SEL2_LDO1, SEL3_LDO1), the at least one first voltage regulator configured to receive a first digital signal at the first output voltage selection pin set (SEL1_LDO1, SEL2_LDO1, SEL3_LDO1) and activatable to produce a first output voltage (OUT_LDO1, Vo1) which is a function of the first digital signal received at the first output voltage selection pin set (SEL1_LDO1, SEL2_LDO1, SEL3_LDO1), - at least one second voltage regulator having a second output voltage selection pin set (SEL1_LDO2, SEL2_LDO2, SEL3_LDO2), the at least one second voltage regulator configured to receive a second digital signal at the second output voltage selection pin set (SEL1_LDO2, SEL2_LDO2, SEL3_LDO2) and activatable to produce a second output voltage (OUT_LDO2, Vo2) which is a function of the second digital signal received at the second output voltage selection pin set (SEL1_LDO2, SEL2_LDO2, SEL3_LDO2), wherein the at least one first voltage regulator and the at least one second voltage regulator are operable (14, V CC_OP1) in a voltage tracking mode with the second output voltage (OUT_LDO2, Vo2) of the at least one second voltage regulator tracking the first output voltage (OUT_LDO1, Vo1) of the at least one first voltage regulator as a result of the first digital signal received at the first output voltage selection pin set (SEL1_LDO1, SEL2_LDO1, SEL3_LDO1) and the second digital signal received at the second output voltage selection pin set (SEL1_LDO2, SEL2_LDO2, SEL3_LDO2) having a same value, - an overvoltage sensor configured to detect overvoltage events occurring at the output of the at least one first voltage regulator (LDO1, Vo1), and - control circuitry coupled to the overvoltage sensor, the control circuitry configured to avoid operation of the at least one first voltage regulator and the at least one second voltage regulator in the voltage tracking mode as a result of an overvoltage event detected at the output of the at least one first voltage regulator (LDO1, Vo1).