A processor comprising: fetch circuitry (2104, 2201, 2301) to fetch a compress instruction (2122, 2132, 2152, 2402); decode circuitry (1303, 1403, 2106, 2203,2303) to decode the compress instruction (2122, 2132, 2152, 2402) having fields to specify an opcode (2122A, 2142A, 2152A, 2132A), a compress algorithm (2122C, 2142C,2152C, 2132C) and locations of a decompressed source (2122D, 2124, 2132D, 2134, 2152D, 2154) and a compressed destination matrix (2128, 2138, 2148, 2158, 2168, 2178); execution circuitry (1311, 1411, 2108, 2126, 2136, 2146, 2156, 2166, 2176, 2186, 2205, 2162D, 2164) to execute the compress instruction (2122, 2132, 2152, 2402), to: generate a compressed result matrix according to the compress algorithm, characterized by compressing the specified decompressed source matrix (2122D, 2124, 2132D, 2134, 2152D, 2154) by either packing non-zero-valued elements together in the compressed result matrix and storing the matrix position of each non-zero-valued element in a header (2128B, 2138B, 2178B), or using fewer bits to represent one or more elements of the decompressed source matrix (2122D, 2124, 2132D, 2134, 2152D, 2154) and using the header (2128B, 2138B, 2178B) to identify matrix elements being represented by fewer bits, and; store the compressed result matrix to the specified compressed destination matrix. fetch circuitry (2104, 2201, 2301) to fetch a compress instruction (2122, 2132, 2152, 2402); decode circuitry (1303, 1403, 2106, 2203,2303) to decode the compress instruction (2122, 2132, 2152, 2402) having fields to specify an opcode (2122A, 2142A, 2152A, 2132A), a compress algorithm (2122C, 2142C,2152C, 2132C) and locations of a decompressed source (2122D, 2124, 2132D, 2134, 2152D, 2154) and a compressed destination matrix (2128, 2138, 2148, 2158, 2168, 2178); execution circuitry (1311, 1411, 2108, 2126, 2136, 2146, 2156, 2166, 2176, 2186, 2205, 2162D, 2164) to execute the compress instruction (2122, 2132, 2152, 2402), to: generate a compressed result matrix according to the compress algorithm, characterized by compressing the specified decompressed source matrix (2122D, 2124, 2132D, 2134, 2152D, 2154) by either packing non-zero-valued elements together in the compressed result matrix and storing the matrix position of each non-zero-valued element in a header (2128B, 2138B, 2178B), or using fewer bits to represent one or more elements of the decompressed source matrix (2122D, 2124, 2132D, 2134, 2152D, 2154) and using the header (2128B, 2138B, 2178B) to identify matrix elements being represented by fewer bits, and; store the compressed result matrix to the specified compressed destination matrix. generate a compressed result matrix according to the compress algorithm, characterized by compressing the specified decompressed source matrix (2122D, 2124, 2132D, 2134, 2152D, 2154) by either packing non-zero-valued elements together in the compressed result matrix and storing the matrix position of each non-zero-valued element in a header (2128B, 2138B, 2178B), or using fewer bits to represent one or more elements of the decompressed source matrix (2122D, 2124, 2132D, 2134, 2152D, 2154) and using the header (2128B, 2138B, 2178B) to identify matrix elements being represented by fewer bits, and; store the compressed result matrix to the specified compressed destination matrix.