A method of testing a data link having a multi-lane input port and a multi-lane output port, the method comprising: a) providing a first pseudo-random bit sequence, PRBS, and providing a second PRBS synchronously with the first PRBS to the multi-lane input port of the data link; b) using a first PRBS analyser connected to the output port of the data link to detect bit error events in a first received bit sequence, wherein the first received bit sequence corresponds to the first PRBS transmitted over the data link, and using a second PRBS analyser synchronised with the first PRBS analyser to detect bit errors in a second bit sequence received at the output port of the data link, wherein the second bit sequence corresponds to the second PRBS transmitted over the data link; c) for each bit error event detected by the first PRBS analyser in at least a portion of the first received bit sequence and for each bit error event detected by the second PRBS analyser in at least a portion of the second received bit sequence, writing bit error information into an error buffer, wherein the bit error information comprises PRBS analyser state information corresponding to the detected bit error event, and generating, for each detected bit error event, a word error pattern identifier, said word error pattern identifier identifying an interlane word that is composed of bits from each of the first and second received bit sequences that are associated with the detected bit error event; d) using an error pattern analyser to read the bit error information from the error buffer, to associate detected errors with specific bit patterns, and to generate therefrom error pattern analysis information that is indicative of a cause of the detected bit errors; and, e) providing the error pattern analysis information to a user. a) providing a first pseudo-random bit sequence, PRBS, and providing a second PRBS synchronously with the first PRBS to the multi-lane input port of the data link; b) using a first PRBS analyser connected to the output port of the data link to detect bit error events in a first received bit sequence, wherein the first received bit sequence corresponds to the first PRBS transmitted over the data link, and using a second PRBS analyser synchronised with the first PRBS analyser to detect bit errors in a second bit sequence received at the output port of the data link, wherein the second bit sequence corresponds to the second PRBS transmitted over the data link; c) for each bit error event detected by the first PRBS analyser in at least a portion of the first received bit sequence and for each bit error event detected by the second PRBS analyser in at least a portion of the second received bit sequence, writing bit error information into an error buffer, wherein the bit error information comprises PRBS analyser state information corresponding to the detected bit error event, and generating, for each detected bit error event, a word error pattern identifier, said word error pattern identifier identifying an interlane word that is composed of bits from each of the first and second received bit sequences that are associated with the detected bit error event; d) using an error pattern analyser to read the bit error information from the error buffer, to associate detected errors with specific bit patterns, and to generate therefrom error pattern analysis information that is indicative of a cause of the detected bit errors; and, e) providing the error pattern analysis information to a user.