A method for executing a machine instruction in a central processing unit comprising steps of: obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising: at least one opcode field to provide an opcode, the opcode identifying a Vector String Range Compare operation; an extension field to be used in designating one or more registers; a first register field combined with a first portion of the extension field to designate a first register, the first register comprising a first operand; a second register field combined with a second portion of the extension field to designate a second register, the second register comprising a second operand; a third register field combined with a third portion of the extension field to designate a third register, the third register comprising a third operand; a fourth register field combined with a fourth portion of the extension field to designate a fourth register, the fourth register comprising a fourth operand; a mask field, the mask field comprising one or more controls to be used during execution of the machine instruction; and executing the machine instruction, the execution comprising: comparing element of the second operand with one or more values of the third operand using one or more controls programmatically provided by the fourth operand to determine whether there is a match as defined by the one or more values of the third operand and the one or more controls of the fourth operand; and providing a result in the first operand based on the comparing. at least one opcode field to provide an opcode, the opcode identifying a Vector String Range Compare operation; an extension field to be used in designating one or more registers; a first register field combined with a first portion of the extension field to designate a first register, the first register comprising a first operand; a second register field combined with a second portion of the extension field to designate a second register, the second register comprising a second operand; a third register field combined with a third portion of the extension field to designate a third register, the third register comprising a third operand; a fourth register field combined with a fourth portion of the extension field to designate a fourth register, the fourth register comprising a fourth operand; a mask field, the mask field comprising one or more controls to be used during execution of the machine instruction; and executing the machine instruction, the execution comprising: comparing element of the second operand with one or more values of the third operand using one or more controls programmatically provided by the fourth operand to determine whether there is a match as defined by the one or more values of the third operand and the one or more controls of the fourth operand; and providing a result in the first operand based on the comparing. comparing element of the second operand with one or more values of the third operand using one or more controls programmatically provided by the fourth operand to determine whether there is a match as defined by the one or more values of the third operand and the one or more controls of the fourth operand; and providing a result in the first operand based on the comparing.