A semiconductor device, comprising: a semiconductor substrate comprising a main surface, a rear surface vertically spaced apart from the main surface, an active device region, and an inactive region that is laterally adjacent to the active device region; a switching device disposed in the active device region, the switching device comprising doped source, body, drift and drain regions (108, 110, 112, 114), and electrically conductive gate and field electrodes (118, 124), the gate and field electrodes (118, 124) being insulated from one another and from the substrate, the gate electrode being adjacent to the body region and configured to control an electrical connection between the source and drain regions (108, 114), the field electrode being adjacent to the drift region; a dielectric layer disposed on the main surface over the active and inactive regions (136, 134); an electrically conductive source pad formed in a first metallization layer, the first metallization layer being formed on the dielectric layer; and a resistor connected between the source pad and the field electrode, wherein the resistor comprises an electrically conductive resistance section that is disposed in a resistor trench, the resistor trench vertically extending from the main surface into the semiconductor substrate, wherein the resistor trench is formed within the inactive region and is electrically isolated from every active device within the active device region, wherein the resistor is connected to the field electrode by a conductive connection line that comprises a conductive feedline that is formed directly on the field electrode, and wherein the conductive feedline is disposed beneath the first metallization layer and is insulated from the first metallization layer by the dielectric layer, wherein the source pad extends continuously over the active device region and the inactive device region, wherein a section of the source pad in the inactive device region partially covers the resistor trench such that a first end of the resistance section is disposed directly underneath the source pad and such that a second end of the resistance section that is laterally opposite the first end is uncovered from the source pad, wherein the first end of the resistance section is electrically connected to the source pad by a first via that vertically extends through the dielectric layer, and wherein the second end of the resistance section is electrically connected to the conductive connection line. a semiconductor substrate comprising a main surface, a rear surface vertically spaced apart from the main surface, an active device region, and an inactive region that is laterally adjacent to the active device region; a switching device disposed in the active device region, the switching device comprising doped source, body, drift and drain regions (108, 110, 112, 114), and electrically conductive gate and field electrodes (118, 124), the gate and field electrodes (118, 124) being insulated from one another and from the substrate, the gate electrode being adjacent to the body region and configured to control an electrical connection between the source and drain regions (108, 114), the field electrode being adjacent to the drift region; a dielectric layer disposed on the main surface over the active and inactive regions (136, 134); an electrically conductive source pad formed in a first metallization layer, the first metallization layer being formed on the dielectric layer; and a resistor connected between the source pad and the field electrode, wherein the resistor comprises an electrically conductive resistance section that is disposed in a resistor trench, the resistor trench vertically extending from the main surface into the semiconductor substrate, wherein the resistor trench is formed within the inactive region and is electrically isolated from every active device within the active device region, wherein the resistor is connected to the field electrode by a conductive connection line that comprises a conductive feedline that is formed directly on the field electrode, and wherein the conductive feedline is disposed beneath the first metallization layer and is insulated from the first metallization layer by the dielectric layer, wherein the source pad extends continuously over the active device region and the inactive device region, wherein a section of the source pad in the inactive device region partially covers the resistor trench such that a first end of the resistance section is disposed directly underneath the source pad and such that a second end of the resistance section that is laterally opposite the first end is uncovered from the source pad, wherein the first end of the resistance section is electrically connected to the source pad by a first via that vertically extends through the dielectric layer, and wherein the second end of the resistance section is electrically connected to the conductive connection line.