A system for supporting scalable bitmap based P_Key table in a high performance computing environment, comprising: one or more microprocessors; at least one subnet, the at least one subnet comprising one or more switches, the one or more switches comprising at least a leaf switch (1211, 1212, 1213, 1214), wherein each of the one or more switches comprise a plurality of switch ports, a plurality of host channel adapters, each host channel adapter comprising at least one host channel adapter port, and a plurality of end nodes (1241, 1242, 1243, 1244), wherein each of the plurality of end nodes are associated with at least one host channel adapter of the plurality of host channel adapters; wherein each of the plurality of end nodes are associated with at least one of a plurality of partitions; wherein each of the plurality of partitions are associated with a P_Key value; the system being characterized by a management entity adapted to determine and set a bitmap based P_Key table for each port of said plurality of switch ports and each host channel adapter port of said plurality of host channel adapter ports, wherein in said bitmap based P_Key table a representation of a P_Key value is a single bit, defining whether a packet including a P_Key value is allowed to pass through the switch port or the host channel adapter port performing a partition check for that port; wherein a switch port of the plurality of switch ports is associated with a bitmap based P_Key table of a plurality of bitmap based P_key tables set by the management entity; and wherein a host channel adapter port of the plurality of host channel adapter ports is associated with a bitmap based P_Key table of the plurality of bitmap based P_key tables set by the management entity. one or more microprocessors; at least one subnet, the at least one subnet comprising one or more switches, the one or more switches comprising at least a leaf switch (1211, 1212, 1213, 1214), wherein each of the one or more switches comprise a plurality of switch ports, a plurality of host channel adapters, each host channel adapter comprising at least one host channel adapter port, and a plurality of end nodes (1241, 1242, 1243, 1244), wherein each of the plurality of end nodes are associated with at least one host channel adapter of the plurality of host channel adapters; one or more switches, the one or more switches comprising at least a leaf switch (1211, 1212, 1213, 1214), wherein each of the one or more switches comprise a plurality of switch ports, a plurality of host channel adapters, each host channel adapter comprising at least one host channel adapter port, and a plurality of end nodes (1241, 1242, 1243, 1244), wherein each of the plurality of end nodes are associated with at least one host channel adapter of the plurality of host channel adapters; wherein each of the plurality of end nodes are associated with at least one of a plurality of partitions; wherein each of the plurality of partitions are associated with a P_Key value; the system being characterized by a management entity adapted to determine and set a bitmap based P_Key table for each port of said plurality of switch ports and each host channel adapter port of said plurality of host channel adapter ports, wherein in said bitmap based P_Key table a representation of a P_Key value is a single bit, defining whether a packet including a P_Key value is allowed to pass through the switch port or the host channel adapter port performing a partition check for that port; wherein a switch port of the plurality of switch ports is associated with a bitmap based P_Key table of a plurality of bitmap based P_key tables set by the management entity; and wherein a host channel adapter port of the plurality of host channel adapter ports is associated with a bitmap based P_Key table of the plurality of bitmap based P_key tables set by the management entity.