An open circuit detecting system for determining an open circuit status of an object circuit, wherein during the determination of the open circuit status of the object circuit one end of the open circuit detection system is connected to a ground and a parasitic capacitor exists between the object circuit and ground, said parasitic capacitor having a characteristic impedance, which represents all the parasitic capacitance that exists between conductors, conductors or components and ground, or the capacitance that exists between components, characterized by comprising: a test unit, a stray-capacitance boosting unit, a sampling unit, and a signal processing unit; wherein the sampling unit is a sampling resistor, the signal processing unit comprises an inverter, a comparator connected to the inverter, and an "AND" gate connected to the comparator, one end of the test unit is connected to a power supply, the other end of the test unit is connected to a first input of the stray-capacitance boosting unit, a second input of the stray-capacitance boosting unit is connected to the object circuit, an output of the stray-capacitance boosting unit is connected to one end of the sampling resistor, the other end of the sampling resistor is connected to ground, an input of the inverter is connected to the common point of the stray-capacitance boosting unit and the sampling resistor, an output of the inverter is connected to a negative terminal of the comparator, a positive terminal of the comparator is configured to receive a reference voltage, an output of the comparator is connected to a first input of the "AND" gate, a second input of the "AND" gate is configured to receive a gate pulse, and an output of the "AND" gate is configured to output several number of pulses corresponding to the capacitance of the parasitic capacitor; and wherein the open circuit detecting system is configured to acquire an electrical signal from the object circuit and based on said electrical signal to determine whether the object circuit is in a normal circuit status or in an open circuit status by determining the capacitance of the parasitic capacitor, wherein the capacitance of the parasitic capacitor in a normal circuit status is greater than the capacitance of the parasitic capacitor in an open circuit status. a test unit, a stray-capacitance boosting unit, a sampling unit, and a signal processing unit; wherein the sampling unit is a sampling resistor, the signal processing unit comprises an inverter, a comparator connected to the inverter, and an "AND" gate connected to the comparator, one end of the test unit is connected to a power supply, the other end of the test unit is connected to a first input of the stray-capacitance boosting unit, a second input of the stray-capacitance boosting unit is connected to the object circuit, an output of the stray-capacitance boosting unit is connected to one end of the sampling resistor, the other end of the sampling resistor is connected to ground, an input of the inverter is connected to the common point of the stray-capacitance boosting unit and the sampling resistor, an output of the inverter is connected to a negative terminal of the comparator, a positive terminal of the comparator is configured to receive a reference voltage, an output of the comparator is connected to a first input of the "AND" gate, a second input of the "AND" gate is configured to receive a gate pulse, and an output of the "AND" gate is configured to output several number of pulses corresponding to the capacitance of the parasitic capacitor; and wherein the open circuit detecting system is configured to acquire an electrical signal from the object circuit and based on said electrical signal to determine whether the object circuit is in a normal circuit status or in an open circuit status by determining the capacitance of the parasitic capacitor, wherein the capacitance of the parasitic capacitor in a normal circuit status is greater than the capacitance of the parasitic capacitor in an open circuit status.