A memory protection circuit (6_1) comprising: an arithmetic circuit that executes a plurality of virtual machines (VM#0, VM#1, VM#2) and outputs a memory address (ADD_M) and virtual machine information to access a memory by one of the virtual machines (VM#0, VM#1, VM#2); a first memory area setting register that stores a first memory area information with regard to a first memory area of the memory; a second memory area setting register that stores a second memory area information with regard to a second memory area of the memory; a first memory area allocation register that stores a first virtual machine information with regard to a virtual machine having an access permission to the first memory area; a second memory area allocation register that stores a second virtual machine information with regard to a virtual machine having an access permission to the second memory area; a first address determination circuit that receives the memory address (ADD_M) and determines whether the memory address (ADD_M) is within the first memory area based on the first memory area setting register; a second address determination circuit that receives the memory address (ADD_M) and determines whether the memory address (ADD_M) is within the second memory area based on the second memory area setting register; a first memory access determination circuit that receives the virtual machine information and determines whether the virtual machine outputting the memory address (ADD_M) has an access permission to the first memory area based on the first memory area allocation register; and a second memory access determination circuit that receives the virtual machine information and determines whether the virtual machine outputting the memory address (ADD_M) has an access permission to the second memory area based on the second memory area allocation register, wherein when the first address determination circuit determines that the memory address (ADD_M) is within the first memory area and the first memory access determination circuit determines that the virtual machine has the access permission to the first memory area, the virtual machine is allowed to access to the first memory area, and wherein when the second address determination circuit determines that the memory address (ADD_M) is within the second memory area and the second memory access determination circuit determines that the virtual machine has the access permission to the second memory area, the virtual machine is allowed to access to the second memory area. an arithmetic circuit that executes a plurality of virtual machines (VM#0, VM#1, VM#2) and outputs a memory address (ADD_M) and virtual machine information to access a memory by one of the virtual machines (VM#0, VM#1, VM#2); a first memory area setting register that stores a first memory area information with regard to a first memory area of the memory; a second memory area setting register that stores a second memory area information with regard to a second memory area of the memory; a first memory area allocation register that stores a first virtual machine information with regard to a virtual machine having an access permission to the first memory area; a second memory area allocation register that stores a second virtual machine information with regard to a virtual machine having an access permission to the second memory area; a first address determination circuit that receives the memory address (ADD_M) and determines whether the memory address (ADD_M) is within the first memory area based on the first memory area setting register; a second address determination circuit that receives the memory address (ADD_M) and determines whether the memory address (ADD_M) is within the second memory area based on the second memory area setting register; a first memory access determination circuit that receives the virtual machine information and determines whether the virtual machine outputting the memory address (ADD_M) has an access permission to the first memory area based on the first memory area allocation register; and a second memory access determination circuit that receives the virtual machine information and determines whether the virtual machine outputting the memory address (ADD_M) has an access permission to the second memory area based on the second memory area allocation register, wherein when the first address determination circuit determines that the memory address (ADD_M) is within the first memory area and the first memory access determination circuit determines that the virtual machine has the access permission to the first memory area, the virtual machine is allowed to access to the first memory area, and wherein when the second address determination circuit determines that the memory address (ADD_M) is within the second memory area and the second memory access determination circuit determines that the virtual machine has the access permission to the second memory area, the virtual machine is allowed to access to the second memory area.