A display device, comprising a plurality of pixels arranged in matrix, wherein: the each of the plurality of pixels comprises: a light emitting element configured to emit light in accordance with a current flowing through the light emitting element; a drive transistor having a first current terminal connected to the light emitting element at a node (nb) and adapted to supply a drive current to the light emitting element and to control the drive current in accordance with a data signal representing a target luminance of the light emitting element; and a correction unit for correcting the data signal to be supplied to the drive transistor in accordance with a light emitting element voltage applied at both terminals of the light emitting element, wherein the correction unit is configured to apply to the gate of the drive transistor a corrected data voltage which is one of proportional to and has a positive correlation with the data signal and the light emitting element voltage such that the drive current to be supplied to the light emitting element increases with an increase in an amount of a voltage drop of the light emitting element, the correction unit comprising: a storage capacitor (Cs) having a first terminal connected to the gate of the drive transistor and a second terminal, and a transistor for controlling a multiplier circuit having a first current terminal connected to the node (nb) and a second current terminal connected to the multiplier circuit, characterized in that the second terminal of the storage capacitor (Cs) is connected to the node (nb), the correction unit further comprises a multiplier circuit having the data signal and the light emitting element voltage as inputs, the multiplier circuit included in the correction unit being formed of a single transistor element which has a source electrode and a gate electrode as inputs and a drain electrode as an output, the drain of the single transistor element being connected to the gate of the drive transistor, the source of the single transistor element being adapted to receive the data signal and the gate of the single transistor element being connected to the second current terminal of the transistor for controlling a multiplier circuit. the each of the plurality of pixels comprises: a light emitting element configured to emit light in accordance with a current flowing through the light emitting element; a drive transistor having a first current terminal connected to the light emitting element at a node (nb) and adapted to supply a drive current to the light emitting element and to control the drive current in accordance with a data signal representing a target luminance of the light emitting element; and a correction unit for correcting the data signal to be supplied to the drive transistor in accordance with a light emitting element voltage applied at both terminals of the light emitting element, wherein a light emitting element configured to emit light in accordance with a current flowing through the light emitting element; a drive transistor having a first current terminal connected to the light emitting element at a node (nb) and adapted to supply a drive current to the light emitting element and to control the drive current in accordance with a data signal representing a target luminance of the light emitting element; and a correction unit for correcting the data signal to be supplied to the drive transistor in accordance with a light emitting element voltage applied at both terminals of the light emitting element, wherein the correction unit is configured to apply to the gate of the drive transistor a corrected data voltage which is one of proportional to and has a positive correlation with the data signal and the light emitting element voltage such that the drive current to be supplied to the light emitting element increases with an increase in an amount of a voltage drop of the light emitting element, the correction unit comprising: a storage capacitor (Cs) having a first terminal connected to the gate of the drive transistor and a second terminal, and a transistor for controlling a multiplier circuit having a first current terminal connected to the node (nb) and a second current terminal connected to the multiplier circuit, a storage capacitor (Cs) having a first terminal connected to the gate of the drive transistor and a second terminal, and a transistor for controlling a multiplier circuit having a first current terminal connected to the node (nb) and a second current terminal connected to the multiplier circuit, the second terminal of the storage capacitor (Cs) is connected to the node (nb), the correction unit further comprises a multiplier circuit having the data signal and the light emitting element voltage as inputs, the multiplier circuit included in the correction unit being formed of a single transistor element which has a source electrode and a gate electrode as inputs and a drain electrode as an output, the drain of the single transistor element being connected to the gate of the drive transistor, the source of the single transistor element being adapted to receive the data signal and the gate of the single transistor element being connected to the second current terminal of the transistor for controlling a multiplier circuit.