A semiconductor device structure, comprising: a substrate comprising a plurality of active-device regions having a first pitch; a dielectric layer located over the semiconductor substrate, comprising: a first row of in-line apertures over every second active-device region of the active-device regions at a second pitch that is twice the first pitch, a width of at least an upper portion of each aperture of the first row of in-line apertures exceeding a width of a corresponding active-device region; and a second row of in-line apertures over active-device regions over which apertures of the first row of in-line apertures are not located, the second row of in-line apertures at the second pitch that is twice the first pitch, apertures of the second row being staggered and laterally offset from apertures of the first row, a width of at least an upper portion of each aperture of the second row of in-line apertures exceeding a width of a corresponding active-device region; and a contact plug in each aperture of the first and second rows of in-line apertures; an insulative layer located over the dielectric layer; an etch stop layer located over the insulative layer, the etch stop layer including two in-line rows of apertures aligned over corresponding active-device regions of the plurality of active-device regions, apertures of each set having a second pitch that is about twice the first pitch; an upper dielectric layer over the etch stop layer; concurrently formed laterally extending trenches in the upper dielectric layer that correspond to underlying active-device regions; and contact holes in the insulative layer, each contact hole positioned between a trench of the laterally extending trenches and a contact plug. a substrate comprising a plurality of active-device regions having a first pitch; a dielectric layer located over the semiconductor substrate, comprising: a first row of in-line apertures over every second active-device region of the active-device regions at a second pitch that is twice the first pitch, a width of at least an upper portion of each aperture of the first row of in-line apertures exceeding a width of a corresponding active-device region; and a second row of in-line apertures over active-device regions over which apertures of the first row of in-line apertures are not located, the second row of in-line apertures at the second pitch that is twice the first pitch, apertures of the second row being staggered and laterally offset from apertures of the first row, a width of at least an upper portion of each aperture of the second row of in-line apertures exceeding a width of a corresponding active-device region; and a contact plug in each aperture of the first and second rows of in-line apertures; an insulative layer located over the dielectric layer; an etch stop layer located over the insulative layer, the etch stop layer including two in-line rows of apertures aligned over corresponding active-device regions of the plurality of active-device regions, apertures of each set having a second pitch that is about twice the first pitch; an upper dielectric layer over the etch stop layer; concurrently formed laterally extending trenches in the upper dielectric layer that correspond to underlying active-device regions; and contact holes in the insulative layer, each contact hole positioned between a trench of the laterally extending trenches and a contact plug. a first row of in-line apertures over every second active-device region of the active-device regions at a second pitch that is twice the first pitch, a width of at least an upper portion of each aperture of the first row of in-line apertures exceeding a width of a corresponding active-device region; and a second row of in-line apertures over active-device regions over which apertures of the first row of in-line apertures are not located, the second row of in-line apertures at the second pitch that is twice the first pitch, apertures of the second row being staggered and laterally offset from apertures of the first row, a width of at least an upper portion of each aperture of the second row of in-line apertures exceeding a width of a corresponding active-device region; and a contact plug in each aperture of the first and second rows of in-line apertures; an insulative layer located over the dielectric layer; an etch stop layer located over the insulative layer, the etch stop layer including two in-line rows of apertures aligned over corresponding active-device regions of the plurality of active-device regions, apertures of each set having a second pitch that is about twice the first pitch; an upper dielectric layer over the etch stop layer; concurrently formed laterally extending trenches in the upper dielectric layer that correspond to underlying active-device regions; and contact holes in the insulative layer, each contact hole positioned between a trench of the laterally extending trenches and a contact plug.