A multiphase pulse width modulator configured to produce N mutually phase shifted pulse width modulated signals (PWM_0, PWM_120, PWM_240) having a predetermined cycle time for class D audio amplifiers, comprising: N +1 analog triangular waveform generators (201, 203, 205, 207) configured to produce respective N+1 mutually phase shifted analog triangular waveforms (tri_0, tri_1, tri_2, tri_3) each comprising a rising segment with linearly increasing signal amplitude, a falling segment with linearly decreasing signal amplitude and an idle signal segment with constant signal amplitude such that a combined duration of the rising and falling segments corresponds to the predetermined cycle time and a duration of the idle segment corresponds to the phase shift between two adjacent phases of the N mutually phase shifted pulse width modulated signals (PWM_0, PWM_120, PWM_240), N+1 comparators (211, 213, 215, 217) each comprising a first input operatively coupled to respective ones of the N+1 mutually phase shifted analog triangular waveforms and a second input coupled to an audio signal to generate at least N+1 mutually phase shifted pulse width modulated phase signals (pwm_p0, pwm_p1, pwm_p2, pwm_p3); a crosspoint or matrix switch comprising N+1 input terminals, coupled to respective ones of the N+1 comparator output terminals configured for supplying the respective ones of the N+1 mutually phase shifted pulse width modulated phase signals (pwm_p0, pwm_p1, pwm_p2, pwm_p3), and N output terminals configured for supplying respective ones of the N mutually phase shifted pulse width modulated signals (PWM_0, PWM_120, PWM_240), a crosspoint switch controller configured to: selectively connect each of the N+1 input terminals to each output terminal of the N output terminals for a duration of the predetermined cycle time in a predetermined time sequence to simultaneously generate the N mutually phase shifted pulse width modulated signals (PWM_0, PWM_120, PWM_240) such that each of the signals comprises the same number of interleaved time segments of the N+1 mutually phase shifted pulse width modulated phase signals (pwm_p0, pwm_p1, pwm_p2, pwm_p3); N being a positive integer larger than or equal to 2. N +1 analog triangular waveform generators (201, 203, 205, 207) configured to produce respective N+1 mutually phase shifted analog triangular waveforms (tri_0, tri_1, tri_2, tri_3) each comprising a rising segment with linearly increasing signal amplitude, a falling segment with linearly decreasing signal amplitude and an idle signal segment with constant signal amplitude such that a combined duration of the rising and falling segments corresponds to the predetermined cycle time and a duration of the idle segment corresponds to the phase shift between two adjacent phases of the N mutually phase shifted pulse width modulated signals (PWM_0, PWM_120, PWM_240), N+1 comparators (211, 213, 215, 217) each comprising a first input operatively coupled to respective ones of the N+1 mutually phase shifted analog triangular waveforms and a second input coupled to an audio signal to generate at least N+1 mutually phase shifted pulse width modulated phase signals (pwm_p0, pwm_p1, pwm_p2, pwm_p3); a crosspoint or matrix switch comprising N+1 input terminals, coupled to respective ones of the N+1 comparator output terminals configured for supplying the respective ones of the N+1 mutually phase shifted pulse width modulated phase signals (pwm_p0, pwm_p1, pwm_p2, pwm_p3), and N output terminals configured for supplying respective ones of the N mutually phase shifted pulse width modulated signals (PWM_0, PWM_120, PWM_240), a crosspoint switch controller configured to: selectively connect each of the N+1 input terminals to each output terminal of the N output terminals for a duration of the predetermined cycle time in a predetermined time sequence to simultaneously generate the N mutually phase shifted pulse width modulated signals (PWM_0, PWM_120, PWM_240) such that each of the signals comprises the same number of interleaved time segments of the N+1 mutually phase shifted pulse width modulated phase signals (pwm_p0, pwm_p1, pwm_p2, pwm_p3); N being a positive integer larger than or equal to 2. selectively connect each of the N+1 input terminals to each output terminal of the N output terminals for a duration of the predetermined cycle time in a predetermined time sequence to simultaneously generate the N mutually phase shifted pulse width modulated signals (PWM_0, PWM_120, PWM_240) such that each of the signals comprises the same number of interleaved time segments of the N+1 mutually phase shifted pulse width modulated phase signals (pwm_p0, pwm_p1, pwm_p2, pwm_p3); N being a positive integer larger than or equal to 2.