A semiconductor processing device, comprising: a first chamber portion; and a second chamber portion movable relative to the first chamber portion between an open position and a closed position, wherein when the second chamber portion is in the closed position relative to the first chamber portion, a micro chamber is formed between the first chamber portion and the second chamber, one or more stacked semiconductor wafers can be accommodated in the micro chamber, and when the second chamber portion is in the open position relative to the first chamber portion, the semiconductor wafer can be transferred into or out of the micro chamber, the first chamber portion has an internal surface facing the micro chamber, and the second chamber portion has an internal surface facing the micro chamber, when the second chamber portion is in the closed position relative to the first chamber portion and the semiconductor wafer is housed in the micro chamber, the internal side surface of the first chamber portion at least abuts on an edge portion of a first side surface of the semiconductor wafer close to the first chamber portion, while the internal side surface of the second chamber portion at least abuts on an edge portion of a second side surface of the semiconductor wafer close to the second chamber portion, an outer edge surface micro-processing space located outside the semiconductor wafer is formed between the internal surface of the first chamber portion and the internal surface of the second chamber portion, and the outer edge surface micro-processing space connects with the outside via outer edge surface processing-holes, and fluid flows in or out of the outer edge surface micro-processing space through the outer edge surface processing-holes, said second chamber portion comprises a recess formed on said internal surface of said second chamber portion facing said micro chamber, characterized in that, when said second chamber portion is in said closed position relative to said first chamber portion and said semiconductor wafer is housed in said micro chamber, said second side surface of said semiconductor wafer covers a top of said recess to form an internal micro-processing space located inside said outer edge micro-processing space, said semiconductor wafer serving as a barrier helping to close said outer edge micro-processing space. a first chamber portion; and a second chamber portion movable relative to the first chamber portion between an open position and a closed position, wherein when the second chamber portion is in the closed position relative to the first chamber portion, a micro chamber is formed between the first chamber portion and the second chamber, one or more stacked semiconductor wafers can be accommodated in the micro chamber, and when the second chamber portion is in the open position relative to the first chamber portion, the semiconductor wafer can be transferred into or out of the micro chamber, the first chamber portion has an internal surface facing the micro chamber, and the second chamber portion has an internal surface facing the micro chamber, when the second chamber portion is in the closed position relative to the first chamber portion and the semiconductor wafer is housed in the micro chamber, the internal side surface of the first chamber portion at least abuts on an edge portion of a first side surface of the semiconductor wafer close to the first chamber portion, while the internal side surface of the second chamber portion at least abuts on an edge portion of a second side surface of the semiconductor wafer close to the second chamber portion, an outer edge surface micro-processing space located outside the semiconductor wafer is formed between the internal surface of the first chamber portion and the internal surface of the second chamber portion, and the outer edge surface micro-processing space connects with the outside via outer edge surface processing-holes, and fluid flows in or out of the outer edge surface micro-processing space through the outer edge surface processing-holes, said second chamber portion comprises a recess formed on said internal surface of said second chamber portion facing said micro chamber, characterized in that, when said second chamber portion is in said closed position relative to said first chamber portion and said semiconductor wafer is housed in said micro chamber, said second side surface of said semiconductor wafer covers a top of said recess to form an internal micro-processing space located inside said outer edge micro-processing space, said semiconductor wafer serving as a barrier helping to close said outer edge micro-processing space.