An image sensor comprising: a plurality of pixels arranged as a pixel array having M columns, said M columns grouped into N blocks, each of said N blocks having M/N columns; a first group of column readout circuits having M/N column readout circuits for reading out pixel signals from said pixels; a second group of column readout circuits having M/N column readout circuits for reading out pixel signals from said pixels; and a multiplexer bus system having M selection switches for selectively switching pixel signals from one of said N blocks as input into said first group of column readout circuits and another one of said N blocks as input into said second group of column readout circuits and for repeating the selective switching of pixel signals into either the first or second group for each remaining block until all N blocks have been processed by either said first or second group, wherein said first group of column readout circuits and said second group of column readout circuits work alternately such that when said first group of column readout circuits is storing a reset signal and a photo signal from pixels of one of said N blocks, said second group of column readout circuits is transferring out processed signals from pixels of another one of said N blocks; wherein each readout circuit in both the first and second groups includes two capacitors (117a, 117b) for storing said reset signal and said photo signal from said pixel respectively, and two switches (119a, 119b) for reading out signals from the capacitors (117a, 117b); wherein N is greater than 2 such that the total number of column readout circuits is less than the number of columns M. a plurality of pixels arranged as a pixel array having M columns, said M columns grouped into N blocks, each of said N blocks having M/N columns; a first group of column readout circuits having M/N column readout circuits for reading out pixel signals from said pixels; a second group of column readout circuits having M/N column readout circuits for reading out pixel signals from said pixels; and a multiplexer bus system having M selection switches for selectively switching pixel signals from one of said N blocks as input into said first group of column readout circuits and another one of said N blocks as input into said second group of column readout circuits and for repeating the selective switching of pixel signals into either the first or second group for each remaining block until all N blocks have been processed by either said first or second group, wherein said first group of column readout circuits and said second group of column readout circuits work alternately such that when said first group of column readout circuits is storing a reset signal and a photo signal from pixels of one of said N blocks, said second group of column readout circuits is transferring out processed signals from pixels of another one of said N blocks; wherein each readout circuit in both the first and second groups includes two capacitors (117a, 117b) for storing said reset signal and said photo signal from said pixel respectively, and two switches (119a, 119b) for reading out signals from the capacitors (117a, 117b); wherein N is greater than 2 such that the total number of column readout circuits is less than the number of columns M.