A vector modulator, characterized by, comprising: a quadrature component generator, configured to generate an input in-phase signal (I i) and an input quadrature signal (Q i) derived from an input radio frequency signal (RF in); a switching circuit (14, 24), receiving a plurality of bits (B 1,...,B N), comprising a plurality of switches controlled by the plurality of bits, configured to generate an output in-phase signal (I o) and an output quadrature signal (Q o) according to the plurality of bits (B 1,...,B N), where the output in-phase signal (I o) and the output quadrature signal (Q o) are derived from the input in-phase signal (I i) and the input quadrature signal (O i), respectively; and a combining module, configured to generate an output RF signal (RF out) combining the output in-phase signal (I o) and the output quadrature signal (Q o); wherein the switching circuit comprises: a switching input terminal (N Iin+), coupled to the quadrature component generator; a switching output terminal (N Iout+), coupled to the combining module; a plurality of conducting switches (S I1+, S I0+), coupled between the switching input terminal and the switching output terminal, controlled by a plurality of conducting bits within the plurality of bits, wherein a plurality of first ends of the plurality of conducting switches (S It+, S I0+) are electrically and directly connected to the switching input terminal (N Iin+), and a plurality of second ends of the plurality of conducting switches (S I1+, S I0+) are electrically and directly connected to the switching output terminal (N Iout+); and a plurality of diverting switches (S I1+ ', S I0+ '), coupled to the switching input terminal and receiving a voltage, controlled by a plurality of diverting bits within the plurality of bits, wherein the plurality of diverting bits are complements of the plurality of conducting bits, a plurality of first ends of the plurality of diverting switches (S I1+ ', S I0+ ') are electrically and directly connected to the switching input terminal (N lin+), and a plurality of second ends of the plurality of diverting switches (S I1+ ', S I0+ ') receive the voltage. a quadrature component generator, configured to generate an input in-phase signal (I i) and an input quadrature signal (Q i) derived from an input radio frequency signal (RF in); a switching circuit (14, 24), receiving a plurality of bits (B 1,...,B N), comprising a plurality of switches controlled by the plurality of bits, configured to generate an output in-phase signal (I o) and an output quadrature signal (Q o) according to the plurality of bits (B 1,...,B N), where the output in-phase signal (I o) and the output quadrature signal (Q o) are derived from the input in-phase signal (I i) and the input quadrature signal (O i), respectively; and a combining module, configured to generate an output RF signal (RF out) combining the output in-phase signal (I o) and the output quadrature signal (Q o); wherein the switching circuit comprises: a switching input terminal (N Iin+), coupled to the quadrature component generator; a switching output terminal (N Iout+), coupled to the combining module; a plurality of conducting switches (S I1+, S I0+), coupled between the switching input terminal and the switching output terminal, controlled by a plurality of conducting bits within the plurality of bits, wherein a plurality of first ends of the plurality of conducting switches (S It+, S I0+) are electrically and directly connected to the switching input terminal (N Iin+), and a plurality of second ends of the plurality of conducting switches (S I1+, S I0+) are electrically and directly connected to the switching output terminal (N Iout+); and a plurality of diverting switches (S I1+ ', S I0+ '), coupled to the switching input terminal and receiving a voltage, controlled by a plurality of diverting bits within the plurality of bits, wherein the plurality of diverting bits are complements of the plurality of conducting bits, a plurality of first ends of the plurality of diverting switches (S I1+ ', S I0+ ') are electrically and directly connected to the switching input terminal (N lin+), and a plurality of second ends of the plurality of diverting switches (S I1+ ', S I0+ ') receive the voltage. a switching input terminal (N Iin+), coupled to the quadrature component generator; a switching output terminal (N Iout+), coupled to the combining module; a plurality of conducting switches (S I1+, S I0+), coupled between the switching input terminal and the switching output terminal, controlled by a plurality of conducting bits within the plurality of bits, wherein a plurality of first ends of the plurality of conducting switches (S It+, S I0+) are electrically and directly connected to the switching input terminal (N Iin+), and a plurality of second ends of the plurality of conducting switches (S I1+, S I0+) are electrically and directly connected to the switching output terminal (N Iout+); and a plurality of diverting switches (S I1+ ', S I0+ '), coupled to the switching input terminal and receiving a voltage, controlled by a plurality of diverting bits within the plurality of bits, wherein the plurality of diverting bits are complements of the plurality of conducting bits, a plurality of first ends of the plurality of diverting switches (S I1+ ', S I0+ ') are electrically and directly connected to the switching input terminal (N lin+), and a plurality of second ends of the plurality of diverting switches (S I1+ ', S I0+ ') receive the voltage.