A method of fabricating a semiconductor device (100, 200), the method comprising: forming a three-dimensional germanium-containing semiconductor structure (106, 206) on a silicon pedestal (120, 220) disposed above a semiconductor substrate (102, 202), the silicon pedestal comprising a semiconductor material different from the three-dimensional germanium-containing semiconductor structure; insulating the three-dimensional germanium-containing semiconductor structure from the semiconductor substrate, while forming a silicon release layer (105, 205A); and, subsequently, removing the silicon release layer (105, 205A); to provide an entirely exposed portion (132, 232) of the germanium-containing semiconductor structure above the isolation pedestal (122, 222); forming a gate electrode stack (140, 142, 240, 242) completely surrounding a channel region (132, 232) of the three-dimensional germanium-containing semiconductor structure; forming a pair of conducting contacts, one contact at least partially surrounding a source region (160, 260) of the three-dimensional germanium-containing semiconductor structure, and the other contact at least partially surrounding a drain region (160, 260) of the three-dimensional germanium-containing semiconductor structure, characterized in that insulating the three-dimensional germanium-containing semiconductor structure from the semiconductor substrate comprises oxidizing said silicon pedestal (120, 220) to form one or more isolation pedestals (122, 222), wherein the oxidation of the upper portion of the silicon pedestal is incomplete, thus leaving said silicon release layer (105, 205A). forming a three-dimensional germanium-containing semiconductor structure (106, 206) on a silicon pedestal (120, 220) disposed above a semiconductor substrate (102, 202), the silicon pedestal comprising a semiconductor material different from the three-dimensional germanium-containing semiconductor structure; insulating the three-dimensional germanium-containing semiconductor structure from the semiconductor substrate, while forming a silicon release layer (105, 205A); and, subsequently, removing the silicon release layer (105, 205A); to provide an entirely exposed portion (132, 232) of the germanium-containing semiconductor structure above the isolation pedestal (122, 222); forming a gate electrode stack (140, 142, 240, 242) completely surrounding a channel region (132, 232) of the three-dimensional germanium-containing semiconductor structure; forming a pair of conducting contacts, one contact at least partially surrounding a source region (160, 260) of the three-dimensional germanium-containing semiconductor structure, and the other contact at least partially surrounding a drain region (160, 260) of the three-dimensional germanium-containing semiconductor structure, characterized in that insulating the three-dimensional germanium-containing semiconductor structure from the semiconductor substrate comprises oxidizing said silicon pedestal (120, 220) to form one or more isolation pedestals (122, 222), wherein the oxidation of the upper portion of the silicon pedestal is incomplete, thus leaving said silicon release layer (105, 205A).