A system comprising a DC-DC voltage converter and a diagnostic system thereof, the DC-DC voltage converter having a high voltage switch, a low voltage switch, a boost mode IC, a buck mode IC and a DC-DC voltage converter control circuit; the DC-DC voltage converter control circuit having a high side FET IC and a low side FET IC, wherein the high side FET IC has a plurality of FET switches therein, wherein the low side FET IC has a plurality of FET switches therein, wherein the high voltage switch is electrically coupled between and to first and second electrical nodes, wherein the low voltage switch is electrically coupled between and to third and fourth electrical nodes and the DC-DC voltage converter control circuit: is electrically coupled between and to the second and third electrical nodes; the diagnostic system includes a first tri-state buffer IC having first, second, third and fourth pins, a second tri-state buffer IC having first, second, third and fourth pins, and a microcontroller being electrically coupled to the first and second tri-state buffer ICs; wherein the first tri-state buffer IC is adapted to receive a first shutdown indicator voltage at the first pin thereof from the DC-DC voltage converter control circuit indicating that the plurality of FET switches in the high side FET IC and the plurality of FET switches in the low side FET IC have been transitioned to an open operational state; wherein the first tri-state buffer IC is adapted to output a second shutdown indicator voltage at a second pin thereof in response to receiving the first shutdown indicator voltage, the second shutdown indicator voltage being received by the microcontroller and indicating that the plurality of FET switches in the low side FET IC and the high side FET IC have been transitioned to the open operational state; wherein the second tri-state buffer IC is adapted to receive a third shutdown indicator voltage at a first pin thereof from the DC-DC voltage converter control circuit indicating that the plurality of FET switches in the low side FET IC and the high side FET IC have been transitioned to the open operational state; wherein the second tri-state buffer IC is adapted to output a fourth shutdown indicator voltage at a second pin thereof in response to receiving the third shutdown indicator voltage, the fourth shutdown indicator voltage being received by the microcontroller and indicating that the plurality of FET switches in the low side FET IC and the high side FET IC have been transitioned to the open operational state; wherein the microcontroller is adapted to store a shutdown indicator flag in a memory device indicating that the plurality of FET switches in the low side FET IC and the high side FET IC have been transitioned to the open operational state, in response to receiving at least one of the second and fourth shutdown indicator voltages; wherein the microcontroller is adapted to generate then a first control voltage that is received at the third pin of the first tri-state buffer IC for commanding the low voltage switch to be transitioned to an open operational state; wherein the first tri-state buffer IC is adapted to output a second control voltage at a fourth pin thereof in response to receiving the first control voltage, the second control voltage inducing the low voltage switch to transition to the open operational state; wherein the microcontroller is adapted to generate then a third control voltage that is received at a third pin of the second tri-state buffer IC for commanding the high voltage switch to be transitioned to the open operational state; and wherein the second tri-state buffer IC is adapted to output a fourth control voltage at a fourth pin thereof in response to receiving the third control voltage, the fourth control voltage inducing the high voltage switch to transition to the open operational state.