A semiconductor device package comprising: a semiconductor device including a substrate composed of a semiconductor material and a plurality of metallic connection pads formed on the substrate, the plurality of metallic connection pads being formed on each of first and second opposing surfaces (18, 20) of the substrate with edges of the semiconductor device extending between the first and second surfaces (18, 20); a first passivation layer applied on the semiconductor device, the first passivation layer being applied so as to cover the semiconductor device including the plurality of metallic connection pads formed on the substrate, wherein the first passivation layer comprises one of silicon nitride and silicon oxide; a base dielectric laminate sheet affixed to the first surface of the semiconductor device by means of an adhesive layer, the base dielectric laminate sheet having a thickness greater than that of the first passivation layer; a second passivation layer applied over the first passivation layer and the semiconductor device and having a thickness greater than that of the first passivation layer, said thickness being up to 1 to 2mm, with the second passivation layer covering the second surface and the edges of the semiconductor device; and a plurality of metal interconnects electrically coupled to the plurality of metallic connection pads of the semiconductor device, the plurality of metal interconnects extending through respective vias formed through the first and second passivation layers (22, 30), and through the base dielectric laminate sheet, to form direct metallic connections, on each of the first and second surfaces (18, 20), with respective ones of the plurality of metallic connection pads. a semiconductor device including a substrate composed of a semiconductor material and a plurality of metallic connection pads formed on the substrate, the plurality of metallic connection pads being formed on each of first and second opposing surfaces (18, 20) of the substrate with edges of the semiconductor device extending between the first and second surfaces (18, 20); a first passivation layer applied on the semiconductor device, the first passivation layer being applied so as to cover the semiconductor device including the plurality of metallic connection pads formed on the substrate, wherein the first passivation layer comprises one of silicon nitride and silicon oxide; a base dielectric laminate sheet affixed to the first surface of the semiconductor device by means of an adhesive layer, the base dielectric laminate sheet having a thickness greater than that of the first passivation layer; a second passivation layer applied over the first passivation layer and the semiconductor device and having a thickness greater than that of the first passivation layer, said thickness being up to 1 to 2mm, with the second passivation layer covering the second surface and the edges of the semiconductor device; and a plurality of metal interconnects electrically coupled to the plurality of metallic connection pads of the semiconductor device, the plurality of metal interconnects extending through respective vias formed through the first and second passivation layers (22, 30), and through the base dielectric laminate sheet, to form direct metallic connections, on each of the first and second surfaces (18, 20), with respective ones of the plurality of metallic connection pads.