Reconfigurable capacitor comprising an integration device, four switches S1 to S4 and a control unit connected to said switches, the integration device comprising: - a semiconductor integration substrate with a first substrate side and an opposite second substrate side; - a through-substrate via extending from the first substrate side to the second substrate side; - a trench capacitor in the semiconductor integration substrate, comprised of a well surrounding a trench and five electrically conductive capacitor-electrode layers (402, 404, 406, 408, 410) of a trench filling, in an alternating arrangement with dielectric layers such that the different capacitor-electrode layers are electrically isolated from each other, forming six capacitor electrodes; and - four capacitor terminals T1 to T4 provided on the first or second substrate side, the six capacitor electrodes forming four capacitors C1 to C4 and one dummy capacitor Cd in the following way within the trench: - the first capacitor-electrode layer forms the top electrode of capacitor C1, - the second capacitor-electrode layer forms the bottom electrode of capacitor C1 and the top electrode of capacitor C2, - the third capacitor-electrode layer forms the bottom electrode of capacitor C2 and the top electrode of the dummy capacitor Cd, - the fourth capacitor-electrode layer forms the bottom electrode of the dummy capacitor Cd and the top electrode of capacitor C3, - the fifth capacitor-electrode layer forms the bottom electrode of capacitor C3 and the top electrode of capacitor C4, and - the well forms the bottom electrode of capacitor C4, and the switch S1 is interconnected between the terminal T1 which is connected with the first capacitor-electrode layer, and the third capacitor-electrode layer, the switch S2 is interconnected between the third capacitor-electrode layer and the fourth capacitor-electrode layer, the switch S3 is interconnected between the fourth capacitor-electrode layer and a terminal T3 connected with the capacitor electrode formed by the well, the switch S4 is interconnected between the second capacitor-electrode layer and the fifth capacitor-electrode layer, and the terminal T2 is interconnected between the switch S4 and the fifth capacitor-electrode layer, the control unit is configured to generate and to provide to the switches S1 to S4 respective control signals for forming a respective one of a plurality of possible multi-capacitor configurations, including the following configurations in which the dummy capacity Cd is not used: - switch S2 is closed and switches S1, S3, S4 are open; - switches S1 to S4 are closed; - switches S2, S3 are closed and switches S1, S4 are open; and - switches S2, S3, S4 are closed and switch S1 is open; and the trench capacitor and the through-substrate via are formed in respective trench and via openings in the semiconductor integration substrate, which have an equal lateral extension (w) exceeding 10 micrometers. - a semiconductor integration substrate with a first substrate side and an opposite second substrate side; - a through-substrate via extending from the first substrate side to the second substrate side; - a trench capacitor in the semiconductor integration substrate, comprised of a well surrounding a trench and five electrically conductive capacitor-electrode layers (402, 404, 406, 408, 410) of a trench filling, in an alternating arrangement with dielectric layers such that the different capacitor-electrode layers are electrically isolated from each other, forming six capacitor electrodes; and - four capacitor terminals T1 to T4 provided on the first or second substrate side, - the first capacitor-electrode layer forms the top electrode of capacitor C1, - the second capacitor-electrode layer forms the bottom electrode of capacitor C1 and the top electrode of capacitor C2, - the third capacitor-electrode layer forms the bottom electrode of capacitor C2 and the top electrode of the dummy capacitor Cd, - the fourth capacitor-electrode layer forms the bottom electrode of the dummy capacitor Cd and the top electrode of capacitor C3, - the fifth capacitor-electrode layer forms the bottom electrode of capacitor C3 and the top electrode of capacitor C4, and - the well forms the bottom electrode of capacitor C4, - switch S2 is closed and switches S1, S3, S4 are open; - switches S1 to S4 are closed; - switches S2, S3 are closed and switches S1, S4 are open; and - switches S2, S3, S4 are closed and switch S1 is open;