A half-bridge module, comprising: a substrate with a base metallization layer divided into a first DC conducting area, a second DC conducting area and an AC conducting area; at least one first power semiconductor switch chip bonded to the first DC conducting area and electrically interconnected with the AC conducting area; at least one second power semiconductor switch chip bonded to the AC conducting area and electrically interconnected with the second DC conducting area; a coaxial terminal arrangement comprising at least one inner DC terminal, at least one first outer DC terminal and at least one second outer DC terminal; wherein the at least one inner DC terminal, the at least first outer DC terminal and the at least one second outer DC terminal protrude from the module and are arranged in a row, such that the at least one inner DC terminal is coaxially arranged between the at least one first outer DC terminal and the at least one second outer DC terminal; wherein the at least one inner DC terminal is electrically connected to the second DC conducting area; wherein the at least one first outer DC terminal and the at least one second outer DC terminal are electrically connected to the first DC conducting area; wherein the at least one first outer DC terminal and the at least one second outer DC terminal are electrically interconnected with an electrically conducting bridging element which is adapted for distributing at least a half of the load current between the at least one first outer DC terminal and the at least one second outer DC terminal wherein an insulating substrate with an elevated metallization layer is attached to the base metallization layer; wherein the bridging element is provided by the part of the first DC conducting area which includes the area located below the elevated metallization layer and which runs between the bonding area of the at least one first outer DC terminal and the bonding area of the at least one second outer DC terminal; wherein the at least one inner DC terminal is bonded to the elevated metallization layer. a substrate with a base metallization layer divided into a first DC conducting area, a second DC conducting area and an AC conducting area; at least one first power semiconductor switch chip bonded to the first DC conducting area and electrically interconnected with the AC conducting area; at least one second power semiconductor switch chip bonded to the AC conducting area and electrically interconnected with the second DC conducting area; a coaxial terminal arrangement comprising at least one inner DC terminal, at least one first outer DC terminal and at least one second outer DC terminal; wherein the at least one inner DC terminal, the at least first outer DC terminal and the at least one second outer DC terminal protrude from the module and are arranged in a row, such that the at least one inner DC terminal is coaxially arranged between the at least one first outer DC terminal and the at least one second outer DC terminal; wherein the at least one inner DC terminal is electrically connected to the second DC conducting area; wherein the at least one first outer DC terminal and the at least one second outer DC terminal are electrically connected to the first DC conducting area; wherein the at least one first outer DC terminal and the at least one second outer DC terminal are electrically interconnected with an electrically conducting bridging element which is adapted for distributing at least a half of the load current between the at least one first outer DC terminal and the at least one second outer DC terminal wherein an insulating substrate with an elevated metallization layer is attached to the base metallization layer; wherein the bridging element is provided by the part of the first DC conducting area which includes the area located below the elevated metallization layer and which runs between the bonding area of the at least one first outer DC terminal and the bonding area of the at least one second outer DC terminal; wherein the at least one inner DC terminal is bonded to the elevated metallization layer.