Transmitter comprising: - a serializer comprising a plurality of inputs configured for receiving incoming data signals comprising successive data packets corresponding to a plurality of channels, the serializer being configured for serializing the said incoming data signals in an output signal, wherein the transmitter also comprises: - a first oscillator configured for providing a first clock signal associated to a first frequency to the serializer, - a second oscillator configured for providing a second clock signal associated to a second frequency different from the first frequency to the serializer, - a first fast switching device having a first input linked to the first oscillator, a second input linked to the second oscillator and an output linked to the serializer, the first fast switching device being configured for switching between a first switching state wherein the first input is linked to the output and a second switching state wherein the second input is linked to the output, - a buffer configured for buffering the plurality of incoming data signals, characterized in that the transmitter is configured, upon receipt of a clock signal change signal, for switching the first fast switching device from the first to the second switching state during an interpacket gap in the incoming data packets. - a serializer comprising a plurality of inputs configured for receiving incoming data signals comprising successive data packets corresponding to a plurality of channels, the serializer being configured for serializing the said incoming data signals in an output signal, wherein the transmitter also comprises: - a first oscillator configured for providing a first clock signal associated to a first frequency to the serializer, - a second oscillator configured for providing a second clock signal associated to a second frequency different from the first frequency to the serializer, - a first fast switching device having a first input linked to the first oscillator, a second input linked to the second oscillator and an output linked to the serializer, the first fast switching device being configured for switching between a first switching state wherein the first input is linked to the output and a second switching state wherein the second input is linked to the output, - a buffer configured for buffering the plurality of incoming data signals, characterized in that the transmitter is configured, upon receipt of a clock signal change signal, for switching the first fast switching device from the first to the second switching state during an interpacket gap in the incoming data packets. - a first oscillator configured for providing a first clock signal associated to a first frequency to the serializer, - a second oscillator configured for providing a second clock signal associated to a second frequency different from the first frequency to the serializer, - a first fast switching device having a first input linked to the first oscillator, a second input linked to the second oscillator and an output linked to the serializer, the first fast switching device being configured for switching between a first switching state wherein the first input is linked to the output and a second switching state wherein the second input is linked to the output, - a buffer configured for buffering the plurality of incoming data signals, characterized in that the transmitter is configured, upon receipt of a clock signal change signal, for switching the first fast switching device from the first to the second switching state during an interpacket gap in the incoming data packets.