A communications apparatus configured for use as a sending apparatus to perform communication with a receiving apparatus, comprising: a modulation module, configured to modulate a to-be-sent signal to obtain a modulated signal; and an encoding module, configured to receive the modulated signal at an input of the encoding module and provide an encoded signal at an output of the encoding module, characterized in that the encoding module comprises N operation modules that are sequentially connected and N delay units that are sequentially connected, wherein: an input of the i th operation module in the N operation modules is connected to an output of the (i-1) th operation module; an input of the 1 st operation module in the N operation modules is connected to the input of the encoding module and an output of the N th operation module is connected to the output of the encoding module; an input of the i th delay module in the N delay modules is connected to an output of the (i-1) 1h delay module; an input of the 1 st delay module is connected to an output of the N th operation module; an output of a 1 st delay module is connected to the 1 st operation module, and an output of the i th delay module is connected to i th operation module; wherein N is a positive integer greater than 1, and i is an integer greater than 1 and less than or equal to N; wherein each of the N operation modules comprises a first arithmetic logic unit and a modulo calculator that are sequentially connected, an input of the first arithmetic logic unit is an input of the operation module, and an output of the modulo calculator is an output of the operation module; or each of the N operation modules comprises an exclusive OR arithmetic logic unit. a modulation module, configured to modulate a to-be-sent signal to obtain a modulated signal; and an encoding module, configured to receive the modulated signal at an input of the encoding module and provide an encoded signal at an output of the encoding module, characterized in that the encoding module comprises N operation modules that are sequentially connected and N delay units that are sequentially connected, wherein: an input of the i th operation module in the N operation modules is connected to an output of the (i-1) th operation module; an input of the 1 st operation module in the N operation modules is connected to the input of the encoding module and an output of the N th operation module is connected to the output of the encoding module; an input of the i th delay module in the N delay modules is connected to an output of the (i-1) 1h delay module; an input of the 1 st delay module is connected to an output of the N th operation module; an output of a 1 st delay module is connected to the 1 st operation module, and an output of the i th delay module is connected to i th operation module; wherein N is a positive integer greater than 1, and i is an integer greater than 1 and less than or equal to N; wherein each of the N operation modules comprises a first arithmetic logic unit and a modulo calculator that are sequentially connected, an input of the first arithmetic logic unit is an input of the operation module, and an output of the modulo calculator is an output of the operation module; or each of the N operation modules comprises an exclusive OR arithmetic logic unit. an input of the i th operation module in the N operation modules is connected to an output of the (i-1) th operation module; an input of the 1 st operation module in the N operation modules is connected to the input of the encoding module and an output of the N th operation module is connected to the output of the encoding module; an input of the i th delay module in the N delay modules is connected to an output of the (i-1) 1h delay module; an input of the 1 st delay module is connected to an output of the N th operation module; an output of a 1 st delay module is connected to the 1 st operation module, and an output of the i th delay module is connected to i th operation module; wherein N is a positive integer greater than 1, and i is an integer greater than 1 and less than or equal to N; wherein each of the N operation modules comprises a first arithmetic logic unit and a modulo calculator that are sequentially connected, an input of the first arithmetic logic unit is an input of the operation module, and an output of the modulo calculator is an output of the operation module; or each of the N operation modules comprises an exclusive OR arithmetic logic unit.