An apparatus for performing logical operations, comprising: an array (130; 330) of memory cells; and sensing circuitry (150; 350; 650-1; 750-2; 850-3; 1350-4) coupled to the array of memory cells via a pair of complementary sense lines (205-1, 205-2; 305-1, 305-2), and a controller configured to control the sensing circuitry to perform a selected logical function between a data value stored in a first memory cell and a data value stored in a second memory cell, characterized in that the sensing circuitry (150; 350; 650-1; 750-2; 850-3; 1350-4) includes: a sense amplifier (206; 306; 606; 706; 806; 1306; 1406; 1506; 1606) coupled to the first and second memory cells via the pair of complementary sense lines; and equilibrate circuitry (214; 1414) coupled to the sense amplifier, wherein the controller is further configured to control the equilibrate circuitry (214; 1414) to, subsequently to the first memory cell being read: precharge the pair of complementary sense lines to an equilibrate voltage prior to reading the second memory cell in response to the selected logical function being a first logical function; and not precharge the pair of complementary sense lines to the equilibrate voltage prior to reading the second memory cell in response to the logical function being a second logical function different from the first logical function. an array (130; 330) of memory cells; and sensing circuitry (150; 350; 650-1; 750-2; 850-3; 1350-4) coupled to the array of memory cells via a pair of complementary sense lines (205-1, 205-2; 305-1, 305-2), and a controller configured to control the sensing circuitry to perform a selected logical function between a data value stored in a first memory cell and a data value stored in a second memory cell, characterized in that the sensing circuitry (150; 350; 650-1; 750-2; 850-3; 1350-4) includes: a sense amplifier (206; 306; 606; 706; 806; 1306; 1406; 1506; 1606) coupled to the first and second memory cells via the pair of complementary sense lines; and equilibrate circuitry (214; 1414) coupled to the sense amplifier, wherein the controller is further configured to control the equilibrate circuitry (214; 1414) to, subsequently to the first memory cell being read: precharge the pair of complementary sense lines to an equilibrate voltage prior to reading the second memory cell in response to the selected logical function being a first logical function; and not precharge the pair of complementary sense lines to the equilibrate voltage prior to reading the second memory cell in response to the logical function being a second logical function different from the first logical function. a sense amplifier (206; 306; 606; 706; 806; 1306; 1406; 1506; 1606) coupled to the first and second memory cells via the pair of complementary sense lines; and equilibrate circuitry (214; 1414) coupled to the sense amplifier, wherein the controller is further configured to control the equilibrate circuitry (214; 1414) to, subsequently to the first memory cell being read: precharge the pair of complementary sense lines to an equilibrate voltage prior to reading the second memory cell in response to the selected logical function being a first logical function; and not precharge the pair of complementary sense lines to the equilibrate voltage prior to reading the second memory cell in response to the logical function being a second logical function different from the first logical function. precharge the pair of complementary sense lines to an equilibrate voltage prior to reading the second memory cell in response to the selected logical function being a first logical function; and not precharge the pair of complementary sense lines to the equilibrate voltage prior to reading the second memory cell in response to the logical function being a second logical function different from the first logical function.