A method comprising: storing data in a packed data register of a set of packed data registers; receiving a packed data operation mask comparison instruction, the packed data operation mask comparison instruction indicating a first packed data operation mask register storing a first packed data operation mask having a first plurality of packed data operation mask bits and indicating a second packed data operation mask register storing a second packed data operation mask having a second plurality of packed data operation mask bits, each packed data operation mask bit of the first packed data operation mask corresponding to a packed data operation mask bit of the second packed data operation mask in a corresponding position, each packed data operation mask bit of the first packed data operation mask operative to predicate performance of a packed data operation on a different corresponding data element of a source packed data, the packed data operation mask comparison instruction accessing only the least significant bits of the first packed data operation mask register and the second packed data operation mask register, wherein the number of least significant bits accessed is based on the width of the source packed data and the width of the data elements of the source packed data; modifying a first flag to a first value if a bitwise AND of each packed data operation mask bit of the first packed data operation mask with each corresponding packed data operation mask bit of the second packed data operation mask is zero, or otherwise modifying the first flag to a second value; and modifying a second flag to a third value if a bitwise AND of each packed data operation mask bit of the first packed data operation mask with a bitwise NOT of each corresponding packed data operation mask bit of the second packed data operation mask is zero, or otherwise modifying the second flag to a fourth value. storing data in a packed data register of a set of packed data registers; receiving a packed data operation mask comparison instruction, the packed data operation mask comparison instruction indicating a first packed data operation mask register storing a first packed data operation mask having a first plurality of packed data operation mask bits and indicating a second packed data operation mask register storing a second packed data operation mask having a second plurality of packed data operation mask bits, each packed data operation mask bit of the first packed data operation mask corresponding to a packed data operation mask bit of the second packed data operation mask in a corresponding position, each packed data operation mask bit of the first packed data operation mask operative to predicate performance of a packed data operation on a different corresponding data element of a source packed data, the packed data operation mask comparison instruction accessing only the least significant bits of the first packed data operation mask register and the second packed data operation mask register, wherein the number of least significant bits accessed is based on the width of the source packed data and the width of the data elements of the source packed data; modifying a first flag to a first value if a bitwise AND of each packed data operation mask bit of the first packed data operation mask with each corresponding packed data operation mask bit of the second packed data operation mask is zero, or otherwise modifying the first flag to a second value; and modifying a second flag to a third value if a bitwise AND of each packed data operation mask bit of the first packed data operation mask with a bitwise NOT of each corresponding packed data operation mask bit of the second packed data operation mask is zero, or otherwise modifying the second flag to a fourth value.