Method for measuring a degradation of a thermal resistance R Th between a power semiconductor in a power module assembly and a heat sink of said power module assembly where said power semiconductor has an internal gate resistance, comprising: - measuring a first initial parameter, K0, related to the power semiconductor junction temperature at a stable operating temperature, - heating the internal gate resistance through applying an AC voltage V AC (11, 110, 120) of an AC source with a frequency f1 on the gate/source junction of said power semiconductor, and measuring a second initial parameter, K1, related to the junction temperature after said heating, - saving the first and second initial parameters K0 and K1 in a memory, comprising after at least one discrete time interval d ∈ {d1,..., dn} during the lifetime of the power module assembly a subsequent process of: - measuring a first subsequent parameter, K0 d ∈ {K0 d1,..., K0 dn}, related to the power semiconductor junction temperature at a stable operating temperature T0d ∈ {T0 d1,... T0 dn} (101d1,..., 101dn), - heating the internal gate resistance through applying the AC voltage V AC with a frequency f1 on the gate/source junction of said power semiconductor, and measuring a second subsequent parameter, K1 d ∈ {K1 d1,..., K1 dn} related to the junction temperature T1 d ∈ {T1 d1,... T1 dn} (102d1,..., 102dn) after said heating, - calculating a thermal resistance degradation, ΔR Th with the subsequent parameters related to junction temperature K0 d ∈ {K0 d1,..., K0 dn}, and K1 d ∈ {K1 d1,..., K1 dn}, and the initial parameters K0 and K1 as read from the memory, where Δ R Th = R Th d R Th where R Th = K 1 0 − K 0 0 P R, where R Th d = K 1 d − K 0 d P R where d=d1,..., dn and where P R is the power dissipated by the internal gate resistance under said AC voltage V AC, - comparing ΔR Th with a limit value ΔR Th max and, - raising a fault flag in case ΔR Th is above said limit value or repeating said subsequent process in case ΔR Th remains under said limit value. - measuring a first initial parameter, K0, related to the power semiconductor junction temperature at a stable operating temperature, - heating the internal gate resistance through applying an AC voltage V AC (11, 110, 120) of an AC source with a frequency f1 on the gate/source junction of said power semiconductor, and measuring a second initial parameter, K1, related to the junction temperature after said heating, - saving the first and second initial parameters K0 and K1 in a memory, comprising after at least one discrete time interval d ∈ {d1,..., dn} during the lifetime of the power module assembly a subsequent process of: - measuring a first subsequent parameter, K0 d ∈ {K0 d1,..., K0 dn}, related to the power semiconductor junction temperature at a stable operating temperature T0d ∈ {T0 d1,... T0 dn} (101d1,..., 101dn), - heating the internal gate resistance through applying the AC voltage V AC with a frequency f1 on the gate/source junction of said power semiconductor, and measuring a second subsequent parameter, K1 d ∈ {K1 d1,..., K1 dn} related to the junction temperature T1 d ∈ {T1 d1,... T1 dn} (102d1,..., 102dn) after said heating, - calculating a thermal resistance degradation, ΔR Th with the subsequent parameters related to junction temperature K0 d ∈ {K0 d1,..., K0 dn}, and K1 d ∈ {K1 d1,..., K1 dn}, and the initial parameters K0 and K1 as read from the memory, where Δ R Th = R Th d R Th where R Th = K 1 0 − K 0 0 P R, where R Th d = K 1 d − K 0 d P R where d=d1,..., dn and where P R is the power dissipated by the internal gate resistance under said AC voltage V AC, - comparing ΔR Th with a limit value ΔR Th max and, - raising a fault flag in case ΔR Th is above said limit value or repeating said subsequent process in case ΔR Th remains under said limit value. - measuring a first subsequent parameter, K0 d ∈ {K0 d1,..., K0 dn}, related to the power semiconductor junction temperature at a stable operating temperature T0d ∈ {T0 d1,... T0 dn} (101d1,..., 101dn), - heating the internal gate resistance through applying the AC voltage V AC with a frequency f1 on the gate/source junction of said power semiconductor, and measuring a second subsequent parameter, K1 d ∈ {K1 d1,..., K1 dn} related to the junction temperature T1 d ∈ {T1 d1,... T1 dn} (102d1,..., 102dn) after said heating, - calculating a thermal resistance degradation, ΔR Th with the subsequent parameters related to junction temperature K0 d ∈ {K0 d1,..., K0 dn}, and K1 d ∈ {K1 d1,..., K1 dn}, and the initial parameters K0 and K1 as read from the memory, where Δ R Th = R Th d R Th where R Th = K 1 0 − K 0 0 P R, where R Th d = K 1 d − K 0 d P R where d=d1,..., dn and where P R is the power dissipated by the internal gate resistance under said AC voltage V AC, - comparing ΔR Th with a limit value ΔR Th max and, - raising a fault flag in case ΔR Th is above said limit value or repeating said subsequent process in case ΔR Th remains under said limit value.