An organic light-emitting display comprising: a display panel with a plurality of pixels; and a current sensing type sensing unit connected to at least one of the pixels via a sensing line, the current sensing type sensing unit comprising: a current sink circuit (SINK) that is connected to the sensing line and is configured to reduce a pixel current (Ip) fed via the sensing line by an amount equal to a sink current (Is); a sink current control part that is configured to control the amount of sink current (Is); a current integrator that is connected to the sensing line and is configured to accumulate an adjusted current (Ip-Is), which equals the pixel current (Ip) minus the sink current (Is), to produce an integrated value (Vsen); a sampling part that is configured to sample and hold the integrated value (Vsen); and an analog-to-digital converter that is configured to perform analog-to-digital conversion of the integrated value (Vsen) from the sampling part to produce a digital sensed value, wherein the sink current control part is configured to adjust the amount of sink current (Is) based on the digital sensed value, wherein the sink current control part is configured to detect if a frequency that the digital sensed value is saturated to an upper or to a lower limit of the sensing range of the analog-to-digital converter exceeds a set reference value and, if so, to adjust the amount of sink current. a display panel with a plurality of pixels; and a current sensing type sensing unit connected to at least one of the pixels via a sensing line, the current sensing type sensing unit comprising: a current sink circuit (SINK) that is connected to the sensing line and is configured to reduce a pixel current (Ip) fed via the sensing line by an amount equal to a sink current (Is); a sink current control part that is configured to control the amount of sink current (Is); a current integrator that is connected to the sensing line and is configured to accumulate an adjusted current (Ip-Is), which equals the pixel current (Ip) minus the sink current (Is), to produce an integrated value (Vsen); a sampling part that is configured to sample and hold the integrated value (Vsen); and an analog-to-digital converter that is configured to perform analog-to-digital conversion of the integrated value (Vsen) from the sampling part to produce a digital sensed value, wherein the sink current control part is configured to adjust the amount of sink current (Is) based on the digital sensed value, a current sink circuit (SINK) that is connected to the sensing line and is configured to reduce a pixel current (Ip) fed via the sensing line by an amount equal to a sink current (Is); a sink current control part that is configured to control the amount of sink current (Is); a current integrator that is connected to the sensing line and is configured to accumulate an adjusted current (Ip-Is), which equals the pixel current (Ip) minus the sink current (Is), to produce an integrated value (Vsen); a sampling part that is configured to sample and hold the integrated value (Vsen); and an analog-to-digital converter that is configured to perform analog-to-digital conversion of the integrated value (Vsen) from the sampling part to produce a digital sensed value, wherein the sink current control part is configured to adjust the amount of sink current (Is) based on the digital sensed value, wherein the sink current control part is configured to detect if a frequency that the digital sensed value is saturated to an upper or to a lower limit of the sensing range of the analog-to-digital converter exceeds a set reference value and, if so, to adjust the amount of sink current.