A photoelectric conversion device comprising: a plurality of analog signal output means (11, 20-n) including a plurality of pixels, each of the plurality of analog signal output means (11, 20-n) being configured to output an analog signal based on a pixel of the plurality of pixels; and a plurality of signal processing means (30-n, 31, 40-n), wherein each of the plurality of signal processing means (30-n, 31, 40-n) is provided correspondingly to one of the plurality of analog signal output means (11, 20-n) and includes gain application means and AD conversion means (30-n, 31, 40-n), the gain application means being configured to attenuate an analog signal, characterized in that the gain application means includes a first path and a second path, wherein the second path includes a passive element, and is a path in which a second signal (Vpix1) is generated by attenuating the analog signal by using only the passive element, and the first path is a path that bypasses the passive element of the second path, and is a path in which a first signal (Vpix, Vpix2) is generated without attenuating the analog signal, and the AD conversion means (30-n, 31, 40-n) is configured to convert, from analog to digital, the output signal from the gain application means, wherein the AD conversion means (30-n, 31, 40-n) includes a comparator, the comparator includes first, second, and third input transistors (M1, M4, M2), a tail current source configured to supply a current, and selecting means (102, S3, S4), the first and second input transistors (M1, M4) constitute a differential pair, and the third and second input transistors (M2, M4) constitute a differential pair, the first path of the gain application means is connected to the third input transistor, the second path of the gain application means is connected to the first input transistor, and the selecting means is configured to selectively supply, based on a result obtained by comparing the first signal with a threshold, the current supplied from the tail current source to either the first input transistor or the third input transistor. a plurality of analog signal output means (11, 20-n) including a plurality of pixels, each of the plurality of analog signal output means (11, 20-n) being configured to output an analog signal based on a pixel of the plurality of pixels; and a plurality of signal processing means (30-n, 31, 40-n), wherein each of the plurality of signal processing means (30-n, 31, 40-n) is provided correspondingly to one of the plurality of analog signal output means (11, 20-n) and includes gain application means and AD conversion means (30-n, 31, 40-n), the gain application means being configured to attenuate an analog signal, characterized in that the gain application means includes a first path and a second path, wherein the second path includes a passive element, and is a path in which a second signal (Vpix1) is generated by attenuating the analog signal by using only the passive element, and the first path is a path that bypasses the passive element of the second path, and is a path in which a first signal (Vpix, Vpix2) is generated without attenuating the analog signal, and the second path includes a passive element, and is a path in which a second signal (Vpix1) is generated by attenuating the analog signal by using only the passive element, and the first path is a path that bypasses the passive element of the second path, and is a path in which a first signal (Vpix, Vpix2) is generated without attenuating the analog signal, and the AD conversion means (30-n, 31, 40-n) is configured to convert, from analog to digital, the output signal from the gain application means, wherein the AD conversion means (30-n, 31, 40-n) includes a comparator, the comparator includes first, second, and third input transistors (M1, M4, M2), a tail current source configured to supply a current, and selecting means (102, S3, S4), the first and second input transistors (M1, M4) constitute a differential pair, and the third and second input transistors (M2, M4) constitute a differential pair, the first path of the gain application means is connected to the third input transistor, the second path of the gain application means is connected to the first input transistor, and the selecting means is configured to selectively supply, based on a result obtained by comparing the first signal with a threshold, the current supplied from the tail current source to either the first input transistor or the third input transistor. the comparator includes first, second, and third input transistors (M1, M4, M2), a tail current source configured to supply a current, and selecting means (102, S3, S4), the first and second input transistors (M1, M4) constitute a differential pair, and the third and second input transistors (M2, M4) constitute a differential pair, the first path of the gain application means is connected to the third input transistor, the second path of the gain application means is connected to the first input transistor, and the selecting means is configured to selectively supply, based on a result obtained by comparing the first signal with a threshold, the current supplied from the tail current source to either the first input transistor or the third input transistor.