An integrated light sensor comprising: a silicon wafer having a first side and an opposing second side; a light-detecting diode fabricated on the first side of the wafer; an optical filter material placed above the light-detecting diode to select a required portion of the electro-magnetic spectrum; a solder bump positioned on the second side of the wafer for connecting the wafer to a printed circuit board; a CMOS metal layer disposed on the first side of the wafer and having one end portion directly coupled to the light-detecting diode; a via (105, 614) between the first side and the second side of the wafer, the via (105, 614) comprising - a via metal layer (104, 604) and - a via metal barrier/seed layer (115, 615), - the via metal layer (104, 604) is ° directly coupled to another end portion of the CMOS metal layer and ° conducts electricity between the light-detecting diode and the solder bump and wherein - the via metal layer (104, 604) is an electroplated layer, - a dielectric layer (103, 603) is interposed between the via metal layer (104, 604) and the wafer, - the via metal layer (104, 604) is electrically insulated from the wafer by the dielectric layer (103, 603) and characterised by - the via (105, 614) further comprising the optical filter material placed on the via metal layer (104, 604) within the via (105, 614). a silicon wafer having a first side and an opposing second side; a light-detecting diode fabricated on the first side of the wafer; an optical filter material placed above the light-detecting diode to select a required portion of the electro-magnetic spectrum; a solder bump positioned on the second side of the wafer for connecting the wafer to a printed circuit board; a CMOS metal layer disposed on the first side of the wafer and having one end portion directly coupled to the light-detecting diode; a via (105, 614) between the first side and the second side of the wafer, the via (105, 614) comprising - a via metal layer (104, 604) and - a via metal barrier/seed layer (115, 615), - the via metal layer (104, 604) is ° directly coupled to another end portion of the CMOS metal layer and ° conducts electricity between the light-detecting diode and the solder bump and - a via metal layer (104, 604) and - a via metal barrier/seed layer (115, 615), - the via metal layer (104, 604) is ° directly coupled to another end portion of the CMOS metal layer and ° conducts electricity between the light-detecting diode and the solder bump and - the via metal layer (104, 604) is ° directly coupled to another end portion of the CMOS metal layer and ° conducts electricity between the light-detecting diode and the solder bump and ° directly coupled to another end portion of the CMOS metal layer and ° conducts electricity between the light-detecting diode and the solder bump and - the via metal layer (104, 604) is an electroplated layer, - a dielectric layer (103, 603) is interposed between the via metal layer (104, 604) and the wafer, - the via metal layer (104, 604) is electrically insulated from the wafer by the dielectric layer (103, 603) and characterised by - the via (105, 614) further comprising the optical filter material placed on the via metal layer (104, 604) within the via (105, 614). - the via (105, 614) further comprising the optical filter material placed on the via metal layer (104, 604) within the via (105, 614).