A coder, according to H.264 / MPEG4-AVC standard, comprising: a blocking circuit that generates, from an input signal which is an image or video signal, multivalued data, in specified coding unit, having a plurality of contexts; a binarizing circuit that converts the multivalued data generated by the blocking circuit and having been transformed and quantized into a binary symbol sequence; an arithmetic code amount approximating circuit that calculates a prediction code amount in the coding unit from the binary symbol sequence; and a coding circuit that codes the input signal arithmetically on the basis of the prediction code amount, characterized in that the arithmetic code amount approximating circuit includes: a selector that divides the binary symbol sequence contained in the specified coding unit into a plurality of groups based on the contexts; a plurality of code amount approximating circuits, each of which is provided in each group and calculates, from the binary symbol sequence divided into a plurality of groups, the prediction code amount of the group, based on at least a section range in arithmetic coding; and an adder that adds the prediction code amounts from all code amount approximating circuits, and outputs the prediction code amount in the specified coding unit, wherein the code amount approximating circuit sets the section range to a specified initial value at the beginning of a unit of assembly of binary symbols of several syntax elements having the same context continuously. a blocking circuit that generates, from an input signal which is an image or video signal, multivalued data, in specified coding unit, having a plurality of contexts; a binarizing circuit that converts the multivalued data generated by the blocking circuit and having been transformed and quantized into a binary symbol sequence; an arithmetic code amount approximating circuit that calculates a prediction code amount in the coding unit from the binary symbol sequence; and a coding circuit that codes the input signal arithmetically on the basis of the prediction code amount, characterized in that the arithmetic code amount approximating circuit includes: a selector that divides the binary symbol sequence contained in the specified coding unit into a plurality of groups based on the contexts; a plurality of code amount approximating circuits, each of which is provided in each group and calculates, from the binary symbol sequence divided into a plurality of groups, the prediction code amount of the group, based on at least a section range in arithmetic coding; and an adder that adds the prediction code amounts from all code amount approximating circuits, and outputs the prediction code amount in the specified coding unit, a selector that divides the binary symbol sequence contained in the specified coding unit into a plurality of groups based on the contexts; a plurality of code amount approximating circuits, each of which is provided in each group and calculates, from the binary symbol sequence divided into a plurality of groups, the prediction code amount of the group, based on at least a section range in arithmetic coding; and an adder that adds the prediction code amounts from all code amount approximating circuits, and outputs the prediction code amount in the specified coding unit, wherein the code amount approximating circuit sets the section range to a specified initial value at the beginning of a unit of assembly of binary symbols of several syntax elements having the same context continuously.