A method for migrating one or more IP cores of a controller of an integrated circuit device (10, 400) to a programmable core logic region (18, 403) of the integrated circuit device (10, 400), wherein the method is performed by a logic design system (256, 338) and comprises: receiving custom logic design data for the integrated circuit device (10, 400), the custom logic design data comprising a plurality of IP cores (404A, 405A, 406A) that are to be hardwired as part of the controller in the integrated circuit device (10, 400); identifying one or more IP cores (404A, 405A, 406A) associated with the controller that implement one or more logic functions not required during initialization of the integrated circuit device (10, 400); receiving an input selection corresponding to the identified one or more IP cores (404A, 405A, 406A), wherein the input selection activates a soft IP configuration state for the one or more identified IP cores (404A, 405A, 406A); in response to the activation of the soft IP configuration state, generating the configuration data for the integrated circuit device (10, 400) that includes soft IP configuration data for implementing the logic functions of the identified one or more IP cores (404A, 405A, 406A), and wherein the soft IP configuration data is for configuring one or more associated soft IP cores (404B, 405B, 406B) in the programmable core logic region (18, 403) of the manufactured integrated circuit device (10, 400) to implement the one or more logic functions of the identified one or more IP cores (404A, 405A, 406A) during initialization of the manufactured integrated circuit device (10, 400), wherein the identified one or more IP cores (404A, 405A, 406A) are not included as hardwired IP cores in the manufactured integrated circuit device (10, 400). receiving custom logic design data for the integrated circuit device (10, 400), the custom logic design data comprising a plurality of IP cores (404A, 405A, 406A) that are to be hardwired as part of the controller in the integrated circuit device (10, 400); identifying one or more IP cores (404A, 405A, 406A) associated with the controller that implement one or more logic functions not required during initialization of the integrated circuit device (10, 400); receiving an input selection corresponding to the identified one or more IP cores (404A, 405A, 406A), wherein the input selection activates a soft IP configuration state for the one or more identified IP cores (404A, 405A, 406A); in response to the activation of the soft IP configuration state, generating the configuration data for the integrated circuit device (10, 400) that includes soft IP configuration data for implementing the logic functions of the identified one or more IP cores (404A, 405A, 406A), and wherein the soft IP configuration data is for configuring one or more associated soft IP cores (404B, 405B, 406B) in the programmable core logic region (18, 403) of the manufactured integrated circuit device (10, 400) to implement the one or more logic functions of the identified one or more IP cores (404A, 405A, 406A) during initialization of the manufactured integrated circuit device (10, 400), wherein the identified one or more IP cores (404A, 405A, 406A) are not included as hardwired IP cores in the manufactured integrated circuit device (10, 400).