A method of forming a semiconductor device comprising: forming a gate stack including a gate dielectric and a first metal gate conductor atop a first conductivity type region and a second conductivity type region of a substrate wherein the first conductivity type region is processed to provide at least one nFET device and the second conductivity type region is processed to provide at least one pFET device; forming an etch mask overlying the second conductivity type region, wherein the first conductivity type region is exposed; removing a portion of the first metal gate conductor that is present in the first conductivity type region to expose the gate dielectric present atop the first conductivity type region, wherein a remaining portion of the first metal gate conductor is present atop the second conductivity type region; removing the etch mask; nitriding the exposed portion of the gate dielectric in the first conductivity type region and the first metal gate conductor that is present in the second conductivity type region by applying a nitrogen based plasma wherein the nitrogen based plasma produces a first nitrogen containing layer within the exposed portion of the gate dielectric in the first conductivity type region and produces a second nitrogen containing layer within the remaining portion of the first metal gate conductor in the second conductivity type region, wherein the second nitrogen containing layer is a second portion of the remaining portion of the first metal gate conductor, said second portion having a thickness from 1 nm to 20 nm, as measured from the top surface of the first metal gate conductor, and a nitrogen concentration ranging from 10% to 60%; and forming a second metal gate conductor overlying at least the gate dielectric that is present in the first conductivity type region, wherein the second metal gate conductor is composed of TaN, W, WN, Ti, TiN or combinations thereof; characterised in that the first metal gate conductor as formed at said step of forming a gate stack is a conductive metal selected from W, Ni, Ti, Mo, Ta, Cu, Pt, Ag, Au, Ru, Ir, Rh, and Re. forming a gate stack including a gate dielectric and a first metal gate conductor atop a first conductivity type region and a second conductivity type region of a substrate wherein the first conductivity type region is processed to provide at least one nFET device and the second conductivity type region is processed to provide at least one pFET device; forming an etch mask overlying the second conductivity type region, wherein the first conductivity type region is exposed; removing a portion of the first metal gate conductor that is present in the first conductivity type region to expose the gate dielectric present atop the first conductivity type region, wherein a remaining portion of the first metal gate conductor is present atop the second conductivity type region; removing the etch mask; nitriding the exposed portion of the gate dielectric in the first conductivity type region and the first metal gate conductor that is present in the second conductivity type region by applying a nitrogen based plasma wherein the nitrogen based plasma produces a first nitrogen containing layer within the exposed portion of the gate dielectric in the first conductivity type region and produces a second nitrogen containing layer within the remaining portion of the first metal gate conductor in the second conductivity type region, wherein the second nitrogen containing layer is a second portion of the remaining portion of the first metal gate conductor, said second portion having a thickness from 1 nm to 20 nm, as measured from the top surface of the first metal gate conductor, and a nitrogen concentration ranging from 10% to 60%; and forming a second metal gate conductor overlying at least the gate dielectric that is present in the first conductivity type region, wherein the second metal gate conductor is composed of TaN, W, WN, Ti, TiN or combinations thereof; characterised in that the first metal gate conductor as formed at said step of forming a gate stack is a conductive metal selected from W, Ni, Ti, Mo, Ta, Cu, Pt, Ag, Au, Ru, Ir, Rh, and Re.