A camera comprising: a dynamic memory; an image signal processor, ISP, including a configuration register; a software driver configured to: store, in the dynamic memory, a plurality of predetermined lookup tables, LUTs, a first LUT of the predetermined LUTs including first ISP configuration information corresponding with a first value of a quantitative image factor, and a second LUT of the predetermined LUTs including second ISP configuration information corresponding with a second value of the quantitative image factor, the second value being greater than the first value; and issue an interpolation command indicating a third value of the quantitative image factor corresponding with an image frame received by the ISP, the third value being greater than the first value and less than the second value; a LUT processing circuit configured to receive the interpolation command, and in response to receiving the interpolation command: read the first LUT and the second LUT; and perform at least one interpolation operation to generate an interpolated LUT, the interpolated LUT being generated based, at least, on the third value, the first LUT and the second LUT, wherein the LUT processing circuit is further configured to write the interpolated LUT to the configuration register of the ISP, wherein: the interpolation command is included in a compute kernel that is executed by the LUT processing circuit; and the LUT processing circuit includes an operation control circuit and at least one LUT arithmetic and logic unit the operation control circuit being configured: to decode the compute kernel; and schedule LUT processing operations included in the compute kernel for execution by the at least one LUT ALU; and the at least one LUT ALU is configured to execute the scheduled LUT processing operations, including the interpolation operation. a dynamic memory; an image signal processor, ISP, including a configuration register; a software driver configured to: store, in the dynamic memory, a plurality of predetermined lookup tables, LUTs, a first LUT of the predetermined LUTs including first ISP configuration information corresponding with a first value of a quantitative image factor, and a second LUT of the predetermined LUTs including second ISP configuration information corresponding with a second value of the quantitative image factor, the second value being greater than the first value; and issue an interpolation command indicating a third value of the quantitative image factor corresponding with an image frame received by the ISP, the third value being greater than the first value and less than the second value; store, in the dynamic memory, a plurality of predetermined lookup tables, LUTs, a first LUT of the predetermined LUTs including first ISP configuration information corresponding with a first value of a quantitative image factor, and a second LUT of the predetermined LUTs including second ISP configuration information corresponding with a second value of the quantitative image factor, the second value being greater than the first value; and issue an interpolation command indicating a third value of the quantitative image factor corresponding with an image frame received by the ISP, the third value being greater than the first value and less than the second value; a LUT processing circuit configured to receive the interpolation command, and in response to receiving the interpolation command: read the first LUT and the second LUT; and perform at least one interpolation operation to generate an interpolated LUT, the interpolated LUT being generated based, at least, on the third value, the first LUT and the second LUT, read the first LUT and the second LUT; and perform at least one interpolation operation to generate an interpolated LUT, the interpolated LUT being generated based, at least, on the third value, the first LUT and the second LUT, wherein the LUT processing circuit is further configured to write the interpolated LUT to the configuration register of the ISP, wherein: the interpolation command is included in a compute kernel that is executed by the LUT processing circuit; and the LUT processing circuit includes an operation control circuit and at least one LUT arithmetic and logic unit the operation control circuit being configured: to decode the compute kernel; and schedule LUT processing operations included in the compute kernel for execution by the at least one LUT ALU; and the at least one LUT ALU is configured to execute the scheduled LUT processing operations, including the interpolation operation. the interpolation command is included in a compute kernel that is executed by the LUT processing circuit; and the LUT processing circuit includes an operation control circuit and at least one LUT arithmetic and logic unit the operation control circuit being configured: to decode the compute kernel; and schedule LUT processing operations included in the compute kernel for execution by the at least one LUT ALU; and to decode the compute kernel; and schedule LUT processing operations included in the compute kernel for execution by the at least one LUT ALU; and the at least one LUT ALU is configured to execute the scheduled LUT processing operations, including the interpolation operation.