A package method, comprising the steps of: providing a metal carrier having a first surface and a second surface that are arranged opposite to each other; forming a first wiring layer on the second surface of the metal carrier; forming a first conductive pillar layer on the first wiring layer; forming a dielectric material layer covering the first wiring layer, the first conductive pillar layer and the second surface of the metal carrier, in which a vacuum lamination process is used to laminate the dielectric material layer on the second surface of the metal carrier; exposing one end of the first conductive pillar layer; forming a second wiring layer on the exposed end of the first conductive pillar layer, wherein each of the first wiring layer and the second wiring layer includes at least one wire and a chip seat; forming a solder resist layer on the dielectric material layer and the second wiring layer; and removing the metal carrier, wherein the package method further comprises the steps of: providing a first external element to be disposed on and electrically connected to a first side of the first wiring layer; forming an external molding compound layer while allowing the same to cover the first external element and the first side of the first wiring layer; forming a plurality of conductive elements on the second wiring layer; and forming a second external element while allowing the same to be disposed on and electrically connected to the plural conductive elements. wherein forming of the external molding compound layer further comprises the steps of: providing a molding compound, whereas the molding compound is composed of a resin and power silicon dioxide; heating the molding compound to a liquid state; pouring the liquefied molding compound on the second side of the metal carrier while allowing the molding compound to cover the first wiring layer and the passive element under a high-temperature and high-pressure condition; and curing the molding compound for enabling the same to form the external molding compound layer. providing a metal carrier having a first surface and a second surface that are arranged opposite to each other; forming a first wiring layer on the second surface of the metal carrier; forming a first conductive pillar layer on the first wiring layer; forming a dielectric material layer covering the first wiring layer, the first conductive pillar layer and the second surface of the metal carrier, in which a vacuum lamination process is used to laminate the dielectric material layer on the second surface of the metal carrier; exposing one end of the first conductive pillar layer; forming a second wiring layer on the exposed end of the first conductive pillar layer, wherein each of the first wiring layer and the second wiring layer includes at least one wire and a chip seat; forming a solder resist layer on the dielectric material layer and the second wiring layer; and removing the metal carrier, providing a first external element to be disposed on and electrically connected to a first side of the first wiring layer; forming an external molding compound layer while allowing the same to cover the first external element and the first side of the first wiring layer; forming a plurality of conductive elements on the second wiring layer; and forming a second external element while allowing the same to be disposed on and electrically connected to the plural conductive elements. providing a molding compound, whereas the molding compound is composed of a resin and power silicon dioxide; heating the molding compound to a liquid state; pouring the liquefied molding compound on the second side of the metal carrier while allowing the molding compound to cover the first wiring layer and the passive element under a high-temperature and high-pressure condition; and curing the molding compound for enabling the same to form the external molding compound layer.