An imaging sensor comprising: a plurality of substrates comprising a first substrate and at least one second, subsequent supporting substrate; a pixel array; a plurality of interconnects; and a plurality of supporting circuits; and a plurality of pixel read buses and circuit buses; wherein the first substrate of the plurality of substrates comprises the pixel array; wherein the plurality of supporting circuits are disposed on the at least one second, subsequent supporting substrate that is disposed remotely relative to said first substrate; wherein said plurality of supporting circuits are electrically connected to said pixel array via the plurality of interconnects disposed between said first substrate and said at least one second, subsequent supporting substrate; wherein said second, subsequent supporting substrate is disposed behind said pixel array relative to an object to be imaged; wherein said plurality of interconnects are spaced relative to one another at a distance that is greater than a pixel pitch of said pixel array; wherein the pixel array comprises a plurality of pixel columns being one pixel wide and N pixels long with one pixel read bus per pixel column; characterized in that the second, subsequent supporting substrate comprises a plurality of circuit columns with one circuit bus per circuit column, wherein each circuit column comprises one readout supporting circuit; wherein each of the plurality of interconnects reads out one of the plurality of pixel columns via a respective pixel read bus to one of the plurality of circuit buses; wherein each pixel read bus and each circuit bus are superimposed; and wherein each of the plurality of interconnects is placed anywhere along a path of the superimposed pixel read bus of each pixel column and the circuit bus of each circuit column, wherein the superimposed pixel read buses and circuit buses extend in the column direction of the pixel array. a plurality of substrates comprising a first substrate and at least one second, subsequent supporting substrate; a pixel array; a plurality of interconnects; and a plurality of supporting circuits; and a plurality of pixel read buses and circuit buses; wherein the first substrate of the plurality of substrates comprises the pixel array; wherein the plurality of supporting circuits are disposed on the at least one second, subsequent supporting substrate that is disposed remotely relative to said first substrate; wherein said plurality of supporting circuits are electrically connected to said pixel array via the plurality of interconnects disposed between said first substrate and said at least one second, subsequent supporting substrate; wherein said second, subsequent supporting substrate is disposed behind said pixel array relative to an object to be imaged; wherein said plurality of interconnects are spaced relative to one another at a distance that is greater than a pixel pitch of said pixel array; wherein the pixel array comprises a plurality of pixel columns being one pixel wide and N pixels long with one pixel read bus per pixel column; characterized in that the second, subsequent supporting substrate comprises a plurality of circuit columns with one circuit bus per circuit column, wherein each circuit column comprises one readout supporting circuit; wherein each of the plurality of interconnects reads out one of the plurality of pixel columns via a respective pixel read bus to one of the plurality of circuit buses; wherein each pixel read bus and each circuit bus are superimposed; and wherein each of the plurality of interconnects is placed anywhere along a path of the superimposed pixel read bus of each pixel column and the circuit bus of each circuit column, wherein the superimposed pixel read buses and circuit buses extend in the column direction of the pixel array.