A method for measuring amplitude or timing errors of a digital-to-analog converter, DAC, having a plurality of DAC bit cells whose outputs are summed to generate an analog output of the DAC, wherein timing errors consist of at least one of timing skew and duty cycle errors, the method comprising: providing a test signal (d[k]), the test signal being a sine wave; generating a first scaled version of the test signal by scaling the test signal with a first multiplicative factor, wherein the first multiplicative factor scales the test signal based on an ideal bit weight of a first DAC bit cell and an ideal bit weight of a second DAC bit cell, the plurality of DAC bit cells comprising the first DAC bit cell and the second DAC bit cell, wherein the first multiplicative factor comprises a ratio of the weight of the second DAC bit cell and the first DAC bit cell; generating a second scaled version of the test signal by scaling the test signal with a second multiplicative factor, wherein either the first multiplicative factor or the second multiplicative factor comprises a first negative coefficient for inverting the respective scaled version of the test signal; encoding the first scaled version of the test signal and the second scaled version of the test signal into a first test input signal and a second test input signal respectively, wherein said encoding comprises encoding each of the test signals as a delta-sigma bit stream, the first test input signal in the first DAC bit cell and the second test input signal in the second DAC bit cell having equal amplitude and inverse polarity, and wherein the first multiplicative factor and the second multiplicative factor each comprise a second coefficient selected based on the dynamic range of encoders used to perform the said encoding; providing the first test input signal and the second test input signal to the first DAC bit cell and the second DAC bit cell; and measuring the amplitude or timing error of the second DAC bit cell with respect to the first DAC bit cell by observing the analog output of the DAC, the analog output of the DAC comprising an error signal representing the amplitude or timing error of the second DAC bit cell with respect to the first DAC bit cell, wherein measuring the said amplitude or timing error comprises filtering the analog output of the DAC based on a predetermined frequency range to extract the error signal, the predetermined frequency range being the expected frequency range of the error signal, the analog output of the DAC being a sinusoidal output, and wherein the said amplitude error is related to the second coefficient and the said timing error is related to the frequency of the sinusoidal output. providing a test signal (d[k]), the test signal being a sine wave; generating a first scaled version of the test signal by scaling the test signal with a first multiplicative factor, wherein the first multiplicative factor scales the test signal based on an ideal bit weight of a first DAC bit cell and an ideal bit weight of a second DAC bit cell, the plurality of DAC bit cells comprising the first DAC bit cell and the second DAC bit cell, wherein the first multiplicative factor comprises a ratio of the weight of the second DAC bit cell and the first DAC bit cell; generating a second scaled version of the test signal by scaling the test signal with a second multiplicative factor, wherein either the first multiplicative factor or the second multiplicative factor comprises a first negative coefficient for inverting the respective scaled version of the test signal; encoding the first scaled version of the test signal and the second scaled version of the test signal into a first test input signal and a second test input signal respectively, wherein said encoding comprises encoding each of the test signals as a delta-sigma bit stream, the first test input signal in the first DAC bit cell and the second test input signal in the second DAC bit cell having equal amplitude and inverse polarity, and wherein the first multiplicative factor and the second multiplicative factor each comprise a second coefficient selected based on the dynamic range of encoders used to perform the said encoding; providing the first test input signal and the second test input signal to the first DAC bit cell and the second DAC bit cell; and measuring the amplitude or timing error of the second DAC bit cell with respect to the first DAC bit cell by observing the analog output of the DAC, the analog output of the DAC comprising an error signal representing the amplitude or timing error of the second DAC bit cell with respect to the first DAC bit cell, wherein measuring the said amplitude or timing error comprises filtering the analog output of the DAC based on a predetermined frequency range to extract the error signal, the predetermined frequency range being the expected frequency range of the error signal, the analog output of the DAC being a sinusoidal output, and wherein the said amplitude error is related to the second coefficient and the said timing error is related to the frequency of the sinusoidal output.