An optical receiving device adapted to receive an optical signal that has been modulated according to a modulation format amongst m-PSK, m-ary Phase Shift Keying, and QAM, Quadrature Amplitude Modulation, to convert the received optical signal into an electrical signal using coherent detection, and to perform phase compensation on the converted received signal, comprising: a carrier phase estimation unit (52, 53, 54, 1, 221) configured to estimate carrier phase errors in a received symbol string obtained from the received signal; a gain adjustment unit configured to perform gain adjustment on symbols input into the carrier phase estimation unit; a phase cycle slip reduction unit (70, 220, 420, 520) configured to detect noise that causes a phase cycle slip and to reduce the phase cycle slip; and a phase compensation circuit configured to compensate carrier phase errors contained in the received signal by means of a circuit (60, 2, 222) adapted to use an output from the carrier phase estimation unit; wherein the phase cycle slip reduction unit (70, 220, 420, 520) includes: a delay difference value calculation circuit (72, 3, 225, 225-1 to 225-3) configured to receive a signal output from the carrier phase estimation unit, and configured to calculate a delay difference value indicating temporal changes in the estimated carrier phase errors; a slip determination unit (73, 4, 226, 326, 426) configured to evaluate an output from the delay difference value calculation circuit and to determine whether or not a phase cycle slip exists; and a slip compensation unit (75, 5, 227, 527) configured to receive an output from the slip determination unit (73, 4, 226, 326, 426) and an output from the phase compensation circuit, characterized in that the slip compensation unit (75, 5, 227, 527) is configured, when the slip determination unit (73, 4, 226, 326, 426) determines that a phase cycle slip exists, to compensate the phase of the output of the phase compensation circuit using a phase compensation amount that has a rotation direction reverse to that of the phase cycle slip and has an angle selected in response to a magnitude of the phase cycle slip from a plurality of angles, said plurality of angles being 90°, 180° and 270° when the modulation format is QAM and being 360°/m when the modulation format is m-PSK. a carrier phase estimation unit (52, 53, 54, 1, 221) configured to estimate carrier phase errors in a received symbol string obtained from the received signal; a gain adjustment unit configured to perform gain adjustment on symbols input into the carrier phase estimation unit; a phase cycle slip reduction unit (70, 220, 420, 520) configured to detect noise that causes a phase cycle slip and to reduce the phase cycle slip; and a phase compensation circuit configured to compensate carrier phase errors contained in the received signal by means of a circuit (60, 2, 222) adapted to use an output from the carrier phase estimation unit; wherein the phase cycle slip reduction unit (70, 220, 420, 520) includes: a delay difference value calculation circuit (72, 3, 225, 225-1 to 225-3) configured to receive a signal output from the carrier phase estimation unit, and configured to calculate a delay difference value indicating temporal changes in the estimated carrier phase errors; a slip determination unit (73, 4, 226, 326, 426) configured to evaluate an output from the delay difference value calculation circuit and to determine whether or not a phase cycle slip exists; and a slip compensation unit (75, 5, 227, 527) configured to receive an output from the slip determination unit (73, 4, 226, 326, 426) and an output from the phase compensation circuit, a delay difference value calculation circuit (72, 3, 225, 225-1 to 225-3) configured to receive a signal output from the carrier phase estimation unit, and configured to calculate a delay difference value indicating temporal changes in the estimated carrier phase errors; a slip determination unit (73, 4, 226, 326, 426) configured to evaluate an output from the delay difference value calculation circuit and to determine whether or not a phase cycle slip exists; and a slip compensation unit (75, 5, 227, 527) configured to receive an output from the slip determination unit (73, 4, 226, 326, 426) and an output from the phase compensation circuit,