A self-checking circuit, comprising a noise generation circuit and a processor, the noise generation circuit comprising a power switch module, a noise generator, and a capacitor, wherein the noise generator is connected to both the power switch module and the capacitor; the power switch module is configured to control, according to a self-checking instruction, whether the noise generator generates a noise signal; and the capacitor is configured to filter out a direct current component in the noise signal when the noise generator generates the noise signal, characterized in that: the power switch module comprises a power source, a first resistor, a second resistor, a first switch, and a P-channel metal oxide semiconductor, PMOS transistor; and a first terminal of the first resistor is connected to a first terminal of the first switch, a second terminal of the first switch is grounded, a third terminal of the first switch is connected to both a first terminal of the second resistor and a gate of the PMOS transistor, a second terminal of the second resistor and a source of the PMOS transistor both are connected to the power source, and a drain of the PMOS transistor is connected to the noise generator, wherein a second terminal of the first resistor is connected to an output terminal of the processor, and wherein the processor is configured to send a high-level signal whose voltage is greater than a working voltage of the power switch module as the self-checking instruction, wherein - the noise generator is a Zener diode; and a first terminal of the Zener diode is connected to both the drain of the PMOS transistor and a first terminal of the capacitor, and a second terminal of the Zener diode is grounded; or - the noise generator is a second NPN transistor; and an emitter of the second NPN transistor is connected to the drain of the PMOS transistor, a base of the second NPN transistor is connected to a first terminal of the capacitor, and a collector of the second NPN transistor is not connected. the power switch module is configured to control, according to a self-checking instruction, whether the noise generator generates a noise signal; and the capacitor is configured to filter out a direct current component in the noise signal when the noise generator generates the noise signal, characterized in that: the power switch module comprises a power source, a first resistor, a second resistor, a first switch, and a P-channel metal oxide semiconductor, PMOS transistor; and a first terminal of the first resistor is connected to a first terminal of the first switch, a second terminal of the first switch is grounded, a third terminal of the first switch is connected to both a first terminal of the second resistor and a gate of the PMOS transistor, a second terminal of the second resistor and a source of the PMOS transistor both are connected to the power source, and a drain of the PMOS transistor is connected to the noise generator, wherein a second terminal of the first resistor is connected to an output terminal of the processor, and wherein the processor is configured to send a high-level signal whose voltage is greater than a working voltage of the power switch module as the self-checking instruction, wherein - the noise generator is a Zener diode; and a first terminal of the Zener diode is connected to both the drain of the PMOS transistor and a first terminal of the capacitor, and a second terminal of the Zener diode is grounded; or - the noise generator is a second NPN transistor; and an emitter of the second NPN transistor is connected to the drain of the PMOS transistor, a base of the second NPN transistor is connected to a first terminal of the capacitor, and a collector of the second NPN transistor is not connected. - the noise generator is a Zener diode; and a first terminal of the Zener diode is connected to both the drain of the PMOS transistor and a first terminal of the capacitor, and a second terminal of the Zener diode is grounded; or - the noise generator is a second NPN transistor; and an emitter of the second NPN transistor is connected to the drain of the PMOS transistor, a base of the second NPN transistor is connected to a first terminal of the capacitor, and a collector of the second NPN transistor is not connected.