An integrated circuit assembly module supporting capacitive communication between semiconductor dies, comprising: a first silicon wafer with a front face and a back face opposite the front face; a first layer of semiconductor dies, the first layer of semiconductor dies comprising a first semiconductor die with an active face upon which active circuitry and signal pads reside, and a back face opposite the active face; a second layer of semiconductor dies, the second layer of semiconductor dies comprising a second semiconductor die with an active face upon which active circuitry and signal pads reside, and a back face opposite the active face; a second silicon wafer with a front face and a back face opposite the front face; wherein the first semiconductor die and the second semiconductor die are arranged active face to active face so that signal pads on the first semiconductor die overlap with signal pads on the second semiconductor die for capacitive communication between the first semiconductor die and the second semiconductor die; wherein the first semiconductor die and the second semiconductor die are pressed together between the first wafer and the second wafer so that the front face of the first wafer is in contact with the back face of the first semiconductor die and the front face of the second wafer is in contact with the back face of the second semiconductor die; wherein the integrated circuit assembly module further comprises an I/O semiconductor die with an active face upon which active circuitry and signal pads reside, and a back face opposite the active face; wherein the I/O semiconductor die and the second semiconductor die are arranged active face to active face, so that signal pads on the I/O semiconductor die overlap with signal pads on the second semiconductor die for capacitive communication between the I/O semiconductor die and the second semiconductor die; wherein the I/O semiconductor die is located on an edge of the first wafer to facilitate in providing communications into and out of the integrated circuit assembly module; and wherein the edge of the first wafer extends beyond the edge of the second wafer so that a portion of the active face of the I/O semiconductor die is exposed to facilitate external connections. a first silicon wafer with a front face and a back face opposite the front face; a first layer of semiconductor dies, the first layer of semiconductor dies comprising a first semiconductor die with an active face upon which active circuitry and signal pads reside, and a back face opposite the active face; a second layer of semiconductor dies, the second layer of semiconductor dies comprising a second semiconductor die with an active face upon which active circuitry and signal pads reside, and a back face opposite the active face; a second silicon wafer with a front face and a back face opposite the front face; wherein the first semiconductor die and the second semiconductor die are arranged active face to active face so that signal pads on the first semiconductor die overlap with signal pads on the second semiconductor die for capacitive communication between the first semiconductor die and the second semiconductor die; wherein the first semiconductor die and the second semiconductor die are pressed together between the first wafer and the second wafer so that the front face of the first wafer is in contact with the back face of the first semiconductor die and the front face of the second wafer is in contact with the back face of the second semiconductor die; wherein the integrated circuit assembly module further comprises an I/O semiconductor die with an active face upon which active circuitry and signal pads reside, and a back face opposite the active face; wherein the I/O semiconductor die and the second semiconductor die are arranged active face to active face, so that signal pads on the I/O semiconductor die overlap with signal pads on the second semiconductor die for capacitive communication between the I/O semiconductor die and the second semiconductor die; wherein the I/O semiconductor die is located on an edge of the first wafer to facilitate in providing communications into and out of the integrated circuit assembly module; and wherein the edge of the first wafer extends beyond the edge of the second wafer so that a portion of the active face of the I/O semiconductor die is exposed to facilitate external connections.