A system to read memory device configuration information, comprising: a memory controller (120, 822, 964); and a memory device (140, 200, 320, 830, 962) comprising: a plurality of mode registers (144, 148, 212, 214, 332, 334), wherein at least one of the mode registers (148, 214, 334) is configured to store configuration information, and wherein the at least one mode register (148, 214, 334) is located apart from the other mode registers (144, 212) and close to a circuit that is to use the configuration information, and wherein a write of the configuration information to the at least one mode register (148, 214, 334) by the memory controller (120, 822, 964) takes less time than a read of the configuration information from the at least one mode register (148, 214, 334) by the memory controller (120, 822, 964), and a communication register (180, 216, 336) separate from the at least one mode register (148, 214, 334) and configured to provide data for a read of the configuration information by the memory controller (120, 822, 964) from the mode register (148, 214, 334), wherein the at least one mode register (148, 214, 334) is configured to copy the configuration information from the mode register (148, 214, 334) to the communication register (180, 216, 336) in response to a request by the memory controller (120, 822, 964) to read the at least one mode register (148, 214, 334) to enable the memory controller (120, 822, 964) to read the configuration information from the communication register (180, 216, 336) instead of directly from the at least one mode register (148, 214, 334). a memory controller (120, 822, 964); and a memory device (140, 200, 320, 830, 962) comprising: a plurality of mode registers (144, 148, 212, 214, 332, 334), wherein at least one of the mode registers (148, 214, 334) is configured to store configuration information, and wherein the at least one mode register (148, 214, 334) is located apart from the other mode registers (144, 212) and close to a circuit that is to use the configuration information, and wherein a write of the configuration information to the at least one mode register (148, 214, 334) by the memory controller (120, 822, 964) takes less time than a read of the configuration information from the at least one mode register (148, 214, 334) by the memory controller (120, 822, 964), and a communication register (180, 216, 336) separate from the at least one mode register (148, 214, 334) and configured to provide data for a read of the configuration information by the memory controller (120, 822, 964) from the mode register (148, 214, 334), wherein the at least one mode register (148, 214, 334) is configured to copy the configuration information from the mode register (148, 214, 334) to the communication register (180, 216, 336) in response to a request by the memory controller (120, 822, 964) to read the at least one mode register (148, 214, 334) to enable the memory controller (120, 822, 964) to read the configuration information from the communication register (180, 216, 336) instead of directly from the at least one mode register (148, 214, 334). a plurality of mode registers (144, 148, 212, 214, 332, 334), wherein at least one of the mode registers (148, 214, 334) is configured to store configuration information, and wherein the at least one mode register (148, 214, 334) is located apart from the other mode registers (144, 212) and close to a circuit that is to use the configuration information, and wherein a write of the configuration information to the at least one mode register (148, 214, 334) by the memory controller (120, 822, 964) takes less time than a read of the configuration information from the at least one mode register (148, 214, 334) by the memory controller (120, 822, 964), and a communication register (180, 216, 336) separate from the at least one mode register (148, 214, 334) and configured to provide data for a read of the configuration information by the memory controller (120, 822, 964) from the mode register (148, 214, 334), wherein the at least one mode register (148, 214, 334) is configured to copy the configuration information from the mode register (148, 214, 334) to the communication register (180, 216, 336) in response to a request by the memory controller (120, 822, 964) to read the at least one mode register (148, 214, 334) to enable the memory controller (120, 822, 964) to read the configuration information from the communication register (180, 216, 336) instead of directly from the at least one mode register (148, 214, 334).