An oscillator circuit comprising N amplifier circuits (A 1 -A 4), in the following numbered 1 to N, wherein for each j ∈ {1,2,..., N - 1}, an output (out) of amplifier circuit j (A j) is connected to an input (in) of the amplifier circuit j + 1 (A j +1), the output of the amplifier circuit N ( A N) is connected to the input of the amplifier circuit 1 (A 1); a first and a second supply terminal (s 1, s 2) configured to receive a supply voltage between the first and the second supply terminal (s 1, s 2); and each of the N amplifier circuits (A 1 -A 4) comprises an input transistor (M 1) having its gate connected to the input (in) of the amplifier circuit, its drain connected to an internal node (x) of the amplifier circuit, and its source connected to the first supply terminal (si); a first resonance circuit (R 1) comprising a first inductor (L S) and a first capacitor (C S), wherein the first inductor (L S) is connected between the internal node (x) and the output (out) of the amplifier circuit, and the first capacitor (C S) is connected between the output (out) of the amplifier circuit and one of the first and the second supply terminals (s 1, s 2); characterized in that the oscillator circuit comprises a second resonance circuit (R 2) comprising a second inductor (L P) and a second capacitor (C P), wherein the second inductor (L P) and the second capacitor (C P) are connected in parallel between the internal node (x) and the second supply terminal (s 2); wherein the first resonance circuit (R 1) is configured to have a first resonance frequency f 0 and the second resonance circuit (R 2) is configured to have a second resonance frequency f P ≥ 2f 0.. N amplifier circuits (A 1 -A 4), in the following numbered 1 to N, wherein for each j ∈ {1,2,..., N - 1}, an output (out) of amplifier circuit j (A j) is connected to an input (in) of the amplifier circuit j + 1 (A j +1), the output of the amplifier circuit N ( A N) is connected to the input of the amplifier circuit 1 (A 1); a first and a second supply terminal (s 1, s 2) configured to receive a supply voltage between the first and the second supply terminal (s 1, s 2); and each of the N amplifier circuits (A 1 -A 4) comprises an input transistor (M 1) having its gate connected to the input (in) of the amplifier circuit, its drain connected to an internal node (x) of the amplifier circuit, and its source connected to the first supply terminal (si); a first resonance circuit (R 1) comprising a first inductor (L S) and a first capacitor (C S), wherein the first inductor (L S) is connected between the internal node (x) and the output (out) of the amplifier circuit, and the first capacitor (C S) is connected between the output (out) of the amplifier circuit and one of the first and the second supply terminals (s 1, s 2); an input transistor (M 1) having its gate connected to the input (in) of the amplifier circuit, its drain connected to an internal node (x) of the amplifier circuit, and its source connected to the first supply terminal (si); a first resonance circuit (R 1) comprising a first inductor (L S) and a first capacitor (C S), wherein the first inductor (L S) is connected between the internal node (x) and the output (out) of the amplifier circuit, and the first capacitor (C S) is connected between the output (out) of the amplifier circuit and one of the first and the second supply terminals (s 1, s 2); characterized in that the oscillator circuit comprises a second resonance circuit (R 2) comprising a second inductor (L P) and a second capacitor (C P), wherein the second inductor (L P) and the second capacitor (C P) are connected in parallel between the internal node (x) and the second supply terminal (s 2); wherein the first resonance circuit (R 1) is configured to have a first resonance frequency f 0 and the second resonance circuit (R 2) is configured to have a second resonance frequency f P ≥ 2f 0.. a second resonance circuit (R 2) comprising a second inductor (L P) and a second capacitor (C P), wherein the second inductor (L P) and the second capacitor (C P) are connected in parallel between the internal node (x) and the second supply terminal (s 2); wherein the first resonance circuit (R 1) is configured to have a first resonance frequency f 0 and the second resonance circuit (R 2) is configured to have a second resonance frequency f P ≥ 2f 0..