A display device comprising: a display panel including data lines and gate lines intersecting each other, pixels arranged in a matrix form, and touch sensors connected to the pixels; a power supply unit arranged to generate a first voltage, a second voltage lower than the first voltage, and a third voltage lower than the first voltage and higher than the second voltage; a control signal generating unit arranged to generate a synchronization signal defining a display period (D1, D2) and a touch sensing period (T1, T2), and an input clock defining a gate pulse period during the display period and defining a pulse period of an alternating current signal during the touch sensing period; a level shifter arranged to receive the synchronization signal, the input clock, the first voltage, the second voltage, and the third voltage to generate an output clock swinging between the first voltage and the second voltage during the display period and swinging between the second voltage and the third voltage during the touch sensing period; and a gate driver arranged to supply a gate pulse (Vgate) swinging between the first voltage and the second voltage to the gate lines during the display period and arranged to supply the AC signal swinging between the third voltage and the second voltage to the gate lines during the touch sensing period, wherein during the touch sensing period, a load-free driving signal is applied to the data lines and the gate lines, the load-free driving signal and the alternating current signal being in phase; wherein the level shifter includes: a first transistor arranged to be turned on when the input clock is a high logic voltage during the display period (D1, D2), to charge a voltage of the output node of the level shifter to the first voltage, and to maintain an OFF state during the touch sensing period (T1, T2); a second transistor arranged to be turned on when the input clock is a low logic level during the display period and the touch sensing period, to discharge the voltage of the output node to the second voltage; and a third transistor arranged to maintain the OFF state during the display period and to be turned on when the input clock is a high logic voltage during the touch sensing period to charge the output node to the third voltage. a display panel including data lines and gate lines intersecting each other, pixels arranged in a matrix form, and touch sensors connected to the pixels; a power supply unit arranged to generate a first voltage, a second voltage lower than the first voltage, and a third voltage lower than the first voltage and higher than the second voltage; a control signal generating unit arranged to generate a synchronization signal defining a display period (D1, D2) and a touch sensing period (T1, T2), and an input clock defining a gate pulse period during the display period and defining a pulse period of an alternating current signal during the touch sensing period; a level shifter arranged to receive the synchronization signal, the input clock, the first voltage, the second voltage, and the third voltage to generate an output clock swinging between the first voltage and the second voltage during the display period and swinging between the second voltage and the third voltage during the touch sensing period; and a gate driver arranged to supply a gate pulse (Vgate) swinging between the first voltage and the second voltage to the gate lines during the display period and arranged to supply the AC signal swinging between the third voltage and the second voltage to the gate lines during the touch sensing period, wherein during the touch sensing period, a load-free driving signal is applied to the data lines and the gate lines, the load-free driving signal and the alternating current signal being in phase; wherein the level shifter includes: a first transistor arranged to be turned on when the input clock is a high logic voltage during the display period (D1, D2), to charge a voltage of the output node of the level shifter to the first voltage, and to maintain an OFF state during the touch sensing period (T1, T2); a second transistor arranged to be turned on when the input clock is a low logic level during the display period and the touch sensing period, to discharge the voltage of the output node to the second voltage; and a third transistor arranged to maintain the OFF state during the display period and to be turned on when the input clock is a high logic voltage during the touch sensing period to charge the output node to the third voltage. a first transistor arranged to be turned on when the input clock is a high logic voltage during the display period (D1, D2), to charge a voltage of the output node of the level shifter to the first voltage, and to maintain an OFF state during the touch sensing period (T1, T2); a second transistor arranged to be turned on when the input clock is a low logic level during the display period and the touch sensing period, to discharge the voltage of the output node to the second voltage; and a third transistor arranged to maintain the OFF state during the display period and to be turned on when the input clock is a high logic voltage during the touch sensing period to charge the output node to the third voltage.