System for visual signaling the intensity of braking of a vehicle independent on the brake pedal of the vehicle, comprising: - a detecting unit, comprising a plurality of acceleration sensors (1.... n) able to provide signals (A1... An) corresponding to the longitudinal acceleration of the vehicle; - a first calculation unit for calculating the best acceleration value A, receiving the signals (A1... An) from the detecting and validity signals (G1... Gn) of the acceleration sensors (1.... n) from a second calculation unit; - a second calculation unit of the validity signals (G1... Gn) of the acceleration sensors (1.... n), receiving the signals (A1... An) from the detecting unit; - a processing unit configured for receiving the best acceleration value A from the calculation unit and the validity signals (G1... Gn) from the calculation unit and for providing digital mode signals (B1... Bm) to an actuating unit; - an actuating unit configured for decoding the digital mode signals (B1... Bm) and for providing electrical output signals (P1... Pq) to a visual signaling unit; - a visual signaling unit comprising lighting bodies able to be activated by the electrical output signals (P1... Pq); said processing unit being configured for determining the vehicle speed value V and for combining it with the best acceleration value A, so as to determine, in case of braking of the vehicle, a plurality of levels of collision dangerousness (0... k) in correspondence of which said actuating unit is configured for correlating the digital mode signals (B1... Bm) to predetermined visual signaling modes of the lighting bodies of the visual signaling unit; characterized in that the second calculation unit comprises: - A first differential circuit block, able to derive the difference (A1-A2, A2-A3, A1-A3) between the acceleration values (A1, A2, A3) of the possible pairs of sensors (1, 2; 2, 3; 1, 3) respectively by means of differential circuits (Dc1, Dc2, Dc3); - A second circuit block for comparing the difference values (A1-A2, A2-A3, A1-A3) comprising window comparators (W1, W2, W3) configured for verifying if the difference values (A1-A, A2-A3, A1-A3) belong to a tolerance range having values symmetrical with respect to zero, providing output signals (C1, C2, C3) having a logic value equal to 1 for sensors (1, 2; 2, 3; 1, 3) with compatible acceleration values and equal to 0 for sensors (1, 2, 2, 3; 1, 3) with incompatible acceleration values; - A third circuit block comprising combinational logic circuits (104, 105, 106) configured for processing the signals (C1, C2, C3) and for providing, as output, signals (G1, G2, G3) having a logic value equal to 1 respectively for properly functioning sensors (1, 2, 3) and logic value equal to 0 respectively for not properly functioning sensors (1, 2, 3). - a detecting unit, comprising a plurality of acceleration sensors (1.... n) able to provide signals (A1... An) corresponding to the longitudinal acceleration of the vehicle; - a first calculation unit for calculating the best acceleration value A, receiving the signals (A1... An) from the detecting and validity signals (G1... Gn) of the acceleration sensors (1.... n) from a second calculation unit; - a second calculation unit of the validity signals (G1... Gn) of the acceleration sensors (1.... n), receiving the signals (A1... An) from the detecting unit; - a processing unit configured for receiving the best acceleration value A from the calculation unit and the validity signals (G1... Gn) from the calculation unit and for providing digital mode signals (B1... Bm) to an actuating unit; - an actuating unit configured for decoding the digital mode signals (B1... Bm) and for providing electrical output signals (P1... Pq) to a visual signaling unit; - a visual signaling unit comprising lighting bodies able to be activated by the electrical output signals (P1... Pq); - A first differential circuit block, able to derive the difference (A1-A2, A2-A3, A1-A3) between the acceleration values (A1, A2, A3) of the possible pairs of sensors (1, 2; 2, 3; 1, 3) respectively by means of differential circuits (Dc1, Dc2, Dc3); - A second circuit block for comparing the difference values (A1-A2, A2-A3, A1-A3) comprising window comparators (W1, W2, W3) configured for verifying if the difference values (A1-A, A2-A3, A1-A3) belong to a tolerance range having values symmetrical with respect to zero, providing output signals (C1, C2, C3) having a logic value equal to 1 for sensors (1, 2; 2, 3; 1, 3) with compatible acceleration values and equal to 0 for sensors (1, 2, 2, 3; 1, 3) with incompatible acceleration values; - A third circuit block comprising combinational logic circuits (104, 105, 106) configured for processing the signals (C1, C2, C3) and for providing, as output, signals (G1, G2, G3) having a logic value equal to 1 respectively for properly functioning sensors (1, 2, 3) and logic value equal to 0 respectively for not properly functioning sensors (1, 2, 3).