A sensing driving circuit for a display device, the display device comprising a display panel including a plurality of scan lines, a plurality of sensing lines, a plurality of data lines and a plurality of pixels, the sensing driving circuit comprising: a plurality of stages configured to respectively output a plurality of sensing signals and including a th stage and a (K+1)th stage, where K is an integer greater than 0, the Kth stage having an input terminal for receiving an input signal comprising a carry signal of the (K-1)th stage, each stage comprising: a shift register unit and a masking buffer unit, each of said register unit and said masking buffer unit being configured to receive a said carry signal of the (k-1)th stage, wherein the shift register unit is configured to provide a th carry signal to the (K+1)th stage, and the masking buffer unit is further configured to receive inputs of a node driving signal and a masking signal (MASK), and to further output a th sensing signal to a sensing line of the display panel, wherein the masking buffer unit includes: a first input circuit configured to provide i) the (K-1)th carry signal (CARRY[K-1], SSP) to a first node based on a said received node driving signal and ii) a first power voltage to a second node based on said (K-1)th carry signal (CARRY[K-1], SSP) and said node driving signal; a node masking circuit configured to supply the first power voltage to the first node and a second power voltage to the second node based on a said received masking signal; a sensing pull-up circuit configured to pull up the th sensing signal based on a second power voltage being applied to the second node; and a sensing pull-down circuit configured to pull down the th sensing signal based on the (K-1)th carry signal (CARRY[K-1], SSP) being applied to the first node. a plurality of stages configured to respectively output a plurality of sensing signals and including a th stage and a (K+1)th stage, where K is an integer greater than 0, the Kth stage having an input terminal for receiving an input signal comprising a carry signal of the (K-1)th stage, each stage comprising: a shift register unit and a masking buffer unit, each of said register unit and said masking buffer unit being configured to receive a said carry signal of the (k-1)th stage, wherein the shift register unit is configured to provide a th carry signal to the (K+1)th stage, and the masking buffer unit is further configured to receive inputs of a node driving signal and a masking signal (MASK), and to further output a th sensing signal to a sensing line of the display panel, a shift register unit and a masking buffer unit, each of said register unit and said masking buffer unit being configured to receive a said carry signal of the (k-1)th stage, wherein the shift register unit is configured to provide a th carry signal to the (K+1)th stage, and the masking buffer unit is further configured to receive inputs of a node driving signal and a masking signal (MASK), and to further output a th sensing signal to a sensing line of the display panel, wherein the masking buffer unit includes: a first input circuit configured to provide i) the (K-1)th carry signal (CARRY[K-1], SSP) to a first node based on a said received node driving signal and ii) a first power voltage to a second node based on said (K-1)th carry signal (CARRY[K-1], SSP) and said node driving signal; a node masking circuit configured to supply the first power voltage to the first node and a second power voltage to the second node based on a said received masking signal; a sensing pull-up circuit configured to pull up the th sensing signal based on a second power voltage being applied to the second node; and a sensing pull-down circuit configured to pull down the th sensing signal based on the (K-1)th carry signal (CARRY[K-1], SSP) being applied to the first node. a first input circuit configured to provide i) the (K-1)th carry signal (CARRY[K-1], SSP) to a first node based on a said received node driving signal and ii) a first power voltage to a second node based on said (K-1)th carry signal (CARRY[K-1], SSP) and said node driving signal; a node masking circuit configured to supply the first power voltage to the first node and a second power voltage to the second node based on a said received masking signal; a sensing pull-up circuit configured to pull up the th sensing signal based on a second power voltage being applied to the second node; and a sensing pull-down circuit configured to pull down the th sensing signal based on the (K-1)th carry signal (CARRY[K-1], SSP) being applied to the first node.