A method of increasing a speed of access of computer memory, the method comprising: detecting a first memory access, from a first process executing in a virtual machine computing environment, directed to a first range of memory; generating, as a precondition to completing the first memory access, a first entry in a hierarchically arranged second layer address translation table comprising multiple levels of tables, the hierarchically arranged second layer address translation table correlating host physical memory addresses to guest physical memory addresses, the first entry being at least one hierarchical level above a hierarchically lowest level of the tables such that a second range of memory, identified by the first entry, can be identified without reference to any table in the hierarchically lowest level of the tables, the second range of memory being greater than the first range of memory; and in response to generating the first entry in the hierarchically arranged second layer address translation table, marking as used a first plurality of entries in a hierarchically arranged page table comprising multiple levels of tables, the hierarchically arranged page table correlating the host physical memory addresses to host virtual memory addresses, the first plurality of entries referencing, in aggregate, the same second range of memory as the first entry in the hierarchically arranged second layer address translation table, wherein entries of the first plurality of entries are at a hierarchically lowest level of the tables; wherein the guest physical memory addresses are perceived as being addresses to physical memory by processes executing within the virtual machine computing environment; wherein the host physical memory addresses are addresses to actual physical memory of a host computing device hosting the virtual machine computing environment; wherein the host virtual memory addresses are addresses to virtual memory provided by a memory manager executing on the host computing device, the memory manager utilizing the hierarchically arranged page table to provide the virtual memory; and wherein guest physical memory, identified by the guest physical memory addresses, is backed by a portion of host virtual memory, identified by a portion of the host virtual memory addresses. detecting a first memory access, from a first process executing in a virtual machine computing environment, directed to a first range of memory; generating, as a precondition to completing the first memory access, a first entry in a hierarchically arranged second layer address translation table comprising multiple levels of tables, the hierarchically arranged second layer address translation table correlating host physical memory addresses to guest physical memory addresses, the first entry being at least one hierarchical level above a hierarchically lowest level of the tables such that a second range of memory, identified by the first entry, can be identified without reference to any table in the hierarchically lowest level of the tables, the second range of memory being greater than the first range of memory; and in response to generating the first entry in the hierarchically arranged second layer address translation table, marking as used a first plurality of entries in a hierarchically arranged page table comprising multiple levels of tables, the hierarchically arranged page table correlating the host physical memory addresses to host virtual memory addresses, the first plurality of entries referencing, in aggregate, the same second range of memory as the first entry in the hierarchically arranged second layer address translation table, wherein entries of the first plurality of entries are at a hierarchically lowest level of the tables; wherein the guest physical memory addresses are perceived as being addresses to physical memory by processes executing within the virtual machine computing environment; wherein the host physical memory addresses are addresses to actual physical memory of a host computing device hosting the virtual machine computing environment; wherein the host virtual memory addresses are addresses to virtual memory provided by a memory manager executing on the host computing device, the memory manager utilizing the hierarchically arranged page table to provide the virtual memory; and wherein guest physical memory, identified by the guest physical memory addresses, is backed by a portion of host virtual memory, identified by a portion of the host virtual memory addresses.