A composite metamaterial comprising: a plurality of unit cells, each unit cell comprising: a plurality of dielectric substrate layers in a stacked arrangement; a split ring resonator; a first split ring conductor extending across said plurality of stacked dielectric substrate layers; at least one substantially straight conductor element supported on one of said plurality of dielectric substrate layers; and, wherein said plurality of unit cells are configured to define a metamaterial; characterized by said plurality of dielectric substrate layers comprises a plurality of dielectric circuit board layers (50, 52, 54) laminated together, and wherein said split ring resonator is defined by: a first conductor strip along a top surface of said uppermost of said plurality of stacked dielectric layers; a second conductor strip along a bottom surface of said lowermost of said plurality of stacked dielectric layers; at least one first conductor leg extending through a blind via from said first conductor strip and terminating at a first plate at said middle dielectric layer; at least one second conductor leg extending through a blind via from said second conductor strip and terminating at a second plate opposite said first plate at said middle dielectric layer; a gap defined between said first and second plates, said first and second plates and said gap defining a capacitor; and, at least a third conductor leg extending through a via connected to at least one of said first or second conductor strips. a plurality of unit cells, each unit cell comprising: a plurality of dielectric substrate layers in a stacked arrangement; a split ring resonator; a first split ring conductor extending across said plurality of stacked dielectric substrate layers; at least one substantially straight conductor element supported on one of said plurality of dielectric substrate layers; and, wherein said plurality of unit cells are configured to define a metamaterial; characterized by said plurality of dielectric substrate layers comprises a plurality of dielectric circuit board layers (50, 52, 54) laminated together, and wherein said split ring resonator is defined by: a first conductor strip along a top surface of said uppermost of said plurality of stacked dielectric layers; a second conductor strip along a bottom surface of said lowermost of said plurality of stacked dielectric layers; at least one first conductor leg extending through a blind via from said first conductor strip and terminating at a first plate at said middle dielectric layer; at least one second conductor leg extending through a blind via from said second conductor strip and terminating at a second plate opposite said first plate at said middle dielectric layer; a gap defined between said first and second plates, said first and second plates and said gap defining a capacitor; and, at least a third conductor leg extending through a via connected to at least one of said first or second conductor strips. a plurality of dielectric substrate layers in a stacked arrangement; a split ring resonator; a first split ring conductor extending across said plurality of stacked dielectric substrate layers; at least one substantially straight conductor element supported on one of said plurality of dielectric substrate layers; and, wherein said plurality of unit cells are configured to define a metamaterial; characterized by said plurality of dielectric substrate layers comprises a plurality of dielectric circuit board layers (50, 52, 54) laminated together, and wherein said split ring resonator is defined by: a first conductor strip along a top surface of said uppermost of said plurality of stacked dielectric layers; a second conductor strip along a bottom surface of said lowermost of said plurality of stacked dielectric layers; at least one first conductor leg extending through a blind via from said first conductor strip and terminating at a first plate at said middle dielectric layer; at least one second conductor leg extending through a blind via from said second conductor strip and terminating at a second plate opposite said first plate at said middle dielectric layer; a gap defined between said first and second plates, said first and second plates and said gap defining a capacitor; and, at least a third conductor leg extending through a via connected to at least one of said first or second conductor strips. a first conductor strip along a top surface of said uppermost of said plurality of stacked dielectric layers; a second conductor strip along a bottom surface of said lowermost of said plurality of stacked dielectric layers; at least one first conductor leg extending through a blind via from said first conductor strip and terminating at a first plate at said middle dielectric layer; at least one second conductor leg extending through a blind via from said second conductor strip and terminating at a second plate opposite said first plate at said middle dielectric layer; a gap defined between said first and second plates, said first and second plates and said gap defining a capacitor; and, at least a third conductor leg extending through a via connected to at least one of said first or second conductor strips.