A data bus comprising: process elements, each process element coupled to a corresponding linear pipeline(14a-14f) having M stages arranged in series, each of the M stages comprising a buffer element (14-1 to 14-M) configured to buffer a data bit sequence and to forward the buffered data bit sequence from a first of the buffer elements (14-1 to 14-M) to a last of the buffer elements (14-1 to 14-M); and a linear main pipeline comprising N pipeline stage elements (12a-12f) arranged in series, wherein each pipeline stage element (12a-12f) is connected to the last buffer element (14-1 to 14-M) of a respective linear pipeline (14a-14f) and configured to read out one or more of the buffered data bit sequences and to forward the read-out data bit sequences from one of N pipeline stage elements (12a-12f) to a next of the N pipeline stage elements (12a-12f); wherein each pipeline stage element (12a-12f) is configured to perform the reading-out sequentially; characterised in that the pipeline stage element (12a-12f) is configured to read-out all buffered data bit sequences from the respective last of the buffer elements (14-1 to 14-M) before forwarding another data bit sequence from a previous of the N pipeline stage elements (12a-12f) such that a continuous data stream is generated by the linear main pipeline forwarding the read-out data bit sequences; and/or wherein the pipeline stage element (12a-12f) is configured to forward all data bit sequences from the previous of the N pipeline stage elements (12a-12f) before reading-out another data bit sequence from the respective last buffer element (14-1 to 14-M) such that a continuous data stream is generated by the linear main pipeline forwarding the read-out data bit sequences. process elements, each process element coupled to a corresponding linear pipeline(14a-14f) having M stages arranged in series, each of the M stages comprising a buffer element (14-1 to 14-M) configured to buffer a data bit sequence and to forward the buffered data bit sequence from a first of the buffer elements (14-1 to 14-M) to a last of the buffer elements (14-1 to 14-M); and a linear main pipeline comprising N pipeline stage elements (12a-12f) arranged in series, wherein each pipeline stage element (12a-12f) is connected to the last buffer element (14-1 to 14-M) of a respective linear pipeline (14a-14f) and configured to read out one or more of the buffered data bit sequences and to forward the read-out data bit sequences from one of N pipeline stage elements (12a-12f) to a next of the N pipeline stage elements (12a-12f); wherein each pipeline stage element (12a-12f) is configured to perform the reading-out sequentially; characterised in that the pipeline stage element (12a-12f) is configured to read-out all buffered data bit sequences from the respective last of the buffer elements (14-1 to 14-M) before forwarding another data bit sequence from a previous of the N pipeline stage elements (12a-12f) such that a continuous data stream is generated by the linear main pipeline forwarding the read-out data bit sequences; and/or wherein the pipeline stage element (12a-12f) is configured to forward all data bit sequences from the previous of the N pipeline stage elements (12a-12f) before reading-out another data bit sequence from the respective last buffer element (14-1 to 14-M) such that a continuous data stream is generated by the linear main pipeline forwarding the read-out data bit sequences.