A multi-chip package, comprising: an interconnect bridge having a first contact pad and a second contact pad thereon, the interconnect bridge comprising a silicon die, wherein the interconnect bridge is mounted on a conductive layer; a first dielectric layer, the first dielectric layer laterally adjacent the interconnect bridge, and the first dielectric layer laterally adjacent and in contact with the conductive layer; a second dielectric layer on the first dielectric layer and on the interconnect bridge, the second dielectric layer over the conductive layer; a first via in the second dielectric layer, the first via coupled to the first contact pad; a second via in the second dielectric layer, the second via coupled to the second contact pad; a third via in the second dielectric layer, the third via coupled to a via in the first dielectric layer; a third dielectric layer on the second dielectric layer, the third dielectric layer over the interconnect bridge and over the conductive layer; a first conductive trace in the third dielectric layer, the first conductive trace coupled to the first via; a second conductive trace in the third dielectric layer, the second conductive trace coupled to the second via; a third conductive trace in the third dielectric layer, the third conductive trace coupled to the third via; a first die over the third dielectric layer, the first die over the interconnect bridge and over the conductive layer, and the first die coupled to the first conductive trace and to the second conductive trace; and a second die over the interconnect bridge, the second die coupled to the first die by the interconnect bridge. an interconnect bridge having a first contact pad and a second contact pad thereon, the interconnect bridge comprising a silicon die, wherein the interconnect bridge is mounted on a conductive layer; a first dielectric layer, the first dielectric layer laterally adjacent the interconnect bridge, and the first dielectric layer laterally adjacent and in contact with the conductive layer; a second dielectric layer on the first dielectric layer and on the interconnect bridge, the second dielectric layer over the conductive layer; a first via in the second dielectric layer, the first via coupled to the first contact pad; a second via in the second dielectric layer, the second via coupled to the second contact pad; a third via in the second dielectric layer, the third via coupled to a via in the first dielectric layer; a third dielectric layer on the second dielectric layer, the third dielectric layer over the interconnect bridge and over the conductive layer; a first conductive trace in the third dielectric layer, the first conductive trace coupled to the first via; a second conductive trace in the third dielectric layer, the second conductive trace coupled to the second via; a third conductive trace in the third dielectric layer, the third conductive trace coupled to the third via; a first die over the third dielectric layer, the first die over the interconnect bridge and over the conductive layer, and the first die coupled to the first conductive trace and to the second conductive trace; and a second die over the interconnect bridge, the second die coupled to the first die by the interconnect bridge.