A variable gain amplifier (1, 2, 3) with a pair of input terminals (T11, T12) and a pair of output terminals (T21, T22) comprising: N, wherein N is an integer equal to or greater than 2, differential amplifier circuits (13, 13-1 to 13-4) each having a pair of input terminals (a1, a2) and a pair of output terminals (b1, b2) and cascade-connected to each other in a propagation direction of a high-frequency signal; a first variable attenuation circuit (14, 14-1 to 14-3) connected between the pair of input terminals of a respective one of the differential amplifier circuits in second to Nth stages counted from the pair of input terminals (T11, T12) of the variable gain amplifier and capable of switching a resistance value between the pair of input terminals of the respective one of the differential amplifier circuits on the basis of a control signal which is input from the outside; and a second variable attenuation circuit (15, 15-1 to 15-3) different from the first variable attenuation circuit, connected between the pair of output terminals of the respective preceding differential amplifier circuit of the respective one of the differential amplifier circuits including the pair of input terminals to which the first variable attenuation circuit is connected, and capable of switching a resistance value between the pair of output terminals of the respective preceding differential amplifier circuit on the basis of a control signal which is input from the outside; and an inter-stage matching circuit (16, 16-1, 16-2, 16-3) provided between the first variable attenuation circuit (14, 14-1,14-2, 14-3) and the second variable attenuation circuit (15, 15-1, 15-2, 15-3); wherein the inter-stage matching circuit (16, 16-1, 16-2, 16-3) includes a transformer with a primary-side inductance (L 1) connected to the second variable attenuation circuit (15, 15-1, 15-2, 15-3) and a secondary-side inductance (L 2) connected to the first variable attenuation circuit (14, 14-1, 14-2, 14-3); and wherein equivalent resistances of the first variable attenuation circuit (14, 14-1, 14-2, 14-3) and the second variable attenuation circuit (15, 15-1, 15-2, 15-3) have a plurality of levels, and a ratio of the equivalent resistances of the second variable attenuation circuit (15, 15-1, 15-2, 15-3) to the equivalent resistance of the first variable attenuation circuit (14, 14-1,14-2, 14-3) at each of these levels is equal to a ratio of the primary-side inductance of the inter-stage matching circuit (16, 16-1, 16-2, 16-3) to the secondary-side inductance of the inter-stage matching circuit (16, 16-1, 16-2, 16-3). N, wherein N is an integer equal to or greater than 2, differential amplifier circuits (13, 13-1 to 13-4) each having a pair of input terminals (a1, a2) and a pair of output terminals (b1, b2) and cascade-connected to each other in a propagation direction of a high-frequency signal; a first variable attenuation circuit (14, 14-1 to 14-3) connected between the pair of input terminals of a respective one of the differential amplifier circuits in second to Nth stages counted from the pair of input terminals (T11, T12) of the variable gain amplifier and capable of switching a resistance value between the pair of input terminals of the respective one of the differential amplifier circuits on the basis of a control signal which is input from the outside; and a second variable attenuation circuit (15, 15-1 to 15-3) different from the first variable attenuation circuit, connected between the pair of output terminals of the respective preceding differential amplifier circuit of the respective one of the differential amplifier circuits including the pair of input terminals to which the first variable attenuation circuit is connected, and capable of switching a resistance value between the pair of output terminals of the respective preceding differential amplifier circuit on the basis of a control signal which is input from the outside; and an inter-stage matching circuit (16, 16-1, 16-2, 16-3) provided between the first variable attenuation circuit (14, 14-1,14-2, 14-3) and the second variable attenuation circuit (15, 15-1, 15-2, 15-3); wherein the inter-stage matching circuit (16, 16-1, 16-2, 16-3) includes a transformer with a primary-side inductance (L 1) connected to the second variable attenuation circuit (15, 15-1, 15-2, 15-3) and a secondary-side inductance (L 2) connected to the first variable attenuation circuit (14, 14-1, 14-2, 14-3); and wherein equivalent resistances of the first variable attenuation circuit (14, 14-1, 14-2, 14-3) and the second variable attenuation circuit (15, 15-1, 15-2, 15-3) have a plurality of levels, and