A method for optimizing the application of a programmable logic device for use in an electronic control device for vehicles, the programmable logic device comprising a soft CPU and/or an unused remaining space, and the method comprising the following steps: creating a plurality of model variants mapping the functionality of the electronic control unit, the model variants differing in the scope of arithmetic operations to be performed by a soft CPU; creating a soft CPU configuration occupying a space of the programmable logic device corresponding to the scope of configuration; performing simulations for different model variants, the performing comprising the following for each model variant: instantiating the soft CPU according to the soft CPU configuration on a programmable logic device present on a developmental circuit board connected to a computer, a program code corresponding to the model variant being downloaded from the computer onto the soft CPU; performing a simulation program, a signal to be processed by the soft CPU being simulated according to the model variant and being transferred by means of a corresponding interface from the computer to the soft CPU programmed on the programmable logic device, processing of the input signal by the soft CPU; capturing and saving profiling data of the soft CPU with respect to processing the input signal, characterized in that processor-in-the-loop simulations are performed, a plurality of soft CPU configurations having different scope of configuration are created, simulations are performed for various combinations of model variants and soft CPU configurations, wherein the profiling data comprise at least one of the parameters of utilization of the RAM and/or ROM memory; utilization of the stack; required execution time; or precision of the arithmetic operation; and the step of determining whether the functionality represented in the model variant can be calculated solely by the programmable logic device, in real time, at a required precision, is performed, wherein the captured profiling data serve as the basis for evaluating. creating a plurality of model variants mapping the functionality of the electronic control unit, the model variants differing in the scope of arithmetic operations to be performed by a soft CPU; creating a soft CPU configuration occupying a space of the programmable logic device corresponding to the scope of configuration; performing simulations for different model variants, the performing comprising the following for each model variant: instantiating the soft CPU according to the soft CPU configuration on a programmable logic device present on a developmental circuit board connected to a computer, a program code corresponding to the model variant being downloaded from the computer onto the soft CPU; performing a simulation program, a signal to be processed by the soft CPU being simulated according to the model variant and being transferred by means of a corresponding interface from the computer to the soft CPU programmed on the programmable logic device, processing of the input signal by the soft CPU; capturing and saving profiling data of the soft CPU with respect to processing the input signal, characterized in that processor-in-the-loop simulations are performed, a plurality of soft CPU configurations having different scope of configuration are created, simulations are performed for various combinations of model variants and soft CPU configurations, wherein the profiling data comprise at least one of the parameters of utilization of the RAM and/or ROM memory; utilization of the stack; required execution time; or precision of the arithmetic operation; and the step of determining whether the functionality represented in the model variant can be calculated solely by the programmable logic device, in real time, at a required precision, is performed, wherein the captured profiling data serve as the basis for evaluating. instantiating the soft CPU according to the soft CPU configuration on a programmable logic device present on a developmental circuit board connected to a computer, a program code corresponding to the model variant being downloaded from the computer onto the soft CPU; performing a simulation program, a signal to be processed by the soft CPU being simulated according to the model variant and being transferred by means of a corresponding interface from the computer to the soft CPU programmed on the programmable logic device, processing of the input signal by the soft CPU; capturing and saving profiling data of the soft CPU with respect to processing the input signal, characterized in that processor-in-the-loop simulations are performed, a plurality of soft CPU configurations having different scope of configuration are created, simulations are performed for various combinations of model variants and soft CPU configurations, wherein the profiling data comprise at least one of the parameters of utilization of the RAM and/or ROM memory; utilization of the stack; required execution time; or precision of the arithmetic operation; and the step of determining whether the functionality represented in the model variant can be calculated solely by the programmable logic device, in real time, at a required precision, is performed, wherein the captured profiling data serve as the basis for evaluating.