An apparatus comprising: a plurality of thermal sensors, each thermal sensor comprising: a temperature-to-voltage converter circuit configured to output a voltage dependent upon a sensed temperature of a processor; a ring oscillator coupled to the temperature-to-voltage converter circuit, wherein the ring oscillator is configured to generate a digital signal having a frequency which is a function of the sensed temperature; a thermal management unit, comprising: a plurality of counters to count a number of cycles of the digital signals over a period of time; a digital controller coupled to each of the counters, the digital controller configured to either: compare a time taken by a first counter to count to a target value with a time taken by a second counter to count to the target value, or compare the number of cycles of the digital signal counted by a first counter with the number of cycles of the digital signal counted by a second counter, wherein the comparison of the respective times taken by the first and second counter or the respective number of cycles counted by the first and second counter is used to control an operating frequency and an operating voltage of a processing core of the processor. a plurality of thermal sensors, each thermal sensor comprising: a temperature-to-voltage converter circuit configured to output a voltage dependent upon a sensed temperature of a processor; a ring oscillator coupled to the temperature-to-voltage converter circuit, wherein the ring oscillator is configured to generate a digital signal having a frequency which is a function of the sensed temperature; a temperature-to-voltage converter circuit configured to output a voltage dependent upon a sensed temperature of a processor; a ring oscillator coupled to the temperature-to-voltage converter circuit, wherein the ring oscillator is configured to generate a digital signal having a frequency which is a function of the sensed temperature; a thermal management unit, comprising: a plurality of counters to count a number of cycles of the digital signals over a period of time; a digital controller coupled to each of the counters, the digital controller configured to either: compare a time taken by a first counter to count to a target value with a time taken by a second counter to count to the target value, or compare the number of cycles of the digital signal counted by a first counter with the number of cycles of the digital signal counted by a second counter, wherein the comparison of the respective times taken by the first and second counter or the respective number of cycles counted by the first and second counter is used to control an operating frequency and an operating voltage of a processing core of the processor. a plurality of counters to count a number of cycles of the digital signals over a period of time; a digital controller coupled to each of the counters, the digital controller configured to either: compare a time taken by a first counter to count to a target value with a time taken by a second counter to count to the target value, or compare the number of cycles of the digital signal counted by a first counter with the number of cycles of the digital signal counted by a second counter, wherein the comparison of the respective times taken by the first and second counter or the respective number of cycles counted by the first and second counter is used to control an operating frequency and an operating voltage of a processing core of the processor. compare a time taken by a first counter to count to a target value with a time taken by a second counter to count to the target value, or compare the number of cycles of the digital signal counted by a first counter with the number of cycles of the digital signal counted by a second counter, wherein the comparison of the respective times taken by the first and second counter or the respective number of cycles counted by the first and second counter is used to control an operating frequency and an operating voltage of a processing core of the processor.