A system, comprising: an array of interconnected memristors (102, 2204), each memristor comprising: a first electrode; a second electrode; and at least one memristor material positioned between the first electrode and the second electrode; and a controller (110, 2202) communicatively coupled to the array of interconnected memristors, wherein the controller is configured to tune the array of interconnected memristors; wherein the array of interconnected memristors includes conductive paths such that each memristor of the array is connected to a first conductive path of the conductive paths at the first electrode and to a second conductive path of the conductive paths at the second electrode, wherein the conductive paths are further connected to the controller; wherein, for a given memristor of the array of interconnected memristors, the controller is configured to set a state of the given memristor by driving a voltage to one of the first conductive path and the second conductive path while the other of the first conductive path and the second conductive path is a ground; wherein the controller is further configured to set the state of the given memristor by applying the voltage to the one of the first conductive path and the second conductive path while the other of the first conductive path and the second conductive path is the ground until a steady state has been reached where electrons have migrated to one side of the at least one memristor material; wherein, once the steady state is reached, the controller is further configured to set each of the first conductive path and the second conductive path to ground; wherein, for the given memristor of the array of interconnected memristors, the controller is configured to read the given memristor by driving a voltage to the other of the first conductive path and the second conductive path while the one of the first conductive path and the second conductive path is a ground; characterized in that the controller is configured to tune the array of interconnected memristors such that the array of interconnected memristors acts as a selectable resistor network having differently sized resistors for test selecting the resistors to tune a mixed-signal integrated circuit. an array of interconnected memristors (102, 2204), each memristor comprising: a first electrode; a second electrode; and at least one memristor material positioned between the first electrode and the second electrode; and a first electrode; a second electrode; and at least one memristor material positioned between the first electrode and the second electrode; and a controller (110, 2202) communicatively coupled to the array of interconnected memristors, wherein the controller is configured to tune the array of interconnected memristors; wherein the array of interconnected memristors includes conductive paths such that each memristor of the array is connected to a first conductive path of the conductive paths at the first electrode and to a second conductive path of the conductive paths at the second electrode, wherein the conductive paths are further connected to the controller; wherein, for a given memristor of the array of interconnected memristors, the controller is configured to set a state of the given memristor by driving a voltage to one of the first conductive path and the second conductive path while the other of the first conductive path and the second conductive path is a ground; wherein the controller is further configured to set the state of the given memristor by applying the voltage to the one of the first conductive path and the second conductive path while the other of the first conductive path and the second conductive path is the ground until a steady state has been reached where electrons have migrated to one side of the at least one memristor material; wherein, once the steady state is reached, the controller is further configured to set each of the first conductive path and the second conductive path to ground; wherein, for the given memristor of the array of interconnected memristors, the controller is configured to read the given memristor by driving a voltage to the other of the first conductive path and the second conductive path while the one of the first conductive path and the second conductive path is a ground; characterized in that the controller is configured to tune the array of interconnected memristors such that the array of interconnected memristors acts as a selectable resistor network having differently sized resistors for test selecting the resistors to tune a mixed-signal integrated circuit.