A solid-state imaging device comprising: a photodiode; a current voltage conversion circuit which receives a photocurrent from the photodiode and outputs a voltage; a buffer which receives the voltage output from the current voltage converter and outputs a buffered voltage; a subtractor comprising a first capacitor, an inverter, a second capacitor and a switch, wherein one end of the first capacitor is coupled to the output of the buffer, the other end of the first capacitor is coupled to the input of the inverter, wherein one end of the second capacitor is coupled to the input of the inverter, the other end of the second capacitor is coupled to the output of the inverter, wherein the switch is in parallel to the second capacitor selectively connecting the input of the inverter with the output of the inverter, wherein the voltage output of the inverter is the voltage output from the subtractor; a quantizer coupled to the output of the subtractor, the quantizer comprising a comparator being configured to output an event detection signal based on a comparison of a reference voltage and a voltage output from the subtractor; a transfer circuit receiving the event detection signal from the quantizer; wherein the current voltage conversion circuit includes: a first transistor being an n-type transistor, a gate of the first transistor coupled to the photodiode, a second transistor being an n-type transistor, a source of the second transistor coupled to the photodiode, and a third transistor being a p-type transistor, a drain of the third transistor coupled to a drain of the first transistor and a gate of the second transistor, the voltage at the drain of the first transistor and the drain of the third transistor being the voltage output from the current voltage converter,, wherein the solid-state imaging device further comprises a first chip including the photodiode, the first transistor and the second transistor, and a second chip stacked to the first chip including the third transistor. a photodiode; a current voltage conversion circuit which receives a photocurrent from the photodiode and outputs a voltage; a buffer which receives the voltage output from the current voltage converter and outputs a buffered voltage; a subtractor comprising a first capacitor, an inverter, a second capacitor and a switch, wherein one end of the first capacitor is coupled to the output of the buffer, the other end of the first capacitor is coupled to the input of the inverter, wherein one end of the second capacitor is coupled to the input of the inverter, the other end of the second capacitor is coupled to the output of the inverter, wherein the switch is in parallel to the second capacitor selectively connecting the input of the inverter with the output of the inverter, wherein the voltage output of the inverter is the voltage output from the subtractor; a quantizer coupled to the output of the subtractor, the quantizer comprising a comparator being configured to output an event detection signal based on a comparison of a reference voltage and a voltage output from the subtractor; a transfer circuit receiving the event detection signal from the quantizer; wherein the current voltage conversion circuit includes: a first transistor being an n-type transistor, a gate of the first transistor coupled to the photodiode, a second transistor being an n-type transistor, a source of the second transistor coupled to the photodiode, and a third transistor being a p-type transistor, a drain of the third transistor coupled to a drain of the first transistor and a gate of the second transistor, the voltage at the drain of the first transistor and the drain of the third transistor being the voltage output from the current voltage converter,, wherein the solid-state imaging device further comprises a first chip including the photodiode, the first transistor and the second transistor, and a second chip stacked to the first chip including the third transistor. a first transistor being an n-type transistor, a gate of the first transistor coupled to the photodiode, a second transistor being an n-type transistor, a source of the second transistor coupled to the photodiode, and a third transistor being a p-type transistor, a drain of the third transistor coupled to a drain of the first transistor and a gate of the second transistor,