A package structure, comprising: a circuit board, wherein the circuit board comprises a build-up structure, second contact pads and a solder mask layer, the second contact pads being disposed between the build-up structure and the solder mask layer, and wherein the build-up structure comprises: a plurality of dielectric layers; a plurality of patterned circuit layers, each of the patterned circuit layers being disposed between the adjacent dielectric layers; and a plurality of first conductive through vias, disposed in the dielectric layers, and electrically connecting the adjacent patterned circuit layers; a supporting structure (314a, 330), disposed in the circuit board, wherein the supporting structure (314a, 330) comprises a vertical supporting structure and a horizontal supporting structure, wherein the vertical supporting structure has a plurality of second conductive through vias disposed in the dielectric layers and disposed at the outer circumference of the circuit board, the second conductive through vias being aligned to each other to form a continuous structure; a first heat dissipation structure, disposed in the circuit board and between the build-up structure and the second contact pads, wherein the first heat dissipation structure is electrically connected to the vertical supporting structure to form an inverted U-shape structure; a plurality of first contact pads (306a-306c), disposed on the circuit board; at least one chip (324a, 324b), disposed on one portion of the first contact pads; and a plurality of metal pillars, disposed on the other portion of the first contact pads (306a-306b), wherein the metal pillars surround the at least one chip (324a, 324b). a circuit board, wherein the circuit board comprises a build-up structure, second contact pads and a solder mask layer, the second contact pads being disposed between the build-up structure and the solder mask layer, and wherein the build-up structure comprises: a plurality of dielectric layers; a plurality of patterned circuit layers, each of the patterned circuit layers being disposed between the adjacent dielectric layers; and a plurality of first conductive through vias, disposed in the dielectric layers, and electrically connecting the adjacent patterned circuit layers; a plurality of dielectric layers; a plurality of patterned circuit layers, each of the patterned circuit layers being disposed between the adjacent dielectric layers; and a plurality of first conductive through vias, disposed in the dielectric layers, and electrically connecting the adjacent patterned circuit layers; a supporting structure (314a, 330), disposed in the circuit board, wherein the supporting structure (314a, 330) comprises a vertical supporting structure and a horizontal supporting structure, wherein the vertical supporting structure has a plurality of second conductive through vias disposed in the dielectric layers and disposed at the outer circumference of the circuit board, the second conductive through vias being aligned to each other to form a continuous structure; a first heat dissipation structure, disposed in the circuit board and between the build-up structure and the second contact pads, wherein the first heat dissipation structure is electrically connected to the vertical supporting structure to form an inverted U-shape structure; a plurality of first contact pads (306a-306c), disposed on the circuit board; at least one chip (324a, 324b), disposed on one portion of the first contact pads; and a plurality of metal pillars, disposed on the other portion of the first contact pads (306a-306b), wherein the metal pillars surround the at least one chip (324a, 324b).