A semiconductor device, comprising: a first transistor (301, 302), the first transistor (301, 302) further comprising: a first semiconductor channel region disposed over a substrate; a first semiconductor source region and a first drain region, of a conductivity type complementary to the first channel region, disposed over the substrate and on opposite sides of the first channel region; a first source contact interfacing with the first source region and a first drain contact interfacing with the first drain region; a first gate dielectric disposed over the first channel region; and a first gate electrode separated from the first channel region by the first gate dielectric and separated from the first drain and source contacts (314A, 314B) by a first intervening spacer dielectric, the first gate electrode further comprising at least a first gate metal having a work function that varies monotonically over a gate length of the gate electrode between the first source and drain regions (110A, 110B), wherein: a thickness of the first gate metal varies monotonically over the length of the first gate electrode between the first source region and first drain region; wherein: the thickness of the first gate metal increases from a non-zero first thickness value at a source edge of the first gate electrode to a second thickness value at a drain edge of the first gate electrode; and wherein: a top surface of the first gate electrode at both the source edge and drain edge is recessed to a z-height below that of a top surface of the first intervening spacer dielectric; and further comprising a gate capping material disposed over the first gate metal between the first intervening spacer dielectric. a first transistor (301, 302), the first transistor (301, 302) further comprising: a first semiconductor channel region disposed over a substrate; a first semiconductor source region and a first drain region, of a conductivity type complementary to the first channel region, disposed over the substrate and on opposite sides of the first channel region; a first source contact interfacing with the first source region and a first drain contact interfacing with the first drain region; a first gate dielectric disposed over the first channel region; and a first semiconductor channel region disposed over a substrate; a first semiconductor source region and a first drain region, of a conductivity type complementary to the first channel region, disposed over the substrate and on opposite sides of the first channel region; a first source contact interfacing with the first source region and a first drain contact interfacing with the first drain region; a first gate dielectric disposed over the first channel region; and a first gate electrode separated from the first channel region by the first gate dielectric and separated from the first drain and source contacts (314A, 314B) by a first intervening spacer dielectric, the first gate electrode further comprising at least a first gate metal having a work function that varies monotonically over a gate length of the gate electrode between the first source and drain regions (110A, 110B), wherein: a thickness of the first gate metal varies monotonically over the length of the first gate electrode between the first source region and first drain region; wherein: the thickness of the first gate metal increases from a non-zero first thickness value at a source edge of the first gate electrode to a second thickness value at a drain edge of the first gate electrode; and wherein: a top surface of the first gate electrode at both the source edge and drain edge is recessed to a z-height below that of a top surface of the first intervening spacer dielectric; and further comprising a gate capping material disposed over the first gate metal between the first intervening spacer dielectric.