A method of testing a first input circuit for receiving an analog input signal (V IN) and producing a digital output signal, the method comprising the steps of: generating a first periodic test signal (D TEST) having a predetermined phase and a predetermined amplitude; characterized in that the method for further comprises the steps of: summing the first periodic test signal (D TEST) and the analog input signal (V IN) to provide a summed signal, the first periodic test signal (D TEST) comprising a symmetrical signal; processing the summed signal by the input circuit to provide a signal (D OUT); producing the digital output signal from the signal (D OUT), wherein producing the digital output signal comprises sampling the signal (D OUT) and averaging samples of the signal (D OUT) over a moving average time period equal to an integer multiple of the period of the periodic test signal (D TEST) such that the average value of the contribution from the periodic test signal (D TEST) to the digital output signal over said moving average period is equal to zero; generating an extracted test signal from the samples of the signal (D OUT); comparing the extracted test signal with a reference signal representing said first periodic test signal (D TEST); and generating an error signal in dependence upon the result of the said comparing step. generating a first periodic test signal (D TEST) having a predetermined phase and a predetermined amplitude; characterized in that the method for further comprises the steps of: summing the first periodic test signal (D TEST) and the analog input signal (V IN) to provide a summed signal, the first periodic test signal (D TEST) comprising a symmetrical signal; processing the summed signal by the input circuit to provide a signal (D OUT); producing the digital output signal from the signal (D OUT), wherein producing the digital output signal comprises sampling the signal (D OUT) and averaging samples of the signal (D OUT) over a moving average time period equal to an integer multiple of the period of the periodic test signal (D TEST) such that the average value of the contribution from the periodic test signal (D TEST) to the digital output signal over said moving average period is equal to zero; generating an extracted test signal from the samples of the signal (D OUT); comparing the extracted test signal with a reference signal representing said first periodic test signal (D TEST); and generating an error signal in dependence upon the result of the said comparing step. summing the first periodic test signal (D TEST) and the analog input signal (V IN) to provide a summed signal, the first periodic test signal (D TEST) comprising a symmetrical signal; processing the summed signal by the input circuit to provide a signal (D OUT); producing the digital output signal from the signal (D OUT), wherein producing the digital output signal comprises sampling the signal (D OUT) and averaging samples of the signal (D OUT) over a moving average time period equal to an integer multiple of the period of the periodic test signal (D TEST) such that the average value of the contribution from the periodic test signal (D TEST) to the digital output signal over said moving average period is equal to zero; generating an extracted test signal from the samples of the signal (D OUT); comparing the extracted test signal with a reference signal representing said first periodic test signal (D TEST); and generating an error signal in dependence upon the result of the said comparing step.