A TFT array substrate, in which TFT elements and pixel electrodes being correspondingly connected with the TFT elements are arrayed in matrix on an insulating substrate, the TFT array substrate comprising: gate bus lines on the insulating substrate, the gate bus lines being correspondingly connected with the TFT elements and being formed from a first metal material; and source bus lines on the insulating substrate, the source bus lines being correspondingly connected with the TFT elements and being formed from a second metal material, the pixel electrodes being made from a third metal material, the insulating substrate having a display area in which the pixel electrodes are arrayed in matrix, and a periphery area around the display area, the periphery area being provided with driver circuits for driving the TFT elements corresponding thereto, the periphery area being provided with (i) branch wirings being correspondingly connected with the driver circuits, and (ii) a main wring (70, 72) being connected with the branch wirings, the branch wirings being formed from one of the first metal material and the second metal material, the main wiring (70, 72) being formed from the other one of the first metal material and the second metal material, the periphery area being provided with connection parts, at which the main wiring (70, 72) is connected with the respective branch wirings, at each of the connection parts, a connection conductor electrically connecting the main wiring (70, 72) with corresponding one of the branch wirings, the connection conductor being formed from the third metal material, the connection parts each having a branch-wiring via hole in an insulating film on the corresponding one of the branch wirings, the branch-wiring via hole allowing the corresponding one of the of the branch wirings to be electrically connected to the connection conductor, characterised in that, at least one of the connection parts being such that at least part of the branch-wiring via hole overlaps with the main wiring (70, 72) in a plane view. gate bus lines on the insulating substrate, the gate bus lines being correspondingly connected with the TFT elements and being formed from a first metal material; and source bus lines on the insulating substrate, the source bus lines being correspondingly connected with the TFT elements and being formed from a second metal material, the pixel electrodes being made from a third metal material, the insulating substrate having a display area in which the pixel electrodes are arrayed in matrix, and a periphery area around the display area, the periphery area being provided with driver circuits for driving the TFT elements corresponding thereto, the periphery area being provided with (i) branch wirings being correspondingly connected with the driver circuits, and (ii) a main wring (70, 72) being connected with the branch wirings, the branch wirings being formed from one of the first metal material and the second metal material, the main wiring (70, 72) being formed from the other one of the first metal material and the second metal material, the periphery area being provided with connection parts, at which the main wiring (70, 72) is connected with the respective branch wirings, at each of the connection parts, a connection conductor electrically connecting the main wiring (70, 72) with corresponding one of the branch wirings, the connection conductor being formed from the third metal material, the connection parts each having a branch-wiring via hole in an insulating film on the corresponding one of the branch wirings, the branch-wiring via hole allowing the corresponding one of the of the branch wirings to be electrically connected to the connection conductor, characterised in that, at least one of the connection parts being such that at least part of the branch-wiring via hole overlaps with the main wiring (70, 72) in a plane view.