A data processing apparatus comprising: a plurality of processing units (4, 6, 8, 10, 12, 14, 16, 18), each processing unit executing a stream of program instructions corresponding to a processing thread; and exception control circuitry configured to control exception processing of a plurality of groups of said plurality of processor units, each group executing a respective processing thread, and said exception control circuitry being responsive to an exception triggering event for any of said groups to control exception processing by said group; wherein said exception control circuitry is configured to control each of said processing units within said group to respond to said exception triggering event by in-sequence interrupting execution of said stream of program instructions, executing a stream of exception handling program instructions to perform exception processing and resuming execution of said stream of program instructions; wherein for each of said processing units within said group said exception control circuitry controls traversal only once for said exception triggering event of a sequence of processing unit exception states; wherein said sequence of processing unit exception states are in turn: (i) normal corresponding to processing of said stream of program instructions; (ii) in-exception corresponding to processing of said exception handling program instructions; and (iii) done-exception corresponding to resumed processing of said stream of program instructions; and wherein said exception control circuitry moves all of said processing units within said group from said done-exception state to said normal state upon completion of exception processing by all of said processing units within said group. a plurality of processing units (4, 6, 8, 10, 12, 14, 16, 18), each processing unit executing a stream of program instructions corresponding to a processing thread; and exception control circuitry configured to control exception processing of a plurality of groups of said plurality of processor units, each group executing a respective processing thread, and said exception control circuitry being responsive to an exception triggering event for any of said groups to control exception processing by said group; wherein said exception control circuitry is configured to control each of said processing units within said group to respond to said exception triggering event by in-sequence interrupting execution of said stream of program instructions, executing a stream of exception handling program instructions to perform exception processing and resuming execution of said stream of program instructions; wherein for each of said processing units within said group said exception control circuitry controls traversal only once for said exception triggering event of a sequence of processing unit exception states; wherein said sequence of processing unit exception states are in turn: (i) normal corresponding to processing of said stream of program instructions; (ii) in-exception corresponding to processing of said exception handling program instructions; and (iii) done-exception corresponding to resumed processing of said stream of program instructions; and (i) normal corresponding to processing of said stream of program instructions; (ii) in-exception corresponding to processing of said exception handling program instructions; and (iii) done-exception corresponding to resumed processing of said stream of program instructions; and wherein said exception control circuitry moves all of said processing units within said group from said done-exception state to said normal state upon completion of exception processing by all of said processing units within said group.