A display device substrate comprising: a pixel electrode including a first connection point and a second connection point for a current to flow between said first and second connection points (P1, P2) corresponding to a difference between a voltage at said first connection point and a voltage at said second connection point, said pixel electrode being adapted to apply a voltage to an electro-optical element, a display gradation of which changes according to application of a voltage; a first signal line (SA [n]); a second signal line (SB [n]); a first transistor configured to control connection of the first signal line (SA[n]) to the first connection point; a second transistor configured to control connection of the second signal line (SB [n]) to the second connection point; and an output section (50 [n]) configured to supply a first driving signal to the first signal line (SA [n]) and supply a second driving signal delayed with respect to the first driving signal to the second signal line (SB [n]), wherein the output section includes a first inverter circuit (INV-4), the output of which is electrically connected to the first signal line (SA [n]), and a second inverter circuit (INV-2), the output of which is electrically connected to the second signal line (SB [n]), the first inverter circuit (INV-4) includes a third transistor (TRA, TRB) and the second inverter circuit (INV-2) includes a fourth transistor (TRA, TRB), a channel width of the fourth transistor (TRA, TRB) is larger than a channel width of the third transistor (TRA, TRB), both the inputs of said first inverter circuit (INV-4) and said second inverter circuit (INV-2) are coupled to a data line (VDR [n]). a pixel electrode including a first connection point and a second connection point for a current to flow between said first and second connection points (P1, P2) corresponding to a difference between a voltage at said first connection point and a voltage at said second connection point, said pixel electrode being adapted to apply a voltage to an electro-optical element, a display gradation of which changes according to application of a voltage; a first signal line (SA [n]); a second signal line (SB [n]); a first transistor configured to control connection of the first signal line (SA[n]) to the first connection point; a second transistor configured to control connection of the second signal line (SB [n]) to the second connection point; and an output section (50 [n]) configured to supply a first driving signal to the first signal line (SA [n]) and supply a second driving signal delayed with respect to the first driving signal to the second signal line (SB [n]), wherein the output section includes a first inverter circuit (INV-4), the output of which is electrically connected to the first signal line (SA [n]), and a second inverter circuit (INV-2), the output of which is electrically connected to the second signal line (SB [n]), the first inverter circuit (INV-4) includes a third transistor (TRA, TRB) and the second inverter circuit (INV-2) includes a fourth transistor (TRA, TRB), a channel width of the fourth transistor (TRA, TRB) is larger than a channel width of the third transistor (TRA, TRB), both the inputs of said first inverter circuit (INV-4) and said second inverter circuit (INV-2) are coupled to a data line (VDR [n]).