An array substrate of a dual-gate design for a TFT-LCD, comprising a pixel unit group, wherein the pixel unit group comprises a first pixel and a second pixel arranged side by side and immediately next to each other in a first direction, and the array substrate further comprises a data line extended along a second direction intersecting with the first direction; the first pixel comprises a first pixel electrode, a first switching element, and a first connection portion extending and protruding from the first pixel electrode; the second pixel comprises a second pixel electrode, a second switching element, and a second connection portion extending and protruding from the second pixel electrode; the first pixel electrode and the first switching element are electrically connected to each other via the first connection portion; the second pixel electrode and the second switching element are electrically connected to each other via the second connection portion; wherein the pixel unit group comprises a first edge and a second edge which are opposite to each other in the first direction, and the first edge is closer to the data line than the second edge; both of the first switching element and the second switching element are connected to the data line, and are closer to the first edge of the pixel unit group than to the second edge in the first direction; the first connection portion and the first pixel electrode are in an integral structure and of a same material, and the second connection portion and the second pixel electrode are in an integral structure and of a same material; a length of the first connection portion is not equal to a length of the second connection portion; characterized in that a lateral distance in the second direction between the first pixel electrode and a gate line for driving the first pixel is larger than five micrometers; and a lateral distance in the second direction between the second pixel electrode and a gate line for driving the second pixel is larger than five mircometers. wherein the pixel unit group comprises a first pixel and a second pixel arranged side by side and immediately next to each other in a first direction, and the array substrate further comprises a data line extended along a second direction intersecting with the first direction; the first pixel comprises a first pixel electrode, a first switching element, and a first connection portion extending and protruding from the first pixel electrode; the second pixel comprises a second pixel electrode, a second switching element, and a second connection portion extending and protruding from the second pixel electrode; the first pixel electrode and the first switching element are electrically connected to each other via the first connection portion; the second pixel electrode and the second switching element are electrically connected to each other via the second connection portion; wherein the pixel unit group comprises a first edge and a second edge which are opposite to each other in the first direction, and the first edge is closer to the data line than the second edge; both of the first switching element and the second switching element are connected to the data line, and are closer to the first edge of the pixel unit group than to the second edge in the first direction; the first connection portion and the first pixel electrode are in an integral structure and of a same material, and the second connection portion and the second pixel electrode are in an integral structure and of a same material; a length of the first connection portion is not equal to a length of the second connection portion; characterized in that a lateral distance in the second direction between the first pixel electrode and a gate line for driving the first pixel is larger than five micrometers; and a lateral distance in the second direction between the second pixel electrode and a gate line for driving the second pixel is larger than five mircometers.