An extension device (3, 4) configured to be supplied with a first power-supply voltage from a host (1, 2) and communicate with the host via signals of a clock, a command/response, and data, using either a first voltage signaling or a second voltage signaling lower than the first voltage signaling for communication as input/output signal levels of the signals, the extension device comprising: a power/ground terminal configured to be supplied with power from the host; a clock terminal configured to input the clock and be initially set to a threshold of the second voltage signaling; a command terminal configured to receive the command and transmit the response; a plurality of data terminals (TD4-TD6) configured to perform input and output of the data; an I/O cell unit connected to the clock terminal, the command terminal, and the data terminals, a clock reception unit capable of determining the kind of a clock input into the clock terminal; and a signal voltage control unit configured to control a signaling of the I/O cell unit, wherein the signal voltage control unit is configured to set the I/O cell unit to either the first or the second voltage signaling which is equivalent to the connected host signaling, characterized in that the extension device (3, 4) is configured, when connected to the host (1, 2) and receives the power supply voltage, to move to an LVS identification mode after passage of a rise time (TPRU) from the power-on time, wherein the LVS identification mode comprises: detecting, at the clock terminal, clock pulses from the host at a period of ramp-up time from the power-on to the rise, and, based on the detected clock pulses, setting, by the signal voltage control unit, the power supply of the I/O cell unit to the first voltage signaling when the number of detected clock pulses is equal to or greater than two, and setting, by the signal voltage control unit, the power supply of the I/O cell unit to the second voltage signaling when the number of detected clock pulses is one. a power/ground terminal configured to be supplied with power from the host; a clock terminal configured to input the clock and be initially set to a threshold of the second voltage signaling; a command terminal configured to receive the command and transmit the response; a plurality of data terminals (TD4-TD6) configured to perform input and output of the data; an I/O cell unit connected to the clock terminal, the command terminal, and the data terminals, a clock reception unit capable of determining the kind of a clock input into the clock terminal; and a signal voltage control unit configured to control a signaling of the I/O cell unit, wherein the signal voltage control unit is configured to set the I/O cell unit to either the first or the second voltage signaling which is equivalent to the connected host signaling, characterized in that the extension device (3, 4) is configured, when connected to the host (1, 2) and receives the power supply voltage, to move to an LVS identification mode after passage of a rise time (TPRU) from the power-on time, wherein the LVS identification mode comprises: detecting, at the clock terminal, clock pulses from the host at a period of ramp-up time from the power-on to the rise, and, based on the detected clock pulses, setting, by the signal voltage control unit, the power supply of the I/O cell unit to the first voltage signaling when the number of detected clock pulses is equal to or greater than two, and setting, by the signal voltage control unit, the power supply of the I/O cell unit to the second voltage signaling when the number of detected clock pulses is one. detecting, at the clock terminal, clock pulses from the host at a period of ramp-up time from the power-on to the rise, and, based on the detected clock pulses, setting, by the signal voltage control unit, the power supply of the I/O cell unit to the first voltage signaling when the number of detected clock pulses is equal to or greater than two, and setting, by the signal voltage control unit, the power supply of the I/O cell unit to the second voltage signaling when the number of detected clock pulses is one.