A current measuring circuit (100; 200; 300) for providing a current flow signal indicative of current flow between a first terminal (102; 202; 302) and second terminal (104; 204; 304), comprising: a main transistor having a main drain, a main source (105; 205) and a main gate, wherein the main source (105; 205) and the main drain define a main drain-source path, the main drain is connected to the first terminal (102; 202; 302), the main source is connected to the second terminal (104; 204; 304) and the main gate is connected to a first control terminal (109; 209); a sense transistor having a sense drain, a sense source (107; 207) and a sense gate, wherein the sense source (107; 207) and the sense drain define a sense drain-source path, the sense drain is connected to the first terminal (102; 202; 302) and the sense gate is connected to the first control terminal (109; 209); a bypass switch (108; 208; 308) having: a controllable conduction path connected in parallel with the main drain-source path of the main transistor between the first and second terminals (102; 202; 302, 104; 204; 304); and a second control terminal (111; 211) for enabling or preventing a current flow through the controllable conduction path; characterized by an output amplifier (110; 210; 310) having: an input connected to both the sense source (107; 207) of the sense transistor and the controllable conduction path of the bypass switch (108; 208; 308); and an output for providing the current flow signal; and a controller (118; 218; 318) configured to set, in accordance with the current flow signal, a first control signal for the first control terminal (109; 209) and a second control signal for the second control terminal (111; 211) in order to enable current flow through either: each of the respective drain-source paths of the main and sense transistors; or the controllable conduction path of the bypass switch (108; 208; 308). a main transistor having a main drain, a main source (105; 205) and a main gate, wherein the main source (105; 205) and the main drain define a main drain-source path, the main drain is connected to the first terminal (102; 202; 302), the main source is connected to the second terminal (104; 204; 304) and the main gate is connected to a first control terminal (109; 209); a sense transistor having a sense drain, a sense source (107; 207) and a sense gate, wherein the sense source (107; 207) and the sense drain define a sense drain-source path, the sense drain is connected to the first terminal (102; 202; 302) and the sense gate is connected to the first control terminal (109; 209); a bypass switch (108; 208; 308) having: a controllable conduction path connected in parallel with the main drain-source path of the main transistor between the first and second terminals (102; 202; 302, 104; 204; 304); and a second control terminal (111; 211) for enabling or preventing a current flow through the controllable conduction path; characterized by an output amplifier (110; 210; 310) having: an input connected to both the sense source (107; 207) of the sense transistor and the controllable conduction path of the bypass switch (108; 208; 308); and an output for providing the current flow signal; and a controller (118; 218; 318) configured to set, in accordance with the current flow signal, a first control signal for the first control terminal (109; 209) and a second control signal for the second control terminal (111; 211) in order to enable current flow through either: each of the respective drain-source paths of the main and sense transistors; or the controllable conduction path of the bypass switch (108; 208; 308). a controllable conduction path connected in parallel with the main drain-source path of the main transistor between the first and second terminals (102; 202; 302, 104; 204; 304); and a second control terminal (111; 211) for enabling or preventing a current flow through the controllable conduction path; characterized by an output amplifier (110; 210; 310) having: an input connected to both the sense source (107; 207) of the sense transistor and the controllable conduction path of the bypass switch (108; 208; 308); and an output for providing the current flow signal; and a controller (118; 218; 318) configured to set, in accordance with the current flow signal, a first control signal for the first control terminal (109; 209) and a second control signal for the second control terminal (111; 211) in order to enable current flow through either: each of the respective drain-source paths of the main and sense transistors; or the controllable conduction path of the bypass switch (108; 208; 308). an input connected to both the sense source (107; 207) of the sense transistor and the controllable conduction path of the bypass switch (108; 208; 308); and an output for providing the current flow signal; and a controller (118; 218; 318) configured to set, in accordance with the current flow signal, a first control signal for the first control terminal (109; 209) and a second control signal for the second control terminal (111; 211) in order to enable current flow through either: each of the respective drain-source paths of the main and sense transistors; or the controllable conduction path of the bypass switch (108; 208; 308). each of the respective drain-source paths of the main and sense transistors; or the controllable conduction path of the bypass switch (108; 208; 308).