An electronic device comprising: a structure comprising a plurality of silicon carbide semiconductor layers having alternating doping types, the plurality of semiconductor layers comprising: a base layer of a first doping type that includes a highly doped well forming a first contact region of the electronic device; and one or more contact layers (82, 84) directly on the base layer that form a second contact region of the electronic device and that are of a second doping type that is opposite the first doping type, wherein the one or more contact layers comprise sidewall surfaces adjacent to an upper surface of the base layer, wherein the upper surface of the base layer is a silicon face, Si face, of the base layer, and the sidewall surfaces of the one or more contact layers (82, 84) are alternating silicon and carbon atoms, forming an A-face of SiC; a semiconductor ledge layer that passivates an interface charge at the upper surface of the base layer, wherein the semiconductor ledge layer is a highly doped silicon carbide semiconductor ledge laye directly on the upper surface of the base layer, and having a Si-face upper surface, the highly doped semiconductor ledge layer is of the first doping type, and a thickness of the semiconductor ledge layer decreases in a direction from the highly doped well toward the one or more contact layer; said decrease being obtainable by thermally oxidizing an initial highly-doped semiconductor ledge layer present directly on both the upper surface of the base layer and on the sidewall surfaces of the one or more contact layers, wherein the part of said initial ledge layer on the sidewalls of the one or more contact layers is entirely oxidized, whereas it is partially preserved on the upper surface of the base layer, thus forming said highly-doped ledge layer a passivation layer on the highly doped semiconductor ledge layer and the sidewall surfaces of the one or more contact layers such that the passivation layer is on the entire semiconductor ledge layer; and a bottom semiconductor layer that forms a third contact region; wherein the electronic device is one of a Gate Turn- Off Thyristor, GTO, a Bipolar Junction Transistor, BJT, or a MOS-Controlled Thyristor, MCT. a base layer of a first doping type that includes a highly doped well forming a first contact region of the electronic device; and one or more contact layers (82, 84) directly on the base layer that form a second contact region of the electronic device and that are of a second doping type that is opposite the first doping type, wherein the one or more contact layers comprise sidewall surfaces adjacent to an upper surface of the base layer, wherein the upper surface of the base layer is a silicon face, Si face, of the base layer, and the sidewall surfaces of the one or more contact layers (82, 84) are alternating silicon and carbon atoms, forming an A-face of SiC; a semiconductor ledge layer that passivates an interface charge at the upper surface of the base layer, wherein the semiconductor ledge layer is a highly doped silicon carbide semiconductor ledge laye directly on the upper surface of the base layer, and having a Si-face upper surface, the highly doped semiconductor ledge layer is of the first doping type, and a thickness of the semiconductor ledge layer decreases in a direction from the highly doped well toward the one or more contact layer; said decrease being obtainable by thermally oxidizing an initial highly-doped semiconductor ledge layer present directly on both the upper surface of the base layer and on the sidewall surfaces of the one or more contact layers, wherein the part of said initial ledge layer on the sidewalls of the one or more contact layers is entirely oxidized, whereas it is partially preserved on the upper surface of the base layer, thus forming said highly-doped ledge layer a passivation layer on the highly doped semiconductor ledge layer and the sidewall surfaces of the one or more contact layers such that the passivation layer is on the entire semiconductor ledge layer; and a bottom semiconductor layer that forms a third contact region; wherein the electronic device is one of a Gate Turn- Off Thyristor, GTO, a Bipolar Junction Transistor, BJT, or a MOS-Controlled Thyristor, MCT.