A display device, comprising: a plurality of pixels including a first pixel and a second pixel adjacent to each other in a first direction; a plurality of scan lines (151, 152, 152') extending in the first direction and adjacent to each other in a second direction perpendicular to the first direction; a plurality of data lines crossing the plurality of scan lines (151, 152, 152'), the plurality of data lines is configured to transmit a data signal; and a plurality of driving voltage lines crossing the plurality of scan lines (151, 152, 152'), the plurality of driving voltage lines is configured to transmit a driving voltage; wherein each of the first pixel and the second pixel comprises a driving gate electrode, wherein a first driving voltage line among the plurality of driving voltage lines electrically connected to the first pixel includes a first extending part having an edge extending in the first direction,the first extending part overlapping the driving gate electrode of the first pixel, wherein a second driving voltage line among the plurality of driving voltage lines electrically connected to the second pixel includes a second extending part having an edge extending in the first direction, the second extending part overlapping the driving gate electrode of the second pixel, wherein each of first extending part and of the second extending part includes a first recess portion disposed at the edge, and the driving gate electrode and the first and the second extending parts each correspond to an electrode forming an electrode pair of a capacitor (Cst) of each of the first and the second pixels (PX1, PX2), a first pixel electrode of the first pixel overlaps the driving gate electrodes of the first and second pixels (PX1, PX2) in a plan view, and a region where the first pixel electrode and the driving gate electrode of the first pixel are overlapped also overlaps the first extending part characterized in that the two extending parts disposed at the two adjacent pixels (PX1, PX2) in the first direction are connected to each other, a center line of the first recess portion in each of the first pixel and the second pixel is offset in a direction away from the first pixel electrode of the first pixel with respect to a center line of the driving gate electrode of each of the two adjacent pixels (PX1, PX2), wherein both center lines (CL2, CL1) extend in the second direction, and the shape of the first and the second extending parts of the two adjacent pixels (PX1, PX2) are formed to be symmetrical to each other with respect to the second direction. a plurality of pixels including a first pixel and a second pixel adjacent to each other in a first direction; a plurality of scan lines (151, 152, 152') extending in the first direction and adjacent to each other in a second direction perpendicular to the first direction; a plurality of data lines crossing the plurality of scan lines (151, 152, 152'), the plurality of data lines is configured to transmit a data signal; and a plurality of driving voltage lines crossing the plurality of scan lines (151, 152, 152'), the plurality of driving voltage lines is configured to transmit a driving voltage; wherein each of the first pixel and the second pixel comprises a driving gate electrode, wherein a first driving voltage line among the plurality of driving voltage lines electrically connected to the first pixel includes a first extending part having an edge extending in the first direction,the first extending part overlapping the driving gate electrode of the first pixel, wherein a second driving voltage line among the plurality of driving voltage lines electrically connected to the second pixel includes a second extending part having an edge extending in the first direction, the second extending part overlapping the driving gate electrode of the second pixel, wherein each of first extending part and of the second extending part includes a first recess portion disposed at the edge, and the driving gate electrode and the first and the second extending parts each correspond to an electrode forming an electrode pair of a capacitor (Cst) of each of the first and the second pixels (PX1, PX2), a first pixel electrode of the first pixel overlaps the driving gate electrodes of the first and second pixels (PX1, PX2) in a plan view, and a region where the first pixel electrode and the driving gate electrode of the first pixel are overlapped also overlaps the first extending part characterized in that the two extending parts disposed at the two adjacent pixels (PX1, PX2) in the first direction are connected to each other, a center line of the first recess portion in each of the first pixel and the second pixel is offset in a direction away from the first pixel electrode of the first pixel with respect to a center line of the driving gate electrode of each of the two adjacent pixels (PX1, PX2), wherein both center lines (CL2, CL1) extend in the second direction, and the shape of the first and the second extending parts of the two adjacent pixels (PX1, PX2) are formed to be symmetrical to each other with respect to the second direction.