For use in a wireless communications device, a decoder capable of decoding encoded transmissions, the decoder comprising: a plurality of memory units configured to store data; a plurality of unit decoders; and a data switch, wherein each of the plurality of unit decoders comprises: a processor array; and a plurality of instructions wherein a portion of said plurality of instructions is stored in an instruction controller, and wherein the plurality of instructions is configured to cause each of said plurality of unit decoders to: perform a Turbo decoding operation; and decode at least a portion of a received data using a decoding matrix, wherein at least two of the plurality of unit decoders are configured to perform the Turbo decoding operation using a parallel process, wherein the data switch is coupled between the plurality of unit decoders and the plurality of memory units, the data switch being configured to switch the Turbo decoding operation between a long term evolution, LTE, based operation and a Wideband Code Division Multiple Access, WCDMA, based operation, and wherein based on a data block size to be processed, the data switch performs a switching between an independent processing and a cross processing in the LTE based operation, wherein the independent processing means that each of the plurality of unit decoders decodes independently using a single respective memory unit of the plurality of memory units, whereas the cross processing enables each of the plurality of unit decoders to decode using cross connections to one or more of the plurality of memory units. a plurality of memory units configured to store data; a plurality of unit decoders; and a data switch, wherein each of the plurality of unit decoders comprises: a processor array; and a plurality of instructions wherein a portion of said plurality of instructions is stored in an instruction controller, and wherein the plurality of instructions is configured to cause each of said plurality of unit decoders to: perform a Turbo decoding operation; and decode at least a portion of a received data using a decoding matrix, a processor array; and a plurality of instructions wherein a portion of said plurality of instructions is stored in an instruction controller, and wherein the plurality of instructions is configured to cause each of said plurality of unit decoders to: perform a Turbo decoding operation; and decode at least a portion of a received data using a decoding matrix, perform a Turbo decoding operation; and decode at least a portion of a received data using a decoding matrix, wherein at least two of the plurality of unit decoders are configured to perform the Turbo decoding operation using a parallel process, wherein the data switch is coupled between the plurality of unit decoders and the plurality of memory units, the data switch being configured to switch the Turbo decoding operation between a long term evolution, LTE, based operation and a Wideband Code Division Multiple Access, WCDMA, based operation, and wherein based on a data block size to be processed, the data switch performs a switching between an independent processing and a cross processing in the LTE based operation,