An integrated circuit for controlling a synchronization receiving device, the integrated circuit comprising: synchronization reception circuitry for receiving predetermined wireless synchronization signals from synchronization sources including a synchronization source which derives its synchronization signal from a network node and a wireless device; synchronization source selection circuitry for selecting a synchronization source from among the synchronization sources according to a metric, and timing circuitry for determining or adjusting the timing for transmission or reception of data according to the synchronization signal of the synchronization source selected by the synchronization source selection circuitry characterized by metric acquisition circuitry for determining the selection metric for each of the synchronization sources based on a combination of: - a selection bias which is determined as one of: 1. a value which decreases with increasing number of hops between the network node and the synchronization receiving device, when the number of hops is counted increasingly starting from the network node; 2. a value which increases with increasing number of hops between the network node and the synchronization receiving device, when the number of hops is counted decreasingly starting from the network node with a predetermined maximum number of hops; - quality of the received synchronization signal. synchronization reception circuitry for receiving predetermined wireless synchronization signals from synchronization sources including a synchronization source which derives its synchronization signal from a network node and a wireless device; synchronization source selection circuitry for selecting a synchronization source from among the synchronization sources according to a metric, and timing circuitry for determining or adjusting the timing for transmission or reception of data according to the synchronization signal of the synchronization source selected by the synchronization source selection circuitry characterized by metric acquisition circuitry for determining the selection metric for each of the synchronization sources based on a combination of: - a selection bias which is determined as one of: 1. a value which decreases with increasing number of hops between the network node and the synchronization receiving device, when the number of hops is counted increasingly starting from the network node; 2. a value which increases with increasing number of hops between the network node and the synchronization receiving device, when the number of hops is counted decreasingly starting from the network node with a predetermined maximum number of hops; - quality of the received synchronization signal. - a selection bias which is determined as one of: 1. a value which decreases with increasing number of hops between the network node and the synchronization receiving device, when the number of hops is counted increasingly starting from the network node; 2. a value which increases with increasing number of hops between the network node and the synchronization receiving device, when the number of hops is counted decreasingly starting from the network node with a predetermined maximum number of hops; 1. a value which decreases with increasing number of hops between the network node and the synchronization receiving device, when the number of hops is counted increasingly starting from the network node; 2. a value which increases with increasing number of hops between the network node and the synchronization receiving device, when the number of hops is counted decreasingly starting from the network node with a predetermined maximum number of hops; - quality of the received synchronization signal.