A display, comprising: a substrate defined with a first area and a second area; a low-temperature-poly-silicon (LTPS) layer provided in the first area; a first insulation layer provided on the LTPS layer in the first area; a metal oxide layer provided in the first area and the second area, the metal oxide layer in the first area being provided on the first insulation layer; a second insulation layer provided in the first area and the second area, the second insulation layer in the first area having contact holes for exposing at least some portion of the LTPS layer thereunder, and the second insulation layer in the second area is arranged on the metal oxide layer to expose at least two portions of the metal oxide layer separated by a portion covered by the second insulation layer; a first metal layer in the first area and the second area, the first metal layer in the first area being in contact with the exposed portions of the LTPS layer, and the first metal layer in the second area being insulated from the metal oxide layer by the second insulation layer thereunder; a third insulation layer covering the first metal layer in the first area and the second area; a second metal layer provided in the first area and the second area, the second metal layer in the first area being in contact with the first metal layer via a contact hole through the third insulation layer, and the second metal layer in the second area being in contact with the metal oxide layer via a contact hole through the third insulation layer; and a fourth insulation layer provided in the first area and the second area over the second metal layer, wherein the metal oxide layer in the first area has a higher electrical conductivity than the portion of the metal oxide layer covered by the second insulation layer in the second area, wherein the low-temperature-poly-silicon (LTPS) layer serves as an active layer of an LTPS TFT and the metal oxide layer in the second area serves as an active layer of an oxide TFT, wherein the metal oxide layer in the first area serves as a gate electrode of the LTPS TFT, wherein the first metal layer provides a source electrode and a drain electrode of the LTPS TFT in the first area, and the first metal layer provides a gate electrode of the oxide TFT in the second area, and wherein the second metal layer provides a source electrode and a drain electrode of the oxide TFT in the second area. a substrate defined with a first area and a second area; a low-temperature-poly-silicon (LTPS) layer provided in the first area; a first insulation layer provided on the LTPS layer in the first area; a metal oxide layer provided in the first area and the second area, the metal oxide layer in the first area being provided on the first insulation layer; a second insulation layer provided in the first area and the second area, the second insulation layer in the first area having contact holes for exposing at least some portion of the LTPS layer thereunder, and the second insulation layer in the second area is arranged on the metal oxide layer to expose at least two portions of the metal oxide layer separated by a portion covered by the second insulation layer; a first metal layer in the first area and the second area, the first metal layer in the first area being in contact with the exposed portions of the LTPS layer, and the first metal layer in the second area being insulated from the metal oxide layer by the second insulation layer thereunder; a third insulation layer covering the first metal layer in the first area and the second area; a second metal layer provided in the first area and the second area, the second metal layer in the first area being in contact with the first metal layer via a contact hole through the third insulation layer, and the second metal layer in the second area being in contact with the metal oxide layer via a contact hole through the third insulation layer; and a fourth insulation layer provided in the first area and the second area over the second metal layer, wherein the metal oxide layer in the first area has a higher electrical conductivity than the portion of the metal oxide layer covered by the second insulation layer in the second area, wherein the low-temperature-poly-silicon (LTPS) layer serves as an active layer of an LTPS TFT and the metal oxide layer in the second area serves as an active layer of an oxide TFT, wherein the metal oxide layer in the first area serves as a gate electrode of the LTPS TFT, wherein the first metal layer provides a source electrode and a drain electrode of the LTPS TFT in the first area, and the first metal layer provides a gate electrode of the oxide TFT in the second area, and wherein the second metal layer provides a source electrode and a drain electrode of the oxide TFT in the second area.