A method comprising: in a storage device that is embedded in a host device, wherein the storage device includes a storage manager and a plurality of memory cells, the storage device containing in a first group of the plurality of memory cells data from a programming device, performing: reading the data from the first group of memory cells by applying a first set of reference voltages (350, 360, 370); calculating a first number of erroneous data bits in the read data; and when the first number of erroneous data bits is larger than a threshold: generating a second set of reference voltages (352, 354, 362, 364, 372, 374) by lowering reference voltages of the first set of reference voltages (350, 360, 370); rereading the data from the first group of memory cells by applying the second set of reference voltages (352, 354, 362, 364, 372, 374); calculating a second number of erroneous data bits in the reread data; and when the second number of erroneous data bits is less than or equal to the threshold, correcting the reread data and writing the corrected data to a second group (126, 128) of the plurality of memory cells, characterised in that: the second set of reference voltages (352, 354, 362, 364, 372, 374) is generated by lowering reference voltages of the first set of reference voltages (350, 360, 370) by an amount that is determined based on the first number of erroneous data bits. in a storage device that is embedded in a host device, wherein the storage device includes a storage manager and a plurality of memory cells, the storage device containing in a first group of the plurality of memory cells data from a programming device, performing: reading the data from the first group of memory cells by applying a first set of reference voltages (350, 360, 370); calculating a first number of erroneous data bits in the read data; and when the first number of erroneous data bits is larger than a threshold: generating a second set of reference voltages (352, 354, 362, 364, 372, 374) by lowering reference voltages of the first set of reference voltages (350, 360, 370); rereading the data from the first group of memory cells by applying the second set of reference voltages (352, 354, 362, 364, 372, 374); calculating a second number of erroneous data bits in the reread data; and when the second number of erroneous data bits is less than or equal to the threshold, correcting the reread data and writing the corrected data to a second group (126, 128) of the plurality of memory cells, reading the data from the first group of memory cells by applying a first set of reference voltages (350, 360, 370); calculating a first number of erroneous data bits in the read data; and when the first number of erroneous data bits is larger than a threshold: generating a second set of reference voltages (352, 354, 362, 364, 372, 374) by lowering reference voltages of the first set of reference voltages (350, 360, 370); rereading the data from the first group of memory cells by applying the second set of reference voltages (352, 354, 362, 364, 372, 374); calculating a second number of erroneous data bits in the reread data; and when the second number of erroneous data bits is less than or equal to the threshold, correcting the reread data and writing the corrected data to a second group (126, 128) of the plurality of memory cells, generating a second set of reference voltages (352, 354, 362, 364, 372, 374) by lowering reference voltages of the first set of reference voltages (350, 360, 370); rereading the data from the first group of memory cells by applying the second set of reference voltages (352, 354, 362, 364, 372, 374); calculating a second number of erroneous data bits in the reread data; and when the second number of erroneous data bits is less than or equal to the threshold, correcting the reread data and writing the corrected data to a second group (126, 128) of the plurality of memory cells, characterised in that: the second set of reference voltages (352, 354, 362, 364, 372, 374) is generated by lowering reference voltages of the first set of reference voltages (350, 360, 370) by an amount that is determined based on the first number of erroneous data bits. the second set of reference voltages (352, 354, 362, 364, 372, 374) is generated by lowering reference voltages of the first set of reference voltages (350, 360, 370) by an amount that is determined based on the first number of erroneous data bits.