An electronic endoscopic apparatus comprising an image processing processor and an endoscopic scope, wherein the image processing processor comprises: a display clock generating unit configured to generate a display clock; a display synchronization signal generating unit configured to generate a display synchronization signal based on the display clock; and the endoscopic scope comprises: a solid-state imaging device configured to convert optical information into an electric signal and output the converted electric signal as an image signal, characterized in that the image processing processor comprises: an imaging clock generating unit configured to generate a master imaging clock as a source for driving a solid-state imaging device, and a multiplying/dividing unit configured to generate a first imaging clock by multiplying and/or dividing the master imaging clock and a second imaging clock by multiplying and/or dividing the master imaging clock; and a control unit configured to compare a phase of the display synchronization signal with a phase of the first imaging clock and control oscillation of the imaging clock generating unit based on a result of the comparison, and the endoscopic scope comprises: a multiplying unit configured to generate a multiplication imaging clock by multiplying the second imaging clock; and a drive signal generating unit configured to generate a signal that drives the solid-state imaging device based on the multiplication imaging clock. a display clock generating unit configured to generate a display clock; a display synchronization signal generating unit configured to generate a display synchronization signal based on the display clock; and the endoscopic scope comprises: a solid-state imaging device configured to convert optical information into an electric signal and output the converted electric signal as an image signal, characterized in that the image processing processor comprises: an imaging clock generating unit configured to generate a master imaging clock as a source for driving a solid-state imaging device, and a multiplying/dividing unit configured to generate a first imaging clock by multiplying and/or dividing the master imaging clock and a second imaging clock by multiplying and/or dividing the master imaging clock; and a control unit configured to compare a phase of the display synchronization signal with a phase of the first imaging clock and control oscillation of the imaging clock generating unit based on a result of the comparison, and the endoscopic scope comprises: a multiplying unit configured to generate a multiplication imaging clock by multiplying the second imaging clock; and a drive signal generating unit configured to generate a signal that drives the solid-state imaging device based on the multiplication imaging clock. a solid-state imaging device configured to convert optical information into an electric signal and output the converted electric signal as an image signal, characterized in that the image processing processor comprises: an imaging clock generating unit configured to generate a master imaging clock as a source for driving a solid-state imaging device, and a multiplying/dividing unit configured to generate a first imaging clock by multiplying and/or dividing the master imaging clock and a second imaging clock by multiplying and/or dividing the master imaging clock; and an imaging clock generating unit configured to generate a master imaging clock as a source for driving a solid-state imaging device, and a multiplying/dividing unit configured to generate a first imaging clock by multiplying and/or dividing the master imaging clock and a second imaging clock by multiplying and/or dividing the master imaging clock; and a control unit configured to compare a phase of the display synchronization signal with a phase of the first imaging clock and control oscillation of the imaging clock generating unit based on a result of the comparison, and the endoscopic scope comprises: a multiplying unit configured to generate a multiplication imaging clock by multiplying the second imaging clock; and a drive signal generating unit configured to generate a signal that drives the solid-state imaging device based on the multiplication imaging clock. a multiplying unit configured to generate a multiplication imaging clock by multiplying the second imaging clock; and a drive signal generating unit configured to generate a signal that drives the solid-state imaging device based on the multiplication imaging clock.