An apparatus, comprising: a memory controller (215; 325; 425); and a plurality of memory devices (230-1,..., 230-N; 330-1, 330-2; 430-1,..., 430-M; 530-0, 530-1, 530-2, 530-3) configured to receive a shared chip enable signal from the memory controller, wherein the memory controller (215; 325; 425) is configured to: transition a state of the shared chip enable signal to activate a memory volume (313-0, 313-1, 313-2, 313-3; 413-0, 413-1, 413-2,413-3; 513-0, 513-1, 513-2, 513-3) of each of the plurality of memory devices; and issue a cycle to the plurality of memory devices (230-1,..., 230-N; 330-1, 330-2; 430-1,..., 430-M; 530-0, 530-1, 530-2, 530-3), characterized by: wherein each of the plurality of memory devices is configured to responsive to the cycle being a command cycle: maintain the corresponding memory volume (313-0, 313-1, 313-2, 313-3; 413-0, 413-1, 413-2,413-3; 513-0, 513-1, 513-2, 513-3) in an active state and execute a subsequent command from the memory controller (215; 325; 425) if the command corresponding to the command cycle is a volume select command that targets the corresponding memory volume; and return the corresponding memory volume (313-0, 313-1, 313-2, 313-3; 413-0, 413-1, 413-2,413-3; 513-0, 513-1, 513-2, 513-3) to its state prior to being activated if the command corresponding to the command cycle is not a volume select command. a memory controller (215; 325; 425); and a plurality of memory devices (230-1,..., 230-N; 330-1, 330-2; 430-1,..., 430-M; 530-0, 530-1, 530-2, 530-3) configured to receive a shared chip enable signal from the memory controller, wherein the memory controller (215; 325; 425) is configured to: transition a state of the shared chip enable signal to activate a memory volume (313-0, 313-1, 313-2, 313-3; 413-0, 413-1, 413-2,413-3; 513-0, 513-1, 513-2, 513-3) of each of the plurality of memory devices; and issue a cycle to the plurality of memory devices (230-1,..., 230-N; 330-1, 330-2; 430-1,..., 430-M; 530-0, 530-1, 530-2, 530-3), characterized by: wherein each of the plurality of memory devices is configured to responsive to the cycle being a command cycle: maintain the corresponding memory volume (313-0, 313-1, 313-2, 313-3; 413-0, 413-1, 413-2,413-3; 513-0, 513-1, 513-2, 513-3) in an active state and execute a subsequent command from the memory controller (215; 325; 425) if the command corresponding to the command cycle is a volume select command that targets the corresponding memory volume; and return the corresponding memory volume (313-0, 313-1, 313-2, 313-3; 413-0, 413-1, 413-2,413-3; 513-0, 513-1, 513-2, 513-3) to its state prior to being activated if the command corresponding to the command cycle is not a volume select command. transition a state of the shared chip enable signal to activate a memory volume (313-0, 313-1, 313-2, 313-3; 413-0, 413-1, 413-2,413-3; 513-0, 513-1, 513-2, 513-3) of each of the plurality of memory devices; and issue a cycle to the plurality of memory devices (230-1,..., 230-N; 330-1, 330-2; 430-1,..., 430-M; 530-0, 530-1, 530-2, 530-3), characterized by: wherein each of the plurality of memory devices is configured to responsive to the cycle being a command cycle: maintain the corresponding memory volume (313-0, 313-1, 313-2, 313-3; 413-0, 413-1, 413-2,413-3; 513-0, 513-1, 513-2, 513-3) in an active state and execute a subsequent command from the memory controller (215; 325; 425) if the command corresponding to the command cycle is a volume select command that targets the corresponding memory volume; and return the corresponding memory volume (313-0, 313-1, 313-2, 313-3; 413-0, 413-1, 413-2,413-3; 513-0, 513-1, 513-2, 513-3) to its state prior to being activated if the command corresponding to the command cycle is not a volume select command. maintain the corresponding memory volume (313-0, 313-1, 313-2, 313-3; 413-0, 413-1, 413-2,413-3; 513-0, 513-1, 513-2, 513-3) in an active state and execute a subsequent command from the memory controller (215; 325; 425) if the command corresponding to the command cycle is a volume select command that targets the corresponding memory volume; and return the corresponding memory volume (313-0, 313-1, 313-2, 313-3; 413-0, 413-1, 413-2,413-3; 513-0, 513-1, 513-2, 513-3) to its state prior to being activated if the command corresponding to the command cycle is not a volume select command.