An integrated circuit, comprising: a substrate including a semiconductor material; active components disposed in the substrate; an interconnect region disposed over the substrate, the interconnect region including a dielectric material; and an interconnect disposed in the interconnect region, the interconnect comprising: a metal layer; a graphene layer (128, 132) disposed on one of a top surface of the metal layer or a bottom surface of the metal layer, the graphene layer having at least one atomic layer of grahene; and a hexagonal boron nitride (hBN) layer (126, 134) disposed on the graphene layer opposite from the metal layer, the hBN layer being one to three atomic layers thick, wherein the dielectric material touches the hBN layer opposite from the graphene layer; and wherein: the graphene layer is a lower graphene layer disposed on the bottom surface of the metal layer; the hBN layer is a lower hBN layer disposed on the lower graphene layer; the dielectric material is a first dielectric material; the interconnect region includes a second dielectric material, separate from the first dielectric material; and the interconnect further comprises: an upper graphene layer disposed on the top surface of the metal layer, the upper graphene layer having at least one atomic layer of graphene; and an upper hBN layer disposed on the upper graphene layer, opposite from the metal layer, the upper graphene layer being one to three atomic layers thick, wherein the second dielectric material touches the upper hBN layer opposite from the upper graphene layer. a substrate including a semiconductor material; active components disposed in the substrate; an interconnect region disposed over the substrate, the interconnect region including a dielectric material; and an interconnect disposed in the interconnect region, the interconnect comprising: a metal layer; a graphene layer (128, 132) disposed on one of a top surface of the metal layer or a bottom surface of the metal layer, the graphene layer having at least one atomic layer of grahene; and a hexagonal boron nitride (hBN) layer (126, 134) disposed on the graphene layer opposite from the metal layer, the hBN layer being one to three atomic layers thick, wherein the dielectric material touches the hBN layer opposite from the graphene layer; and a metal layer; a graphene layer (128, 132) disposed on one of a top surface of the metal layer or a bottom surface of the metal layer, the graphene layer having at least one atomic layer of grahene; and a hexagonal boron nitride (hBN) layer (126, 134) disposed on the graphene layer opposite from the metal layer, the hBN layer being one to three atomic layers thick, wherein the dielectric material touches the hBN layer opposite from the graphene layer; wherein: the graphene layer is a lower graphene layer disposed on the bottom surface of the metal layer; the hBN layer is a lower hBN layer disposed on the lower graphene layer; the dielectric material is a first dielectric material; the interconnect region includes a second dielectric material, separate from the first dielectric material; and the interconnect further comprises: an upper graphene layer disposed on the top surface of the metal layer, the upper graphene layer having at least one atomic layer of graphene; and an upper hBN layer disposed on the upper graphene layer, opposite from the metal layer, the upper graphene layer being one to three atomic layers thick, wherein the second dielectric material touches the upper hBN layer opposite from the upper graphene layer. the graphene layer is a lower graphene layer disposed on the bottom surface of the metal layer; the hBN layer is a lower hBN layer disposed on the lower graphene layer; the dielectric material is a first dielectric material; the interconnect region includes a second dielectric material, separate from the first dielectric material; and the interconnect further comprises: an upper graphene layer disposed on the top surface of the metal layer, the upper graphene layer having at least one atomic layer of graphene; and an upper hBN layer disposed on the upper graphene layer, opposite from the metal layer, the upper graphene layer being one to three atomic layers thick, wherein the second dielectric material touches the upper hBN layer opposite from the upper graphene layer. an upper graphene layer disposed on the top surface of the metal layer, the upper graphene layer having at least one atomic layer of graphene; and an upper hBN layer disposed on the upper graphene layer, opposite from the metal layer, the upper graphene layer being one to three atomic layers thick, wherein the second dielectric material touches the upper hBN layer opposite from the upper graphene layer.