A time of flight sensor (20, 40, 50), comprising a plurality of pixels, each of the plurality of pixels comprising,: a light receiving element; a first signal line and a second signal line; a first transistor in electrical communication with the light receiving element, the first transistor comprising a first gate in electrical communication with the first signal line; a first floating diffusion in electrical communication with the first transistor; a second transistor in electrical communication with the light receiving element, the second transistor comprising a second gate in electrical communication with the second signal line; a second floating diffusion in electrical communication with the second transistor; and a control circuit in electrical communication with the first and second signal lines (TRGO, TRG180), the control circuit comprising: a first comparator, wherein the first comparator is configured to compare a first voltage (VSLA), the first voltage (VSLA) depending on a voltage at the first floating diffusion, with a reference voltage (VREF); and a second comparator, wherein the second comparator is configured to compare a second voltage (VSLB), the second voltage (VSLB) depending on a voltage at the second floating diffusion, with the reference voltage (VREF); wherein, in a case where at least one of the first voltage (VSLA) or the second voltage (VSLB) reaches the reference voltage (VREF), the control circuit sets the first and second signal lines (TRGO, TRG180) to a lower level; and a NAND circuit in electrical communication with the first comparator and the second comparator. a light receiving element; a first signal line and a second signal line; a first transistor in electrical communication with the light receiving element, the first transistor comprising a first gate in electrical communication with the first signal line; a first floating diffusion in electrical communication with the first transistor; a second transistor in electrical communication with the light receiving element, the second transistor comprising a second gate in electrical communication with the second signal line; a second floating diffusion in electrical communication with the second transistor; and a control circuit in electrical communication with the first and second signal lines (TRGO, TRG180), the control circuit comprising: a first comparator, wherein the first comparator is configured to compare a first voltage (VSLA), the first voltage (VSLA) depending on a voltage at the first floating diffusion, with a reference voltage (VREF); and a second comparator, wherein the second comparator is configured to compare a second voltage (VSLB), the second voltage (VSLB) depending on a voltage at the second floating diffusion, with the reference voltage (VREF); wherein, in a case where at least one of the first voltage (VSLA) or the second voltage (VSLB) reaches the reference voltage (VREF), the control circuit sets the first and second signal lines (TRGO, TRG180) to a lower level; and a NAND circuit in electrical communication with the first comparator and the second comparator. a first comparator, wherein the first comparator is configured to compare a first voltage (VSLA), the first voltage (VSLA) depending on a voltage at the first floating diffusion, with a reference voltage (VREF); and a second comparator, wherein the second comparator is configured to compare a second voltage (VSLB), the second voltage (VSLB) depending on a voltage at the second floating diffusion, with the reference voltage (VREF); wherein, in a case where at least one of the first voltage (VSLA) or the second voltage (VSLB) reaches the reference voltage (VREF), the control circuit sets the first and second signal lines (TRGO, TRG180) to a lower level; and a NAND circuit in electrical communication with the first comparator and the second comparator.