A method for the fabrication of a three-dimensional thin-film solar cell semiconductor substrate having an inverted pyramidal structure with a layer thickness in the range of 1 to 60 microns and a peak to peak thickness in the range of approximately 100 to 500 microns, the method comprising: forming a porous semiconductor layer having at least two different porosities on a semiconductor template comprising a pattern of a plurality of three-dimensional inverted pyramidal surface features, said three-dimensional inverted pyramidal surface features defined by top surface areas aligned along a crystallographic orientation plane of the semiconductor template and a plurality of walls each aligned along a crystallographic orientation plane of the semiconductor template wherein said walls form a plurality of inverted pyramidal cavities, said porous semiconductor layer formed substantially conformal to said semiconductor template, wherein said template comprising a plurality of three-dimensional inverted pyramidal surface features further comprises a plurality of at least two differently sized three-dimensional inverted pyramidal surface features comprising a larger set of three-dimensional inverted pyramidal surface features and a smaller set of three-dimensional inverted pyramidal surface features, wherein said larger set of inverted pyramidal cavities and smaller set of inverted pyramidal cavities are arranged in a staggered pattern on said semiconductor substrate and form three-dimensional structure of said semiconductor substrate; forming an epitaxial semiconductor layer with a thickness in the range of 1 to 60 microns on said porous semiconductor layer, wherein said epitaxial semiconductor layer is formed substantially conformal to said porous semiconductor layer; releasing said epitaxial semiconductor layer from said semiconductor template thereby forming a semiconductor substrate with an inverted pyramidal structure; and selectively forming through-holes in said semiconductor substrate with openings between the front and back lateral surface planes of said epitaxial semiconductor layer to form a partially transparent three-dimensional thin-film semiconductor substrate, said openings having diagonals in the range of 50 to 300 microns. forming a porous semiconductor layer having at least two different porosities on a semiconductor template comprising a pattern of a plurality of three-dimensional inverted pyramidal surface features, said three-dimensional inverted pyramidal surface features defined by top surface areas aligned along a crystallographic orientation plane of the semiconductor template and a plurality of walls each aligned along a crystallographic orientation plane of the semiconductor template wherein said walls form a plurality of inverted pyramidal cavities, said porous semiconductor layer formed substantially conformal to said semiconductor template, wherein said template comprising a plurality of three-dimensional inverted pyramidal surface features further comprises a plurality of at least two differently sized three-dimensional inverted pyramidal surface features comprising a larger set of three-dimensional inverted pyramidal surface features and a smaller set of three-dimensional inverted pyramidal surface features, wherein said larger set of inverted pyramidal cavities and smaller set of inverted pyramidal cavities are arranged in a staggered pattern on said semiconductor substrate and form three-dimensional structure of said semiconductor substrate; forming an epitaxial semiconductor layer with a thickness in the range of 1 to 60 microns on said porous semiconductor layer, wherein said epitaxial semiconductor layer is formed substantially conformal to said porous semiconductor layer; releasing said epitaxial semiconductor layer from said semiconductor template thereby forming a semiconductor substrate with an inverted pyramidal structure; and selectively forming through-holes in said semiconductor substrate with openings between the front and back lateral surface planes of said epitaxial semiconductor layer to form a partially transparent three-dimensional thin-film semiconductor substrate, said openings having diagonals in the range of 50 to 300 microns.