A nonvolatile semiconductor memory device comprising: a memory cell array constituted by memory blocks having electrically rewritable nonvolatile semiconductor memory cells, an arbitrary memory block in the memory cell array being selectively operated in a binary mode or a multilevel mode; an interface (6, 7) that communicates with an external device; a storage configured to store data for discriminating between a binary mode operation to write data to a memory cell in the memory blocks and a multilevel mode operation to write data to a memory cell in the memory blocks, the storage being part of the memory cells of the memory blocks (BLOCK 0 to BLOCK 1023), the data being flag data stored in the memory cells, and the flag data being written to the memory cells after the data being written by the first write procedures; and a write circuit which writes data in the memory cell array in accordance with a data write command input to the interface, characterized in that: the write circuit (2, 3, 4, 5, 8) writes data to the memory cell array by first write procedures for writing binary data to the memory cell or second write procedures for writing multilevel data to the memory cell; and the write circuit (2, 3, 4, 5, 8) determines whether to execute or not to execute the data write command, based on the flag data in the memory cells, when the data write command is input from the interface (6, 7) by the first write procedures. a memory cell array constituted by memory blocks having electrically rewritable nonvolatile semiconductor memory cells, an arbitrary memory block in the memory cell array being selectively operated in a binary mode or a multilevel mode; an interface (6, 7) that communicates with an external device; a storage configured to store data for discriminating between a binary mode operation to write data to a memory cell in the memory blocks and a multilevel mode operation to write data to a memory cell in the memory blocks, the storage being part of the memory cells of the memory blocks (BLOCK 0 to BLOCK 1023), the data being flag data stored in the memory cells, and the flag data being written to the memory cells after the data being written by the first write procedures; and a write circuit which writes data in the memory cell array in accordance with a data write command input to the interface, characterized in that: the write circuit (2, 3, 4, 5, 8) writes data to the memory cell array by first write procedures for writing binary data to the memory cell or second write procedures for writing multilevel data to the memory cell; and the write circuit (2, 3, 4, 5, 8) determines whether to execute or not to execute the data write command, based on the flag data in the memory cells, when the data write command is input from the interface (6, 7) by the first write procedures. the write circuit (2, 3, 4, 5, 8) writes data to the memory cell array by first write procedures for writing binary data to the memory cell or second write procedures for writing multilevel data to the memory cell; and the write circuit (2, 3, 4, 5, 8) determines whether to execute or not to execute the data write command, based on the flag data in the memory cells, when the data write command is input from the interface (6, 7) by the first write procedures.