A microprocessor, comprising: a cache memory; and a data prefetcher, configured to: detect a pattern of memory accesses within a first memory block and prefetch into the cache memory cache lines from the first memory block based on the pattern; maintain a table of entries, wherein each entry of the table comprises first, second, and third fields, wherein the second field holds a representation of a virtual base address of a recently accessed memory block, wherein the first field holds a representation of a virtual base address of a memory block virtually adjacent to the recently accessed memory block in one direction, wherein the third field holds a representation of a virtual base address of a memory block virtually adjacent to the recently accessed memory block in the other direction, wherein the representation of the virtual base address of the memory block comprises a hash of bits of the virtual base address of the memory block; observe a new memory access request to a second memory block; determine that the first memory block is virtually adjacent to the second memory block and that the pattern, when continued from the first memory block to the second memory block, predicts an access to a cache line implicated by the new request within the second memory block; and responsively prefetch into the cache memory cache lines from the second memory block based on the pattern.; wherein to determine that the first memory block is virtually adjacent to the second memory block, the data prefetcher is configured to: determine that a representation of a virtual base address of the second memory block matches either the first or third field in one of the entries of the table; and determine that the second field in the matching entry matches a representation of a virtual base address of the first memory block. a cache memory; and a data prefetcher, configured to: detect a pattern of memory accesses within a first memory block and prefetch into the cache memory cache lines from the first memory block based on the pattern; maintain a table of entries, wherein each entry of the table comprises first, second, and third fields, wherein the second field holds a representation of a virtual base address of a recently accessed memory block, wherein the first field holds a representation of a virtual base address of a memory block virtually adjacent to the recently accessed memory block in one direction, wherein the third field holds a representation of a virtual base address of a memory block virtually adjacent to the recently accessed memory block in the other direction, wherein the representation of the virtual base address of the memory block comprises a hash of bits of the virtual base address of the memory block; observe a new memory access request to a second memory block; determine that the first memory block is virtually adjacent to the second memory block and that the pattern, when continued from the first memory block to the second memory block, predicts an access to a cache line implicated by the new request within the second memory block; and responsively prefetch into the cache memory cache lines from the second memory block based on the pattern.; wherein to determine that the first memory block is virtually adjacent to the second memory block, the data prefetcher is configured to: determine that a representation of a virtual base address of the second memory block matches either the first or third field in one of the entries of the table; and determine that the second field in the matching entry matches a representation of a virtual base address of the first memory block. detect a pattern of memory accesses within a first memory block and prefetch into the cache memory cache lines from the first memory block based on the pattern; maintain a table of entries, wherein each entry of the table comprises first, second, and third fields, wherein the second field holds a representation of a virtual base address of a recently accessed memory block, wherein the first field holds a representation of a virtual base address of a memory block virtually adjacent to the recently accessed memory block in one direction, wherein the third field holds a representation of a virtual base address of a memory block virtually adjacent to the recently accessed memory block in the other direction, wherein the representation of the virtual base address of the memory block comprises a hash of bits of the virtual base address of the memory block; observe a new memory access request to a second memory block; determine that the first memory block is virtually adjacent to the second memory block and that the pattern, when continued from the first memory block to the second memory block, predicts an access to a cache line implicated by the new request within the second memory block; and responsively prefetch into the cache memory cache lines from the second memory block based on the pattern.; wherein to determine that the first memory block is virtually adjacent to the second memory block, the data prefetcher is configured to: determine that a representation of a virtual base address of the second memory block matches either the first or third field in one of the entries of the table; and determine that the second field in the matching entry matches a representation of a virtual base address of the first memory block. determine that a representation of a virtual base address of the second memory block matches either the first or third field in one of the entries of the table; and determine that the second field in the matching entry matches a representation of a virtual base address of the first memory block.