An electronic device, comprising: a control circuit, N output circuits, and M output conducting wires, wherein both M and N are integers greater than 1; connection relationships between the N output circuits and the M output conducting wires are preset; control terminals of the N output circuits are connected in parallel and are coupled to the control circuit; the control circuit comprises M detection ports, and the M detection ports are respectively coupled to the M output conducting wires in a one-to-one correspondence; and the control circuit is configured to perform a hardware address allocation operation one or more times, wherein the hardware address allocation operation comprises: enabling (S301, S701) a first output circuit, so that the first output circuit sends an output signal, wherein the first output circuit is one of the N output circuits, and when the hardware address allocation operation is performed a plurality of times, a different first output circuit is enabled in each time; when detecting, by using a first detection port, a first output signal generated after the output signal passes through a first output conducting wire, determining a first hardware address of the first output circuit according to a configuration rule, wherein the first hardware address corresponds to the first output conducting wire, the first detection port is one of the M detection ports, and the first output conducting wire is an output conducting wire coupled to the first detection port; and sending the first hardware address to the first output circuit, wherein the first output circuit is further configured to store the first hardware address. connection relationships between the N output circuits and the M output conducting wires are preset; control terminals of the N output circuits are connected in parallel and are coupled to the control circuit; the control circuit comprises M detection ports, and the M detection ports are respectively coupled to the M output conducting wires in a one-to-one correspondence; and the control circuit is configured to perform a hardware address allocation operation one or more times, wherein the hardware address allocation operation comprises: enabling (S301, S701) a first output circuit, so that the first output circuit sends an output signal, wherein the first output circuit is one of the N output circuits, and when the hardware address allocation operation is performed a plurality of times, a different first output circuit is enabled in each time; when detecting, by using a first detection port, a first output signal generated after the output signal passes through a first output conducting wire, determining a first hardware address of the first output circuit according to a configuration rule, wherein the first hardware address corresponds to the first output conducting wire, the first detection port is one of the M detection ports, and the first output conducting wire is an output conducting wire coupled to the first detection port; and sending the first hardware address to the first output circuit, wherein the first output circuit is further configured to store the first hardware address. enabling (S301, S701) a first output circuit, so that the first output circuit sends an output signal, wherein the first output circuit is one of the N output circuits, and when the hardware address allocation operation is performed a plurality of times, a different first output circuit is enabled in each time; when detecting, by using a first detection port, a first output signal generated after the output signal passes through a first output conducting wire, determining a first hardware address of the first output circuit according to a configuration rule, wherein the first hardware address corresponds to the first output conducting wire, the first detection port is one of the M detection ports, and the first output conducting wire is an output conducting wire coupled to the first detection port; and sending the first hardware address to the first output circuit, wherein the first output circuit is further configured to store the first hardware address.