An integrated balanced-signal-to-unbalanced-signal, balun, circuit, comprising: a first transformer winding having a first terminal and a second terminal operably coupled for a differential signal; a second transformer winding having a third terminal and a fourth terminal operably coupled for a single-ended signal, the first transformer winding and the second transformer winding are at least partially coplanar, including portions of the windings provided on a commonly-shared metal layer of an integrated circuit; and an integrated capacitor having a first electrode conductively coupled to one of the first terminal or the second terminal of the first transformer winding, wherein the capacitor is integrated within the commonly-shared metal layer, and wherein the first electrode of the integrated capacitor is provided on the commonly-shared metal layer of the first transformer winding and a second electrode of the integrated capacitor is provided on a second metal layer, the second metal layer conductively coupled to a ground terminal, the second metal layer separated from the commonly-shared metal layer by an insulating layer, wherein the integrated capacitor is a mismatch compensation capacitor configured to correct amplitude and phase imbalance of the balun circuit; and an array of integrated capacitors switchably coupled between the first and second terminals of the first transformer winding, the array of integrated capacitors configured to establish an operating frequency range of the balun circuit based on a state of one or more switches coupled to the array of capacitors; wherein each switch that controls the coupling of an integrated capacitor of the array of integrated capacitors to the first and second terminals of the first transformer winding is a Field Effect Transistor, FET, the switch controlled by a first signal applied to the gate terminal of the FET and a second signal applied to the drain and source terminal of the FET via pull-up resistors, wherein the second signal is a complement of the first signal. a first transformer winding having a first terminal and a second terminal operably coupled for a differential signal; a second transformer winding having a third terminal and a fourth terminal operably coupled for a single-ended signal, the first transformer winding and the second transformer winding are at least partially coplanar, including portions of the windings provided on a commonly-shared metal layer of an integrated circuit; and an integrated capacitor having a first electrode conductively coupled to one of the first terminal or the second terminal of the first transformer winding, wherein the capacitor is integrated within the commonly-shared metal layer, and wherein the first electrode of the integrated capacitor is provided on the commonly-shared metal layer of the first transformer winding and a second electrode of the integrated capacitor is provided on a second metal layer, the second metal layer conductively coupled to a ground terminal, the second metal layer separated from the commonly-shared metal layer by an insulating layer, wherein the integrated capacitor is a mismatch compensation capacitor configured to correct amplitude and phase imbalance of the balun circuit; and an array of integrated capacitors switchably coupled between the first and second terminals of the first transformer winding, the array of integrated capacitors configured to establish an operating frequency range of the balun circuit based on a state of one or more switches coupled to the array of capacitors; wherein each switch that controls the coupling of an integrated capacitor of the array of integrated capacitors to the first and second terminals of the first transformer winding is a Field Effect Transistor, FET, the switch controlled by a first signal applied to the gate terminal of the FET and a second signal applied to the drain and source terminal of the FET via pull-up resistors, wherein the second signal is a complement of the first signal.