Reference voltages distribution circuit comprising a multi-output voltage to current converter (V/I_Conv) adapted to receive an input reference voltage (V R) for providing a plurality of output reference currents (I 1,...,I N) to be converted into a plurality of local reference voltages (V O1,...,V ON) at corresponding receiving circuits (LCR 1,...,LCR N) adapted to be connected to said reference voltages distribution circuit, the multi-output voltage to current converter (V/I_Conv) comprising: - an input section adapted to generate on the basis of the input reference voltage (V R) a reference current (I 0), the input section comprising a current mirror input transistor having a voltage controlled input terminal (g 0E); - an output section comprising a plurality of current mirror output transistors (M01,...,M0N) each adapted to provide a corresponding output reference current of the plurality of output reference currents (I 1,...,I N), each of said current mirror output transistors (M01,...,M0N) comprising a voltage controlled input terminal (g 01,...,g 0N), the output section comprising a common input node to which voltage controlled input terminals (g 01,...,g 0N) of the current mirror output transistors (M01,...,M0N) are connected; characterized in that the reference voltages distribution circuit comprises a common low-pass filter having an input node connected to the voltage controlled input terminal (g 0E) of the current mirror input transistor and an output node connected to the common input node of the output section, the common low pass filter being a single filter shared among the plurality of current mirror output transistors (M01,...,M0N) of the output section, said low-pass filter comprising: - a first MOS transistor (M0R) having a first terminal connected to the input node of the low-pass-filter, a second terminal connected to the output node of the low-pass filter, and a gate terminal; - a biasing circuit (35, 36, M0Q) of said first MOS transistor adapted to apply to said gate terminal a DC control voltage such that the first MOS transistor operates in a weak inversion or sub-threshold region, wherein said control voltage is such to provide a desired resistance value R between said first terminal and said second terminal of the first MOS transistor (M0R), wherein said biasing circuit (35,36,M0Q) comprises: - a first current generator; - a second current generator; - at least a second MOS transistor (M0Q) having a diode configuration and being connected between the first and the second current generator and having a gate terminal connected to said gate terminal of the first MOS transistor and a source terminal connected to the input node of the low-pass-filter. - an input section adapted to generate on the basis of the input reference voltage (V R) a reference current (I 0), the input section comprising a current mirror input transistor having a voltage controlled input terminal (g 0E); - an output section comprising a plurality of current mirror output transistors (M01,...,M0N) each adapted to provide a corresponding output reference current of the plurality of output reference currents (I 1,...,I N), each of said current mirror output transistors (M01,...,M0N) comprising a voltage controlled input terminal (g 01,...,g 0N), the output section comprising a common input node to which voltage controlled input terminals (g 01,...,g 0N) of the current mirror output transistors (M01,...,M0N) are connected; - a first MOS transistor (M0R) having a first terminal connected to the input node of the low-pass-filter, a second terminal connected to the output node of the low-pass filter, and a gate terminal; - a biasing circuit (35, 36, M0Q) of said first MOS transistor adapted to apply to said gate terminal a DC control voltage such that the first MOS transistor operates in a weak inversion or sub-threshold region, wherein said control voltage is such to provide a desired resistance value R between said first terminal and said second terminal of the first MOS transistor (M0R), - a first current generator; - a second current generator; - at least a second MOS transistor (M0Q) having a diode configuration and being connected between the first and the second current generator and having a gate terminal connected to said gate terminal of the first MOS transistor and a source terminal connected to the input node of the low-pass-filter.