A system, comprising: a processor core; a memory configured to store information for use by the processor core; a cache memory configured to issue a fetch request for information from the memory for use by the processor core; a prefetch circuit configured to: issue a prefetch request for information from the memory to store in the cache memory using a predicted address; determine, over a particular time interval: utilization data corresponding to an amount of activity in a fetch pipeline associated with the cache memory, wherein fetch requests from the cache memory and prefetch requests from the prefetch circuit are handled by the fetch pipeline; and an accuracy value using the number of prefetch requests from the prefetch circuit and a number of cache hits to prefetched information in the cache memory; and disable prefetch requests from the memory for a subsequent time interval in response to a determination that at least one of the utilization data and the accuracy value is less than a respective threshold value, characterised in that the prefetch circuit is further configured to, while prefetch requests are disabled: continue to determine the utilization data for the subsequent time interval; and cease to determine the accuracy value for the subsequent time interval. a processor core; a memory configured to store information for use by the processor core; a cache memory configured to issue a fetch request for information from the memory for use by the processor core; a prefetch circuit configured to: issue a prefetch request for information from the memory to store in the cache memory using a predicted address; determine, over a particular time interval: utilization data corresponding to an amount of activity in a fetch pipeline associated with the cache memory, wherein fetch requests from the cache memory and prefetch requests from the prefetch circuit are handled by the fetch pipeline; and an accuracy value using the number of prefetch requests from the prefetch circuit and a number of cache hits to prefetched information in the cache memory; and disable prefetch requests from the memory for a subsequent time interval in response to a determination that at least one of the utilization data and the accuracy value is less than a respective threshold value, characterised in that the prefetch circuit is further configured to, while prefetch requests are disabled: continue to determine the utilization data for the subsequent time interval; and cease to determine the accuracy value for the subsequent time interval. issue a prefetch request for information from the memory to store in the cache memory using a predicted address; determine, over a particular time interval: utilization data corresponding to an amount of activity in a fetch pipeline associated with the cache memory, wherein fetch requests from the cache memory and prefetch requests from the prefetch circuit are handled by the fetch pipeline; and an accuracy value using the number of prefetch requests from the prefetch circuit and a number of cache hits to prefetched information in the cache memory; and utilization data corresponding to an amount of activity in a fetch pipeline associated with the cache memory, wherein fetch requests from the cache memory and prefetch requests from the prefetch circuit are handled by the fetch pipeline; and an accuracy value using the number of prefetch requests from the prefetch circuit and a number of cache hits to prefetched information in the cache memory; and disable prefetch requests from the memory for a subsequent time interval in response to a determination that at least one of the utilization data and the accuracy value is less than a respective threshold value, characterised in that the prefetch circuit is further configured to, while prefetch requests are disabled: continue to determine the utilization data for the subsequent time interval; and cease to determine the accuracy value for the subsequent time interval. continue to determine the utilization data for the subsequent time interval; and cease to determine the accuracy value for the subsequent time interval.