A method for coding and multiplexing in high speed downlink shared channel, characterized by comprising: writing data to be combined in a memory space that is arranged as 6 rows by column in turn when implementing 64 Quadrature Amplitude Modulation, QAM, Hybrid Automatic Repeat Request, HARQ, bit combination; and reading out the data from the memory space by column; wherein the data of each column are read out in an order: a 1st row, a 2rd row, a 3th row, a 4nd row, a 5th row and a 6th row; implementing constellation rearrangement for input bits v p,k, v p,k +1, v p,k +2, v p,k +3, v p,k +4, v p,k +5 in one of following manners when implementing the constellation rearrangement: Constellation version parameter b Output bit sequence 0 v p,k v p,k +1 v p,k+2 v p,k +3 v p,k +4 v p,k +5 1 v p,k +4 v p,k +5 v p,k +2 v p,k +3 v p,k v p,k +1 2 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 3 v p,k +4 v p,k +5 v p,k +2 v k +3 v p,k v p,k +1 or, Constellation version parameter b Output bit sequence 0 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 v p,k v p,k +1 2 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 3 v p, k +2 v k +3 v p,k +4 v p,k +5 v p,k v p,k +1 or, Constellation version parameter b Output bit sequence 0 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 1 v p,k +2 v p,k +3 v p,k v p,k +1 v p,k +4 v p,k +5 2 v p,k v p,k +1 v p,k+ 2 v p,k +3 v p,k +4 v p,k +5 3 v p,k +2 v k +3 v p,k v p,k +1 v p,k +4 v p,k +5 or, Constellation version parameter b Output bit sequence 0 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 1 v p,k v p,k +1 v p,k +4 v p,k +5 v p,k +2 v p,k +3 2 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 3 v p,k v p,k +1 v p,k +4 v p,k +5 v p,k +2 v k +3 or, Constellation version parameter b Output bit sequence 0 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 1 v p,k +4 v p,k +5 v p,k v p,k +1 v p,k +2 v p,k +3 2 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 3 v p,k +4 v p,k +5 v p,k v p,k +1 v p,k +2 v k +3 wherein v p,i represents the inversion of v p,i. writing data to be combined in a memory space that is arranged as 6 rows by column in turn when implementing 64 Quadrature Amplitude Modulation, QAM, Hybrid Automatic Repeat Request, HARQ, bit combination; and reading out the data from the memory space by column; wherein the data of each column are read out in an order: a 1st row, a 2rd row, a 3th row, a 4nd row, a 5th row and a 6th row; implementing constellation rearrangement for input bits v p,k, v p,k +1, v p,k +2, v p,k +3, v p,k +4, v p,k +5 in one of following manners when implementing the constellation rearrangement: Constellation version parameter b Output bit sequence 0 v p,k v p,k +1 v p,k+2 v p,k +3 v p,k +4 v p,k +5 1 v p,k +4 v p,k +5 v p,k +2 v p,k +3 v p,k v p,k +1 2 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 3 v p,k +4 v p,k +5 v p,k +2 v k +3 v p,k v p,k +1 or, Constellation version parameter b Output bit sequence 0 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 v p,k v p,k +1 2 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 3 v p, k +2 v k +3 v p,k +4 v p,k +5 v p,k v p,k +1 or, Constellation version parameter b Output bit sequence 0 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 1 v p,k +2 v p,k +3 v p,k v p,k +1 v p,k +4 v p,k +5 2 v p,k v p,k +1 v p,k+ 2 v p,k +3 v p,k +4 v p,k +5 3 v p,k +2 v k +3 v p,k v p,k +1 v p,k +4 v p,k +5 or, Constellation version parameter b Output bit sequence 0 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 1 v p,k v p,k +1 v p,k +4 v p,k +5 v p,k +2 v p,k +3 2 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 3 v p,k v p,k +1 v p,k +4 v p,k +5 v p,k +2 v k +3 or, Constellation version parameter b Output bit sequence 0 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 1 v p,k +4 v p,k +5 v p,k v p,k +1 v p,k +2 v p,k +3 2 v p,k v p,k +1 v p,k +2 v p,k +3 v p,k +4 v p,k +5 3 v p,k +4 v p,k +5 v p,k v p,k +1 v p,k +2 v k +3 wherein v p,i represents the inversion of v p,i.