An apparatus comprising an active noise reduction, ANR, circuit, the ANR circuit comprising: an analog-to-digital converter, ADC (210,310,410); a digital-to-analog converter, DAC; a processing device; and a storage in which is stored a sequence of instructions that when executed by the processing device, causes the processing device to: buffer a first set of ANR settings in a first buffer; incorporate a plurality of digital filters of a quantity specified by the first set of ANR settings stored in the first buffer of the ANR circuit into a filter block located along a pathway extending from the ADC to the DAC through which digital data associated with providing ANR flows within the ANR circuit; select a type of digital filter specified by a first set of ANR settings for each digital filter from among a plurality of types of digital filter supported by the ANR circuit; adopt a filter block topology specified by the first set of ANR settings within the filter block by configuring interconnections among each of the digital filters; configure each of the digital filters with filter coefficients specified by the first set of ANR settings; set a data transfer rate at which digital data flows through at least one of the digital filters as specified by the first ANR settings; cause the ADC, the filter block and the DAC to be operated to enable the ANR circuit to provide ANR using reference sounds represented by an analog signal received by ANR circuit through the ADC to derive anti-noise sounds represented by an analog signal output by the ANR circuit through the DAC; buffer a second set of ANR settings in a second buffer; change an ANR setting specified by the first set of ANR settings to an ANR setting specified by the second set of ANR settings stored in the second buffer of the ANR circuit; and alternately employ the first and second buffers (620a, 620b) to update desired ANR settings during further operation of the ANR circuit. an analog-to-digital converter, ADC (210,310,410); a digital-to-analog converter, DAC; a processing device; and a storage in which is stored a sequence of instructions that when executed by the processing device, causes the processing device to: buffer a first set of ANR settings in a first buffer; incorporate a plurality of digital filters of a quantity specified by the first set of ANR settings stored in the first buffer of the ANR circuit into a filter block located along a pathway extending from the ADC to the DAC through which digital data associated with providing ANR flows within the ANR circuit; select a type of digital filter specified by a first set of ANR settings for each digital filter from among a plurality of types of digital filter supported by the ANR circuit; adopt a filter block topology specified by the first set of ANR settings within the filter block by configuring interconnections among each of the digital filters; configure each of the digital filters with filter coefficients specified by the first set of ANR settings; set a data transfer rate at which digital data flows through at least one of the digital filters as specified by the first ANR settings; cause the ADC, the filter block and the DAC to be operated to enable the ANR circuit to provide ANR using reference sounds represented by an analog signal received by ANR circuit through the ADC to derive anti-noise sounds represented by an analog signal output by the ANR circuit through the DAC; buffer a second set of ANR settings in a second buffer; change an ANR setting specified by the first set of ANR settings to an ANR setting specified by the second set of ANR settings stored in the second buffer of the ANR circuit; and alternately employ the first and second buffers (620a, 620b) to update desired ANR settings during further operation of the ANR circuit. buffer a first set of ANR settings in a first buffer; incorporate a plurality of digital filters of a quantity specified by the first set of ANR settings stored in the first buffer of the ANR circuit into a filter block located along a pathway extending from the ADC to the DAC through which digital data associated with providing ANR flows within the ANR circuit; select a type of digital filter specified by a first set of ANR settings for each digital filter from among a plurality of types of digital filter supported by the ANR circuit; adopt a filter block topology specified by the first set of ANR settings within the filter block by configuring interconnections among each of the digital filters; configure each of the digital filters with filter coefficients specified by the first set of ANR settings; set a data transfer rate at which digital data flows through at least one of the digital filters as specified by the first ANR settings; cause the ADC, the filter block and the DAC to be operated to enable the ANR circuit to provide ANR using reference sounds represented by an analog signal received by ANR circuit through the ADC to derive anti-noise sounds represented by an analog signal output by the ANR circuit through the DAC; buffer a second set of ANR settings in a second buffer; change an ANR setting specified by the first set of ANR settings to an ANR setting specified by the second set of ANR settings stored in the second buffer of the ANR circuit; and alternately employ the first and second buffers (620a, 620b) to update desired ANR settings during further operation of the ANR circuit.