An electronic device, comprising: a core unit including a first Peripheral Component Interconnection Express, PCIE, port and a second PCIE port; and a peripheral device including a PCIE port; the electronic device being characterized in further comprising: a thunderbolt connector; a thunderbolt control unit coupled to the thunderbolt connector, wherein the thunderbolt control unit includes a host mode and an end-point device mode; a first switch circuit, wherein, a first common terminal of the first switch circuit is coupled to the PCIE port of the peripheral device, and a first selection terminal of the first switch circuit is coupled to the first PCIE port of the core unit; and a second switch circuit, wherein a first common terminal of the second switch circuit is coupled to a first PCIE port of the thunderbolt control unit, a first selection terminal of the second switch circuit is coupled to the second PCIE port of the core unit, and a second selection terminal of the second switch circuit is coupled to a second selection terminal of the first switch circuit, wherein the thunderbolt control unit is configured to operate either at the host mode or at the end-point device mode by switching a connection among the selection terminals (152, 153, 162, 163) and the common terminals (151, 161) of the first switch circuit and the second switch circuit. a core unit including a first Peripheral Component Interconnection Express, PCIE, port and a second PCIE port; and a peripheral device including a PCIE port; the electronic device being characterized in further comprising: a thunderbolt connector; a thunderbolt control unit coupled to the thunderbolt connector, wherein the thunderbolt control unit includes a host mode and an end-point device mode; a first switch circuit, wherein, a first common terminal of the first switch circuit is coupled to the PCIE port of the peripheral device, and a first selection terminal of the first switch circuit is coupled to the first PCIE port of the core unit; and a second switch circuit, wherein a first common terminal of the second switch circuit is coupled to a first PCIE port of the thunderbolt control unit, a first selection terminal of the second switch circuit is coupled to the second PCIE port of the core unit, and a second selection terminal of the second switch circuit is coupled to a second selection terminal of the first switch circuit, wherein the thunderbolt control unit is configured to operate either at the host mode or at the end-point device mode by switching a connection among the selection terminals (152, 153, 162, 163) and the common terminals (151, 161) of the first switch circuit and the second switch circuit. a thunderbolt connector; a thunderbolt control unit coupled to the thunderbolt connector, wherein the thunderbolt control unit includes a host mode and an end-point device mode; a first switch circuit, wherein, a first common terminal of the first switch circuit is coupled to the PCIE port of the peripheral device, and a first selection terminal of the first switch circuit is coupled to the first PCIE port of the core unit; and a second switch circuit, wherein a first common terminal of the second switch circuit is coupled to a first PCIE port of the thunderbolt control unit, a first selection terminal of the second switch circuit is coupled to the second PCIE port of the core unit, and a second selection terminal of the second switch circuit is coupled to a second selection terminal of the first switch circuit, wherein the thunderbolt control unit is configured to operate either at the host mode or at the end-point device mode by switching a connection among the selection terminals (152, 153, 162, 163) and the common terminals (151, 161) of the first switch circuit and the second switch circuit.