A security chip comprising: a substrate; an integrated circuit disposed on said substrate, said integrated circuit comprising circuit elements in one or more metal layers, and interlayer contacts interconnecting said one or more metal layers; a shield provided over said integrated circuit to at least partially shield said integrated circuit from light; characterised in that said security chip further comprises: at least one lightwell in said shield and said integrated circuit forming a path for light to penetrate through said shield to said substrate, wherein each lightwell prevents light from reaching said circuit elements and wherein each lightwell has a closed shape formed by lightwell walls, said lightwell walls being formed in the integrated circuit from parts of said one or more metal layers and interlayer contacts on which no exploitable voltage can be measured when said parts are probed during an attack on said security chip, wherein said parts of said one or more metal layers and interlayer contacts are connected to a constant voltage circuit element of said integrated circuit or the parts of said one or more metal layers and interlayer contacts are connected to a varying voltage where the variation in voltage does not correlate with any sensitive data value. a substrate; an integrated circuit disposed on said substrate, said integrated circuit comprising circuit elements in one or more metal layers, and interlayer contacts interconnecting said one or more metal layers; a shield provided over said integrated circuit to at least partially shield said integrated circuit from light; characterised in that said security chip further comprises: at least one lightwell in said shield and said integrated circuit forming a path for light to penetrate through said shield to said substrate, wherein each lightwell prevents light from reaching said circuit elements and wherein each lightwell has a closed shape formed by lightwell walls, said lightwell walls being formed in the integrated circuit from parts of said one or more metal layers and interlayer contacts on which no exploitable voltage can be measured when said parts are probed during an attack on said security chip, wherein said parts of said one or more metal layers and interlayer contacts are connected to a constant voltage circuit element of said integrated circuit or the parts of said one or more metal layers and interlayer contacts are connected to a varying voltage where the variation in voltage does not correlate with any sensitive data value. at least one lightwell in said shield and said integrated circuit forming a path for light to penetrate through said shield to said substrate, wherein each lightwell prevents light from reaching said circuit elements and wherein each lightwell has a closed shape formed by lightwell walls, said lightwell walls being formed in the integrated circuit from parts of said one or more metal layers and interlayer contacts on which no exploitable voltage can be measured when said parts are probed during an attack on said security chip, wherein said parts of said one or more metal layers and interlayer contacts are connected to a constant voltage circuit element of said integrated circuit or the parts of said one or more metal layers and interlayer contacts are connected to a varying voltage where the variation in voltage does not correlate with any sensitive data value.