An integrated circuit assembly comprising: an insulating layer having a first surface and a second surface, the second surface being below the first surface; a semiconductor layer having a first surface and a second surface, the first surface of the semiconductor layer contacting the first surface of the insulating layer; an active device formed in a region of the semiconductor layer; a first electrically conductive interconnect layer forming an electrically conductive ring; a second electrically conductive interconnect layer forming a first electrically conductive plate above the electrically conductive ring and the region of the semiconductor layer in which the active device is formed; a third electrically conductive interconnect layer forming a second electrically conductive plate below i) the electrically conductive ring, ii) the insulating layer, and iii) the region of the semiconductor layer in which the active device is formed; and a plurality of electrically conductive vias electrically coupling the electrically conductive ring to the first electrically conductive plate through one or more dielectric layers located between the first electrically conductive interconnect layer and the second electrically conductive interconnect layer and electrically coupling the electrically conductive ring to the second electrically conductive plate through one or more dielectric layers (1108, 1111, 1126) located between the first electrically conductive interconnect layer and the third electrically conductive interconnect layer; wherein the electrically conductive ring, the first electrically conductive plate, the second electrically conductive plate, and the plurality of electrically conductive vias form a Faraday cage around the active device. an insulating layer having a first surface and a second surface, the second surface being below the first surface; a semiconductor layer having a first surface and a second surface, the first surface of the semiconductor layer contacting the first surface of the insulating layer; an active device formed in a region of the semiconductor layer; a first electrically conductive interconnect layer forming an electrically conductive ring; a second electrically conductive interconnect layer forming a first electrically conductive plate above the electrically conductive ring and the region of the semiconductor layer in which the active device is formed; a third electrically conductive interconnect layer forming a second electrically conductive plate below i) the electrically conductive ring, ii) the insulating layer, and iii) the region of the semiconductor layer in which the active device is formed; and a plurality of electrically conductive vias electrically coupling the electrically conductive ring to the first electrically conductive plate through one or more dielectric layers located between the first electrically conductive interconnect layer and the second electrically conductive interconnect layer and electrically coupling the electrically conductive ring to the second electrically conductive plate through one or more dielectric layers (1108, 1111, 1126) located between the first electrically conductive interconnect layer and the third electrically conductive interconnect layer; wherein the electrically conductive ring, the first electrically conductive plate, the second electrically conductive plate, and the plurality of electrically conductive vias form a Faraday cage around the active device.