A method for programming in a non-volatile memory device, comprising: applying at least one programming pulse to a non-volatile memory cell of the non-volatile memory device during each of previous programming loops; applying at least one programming pulse to the non-volatile memory cell during a current programming loop; providing a bitline bias voltage of the non-volatile memory cell according to a result of comparing a threshold voltage (Vt) of the non-volatile memory cell in at least one of the previous programming loops with a low verify level and/or a high verify level of a target data state of the non-volatile memory cell and a result of comparing a threshold voltage (Vt) of the non-volatile memory cell in the current programming loop with the low verify level and/or the high verify level of the target data state of the non-volatile memory cell characterised in that the method is further comprising: if the threshold voltage (Vt) is higher than the high verify level of the target data state of the non-volatile memory cell in any of the previous programming loops and the threshold voltage (Vt) is higher than the high verify level of the target data state of the non-volatile memory cell in the current programming loop, providing a system voltage (Vdd) as the bitline bias voltage permanently; and applying at least one programming pulse to the non-volatile memory cell during a next programming loop after the current programming loop if number of non-volatile memory cells having threshold voltage (Vt)s higher than the high verify level is lower than a predetermined number after performing the current programming loop. applying at least one programming pulse to a non-volatile memory cell of the non-volatile memory device during each of previous programming loops; applying at least one programming pulse to the non-volatile memory cell during a current programming loop; providing a bitline bias voltage of the non-volatile memory cell according to a result of comparing a threshold voltage (Vt) of the non-volatile memory cell in at least one of the previous programming loops with a low verify level and/or a high verify level of a target data state of the non-volatile memory cell and a result of comparing a threshold voltage (Vt) of the non-volatile memory cell in the current programming loop with the low verify level and/or the high verify level of the target data state of the non-volatile memory cell characterised in that the method is further comprising: if the threshold voltage (Vt) is higher than the high verify level of the target data state of the non-volatile memory cell in any of the previous programming loops and the threshold voltage (Vt) is higher than the high verify level of the target data state of the non-volatile memory cell in the current programming loop, providing a system voltage (Vdd) as the bitline bias voltage permanently; and applying at least one programming pulse to the non-volatile memory cell during a next programming loop after the current programming loop if number of non-volatile memory cells having threshold voltage (Vt)s higher than the high verify level is lower than a predetermined number after performing the current programming loop.