A semiconductor device which comprises an interposer (10, 10a, 10b) and a semiconductor chip mounted thereon by flip-chip bonding, the interposer (10, 10a, 10b) with the semiconductor chip mounted thereon being suitable for mounting on a packaging board, the interposer comprising: a first interposer portion made of a semiconductor and provided with pad portions in first wiring patterns and in second wiring patterns on an upper surface of the first interposer portion electrically connected to electrode terminals of the semiconductor chip and pad portions for external connection terminals in third wiring patterns on a lower surface of the first interposer portion; and a second interposer portion (12, 12a, 12b) made of an insulator and provided around the first interposer portion integrally with, and in the same plane as, the first interposer portion, the second interposer portion (12, 12a, 12b) being provided with the second wiring patterns, extending on an upper surface of the second interposer portion (12, 12a, 12b) from the first interposer portion, and pad portions for external connection terminals in fourth wiring patterns on a lower surface of the second interposer portion (12, 12a, 12b); wherein: (a) a first insulating layer is formed on the upper surfaces of the first interposer portion and the second interposer portion (12, 12a, 12b), and a second insulating layer is formed on the lower surfaces of the first interposer portion and the second interposer portion (12, 12a, 12b); (b) the first and second wiring patterns (14a, 15a) are formed over the first insulating layer, the third and fourth wiring patterns (14b, 15b) are formed over the second insulating layer, and the first and third wiring patterns (14a, 14b) are electrically connected via through holes formed in the first interposer portion and the second and fourth wiring patterns (15a, 15b) are electrically connected via through holes formed in the second interposer portion (12, 12a, 12b); (c) the first interposer portion has a size approximately equal to that of the semiconductor chip mounted thereon; and (d) the first interposer portion is made of material having a thermal expansion coefficient equivalent to that of the semiconductor chip mounted thereon. a first interposer portion made of a semiconductor and provided with pad portions in first wiring patterns and in second wiring patterns on an upper surface of the first interposer portion electrically connected to electrode terminals of the semiconductor chip and pad portions for external connection terminals in third wiring patterns on a lower surface of the first interposer portion; and a second interposer portion (12, 12a, 12b) made of an insulator and provided around the first interposer portion integrally with, and in the same plane as, the first interposer portion, the second interposer portion (12, 12a, 12b) being provided with the second wiring patterns, extending on an upper surface of the second interposer portion (12, 12a, 12b) from the first interposer portion, and pad portions for external connection terminals in fourth wiring patterns on a lower surface of the second interposer portion (12, 12a, 12b); (a) a first insulating layer is formed on the upper surfaces of the first interposer portion and the second interposer portion (12, 12a, 12b), and a second insulating layer is formed on the lower surfaces of the first interposer portion and the second interposer portion (12, 12a, 12b); (b) the first and second wiring patterns (14a, 15a) are formed over the first insulating layer, the third and fourth wiring patterns (14b, 15b) are formed over the second insulating layer, and the first and third wiring patterns (14a, 14b) are electrically connected via through holes formed in the first interposer portion and the second and fourth wiring patterns (15a, 15b) are electrically connected via through holes formed in the second interposer portion (12, 12a, 12b); (c) the first interposer portion has a size approximately equal to that of the semiconductor chip mounted thereon; and (d) the first interposer portion is made of material having a thermal expansion coefficient equivalent to that of the semiconductor chip mounted thereon.