An electronic device comprising: - at least one semiconductor device provided, on a side, with a plurality of bond pads (11, 12, 13); and - a carrier substrate comprising a layer of electrically insulating material and having a first side and an opposed second side, which are each provided with an electrically conductive layer (20B, 20C), on which first side bond pads (41, 42, 43) are present which are suitable for coupling to the bond pads (11, 12, 13) of the integrated circuit, and on which second side contact pads (61, 62, 63, 64, 65) for external coupling are provided, the contact pads (61, 62, 63, 64, 65) and the bond pads (41, 42, 43) being electrically interconnected according to a desired pattern, a first portion of the contact pads (61, 64, 65) being defined for ground connection, a second portion of the contact pads (62, 65) being defined for voltage supply connection and a third portion of the contact pads being defined for signal transmission, in which electronic device - the at least one semiconductor device is provided with core functionality and peripheral functionality, the core functionality and the peripheral functionality each being provided with voltage supply connection and ground connection, - the carrier substrate is laterally subdivided into a core area and a peripheral area, in which core area the contact pads (61, 62) for the core functionality are provided and in which peripheral area the contact pads (63, 64, 65) for the peripheral functionality are provided, wherein - the carrier substrate comprises at least one interconnect for interconnecting the ground connection of the peripheral functionality and the ground connection of the core functionality, wherein - a ground plane is defined in the peripheral area on the second side of the carrier substrate, which ground plane is the interconnect for mutually interconnecting the ground connection of the peripheral functionality and the ground connection of the core functionality, - a ground plane is defined in the core area on the first side of the carrier substrate and is coupled to the ground plane in the peripheral area through vertical interconnects in the carrier substrate, and - means (111, 211) for decoupling the voltage supply of core and peripheral functionality to the common ground are present, wherein - the means (111, 211) for decoupling comprise a decoupling capacitor in the peripheral functionality, which is located either in the at least one semiconductor device or at the first side of the carrier substrate. - at least one semiconductor device provided, on a side, with a plurality of bond pads (11, 12, 13); and - a carrier substrate comprising a layer of electrically insulating material and having a first side and an opposed second side, which are each provided with an electrically conductive layer (20B, 20C), on which first side bond pads (41, 42, 43) are present which are suitable for coupling to the bond pads (11, 12, 13) of the integrated circuit, and on which second side contact pads (61, 62, 63, 64, 65) for external coupling are provided, the contact pads (61, 62, 63, 64, 65) and the bond pads (41, 42, 43) being electrically interconnected according to a desired pattern, a first portion of the contact pads (61, 64, 65) being defined for ground connection, a second portion of the contact pads (62, 65) being defined for voltage supply connection and a third portion of the contact pads being defined for signal transmission, in which electronic device - the at least one semiconductor device is provided with core functionality and peripheral functionality, the core functionality and the peripheral functionality each being provided with voltage supply connection and ground connection, - the carrier substrate is laterally subdivided into a core area and a peripheral area, in which core area the contact pads (61, 62) for the core functionality are provided and in which peripheral area the contact pads (63, 64, 65) for the peripheral functionality are provided, wherein - the carrier substrate comprises at least one interconnect for interconnecting the ground connection of the peripheral functionality and the ground connection of the core functionality, wherein - a ground plane is defined in the peripheral area on the second side of the carrier substrate, which ground plane is the interconnect for mutually interconnecting the ground connection of the peripheral functionality and the ground connection of the core functionality, - a ground plane is defined in the core area on the first side of the carrier substrate and is coupled to the ground plane in the peripheral area through vertical interconnects in the carrier substrate, and - means (111, 211) for decoupling the voltage supply of core and peripheral functionality to the common ground are present, wherein - the means (111, 211) for decoupling comprise a decoupling capacitor in the peripheral functionality, which is located either in the at least one semiconductor device or at the first side of the carrier substrate.