A data processing method, wherein the method comprises: coding received data; distributing the coded data to multiple physical coding sublayer PCS lanes; and performing self-synchronizing scramble separately for the multiple data streams distributed to the multiple PCS lanes, wherein the multiple data streams are in a one-to-one correspondence with the multiple PCS lanes; wherein the step of performing self-synchronizing scramble separately for the multiple data streams distributed to the multiple PCS lanes comprises: performing, by multiple scrambling modules, self-synchronizing scramble separately for the multiple data streams, wherein the multiple scrambling modules are in a one-to-one correspondence with the multiple PCS lanes; before the step of performing self-synchronizing scramble separately for the multiple data streams distributed to the multiple PCS lanes, the method being characterized by: separately initializing values of multiple shift registers in the multiple scrambling modules, wherein the multiple scrambling modules are in a one-to-one correspondence with the multiple shift registers, and an absolute value of a correlation coefficient among the initialized values of the multiple shift registers is not greater than a set threshold, said threshold being greater than or equal to zero and smaller than one. coding received data; distributing the coded data to multiple physical coding sublayer PCS lanes; and performing self-synchronizing scramble separately for the multiple data streams distributed to the multiple PCS lanes, wherein the multiple data streams are in a one-to-one correspondence with the multiple PCS lanes; wherein the step of performing self-synchronizing scramble separately for the multiple data streams distributed to the multiple PCS lanes comprises: performing, by multiple scrambling modules, self-synchronizing scramble separately for the multiple data streams, wherein the multiple scrambling modules are in a one-to-one correspondence with the multiple PCS lanes; before the step of performing self-synchronizing scramble separately for the multiple data streams distributed to the multiple PCS lanes, the method being characterized by: separately initializing values of multiple shift registers in the multiple scrambling modules, wherein the multiple scrambling modules are in a one-to-one correspondence with the multiple shift registers, and an absolute value of a correlation coefficient among the initialized values of the multiple shift registers is not greater than a set threshold, said threshold being greater than or equal to zero and smaller than one. performing, by multiple scrambling modules, self-synchronizing scramble separately for the multiple data streams, wherein the multiple scrambling modules are in a one-to-one correspondence with the multiple PCS lanes; before the step of performing self-synchronizing scramble separately for the multiple data streams distributed to the multiple PCS lanes, the method being characterized by: separately initializing values of multiple shift registers in the multiple scrambling modules, wherein the multiple scrambling modules are in a one-to-one correspondence with the multiple shift registers, and an absolute value of a correlation coefficient among the initialized values of the multiple shift registers is not greater than a set threshold, said threshold being greater than or equal to zero and smaller than one. separately initializing values of multiple shift registers in the multiple scrambling modules, wherein the multiple scrambling modules are in a one-to-one correspondence with the multiple shift registers, and an absolute value of a correlation coefficient among the initialized values of the multiple shift registers is not greater than a set threshold, said threshold being greater than or equal to zero and smaller than one.