A radio frequency power amplifier circuit having a transmit signal input and a transmit signal output, the circuit comprising: an input matching network; a power detector generating a voltage output proportional to a power level of an input signal; a directional coupler with a first port connected to the transmit signal input, a second port connected to the input matching network, and a third port connected to the power detector; a first power amplifier stage with an input connected to the input matching network and an output connected to the transmit signal output; a control circuit coupled to the power detector, a gain reduction signal being generated thereby based upon a comparison of the voltage output from the power detector to predefined voltage levels corresponding to specific power levels of the input signal, overall gain of the radio frequency power amplifier circuit being reduced based upon the gain reduction signal; an inter-stage matching network connected to the output of the first power amplifier and a second power amplifier stage with an input connected to the inter-stage matching network and an output connected to the transmit signal output, the control circuit generating the gain reduction signal to the inter-stage matching network; a switching transistor connected to the inter-stage matching network and having an on state and an off state, the inter-stage matching network defining a first impedance with the switching transistor in the off state and a second impedance with the switching transistor in the on state; and an output directional coupler connected to a transmit signal output and an output power detector generating a voltage output proportional to a power level of an output signal on the transmit signal output, the output power detector being connected to the control circuit, the control circuit having a first comparator connected to the power detector and an input reference and a second comparator connected to the output power detector and an output reference, the first comparator and the second comparator together triggering the switching transistor to the on state with either one or both of a voltage level of the transmit signal input exceeding a voltage level of the input reference and a voltage level of the transmit signal output exceeding a voltage level of the output reference. an input matching network; a power detector generating a voltage output proportional to a power level of an input signal; a directional coupler with a first port connected to the transmit signal input, a second port connected to the input matching network, and a third port connected to the power detector; a first power amplifier stage with an input connected to the input matching network and an output connected to the transmit signal output; a control circuit coupled to the power detector, a gain reduction signal being generated thereby based upon a comparison of the voltage output from the power detector to predefined voltage levels corresponding to specific power levels of the input signal, overall gain of the radio frequency power amplifier circuit being reduced based upon the gain reduction signal; an inter-stage matching network connected to the output of the first power amplifier and a second power amplifier stage with an input connected to the inter-stage matching network and an output connected to the transmit signal output, the control circuit generating the gain reduction signal to the inter-stage matching network; a switching transistor connected to the inter-stage matching network and having an on state and an off state, the inter-stage matching network defining a first impedance with the switching transistor in the off state and a second impedance with the switching transistor in the on state; and an output directional coupler connected to a transmit signal output and an output power detector generating a voltage output proportional to a power level of an output signal on the transmit signal output, the output power detector being connected to the control circuit, the control circuit having a first comparator connected to the power detector and an input reference and a second comparator connected to the output power detector and an output reference, the first comparator and the second comparator together triggering the switching transistor to the on state with either one or both of a voltage level of the transmit signal input exceeding a voltage level of the input reference and a voltage level of the transmit signal output exceeding a voltage level of the output reference.