A display device comprising: a scan line over a substrate; a pixel over the substrate; and a protective circuit over the substrate, wherein the pixel includes: a thin film transistor, wherein a gate electrode of the thin film transistor is connected to the scan line; and a pixel electrode connected to a source electrode or a drain electrode of the thin film transistor, wherein the protective circuit includes: a gate insulating film over the scan line; a first oxide semiconductor layer over the gate insulating film; a channel protective layer over the first oxide semiconductor layer, wherein the channel protective layer comprises one of silicon nitride, aluminum nitride, silicon oxynitride and aluminum oxynitride stacked over silicon oxide or aluminum oxide; a second oxide semiconductor layer over the first oxide semiconductor layer and the channel protective layer; a third oxide semiconductor layer over the first oxide semiconductor layer and the channel protective layer; wherein the first oxide semiconductor layer has lower electrical conductivity than the second oxide semiconductor layer and the third oxide semiconductor layer; a first wiring layer over the second oxide semiconductor layer; a second wiring layer over the third oxide semiconductor layer; and a third wiring layer connecting the scan line and the first wiring layer. a scan line over a substrate; a pixel over the substrate; and a protective circuit over the substrate, wherein the pixel includes: a thin film transistor, wherein a gate electrode of the thin film transistor is connected to the scan line; and a pixel electrode connected to a source electrode or a drain electrode of the thin film transistor, a thin film transistor, wherein a gate electrode of the thin film transistor is connected to the scan line; and a pixel electrode connected to a source electrode or a drain electrode of the thin film transistor, wherein the protective circuit includes: a gate insulating film over the scan line; a first oxide semiconductor layer over the gate insulating film; a channel protective layer over the first oxide semiconductor layer, a gate insulating film over the scan line; a first oxide semiconductor layer over the gate insulating film; a channel protective layer over the first oxide semiconductor layer, wherein the channel protective layer comprises one of silicon nitride, aluminum nitride, silicon oxynitride and aluminum oxynitride stacked over silicon oxide or aluminum oxide; a second oxide semiconductor layer over the first oxide semiconductor layer and the channel protective layer; a third oxide semiconductor layer over the first oxide semiconductor layer and the channel protective layer; a second oxide semiconductor layer over the first oxide semiconductor layer and the channel protective layer; a third oxide semiconductor layer over the first oxide semiconductor layer and the channel protective layer; wherein the first oxide semiconductor layer has lower electrical conductivity than the second oxide semiconductor layer and the third oxide semiconductor layer; a first wiring layer over the second oxide semiconductor layer; a second wiring layer over the third oxide semiconductor layer; and a third wiring layer connecting the scan line and the first wiring layer. a first wiring layer over the second oxide semiconductor layer; a second wiring layer over the third oxide semiconductor layer; and a third wiring layer connecting the scan line and the first wiring layer.