mhurhangee/ep-ind-claims huggingface dataset:
Austenitic stainless rolled steel plate of a thickness of 100 mm or more, characterised by: containing by mass%, C: 0.08% or less, N: 0.10% to 0.22%, C+N: 0.12% or more, Si: 0.01% to 2.0%, Mn: 0.1% to 2.0%, Cr: 15% to 27%, Ni: 8% to 20%, Mo: 4% or less, Co: 0.1% or less, Cu: 0.1% to 3%, Al: 0.001% to 0.10%, and Ca: 0.0005% to 0.01%, optionally Ti: 0.010% to 0.030%, and a balance of iron and unavoidable impurities including S: 0.003% or less and P: 0.040% or less, having a calculated value of the amount of δ-ferrite defined by the following formula (δcal; vol%) of -7% to 4%, and having an elongation in the width direction and length direction at any location in the thickness direction of 30% or more: δcal vol % = 2.9 × Cr + 0.3 Si + Mo − 2.6 × Ni + 0.3 × Mn + 0.25 × Cu + 35 × C + 20 × N − 18 where [element abbreviations] means the content of the element (mass%), and the elongation is the value measured at 4K. containing by mass%, C: 0.08% or less, N: 0.10% to 0.22%, C+N: 0.12% or more, Si: 0.01% to 2.0%, Mn: 0.1% to 2.0%, Cr: 15% to 27%, Ni: 8% to 20%, Mo: 4% or less, Co: 0.1% or less, Cu: 0.1% to 3%, Al: 0.001% to 0.10%, and Ca: 0.0005% to 0.01%, optionally Ti: 0.010% to 0.030%, and a balance of iron and unavoidable impurities including S: 0.003% or less and P: 0.040% or less, having a calculated value of the amount of δ-ferrite defined by the following formula (δcal; vol%) of -7% to 4%, and having an elongation in the width direction and length direction at any location in the thickness direction of 30% or more: δcal vol % = 2.9 × Cr + 0.3 Si + Mo − 2.6 × Ni + 0.3 × Mn + 0.25 × Cu + 35 × C + 20 × N − 18 where [element abbreviations] means the content of the element (mass%), and the elongation is the value measured at 4K.
A method for manufacturing a semiconductor structure, comprising: providing a substrate; forming a semiconductor layer on the substrate; performing P-type doping on the semiconductor layer to transform the semiconductor layer into an initial mask layer; performing a first patterning treatment on the initial mask layer to form a mask layer with an opening; and performing a second patterning treatment on the substrate by using an etching process with the mask layer as a mask, wherein an etching rate of the substrate is greater than an etching rate of the mask layer during the etching process; wherein a material of the initial mask layer comprises a boron-silicon compound, and an atomic percent of boron atoms and silicon atoms in the boron-silicon compound is in a range of 1:1 to 3:2; wherein providing the substrate comprises: providing a base; forming a stacked structure on the base, wherein the stacked structure includes a bottom support layer, a first dielectric layer, an intermediate support layer, a second dielectric layer and a top support layer stacked in sequence on the base; and performing the second patterning treatment on the substrate comprises: etching the stacked structure by taking the mask layer as a mask and using the etching process to form a capacitor contact hole. providing a substrate; forming a semiconductor layer on the substrate; performing P-type doping on the semiconductor layer to transform the semiconductor layer into an initial mask layer; performing a first patterning treatment on the initial mask layer to form a mask layer with an opening; and performing a second patterning treatment on the substrate by using an etching process with the mask layer as a mask, wherein an etching rate of the substrate is greater than an etching rate of the mask layer during the etching process; wherein a material of the initial mask layer comprises a boron-silicon compound, and an atomic percent of boron atoms and silicon atoms in the boron-silicon compound is in a range of 1:1 to 3:2; wherein providing the substrate comprises: providing a base; forming a stacked structure on the base, wherein the stacked structure includes a bottom support layer, a first dielectric layer, an intermediate support layer, a second dielectric layer and a top support layer stacked in sequence on the base; and performing the second patterning treatment on the substrate comprises: etching the stacked structure by taking the mask layer as a mask and using the etching process to form a capacitor contact hole. providing a base; forming a stacked structure on the base, wherein the stacked structure includes a bottom support layer, a first dielectric layer, an intermediate support layer, a second dielectric layer and a top support layer stacked in sequence on the base; and performing the second patterning treatment on the substrate comprises: etching the stacked structure by taking the mask layer as a mask and using the etching process to form a capacitor contact hole.
A light illuminating apparatus (1, 2) that irradiates a target object with light, the target object being relatively moveable along a first direction, the light illuminating apparatus (1,2) comprising: a light source having a plurality of solid-state devices which irradiates the target object with the light in a second direction perpendicular to the first direction; a first reflecting part having at least two first reflecting surfaces (311a, 311Aa, 311Ba, 311Ca, 311Da, 311Ea, 311Fa) placed at a downstream side in the second direction below the target object when viewed from the first direction, wherein the first reflecting part reflects a portion of the light from the light source incident on the first reflecting surface (311a, 311Aa, 311Ba, 311Ca, 311Da, 311Ea, 311Fa) onto the target object; and a second reflecting part having a pair of second reflecting surfaces (312a, 312Ga, 312Ha) standing erect from the light source toward the first reflecting surface (311a, 311Aa, 311Ba, 311Ca, 311Da, 311Ea, 311Fa), wherein the second reflecting part guides the light from the light source into the first reflecting surface (311a, 311Aa, 311Ba, 311Ca, 311Da, 311Ea, 311Fa), characterized in that the first reflecting surfaces (311a, 311Aa, 311Ba, 311Da) are planes and at least two normal lines of the at least two first reflecting surfaces (311a, 311Aa, 311Ba, 311Da), when viewed from the first direction, are arranged to pass through a point on the normal line passing through the center of the light source. a light source having a plurality of solid-state devices which irradiates the target object with the light in a second direction perpendicular to the first direction; a first reflecting part having at least two first reflecting surfaces (311a, 311Aa, 311Ba, 311Ca, 311Da, 311Ea, 311Fa) placed at a downstream side in the second direction below the target object when viewed from the first direction, wherein the first reflecting part reflects a portion of the light from the light source incident on the first reflecting surface (311a, 311Aa, 311Ba, 311Ca, 311Da, 311Ea, 311Fa) onto the target object; and a second reflecting part having a pair of second reflecting surfaces (312a, 312Ga, 312Ha) standing erect from the light source toward the first reflecting surface (311a, 311Aa, 311Ba, 311Ca, 311Da, 311Ea, 311Fa), wherein the second reflecting part guides the light from the light source into the first reflecting surface (311a, 311Aa, 311Ba, 311Ca, 311Da, 311Ea, 311Fa), characterized in that the first reflecting surfaces (311a, 311Aa, 311Ba, 311Da) are planes and at least two normal lines of the at least two first reflecting surfaces (311a, 311Aa, 311Ba, 311Da), when viewed from the first direction, are arranged to pass through a point on the normal line passing through the center of the light source.
A playing memory management method, comprising: Step S1, creating a contiguous memory area; Step S2, dividing a contiguous first memory range from the memory area when digital rights management playing information is received; Step S3, setting, by a secure operating system, an access permission for the first memory range; Step S4, performing, by the secure operating system, a decoding operation in the first memory range until the decoding operation is completed; and Step S5, clearing, by the secure operating system, data in the first memory range, releasing the access permission for the first memory range, and releasing the first memory range; wherein Step S3 comprises the steps of: Step S31, an upper layer control sends a physical address and a capacity of the first memory range to the secure operating system; Step S32, the secure operating system audits the validity of the first memory range; and Step S33, a memory control module of the secure operating system sets an access permission to the first memory range which gets permitted, characterised in that Step S4 comprises the steps of: Step S41, the secure operating system starts a video decoder having the access permission, and sets a DRM identity for the video decoder; Step S42, the video decoder requests for a memory pool from the first memory range; and Step S43, the video decoder performs the decoding operation in the memory pool until the decoding operation is completed. Step S1, creating a contiguous memory area; Step S2, dividing a contiguous first memory range from the memory area when digital rights management playing information is received; Step S3, setting, by a secure operating system, an access permission for the first memory range; Step S4, performing, by the secure operating system, a decoding operation in the first memory range until the decoding operation is completed; and Step S5, clearing, by the secure operating system, data in the first memory range, releasing the access permission for the first memory range, and releasing the first memory range; Step S31, an upper layer control sends a physical address and a capacity of the first memory range to the secure operating system; Step S32, the secure operating system audits the validity of the first memory range; and Step S33, a memory control module of the secure operating system sets an access permission to the first memory range which gets permitted, Step S41, the secure operating system starts a video decoder having the access permission, and sets a DRM identity for the video decoder; Step S42, the video decoder requests for a memory pool from the first memory range; and Step S43, the video decoder performs the decoding operation in the memory pool until the decoding operation is completed.
A process for preparing compound (XII-c) from compound the process comprising reacting a compound of formula (XI-c): wherein P is a suitable amino protecting group, with either: (a) compound under amide-bond formation conditions, in the presence of an amide coupling reagent, and in the presence of a catalyst, in an organic solvent, at a temperature in the range of from 0 °C to 50 °C; or (b) an isocyanate compound (IVa) in the presence of a non-nucleophilic base at a temperature in a range of from -20°C to 80°C wherein the isocyanate compound of formula (IVa) is derived from the reaction of the compound with phosgene or a phosgene analog in the presence of an organic base in an aprotic solvent; and wherein compound is derived from the reduction of compound the process resulting in the formation of the corresponding compound (XII-c). (a) compound under amide-bond formation conditions, in the presence of an amide coupling reagent, and in the presence of a catalyst, in an organic solvent, at a temperature in the range of from 0 °C to 50 °C; or (b) an isocyanate compound (IVa) in the presence of a non-nucleophilic base at a temperature in a range of from -20°C to 80°C wherein the isocyanate compound of formula (IVa) is derived from the reaction of the compound with phosgene or a phosgene analog in the presence of an organic base in an aprotic solvent; and wherein compound is derived from the reduction of compound the process resulting in the formation of the corresponding compound (XII-c).
A cryptographic integrated circuit comprising a programmable main processor for executing cryptographic functions, an internal memory, a data transmission bus to which the main processor and the internal memory are electrically connected, and, also electrically connected to the data transmission bus and different from the main processor, a programmable arithmetic coprocessor comprising specific hardware arithmetic units (30, 32, 34), among which at least one hardware arithmetic unit for modular addition, one hardware arithmetic unit for modular multiplication using Montgomery reduction, and one hardware arithmetic unit for a modular logic operation, each of these specific hardware arithmetic units being designed to carry out a predetermined arithmetical operation, characterized in that the hardware architecture of at least the hardware arithmetic unit for modular addition or the hardware arithmetic unit for modular multiplication using Montgomery reduction is designed to carry out modular arithmetical operations in a pipeline mode and to return, on the one hand, several possible values from one and the same requested arithmetical operation and, on the second hand, a parameter for selecting a single value from said several possible values.
A three-dimensional matrix for tissue regeneration comprising at least three successive layers of at least two biocompatible polymers that are solid at temperature below 36 °C, the layers arranged to form walls with open voids therebetween, the voids suitable for seeding or ingrowth of cells, the layers comprising a first polymer and a second polymer, comprising polyester urethane, polyether urethane or a combination thereof, and wherein the first and second polymers are disposed in an alternating pattern along at least one axis of the matrix, wherein the first polymer is hydrophobic and/or lipophilic and the second polymer is hydrophilic.
A dual motion deployable vehicle access step including: a step component; a body component including a linear motion control element, a rotary joint, and an interlocking latch assembly; a mounting bracket adapted to be rigidly attached to a vehicle and operatively configured to anchor the rotary joint of the body component to the vehicle; the step component operatively configured to translate relative to the body component in constraint of said linear motion control element; said interlocking latch assembly being operatively configured to selectively limit operation of the deployable vehicle access step to one of a either linear motion of the step component relative to the body component or a rotary motion of the body component relative to the mounting bracket; an energy storage device adapted to impart both a torque to bias the body component into a retracted state and a force to bias the step component into a deployed state; and such that when an operator pushes downwards on the retracted step the body component rotates to an intermediate deployed state against the biasing torque of the energy storage device and causes the interlocking latch assembly to lock the body component and release the step component so that the force produced by the energy storage device then biases the step component to translate to a fully deployed position. a step component; a body component including a linear motion control element, a rotary joint, and an interlocking latch assembly; a mounting bracket adapted to be rigidly attached to a vehicle and operatively configured to anchor the rotary joint of the body component to the vehicle; the step component operatively configured to translate relative to the body component in constraint of said linear motion control element; said interlocking latch assembly being operatively configured to selectively limit operation of the deployable vehicle access step to one of a either linear motion of the step component relative to the body component or a rotary motion of the body component relative to the mounting bracket; an energy storage device adapted to impart both a torque to bias the body component into a retracted state and a force to bias the step component into a deployed state; and such that when an operator pushes downwards on the retracted step the body component rotates to an intermediate deployed state against the biasing torque of the energy storage device and causes the interlocking latch assembly to lock the body component and release the step component so that the force produced by the energy storage device then biases the step component to translate to a fully deployed position.
A recombinant enhancer comprising the sequence motif of SEQ ID NO: 17, wherein said recombinant enhancer is capable of enhancing transgene expression in male reproductive tissue of plants.
Composition comprising an effective amount of at least one inhibitor of a miRNA involved in the angiogenesis and presenting an antiangiogenic activity, or a precursor thereof; wherein said inhibitor is an antisense oligonucleotide being complementary to the said miRNA, or precursor thereof, and is microencapsulated into polymeric biodegradable and biocompatible microspheres, wherein the said microspheres are made of a copolymer selected among poly-d,l-lactide and poly-d,l-lactide-co-glycolide (PLGA), the said polymer being optionally blended with one or more other polymers..
A method of handling timers during re-establishing a transmitting side of a radio link control entity of a communication device operating in Acknowledged Mode, said radio link control entity being called RLC entity hereinafter, wherein the RLC entity comprises the transmitting side and a receiving side, the method comprising the steps of: - re-establishing only the transmitting side of the RLC entity; characterized by - stopping all timers corresponding to the transmitting side other than an SDU discard timer and a periodic polling timer; and - prolonging and not stopping a status prohibiting timer corresponding to the receiving side, which is not a periodic timer, or another non-periodic timer corresponding to the receiving side. - re-establishing only the transmitting side of the RLC entity; characterized by - stopping all timers corresponding to the transmitting side other than an SDU discard timer and a periodic polling timer; and - prolonging and not stopping a status prohibiting timer corresponding to the receiving side, which is not a periodic timer, or another non-periodic timer corresponding to the receiving side.
A method for implementing flow control in a switch fabric, comprising: sending, by each input port, request information to a destination output port where no packet congestion occurs; according to respective back pressure information, determining, by the destination output port which receives the request information, whether to return grant information or a back pressure information to each input port to establish a matching relationship between each input port and the destination output port which returns the grant information and no back pressure information; sending back pressure information if the destination output port which receives the request information is in a congestions state and not sending back pressure information if the destination output port which receives the request information is not in a congestions state; and according to the matching relationship, scheduling, by each input port, a cell to a destination output port that is matched with each input port; wherein the sending, by each input port, request information to the destination output port where no packet congestion occurs comprises: filtering a destination output port where congestion occurs according to a destination port filtering table of each queue at each input port, the destination port filtering table is used for recording whether packet congestion occurs at the destination output port. sending, by each input port, request information to a destination output port where no packet congestion occurs; according to respective back pressure information, determining, by the destination output port which receives the request information, whether to return grant information or a back pressure information to each input port to establish a matching relationship between each input port and the destination output port which returns the grant information and no back pressure information; sending back pressure information if the destination output port which receives the request information is in a congestions state and not sending back pressure information if the destination output port which receives the request information is not in a congestions state; and according to the matching relationship, scheduling, by each input port, a cell to a destination output port that is matched with each input port; wherein the sending, by each input port, request information to the destination output port where no packet congestion occurs comprises: filtering a destination output port where congestion occurs according to a destination port filtering table of each queue at each input port, the destination port filtering table is used for recording whether packet congestion occurs at the destination output port. filtering a destination output port where congestion occurs according to a destination port filtering table of each queue at each input port, the destination port filtering table is used for recording whether packet congestion occurs at the destination output port.
A method of manufacturing a wind turbine blade, wherein the wind turbine blade is manufactured as a composite structure comprising a reinforcement material embedded in a polymer matrix, the method comprising: - providing a first blade mould with a first blade shell part having a leading edge, a trailing edge, and a first leading edge glue surface at the leading edge, the first blade mould comprising a first leading edge flange; - providing a second blade mould with a second blade shell part having a leading edge, a trailing edge, and a second leading edge glue surface at the leading edge, the second blade mould comprising a second leading edge flange; and - applying glue to a leading edge glue surface (76; 87); - applying a pressure to the second blade shell part; and - curing the glue; characterised by - providing one or more leading edge spacer elements at the first or second leading edge flanges (80; 89); and - arranging the second blade mould on the first blade mould, such that the one or more leading edge spacer elements are arranged between the first leading edge flange and the second leading edge flange. - providing a first blade mould with a first blade shell part having a leading edge, a trailing edge, and a first leading edge glue surface at the leading edge, the first blade mould comprising a first leading edge flange; - providing a second blade mould with a second blade shell part having a leading edge, a trailing edge, and a second leading edge glue surface at the leading edge, the second blade mould comprising a second leading edge flange; and - applying glue to a leading edge glue surface (76; 87); - applying a pressure to the second blade shell part; and - curing the glue; characterised by - providing one or more leading edge spacer elements at the first or second leading edge flanges (80; 89); and - arranging the second blade mould on the first blade mould, such that the one or more leading edge spacer elements are arranged between the first leading edge flange and the second leading edge flange.