A method for memory alignment, comprising: receiving, from a host device and by a processing-in-memory device, a first byte-based memory element and a second byte-based memory element in a byte-based alignment; performing an alignment operation on the first and the second byte-based memory elements of a memory allocation of an array of memory cells of the PIM device from the byte-based alignment to a non-byte-based alignment, wherein the first and second byte-based memory elements each include at least one byte having at least one data bit (120, 122) and at least one padding bit (121, 123), and wherein the non-byte-based alignment includes: the at least one padding bit of the first byte-based memory element logically adjacent to the at least one padding bit of the second byte-based memory element; and the at least one data bit of the first byte-based memory element logically adjacent to the at least one data bit of the second byte-based memory element at a location of the memory allocation other than a byte boundary; storing logically adjacent bits in physically adjacent memory cells of the array; performing a logical operation, via sensing circuitry of the PIM device coupled to the array, on the data bits of the first and second byte-based memory elements after performing the alignment operation; and performing a realignment operation to return the data bits of the first and second byte-based memory elements to the byte-based alignment after performing the logical operation. receiving, from a host device and by a processing-in-memory device, a first byte-based memory element and a second byte-based memory element in a byte-based alignment; performing an alignment operation on the first and the second byte-based memory elements of a memory allocation of an array of memory cells of the PIM device from the byte-based alignment to a non-byte-based alignment, wherein the first and second byte-based memory elements each include at least one byte having at least one data bit (120, 122) and at least one padding bit (121, 123), and wherein the non-byte-based alignment includes: the at least one padding bit of the first byte-based memory element logically adjacent to the at least one padding bit of the second byte-based memory element; and the at least one data bit of the first byte-based memory element logically adjacent to the at least one data bit of the second byte-based memory element at a location of the memory allocation other than a byte boundary; wherein the first and second byte-based memory elements each include at least one byte having at least one data bit (120, 122) and at least one padding bit (121, 123), and wherein the non-byte-based alignment includes: the at least one padding bit of the first byte-based memory element logically adjacent to the at least one padding bit of the second byte-based memory element; and the at least one data bit of the first byte-based memory element logically adjacent to the at least one data bit of the second byte-based memory element at a location of the memory allocation other than a byte boundary; the at least one padding bit of the first byte-based memory element logically adjacent to the at least one padding bit of the second byte-based memory element; and the at least one data bit of the first byte-based memory element logically adjacent to the at least one data bit of the second byte-based memory element at a location of the memory allocation other than a byte boundary; storing logically adjacent bits in physically adjacent memory cells of the array; performing a logical operation, via sensing circuitry of the PIM device coupled to the array, on the data bits of the first and second byte-based memory elements after performing the alignment operation; and performing a realignment operation to return the data bits of the first and second byte-based memory elements to the byte-based alignment after performing the logical operation.