A method for forming a high voltage semiconductor power device, comprising: providing a first p-type dopant source (306; 310) on an upper surface (205; 302) of an n-type semiconductor substrate (203; 300), wherein the first dopant source is aluminum; providing a second p-type dopant source (308; 312) on a lower surface (207; 304) of the substrate (203; 300), wherein the second dopant source is aluminum; annealing the substrate for a first given time to drive the dopants from the first and second dopants sources into the substrate, wherein the annealing for the first given time is annealing the substrate in a nitrogen atmosphere at 1250°C for 40 hours, and then annealing the substrate in an oxygen environment at 1250°C for 10 hours; removing the first and second dopant sources from the upper (205; 302) and lower surfaces (207; 304) of the substrate (203; 300); annealing the substrate (203; 300) for a second given time to homogenize dopant concentration within the substrate after the first and second dopant sources have been removed, the annealing the substrate for the second given time resulting in out-diffusion of dopants proximate the upper (205; 302) and lower (207; 304) surfaces of the substrate, wherein the annealing for the second given time is annealing the substrate in a nitrogen environment at 1250°C for 20 hours, and then annealing the substrate in an oxygen environment at 1250°C for 10 hours; and providing p-type compensation dopants into the substrate (203; 300) after annealing the substrate for the second given time to compensate the out-diffusion of the dopants proximate the upper (205; 302) and lower (207; 304) surfaces, wherein the compensation dopants comprise boron dopants, wherein the providing of the compensation dopants involves placing the substrate into a furnace and annealing in the furnace at 1200°C for 105 hours, wherein the dopants driven into the substrate (203; 300) define an isolation diffusion structure (210; 318) that extends from the upper surface (205; 302) to the lower surface (207; 304), wherein the isolation diffusion structure has a resistance value of 200 mOhms, wherein the isolation diffusion structure (210; 318) is configured to provide a current path between a first electrode on the upper surface (205; 302) of the substrate (203; 300) and a second electrode on the lower surface (207; 304) of the substrate (203; 300), and wherein the isolation diffusion structure (210; 318) is configured to be able to handle at least 10 amperes, when in use. providing a first p-type dopant source (306; 310) on an upper surface (205; 302) of an n-type semiconductor substrate (203; 300), wherein the first dopant source is aluminum; providing a second p-type dopant source (308; 312) on a lower surface (207; 304) of the substrate (203; 300), wherein the second dopant source is aluminum; annealing the substrate for a first given time to drive the dopants from the first and second dopants sources into the substrate, wherein the annealing for the first given time is annealing the substrate in a nitrogen atmosphere at 1250°C for 40 hours, and then annealing the substrate in an oxygen environment at 1250°C for 10 hours; removing the first and second dopant sources from the upper (205; 302) and lower surfaces (207; 304) of the substrate (203; 300); annealing the substrate (203; 300) for a second given time to homogenize dopant concentration within the substrate after the first and second dopant sources have been removed, the annealing the substrate for the second given time resulting in out-diffusion of dopants proximate the upper (205; 302) and lower (207; 304) surfaces of the substrate, wherein the annealing for the second given time is annealing the substrate in a nitrogen environment at 1250°C for 20 hours, and then annealing the substrate in an oxygen environment at 1250°C for 10 hours; and providing p-type compensation dopants into the substrate (203; 300) after annealing the substrate for the second given time to compensate the out-diffusion of the dopants proximate the upper (205; 302) and lower (207; 304) surfaces, wherein the compensation dopants comprise boron dopants, wherein the providing of the compensation dopants involves placing the substrate into a furnace and annealing in the furnace at 1200°C for 105 hours, wherein the dopants driven into the substrate (203; 300) define an isolation diffusion structure (210; 318) that extends from the upper surface (205; 302) to the lower surface (207; 304), wherein the isolation diffusion structure has a resistance value of 200 mOhms, wherein the isolation diffusion structure (210; 318) is configured to provide a current path between a first electrode on the upper surface (205; 302) of the substrate (203; 300) and a second electrode on the lower surface (207; 304) of the substrate (203; 300), and wherein the isolation diffusion structure (210; 318) is configured to be able to handle at least 10 amperes, when in use.