A solid-state imaging element comprising: a pixel region in which a plurality of pixels are arranged, wherein each of the plurality of pixels includes a photoelectric conversion unit, a transfer transistor, a plurality of floating diffusion units (61, 62) configured to receive charges from the photoelectric conversion unit through the transfer transistor, a reset transistor configured to reset the plurality of floating diffusion units (61, 62), a separation transistor configured to perform ON/OFF control of connection of the plurality of floating diffusion units (61, 62), wherein an ON-state of the connection of the plurality of floating diffusion units (61, 62) corresponds to high capacitance and an OFF-state of the connection of the plurality of floating diffusion units (61, 62) corresponds to low capacitance, an amplification transistor configured to output a signal corresponding to a potential of each of the plurality of floating diffusion units (61, 62), and a selection transistor that is disposed on a drain side of the amplification transistor and is configured to select a read-out row, wherein the transfer transistor is configured to perform reference potential read-out during high capacitance prior to reference potential read-out during low capacitance, wherein a power supply on a drain side of the reset transistor is configured to perform potential control of the plurality of floating diffusion units (61, 62) by taking two values including a high potential and a low potential, wherein ON/OFF switching of the amplification transistor is performed by the potential control of the plurality of floating diffusion units (61, 62), wherein the reset transistor is configured to reset the plurality of floating diffusion units (61, 62) to the low potential after a read-out operation, wherein the plurality of floating diffusion units (61, 62) remain at the low potential during a read-out period of another row, wherein the reference potential is a potential read-out after reset by the reset transistor and before any of the plurality of floating diffusion units (61, 62) receive charges from the photoelectric conversion unit through the transfer transistor,and wherein the selection transistor is configured to select the read-out row after reset by the reset transistor. a pixel region in which a plurality of pixels are arranged, wherein each of the plurality of pixels includes a photoelectric conversion unit, a transfer transistor, a plurality of floating diffusion units (61, 62) configured to receive charges from the photoelectric conversion unit through the transfer transistor, a reset transistor configured to reset the plurality of floating diffusion units (61, 62), a separation transistor configured to perform ON/OFF control of connection of the plurality of floating diffusion units (61, 62), wherein an ON-state of the connection of the plurality of floating diffusion units (61, 62) corresponds to high capacitance and an OFF-state of the connection of the plurality of floating diffusion units (61, 62) corresponds to low capacitance, an amplification transistor configured to output a signal corresponding to a potential of each of the plurality of floating diffusion units (61, 62), and a selection transistor that is disposed on a drain side of the amplification transistor and is configured to select a read-out row, wherein the transfer transistor is configured to perform reference potential read-out during high capacitance prior to reference potential read-out during low capacitance, wherein a power supply on a drain side of the reset transistor is configured to perform potential control of the plurality of floating diffusion units (61, 62) by taking two values including a high potential and a low potential, wherein ON/OFF switching of the amplification transistor is performed by the potential control of the plurality of floating diffusion units (61, 62), wherein the reset transistor is configured to reset the plurality of floating diffusion units (61, 62) to the low potential after a read-out operation, wherein the plurality of floating diffusion units (61, 62) remain at the low potential during a read-out period of another row, wherein the reference potential is a potential read-out after reset by the reset transistor and before any of the plurality of floating diffusion units (61, 62) receive charges from the photoelectric conversion unit through the transfer transistor,and wherein the selection transistor is configured to select the read-out row after reset by the reset transistor.