A digital pre-processing chip comprising: an analog interface for transmitting TX analog signals and receiving RX analog signals to and from a plurality of analog Radio Frequency, RF, chips; a digital interface for transmitting and receiving digital signals to and from a baseband chip; a plurality of Analog-to-Digital Converters, ADCs, for converting a plurality of RX analog signals received via the analog interface to a plurality of RX digital signals; a plurality of Digital-to-Analog Converters, DACs, for converting a plurality of TX digital signals to a plurality of TX analog signals to be transmitted to the plurality of analog RF chips via the analog interface; pre-processing circuitry configured to: pre-process the plurality of RX digital signals received from the plurality of ADCs to form a pre-processed digital signal to be transmitted to the baseband chip via the digital interface; pre-process a digital signal received via the digital interface to form the plurality of TX digital signals to be transmitted to the plurality of DACs; control circuitry and a control interface; wherein the pre-processing circuitry further comprises RF calibration circuitry configured to: transmit calibration data for the plurality of analog RF chips to the control circuitry; and wherein the control circuitry is configured to transmit control signals indicative of the calibration data to the plurality of analog RF chips via the control interface. an analog interface for transmitting TX analog signals and receiving RX analog signals to and from a plurality of analog Radio Frequency, RF, chips; a digital interface for transmitting and receiving digital signals to and from a baseband chip; a plurality of Analog-to-Digital Converters, ADCs, for converting a plurality of RX analog signals received via the analog interface to a plurality of RX digital signals; a plurality of Digital-to-Analog Converters, DACs, for converting a plurality of TX digital signals to a plurality of TX analog signals to be transmitted to the plurality of analog RF chips via the analog interface; pre-processing circuitry configured to: pre-process the plurality of RX digital signals received from the plurality of ADCs to form a pre-processed digital signal to be transmitted to the baseband chip via the digital interface; pre-process a digital signal received via the digital interface to form the plurality of TX digital signals to be transmitted to the plurality of DACs; pre-process the plurality of RX digital signals received from the plurality of ADCs to form a pre-processed digital signal to be transmitted to the baseband chip via the digital interface; pre-process a digital signal received via the digital interface to form the plurality of TX digital signals to be transmitted to the plurality of DACs; control circuitry and a control interface; wherein the pre-processing circuitry further comprises RF calibration circuitry configured to: transmit calibration data for the plurality of analog RF chips to the control circuitry; and wherein the control circuitry is configured to transmit control signals indicative of the calibration data to the plurality of analog RF chips via the control interface.