A thin film transistor, comprising: a base substrate; an active layer on the base substrate comprising a first semiconductor region (AL-1), a second semiconductor region (AL-2), and a plurality of semiconductor bridges (AL-B) each of which connecting the first semiconductor region (AL-1) and the second semiconductor region (AL-2); the plurality of semiconductor bridges (AL-B) spaced apart from each other; the active layer being made of a material comprising M1O a N b, wherein M1 is a single metal or a combination of metals, a > 0, and b ≥ 0; an etch stop layer on a side of the active layer distal to the base substrate; the first semiconductor region (AL-1) comprising a first non-overlapping portion (NOL-1), a projection of which is outside that of the etch stop layer in plan view of the base substrate; the second semiconductor region (AL-2) comprising a second non-overlapping portion (NOL-2), a projection of which is outside that of the etch stop layer in plan view of the base substrate; a first electrode on a side of the first non-overlapping portion (NOL-1) distal to the base substrate; and a second electrode on a side of the second non-overlapping portion (NOL-2) distal to the base substrate, characterized in that, the active layer further comprises a third semiconductor region (AL-3), a fourth semiconductor region (AL-4), and a plurality of additional semiconductor bridges (AL-B) each of which connecting the third semiconductor region (AL-3) and the fourth semiconductor region (AL-4); the plurality of additional semiconductor bridges (AL-B) spaced apart from each other; the third semiconductor region (AL-3) comprising a third non-overlapping portion (NOL-3), a projection of which is outside that of the etch stop layer in plan view of the base substrate; the fourth semiconductor region (AL-4) comprising a fourth non-overlapping portion (NOL-4), a projection of which is outside that of the etch stop layer in plan view of the base substrate; the first electrode is on a side of the third non-overlapping portion (NOL-3) distal to the base substrate; and the second electrode is on a side of the fourth non-overlapping portion (NOL-4) distal to the base substrate. a base substrate; an active layer on the base substrate comprising a first semiconductor region (AL-1), a second semiconductor region (AL-2), and a plurality of semiconductor bridges (AL-B) each of which connecting the first semiconductor region (AL-1) and the second semiconductor region (AL-2); the plurality of semiconductor bridges (AL-B) spaced apart from each other; the active layer being made of a material comprising M1O a N b, wherein M1 is a single metal or a combination of metals, a > 0, and b ≥ 0; an etch stop layer on a side of the active layer distal to the base substrate; the first semiconductor region (AL-1) comprising a first non-overlapping portion (NOL-1), a projection of which is outside that of the etch stop layer in plan view of the base substrate; the second semiconductor region (AL-2) comprising a second non-overlapping portion (NOL-2), a projection of which is outside that of the etch stop layer in plan view of the base substrate; a first electrode on a side of the first non-overlapping portion (NOL-1) distal to the base substrate; and a second electrode on a side of the second non-overlapping portion (NOL-2) distal to the base substrate, characterized in that, the active layer further comprises a third semiconductor region (AL-3), a fourth semiconductor region (AL-4), and a plurality of additional semiconductor bridges (AL-B) each of which connecting the third semiconductor region (AL-3) and the fourth semiconductor region (AL-4); the plurality of additional semiconductor bridges (AL-B) spaced apart from each other; the third semiconductor region (AL-3) comprising a third non-overlapping portion (NOL-3), a projection of which is outside that of the etch stop layer in plan view of the base substrate; the fourth semiconductor region (AL-4) comprising a fourth non-overlapping portion (NOL-4), a projection of which is outside that of the etch stop layer in plan view of the base substrate; the first electrode is on a side of the third non-overlapping portion (NOL-3) distal to the base substrate; and the second electrode is on a side of the fourth non-overlapping portion (NOL-4) distal to the base substrate.