A semiconductor device comprising: a semiconductor substrate; a first gate oxide film formed on said semiconductor substrate; a first gate electrode formed on said first gate oxide film and made of a single conducting layer; first source/drain regions formed in said semiconductor substrate on both sides of said first gate electrode; and first laminated side wall spacers having two or more layers and formed on side walls of said first gate electrode, said first laminated side wall spacers including an innermost layer made of a nitride film or a deposited oxide film, an outermost layer made of an oxide film or an oxynitride film and having a bottom surface contacting said semiconductor substrate, said first gate oxide film, or a side wall spacer layer other than said nitride film; the semiconductor device further comprising: a laminated gate electrode structure formed on said semiconductor substrate, comprising: a tunneling insulating film formed on said semiconductor substrate; a floating gate electrode formed on said tunneling insulating film; an insulating film formed on said floating gate electrode; and a control gate electrode formed on said insulating film; second source/drain regions (31, 33) formed in said semiconductor substrate on both sides of said laminated gate electrode structure; and second laminated side wall spacers having three or more layers, formed on side walls of said laminated gate electrode structure, and including a thermally oxidized layer as an innermost layer, and a nitride film as an intermediate layer not contacting said semiconductor substrate. a semiconductor substrate; a first gate oxide film formed on said semiconductor substrate; a first gate electrode formed on said first gate oxide film and made of a single conducting layer; first source/drain regions formed in said semiconductor substrate on both sides of said first gate electrode; and first laminated side wall spacers having two or more layers and formed on side walls of said first gate electrode, said first laminated side wall spacers including an innermost layer made of a nitride film or a deposited oxide film, an outermost layer made of an oxide film or an oxynitride film and having a bottom surface contacting said semiconductor substrate, said first gate oxide film, or a side wall spacer layer other than said nitride film; the semiconductor device further comprising: a laminated gate electrode structure formed on said semiconductor substrate, comprising: a tunneling insulating film formed on said semiconductor substrate; a floating gate electrode formed on said tunneling insulating film; an insulating film formed on said floating gate electrode; and a control gate electrode formed on said insulating film; second source/drain regions (31, 33) formed in said semiconductor substrate on both sides of said laminated gate electrode structure; and second laminated side wall spacers having three or more layers, formed on side walls of said laminated gate electrode structure, and including a thermally oxidized layer as an innermost layer, and a nitride film as an intermediate layer not contacting said semiconductor substrate. a laminated gate electrode structure formed on said semiconductor substrate, comprising: a tunneling insulating film formed on said semiconductor substrate; a floating gate electrode formed on said tunneling insulating film; an insulating film formed on said floating gate electrode; and a control gate electrode formed on said insulating film; second source/drain regions (31, 33) formed in said semiconductor substrate on both sides of said laminated gate electrode structure; and second laminated side wall spacers having three or more layers, formed on side walls of said laminated gate electrode structure, and including a thermally oxidized layer as an innermost layer, and a nitride film as an intermediate layer not contacting said semiconductor substrate. a tunneling insulating film formed on said semiconductor substrate; a floating gate electrode formed on said tunneling insulating film; an insulating film formed on said floating gate electrode; and a control gate electrode formed on said insulating film; second source/drain regions (31, 33) formed in said semiconductor substrate on both sides of said laminated gate electrode structure; and second laminated side wall spacers having three or more layers, formed on side walls of said laminated gate electrode structure, and including a thermally oxidized layer as an innermost layer, and a nitride film as an intermediate layer not contacting said semiconductor substrate.