A liquid crystal display device comprising: a liquid crystal panel including a pad electrode receiving one of a driving signal and a power supply voltage signal; a lower transparent insulating substrate; an upper insulating substrate smaller than the lower insulating substrate; a liquid crystal disposed between the upper insulating substrate and the lower insulating substrate; and a tape circuit substrate including a base film made of an insulating material, and a signal line formed on the base film and having an inner lead electrically connected to a semiconductor chip, an outer lead formed on the base film, and a connection wire formed on the base film to electrically connect the inner lead to the outer lead, the outer lead having a slit (123, 124) disposed at an overlap region between the pad electrode of the liquid crystal panel and the outer lead, the slit (123, 124) being formed at an end portion of the outer lead; and an anisotropic conductive film connecting the signal line with the pad electrode; wherein the pad electrode is formed by a first conductive layer (222_2) and a second conductive layer (222_1), said first conductive layer (222_2) being on the lower insulating substrate and said second conductive layer (222_1) being stacked on the first conductive layer (222_2); wherein at side portions of the pad electrode, protective layers (241, 242) are formed between the second conductive layer (222_1) and the lower transparent insulating substrate and said second conductive layer (222_1) being also stacked over said protective layers (241, 242). a liquid crystal panel including a pad electrode receiving one of a driving signal and a power supply voltage signal; a lower transparent insulating substrate; an upper insulating substrate smaller than the lower insulating substrate; a liquid crystal disposed between the upper insulating substrate and the lower insulating substrate; and a tape circuit substrate including a base film made of an insulating material, and a signal line formed on the base film and having an inner lead electrically connected to a semiconductor chip, an outer lead formed on the base film, and a connection wire formed on the base film to electrically connect the inner lead to the outer lead, the outer lead having a slit (123, 124) disposed at an overlap region between the pad electrode of the liquid crystal panel and the outer lead, the slit (123, 124) being formed at an end portion of the outer lead; and an anisotropic conductive film connecting the signal line with the pad electrode; a base film made of an insulating material, and a signal line formed on the base film and having an inner lead electrically connected to a semiconductor chip, an outer lead formed on the base film, and a connection wire formed on the base film to electrically connect the inner lead to the outer lead, the outer lead having a slit (123, 124) disposed at an overlap region between the pad electrode of the liquid crystal panel and the outer lead, the slit (123, 124) being formed at an end portion of the outer lead; and an anisotropic conductive film connecting the signal line with the pad electrode; wherein the pad electrode is formed by a first conductive layer (222_2) and a second conductive layer (222_1), said first conductive layer (222_2) being on the lower insulating substrate and said second conductive layer (222_1) being stacked on the first conductive layer (222_2); wherein at side portions of the pad electrode, protective layers (241, 242) are formed between the second conductive layer (222_1) and the lower transparent insulating substrate and said second conductive layer (222_1) being also stacked over said protective layers (241, 242).