An active filter control device that controls a parallel active filter connected to an AC power supply through an interconnection reactor and outputting compensating current (Ic; Id, Iq), said AC power supply supplying load current (Io) to a load, said active filter control device comprising: a harmonic component extraction unit (7A; 7B) obtaining a command value (Ic*; Id*, Iq*) of said compensating current from a harmonic component of said load current; a difference current generation unit (3A; 3B) obtaining a deviation (Ie) between said compensating current and a value (Ic*^; Id*^, Iq*^) obtained by leading a phase of said command value by a predetermined phase difference (360°×ta/Tr); a current controller (5; 10dd, 10qq) generating a control signal (V*; Vid, Viq) based on output of said difference current generation unit; and a driving signal generation circuit generating, based on said control signal, a driving signal driving said parallel active filter characterized in that said difference current generation unit (3A; 3B) includes: a delay unit performing processing of delaying said command value (Ic*; Id*, Iq*) by a phase obtained by subtracting said predetermined phase difference (360°×ta/Tr) from a phase for one cycle of said AC power supply; said delay unit includes a memory having N storage locations storing said command value for a cycle of Tr of said power supply, and outputs said command value delayed for (N-k) data by introducing a non-negative integer k which approximates the time (ta) corresponding to the phase difference by k/(N/TR); and a subtracter obtains a difference between output (Ic*^; Id*^, Iq*^) of said delay unit and said compensating current (Ic; Id, Iq). a harmonic component extraction unit (7A; 7B) obtaining a command value (Ic*; Id*, Iq*) of said compensating current from a harmonic component of said load current; a difference current generation unit (3A; 3B) obtaining a deviation (Ie) between said compensating current and a value (Ic*^; Id*^, Iq*^) obtained by leading a phase of said command value by a predetermined phase difference (360°×ta/Tr); a current controller (5; 10dd, 10qq) generating a control signal (V*; Vid, Viq) based on output of said difference current generation unit; and a driving signal generation circuit generating, based on said control signal, a driving signal driving said parallel active filter characterized in that said difference current generation unit (3A; 3B) includes: a delay unit performing processing of delaying said command value (Ic*; Id*, Iq*) by a phase obtained by subtracting said predetermined phase difference (360°×ta/Tr) from a phase for one cycle of said AC power supply; said delay unit includes a memory having N storage locations storing said command value for a cycle of Tr of said power supply, and outputs said command value delayed for (N-k) data by introducing a non-negative integer k which approximates the time (ta) corresponding to the phase difference by k/(N/TR); and a subtracter obtains a difference between output (Ic*^; Id*^, Iq*^) of said delay unit and said compensating current (Ic; Id, Iq). a delay unit performing processing of delaying said command value (Ic*; Id*, Iq*) by a phase obtained by subtracting said predetermined phase difference (360°×ta/Tr) from a phase for one cycle of said AC power supply; said delay unit includes a memory having N storage locations storing said command value for a cycle of Tr of said power supply, and outputs said command value delayed for (N-k) data by introducing a non-negative integer k which approximates the time (ta) corresponding to the phase difference by k/(N/TR); and a subtracter obtains a difference between output (Ic*^; Id*^, Iq*^) of said delay unit and said compensating current (Ic; Id, Iq).