Arrangement for registering light, comprising: a MOS-transistor structure (101, 201, 401, 501, 601, 701) having a first source/drain region, a second source/drain region, and a bulk region at least partially between the first source/drain region and the second source/drain region, wherein the bulk region has a doping type different from another doping type of the first and the second source/drain regions (103, 105), an output terminal to which the second source/drain region is connected, wherein the output terminal is adapted to provide an output current based on a characteristic, in particular intensity, of the light impinging on the bulk region, wherein the bulk region is adapted such that charge carriers can be generated in dependence of light impinging on the bulk region, and such that the generated charge carriers can control a current flowing from the first source/drain region to the second source/drain region via at least a portion of the bulk region, the first source/drain region being connected to a reference potential (115, 415, 515, 615, 715), characterized in that the bulk region connected to said reference potential (115, 415, 515, 615, 715) via a high resistance connection having a resistance larger than 10 MΩ, in particular between 10 MΩ and 100 GΩ, said high resistance connection is embodied using a further MOS-transistor structure (123, 423, 523, 623, 723), wherein the further MOS-transistor structure (123, 423, 523, 623, 723) has a further first source/drain region (125, 425, 525, 625), a further second source/drain region (127, 427, 527, 627), a further bulk region (129, 429, 529, 629), and a further gate (131, 431, 531, 631), wherein the further first source/drain region (125, 425, 525, 625), the further gate (131, 431, 531, 631) and the further bulk region (129, 429, 529, 629) are electrically connected with each other, the further first source/drain region being electrically connected to a reference potential and wherein the further second source/drain region (127, 427, 527, 627) of the further MOS-transistor structure (123, 423, 523, 623, 723) is electrically connected to the bulk region of the MOS-transistor structure. a MOS-transistor structure (101, 201, 401, 501, 601, 701) having a first source/drain region, a second source/drain region, and a bulk region at least partially between the first source/drain region and the second source/drain region, wherein the bulk region has a doping type different from another doping type of the first and the second source/drain regions (103, 105), an output terminal to which the second source/drain region is connected, wherein the output terminal is adapted to provide an output current based on a characteristic, in particular intensity, of the light impinging on the bulk region, wherein the bulk region is adapted such that charge carriers can be generated in dependence of light impinging on the bulk region, and such that the generated charge carriers can control a current flowing from the first source/drain region to the second source/drain region via at least a portion of the bulk region, the first source/drain region being connected to a reference potential (115, 415, 515, 615, 715), characterized in that the bulk region connected to said reference potential (115, 415, 515, 615, 715) via a high resistance connection having a resistance larger than 10 MΩ, in particular between 10 MΩ and 100 GΩ, said high resistance connection is embodied using a further MOS-transistor structure (123, 423, 523, 623, 723), wherein the further MOS-transistor structure (123, 423, 523, 623, 723) has a further first source/drain region (125, 425, 525, 625), a further second source/drain region (127, 427, 527, 627), a further bulk region (129, 429, 529, 629), and a further gate (131, 431, 531, 631), wherein the further first source/drain region (125, 425, 525, 625), the further gate (131, 431, 531, 631) and the further bulk region (129, 429, 529, 629) are electrically connected with each other, the further first source/drain region being electrically connected to a reference potential and wherein the further second source/drain region (127, 427, 527, 627) of the further MOS-transistor structure (123, 423, 523, 623, 723) is electrically connected to the bulk region of the MOS-transistor structure.