A sampling circuit that operates in at least a sample state and a hold state comprising: a semiconductor switch that operates in at least a non-conductive mode and a conductive mode as directed by an amount of charge applied to a control terminal (435, 535), the semiconductor switch being coupled between a source of an input signal and a capacitor; a charge generator for producing a charge, wherein the charge generator is distinct from and non-coupled to the input signal and coupled to the control terminal (435, 535) to control the switch; wherein the charge generator includes a control circuit (425, 525) that is operative to selectively direct the charge generator to generate a predetermined current (I p) for a predetermined duration (T P) to deliver a predetermined amount of charge (Q P) to the control terminal (435, 535) such that the impedance of the semiconductor switch during a sample state is maintained substantially constant; wherein the control circuit (425, 525) comprises: a controlled current source coupled to the control terminal (435, 535); a control switch coupled between the control terminal (435, 535) and a ground; a timing circuit coupled between a control terminal (435, 535) of the control switch and an input of the controlled current source; and a command node directly coupled to both the control terminal of the control switch and the input of the timing circuit; the sampling circuit characterized in that the predetermined duration (T P) is adjusted by monitoring a gate to channel capacitance and a parasitic capacitance of a device which substantially replicates the properties of the semiconductor switch (410, 510). a semiconductor switch that operates in at least a non-conductive mode and a conductive mode as directed by an amount of charge applied to a control terminal (435, 535), the semiconductor switch being coupled between a source of an input signal and a capacitor; a charge generator for producing a charge, wherein the charge generator is distinct from and non-coupled to the input signal and coupled to the control terminal (435, 535) to control the switch; wherein the charge generator includes a control circuit (425, 525) that is operative to selectively direct the charge generator to generate a predetermined current (I p) for a predetermined duration (T P) to deliver a predetermined amount of charge (Q P) to the control terminal (435, 535) such that the impedance of the semiconductor switch during a sample state is maintained substantially constant; wherein the control circuit (425, 525) comprises: a controlled current source coupled to the control terminal (435, 535); a control switch coupled between the control terminal (435, 535) and a ground; a timing circuit coupled between a control terminal (435, 535) of the control switch and an input of the controlled current source; and a command node directly coupled to both the control terminal of the control switch and the input of the timing circuit; the sampling circuit characterized in that the predetermined duration (T P) is adjusted by monitoring a gate to channel capacitance and a parasitic capacitance of a device which substantially replicates the properties of the semiconductor switch (410, 510). a controlled current source coupled to the control terminal (435, 535); a control switch coupled between the control terminal (435, 535) and a ground; a timing circuit coupled between a control terminal (435, 535) of the control switch and an input of the controlled current source; and a command node directly coupled to both the control terminal of the control switch and the input of the timing circuit; the sampling circuit characterized in that the predetermined duration (T P) is adjusted by monitoring a gate to channel capacitance and a parasitic capacitance of a device which substantially replicates the properties of the semiconductor switch (410, 510).