A memory circuit comprising: a memory area in which a plurality of memory cells are arranged in matrix fashion, each of the plurality of memory cells including both a bistable circuit configured to store data in a volatile manner and a variable resistance nonvolatile element (MTJ1, MTJ2) configured to store the data written in the bistable circuit in a nonvolatile manner and restore the data stored in the nonvolatile manner into the bistable circuit, the memory circuit being characterized in that the memory area is divided into a plurality of regions each including at least two of the memory cells, and in that the memory circuit further comprises: a control unit configured to determine whether the data in the bistable circuit in at least one of the memory cells included in a corresponding region has been rewritten in a volatile manner after data was last restored into the bistable circuit in each of the regions, the control unit not storing the data in the bistable circuit into the nonvolatile element (MTJ1, MTJ2) in the memory cells included in the corresponding region when determining that the data in the bistable circuit has not been rewritten, the control unit storing the data in the bistable circuit into the nonvolatile element (MTJ1, MTJ2) in the memory cells included in the corresponding region when determining that the data in the bistable circuit has been rewritten; and a plurality of memory units, a memory unit being provided for each of the plurality of regions, each memory unit configured to store information as to whether the data in at least one of the bistable circuits of the region has been rewritten. a memory area in which a plurality of memory cells are arranged in matrix fashion, each of the plurality of memory cells including both a bistable circuit configured to store data in a volatile manner and a variable resistance nonvolatile element (MTJ1, MTJ2) configured to store the data written in the bistable circuit in a nonvolatile manner and restore the data stored in the nonvolatile manner into the bistable circuit, the memory circuit being characterized in that the memory area is divided into a plurality of regions each including at least two of the memory cells, and in that the memory circuit further comprises: a control unit configured to determine whether the data in the bistable circuit in at least one of the memory cells included in a corresponding region has been rewritten in a volatile manner after data was last restored into the bistable circuit in each of the regions, the control unit not storing the data in the bistable circuit into the nonvolatile element (MTJ1, MTJ2) in the memory cells included in the corresponding region when determining that the data in the bistable circuit has not been rewritten, the control unit storing the data in the bistable circuit into the nonvolatile element (MTJ1, MTJ2) in the memory cells included in the corresponding region when determining that the data in the bistable circuit has been rewritten; and a plurality of memory units, a memory unit being provided for each of the plurality of regions, each memory unit configured to store information as to whether the data in at least one of the bistable circuits of the region has been rewritten. a control unit configured to determine whether the data in the bistable circuit in at least one of the memory cells included in a corresponding region has been rewritten in a volatile manner after data was last restored into the bistable circuit in each of the regions, the control unit not storing the data in the bistable circuit into the nonvolatile element (MTJ1, MTJ2) in the memory cells included in the corresponding region when determining that the data in the bistable circuit has not been rewritten, the control unit storing the data in the bistable circuit into the nonvolatile element (MTJ1, MTJ2) in the memory cells included in the corresponding region when determining that the data in the bistable circuit has been rewritten; and a plurality of memory units, a memory unit being provided for each of the plurality of regions, each memory unit configured to store information as to whether the data in at least one of the bistable circuits of the region has been rewritten.