An apparatus comprising: a driver circuit, powered by a first supply voltage and a second supply voltage, the second supply voltage being different from the first supply voltage; and configured to receive a differential input signal having a first voltage range, the differential input signal having a first input signal, Vinp, and a second input signal, Vinn, the first voltage range varying between the first supply voltage and circuit ground; and provide a differential drive signal having a second voltage range, the differential drive signal having a first drive signal, Vdrp, and a second drive signal, Vdrn, wherein the second voltage range is different from the first voltage range, the second voltage range varying between the second supply voltage and circuit ground, the first supply voltage being different from the second supply voltage; and a latch coupled to the driver circuit and configured to receive the differential drive signal and provide an output signal having the second voltage range; and characterised in that the driver circuit comprises a first inverter (312,512) configured to receive Vinp and provide a first intermediate signal, Vintp, a second inverter (314, 514), coupled to the first inverter (312, 512) and arranged to receive Vintp as its supply voltage wherein the second inverter is configured to provide a first control signal, Vctrlp; a first metal oxide semiconductor, MOS, transistor (322, 522) coupled to the second inverter (314, 514) and configured to receive Vctrlp and provide Vdrp; a third inverter (316, 516) to receive Vinn and provide a second intermediate signal, Vintn; a fourth inverter (318, 518) coupled to the third inverter (316, 516) and arranged to receive Vintn as its supply voltage, wherein the fourth inverter is configured to provide a second control signal, Vctrln; and a second MOS transistor (324, 524) coupled to the fourth inverter (318, 518) and to receive the second control signal and provide Vdrn wherein the first (312,512) and third (316,516) inverters are configured to operate between the first voltage range, and the second (314, 514) and fourth inverters (318, 518) are configured to operate between either the first voltage range or the second voltage range depending on a logic value of the differential input signal. a driver circuit, powered by a first supply voltage and a second supply voltage, the second supply voltage being different from the first supply voltage; and configured to receive a differential input signal having a first voltage range, the differential input signal having a first input signal, Vinp, and a second input signal, Vinn, the first voltage range varying between the first supply voltage and circuit ground; and provide a differential drive signal having a second voltage range, the differential drive signal having a first drive signal, Vdrp, and a second drive signal, Vdrn, wherein the second voltage range is different from the first voltage range, the second voltage range varying between the second supply voltage and circuit ground, the first supply voltage being different from the second supply voltage; and a latch coupled to the driver circuit and configured to receive the differential drive signal and provide an output signal having the second voltage range; and characterised in that the driver circuit comprises a first inverter (312,512) configured to receive Vinp and provide a first intermediate signal, Vintp, a second inverter (314, 514), coupled to the first inverter (312, 512) and arranged to receive Vintp as its supply voltage wherein the second inverter is configured to provide a first control signal, Vctrlp; a first metal oxide semiconductor, MOS, transistor (322, 522) coupled to the second inverter (314, 514) and configured to receive Vctrlp and provide Vdrp; a third inverter (316, 516) to receive Vinn and provide a second intermediate signal, Vintn; a fourth inverter (318, 518) coupled to the third inverter (316, 516) and arranged to receive Vintn as its supply voltage, wherein the fourth inverter is configured to provide a second control signal, Vctrln; and a second MOS transistor (324, 524) coupled to the fourth inverter (318, 518) and to receive the second control signal and provide Vdrn wherein the first (312,512) and third (316,516) inverters are configured to operate between the first voltage range, and the second (314, 514) and fourth inverters (318, 518) are configured to operate between either the first voltage range or the second voltage range depending on a logic value of the differential input signal.