A transceiver system, comprising: a first transceiver having a first quadrature receiver channel configured to receive an analog receive signal, wherein the first quadrature receiver channel comprises a first analog-to-digital converter, ADC, configured to generate a first digital I signal (I 1) based on the analog receive signal and a second ADC configured to generate a first digital Q signal (Q 1) based on the analog receive signal, the first and second ADCs have a first noise profile versus frequency; a second transceiver having a second quadrature receiver channel configured to receive the analog receive signal, wherein the second quadrature receiver channel comprises a third ADC configured to generate a second digital I signal (I 2) based on the analog receive signal and a fourth ADC configured to generate a second digital Q signal (Q 2) based on the analog receive signal, the third and fourth ADCs have a second noise profile versus frequency; a control circuit configured to digitally control the first, second, third and fourth ADCs, such that: a) in a normal receive mode, the first and second noise profiles are similar; and b) in a digital predistortion mode, in which the third and fourth ADCs are connected to the first quadrature receiver channel and the analog receive signal corresponds to DPD observation signal, the first and second ADCs operate in a pass band mode and the third and fourth ADCs operate in a low pass mode such that the first noise profile has lower noise than the second noise profile over a first frequency range, and the second noise profile has lower noise that the first noise profile over a second frequency range; and a digital processing circuit comprising a reconstruction filter configured, in the DPD mode, to combine at least the first and second digital I signals to generate an output I signal (O 1), and at least the first and second digital Q signals to generate an output Q signal (O Q), wherein the output I signal and the output Q signal have lower noise over frequency relative to the first noise profile and the second noise profile alone, in the DPD mode. a first transceiver having a first quadrature receiver channel configured to receive an analog receive signal, wherein the first quadrature receiver channel comprises a first analog-to-digital converter, ADC, configured to generate a first digital I signal (I 1) based on the analog receive signal and a second ADC configured to generate a first digital Q signal (Q 1) based on the analog receive signal, the first and second ADCs have a first noise profile versus frequency; a second transceiver having a second quadrature receiver channel configured to receive the analog receive signal, wherein the second quadrature receiver channel comprises a third ADC configured to generate a second digital I signal (I 2) based on the analog receive signal and a fourth ADC configured to generate a second digital Q signal (Q 2) based on the analog receive signal, the third and fourth ADCs have a second noise profile versus frequency; a control circuit configured to digitally control the first, second, third and fourth ADCs, such that: a) in a normal receive mode, the first and second noise profiles are similar; and b) in a digital predistortion mode, in which the third and fourth ADCs are connected to the first quadrature receiver channel and the analog receive signal corresponds to DPD observation signal, the first and second ADCs operate in a pass band mode and the third and fourth ADCs operate in a low pass mode such that the first noise profile has lower noise than the second noise profile over a first frequency range, and the second noise profile has lower noise that the first noise profile over a second frequency range; and a) in a normal receive mode, the first and second noise profiles are similar; and b) in a digital predistortion mode, in which the third and fourth ADCs are connected to the first quadrature receiver channel and the analog receive signal corresponds to DPD observation signal, the first and second ADCs operate in a pass band mode and the third and fourth ADCs operate in a low pass mode such that the first noise profile has lower noise than the second noise profile over a first frequency range, and the second noise profile has lower noise that the first noise profile over a second frequency range; and a digital processing circuit comprising a reconstruction filter configured, in the DPD mode, to combine at least the first and second digital I signals to generate an output I signal (O 1), and at least the first and second digital Q signals to generate an output Q signal (O Q), wherein the output I signal and the output Q signal have lower noise over frequency relative to the first noise profile and the second noise profile alone, in the DPD mode.