A system-on-a-chip, comprising a processor core, a multiplication hardware circuit array consisting of one or more multiplication hardware circuits, a data input buffer, a data output buffer, and a control circuit, wherein the control circuit is connected to the processor core, the data input buffer, and the data output circuit; the data input buffer is configured to obtain data from the processor core by using the control circuit; the multiplication hardware circuit array is configured to: obtain data in the data input buffer for processing, obtain a processed result, and output the processed result to the data output buffer; and the control circuit is further configured to interact with the processor core, so that the processor core obtains data in the data output buffer; wherein, the multiplication circuit is configured to perform a multiplication operation on two pieces of data: A and B, and comprises: an addition subcircuit, configured to: obtain logarithmic field data a and logarithmic field data b that are respectively corresponding to A and B, and perform an addition operation on a and b to obtain c, wherein c comprises an integral part and a fractional part; an exponentiation operation subcircuit, configured to perform an exponentiation operation in which a base is 2 and an exponent is the fractional part of c, to obtain an exponentiation operation result; a shift subcircuit, configured to shift the exponentiation operation result based on the integral part of c to obtain a shift result; and an output subcircuit, configured to output a product of A and B based on signs of a and b and with reference to the shift result; characterized in that: the system-on-a-chip further comprising a logarithmic field conversion circuit, configured to perform logarithmic field conversion on output of the multiplication hardware circuit array, and input a converted result to the data input buffer. the control circuit is connected to the processor core, the data input buffer, and the data output circuit; the data input buffer is configured to obtain data from the processor core by using the control circuit; the multiplication hardware circuit array is configured to: obtain data in the data input buffer for processing, obtain a processed result, and output the processed result to the data output buffer; and the control circuit is further configured to interact with the processor core, so that the processor core obtains data in the data output buffer; wherein, the multiplication circuit is configured to perform a multiplication operation on two pieces of data: A and B, and comprises: an addition subcircuit, configured to: obtain logarithmic field data a and logarithmic field data b that are respectively corresponding to A and B, and perform an addition operation on a and b to obtain c, wherein c comprises an integral part and a fractional part; an exponentiation operation subcircuit, configured to perform an exponentiation operation in which a base is 2 and an exponent is the fractional part of c, to obtain an exponentiation operation result; a shift subcircuit, configured to shift the exponentiation operation result based on the integral part of c to obtain a shift result; and an output subcircuit, configured to output a product of A and B based on signs of a and b and with reference to the shift result; an addition subcircuit, configured to: obtain logarithmic field data a and logarithmic field data b that are respectively corresponding to A and B, and perform an addition operation on a and b to obtain c, wherein c comprises an integral part and a fractional part; an exponentiation operation subcircuit, configured to perform an exponentiation operation in which a base is 2 and an exponent is the fractional part of c, to obtain an exponentiation operation result; a shift subcircuit, configured to shift the exponentiation operation result based on the integral part of c to obtain a shift result; and an output subcircuit, configured to output a product of A and B based on signs of a and b and with reference to the shift result; characterized in that: the system-on-a-chip further comprising a logarithmic field conversion circuit, configured to perform logarithmic field conversion on output of the multiplication hardware circuit array, and input a converted result to the data input buffer.