An apparatus, comprising: a plurality of external terminals arranged in a plurality of external terminal pairs, wherein an external terminal pair of the plurality of external terminal pairs is configured to receive a differential signal, the plurality of external terminal pairs including a plurality of non-split pairs (104a-b, 104d-e, 104g-h), wherein all non-split pairs (104a-b, 104d-e, 104g-h) of the plurality of external terminal pairs are included in the plurality of non-split pairs (104a-b, 104d-e, 104g-h); a plurality of internal terminals corresponding to the plurality of external terminals, respectively; and a plurality of filters (108a-c) coupled to the plurality of non-split pairs (104a-b, 104d-e, 104g-h), respectively, a filter of the plurality of filters (108a-c) being coupled to a first external terminal of a non-split pair of the plurality of non-split pairs (104a-b, 104d-e, 104g-h) and a second external terminal of the non-split pair, the filter including a first inductor coupled between the first external terminal and a first side of a capacitor, and a second inductor coupled between the second external terminal and a second side of the capacitor, the filter being operative to tune return loss caused by the first and second external terminals and help compensate for a capacitive load induced by sizes of and a proximity between the first and second external terminals, the first and second inductors (124, 126) being coupled to the first and second external terminals, respectively, within a distance of 2.5 millimeters to improve return loss tuning and reduce propagation delay due to path length between the first and second inductors (124, 126) and the first and second external terminals, respectively. a plurality of external terminals arranged in a plurality of external terminal pairs, wherein an external terminal pair of the plurality of external terminal pairs is configured to receive a differential signal, the plurality of external terminal pairs including a plurality of non-split pairs (104a-b, 104d-e, 104g-h), wherein all non-split pairs (104a-b, 104d-e, 104g-h) of the plurality of external terminal pairs are included in the plurality of non-split pairs (104a-b, 104d-e, 104g-h); a plurality of internal terminals corresponding to the plurality of external terminals, respectively; and a plurality of filters (108a-c) coupled to the plurality of non-split pairs (104a-b, 104d-e, 104g-h), respectively, a filter of the plurality of filters (108a-c) being coupled to a first external terminal of a non-split pair of the plurality of non-split pairs (104a-b, 104d-e, 104g-h) and a second external terminal of the non-split pair, the filter including a first inductor coupled between the first external terminal and a first side of a capacitor, and a second inductor coupled between the second external terminal and a second side of the capacitor, the filter being operative to tune return loss caused by the first and second external terminals and help compensate for a capacitive load induced by sizes of and a proximity between the first and second external terminals, the first and second inductors (124, 126) being coupled to the first and second external terminals, respectively, within a distance of 2.5 millimeters to improve return loss tuning and reduce propagation delay due to path length between the first and second inductors (124, 126) and the first and second external terminals, respectively.