An arrangement for monitoring and protection of a complementary metal oxide semiconductor (CMOS) device, said arrangement comprising: a complementary metal oxide semiconductor (CMOS) device; a current measurement circuit for measuring current therethrough and adapted for coupling to a power source, the current measurement circuit having a measured current output; a power switching circuit coupled to the current measurement circuit and having an output for supplying power to the CMOS device; a comparator having a first input coupled to the measured current output of the current measurement circuit; a current trip set point circuit having an input coupled to the CMOS device and a first output coupled to a second input of the comparator, wherein the CMOS device sends device configuration information to the current trip set point circuit for determining a high current trip set point; and the comparator having an output coupled to the power switching circuit that causes the power switching circuit to operate normally as a voltage regulator with the regulator control circuit when the comparator output is at a first logic level, and to shut down the power switching circuit when the comparator output is at a second logic level, thereby cycling power on and off to the CMOS device, wherein the comparator output is at the first logic level when the measured current from the current measurement circuit is less than the high current trip set point, and is at the second logic level when the measured current is greater than or equal to the high current trip set point, characterized by a regulator control circuit coupled to the power switching circuit, wherein the regulator control circuit and the power switching circuit form a voltage regulator controlling a voltage at the output of the power switching circuit. a complementary metal oxide semiconductor (CMOS) device; a current measurement circuit for measuring current therethrough and adapted for coupling to a power source, the current measurement circuit having a measured current output; a power switching circuit coupled to the current measurement circuit and having an output for supplying power to the CMOS device; a comparator having a first input coupled to the measured current output of the current measurement circuit; a current trip set point circuit having an input coupled to the CMOS device and a first output coupled to a second input of the comparator, wherein the CMOS device sends device configuration information to the current trip set point circuit for determining a high current trip set point; and the comparator having an output coupled to the power switching circuit that causes the power switching circuit to operate normally as a voltage regulator with the regulator control circuit when the comparator output is at a first logic level, and to shut down the power switching circuit when the comparator output is at a second logic level, thereby cycling power on and off to the CMOS device, wherein the comparator output is at the first logic level when the measured current from the current measurement circuit is less than the high current trip set point, and is at the second logic level when the measured current is greater than or equal to the high current trip set point, characterized by a regulator control circuit coupled to the power switching circuit, wherein the regulator control circuit and the power switching circuit form a voltage regulator controlling a voltage at the output of the power switching circuit.