A computing device comprising: a plurality of processor cores; a memory; firmware logic to (i) allocate at least one of the plurality of processor cores to a spare set of processor cores, (ii) establish a spare processor core hardware description table in the memory that includes each of the processor cores allocated to the spare set of processor cores, and (iii) establish a main processor core hardware description table in the memory that includes each of at least one main processor core of a main set of processor cores not allocated to the spare set of processor cores; processor control logic to control a processor register to indicate whether each processor core of the plurality processor cores is a processor core allocated to the spare set of processor cores or a main processor core not allocated to the spare set of processor cores, wherein at least one of the firmware logic and the processor control logic performs a processor core swap between the main processor cores not allocated to the spare set of processor cores and the processor cores allocated to the spare set of processor cores in response to a processor core error having been caused by a main processor core not allocated to the spare set of processor cores; wherein: the main processor core hardware description table does not include the processor cores allocated to the spare set of processor cores; and the firmware logic: determines whether processor core error was caused by a main processor core not allocated to the spare set of processor cores, instructs a software application executed on the computing device using the spare set of processor cores to restart in response to a determination that the processor core error was caused by a main processor core not allocated to the spare set of processor cores, and assigns a new processor core of the spare set of processor cores to the software application in response to the software application being restarted. a plurality of processor cores; a memory; firmware logic to (i) allocate at least one of the plurality of processor cores to a spare set of processor cores, (ii) establish a spare processor core hardware description table in the memory that includes each of the processor cores allocated to the spare set of processor cores, and (iii) establish a main processor core hardware description table in the memory that includes each of at least one main processor core of a main set of processor cores not allocated to the spare set of processor cores; processor control logic to control a processor register to indicate whether each processor core of the plurality processor cores is a processor core allocated to the spare set of processor cores or a main processor core not allocated to the spare set of processor cores, the main processor core hardware description table does not include the processor cores allocated to the spare set of processor cores; and the firmware logic: determines whether processor core error was caused by a main processor core not allocated to the spare set of processor cores, instructs a software application executed on the computing device using the spare set of processor cores to restart in response to a determination that the processor core error was caused by a main processor core not allocated to the spare set of processor cores, and assigns a new processor core of the spare set of processor cores to the software application in response to the software application being restarted. determines whether processor core error was caused by a main processor core not allocated to the spare set of processor cores, instructs a software application executed on the computing device using the spare set of processor cores to restart in response to a determination that the processor core error was caused by a main processor core not allocated to the spare set of processor cores, and assigns a new processor core of the spare set of processor cores to the software application in response to the software application being restarted.