A signal transmission system (100, 1100), comprising: a receiving end (104, 1104), comprising: a first clock signal generator (122, 1122), configured for generating a first clock signal according to clock information derived from a transmitted signal, wherein the transmitted signal is changed in response to a frequency change of a second clock signal, and the first clock signal generator (122, 1122), initially in a frequency-locked state, would enter a frequency-unlocked state if the second clock signal has a frequency transition from a first frequency to a second frequency within a first time period (T1 - T2); and a first data processing circuit, configured for receiving or processing an output data stream according to the first clock signal; and a transmitting end, comprising: a second clock signal generator, configured for making the first clock signal generator (122, 1122) stay in a frequency-locked state when the second clock signal has the frequency transition from the first frequency to the second frequency by generating the second clock signal having the frequency transition from the first frequency to the second frequency during a second time period (T1 - T3) which is longer than the first time period; and a second data processing circuit, configured to process an input video stream according to the second clock signal, and generate the output data stream; wherein the second clock signal is required to have the frequency transition from the first frequency to the second frequency when an input source, a frame rate or a video resolution of the video stream is changed; and transmission of the output data stream between the transmitting end and the receiving end (104, 1104) is not terminated during the second time period in which the second clock signal has the frequency transition from the first frequency to the second frequency. a receiving end (104, 1104), comprising: a first clock signal generator (122, 1122), configured for generating a first clock signal according to clock information derived from a transmitted signal, wherein the transmitted signal is changed in response to a frequency change of a second clock signal, and the first clock signal generator (122, 1122), initially in a frequency-locked state, would enter a frequency-unlocked state if the second clock signal has a frequency transition from a first frequency to a second frequency within a first time period (T1 - T2); and a first data processing circuit, configured for receiving or processing an output data stream according to the first clock signal; and a first clock signal generator (122, 1122), configured for generating a first clock signal according to clock information derived from a transmitted signal, wherein the transmitted signal is changed in response to a frequency change of a second clock signal, and the first clock signal generator (122, 1122), initially in a frequency-locked state, would enter a frequency-unlocked state if the second clock signal has a frequency transition from a first frequency to a second frequency within a first time period (T1 - T2); and a first data processing circuit, configured for receiving or processing an output data stream according to the first clock signal; and a transmitting end, comprising: a second clock signal generator, configured for making the first clock signal generator (122, 1122) stay in a frequency-locked state when the second clock signal has the frequency transition from the first frequency to the second frequency by generating the second clock signal having the frequency transition from the first frequency to the second frequency during a second time period (T1 - T3) which is longer than the first time period; and a second data processing circuit, configured to process an input video stream according to the second clock signal, and generate the output data stream; a second clock signal generator, configured for making the first clock signal generator (122, 1122) stay in a frequency-locked state when the second clock signal has the frequency transition from the first frequency to the second frequency by generating the second clock signal having the frequency transition from the first frequency to the second frequency during a second time period (T1 - T3) which is longer than the first time period; and a second data processing circuit, configured to process an input video stream according to the second clock signal, and generate the output data stream; wherein the second clock signal is required to have the frequency transition from the first frequency to the second frequency when an input source, a frame rate or a video resolution of the video stream is changed; and transmission of the output data stream between the transmitting end and the receiving end (104, 1104) is not terminated during the second time period in which the second clock signal has the frequency transition from the first frequency to the second frequency.