A semiconductor package structure, comprising: an encapsulating layer; a package substrate having a device region covered by the encapsulating layer and an edge region surrounding the device region and exposed from the encapsulating layer, wherein the package substrate has a first surface and a second surface opposite to the first surface, wherein the package substrate comprises: an insulating layer; and a plurality of patterned conductive layers (102; 104; 106; 108) in respective layer-levels of the insulating layer, wherein one conductive layer of the plurality of patterned conductive layers (102; 104; 106; 108) comprises a plurality of exposed conductors in and along the edge region and an embedded portion in the device region; a semiconductor die (110, 114) disposed on the device region of the package substrate onto the first surface of the package substrate and surrounded by the encapsulating layer; and a conductive shielding layer covering and surrounding the encapsulating layer and electrically connected to the plurality of exposed conductors, wherein the plurality of exposed conductors has a top surface in direct contact with the conductive shielding layer, wherein said embedded portion of said one conductive layer of the plurality of patterned conductive layers (102; 104; 106; 108) is embedded in the insulating layer below the first surface of the package substrate, so that the conductive shielding layer extends to and covers sidewalls of the package substrate above the top surface of the plurality of exposed conductors; characterised in that said one conductive layer of the plurality of patterned conductive layers (102; 104; 106; 108) is in a lowermost layer-level of the insulating layer and is adjacent to the second surface of the package substrate. an encapsulating layer; a package substrate having a device region covered by the encapsulating layer and an edge region surrounding the device region and exposed from the encapsulating layer, wherein the package substrate has a first surface and a second surface opposite to the first surface, wherein the package substrate comprises: an insulating layer; and a plurality of patterned conductive layers (102; 104; 106; 108) in respective layer-levels of the insulating layer, wherein one conductive layer of the plurality of patterned conductive layers (102; 104; 106; 108) comprises a plurality of exposed conductors in and along the edge region and an embedded portion in the device region; an insulating layer; and a plurality of patterned conductive layers (102; 104; 106; 108) in respective layer-levels of the insulating layer, wherein one conductive layer of the plurality of patterned conductive layers (102; 104; 106; 108) comprises a plurality of exposed conductors in and along the edge region and an embedded portion in the device region; a semiconductor die (110, 114) disposed on the device region of the package substrate onto the first surface of the package substrate and surrounded by the encapsulating layer; and a conductive shielding layer covering and surrounding the encapsulating layer and electrically connected to the plurality of exposed conductors, wherein the plurality of exposed conductors has a top surface in direct contact with the conductive shielding layer, wherein said embedded portion of said one conductive layer of the plurality of patterned conductive layers (102; 104; 106; 108) is embedded in the insulating layer below the first surface of the package substrate, so that the conductive shielding layer extends to and covers sidewalls of the package substrate above the top surface of the plurality of exposed conductors; characterised in that said one conductive layer of the plurality of patterned conductive layers (102; 104; 106; 108) is in a lowermost layer-level of the insulating layer and is adjacent to the second surface of the package substrate.