A wiring substrate (10,60) comprising: a pad (12,61) including a plurality of metal layers (26,27,28); and a via connected to the pad, wherein the plurality of metal layers (26,27,28) include: a metal layer exposed by the wiring substrate; a first metal layer which is interposed between said exposed metal layer and the via and which prevents diffusion of metal included in the via into said exposed metal layer; and, a second metal layer which is less subject to oxidation than the first metal layer and is formed from at least one of a Cu layer, an Ag layer, an Au layer, and a Pd layer, wherein the second metal layer is provided between the via and the first metal layer, and wherein the via is connected to a surface of the second metal layer distal to the first metal layer, wherein the wiring substrate further comprises an insulation layer which covers side surfaces of the pad, including side surfaces of the second metal layer, and which also covers the surface of the second metal layer connected to the via except for a region of said surface which is exposed by an opening section formed in the insulation layer and in which the via is provided, wherein the surface of the second metal layer which is covered by the insulation layer and connected to the via is roughened, wherein the pad is embedded at a side of a surface of the insulation layer that serves as a surface of the wiring substrate, wherein the metal layer is exposed on the surface of the insulation layer that serves as the surface of the wiring substrate, and wherein a wiring layer is formed on a back surface of the insulation layer and is connected to the roughened surface of the second metal layer through the via. a pad (12,61) including a plurality of metal layers (26,27,28); and a via connected to the pad, wherein the plurality of metal layers (26,27,28) include: a metal layer exposed by the wiring substrate; a first metal layer which is interposed between said exposed metal layer and the via and which prevents diffusion of metal included in the via into said exposed metal layer; and, a second metal layer which is less subject to oxidation than the first metal layer and is formed from at least one of a Cu layer, an Ag layer, an Au layer, and a Pd layer, wherein the second metal layer is provided between the via and the first metal layer, and wherein the via is connected to a surface of the second metal layer distal to the first metal layer, a metal layer exposed by the wiring substrate; a first metal layer which is interposed between said exposed metal layer and the via and which prevents diffusion of metal included in the via into said exposed metal layer; and, a second metal layer which is less subject to oxidation than the first metal layer and is formed from at least one of a Cu layer, an Ag layer, an Au layer, and a Pd layer, wherein the second metal layer is provided between the via and the first metal layer, and wherein the via is connected to a surface of the second metal layer distal to the first metal layer, wherein the wiring substrate further comprises an insulation layer which covers side surfaces of the pad, including side surfaces of the second metal layer, and which also covers the surface of the second metal layer connected to the via except for a region of said surface which is exposed by an opening section formed in the insulation layer and in which the via is provided, wherein the surface of the second metal layer which is covered by the insulation layer and connected to the via is roughened, wherein the pad is embedded at a side of a surface of the insulation layer that serves as a surface of the wiring substrate, wherein the metal layer is exposed on the surface of the insulation layer that serves as the surface of the wiring substrate, and wherein a wiring layer is formed on a back surface of the insulation layer and is connected to the roughened surface of the second metal layer through the via.