A method of manufacturing thin film transistors, TFTs, of a pixel section and a driver circuit of an electrooptic device at the same time, said method comprising the following steps that are consecutively carried out in this order: providing a substrate; forming a semiconductor film (102, 103) containing crystalline structure over said substrate; forming a first p-type impurity region by doping a p-type impurity element into said semiconductor film in a concentration range of 1 x 10 15 to 1 x 10 18 atoms/cm 3; forming first n-type impurity regions by doping an n-type impurity element into a region of said semiconductor film in a concentration range of 2 x 10 16 to 5 x 10 19 atoms/cm 3, where an n-channel TFT of the driver circuit is formed; forming islands by patterning said semiconductor film; forming a gate insulating film over said islands; forming a conductive film (119, 120) over said gate insulating film; patterning said conductive film so as to form a first wiring (11, 12) and gate electrodes having the same material and formed in the same layer as the first wiring (11, 12); forming second n-type impurity regions by doping an n-type impurity element into said islands in a concentration range of 1 x 10 16 to 5 x 10 18 atoms/cm 3 by using said first wiring (11, 12) and said gate electrodes as a mask; forming third n-type impurity regions by doping an n-type impurity element into said islands of said n-channel TFT in a concentration range of 1 x 10 20 to 1 x 10 21 atoms/cm 3; forming second p-type impurity regions (149, 150) by doping a p-type impurity element into said islands of a p-channel TFT in a concentration range of 3 x 10 20 to 3 x 10 21 atoms/cm 3; activating impurity elements doped into said first p-type impurity region, said second p-type impurity regions (149, 150), said first n-type impurity regions, said second n-type impurity regions and said third n-type impurity regions, and laminating a second wiring (13, 14) over the first wiring (11, 12), wherein the second wiring (13, 14) has a lower resistivity than the first wiring (11, 12). providing a substrate; forming a semiconductor film (102, 103) containing crystalline structure over said substrate; forming a first p-type impurity region by doping a p-type impurity element into said semiconductor film in a concentration range of 1 x 10 15 to 1 x 10 18 atoms/cm 3; forming first n-type impurity regions by doping an n-type impurity element into a region of said semiconductor film in a concentration range of 2 x 10 16 to 5 x 10 19 atoms/cm 3, where an n-channel TFT of the driver circuit is formed; forming islands by patterning said semiconductor film; forming a gate insulating film over said islands; forming a conductive film (119, 120) over said gate insulating film; patterning said conductive film so as to form a first wiring (11, 12) and gate electrodes having the same material and formed in the same layer as the first wiring (11, 12); forming second n-type impurity regions by doping an n-type impurity element into said islands in a concentration range of 1 x 10 16 to 5 x 10 18 atoms/cm 3 by using said first wiring (11, 12) and said gate electrodes as a mask; forming third n-type impurity regions by doping an n-type impurity element into said islands of said n-channel TFT in a concentration range of 1 x 10 20 to 1 x 10 21 atoms/cm 3; forming second p-type impurity regions (149, 150) by doping a p-type impurity element into said islands of a p-channel TFT in a concentration range of 3 x 10 20 to 3 x 10 21 atoms/cm 3; activating impurity elements doped into said first p-type impurity region, said second p-type impurity regions (149, 150), said first n-type impurity regions, said second n-type impurity regions and said third n-type impurity regions, and laminating a second wiring (13, 14) over the first wiring (11, 12), wherein the second wiring (13, 14) has a lower resistivity than the first wiring (11, 12).