An optical receiving apparatus comprising: an analog-to-digital (A/D) converting circuit that converts a received analog signal to a received digital signal; a received-signal demodulating circuit that demodulates the received digital signal into an m-bit received signal; a soft-decision-data generating circuit that generates n-bit, n≤5m, soft-decision data, which corresponds to a determination result according to 2 n -1 soft-decision thresholds, based on the m-bit received signal; and an error correcting circuit that performs error correction based on the n-bit soft-decision data and outputs an error-corrected received signal, wherein the soft-decision-data generating circuit is configured to use a most significant bit, MSB, of the m-bit received signal as hard-decision data, characterized in that the soft-decision-data generating circuit is configured to use, as reliability information, a result of comparison between a plurality of k bits, where k≤m, on a MSB side of the m-bit received signal and a fixed threshold when the m-bit received signal lies outside of the outermost of the 2 n -1 soft-decision thresholds, and p sequential bits, p≤m-k, p=n-1, selected from m-k bits on a least significant bit, LSB, side of the m-bit received signal when the m-bit received signal lies inside of the outermost of the 2 n -1 soft-decision thresholds, and to generate the n-bit soft-decision data including the most significant bit and the reliability information, wherein the soft-decision-data generating circuit selects the p sequential bits from a range corresponding to an interval between the 2 n -1 soft-decision thresholds, and the range of p-bit selection is variable, and wherein bit positions to be extracted as reliability information and also the fixed threshold and the number of bits used in comparison for determining reliability of outside of the outermost of 2 n -1 soft-decision thresholds depending on hard-decision data, are differently set. an analog-to-digital (A/D) converting circuit that converts a received analog signal to a received digital signal; a received-signal demodulating circuit that demodulates the received digital signal into an m-bit received signal; a soft-decision-data generating circuit that generates n-bit, n≤5m, soft-decision data, which corresponds to a determination result according to 2 n -1 soft-decision thresholds, based on the m-bit received signal; and an error correcting circuit that performs error correction based on the n-bit soft-decision data and outputs an error-corrected received signal, wherein the soft-decision-data generating circuit is configured to use a most significant bit, MSB, of the m-bit received signal as hard-decision data, characterized in that the soft-decision-data generating circuit is configured to use, as reliability information, a result of comparison between a plurality of k bits, where k≤m, on a MSB side of the m-bit received signal and a fixed threshold when the m-bit received signal lies outside of the outermost of the 2 n -1 soft-decision thresholds, and p sequential bits, p≤m-k, p=n-1, selected from m-k bits on a least significant bit, LSB, side of the m-bit received signal when the m-bit received signal lies inside of the outermost of the 2 n -1 soft-decision thresholds, and to generate the n-bit soft-decision data including the most significant bit and the reliability information, wherein the soft-decision-data generating circuit selects the p sequential bits from a range corresponding to an interval between the 2 n -1 soft-decision thresholds, and the range of p-bit selection is variable, and wherein bit positions to be extracted as reliability information and also the fixed threshold and the number of bits used in comparison for determining reliability of outside of the outermost of 2 n -1 soft-decision thresholds depending on hard-decision data, are differently set.