An active matrix organic light-emitting diode, AMOLED, pixel circuit comprising: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor, a first capacitor, a second capacitor, and an organic light-emitting diode, OLED,; wherein a gate of the fifth thin film transistor is configured to receive a third scanning signal from a third scanning signal line (Scan3), a source of the fifth thin film transistor is configured to receive a positive voltage (OVDD) of a power source, a drain of the fifth thin film transistor is coupled to one side of the second capacitor, a drain of the third thin film transistor, and a source of the first thin film transistor; another side of the second capacitor is coupled to one side of the first capacitor; another side of the first capacitor is grounded; a gate of the first thin film transistor is coupled to a first node between the second capacitor and the first capacitor; a source of the second thin film transistor is coupled to the first node between the second capacitor and the first capacitor; a gate of the second thin film transistor is configured to receive a first scanning signal from a first scanning signal line (Scan1); a gate of the sixth thin film transistor is configured to receive the third scanning signal from a third scanning signal line (Scan3); a source of the sixth thin film transistor is coupled to an anode of the OLED; a cathode of the OLED is configured to receive a negative voltage (OVSS) of the power source, characterized in that a gate of the third thin film transistor is configured to receive the first scanning signal from the first scanning signal line (Scan1), a source of the third thin film transistor and a source of the fourth thin film transistor are coupled to a second node connected to a line (Vini/Vdata) configured to receive data voltage (Vdata) or an initialization voltage (Vini); a gate of the fourth thin film transistor is configured to receive a second scanning signal from a second scanning line (Scan2); a drain of the fourth thin film transistor is coupled to a drain of the first thin film transistor, a drain of the second thin film transistor, and a drain of the sixth thin film transistor. another side of the second capacitor is coupled to one side of the first capacitor; another side of the first capacitor is grounded; a gate of the first thin film transistor is coupled to a first node between the second capacitor and the first capacitor; a source of the second thin film transistor is coupled to the first node between the second capacitor and the first capacitor; a gate of the second thin film transistor is configured to receive a first scanning signal from a first scanning signal line (Scan1); a gate of the sixth thin film transistor is configured to receive the third scanning signal from a third scanning signal line (Scan3); a source of the sixth thin film transistor is coupled to an anode of the OLED; a cathode of the OLED is configured to receive a negative voltage (OVSS) of the power source, characterized in that a gate of the third thin film transistor is configured to receive the first scanning signal from the first scanning signal line (Scan1), a source of the third thin film transistor and a source of the fourth thin film transistor are coupled to a second node connected to a line (Vini/Vdata) configured to receive data voltage (Vdata) or an initialization voltage (Vini); a gate of the fourth thin film transistor is configured to receive a second scanning signal from a second scanning line (Scan2); a drain of the fourth thin film transistor is coupled to a drain of the first thin film transistor, a drain of the second thin film transistor, and a drain of the sixth thin film transistor.