An integrated circuit, comprising: a global supply bus (109, VDD0) and a gated supply bus (206, VDD1); a circuit having a voltage supply input coupled to said gated supply bus; and a digital power gating system with global voltage shift, comprising: a plurality of gating devices (502, 504, 506, 508, 602, 604, 606, 608, 610, 612, 614), each said gating device having a pair of current terminals coupled between said global supply bus and said gated supply bus and each having a control terminal, characterized by; a power gating control system that controls a digital control value (PG_CNTRL), wherein said digital control value comprises a plurality of bits in which each bit of said digital control value is provided to control at least one control terminal of said plurality of gating devices to control activation of a corresponding subset of said plurality of gating devices, wherein said power gating control system comprises an incremental control word adjuster that adjusts said digital control value by adding or subtracting an adjustment value so that said gated supply bus is reduced to a state retention voltage level in which leakage current of said circuit is reduced and in which a digital state of said circuit is retained; and a global control adjuster that is configured, in response to receiving a global voltage change signal (V_DOWN) indicating a magnitude of an impending reduction of a voltage of said global supply bus during power gating, to adjust said digital control value to increase said gated supply bus before said global supply bus is reduced so that said gated supply bus adjusts back to said state retention level when said global supply bus is reduced. a global supply bus (109, VDD0) and a gated supply bus (206, VDD1); a circuit having a voltage supply input coupled to said gated supply bus; and a digital power gating system with global voltage shift, comprising: a plurality of gating devices (502, 504, 506, 508, 602, 604, 606, 608, 610, 612, 614), each said gating device having a pair of current terminals coupled between said global supply bus and said gated supply bus and each having a control terminal, characterized by; a power gating control system that controls a digital control value (PG_CNTRL), wherein said digital control value comprises a plurality of bits in which each bit of said digital control value is provided to control at least one control terminal of said plurality of gating devices to control activation of a corresponding subset of said plurality of gating devices, wherein said power gating control system comprises an incremental control word adjuster that adjusts said digital control value by adding or subtracting an adjustment value so that said gated supply bus is reduced to a state retention voltage level in which leakage current of said circuit is reduced and in which a digital state of said circuit is retained; and a global control adjuster that is configured, in response to receiving a global voltage change signal (V_DOWN) indicating a magnitude of an impending reduction of a voltage of said global supply bus during power gating, to adjust said digital control value to increase said gated supply bus before said global supply bus is reduced so that said gated supply bus adjusts back to said state retention level when said global supply bus is reduced. a plurality of gating devices (502, 504, 506, 508, 602, 604, 606, 608, 610, 612, 614), each said gating device having a pair of current terminals coupled between said global supply bus and said gated supply bus and each having a control terminal, characterized by; a power gating control system that controls a digital control value (PG_CNTRL), wherein said digital control value comprises a plurality of bits in which each bit of said digital control value is provided to control at least one control terminal of said plurality of gating devices to control activation of a corresponding subset of said plurality of gating devices, wherein said power gating control system comprises an incremental control word adjuster that adjusts said digital control value by adding or subtracting an adjustment value so that said gated supply bus is reduced to a state retention voltage level in which leakage current of said circuit is reduced and in which a digital state of said circuit is retained; and a global control adjuster that is configured, in response to receiving a global voltage change signal (V_DOWN) indicating a magnitude of an impending reduction of a voltage of said global supply bus during power gating, to adjust said digital control value to increase said gated supply bus before said global supply bus is reduced so that said gated supply bus adjusts back to said state retention level when said global supply bus is reduced.