A method of forming a semiconductor memory cell, comprising: forming a first insulation layer on a substrate; forming a conductive layer on the first insulation layer; forming a second insulation layer on the conductive layer; forming a first trench in the second insulation layer that extends down to and exposes the conductive layer; forming spacers in the first trench that are separated by a gap at a bottom of the first trench that exposes a portion of the conductive layer; forming a second trench through the conductive layer by performing an anisotropic etch through the gap; after forming of the second trench, completely removing the second insulation layer and the spacers; after completely removing the second insulation layer and the spacers, selectively removing portions of the conductive layer in a manner that leaves first and second blocks of the conductive layer (50, 52) which are separated from each other by the second trench; filling the second trench with an insulation material; after selectively removing portions of the conductive layer, forming first and second spaced-apart regions (54, 56) in the substrate, with a channel region in the substrate therebetween, wherein the first and second regions have a first conductivity type and the channel region has a second conductivity type different from the first conductivity type, and wherein the channel region includes a first portion under the first block and a second portion under the second block, wherein a lateral edge of the second block is aligned to a lateral edge of the first region, and a lateral edge of the first block is aligned to a lateral edge of the second region. forming a first insulation layer on a substrate; forming a conductive layer on the first insulation layer; forming a second insulation layer on the conductive layer; forming a first trench in the second insulation layer that extends down to and exposes the conductive layer; forming spacers in the first trench that are separated by a gap at a bottom of the first trench that exposes a portion of the conductive layer; forming a second trench through the conductive layer by performing an anisotropic etch through the gap; after forming of the second trench, completely removing the second insulation layer and the spacers; after completely removing the second insulation layer and the spacers, selectively removing portions of the conductive layer in a manner that leaves first and second blocks of the conductive layer (50, 52) which are separated from each other by the second trench; filling the second trench with an insulation material; after selectively removing portions of the conductive layer, forming first and second spaced-apart regions (54, 56) in the substrate, with a channel region in the substrate therebetween, wherein the first and second regions have a first conductivity type and the channel region has a second conductivity type different from the first conductivity type, and wherein the channel region includes a first portion under the first block and a second portion under the second block, wherein a lateral edge of the second block is aligned to a lateral edge of the first region, and a lateral edge of the first block is aligned to a lateral edge of the second region.