A processing device, comprising: a primary processor configured to operate in a high power mode; a secondary processor configured to operate in a low power mode; low power nonvolatile memory configured to communicate with the secondary processor and configured to operate in the low power mode; and high power nonvolatile memory configured to communicate with the primary processor and configured to operate in the high power mode, wherein the processing device is configured to manage data using a cache hierarchy comprising a high power, HP, nonvolatile memory level for data in the high power nonvolatile memory and a low power, LP, nonvolatile memory level for data in the low power nonvolatile memory, wherein the low power nonvolatile memory level has a higher level in the cache hierarchy than the high power nonvolatile memory level; and a drive control module configured to control data transfer between the high power nonvolatile memory and the low power nonvolatile memory, wherein the drive control module includes a least used block, LUB, module, wherein the LUB module is configured to track a LUB of data in the low power nonvolatile memory and identify the LUB of data in the low power nonvolatile memory, wherein the drive control module is configured to: control data transfer between the high power nonvolatile memory and the low power nonvolatile memory based on LUB information, during the low power mode, determine in response to a data storing request whether there is sufficient space available on the low power nonvolatile memory, and if there is not sufficient space available on the low power nonvolatile memory, power ON the high power nonvolatile memory, transfer the LUB of data to the high power nonvolatile memory during the low power mode until sufficient space is available and turn off the high power nonvolatile memory; and during the low power mode, determine in response to a data retrieving request whether the data is located in the low power nonvolatile memory, if the data is not located in the low power nonvolatile memory, power ON the high power nonvolatile memory and determine whether there is sufficient space available on the low power nonvolatile memory, and if there is not sufficient space available on the low power nonvolatile memory, transfer the LUB of data to the high power nonvolatile memory during the low power mode until sufficient space is available, transfer the data to the low power nonvolatile memory, retrieve the data from the low power nonvolatile memory and turn off the high power nonvolatile memory. a primary processor configured to operate in a high power mode; a secondary processor configured to operate in a low power mode; low power nonvolatile memory configured to communicate with the secondary processor and configured to operate in the low power mode; and high power nonvolatile memory configured to communicate with the primary processor and configured to operate in the high power mode, wherein the processing device is configured to manage data using a cache hierarchy comprising a high power, HP, nonvolatile memory level for data in the high power nonvolatile memory and a low power, LP, nonvolatile memory level for data in the low power nonvolatile memory, wherein the low power nonvolatile memory level has a higher level in the cache hierarchy than the high power nonvolatile memory level; and a drive control module configured to control data transfer between the high power nonvolatile memory and the low power nonvolatile memory, wherein the drive control module includes a least used block, LUB, module, wherein the LUB module is configured to track a LUB of data in the low power nonvolatile memory and identify the LUB of data in the low power nonvolatile memory, wherein the drive control module is configured to: control data transfer between the high power nonvolatile memory and the low power nonvolatile memory based on LUB information, during the low power mode, determine in response to a data storing request whether there is sufficient space available on the low power nonvolatile memory, and if there is not sufficient space available on the low power nonvolatile memory, power ON the high power nonvolatile memory, transfer the LUB of data to the high power nonvolatile memory during the low power mode until sufficient space is available and turn off the high power nonvolatile memory; and during the low power mode, determine in response to a data retrieving request whether the data is located in the low power nonvolatile memory, if the data is not located in the low power nonvolatile memory, power ON the high power nonvolatile memory and determine whether there is sufficient space available on the low power nonvolatile memory, and if there is not sufficient space available on the low power nonvolatile memory, transfer the LUB of data to the high power nonvolatile memory during the low power mode until sufficient space is available, transfer the data to the low power nonvolatile memory, retrieve the data from the low power nonvolatile memory and turn off the high power nonvolatile memory.