A method of selectively erasing non-volatile storage, comprising: boosting a first set of channel regions to a first voltage range for a first set of non-volatile storage elements (854, 855) to be erased without boosting a second set of channel regions to said first voltage range for a second set of non-volatile storage elements not to be erased, wherein, said first set of channel regions and said second set of channel regions are part of a common substrate region, wherein said boosting comprises: applying a boosting enabling voltage to bit lines for said first set of non-volatile storage elements (854, 855) to be erased, and applying a boosting disabling voltage to bit lines for said second set of non-volatile storage elements not to be erased; charging said common substrate region and applying voltage signals to a common set of word lines (WL0, WL1, WL2, WL3, WL4) so that said bit lines for said first set of non-volatile storage elements (854, 855) to be erased and said bit lines for said second set of non-volatile storage elements not to be erased couple to said common set of word lines (WL0, WL1, WL2, WL3, WL4), said common set of word lines (WL0, WL1, WL2, WL3, WL4) including a selected word line and unselected word lines (WL0, WL1, WL3, WL4); and subsequent to said applying voltage signals to said common set of word lines (WL0, WL1, WL2, WL3, WL4), applying boosting signals beyond said voltage signals to at least said unselected word lines (WL0, WL1, WL3, WL4) to boost said first set of channel regions; and wherein the method further comprises applying a common enabling voltage to said first set of non-volatile storage elements (854, 855) and said second set of non-volatile storage elements in order to lower threshold voltages of said first set of non-volatile storage elements (854, 855) without intentionally lowering threshold voltages of said second set of non-volatile storage elements, wherein said applying said common enabling voltage is part of performing an erase operation for said first set of non-volatile storage elements (854, 855). boosting a first set of channel regions to a first voltage range for a first set of non-volatile storage elements (854, 855) to be erased without boosting a second set of channel regions to said first voltage range for a second set of non-volatile storage elements not to be erased, wherein, said first set of channel regions and said second set of channel regions are part of a common substrate region, wherein said boosting comprises: applying a boosting enabling voltage to bit lines for said first set of non-volatile storage elements (854, 855) to be erased, and applying a boosting disabling voltage to bit lines for said second set of non-volatile storage elements not to be erased; charging said common substrate region and applying voltage signals to a common set of word lines (WL0, WL1, WL2, WL3, WL4) so that said bit lines for said first set of non-volatile storage elements (854, 855) to be erased and said bit lines for said second set of non-volatile storage elements not to be erased couple to said common set of word lines (WL0, WL1, WL2, WL3, WL4), said common set of word lines (WL0, WL1, WL2, WL3, WL4) including a selected word line and unselected word lines (WL0, WL1, WL3, WL4); and subsequent to said applying voltage signals to said common set of word lines (WL0, WL1, WL2, WL3, WL4), applying boosting signals beyond said voltage signals to at least said unselected word lines (WL0, WL1, WL3, WL4) to boost said first set of channel regions; and wherein the method further comprises applying a common enabling voltage to said first set of non-volatile storage elements (854, 855) and said second set of non-volatile storage elements in order to lower threshold voltages of said first set of non-volatile storage elements (854, 855) without intentionally lowering threshold voltages of said second set of non-volatile storage elements, wherein said applying said common enabling voltage is part of performing an erase operation for said first set of non-volatile storage elements (854, 855).