A device communicating using differential signaling and capacitive isolation between two integrated circuit chips (102, 140), the device being subject to signal degradation from capacitance between bond wires (120, 122, 124, 128) connecting the two integrated circuit chips, the device comprising: a first integrated circuit chip including: a first differential signal driver circuit configured and arranged to transmit a first differential signal, a first isolation circuit configured and arranged to receive the first differential signal and to produce a second version of the first differential signal that is isolated from the first differential signal driver circuit, and a first pair of bond pads (160, 161) configured and arranged to receive the second version of the first differential signal; a second integrated circuit chip including: a second pair of bond pads (164, 165) configured and arranged to receive the second version of the first differential signal, a second isolation circuit configured and arranged to receive the second version of the first differential signal and to produce a third version of the first differential signal that is isolated from the second pair of bond pads, and a first differential signal receiver circuit configured and arranged to receive the third version of the first differential signal; and first and second bond wires (120, 122) that each form an electrical connection between a respective one of the first pair of bondpads (160, 161) and a respective one of the second pair of bond pads (164, 165), the first and second bond wires specifically arranged such that a distance between the first and second bond wires varies by at least 10% as measured at two points along a length of the first bond wire; wherein the first bond wire has a height profile between the first pair of bond pads (160, 161) and the second pair of bond pads (164, 165) that is different than a height profile of the second bond wire between the first pair of bond pads (161, 162) and the second pair of bond pads (164, 165) and the first and second bond wires (120, 122) are positioned in respective parallel planes that are each perpendicular to a surface of the first integrated circuit chip. a first integrated circuit chip including: a first differential signal driver circuit configured and arranged to transmit a first differential signal, a first isolation circuit configured and arranged to receive the first differential signal and to produce a second version of the first differential signal that is isolated from the first differential signal driver circuit, and a first pair of bond pads (160, 161) configured and arranged to receive the second version of the first differential signal; a first differential signal driver circuit configured and arranged to transmit a first differential signal, a first isolation circuit configured and arranged to receive the first differential signal and to produce a second version of the first differential signal that is isolated from the first differential signal driver circuit, and a first pair of bond pads (160, 161) configured and arranged to receive the second version of the first differential signal; a second integrated circuit chip including: a second pair of bond pads (164, 165) configured and arranged to receive the second version of the first differential signal, a second isolation circuit configured and arranged to receive the second version of the first differential signal and to produce a third version of the first differential signal that is isolated from the second pair of bond pads, and a first differential signal receiver circuit configured and arranged to receive the third version of the first differential signal; and a second pair of bond pads (164, 165) configured and arranged to receive the second version of the first differential signal, a second isolation circuit configured and arranged to receive the second version of the first differential signal and to produce a third version of the first differential signal that is isolated from the second pair of bond pads, and a first differential signal receiver circuit configured and arranged to receive the third version of the first differential signal; and first and second bond wires (120, 122) that each form an electrical connection between a respective one of the first pair of bondpads (160, 161) and a respective one of the second pair of bond pads (164, 165), the first and second bond wires specifically arranged such that a distance between the first and second bond wires varies by at least 10% as measured at two points along a length of the first bond wire; wherein the first bond wire has a height profile between the first pair of bond pads (160, 161) and the second pair of bond pads (164, 165) that is different than a height profile of the second bond wire between the first pair of bond pads (161, 162) and the second pair of bond pads (164, 165) and the first and second bond wires (120, 122) are positioned in respective parallel planes that are each perpendicular to a surface of the first integrated circuit chip.