An apparatus, comprising: a plurality of processing units (210,220) each having a plurality of processor cores (211, 212; 223, 224) each having an L1 cache (213, 214; 223, 224); a shared memory accessible by the processing units; and, a coherent interconnect comprising a coherent interconnect fabric between the processing units and coupling the processing units to the shared memory; the apparatus being characterized in that in each core, the L1 cache is configured to receive memory requests from the core and to store cache lines of data to be accessed by the core, the cache lines being transferred to the L1 cache from the memory in a plurality of data blocks, each data block having a set of error correction code bits and a single meta-bit, the meta-bits of the data blocks being collectively indicative of a local/global state and a special uncorrectable error bit for the cache line, the special uncorrectable error bit indicating that an uncorrectable error was detected before the cache line was written back to the shared memory; the apparatus being configured to issue from a requesting core, a request for a cache line with local scope, receive a first one of the data blocks of the requested cache line, and, identify a snoop filter status bit in the first data block, the snoop filter status bit having a state equal to the state of the meta bit of the first data block; wherein the apparatus is further configured to, where the snoop filter status bit is a first state, forward the first data block to the requesting core, receive a second one of the data blocks, identify the special uncorrectable bit of the data block, set an error status for the second data block to the state of the identified special uncorrectable error bit, and forward the second data block to the requesting core with the corresponding error status; and, wherein the apparatus is further configured to, where the snoop filter status bit is a second state, receive and discard the second one of the data blocks, reissue the request with global scope, receive the first one of the data blocks of the requested cache line, forward the first data block to the requesting core, receive the second one of the data blocks, identify the special uncorrectable bit of the data block, set the error status for the second data block to the state of the identified special uncorrectable error bit, and forward the second data block to the requesting core with the corresponding error status. a plurality of processing units (210,220) each having a plurality of processor cores (211, 212; 223, 224) each having an L1 cache (213, 214; 223, 224); a shared memory accessible by the processing units; and, a coherent interconnect comprising a coherent interconnect fabric between the processing units and coupling the processing units to the shared memory; the apparatus being characterized in that in each core, the L1 cache is configured to receive memory requests from the core and to store cache lines of data to be accessed by the core, the cache lines being transferred to the L1 cache from the memory in a plurality of data blocks, each data block having a set of error correction code bits and a single meta-bit, the meta-bits of the data blocks being collectively indicative of a local/global state and a special uncorrectable error bit for the cache line, the special uncorrectable error bit indicating that an uncorrectable error was detected before the cache line was written back to the shared memory; the apparatus being configured to issue from a requesting core, a request for a cache line with local scope, receive a first one of the data blocks of the requested cache line, and, identify a snoop filter status bit in the first data block, the snoop filter status bit having a state equal to the state of the meta bit of the first data block; wherein the apparatus is further configured to, where the snoop filter status bit is a first state, forward the first data block to the requesting core, receive a second one of the data blocks, identify the special uncorrectable bit of the data block, set an error status for the second data block to the state of the identified special uncorrectable error bit, and forward the second data block to the requesting core with the corresponding error status; and, wherein the apparatus is further configured to, where the snoop filter status bit is a second state, receive and discard the second one of the data blocks, reissue the request with global scope, receive the first one of the data blocks of the requested cache line, forward the first data block to the requesting core, receive the second one of the data blocks, identify the special uncorrectable bit of the data block, set the error status for the second data block to the state of the identified special uncorrectable error bit, and forward the second data block to the requesting core with the corresponding error status.