A method for executing instructions using a plurality of virtual cores for a processor, comprising: receiving an incoming instruction sequence (20, 21, 22, 23) using a global front end scheduler; partitioning the incoming instruction sequence into a plurality of code blocks of instructions; generating a plurality of inheritance vectors describing interdependencies between instructions of the code blocks; allocating the code blocks to a plurality of virtual cores of the processor, wherein each virtual core comprises a respective subset of resources of a plurality of partitionable engines (11, 12, 13, 14, 904), the subset of resources of the plurality of partitionable engines including execution units; and executing the code blocks by using the partitionable engines in accordance with a virtual core mode and in accordance with the respective inheritance vectors, characterized in that the plurality of virtual cores implements an execution mode, which comprises: a first execution mode, wherein the physical resources of each partitionable engine are dynamically allocated in accordance with an adjustable threshold to support execution of a single logical thread of a single logical core; or a second execution mode, wherein the plurality of virtual cores implement an execution mode wherein a subset of the physical resources of each partitionable engine are dynamically allocated in accordance with an adjustable threshold to support execution of a single logical thread of a single logical core. receiving an incoming instruction sequence (20, 21, 22, 23) using a global front end scheduler; partitioning the incoming instruction sequence into a plurality of code blocks of instructions; generating a plurality of inheritance vectors describing interdependencies between instructions of the code blocks; allocating the code blocks to a plurality of virtual cores of the processor, wherein each virtual core comprises a respective subset of resources of a plurality of partitionable engines (11, 12, 13, 14, 904), the subset of resources of the plurality of partitionable engines including execution units; and executing the code blocks by using the partitionable engines in accordance with a virtual core mode and in accordance with the respective inheritance vectors, characterized in that the plurality of virtual cores implements an execution mode, which comprises: a first execution mode, wherein the physical resources of each partitionable engine are dynamically allocated in accordance with an adjustable threshold to support execution of a single logical thread of a single logical core; or a second execution mode, wherein the plurality of virtual cores implement an execution mode wherein a subset of the physical resources of each partitionable engine are dynamically allocated in accordance with an adjustable threshold to support execution of a single logical thread of a single logical core. a first execution mode, wherein the physical resources of each partitionable engine are dynamically allocated in accordance with an adjustable threshold to support execution of a single logical thread of a single logical core; or a second execution mode, wherein the plurality of virtual cores implement an execution mode wherein a subset of the physical resources of each partitionable engine are dynamically allocated in accordance with an adjustable threshold to support execution of a single logical thread of a single logical core.