A switch-mode power supply (SMPS), said SMPS comprising: at least one power switch (316; 318) coupled to a voltage source (Vin); a power inductor coupled to the at least one power switch (316; 318); a filter capacitor coupled to a load side of the power inductor that provides a regulated voltage output (Vout) of the SMPS; and a SMPS controller (208; 902) coupled to the voltage source (Vin), the at least one power switch (316; 318), the power inductor and the regulated voltage output (Vout) of the SMPS, wherein the SMPS controller (208; 902) comprises: at least one driver (464; 906) coupled to the at least one power switch (316; 318); a pulse width modulation generator (458; 904; 908) having an output coupled to and controlling the at least one driver (464; 906); a digital processor (462; 908) having a memory, the digital processor (462; 908) is coupled to and provides operating parameters to the PWM generator (458; 904; 908) during operation thereof; a voltage comparison circuit for comparing the regulated output voltage (Vout) to a reference voltage (Vref), wherein the voltage comparison circuit generates an error signal representative of a difference between the regulated output voltage (Vout) and the reference voltage (Vref), and wherein the error signal is coupled to an error input of the PWM generator; and a sensorless tunable complimentary filter coupled to the power inductor, wherein the sensorless tunable complimentary filter measures current through the power inductor and provides a voltage output to the digital processor (462; 908) that is representative of the current flowing through the power inductor; wherein the digital processor (462; 908) optimizes operation of the SMPS by dynamically tuning the gain and/or pole frequency of the complimentary filter on the fly, thus providing operating parameters to the SMPS controller (208; 904) for all conditions of the SMPS. at least one power switch (316; 318) coupled to a voltage source (Vin); a power inductor coupled to the at least one power switch (316; 318); a filter capacitor coupled to a load side of the power inductor that provides a regulated voltage output (Vout) of the SMPS; and a SMPS controller (208; 902) coupled to the voltage source (Vin), the at least one power switch (316; 318), the power inductor and the regulated voltage output (Vout) of the SMPS, wherein the SMPS controller (208; 902) comprises: at least one driver (464; 906) coupled to the at least one power switch (316; 318); a pulse width modulation generator (458; 904; 908) having an output coupled to and controlling the at least one driver (464; 906); a digital processor (462; 908) having a memory, the digital processor (462; 908) is coupled to and provides operating parameters to the PWM generator (458; 904; 908) during operation thereof; a voltage comparison circuit for comparing the regulated output voltage (Vout) to a reference voltage (Vref), wherein the voltage comparison circuit generates an error signal representative of a difference between the regulated output voltage (Vout) and the reference voltage (Vref), and wherein the error signal is coupled to an error input of the PWM generator; and a sensorless tunable complimentary filter coupled to the power inductor, wherein the sensorless tunable complimentary filter measures current through the power inductor and provides a voltage output to the digital processor (462; 908) that is representative of the current flowing through the power inductor; at least one driver (464; 906) coupled to the at least one power switch (316; 318); a pulse width modulation generator (458; 904; 908) having an output coupled to and controlling the at least one driver (464; 906); a digital processor (462; 908) having a memory, the digital processor (462; 908) is coupled to and provides operating parameters to the PWM generator (458; 904; 908) during operation thereof; a voltage comparison circuit for comparing the regulated output voltage (Vout) to a reference voltage (Vref), wherein the voltage comparison circuit generates an error signal representative of a difference between the regulated output voltage (Vout) and the reference voltage (Vref), and wherein the error signal is coupled to an error input of the PWM generator; and a sensorless tunable complimentary filter coupled to the power inductor, wherein the sensorless tunable complimentary filter measures current through the power inductor and provides a voltage output to the digital processor (462; 908) that is representative of the current flowing through the power inductor; wherein the digital processor (462; 908) optimizes operation of the SMPS by dynamically tuning the gain and/or pole frequency of the complimentary filter on the fly, thus providing operating parameters to the SMPS controller (208; 904) for all conditions of the SMPS.