A method for processing computer instructions, comprising: detecting an instruction in an instruction stream; determining whether the instruction specifies at least one source register; and upon determining that the instruction specifies at least one source register: determining at least one execution pipeline preference for the instruction based on at least one pipeline indicator, stored in a pipeline issuance table, the pipeline indicator associated with the at least one source register; and issuing the instruction to an execution pipeline based on the at least one execution pipeline preference; and upon determining that the instruction does not specify at least one source register: issuing the instruction to the execution pipeline based on default execution pipeline issuance logic; determining if the instruction specifies at least one target register; and upon determining that the instruction specifies at least one target register: updating at least one pipeline indicator associated with the at least one target register in the pipeline issuance table based on the execution pipeline to which the instruction is issued. detecting an instruction in an instruction stream; determining whether the instruction specifies at least one source register; and upon determining that the instruction specifies at least one source register: determining at least one execution pipeline preference for the instruction based on at least one pipeline indicator, stored in a pipeline issuance table, the pipeline indicator associated with the at least one source register; and issuing the instruction to an execution pipeline based on the at least one execution pipeline preference; and upon determining that the instruction does not specify at least one source register: issuing the instruction to the execution pipeline based on default execution pipeline issuance logic; determining if the instruction specifies at least one target register; and upon determining that the instruction specifies at least one target register: updating at least one pipeline indicator associated with the at least one target register in the pipeline issuance table based on the execution pipeline to which the instruction is issued. determining whether the instruction specifies at least one source register; and upon determining that the instruction specifies at least one source register: determining at least one execution pipeline preference for the instruction based on at least one pipeline indicator, stored in a pipeline issuance table, the pipeline indicator associated with the at least one source register; and issuing the instruction to an execution pipeline based on the at least one execution pipeline preference; and upon determining that the instruction does not specify at least one source register: issuing the instruction to the execution pipeline based on default execution pipeline issuance logic; upon determining that the instruction specifies at least one source register: determining at least one execution pipeline preference for the instruction based on at least one pipeline indicator, stored in a pipeline issuance table, the pipeline indicator associated with the at least one source register; and issuing the instruction to an execution pipeline based on the at least one execution pipeline preference; and determining at least one execution pipeline preference for the instruction based on at least one pipeline indicator, stored in a pipeline issuance table, the pipeline indicator associated with the at least one source register; and issuing the instruction to an execution pipeline based on the at least one execution pipeline preference; and upon determining that the instruction does not specify at least one source register: issuing the instruction to the execution pipeline based on default execution pipeline issuance logic; issuing the instruction to the execution pipeline based on default execution pipeline issuance logic; determining if the instruction specifies at least one target register; and upon determining that the instruction specifies at least one target register: updating at least one pipeline indicator associated with the at least one target register in the pipeline issuance table based on the execution pipeline to which the instruction is issued. updating at least one pipeline indicator associated with the at least one target register in the pipeline issuance table based on the execution pipeline to which the instruction is issued.