An amplifier, comprising: a digital-to-analog converter, DAC, configured to perform a digital-to-analog conversion operation on a digital input signal (Din) to generate an analog input signal (Vin); an analog signal processing circuit, coupled to the DAC, configured to generate a first processed signal according to the analog input signal (Vin) and a feedback signal which are received at an input terminal of the analog signal processing circuit; a digital signal processing circuit, configured to process the digital input signal (Din) to generate a second processed signal, wherein the first and second processed signals (V1, V2) are pulse-width modulation, PWM, signals; a signal detector, configured to detect strength of the digital input signal (Din) Z and to generate a control signal (Vc) based on the detected signal strength of the digital input signal and to generate a mode selection signal (Vs) indicating an open loop mode or a closed loop mode; a driving stage, coupled to the analog signal processing circuit, the digital signal processing circuit and the signal detector, configured to refer to the mode selection signal (Vs) to receive one of the first processed signal in the closed loop mode and the second processed signal in the open loop mode to generate an output signal (Vout), wherein the feedback signal is generated according to the output signal (Vout); and a startup circuit, coupled to the analog signal processing circuit, configured to initialize the analog signal processing circuit; wherein the amplifier is configured to: when the mode selection signal (Vs) switches from indicating the open-loop mode to indicating the closed-loop mode: the signal detector outputs the control signal (Vc) to the startup circuit, the startup circuit is enabled, by the control signal (Vc), to generate another feedback signal (VFB') based on the first processed signal received from the analog signal processing circuit, and outputs said another feedback signal (VFB') to the input terminal of the analog signal processing circuit to initialize the analog signal processing circuit, after the analog signal processing circuit is initialized, the signal detector outputs the mode selection signal (Vs) indicating the closed-loop mode to the driving stage, and then the driving stage selects the first processed signal and processes the first processed signal to generate the output signal (Vout). a digital-to-analog converter, DAC, configured to perform a digital-to-analog conversion operation on a digital input signal (Din) to generate an analog input signal (Vin); an analog signal processing circuit, coupled to the DAC, configured to generate a first processed signal according to the analog input signal (Vin) and a feedback signal which are received at an input terminal of the analog signal processing circuit; a digital signal processing circuit, configured to process the digital input signal (Din) to generate a second processed signal, wherein the first and second processed signals (V1, V2) are pulse-width modulation, PWM, signals; a signal detector, configured to detect strength of the digital input signal (Din) Z and to generate a control signal (Vc) based on the detected signal strength of the digital input signal and to generate a mode selection signal (Vs) indicating an open loop mode or a closed loop mode; a driving stage, coupled to the analog signal processing circuit, the digital signal processing circuit and the signal detector, configured to refer to the mode selection signal (Vs) to receive one of the first processed signal in the closed loop mode and the second processed signal in the open loop mode to generate an output signal (Vout), wherein the feedback signal is generated according to the output signal (Vout); and a startup circuit, coupled to the analog signal processing circuit, configured to initialize the analog signal processing circuit; wherein the amplifier is configured to: when the mode selection signal (Vs) switches from indicating the open-loop mode to indicating the closed-loop mode: the signal detector outputs the control signal (Vc) to the startup circuit, the startup circuit is enabled, by the control signal (Vc), to generate another feedback signal (VFB') based on the first processed signal received from the analog signal processing circuit, and outputs said another feedback signal (VFB') to the input terminal of the analog signal processing circuit to initialize the analog signal processing circuit, after the analog signal processing circuit is initialized, the signal detector outputs the mode selection signal (Vs) indicating the closed-loop mode to the driving stage, and then the driving stage selects the first processed signal and processes the first processed signal to generate the output signal (Vout). the signal detector outputs the control signal (Vc) to the startup circuit, the startup circuit is enabled, by the control signal (Vc), to generate another feedback signal (VFB') based on the first processed signal received from the analog signal processing circuit, and outputs said another feedback signal (VFB') to the input terminal of the analog signal processing circuit to initialize the analog signal processing circuit, after the analog signal processing circuit is initialized, the signal detector outputs the mode selection signal (Vs) indicating the closed-loop mode to the driving stage, and then the driving stage selects the first processed signal and processes the first processed signal to generate the output signal (Vout).