A three-dimensional memory device, comprising: a memory stack over a substrate, the memory stack comprising a plurality of interleaved conductor layers (123, 132, 134) and a plurality of insulating layers extending laterally in the memory stack; a plurality of channel structures extending vertically through the memory stack into the substrate, the plurality of channel structures and the plurality of conductor layers (123, 132, 134) intersecting with one another and forming a plurality of memory cells; a support structure over the stack structure, having a plurality of support openings and at least one connection portion, each between and in contact with adjacent support openings; a slit structure extending vertically and laterally in the memory stack below the support openings and the at least one connection portion and dividing the plurality of memory cells into at least one memory block, the slit structure comprising a plurality of protruding portions and a plurality of recessed portions arranged vertically along a sidewall of the slit structure, whereas the protruding portions are formed on insulating layers and the recessed portions are formed on conductor layers (134, 132, 123); and a source structure in the slit structure, the source structure comprising an insulating structure in contact with the slit structure and a source contact in the insulating structure and in contact with the substrate, wherein the top surface of the stack structure includes a plurality of pits, wherein the support structure fills the pits with the material of support structure, increasing the bonding between support structure and stack structure and improving the structural stability of the 3D memory device during processing. a memory stack over a substrate, the memory stack comprising a plurality of interleaved conductor layers (123, 132, 134) and a plurality of insulating layers extending laterally in the memory stack; a plurality of channel structures extending vertically through the memory stack into the substrate, the plurality of channel structures and the plurality of conductor layers (123, 132, 134) intersecting with one another and forming a plurality of memory cells; a support structure over the stack structure, having a plurality of support openings and at least one connection portion, each between and in contact with adjacent support openings; a slit structure extending vertically and laterally in the memory stack below the support openings and the at least one connection portion and dividing the plurality of memory cells into at least one memory block, the slit structure comprising a plurality of protruding portions and a plurality of recessed portions arranged vertically along a sidewall of the slit structure, whereas the protruding portions are formed on insulating layers and the recessed portions are formed on conductor layers (134, 132, 123); and a source structure in the slit structure, the source structure comprising an insulating structure in contact with the slit structure and a source contact in the insulating structure and in contact with the substrate, wherein the top surface of the stack structure includes a plurality of pits, wherein the support structure fills the pits with the material of support structure, increasing the bonding between support structure and stack structure and improving the structural stability of the 3D memory device during processing. a source structure in the slit structure, the source structure comprising an insulating structure in contact with the slit structure and a source contact in the insulating structure and in contact with the substrate, wherein the top surface of the stack structure includes a plurality of pits, wherein the support structure fills the pits with the material of support structure, increasing the bonding between support structure and stack structure and improving the structural stability of the 3D memory device during processing.