A capacitor, comprising: a semiconductor substrate comprising an upper surface and a lower surface opposite to the upper surface; at least one first trench disposed in the semiconductor substrate and formed downward from the upper surface; at least one second trench disposed in the semiconductor substrate and aligned with the first trench in a vertical direction perpendicular to the upper and lower surfaces of the semiconductor substrate, the second trench formed upward from the lower surface; a first conductive layer disposed above the semiconductor substrate and in the first trench; a first insulating layer disposed between the semiconductor substrate and the first conductive layer to isolate the first conductive layer from the semiconductor substrate; a second conductive layer disposed on the semiconductor substrate and in the first trench, the second conductive layer being electrically connected to the semiconductor substrate; a second insulating layer disposed between the second conductive layer and the first conductive layer to isolate the second conductive layer from the first conductive layer; a third conductive layer disposed below the semiconductor substrate and in the second trench; a third insulating layer disposed between the third conductive layer and the semiconductor substrate to isolate the third conductive layer from the semiconductor substrate, the third conductive layer being electrically connected to the first conductive layer; characterized in that: at least one third trench is disposed in the semiconductor substrate, the third trench is formed upward from the lower surface of the semiconductor substrate, a depth of the third trench is less than a thickness of the semiconductor substrate, and the third insulating layer and the third conductive layer are sequentially disposed in the at least one third trench, and the third conductive layer in the third trench is electrically connected to the third conductive layer in the second trench. a semiconductor substrate comprising an upper surface and a lower surface opposite to the upper surface; at least one first trench disposed in the semiconductor substrate and formed downward from the upper surface; at least one second trench disposed in the semiconductor substrate and aligned with the first trench in a vertical direction perpendicular to the upper and lower surfaces of the semiconductor substrate, the second trench formed upward from the lower surface; a first conductive layer disposed above the semiconductor substrate and in the first trench; a first insulating layer disposed between the semiconductor substrate and the first conductive layer to isolate the first conductive layer from the semiconductor substrate; a second conductive layer disposed on the semiconductor substrate and in the first trench, the second conductive layer being electrically connected to the semiconductor substrate; a second insulating layer disposed between the second conductive layer and the first conductive layer to isolate the second conductive layer from the first conductive layer; a third conductive layer disposed below the semiconductor substrate and in the second trench; a third insulating layer disposed between the third conductive layer and the semiconductor substrate to isolate the third conductive layer from the semiconductor substrate, the third conductive layer being electrically connected to the first conductive layer; characterized in that: at least one third trench is disposed in the semiconductor substrate, the third trench is formed upward from the lower surface of the semiconductor substrate, a depth of the third trench is less than a thickness of the semiconductor substrate, and the third insulating layer and the third conductive layer are sequentially disposed in the at least one third trench, and the third conductive layer in the third trench is electrically connected to the third conductive layer in the second trench.