A circuit comprising a first part and a second part, the first part comprising a first and a second transistor pair (2, 3) with common emitters, said transistor pairs (2, 3) each comprising a first transistor (2a, 3a) and a second transistor (2b, 3b), characterized in that the first part further comprising a first further transistor, and all emitters in the first part are connected to a first input, where the collectors of each first transistor (2a, 3a) and the first further transistor in the first part are connected to a first output, where the second part (1 b) comprises a third and a fourth transistor pair (4, 5) with common emitters, said third and fourth transistor pairs (4, 5) each comprising a first transistor (4a, 5a) and a second transistor (4b, 5b), the second part further comprising a second further transistor, where all emitters in the second part are connected to a second input, where the collectors of each second transistor (4b, 5b) and the second further transistor in the second part (1 b) are connected to a second output, where furthermore for each first transistor (2a, 3a) in the first part, the base is connected to the base of a corresponding second transistor (4b, 5b) in the second part (1 b), and for each second transistor (2b, 3b) in the first part (1 a), the base is connected to the base of a corresponding first transistor (4a, 5a) in the second part, and where the bases of the further transistors (6a, 6b) are connected, where the circuit comprises a first input for an input RF signal (i in), and outputs (10, 11) for outputting RF signals (i out1, i out2), and where the collectors of each second transistor (2b, 3b) in the first part (1 a) and the first transistors (4a, 5a) in the second part (1 b) are connected to at least one of the outputs (10, 11) where said transistors (2a, 2b; 3a, 3b; 4a, 4b; 5a, 5b; 6a, 6b) are arranged to be biased in such a way that; the circuit is arranged to be set to one of a set of discrete modes, wherein in a first mode the first transistor of the first transistor pair of the first part (1 a) and the first transistor of the second transistor pair of the first part and the second transistor of the third transistor pair of the second part and the second transistor of the fourth transistor pair of the second part (1 b) are turned on and the second transistor of the first transistor pair of the first part and the second transistor of the second transistor pair of the first part and the first transistor of the third transistor pair of the second part (1 b) and the first transistor of the fourth transistor pair of the second part (1 b) are turned off, and in a second mode first transistor of the first transistor pair of the first part and the first transistor of the second transistor pair of the first part and the second transistor of the third transistor pair of the second part (1 b) and the second transistor of the fourth transistor pair of the second part (1 b) are turned off and the second transistor of the first transistor pair of the first part and the second transistor of the second transistor pair of the first part and the first transistor of the third transistor pair of the second part (1 b) and the first transistor of the fourth transistor pair of the second part (1 b) are turned on, and in a third mode the first transistor of the first transistor pair of the first part and the second transistor of the second transistor pair of the first part and the second transistor of the third transistor pair of the second part (1 b) and the first transistor of the fourth transistor pair of the second part are turned on and the second transistor of the first transistor pair of the first part and the first transistor of the second transistor pair of the first part and the first transistor of the third transistor pair of the second part (1 b) and the second transistor of the fourth transistor pair of the second part are turned off, and in a fourth mode the first transistor of the first transistor pair of the first part and the second transistor of the second transistor pair of the first part (1 a) and the second transistor of the third transistor pair of the second part and the first transistor of the fourth transistor pair of the second part are turned off and the second transistor of the first transistor pair of the first part (1 a) and the first transistor of the second transistor pair of the first part and the first transistor of the third transistor pair of the second part and the second transistor of the fourth transistor pair of the second part (1 b) are turned on.