An apparatus comprising at least one multicore processor having two or more processor cores and at least one memory including computer program code, the computer program code configured to, when executed by the at least one multicore processor, cause the apparatus to: examine information relating to a sequence of instructions of a thread to determine a security condition of the thread; examine if there are free processor cores to execute the sequence of instructions of the thread; if so, determine by using the security condition whether one or more processor cores of the multicore processor which are free to execute the sequence of instructions of the thread has an appropriate security mode to fulfil the security condition, wherein the two or more processor cores comprise at least two dynamically changeable security modes; and if the determining indicates that one or more processor cores of the multicore processor which are free to execute the sequence of instructions of the thread has the appropriate security mode available, to select one of the one or more processor cores which have the appropriate security mode available as a potential processor core to execute the sequence of instructions of the thread; or if the determining indicates that none - of the one or more processor cores which are free to execute the sequence of instructions of the thread has the appropriate security mode available examining, whether a security mode of the processor core, which is free to execute the sequence of instructions of the thread, can be changed to fulfil the security condition; and if so, changing the security mode of the processor core to fulfil the security condition and selecting that processor core as the potential processor core; or if there are no free processor cores to execute the sequence of instructions of the thread, examining, whether a security mode of a processor core, which is not free to execute the sequence of instructions of the thread, can be changed to fulfil the security condition, and if so, changing the security mode of the processor core to fulfil the security condition, moving threads, which were executing on that processor core to other processor cores, and selecting that processor core as the potential processor core; wherein the potential processor core is used to execute the thread during a next time slice. examine information relating to a sequence of instructions of a thread to determine a security condition of the thread; examine if there are free processor cores to execute the sequence of instructions of the thread; if so, determine by using the security condition whether one or more processor cores of the multicore processor which are free to execute the sequence of instructions of the thread has an appropriate security mode to fulfil the security condition, wherein the two or more processor cores comprise at least two dynamically changeable security modes; and if the determining indicates that one or more processor cores of the multicore processor which are free to execute the sequence of instructions of the thread has the appropriate security mode available, to select one of the one or more processor cores which have the appropriate security mode available as a potential processor core to execute the sequence of instructions of the thread; or if the determining indicates that none - of the one or more processor cores which are free to execute the sequence of instructions of the thread has the appropriate security mode available examining, whether a security mode of the processor core, which is free to execute the sequence of instructions of the thread, can be changed to fulfil the security condition; and if so, changing the security mode of the processor core to fulfil the security condition and selecting that processor core as the potential processor core; or if there are no free processor cores to execute the sequence of instructions of the thread, examining, whether a security mode of a processor core, which is not free to execute the sequence of instructions of the thread, can be changed to fulfil the security condition, and if so, changing the security mode of the processor core to fulfil the security condition, moving threads, which were executing on that processor core to other processor cores, and selecting that processor core as the potential processor core; wherein the potential processor core is used to execute the thread during a next time slice.