A high voltage silicon carbide (SiC) device, comprising: a first SiC layer having a first conductivity type on a first surface of a voltage blocking SiC substrate having a second conductivity type; a first region of SiC on the first SiC layer and having the second conductivity type; a second region of SiC within the first SiC layer, having the first conductivity type and being laterally spaced from the first region of SiC; a second SiC layer having the first conductivity type on a second surface of the voltage blocking SiC substrate; a third region of SiC on the second SiC layer and having the second conductivity type; a fourth region of SiC within the second SiC layer, having the first conductivity type and laterally spaced from the third region of SiC; and first and second contacts on the first and third regions of SiC, respectively; wherein sidewalls of the first region of SiC are not covered by the first SiC layer and sidewalls of the third region of SiC are not covered by the second SiC layer; third and fourth contacts on the second and fourth regions of SiC, respectively; a first metal overlayer on the first and third contacts that electrically connects the first and third contacts; and a second metal overlayer on the second and fourth contacts that electrically connects the second and fourth contacts, wherein the high voltage silicon carbide (SiC) device comprises a SiC thyristor, wherein the first region of SiC comprises a first SiC anode region, wherein the second region of SiC comprises a first SiC gate region, wherein the third region of SiC comprises a second SiC anode region, wherein the fourth region of SiC comprises a second gate region, wherein the first and second contacts are on the first and second SiC anode regions, the device further comprising third and fourth contacts on the first and second SiC gate regions, respectively, wherein the device is a two-terminal structure. a first SiC layer having a first conductivity type on a first surface of a voltage blocking SiC substrate having a second conductivity type; a first region of SiC on the first SiC layer and having the second conductivity type; a second region of SiC within the first SiC layer, having the first conductivity type and being laterally spaced from the first region of SiC; a second SiC layer having the first conductivity type on a second surface of the voltage blocking SiC substrate; a third region of SiC on the second SiC layer and having the second conductivity type; a fourth region of SiC within the second SiC layer, having the first conductivity type and laterally spaced from the third region of SiC; and first and second contacts on the first and third regions of SiC, respectively; wherein sidewalls of the first region of SiC are not covered by the first SiC layer and sidewalls of the third region of SiC are not covered by the second SiC layer; third and fourth contacts on the second and fourth regions of SiC, respectively; a first metal overlayer on the first and third contacts that electrically connects the first and third contacts; and a second metal overlayer on the second and fourth contacts that electrically connects the second and fourth contacts, wherein the high voltage silicon carbide (SiC) device comprises a SiC thyristor, wherein the first region of SiC comprises a first SiC anode region, wherein the second region of SiC comprises a first SiC gate region, wherein the third region of SiC comprises a second SiC anode region, wherein the fourth region of SiC comprises a second gate region, wherein the first and second contacts are on the first and second SiC anode regions, the device further comprising third and fourth contacts on the first and second SiC gate regions, respectively, wherein the device is a two-terminal structure.