A virtualized system comprising: a nonvolatile memory device; a volatile memory device, and a processing circuitry configured to provide a virtualization environment, implement a plurality of virtual units (VUi) configured to operate independently of each other in the virtualization environment, and perform a flash translation layer operation inside the plurality of virtual units (VUi), the flash translation layer operation including converting a logical block address associated with a storage access operation of the nonvolatile memory device to a physical block address of the nonvolatile memory device, and implement a virtual unit manager (VUMNG) configured to control the plurality of virtual units (VUi) in the virtualization environment, and characterized in that the virtual unit manager (VUMNG) is configured to allocate a plurality of unit storage regions (SRi) respectively corresponding to the plurality of virtual units (VUi) in a physical address space of the nonvolatile memory device, each virtual unit (VUi) among the plurality of virtual units (VUi) is configured to map the logical block address to the physical block address of each unit storage region (SRi) corresponding to the virtual unit (VUi), the virtual unit manager (VUMNG) is further configured to allocate a plurality of unit memory regions (MRi) respectively corresponding to the plurality of virtual units (VUi) in a physical address space of the volatile memory device, the virtual unit manager (VUMNG) is further configured to load a plurality of partial mapping tables (MTABi) respectively corresponding to the plurality of virtual units (VUi) from the nonvolatile memory device respectively to the plurality of unit memory regions (MRi) of the volatile memory device while the virtualized system is booted, each partial mapping table (MTABi) includes mapping relations between the logical block address of each virtual unit (VUi) and the physical block address of each unit storage region (SRi), and the plurality of virtual units (VUi) are configured to perform the flash translation operation independently of each other by referring to the corresponding one of the plurality of partial mapping tables (MTBi). a nonvolatile memory device; a volatile memory device, and a processing circuitry configured to provide a virtualization environment, implement a plurality of virtual units (VUi) configured to operate independently of each other in the virtualization environment, and perform a flash translation layer operation inside the plurality of virtual units (VUi), the flash translation layer operation including converting a logical block address associated with a storage access operation of the nonvolatile memory device to a physical block address of the nonvolatile memory device, and implement a virtual unit manager (VUMNG) configured to control the plurality of virtual units (VUi) in the virtualization environment, and characterized in that provide a virtualization environment, implement a plurality of virtual units (VUi) configured to operate independently of each other in the virtualization environment, and perform a flash translation layer operation inside the plurality of virtual units (VUi), the flash translation layer operation including converting a logical block address associated with a storage access operation of the nonvolatile memory device to a physical block address of the nonvolatile memory device, and implement a virtual unit manager (VUMNG) configured to control the plurality of virtual units (VUi) in the virtualization environment, and characterized in that the virtual unit manager (VUMNG) is configured to allocate a plurality of unit storage regions (SRi) respectively corresponding to the plurality of virtual units (VUi) in a physical address space of the nonvolatile memory device, each virtual unit (VUi) among the plurality of virtual units (VUi) is configured to map the logical block address to the physical block address of each unit storage region (SRi) corresponding to the virtual unit (VUi), the virtual unit manager (VUMNG) is further configured to allocate a plurality of unit memory regions (MRi) respectively corresponding to the plurality of virtual units (VUi) in a physical address space of the volatile memory device, the virtual unit manager (VUMNG) is further configured to load a plurality of partial mapping tables (MTABi) respectively corresponding to the plurality of virtual units (VUi) from the nonvolatile memory device respectively to the plurality of unit memory regions (MRi) of the volatile memory device while the virtualized system is booted, each partial mapping table (MTABi) includes mapping relations between the logical block address of each virtual unit (VUi) and the physical block address of each unit storage region (SRi), and the plurality of virtual units (VUi) are configured to perform the flash translation operation independently of each other by referring to the corresponding one of the plurality of partial mapping tables (MTBi).