A method for determining a fail bit repair solution, applied to a dynamic random access memory chip comprising a plurality of local regions (111, 111'), the dynamic random access memory chip further comprising Global Redundancy, GR, circuits and Local Redundancy, LR, circuits (122, 122'), the GR circuits being configured to repair a fail bit in any of the local regions (111, 111'), the LR circuits (122, 122') being configured to repair the fail bit in a designated local region (111, 111') of the local regions (111, 111'), the method comprising: determining a local region (111, 111') to be repaired comprising the fail bit, and determining a preliminary repair LR circuit (122, 122') for repairing the local region (111, 111') to be repaired, acquiring a number of available GR circuits other than any replacement GR circuit configured for replacing the preliminary repair LR circuit (122, 122') and a number of available LR circuits (122, 122') designated for repairing the local region (111, 111') to be repaired, wherein the number of available GR circuits other than the any replacement GR circuit is a difference between a number of available GR circuits and a number of fail bits repairable by the preliminary repair LR circuit (122, 122'); characterised in that the method further comprises: controlling repair of the fail bit by the any replacement GR circuit in place of the preliminary repair LR circuit (122, 122') in response to g ≥ g H or g L < g ≤ g H, l ≤ l L or g M < g ≤ g H, l L ≤ l < l M, or controlling repair of the fail bit by the preliminary repair LR circuit (122, 122') in response to g ≤ g L or g L < g ≤ g H, l ≥ l H or g L < g ≤ g M, l M ≤ l < l H, wherein the g represents the number of available GR circuits other than the any replacement GR circuit, the l represents the number of available LR circuits (122, 122'), the g L represents a low number of available GRs, the g M represents an ideal number of available GRs, the g H represents a high number of available GRs, the l L represents a low number of available LRs, the l M represents an ideal number of available LRs, and the l H represents a high number of available LRs. determining a local region (111, 111') to be repaired comprising the fail bit, and determining a preliminary repair LR circuit (122, 122') for repairing the local region (111, 111') to be repaired, acquiring a number of available GR circuits other than any replacement GR circuit configured for replacing the preliminary repair LR circuit (122, 122') and a number of available LR circuits (122, 122') designated for repairing the local region (111, 111') to be repaired, wherein the number of available GR circuits other than the any replacement GR circuit is a difference between a number of available GR circuits and a number of fail bits repairable by the preliminary repair LR circuit (122, 122'); characterised in that the method further comprises: controlling repair of the fail bit by the any replacement GR circuit in place of the preliminary repair LR circuit (122, 122') in response to g ≥ g H or g L < g ≤ g H, l ≤ l L or g M < g ≤ g H, l L ≤ l < l M, or controlling repair of the fail bit by the preliminary repair LR circuit (122, 122') in response to g ≤ g L or g L < g ≤ g H, l ≥ l H or g L < g ≤ g M, l M ≤ l < l H, wherein the g represents the number of available GR circuits other than the any replacement GR circuit, the l represents the number of available LR circuits (122, 122'), the g L represents a low number of available GRs, the g M represents an ideal number of available GRs, the g H represents a high number of available GRs, the l L represents a low number of available LRs, the l M represents an ideal number of available LRs, and the l H represents a high number of available LRs. controlling repair of the fail bit by the any replacement GR circuit in place of the preliminary repair LR circuit (122, 122') in response to g ≥ g H or g L < g ≤ g H, l ≤ l L or g M < g ≤ g H, l L ≤ l < l M, or controlling repair of the fail bit by the preliminary repair LR circuit (122, 122') in response to g ≤ g L or g L < g ≤ g H, l ≥ l H or g L < g ≤ g M, l M ≤ l < l H, wherein the g represents the number of available GR circuits other than the any replacement GR circuit, the l represents the number of available LR circuits (122, 122'), the g L represents a low number of available GRs, the g M represents an ideal number of available GRs, the g H represents a high number of available GRs, the l L represents a low number of available LRs, the l M represents an ideal number of available LRs, and the l H represents a high number of available LRs.