An information processor which operates in multi-thread mode, said processor comprising: an address translation buffer for storing address translation pairs indicating the correspondence between virtual addresses and physical addresses, an entry unit for registering a virtual address used in each thread and a physical address corresponding to said virtual address into said address translation buffer as said address translation pair, a retriever for retrieving, from said address translation buffer, a virtual address identical to the virtual address of said address translation pair to be registered, when registering said address translation pair by said entry unit, and an entry controller for controlling registration of said address translation pairs into said address translation buffer by said entry unit, characterised in that said address translation buffer stores thread information indicating the thread which registered said address translation pair, said entry controller prevents said entry unit from registering said address translation pair into said address translation buffer if a virtual address identical to the virtual address of the address translation pair to be registered by said entry unit is retrieved from said address translation buffer by said retriever and if the thread information indicating the thread which registered said address translation pair retrieved by said retriever is not identical to the thread using the virtual address of the address translation pair to be registered by said entry unit; and said entry controller directs said entry unit to register said address translation pair into said address translation buffer if a virtual address identical to the virtual address of the address translation pair to be registered by said entry unit is retrieved from said address translation buffer by said retriever and if the thread information corresponding to said address translation pair retrieved by said retriever is identical to the thread using the virtual address of the address translation pair to be registered by said entry unit. an address translation buffer for storing address translation pairs indicating the correspondence between virtual addresses and physical addresses, an entry unit for registering a virtual address used in each thread and a physical address corresponding to said virtual address into said address translation buffer as said address translation pair, a retriever for retrieving, from said address translation buffer, a virtual address identical to the virtual address of said address translation pair to be registered, when registering said address translation pair by said entry unit, and an entry controller for controlling registration of said address translation pairs into said address translation buffer by said entry unit, characterised in that said address translation buffer stores thread information indicating the thread which registered said address translation pair, said entry controller prevents said entry unit from registering said address translation pair into said address translation buffer if a virtual address identical to the virtual address of the address translation pair to be registered by said entry unit is retrieved from said address translation buffer by said retriever and if the thread information indicating the thread which registered said address translation pair retrieved by said retriever is not identical to the thread using the virtual address of the address translation pair to be registered by said entry unit; and said entry controller directs said entry unit to register said address translation pair into said address translation buffer if a virtual address identical to the virtual address of the address translation pair to be registered by said entry unit is retrieved from said address translation buffer by said retriever and if the thread information corresponding to said address translation pair retrieved by said retriever is identical to the thread using the virtual address of the address translation pair to be registered by said entry unit.