An image sensor, comprising: a pixel array integrated on a thin-film transistor 'TFT' panel and comprising a plurality of active pixels arranged in a matrix of rows and columns, and comprising a plurality of column lines, wherein outputs of pixels in a same column are coupled to a column line among the plurality of column lines for the purpose of outputting pixel signals, wherein the image sensor is configured such that during operation a voltage on each column line is limited between a first voltage and a second voltage; a readout circuitry comprising a plurality of readout units, each readout unit being configured for reading out a respective column line through an input node of the readout unit; wherein the image sensor further comprises capacitive units, such as capacitors, for capacitively coupling each input node to its corresponding column line; wherein the readout circuitry is integrated on one or more semiconductor dies of a first type, wherein the one or more semiconductor dies of the first type have been manufactured using a first semiconductor process and each comprise low voltage components with which the readout circuity is realized, the readout circuitry having a first maximum voltage rating, wherein the capacitive units are integrated on one or more semiconductor dies of a second type, wherein the one or more semiconductor dies of the second type have been manufactured using a second semiconductor process different from the first semiconductor process and each comprise high voltage components with which the capacitive units are realized, the capacitive units having a second maximum voltage rating higher than the first maximum voltage rating; and wherein a difference between the first voltage and the second voltage is higher than the first maximum voltage rating but smaller than the second maximum voltage rating, wherein the first maximum voltage rating of the readout circuitry is defined as the maximum potential difference that may exist over the readout circuitry while causing little to no degradation of the lifetime of the the readout circuitry, and wherein the second maximum voltage rating of the capacitive units is defined as the maximum potential difference that may exist over the capacitive units while causing little to no degradation of the lifetime of the capacitive units. a pixel array integrated on a thin-film transistor 'TFT' panel and comprising a plurality of active pixels arranged in a matrix of rows and columns, and comprising a plurality of column lines, wherein outputs of pixels in a same column are coupled to a column line among the plurality of column lines for the purpose of outputting pixel signals, wherein the image sensor is configured such that during operation a voltage on each column line is limited between a first voltage and a second voltage; a readout circuitry comprising a plurality of readout units, each readout unit being configured for reading out a respective column line through an input node of the readout unit; wherein the image sensor further comprises capacitive units, such as capacitors, for capacitively coupling each input node to its corresponding column line; wherein the readout circuitry is integrated on one or more semiconductor dies of a first type, wherein the one or more semiconductor dies of the first type have been manufactured using a first semiconductor process and each comprise low voltage components with which the readout circuity is realized, the readout circuitry having a first maximum voltage rating, wherein the capacitive units are integrated on one or more semiconductor dies of a second type, wherein the one or more semiconductor dies of the second type have been manufactured using a second semiconductor process different from the first semiconductor process and each comprise high voltage components with which the capacitive units are realized, the capacitive units having a second maximum voltage rating higher than the first maximum voltage rating; and wherein a difference between the first voltage and the second voltage is higher than the first maximum voltage rating but smaller than the second maximum voltage rating, wherein the first maximum voltage rating of the readout circuitry is defined as the maximum potential difference that may exist over the readout circuitry while causing little to no degradation of the lifetime of the the readout circuitry, and wherein the second maximum voltage rating of the capacitive units is defined as the maximum potential difference that may exist over the capacitive units while causing little to no degradation of the lifetime of the capacitive units.