A semiconductor device (1;1A;1C;1D) comprising: an underlying substrate having a first main surface and a second main surface which are opposed to each other; a semiconductor layer formed on the first main surface; electrode patterns (11 to 15, 21 to 24; 71 to 75, 91 to 94) in which a drain electrode (11 to 15; 71 to 75) and a source electrode (21 to 24; 91 to 94) are alternately arranged along at least one array direction, on the semiconductor layer; and a group of gate fingers (31 to 38; 81 to 88), each gate finger having a shape extending in an extending direction different from the at least one array direction on the semiconductor layer, and each gate finger being disposed in a region between the drain electrode and the source electrode, wherein: the group of gate fingers (31 to 38; 81 to 88) includes a plurality of gate fingers (31 to 38; 81 to 88) which include first gate fingers (31, 33, 36, 38, 81, 83,86, 88) arranged at a first position in the extending direction, and which include at least one second gate finger (32, 34, 35, 37; 82, 84, 85, 87) arranged at a second position in the extending direction, the second position being different from the first position in the extending direction; characterized in that: the first gate fingers (31,33,36,38;81,83,86,88) are arranged in a row along the at least one array direction at the first position; the at least one second gate finger (32,34,35,37;82,84,85,87) is disposed adjacent to at least one of the first gate fingers (31,33,36,38;81,83,86,88) via the source electrode or the drain electrode, at the second position; and the at least one second gate finger (32,34,35,37;82,84,85,87) is disposed in a region so that a length of an overlapping region between the at least one second gate finger (32,34,35,37;82,84,85,87) and the plurality of first gate fingers (31,33,36,38;81,83,86,88) is zero as viewed from the at least one array direction. an underlying substrate having a first main surface and a second main surface which are opposed to each other; a semiconductor layer formed on the first main surface; electrode patterns (11 to 15, 21 to 24; 71 to 75, 91 to 94) in which a drain electrode (11 to 15; 71 to 75) and a source electrode (21 to 24; 91 to 94) are alternately arranged along at least one array direction, on the semiconductor layer; and a group of gate fingers (31 to 38; 81 to 88), each gate finger having a shape extending in an extending direction different from the at least one array direction on the semiconductor layer, and each gate finger being disposed in a region between the drain electrode and the source electrode, wherein: the group of gate fingers (31 to 38; 81 to 88) includes a plurality of gate fingers (31 to 38; 81 to 88) which include first gate fingers (31, 33, 36, 38, 81, 83,86, 88) arranged at a first position in the extending direction, and which include at least one second gate finger (32, 34, 35, 37; 82, 84, 85, 87) arranged at a second position in the extending direction, the second position being different from the first position in the extending direction; characterized in that: the first gate fingers (31,33,36,38;81,83,86,88) are arranged in a row along the at least one array direction at the first position; the at least one second gate finger (32,34,35,37;82,84,85,87) is disposed adjacent to at least one of the first gate fingers (31,33,36,38;81,83,86,88) via the source electrode or the drain electrode, at the second position; and the at least one second gate finger (32,34,35,37;82,84,85,87) is disposed in a region so that a length of an overlapping region between the at least one second gate finger (32,34,35,37;82,84,85,87) and the plurality of first gate fingers (31,33,36,38;81,83,86,88) is zero as viewed from the at least one array direction. the first gate fingers (31,33,36,38;81,83,86,88) are arranged in a row along the at least one array direction at the first position; the at least one second gate finger (32,34,35,37;82,84,85,87) is disposed adjacent to at least one of the first gate fingers (31,33,36,38;81,83,86,88) via the source electrode or the drain electrode, at the second position; and the at least one second gate finger (32,34,35,37;82,84,85,87) is disposed in a region so that a length of an overlapping region between the at least one second gate finger (32,34,35,37;82,84,85,87) and the plurality of first gate fingers (31,33,36,38;81,83,86,88) is zero as viewed from the at least one array direction.