A power-module substrate with heat-sink comprising: a power-module substrate wherein a circuit layer made of copper or a copper alloy is disposed on one surface of a ceramic board and a metal layer made of copper or a copper alloy disposed on another surface of the ceramic board; an aluminum layer made of aluminum or an aluminum alloy and bonded on the metal layer; a copper layer made of copper or a copper alloy and bonded on the aluminum layer; and a heat sink bonded on the copper layer and formed from an aluminum-impregnated silicon carbide porous body in which aluminum or an aluminum alloy is impregnated to a porous body made of silicon carbide, characterized in that: between the metal layer and the aluminum layer, between the aluminum layer and the copper layer, and between the copper layer and the aluminum-impregnated silicon carbide porous body, diffusion layers (33, 34, 35) having intermetallic compounds of aluminum and copper are formed; when yield stress of the circuit layer is o1 (MPa), a thickness of the circuit layer is t1 (mm), a bonding area of the circuit layer to the ceramic board is A1 (mm 2); yield stress of the metal layer is σ2 (MPa), a thickness of the metal layer is t2 (mm), a bonding area of the metal layer to the ceramic board is A2 (mm 2); yield stress of the aluminum layer is σ3 (MPa), a thickness of the aluminum layer is t3 (mm), a bonding area of the aluminum layer to the metal layer is A3 (mm 2); yield stress of the copper layer is σ4 (MPa), a thickness of the copper layer is t4 (mm), and a bonding area of the copper layer to the aluminum layer is A4 (mm 2), wherein the thickness t1 is formed to be not less than 0.1 mm and not more than 3.0 mm; the thickness t2 is formed to be not less than 0.1 mm and not more than 3.0 mm; the thickness t3 is formed to be not more than 3.0 mm; and the thickness t4 is formed to be not less than 0.1 mm and not more than 5.0 mm, and wherein a ratio [(σ1 × t1 × A1) / {(σ2 × t2 × A2) + (σ3 × t3 × A3) + (σ4 × t4 × A4)}] is in a range not less than 0.06 and not more than 0.70. a power-module substrate wherein a circuit layer made of copper or a copper alloy is disposed on one surface of a ceramic board and a metal layer made of copper or a copper alloy disposed on another surface of the ceramic board; an aluminum layer made of aluminum or an aluminum alloy and bonded on the metal layer; a copper layer made of copper or a copper alloy and bonded on the aluminum layer; and a heat sink bonded on the copper layer and formed from an aluminum-impregnated silicon carbide porous body in which aluminum or an aluminum alloy is impregnated to a porous body made of silicon carbide, characterized in that: between the metal layer and the aluminum layer, between the aluminum layer and the copper layer, and between the copper layer and the aluminum-impregnated silicon carbide porous body, diffusion layers (33, 34, 35) having intermetallic compounds of aluminum and copper are formed; when yield stress of the circuit layer is o1 (MPa), a thickness of the circuit layer is t1 (mm), a bonding area of the circuit layer to the ceramic board is A1 (mm 2); yield stress of the metal layer is σ2 (MPa), a thickness of the metal layer is t2 (mm), a bonding area of the metal layer to the ceramic board is A2 (mm 2); yield stress of the aluminum layer is σ3 (MPa), a thickness of the aluminum layer is t3 (mm), a bonding area of the aluminum layer to the metal layer is A3 (mm 2); yield stress of the copper layer is σ4 (MPa), a thickness of the copper layer is t4 (mm), and a bonding area of the copper layer to the aluminum layer is A4 (mm 2), wherein the thickness t1 is formed to be not less than 0.1 mm and not more than 3.0 mm; the thickness t2 is formed to be not less than 0.1 mm and not more than 3.0 mm; the thickness t3 is formed to be not more than 3.0 mm; and the thickness t4 is formed to be not less than 0.1 mm and not more than 5.0 mm, and wherein a ratio [(σ1 × t1 × A1) / {(σ2 × t2 × A2) + (σ3 × t3 × A3) + (σ4 × t4 × A4)}] is in a range not less than 0.06 and not more than 0.70. between the metal layer and the aluminum layer, between the aluminum layer and the copper layer, and between the copper layer and the aluminum-impregnated silicon carbide porous body, diffusion layers (33, 34, 35) having intermetallic compounds of aluminum and copper are formed; when yield stress of the circuit layer is o1 (MPa), a thickness of the circuit layer is t1 (mm), a bonding area of the circuit layer to the ceramic board is A1 (mm 2); yield stress of the metal layer is σ2 (MPa), a thickness of the metal layer is t2 (mm), a bonding area of the metal layer to the ceramic board is A2 (mm 2); yield stress of the aluminum layer is σ3 (MPa), a thickness of the aluminum layer is t3 (mm), a bonding area of the aluminum layer to the metal layer is A3 (mm 2); yield stress of the copper layer is σ4 (MPa), a thickness of the copper layer is t4 (mm), and a bonding area of the copper layer to the aluminum layer is A4 (mm 2), wherein the thickness t1 is formed to be not less than 0.1 mm and not more than 3.0 mm; the thickness t2 is formed to be not less than 0.1 mm and not more than 3.0 mm; the thickness t3 is formed to be not more than 3.0 mm; and the thickness t4 is formed to be not less than 0.1 mm and not more than 5.0 mm, and wherein a ratio [(σ1 × t1 × A1) / {(σ2 × t2 × A2) + (σ3 × t3 × A3) + (σ4 × t4 × A4)}] is in a range not less than 0.06 and not more than 0.70.