A memory system comprising: a host device comprising: a second I/O cell that can perform transmission/reception to/from a memory device at any one signal voltage selected from a first voltage and a second voltage; a second regulator that can output the first voltage and the second voltage; a host control section that sends, when the signal voltage is switched from the first voltage to the second voltage, a command signal requesting switching of the signal voltage to the memory device comprising a non-volatile memory section, a first I/O cell that can transmit and receive the command signal, response signal, clock signal and data signal to/from the host device via a command signal line, response signal line, clock signal line or data signal line at the any one signal voltage selected from the first voltage and the second voltage which is lower than the first voltage and a first regulator that can output the first voltage and the second voltage, receives information indicating that the signal voltage can be switched from the memory device using the response signal at the first voltage, switches a voltage outputted by the second regulator from the first voltage to the second voltage, supplies the clock signal of the second voltage to the clock signal line of the ground level after a lapse of a predetermined time, starts transmission/reception at a signal voltage of the second voltage upon detecting that the data signal line is not the ground level; and the memory device comprising: the non-volatile memory section; the first I/O cell that can transmit and receive the command signal, the response signal, the clock signal and the data signal to/from the host device via the command signal line, the response signal line, the clock signal line or the data signal line respectively at the any one signal voltage selected from the first voltage and the second voltage which is lower than the first voltage; the first regulator that can output the first voltage and the second voltage; and a memory controller that receives, when the signal voltage is switched from the first voltage to the second voltage, the command signal requesting switching of the signal voltage from the host device, sends information indicating that the signal voltage can be switched to the host device using the response signal at the first voltage, switches a voltage outputted by the first regulator from the first voltage to the second voltage, applies, upon detecting that a voltage other than the ground level is applied to the clock signal line after a lapse of a predetermined time, the second voltage to the response signal line and the data signal line of the ground level, and starts transmission/reception at the signal voltage of the second voltage. a second I/O cell that can perform transmission/reception to/from a memory device at any one signal voltage selected from a first voltage and a second voltage; a second regulator that can output the first voltage and the second voltage; a host control section that sends, when the signal voltage is switched from the first voltage to the second voltage, a command signal requesting switching of the signal voltage to the memory device comprising a non-volatile memory section, a first I/O cell that can transmit and receive the command signal, response signal, clock signal and data signal to/from the host device via a command signal line, response signal line, clock signal line or data signal line at the any one signal voltage selected from the first voltage and the second voltage which is lower than the first voltage and a first regulator that can output the first voltage and the second voltage, receives information indicating that the signal voltage can be switched from the memory device using the response signal at the first voltage, switches a voltage outputted by the second regulator from the first voltage to the second voltage, supplies the clock signal of the second voltage to the clock signal line of the ground level after a lapse of a predetermined time, starts transmission/reception at a signal voltage of the second voltage upon detecting that the data signal line is not the ground level; and the memory device comprising: the non-volatile memory section; the first I/O cell that can transmit and receive the command signal, the response signal, the clock signal and the data signal to/from the host device via the command signal line, the response signal line, the clock signal line or the data signal line respectively at the any one signal voltage selected from the first voltage and the second voltage which is lower than the first voltage; the first regulator that can output the first voltage and the second voltage; and a memory controller that receives, when the signal voltage is switched from the first voltage to the second voltage, the command signal requesting switching of the signal voltage from the host device, sends information indicating that the signal voltage can be switched to the host device using the response signal at the first voltage, switches a voltage outputted by the first regulator from the first voltage to the second voltage, applies, upon detecting that a voltage other than the ground level is applied to the clock signal line after a lapse of a predetermined time, the second voltage to the response signal line and the data signal line of the ground level, and starts transmission/reception at the signal voltage of the second voltage.