A method for receiving information over a plurality of wires, the method comprising: decoding, using a vector signal code receiver, a predetermined number of sequentially received vector signaling codewords to obtain i) sequential sets of n data bits and ii) two multi-bit error correction check words r0 and r1, wherein elements of each vector signaling codeword are received in parallel over a plurality of wires, wherein n is an integer greater than 1; generating, using a forward error correction, FEC, check circuit, an incremental update of two multi-bit error correction syndrome values r0" and r1" based on each sequential set of data bits according to a check matrix, wherein the check matrix comprises elements of a Galois field GF[2 n] and is composed of two rows, the elements in column j of the check matrix are 1 and a j, where the element a j is a binary expansion of a symbol position index integer j, wherein each bit of a first multi-bit error correction syndrome value r0" of the two multi-bit error correction syndrome values is incrementally updated using bits from corresponding bit positions in the sequential sets of n data bits; upon decoding of a final vector signaling codeword of the predetermined number of received vector signaling codewords, performing a final incremental update of the two multi-bit error correction syndrome values r0" and r1"; responsive to both multi-bit error correction syndrome values r0" and r1" being non-zero, calculating a symbol position index of a symbol containing an error from a vector r1"/r0", wherein the division of the two multi-bit error correction syndrome values r0" and r1" is interpreted in the GF[2 n] and represents the binary expansion of the symbol position index of the symbol containing the error; selecting a set of n data bits from the sequential sets of n data bits according to the symbol position index of the symbol containing the error; and altering the selected set of n data bits according to a bit error mask corresponding to the first multi-bit error correction syndrome value r0" of the two multi-bit error correction syndrome values. decoding, using a vector signal code receiver, a predetermined number of sequentially received vector signaling codewords to obtain i) sequential sets of n data bits and ii) two multi-bit error correction check words r0 and r1, wherein elements of each vector signaling codeword are received in parallel over a plurality of wires, wherein n is an integer greater than 1; generating, using a forward error correction, FEC, check circuit, an incremental update of two multi-bit error correction syndrome values r0" and r1" based on each sequential set of data bits according to a check matrix, wherein the check matrix comprises elements of a Galois field GF[2 n] and is composed of two rows, the elements in column j of the check matrix are 1 and a j, where the element a j is a binary expansion of a symbol position index integer j, wherein each bit of a first multi-bit error correction syndrome value r0" of the two multi-bit error correction syndrome values is incrementally updated using bits from corresponding bit positions in the sequential sets of n data bits; upon decoding of a final vector signaling codeword of the predetermined number of received vector signaling codewords, performing a final incremental update of the two multi-bit error correction syndrome values r0" and r1"; responsive to both multi-bit error correction syndrome values r0" and r1" being non-zero, calculating a symbol position index of a symbol containing an error from a vector r1"/r0", wherein the division of the two multi-bit error correction syndrome values r0" and r1" is interpreted in the GF[2 n] and represents the binary expansion of the symbol position index of the symbol containing the error; selecting a set of n data bits from the sequential sets of n data bits according to the symbol position index of the symbol containing the error; and altering the selected set of n data bits according to a bit error mask corresponding to the first multi-bit error correction syndrome value r0" of the two multi-bit error correction syndrome values.