An inverter control circuit configured to generate and output PWM signals for controlling an operation of a plurality of switching devices in a three-phase inverter circuit, wherein the PWM signals are configured to ensure that a waveform of a phase voltage outputted from the three-phase inverter circuit through a low-pass filter is zero in a first one-third period of a cycle, is a sine wave corresponding to a phase from 0 to 2n/3 in a subsequent one-third period of the cycle; and is a sine wave corresponding to a phase from n/3 to n in a remaining one-third period of the cycle, the inverter control circuit further comprising: a phase voltage control signal generation circuit configured to generate phase voltage control signals (Xu, Xv, Xw) for controlling the phase voltage of each of the phases based on respective line voltage signals of the phases detected by a line voltage sensor; a calculator configured to calculate three pulse width values whose absolute value represents a pulse width and whose polarity represents a polarity of a waveform to be utilized for controlling the voltage between the respective output lines of the phases outputted by the three-phase inverter circuit of each sampling period; a determiner configured to determine whether the pulse width value of a largest absolute value among the three pulse width values calculated by the calculator is larger than zero; and a PWM signal generator configured to decide a waveform of each phase of the sampling period, according to a first predetermined rule in the case where the pulse width value of the largest absolute value is larger than zero, and according to a rule different from the first predetermined rule in the case where the pulse width value of the largest absolute value is smaller than zero, to generate the PWM signal; characterized in that the inverter control circuit comprises a line voltage correction circuit configured to generate corrected line voltage signals of the respective phases by adding the phase voltage control signals (Xu, Xv, Xw) to the line voltage signals of the respective phases outputted from the three-phase inverter circuit and configured to output the corrected line voltage signals to the calculator, wherein the calculator is configured to calculate the three pulse width values based on the corrected line voltage signals. the inverter control circuit further comprising: a phase voltage control signal generation circuit configured to generate phase voltage control signals (Xu, Xv, Xw) for controlling the phase voltage of each of the phases based on respective line voltage signals of the phases detected by a line voltage sensor; a calculator configured to calculate three pulse width values whose absolute value represents a pulse width and whose polarity represents a polarity of a waveform to be utilized for controlling the voltage between the respective output lines of the phases outputted by the three-phase inverter circuit of each sampling period; a determiner configured to determine whether the pulse width value of a largest absolute value among the three pulse width values calculated by the calculator is larger than zero; and a PWM signal generator configured to decide a waveform of each phase of the sampling period, according to a first predetermined rule in the case where the pulse width value of the largest absolute value is larger than zero, and according to a rule different from the first predetermined rule in the case where the pulse width value of the largest absolute value is smaller than zero, to generate the PWM signal; characterized in that the inverter control circuit comprises a line voltage correction circuit configured to generate corrected line voltage signals of the respective phases by adding the phase voltage control signals (Xu, Xv, Xw) to the line voltage signals of the respective phases outputted from the three-phase inverter circuit and configured to output the corrected line voltage signals to the calculator, wherein the calculator is configured to calculate the three pulse width values based on the corrected line voltage signals.