A display device comprising: a substrate including a plurality of first thin film transistors and a plurality of second thin film transistors; each of the first thin film transistors disposed on the substrate and including a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode and a first drain electrode; each of the second thin film transistors disposed on the substrate and including a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode and a second drain electrode; a gate insulating layer covering the poly crystalline semiconductor layer; wherein the first gate electrode is disposed on the gate insulating layer and overlaps with the poly crystalline semiconductor layer; wherein the second gate electrode is disposed on the gate insulating layer; an intermediate insulating layer consisting of a lower oxide layer having a thickness of 500Å to 1500Å, a nitride layer having a thickness of 1000Å to 2000Å directly on the lower oxide layer, and an upper oxide layer having a thickness of 1000Å to 3000Å directly on the nitride layer, the intermediate insulating layer being disposed directly on the first gate electrode, the gate insulating layer, and the second gate electrode, and the intermediate insulating layer being disposed directly under the oxide semiconductor layer, the upper oxide layer being thicker than the nitride layer; wherein the first source electrode and the first drain electrode are disposed on the intermediate insulating layer; and wherein the second source electrode and the second drain electrode are disposed on the oxide semiconductor layer. a substrate including a plurality of first thin film transistors and a plurality of second thin film transistors; each of the first thin film transistors disposed on the substrate and including a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode and a first drain electrode; each of the second thin film transistors disposed on the substrate and including a second gate electrode, an oxide semiconductor layer on the second gate electrode, a second source electrode and a second drain electrode; a gate insulating layer covering the poly crystalline semiconductor layer; wherein the first gate electrode is disposed on the gate insulating layer and overlaps with the poly crystalline semiconductor layer; wherein the second gate electrode is disposed on the gate insulating layer; an intermediate insulating layer consisting of a lower oxide layer having a thickness of 500Å to 1500Å, a nitride layer having a thickness of 1000Å to 2000Å directly on the lower oxide layer, and an upper oxide layer having a thickness of 1000Å to 3000Å directly on the nitride layer, the intermediate insulating layer being disposed directly on the first gate electrode, the gate insulating layer, and the second gate electrode, and the intermediate insulating layer being disposed directly under the oxide semiconductor layer, the upper oxide layer being thicker than the nitride layer; wherein the first source electrode and the first drain electrode are disposed on the intermediate insulating layer; and wherein the second source electrode and the second drain electrode are disposed on the oxide semiconductor layer.