A circuit comprising: a transistor (130, 230) including first, second and third terminals, wherein the transistor (130, 230) is configured such that a voltage level at the first terminal controls a current flow from the second terminal to the third terminal; and a controller (160, 260) including: a voltage converter configured to receive a voltage existing across the second and third terminals of the transistor (130, 230) and convert the voltage to a power supply voltage that is a higher voltage than the received voltage; and a control circuit powered by the power supply voltage and configured to receive the voltage existing across the second and third terminals of the transistor (130, 230) and to provide a control voltage to the first terminal of the transistor (130, 230), wherein the control circuit is operable to regulate the voltage across the second and third terminals of the transistor (130, 230) by regulating the control voltage provided to the first terminal; wherein the control circuit further includes: a differential amplifier powered by the power supply voltage and having an inverting input coupled to the third terminal of the transistor (130, 230) and having an output coupled to the first terminal of the transistor (130, 230); and an offset voltage source coupled between the second terminal of the transistor (130, 230) and a non-inverting input of the differential amplifier, the voltage of the offset voltage source corresponding to the target voltage across the second and third terminals of the transistor (130, 230); wherein the control circuit is operable to maintain the voltage across the second and third terminals of the transistor (130, 230) at a predetermined target voltage by regulating the voltage provided to the first terminal of the transistor (130, 230).. a transistor (130, 230) including first, second and third terminals, wherein the transistor (130, 230) is configured such that a voltage level at the first terminal controls a current flow from the second terminal to the third terminal; and a controller (160, 260) including: a voltage converter configured to receive a voltage existing across the second and third terminals of the transistor (130, 230) and convert the voltage to a power supply voltage that is a higher voltage than the received voltage; and a control circuit powered by the power supply voltage and configured to receive the voltage existing across the second and third terminals of the transistor (130, 230) and to provide a control voltage to the first terminal of the transistor (130, 230), wherein the control circuit is operable to regulate the voltage across the second and third terminals of the transistor (130, 230) by regulating the control voltage provided to the first terminal; wherein the control circuit further includes: a differential amplifier powered by the power supply voltage and having an inverting input coupled to the third terminal of the transistor (130, 230) and having an output coupled to the first terminal of the transistor (130, 230); and an offset voltage source coupled between the second terminal of the transistor (130, 230) and a non-inverting input of the differential amplifier, the voltage of the offset voltage source corresponding to the target voltage across the second and third terminals of the transistor (130, 230); wherein the control circuit is operable to maintain the voltage across the second and third terminals of the transistor (130, 230) at a predetermined target voltage by regulating the voltage provided to the first terminal of the transistor (130, 230).. a differential amplifier powered by the power supply voltage and having an inverting input coupled to the third terminal of the transistor (130, 230) and having an output coupled to the first terminal of the transistor (130, 230); and an offset voltage source coupled between the second terminal of the transistor (130, 230) and a non-inverting input of the differential amplifier, the voltage of the offset voltage source corresponding to the target voltage across the second and third terminals of the transistor (130, 230); wherein the control circuit is operable to maintain the voltage across the second and third terminals of the transistor (130, 230) at a predetermined target voltage by regulating the voltage provided to the first terminal of the transistor (130, 230)..