Infrared device, comprising a substrate, and supported by the substrate: - a configuration for absorbing infrared radiation, the configuration comprising an electrically conducting layer arrangement of a thickness of 50 nm or less arranged between a first dielectric layer and a second dielectric layer, - a thermal sensor arranged for sensing the infrared radiation absorbed by the configuration, wherein the configuration comprises an electrically conducting layer stack (36, 37, 38) arranged between the first dielectric layer and a third dielectric layer, the electrically conducting layer stack (36, 37, 38) comprising a metal layer, wherein the electrically conducting layer stack (36, 37, 38) has a thickness of more than 100 nm, wherein the electrically conducting layer stack (36, 37, 38) is arranged between the electrically conducting layer arrangement and the third dielectric layer, acting as a bottom layer of the configuration, wherein the configuration comprises an electrically conducting layer arranged between the third dielectric layer and a fourth dielectric layer, and of a material different than a material of the metal layer of the electrically conducting layer stack (36, 37, 38), wherein the metal layer of the electrically conducting layer stack (36, 37, 38) and the electrically conducting layer are electrically connected to form one or more thermocouples serving as thermal sensor, wherein the electrically conducting layer arrangement is a layer arrangement available in a CMOS layer stack arranged on the substrate, wherein, in a vertical direction towards the substrate, the first dielectric layer underneath the electrically conducting layer arrangement is an inter metal dielectric of the CMOS layer stack, and wherein the electrically conducting layer arrangement is one or more of an adhesion layer for adhering the inter metal dielectric to a metal layer of the CMOS layer stack, which metal layer has previously been removed, and a diffusion barrier for preventing diffusion between the inter metal dielectric and the metal layer previously removed. a substrate, and supported by the substrate: - a configuration for absorbing infrared radiation, the configuration comprising an electrically conducting layer arrangement of a thickness of 50 nm or less arranged between a first dielectric layer and a second dielectric layer, - a thermal sensor arranged for sensing the infrared radiation absorbed by the configuration, - a configuration for absorbing infrared radiation, the configuration comprising an electrically conducting layer arrangement of a thickness of 50 nm or less arranged between a first dielectric layer and a second dielectric layer, - a thermal sensor arranged for sensing the infrared radiation absorbed by the configuration, wherein the configuration comprises an electrically conducting layer stack (36, 37, 38) arranged between the first dielectric layer and a third dielectric layer, the electrically conducting layer stack (36, 37, 38) comprising a metal layer, wherein the electrically conducting layer stack (36, 37, 38) has a thickness of more than 100 nm, wherein the electrically conducting layer stack (36, 37, 38) is arranged between the electrically conducting layer arrangement and the third dielectric layer, acting as a bottom layer of the configuration, wherein the configuration comprises an electrically conducting layer arranged between the third dielectric layer and a fourth dielectric layer, and of a material different than a material of the metal layer of the electrically conducting layer stack (36, 37, 38), wherein the metal layer of the electrically conducting layer stack (36, 37, 38) and the electrically conducting layer are electrically connected to form one or more thermocouples serving as thermal sensor, wherein the electrically conducting layer arrangement is a layer arrangement available in a CMOS layer stack arranged on the substrate, wherein, in a vertical direction towards the substrate, the first dielectric layer underneath the electrically conducting layer arrangement is an inter metal dielectric of the CMOS layer stack, and wherein the electrically conducting layer arrangement is one or more of an adhesion layer for adhering the inter metal dielectric to a metal layer of the CMOS layer stack, which metal layer has previously been removed, and a diffusion barrier for preventing diffusion between the inter metal dielectric and the metal layer previously removed.