A system for debugging an application code on a target computer, the system comprising: a host computer; and the target computer, wherein the target computer comprises a target processor configured to execute the application code, a direct memory access, DMA, engine, a memory area accessible to the host computer and the DMA engine, wherein the memory area is external to a memory used by the target processor to execute the application code, the application code is linked to a DMA I/O library comprising one or more I/O functions configured to perform a DMA transfer to transfer I/O operation parameters to the memory area accessible to the host computer and to write a DMA transfer finish flag to the memory area when the DMA transfer is complete, and the target computer is configured to continue executing the application code after the transfer of the I/O operation parameters by the DMA engine to the memory area, wherein the host computer comprises a debugger configured to access the memory area, the debugger comprising a monitor thread configured to poll the memory area for the DMA transfer finish flag, the debugger is configured to read the I/O operation parameters from the memory after the monitor thread finds the DMA transfer finish flag, the host computer executes an I/O operation on the host computer using the I/O operation parameters, and the debugger is configured to invalidate the DMA transfer finish flag upon completion of the I/O operation. a host computer; and the target computer, wherein the target computer comprises a target processor configured to execute the application code, a direct memory access, DMA, engine, a memory area accessible to the host computer and the DMA engine, wherein the memory area is external to a memory used by the target processor to execute the application code, the application code is linked to a DMA I/O library comprising one or more I/O functions configured to perform a DMA transfer to transfer I/O operation parameters to the memory area accessible to the host computer and to write a DMA transfer finish flag to the memory area when the DMA transfer is complete, and the target computer is configured to continue executing the application code after the transfer of the I/O operation parameters by the DMA engine to the memory area, a target processor configured to execute the application code, a direct memory access, DMA, engine, a memory area accessible to the host computer and the DMA engine, wherein the memory area is external to a memory used by the target processor to execute the application code, the application code is linked to a DMA I/O library comprising one or more I/O functions configured to perform a DMA transfer to transfer I/O operation parameters to the memory area accessible to the host computer and to write a DMA transfer finish flag to the memory area when the DMA transfer is complete, and the target computer is configured to continue executing the application code after the transfer of the I/O operation parameters by the DMA engine to the memory area, the memory area is external to a memory used by the target processor to execute the application code, the application code is linked to a DMA I/O library comprising one or more I/O functions configured to perform a DMA transfer to transfer I/O operation parameters to the memory area accessible to the host computer and to write a DMA transfer finish flag to the memory area when the DMA transfer is complete, and the target computer is configured to continue executing the application code after the transfer of the I/O operation parameters by the DMA engine to the memory area, wherein the host computer comprises a debugger configured to access the memory area, the debugger comprising a monitor thread configured to poll the memory area for the DMA transfer finish flag, the debugger is configured to read the I/O operation parameters from the memory after the monitor thread finds the DMA transfer finish flag, the host computer executes an I/O operation on the host computer using the I/O operation parameters, and the debugger is configured to invalidate the DMA transfer finish flag upon completion of the I/O operation.