A signal generating device comprising: a first digital filter that outputs a first interpolated signal (D(m)) by interpolating an input signal; a second digital filter that outputs a second interpolated signal by interpolating the first interpolated signal (D(m)); a phase calculation unit that calculates a phase, φ(m), of a digital signal that changes for each output sampling cycle of the first and second digital filters; a phase-accuracy conversion unit that calculates a first phase signal, A(m), and a second phase signal, B(m), on a basis of the phase of the digital signal; wherein A(m) = Φ(m)/P, B(m) = Φ(m)/modQ; wherein mod is a remainder operation, P and Q are integer values larger than zero, such that M = PQ, and wherein M is a phase resolution of the signal generating device, P is a phase resolution of the second digital filter and Q is a phase resolution of the first digital filter; a first memory that stores therein Q sets of filter coefficients, wherein each set of filter coefficients is constituted of as many filter coefficients as multipliers provided in the first digital filter; a first coefficient readout unit that reads out a set of filter coefficients from the first memory on a basis of the first phase signal, A(m), and outputs the filter coefficients to the first digital filter so as to switch the filter coefficients to be used by the multipliers of the first digital filter; a phase-error calculation unit that calculates a phase error signal (B'(m-1); B'(m-2); B'(m-3)) on a basis of the second phase signal, B(m); a second memory that stores therein P sets of filter coefficients, wherein each set of filter coefficients is constituted of as many filter coefficients as multipliers provided in the second digital filter; a second coefficient readout unit that reads out a set of filter coefficients from the second memory on a basis of the phase error signal (B'(m-1); B'(m-2); B'(m-3)); and a gain normalization unit that normalizes a gain of the filter coefficients to maintain a constant sum of filter coefficients read out from the second memory in the second coefficient readout unit, wherein the gain normalization unit outputs the normalized filter coefficients to the second digital filter and switches the filter coefficients of the second digital filter to be used by the multipliers of the second digital filter. a first digital filter that outputs a first interpolated signal (D(m)) by interpolating an input signal; a second digital filter that outputs a second interpolated signal by interpolating the first interpolated signal (D(m)); a phase calculation unit that calculates a phase, φ(m), of a digital signal that changes for each output sampling cycle of the first and second digital filters; a phase-accuracy conversion unit that calculates a first phase signal, A(m), and a second phase signal, B(m), on a basis of the phase of the digital signal; wherein A(m) = Φ(m)/P, B(m) = Φ(m)/modQ; wherein mod is a remainder operation, P and Q are integer values larger than zero, such that M = PQ, and wherein M is a phase resolution of the signal generating device, P is a phase resolution of the second digital filter and Q is a phase resolution of the first digital filter; a first memory that stores therein Q sets of filter coefficients, wherein each set of filter coefficients is constituted of as many filter coefficients as multipliers provided in the first digital filter; a first coefficient readout unit that reads out a set of filter coefficients from the first memory on a basis of the first phase signal, A(m), and outputs the filter coefficients to the first digital filter so as to switch the filter coefficients to be used by the multipliers of the first digital filter; a phase-error calculation unit that calculates a phase error signal (B'(m-1); B'(m-2); B'(m-3)) on a basis of the second phase signal, B(m); a second memory that stores therein P sets of filter coefficients, wherein each set of filter coefficients is constituted of as many filter coefficients as multipliers provided in the second digital filter; a second coefficient readout unit that reads out a set of filter coefficients from the second memory on a basis of the phase error signal (B'(m-1); B'(m-2); B'(m-3)); and a gain normalization unit that normalizes a gain of the filter coefficients to maintain a constant sum of filter coefficients read out from the second memory in the second coefficient readout unit, wherein the gain normalization unit outputs the normalized filter coefficients to the second digital filter and switches the filter coefficients of the second digital filter to be used by the multipliers of the second digital filter.