A display device comprising: a substrate which includes a display area and a pad area; a semiconductor layer provided in the display area of the substrate; a first gate insulation layer and a second gate insulation layer disposed on the semiconductor layer; a plurality of gate lines and a plurality of data lines which are provided on the display area of the substrate, the plurality of gate lines comprising first gate wires (151, 152, 153, 155a, 155b, 155c, 155d, 155e, 155f) and second gate wires (157, 156), the first gate wires (151, 152, 153, 155a, 155b, 155c, 155d, 155e, 155f) being provided between the first gate insulation layer and the second gate insulation layer; and the second gate wires (157, 156) being provided on the second gate insulation layer; a plurality of data pads which are provided on the pad area of the substrate and arranged along a first direction and a second direction, the plurality of data pads comprising a first data pad; a second data pad which is disposed adjacent to the first data pad along the first direction; a third data pad which is disposed adjacent to the first data pad along the second direction; and a fourth data pad which is disposed adjacent to the second data pad along the second direction; and a plurality of connection wires which are respectively connected with the plurality of data pads, the plurality of connection wires comprising: a first connection wire which is connected with the first data pad; and a second connection wire which is connected with the second data pad and disposed between the first data pad and the third data pad, wherein the first data pad and the second connection wire are respectively disposed in different layers, and wherein the first data pad is provided in the same layer as that of the first gate wires (151, 152, 153, 155a, 155b, 155c, 155d, 155e, 155f), and the second data pad is provided in the same layer as that of the second gate wires (157, 156), and wherein the plurality of connection wires is connected with the plurality of data lines. a substrate which includes a display area and a pad area; a semiconductor layer provided in the display area of the substrate; a first gate insulation layer and a second gate insulation layer disposed on the semiconductor layer; a plurality of gate lines and a plurality of data lines which are provided on the display area of the substrate, the plurality of gate lines comprising first gate wires (151, 152, 153, 155a, 155b, 155c, 155d, 155e, 155f) and second gate wires (157, 156), the first gate wires (151, 152, 153, 155a, 155b, 155c, 155d, 155e, 155f) being provided between the first gate insulation layer and the second gate insulation layer; and the second gate wires (157, 156) being provided on the second gate insulation layer; a plurality of data pads which are provided on the pad area of the substrate and arranged along a first direction and a second direction, the plurality of data pads comprising a first data pad; a second data pad which is disposed adjacent to the first data pad along the first direction; a third data pad which is disposed adjacent to the first data pad along the second direction; and a fourth data pad which is disposed adjacent to the second data pad along the second direction; and a plurality of connection wires which are respectively connected with the plurality of data pads, the plurality of connection wires comprising: a first connection wire which is connected with the first data pad; and a second connection wire which is connected with the second data pad and disposed between the first data pad and the third data pad, wherein the first data pad and the second connection wire are respectively disposed in different layers, and wherein the first data pad is provided in the same layer as that of the first gate wires (151, 152, 153, 155a, 155b, 155c, 155d, 155e, 155f), and the second data pad is provided in the same layer as that of the second gate wires (157, 156), and wherein the plurality of connection wires is connected with the plurality of data lines. a first connection wire which is connected with the first data pad; and a second connection wire which is connected with the second data pad and disposed between the first data pad and the third data pad, wherein the first data pad and the second connection wire are respectively disposed in different layers, and wherein the first data pad is provided in the same layer as that of the first gate wires (151, 152, 153, 155a, 155b, 155c, 155d, 155e, 155f), and the second data pad is provided in the same layer as that of the second gate wires (157, 156), and wherein the plurality of connection wires is connected with the plurality of data lines.