A power converter, which is configured to convert a DC voltage (Vdc) into three-phase voltages based on three-phase voltage commands (Vu, Vv, Vw) each being a sine wave to output the three-phase voltages, the power converter comprising: a first offset voltage computing section, which is configured to determine the three-phase voltage commands (Vub, Vvb, Vwb) as a maximum phase (Vmax), an intermediate phase, and a minimum phase (Vmin) in descending order, to obtain a first DC voltage by multiplying the DC voltage (Vdc) by a first constant, to compute a first offset voltage (Voffset1') by subtracting the first DC voltage from the maximum phase (Vmax)to determine a sign of the first offset voltage and to set the first offset voltage to zero when a sign of the first offset voltage is negative; a corrected three-phase voltage command computing section (7a,7b), which is configured to compute corrected three-phase voltage commands obtained by subtracting the first offset voltage from each phase of the three-phase voltage commands; and an inverter, which is configured to output the three-phase voltages (U, V, W) based on the corrected three-phase voltage commands (Vu, Vv, Vw) wherein the inverter includes lower arm switching elements (Sun, Svn, Swn) and current detection resistive elements (Ru, Rv, Rw) connected in series to said lower arm switching elements, and further includes a current detector, which is configured to detect currents flowing through phases of the inverter (U, V, W) based on a voltage drop in said current detection resistive elements (Ru, Rv, Rw) and wherein the first offset voltage computing section is configured to set the first constant so that energization time of the lower arm switching elements (Sun, Svn, Swn) becomes equal to a lower limit value that enables detection of the currents in the current detection resistive elements (Ru, Rv, Rw); characterized by a second offset voltage computing section, which is configured to compute a second offset voltage (Voffset2) based on at least two of the maximum phase (Vmax), the minimum phase (Vmin), and the DC voltage, wherein the power converter is configured to calculate an amplitude (Vamp) of the three-phase voltage commands (Vub, Vvb, Vwb) and the corrected three-phase voltage command computing section (7a, 7b) is further configured to output, when the amplitude (Vamp) of the three-phase voltage commands (Vub,Vvb,Vwb) is larger than a preset threshold value (Vth), the corrected three-phase voltage commands (Vu, Vv, Vw) obtained by subtracting the second offset voltage (Voffset2) from the three-phase voltage commands (Vub, Vvb, Vwb), and to output, when the amplitude (Vamp) of the three-phase voltage commands (Vub, Vvb, Vwb) is smaller than the preset threshold value (Vth), the corrected three-phase voltage commands (Vu, Vv, Vw) obtained by subtracting the first offset voltage (Voffset1') from the three-phase voltage commands (Vub, Vvb, Vwb). a first offset voltage computing section, which is configured to determine the three-phase voltage commands (Vub, Vvb, Vwb) as a maximum phase (Vmax), an intermediate phase, and a minimum phase (Vmin) in descending order, to obtain a first DC voltage by multiplying the DC voltage (Vdc) by a first constant, to compute a first offset voltage (Voffset1') by subtracting the first DC voltage from the maximum phase (Vmax)to determine a sign of the first offset voltage and to set the first offset voltage to zero when a sign of the first offset voltage is negative; a corrected three-phase voltage command computing section (7a,7b), which is configured to compute corrected three-phase voltage commands obtained by subtracting the first offset voltage from each phase of the three-phase voltage commands; and an inverter, which is configured to output the three-phase voltages (U, V, W) based on the corrected three-phase voltage commands (Vu, Vv, Vw) wherein the inverter includes lower arm switching elements (Sun, Svn, Swn) and current detection resistive elements (Ru, Rv, Rw) connected in series to said lower arm switching elements, and further includes a current detector, which is configured to detect currents flowing through phases of the inverter (U, V, W) based on a voltage drop in said current detection resistive elements (Ru, Rv, Rw) and wherein the first offset voltage computing section is configured to set the first constant so that energization time of the lower arm switching elements (Sun, Svn, Swn) becomes equal to a lower limit value that enables detection of the currents in the current detection resistive elements (Ru, Rv, Rw); characterized by a second offset voltage computing section, which is configured to compute a second offset voltage (Voffset2) based on at least two of the maximum phase (Vmax), the minimum phase (Vmin), and the DC voltage, wherein the power converter is configured to calculate an amplitude (Vamp) of the three-phase voltage commands (Vub, Vvb, Vwb) and the corrected three-phase voltage command computing section (7a, 7b) is further configured to output, when the amplitude (Vamp) of the three-phase voltage commands (Vub,Vvb,Vwb) is larger than a preset threshold value (Vth), the corrected three-phase voltage commands (Vu, Vv, Vw) obtained by subtracting the second offset voltage (Voffset2) from the three-phase voltage commands (Vub, Vvb, Vwb), and to output, when the amplitude (Vamp) of the three-phase voltage commands (Vub, Vvb, Vwb) is smaller than the preset threshold value (Vth), the corrected three-phase voltage commands (Vu, Vv, Vw) obtained by subtracting the first offset voltage (Voffset1') from the three-phase voltage commands (Vub, Vvb, Vwb).