A superconducting circuit comprising: at least one Josephson transmission line, JTL, for propagating quantum pulses in a first direction in response to an application of a clock signal having a plurality of phases, the at least one JTL comprising: a first inductive element coupled between a first terminal and a second terminal, a first Josephson junction coupled between the second terminal and a ground terminal, a second inductive element coupled between the second terminal and a third terminal, and a second Josephson junction coupled between the third terminal and a ground terminal, wherein the at least one JTL further comprises a third inductive element coupled between the third terminal and a fourth terminal, a fourth inductive element coupled between the fourth terminal and a source of alternating current bias received by the fourth terminal, a fifth inductive element coupled between the fourth terminal receiving the alternating current bias and a fifth terminal, and a third Josephson junction coupled between the fifth terminal and a ground terminal; wherein the second inductive element is configured to form an inductive loop comprising the first Josephson junction, the second inductive element, and the second Josephson junction, and wherein the first Josephson junction is under-biased relative to the other Josephson junctions (164, 166), and wherein the inductance of the second inductive element in the inductive loop of the JTL is configured to be large enough to reduce current circulating in the inductive loop to below the level needed to trigger the first Josephson junction regardless of the direction of the alternating bias current applied to the JTL and configures the inductive loop to operate in a mode such that a quantum pulse cannot travel in a second direction opposite from the first direction across the boundary formed by the second inductive element and the first Josephson junction regardless of a phase of the clock signal. at least one Josephson transmission line, JTL, for propagating quantum pulses in a first direction in response to an application of a clock signal having a plurality of phases, the at least one JTL comprising: a first inductive element coupled between a first terminal and a second terminal, a first Josephson junction coupled between the second terminal and a ground terminal, a second inductive element coupled between the second terminal and a third terminal, and a second Josephson junction coupled between the third terminal and a ground terminal, a first inductive element coupled between a first terminal and a second terminal, a first Josephson junction coupled between the second terminal and a ground terminal, a second inductive element coupled between the second terminal and a third terminal, and a second Josephson junction coupled between the third terminal and a ground terminal, wherein the at least one JTL further comprises a third inductive element coupled between the third terminal and a fourth terminal, a fourth inductive element coupled between the fourth terminal and a source of alternating current bias received by the fourth terminal, a fifth inductive element coupled between the fourth terminal receiving the alternating current bias and a fifth terminal, and a third Josephson junction coupled between the fifth terminal and a ground terminal; wherein the second inductive element is configured to form an inductive loop comprising the first Josephson junction, the second inductive element, and the second Josephson junction, and wherein the first Josephson junction is under-biased relative to the other Josephson junctions (164, 166), and wherein the inductance of the second inductive element in the inductive loop of the JTL is configured to be large enough to reduce current circulating in the inductive loop to below the level needed to trigger the first Josephson junction regardless of the direction of the alternating bias current applied to the JTL and configures the inductive loop to operate in a mode such that a quantum pulse cannot travel in a second direction opposite from the first direction across the boundary formed by the second inductive element and the first Josephson junction regardless of a phase of the clock signal.