A system, comprising: a phase locked loop, PLL, device that comprises an analog phase detector configured to determine a phase difference between a reference signal and a filtered signal, wherein the analog phase detector is configured to use the filtered signal for locking an output signal of the PLL device to the reference signal; a voltage-controlled oscillator, VCO, device coupled to the analog phase detector, wherein the VCO device is configured to generate, based on the reference signal, the output signal, wherein the output signal is adjusted on the basis of the phase difference; and a feedback divider coupled to the VCO device, wherein the feedback divider is configured to generate a feedback signal using the output signal; a delay element coupled to the feedback divider and the analog phase detector, wherein the delay element is configured to generate, based on a control signal, the filtered signal from the feedback signal for providing to the analog phase detector; a digital phase detector coupled to the delay element via a digital filter and coupled to the VCO device via the feedback divider, the digital phase detector configured to determine an amount of PLL error based on the reference signal and the output signal, wherein the PLL error comprises jitter in the output signal; and wherein the digital filter is coupled to the digital phase detector and the delay element; wherein the digital filter is configured, using the amount of PLL error, to generate the control signal. a phase locked loop, PLL, device that comprises an analog phase detector configured to determine a phase difference between a reference signal and a filtered signal, wherein the analog phase detector is configured to use the filtered signal for locking an output signal of the PLL device to the reference signal; a voltage-controlled oscillator, VCO, device coupled to the analog phase detector, wherein the VCO device is configured to generate, based on the reference signal, the output signal, wherein the output signal is adjusted on the basis of the phase difference; and a feedback divider coupled to the VCO device, wherein the feedback divider is configured to generate a feedback signal using the output signal; an analog phase detector configured to determine a phase difference between a reference signal and a filtered signal, wherein the analog phase detector is configured to use the filtered signal for locking an output signal of the PLL device to the reference signal; a voltage-controlled oscillator, VCO, device coupled to the analog phase detector, wherein the VCO device is configured to generate, based on the reference signal, the output signal, wherein the output signal is adjusted on the basis of the phase difference; and a feedback divider coupled to the VCO device, wherein the feedback divider is configured to generate a feedback signal using the output signal; a delay element coupled to the feedback divider and the analog phase detector, wherein the delay element is configured to generate, based on a control signal, the filtered signal from the feedback signal for providing to the analog phase detector; a digital phase detector coupled to the delay element via a digital filter and coupled to the VCO device via the feedback divider, the digital phase detector configured to determine an amount of PLL error based on the reference signal and the output signal, wherein the PLL error comprises jitter in the output signal; and wherein the digital filter is coupled to the digital phase detector and the delay element; wherein the digital filter is configured, using the amount of PLL error, to generate the control signal.