A magnetoresistive random access memory,MRAM, comprising: an MRAM array including a data array and a sensor array, the MRAM array arranged in rows and columns, each row having a corresponding word line (WL1, WL2, WL3, WLM) and each column having a corresponding bit line (BL1, BLN, bl1, bl2) and a corresponding source line(SL1, SLN, sl1, sl2), wherein an intersection of each row and column has a corresponding MRAM cell (124, 140), wherein each corresponding MRAM cell includes a select transistor (128,152) and a Magnetic Tunnel Junction, MTJ, (130,154), wherein: each MRAM cell (124,125, 131, 132) of the data array is configured to store a data bit, and in the sensor array, a first column is connected to a second column to form a sensor column, the sensor column including sensor cells (140, 144) in which each sensor cell is formed by a first MRAM cell in the first column together with a second MRAM cell in the second column along a same word line, wherein only one of a first MTJ of the first MRAM cell or a second MTJ of the second MRAM cell is used as an MTJ of the sensor cell, and drain electrodes of a first select transistor of the first MRAM cell and a second select transistor of the second MRAM cell are electrically connected to each other; read circuitry configured to provide a set of output bits as read data from a set of selected MRAM cells at a read address of the data array and configured to provide a sensor output (DOSen1) indicative of a rupture state of an MTJ of a selected sensor cell of the sensor array; and a life predictor circuit configured to provide a warning indicating of impending failure of the data array based on the sensor output. an MRAM array including a data array and a sensor array, the MRAM array arranged in rows and columns, each row having a corresponding word line (WL1, WL2, WL3, WLM) and each column having a corresponding bit line (BL1, BLN, bl1, bl2) and a corresponding source line(SL1, SLN, sl1, sl2), wherein an intersection of each row and column has a corresponding MRAM cell (124, 140), wherein each corresponding MRAM cell includes a select transistor (128,152) and a Magnetic Tunnel Junction, MTJ, (130,154), wherein: each MRAM cell (124,125, 131, 132) of the data array is configured to store a data bit, and in the sensor array, a first column is connected to a second column to form a sensor column, the sensor column including sensor cells (140, 144) in which each sensor cell is formed by a first MRAM cell in the first column together with a second MRAM cell in the second column along a same word line, wherein only one of a first MTJ of the first MRAM cell or a second MTJ of the second MRAM cell is used as an MTJ of the sensor cell, and drain electrodes of a first select transistor of the first MRAM cell and a second select transistor of the second MRAM cell are electrically connected to each other; each MRAM cell (124,125, 131, 132) of the data array is configured to store a data bit, and in the sensor array, a first column is connected to a second column to form a sensor column, the sensor column including sensor cells (140, 144) in which each sensor cell is formed by a first MRAM cell in the first column together with a second MRAM cell in the second column along a same word line, wherein only one of a first MTJ of the first MRAM cell or a second MTJ of the second MRAM cell is used as an MTJ of the sensor cell, and drain electrodes of a first select transistor of the first MRAM cell and a second select transistor of the second MRAM cell are electrically connected to each other; read circuitry configured to provide a set of output bits as read data from a set of selected MRAM cells at a read address of the data array and configured to provide a sensor output (DOSen1) indicative of a rupture state of an MTJ of a selected sensor cell of the sensor array; and a life predictor circuit configured to provide a warning indicating of impending failure of the data array based on the sensor output.