An interposer-based image sensing device, comprising: at least one interposer disposed on a surface of a substrate; at least one sensing array sensor disposed on the at least one interposer, the at least one light sensing array sensor being back-thinned, the at least one light sensing array sensor configured for back illumination, the at least one light sensing array sensor including a plurality of columns of pixels; at least one amplification circuitry element configured to amplify an output of the at least one light sensing array sensor, the at least one amplification circuit being operatively connected to the interposer; multiple analog-to-digital conversion circuitry elements each configured to convert an output of the at least one light sensing array sensor to a digital signal, the multiple analog-to-digital conversion circuits being operatively connected to the interposer; logic circuitry provided on the interposer which is configured to combine two or more outputs of the multiple analog-to-digital conversion circuits into one or more high-speed serial bit streams for device output; at least one driver circuitry element configured to drive at least one of a clock signal or control signal of the at least one light sensing array sensor, the at least one driver circuitry element being operatively connected to the interposer; and at least one additional circuitry element being operatively connected to the one or more interposer, wherein the at least one additional circuitry element, the at least one amplification circuitry element; the multiple analog-to-digital conversion circuitry elements; and the at least one driver circuitry element are disposed on or built into the interposer; the interposer being configured to electrically couple at least two of the at least one light sensing array sensor, the one or more amplification circuits, the multiple conversion circuits, the one or more driver circuits, or the one or more additional circuits. at least one interposer disposed on a surface of a substrate; at least one sensing array sensor disposed on the at least one interposer, the at least one light sensing array sensor being back-thinned, the at least one light sensing array sensor configured for back illumination, the at least one light sensing array sensor including a plurality of columns of pixels; at least one amplification circuitry element configured to amplify an output of the at least one light sensing array sensor, the at least one amplification circuit being operatively connected to the interposer; multiple analog-to-digital conversion circuitry elements each configured to convert an output of the at least one light sensing array sensor to a digital signal, the multiple analog-to-digital conversion circuits being operatively connected to the interposer; logic circuitry provided on the interposer which is configured to combine two or more outputs of the multiple analog-to-digital conversion circuits into one or more high-speed serial bit streams for device output; at least one driver circuitry element configured to drive at least one of a clock signal or control signal of the at least one light sensing array sensor, the at least one driver circuitry element being operatively connected to the interposer; and at least one additional circuitry element being operatively connected to the one or more interposer, wherein the at least one additional circuitry element, the at least one amplification circuitry element; the multiple analog-to-digital conversion circuitry elements; and the at least one driver circuitry element are disposed on or built into the interposer; the interposer being configured to electrically couple at least two of the at least one light sensing array sensor, the one or more amplification circuits, the multiple conversion circuits, the one or more driver circuits, or the one or more additional circuits.