A method of forming a MEMS microphone, the method comprising performing the following steps in the following recited order: etching trenches in the top layer of a silicon-on-insulator wafer; adding sacrificial oxide to the walls of the trenches and along at least a portion of the top surface of the SOI wafer; adding sacrificial polysilicon to the oxide lined trenches and the oxide along the top surface of the SOI wafer; etching a first hole into the sacrificial polysilicon; adding more oxide to substantially encapsulate the sacrificial polysilicon; adding an additional polysilicon layer for forming the diaphragm; forming a second hole through the diaphragm layer; adding a wet etch resistant material completely covering the diaphragm layer; forming a resist hole through the wet etch resistant material to expose the second hole in the diaphragm forming a third hole through the sacrificial layer (24, 26), the third hole producing a channel between a bottom surface of the diaphragm layer and a top surface of the SOI wafer; subsequent to forming the third hole, performing a further step of enlarging the diameter of the third hole to be greater than the diameter of the second hole; adding more wet etch resistant material to substantially fill the channel between the substrate and the diaphragm; forming, in the substrate of the SOI wafer, from the side of said substrate that is opposite to the side on which the diaphragm is provided, a backside cavity thereby exposing a portion of the oxide layer within the SOI wafer; applying a dry etch material to the sacrificial material through the backside cavity to remove the polysilicon layer; applying a wet etch material through the backside cavity to remove at least a portion of the oxide layer, wherein the wet etch resistant material is substantially unpatterned before applying the wet etch material, and at least a portion of the wet etch resistant material supports the diaphragm layer after applying the wet etch material; and removing the wet etch resistant material supporting the diaphragm layer. etching trenches in the top layer of a silicon-on-insulator wafer; adding sacrificial oxide to the walls of the trenches and along at least a portion of the top surface of the SOI wafer; adding sacrificial polysilicon to the oxide lined trenches and the oxide along the top surface of the SOI wafer; etching a first hole into the sacrificial polysilicon; adding more oxide to substantially encapsulate the sacrificial polysilicon; adding an additional polysilicon layer for forming the diaphragm; forming a second hole through the diaphragm layer; adding a wet etch resistant material completely covering the diaphragm layer; forming a resist hole through the wet etch resistant material to expose the second hole in the diaphragm forming a third hole through the sacrificial layer (24, 26), the third hole producing a channel between a bottom surface of the diaphragm layer and a top surface of the SOI wafer; subsequent to forming the third hole, performing a further step of enlarging the diameter of the third hole to be greater than the diameter of the second hole; adding more wet etch resistant material to substantially fill the channel between the substrate and the diaphragm; forming, in the substrate of the SOI wafer, from the side of said substrate that is opposite to the side on which the diaphragm is provided, a backside cavity thereby exposing a portion of the oxide layer within the SOI wafer; applying a dry etch material to the sacrificial material through the backside cavity to remove the polysilicon layer; applying a wet etch material through the backside cavity to remove at least a portion of the oxide layer, wherein the wet etch resistant material is substantially unpatterned before applying the wet etch material, and at least a portion of the wet etch resistant material supports the diaphragm layer after applying the wet etch material; and removing the wet etch resistant material supporting the diaphragm layer.