A method for manufacturing a thin film transistor substrate, comprising: a gate layer formation step of forming a gate electrode (21 a) and a first interconnect on a substrate; a gate insulating film formation step of successively forming a first insulating film and an oxide semiconductor film covering the gate electrode and the first interconnect, and thereafter, patterning the multilayer film of the first insulating film and the oxide semiconductor film to form a contact hole at a position overlapping the first interconnect, thereby forming a gate insulating film; a source layer formation step of forming a conductive film covering the oxide semiconductor film, and thereafter, patterning the conductive film to form a source electrode and a drain electrode overlapping the gate electrode and separated apart from each other, and a second interconnect intersecting the first interconnect at an end portion of the substrate and connected via the contact hole to the first interconnect; an interlayer insulating film formation step of forming a second insulating film covering the source electrode, the drain electrode, and the second interconnect, and thereafter, patterning the second insulating film to form an interlayer insulating film; a pixel electrode formation step of reducing the resistance of the oxide semiconductor film exposed through the interlayer insulating film to form a pixel electrode; and in the gate layer formation step, the gate electrode is made wide enough to lie across a boundary between the drain electrode formed in the source layer formation step and the pixel electrode formed in the pixel electrode formation step. a gate layer formation step of forming a gate electrode (21 a) and a first interconnect on a substrate; a gate insulating film formation step of successively forming a first insulating film and an oxide semiconductor film covering the gate electrode and the first interconnect, and thereafter, patterning the multilayer film of the first insulating film and the oxide semiconductor film to form a contact hole at a position overlapping the first interconnect, thereby forming a gate insulating film; a source layer formation step of forming a conductive film covering the oxide semiconductor film, and thereafter, patterning the conductive film to form a source electrode and a drain electrode overlapping the gate electrode and separated apart from each other, and a second interconnect intersecting the first interconnect at an end portion of the substrate and connected via the contact hole to the first interconnect; an interlayer insulating film formation step of forming a second insulating film covering the source electrode, the drain electrode, and the second interconnect, and thereafter, patterning the second insulating film to form an interlayer insulating film; a pixel electrode formation step of reducing the resistance of the oxide semiconductor film exposed through the interlayer insulating film to form a pixel electrode; and in the gate layer formation step, the gate electrode is made wide enough to lie across a boundary between the drain electrode formed in the source layer formation step and the pixel electrode formed in the pixel electrode formation step.