mhurhangee/ep-ind-claims huggingface dataset:
Alignment layer suitable for aligning liquid crystal molecules, characterized in that it does not essentially consist of reactive mesogens (RMs) or liquid crystal polymers, and comprises a limited amount of less than 20% by weight of at least one reactive mesogen that is present in monomeric or oligomeric form in the alignment layer after its preparation.
An electrical motor comprising: motor driver circuitry; a power bus (26, 126) comprising a common node, wherein the power bus (26, 126) is to maintain a direct current power voltage at the common node; a plurality of coils, each coil comprising a first terminal coupled to the motor driver circuitry and a second terminal coupled to the common node on the power bus; and a DC power supply to supply the DC power voltage, the power supply comprising a first terminal coupled to the common node and a second terminal coupled to the motor driver circuitry, wherein the driver circuitry and the power supply are arranged on a circuit board, and wherein the motor further comprises at least one first wire coupling the first terminal of the power supply to the common node and a plurality of second wires coupling the common node to the second terminals of the coils, characterized in that the motor driver circuitry comprises a plurality of capacitors to store charge responsive to current flowing through the coils from the common node and discharge charge current through the coils into the common node, and wherein: at least one of the capacitors is configured to store charge from current flowing from the common node in response to a boost cycle and configured to discharge to supply current flowing into the common node in response to a buck cycle. motor driver circuitry; a power bus (26, 126) comprising a common node, wherein the power bus (26, 126) is to maintain a direct current power voltage at the common node; a plurality of coils, each coil comprising a first terminal coupled to the motor driver circuitry and a second terminal coupled to the common node on the power bus; and a DC power supply to supply the DC power voltage, the power supply comprising a first terminal coupled to the common node and a second terminal coupled to the motor driver circuitry, wherein the driver circuitry and the power supply are arranged on a circuit board, and wherein the motor further comprises at least one first wire coupling the first terminal of the power supply to the common node and a plurality of second wires coupling the common node to the second terminals of the coils, characterized in that the motor driver circuitry comprises a plurality of capacitors to store charge responsive to current flowing through the coils from the common node and discharge charge current through the coils into the common node, and wherein: at least one of the capacitors is configured to store charge from current flowing from the common node in response to a boost cycle and configured to discharge to supply current flowing into the common node in response to a buck cycle.
A method of overlaying Navigated Brain Stimulation functional data on a live image of a brain, said method comprising the steps of; - obtaining a live image of a brain, - obtaining a functional map of the brain comprising an anatomical model of the brain and NBS functional data associated with the brain, - identifying at least one anatomical landmark of the brain from the live image of the brain, - identifying at least one of said identified anatomical landmarks on the anatomical model of the brain, - characterized by - modifying the functional map so that the identified at least one anatomical landmark of the model corresponds in size and orientation to the corresponding at least one anatomical landmark in the live image of the brain, and - digitally overlaying at least said NBS functional data on said live image of the brain according to the corresponding, aligned anatomical landmarks. - obtaining a live image of a brain, - obtaining a functional map of the brain comprising an anatomical model of the brain and NBS functional data associated with the brain, - identifying at least one anatomical landmark of the brain from the live image of the brain, - identifying at least one of said identified anatomical landmarks on the anatomical model of the brain, - characterized by - modifying the functional map so that the identified at least one anatomical landmark of the model corresponds in size and orientation to the corresponding at least one anatomical landmark in the live image of the brain, and - digitally overlaying at least said NBS functional data on said live image of the brain according to the corresponding, aligned anatomical landmarks.
A recording medium in which are recorded a video stream of standard-luminance range, and a video stream of high-luminance range that is a broader luminance range than the standard-luminance range, a subtitle stream of the standard-luminance range, and a subtitle stream of the high-luminance range, and a playlist file storing playback control information of a content, and including a management region and an extended region, wherein the management region stores first playback control information specifying that the video stream of the high-luminance range and the subtitle stream of the high-luminance range are to be played in combination, wherein the extended region stores second playback control information specifying that the video stream of the standard-luminance range and the subtitle stream of the standard-luminance range are to be played in combination.
A computing system comprising: a processor; memory coupled to the processor and storing instructions that, when executed by the processor cause the computing system to: generate a tracker query definition user interface having a threat parameter selection user interface element configured to receive a selection of a threat parameter, the tracker query definition user interface also having a threat value user interface element configured to receive input specifying a threat value to match for the selected threat parameter; save a tracker query based on the selection of the threat parameter and the threat value; access a threat data store that stores threat information of identified threats, the threats being identified based on detected threat signals indicative of computing system activity having relevance to a threat; and execute the tracker query against the threat data store to provide a tracker query result including a number of threats corresponding to the threat parameter and the threat value. a processor; memory coupled to the processor and storing instructions that, when executed by the processor cause the computing system to: generate a tracker query definition user interface having a threat parameter selection user interface element configured to receive a selection of a threat parameter, the tracker query definition user interface also having a threat value user interface element configured to receive input specifying a threat value to match for the selected threat parameter; save a tracker query based on the selection of the threat parameter and the threat value; access a threat data store that stores threat information of identified threats, the threats being identified based on detected threat signals indicative of computing system activity having relevance to a threat; and execute the tracker query against the threat data store to provide a tracker query result including a number of threats corresponding to the threat parameter and the threat value. generate a tracker query definition user interface having a threat parameter selection user interface element configured to receive a selection of a threat parameter, the tracker query definition user interface also having a threat value user interface element configured to receive input specifying a threat value to match for the selected threat parameter; save a tracker query based on the selection of the threat parameter and the threat value; access a threat data store that stores threat information of identified threats, the threats being identified based on detected threat signals indicative of computing system activity having relevance to a threat; and execute the tracker query against the threat data store to provide a tracker query result including a number of threats corresponding to the threat parameter and the threat value.
Pre-treatment process of organic substrates with a high organic nitrogen content such as the manure produced by laying hens or other poultry, for the reduction of the organic nitrogen content prior to complete anaerobic digestion treatment, the process being characterized by the following steps: a) mixing and feeding of the substrate to the reactor; b) heating of the organic substrate at a controlled temperature between 20 and 55° C to perform a hydrolysis and acidogenesis phase until a minimum of 25% of total nitrogen is mineralized into ammonia nitrogen while the release and accumulation of carbon dioxide CO 2 and volatile fatty acids in the substrate is facilitated; c) a second thermal treatment of the substrate is performed at the end of the hydrolysis and acidogenesis phase consisting in its heating up to a temperature between 65 and 95° C, thereby reducing the CO 2 solubility and then stripping it in order to start alkalinization of the substrate by increasing the PH parameter to values equal or higher than 9, thus shifting the ammonia chemical equilibrium from the aqueous phase of NH 4 0H to the gaseous phase of NH 3, and finally: d) stripping of nitrogen NH 3 and its removal from the substrate. a) mixing and feeding of the substrate to the reactor; b) heating of the organic substrate at a controlled temperature between 20 and 55° C to perform a hydrolysis and acidogenesis phase until a minimum of 25% of total nitrogen is mineralized into ammonia nitrogen while the release and accumulation of carbon dioxide CO 2 and volatile fatty acids in the substrate is facilitated; c) a second thermal treatment of the substrate is performed at the end of the hydrolysis and acidogenesis phase consisting in its heating up to a temperature between 65 and 95° C, thereby reducing the CO 2 solubility and then stripping it in order to start alkalinization of the substrate by increasing the PH parameter to values equal or higher than 9, thus shifting the ammonia chemical equilibrium from the aqueous phase of NH 4 0H to the gaseous phase of NH 3,
A measurement method for minimization of drive tests, comprising: receiving (101;203), by an access network equipment, a minimization of drive tests, MDT, report reported by a user equipment, wherein the MDT report comprises MDT data and a trace control entity, TCE, identifier; obtaining (102;204), by the access network equipment, a TCE address corresponding to the TCE identifier according to a mapping relationship between the TCE address and the TCE identifier or a mapping algorithm between the TCE address and the TCE identifier; and sending (103;205), by the access network equipment, the MDT data in the MDT report to a TCE corresponding to the TCE address. receiving (101;203), by an access network equipment, a minimization of drive tests, MDT, report reported by a user equipment, wherein the MDT report comprises MDT data and a trace control entity, TCE, identifier; obtaining (102;204), by the access network equipment, a TCE address corresponding to the TCE identifier according to a mapping relationship between the TCE address and the TCE identifier or a mapping algorithm between the TCE address and the TCE identifier; and sending (103;205), by the access network equipment, the MDT data in the MDT report to a TCE corresponding to the TCE address.
A device for producing highly porous, crystalline surface coatings comprising at least two spraying devices which work with a sequential sequence and by way of which various precursor substances for producing the surface coatings are applied to the surface of a carrier material to be coated from the storage vessels (3, 4) while supplying carrier gas from a storage container, and comprising at least one rinsing device (5, 13, 16) for removing unbound molecules from the coated surface, whereby the precursor substances are sucked in on the principle of an aspirator.
A laser level, comprising: a housing; a laser module assembly, the laser module assembly at least partially housed in the housing, the laser module assembly including a laser module; wherein the laser module includes a laser generator, a hollow transparent member and a cone member, the laser generator configured to generate a laser beam which is directed towards the cone member and wherein the cone member is configured to reflect the laser beam to project a laser line; wherein the hollow transparent member has a generally cylindrical shape; wherein the cone member includes a cone section including a reflecting surface and the cone section is located inside the hollow transparent member; characterized in that the cone member further includes a connection portion which wraps around an end of the hollow transparent member, the connection portion including a flange (66,67) which is located outside the external circumference of the hollow transparent member, adjacent to an outer circumferential surface of the hollow transparent member. a housing; a laser module assembly, the laser module assembly at least partially housed in the housing, the laser module assembly including a laser module; wherein the laser module includes a laser generator, a hollow transparent member and a cone member, the laser generator configured to generate a laser beam which is directed towards the cone member and wherein the cone member is configured to reflect the laser beam to project a laser line; wherein the hollow transparent member has a generally cylindrical shape; wherein the cone member includes a cone section including a reflecting surface and the cone section is located inside the hollow transparent member; characterized in that the cone member further includes a connection portion which wraps around an end of the hollow transparent member, the connection portion including a flange (66,67) which is located outside the external circumference of the hollow transparent member, adjacent to an outer circumferential surface of the hollow transparent member.
An apparatus for storing and providing configuration data to a multi-core processor, the apparatus comprising: a plurality of cores, disposed on a die; and a fuse array, disposed on said die and coupled to each of said plurality of cores, wherein said fuse array comprises: a first plurality of semiconductor fuses that is programmed with compressed configuration data for said each of said plurality of cores; and a second plurality of semiconductor fuses that is programmed with core designation data that associates some of said compressed configuration data with one of said plurality of cores, wherein said one of said plurality of cores accesses and decompresses said some of said compressed configuration data upon power-up/reset, for initialization of elements within said one of said plurality of cores. a plurality of cores, disposed on a die; and a fuse array, disposed on said die and coupled to each of said plurality of cores, wherein said fuse array comprises: a first plurality of semiconductor fuses that is programmed with compressed configuration data for said each of said plurality of cores; and a second plurality of semiconductor fuses that is programmed with core designation data that associates some of said compressed configuration data with one of said plurality of cores, wherein said one of said plurality of cores accesses and decompresses said some of said compressed configuration data upon power-up/reset, for initialization of elements within said one of said plurality of cores. a first plurality of semiconductor fuses that is programmed with compressed configuration data for said each of said plurality of cores; and a second plurality of semiconductor fuses that is programmed with core designation data that associates some of said compressed configuration data with one of said plurality of cores, wherein said one of said plurality of cores accesses and decompresses said some of said compressed configuration data upon power-up/reset, for initialization of elements within said one of said plurality of cores.
A semiconductor device mountable to a substrate, comprising: - a semiconductor die; - an electrically conductive attachment region having a first attachment surface and a second attachment surface, the first attachment surface arranged for electrical communication with the semiconductor die, said electrically conductive attachment region having a first attachment area and a second attachment area, on opposite sides; - a housing at least in part enclosing the semiconductor die, the electrically conductive attachment region and a top surface of a recess of the housing, the recess disposed on a same side as the second attachment area of the electrically conductive attachment region, wherein the housing comprises a molding compound; - a dielectric, thermally conductive interlayer material located in the recess and secured to the housing, the dielectric, thermally conductive interlayer material is on a top surface of said recess, wherein said dielectric, thermally conductive interlayer material extends the entire length of an upper portion of the recess; and - a metallic plate that is a heat sink located in the recess and secured to the interlayer material; wherein the heat sink extends the entire length of an upper portion of the recess and directly contacts only the dielectric, thermally conductive interlayer and the housing, characterized in that a portion of the housing lies between said dielectric, thermally conductive interlayer and the second attachment surface of said electrically conductive attachment region, and wherein the thickness of the housing on the side of the second attachment surface is 0.5 mm. - a semiconductor die; - an electrically conductive attachment region having a first attachment surface and a second attachment surface, the first attachment surface arranged for electrical communication with the semiconductor die, said electrically conductive attachment region having a first attachment area and a second attachment area, on opposite sides; - a housing at least in part enclosing the semiconductor die, the electrically conductive attachment region and a top surface of a recess of the housing, the recess disposed on a same side as the second attachment area of the electrically conductive attachment region, wherein the housing comprises a molding compound; - a dielectric, thermally conductive interlayer material located in the recess and secured to the housing, the dielectric, thermally conductive interlayer material is on a top surface of said recess, wherein said dielectric, thermally conductive interlayer material extends the entire length of an upper portion of the recess; and - a metallic plate that is a heat sink located in the recess and secured to the interlayer material;
A method for implementing Low Density Parity Check, LDPC, codes in an IEEE 802.11 standard system configured to operate in a Multiple-Input, Multiple-Output schema, comprising: a) defining an LDPC code being an integer multiple of a base LDPC code having a block length of 192 bits; b) encoding input information bits with the defined LDPC code; c) transmitting the encoded input information bits over a plurality of sub-carriers; and d) transmitting the encoded input information bits on sub-carriers specified by the IEEE 802.11 standard system at an expected phase specified by the IEEE 802.11 standard system, characterised in that the encoded input information bits are transmitted on other sub-carriers other than those specified by the IEEE 802.11 standard system, wherein the encoded input information bits transmitted on the other sub-carriers are transmitted offset in phase from the encoded input information bits transmitted on the specified sub-carriers. a) defining an LDPC code being an integer multiple of a base LDPC code having a block length of 192 bits; b) encoding input information bits with the defined LDPC code; c) transmitting the encoded input information bits over a plurality of sub-carriers; and d) transmitting the encoded input information bits on sub-carriers specified by the IEEE 802.11 standard system at an expected phase specified by the IEEE 802.11 standard system,
Printing apparatus which has a sensor circuit board to differentiate apparatus variants, which sensor circuit board has at least one photoelectric barrier, and with a low-pass to delay an input signal for the photoelectric barrier, which input signal is delivered from an output of a controller; wherein the delay is matched to the respective apparatus variant; wherein the controller has an FPGA which realizes a workflow control in order to establish the occurrence or non-occurrence of a delay of the output signal of the photoelectric barrier of the sensor circuit board after a predetermined duration as of the delivery of the input signal for said photoelectric barrier.
A solid oral pharmaceutical composition comprising an alkali metal and/or an alkaline earth metal diarsenic tetraoxide and a pharmaceutically acceptable excipient.
A thermoelectric system comprising: a first thermoelectric element composing a first plurality of segments in electrical communication with one another; a second thermoelectric element comprising a second plurality of segments in electrical communication with one another; and at least one heat transfer device comprising at least a first portion and a second portion the first portion sandwiched between the first thermoelectric element and the second thermoelectric element the second portion projecting away from the first portion and configured to be in thermal communication with a working medium; wherein the first thermoelectric element has a first thickness along a first direction of current flow through the first thermoelectric element, a first cross-sectional area in a plane generally perpendicular to the first direction, and a first aspect ratio equal to the first cross-sectional area divided by the first thickness, the second thermoelectric element has a second thickness along a second direction of current flow through the second thermoelectric element, a second cross-sectional area in a plane generally perpendicular to the second direction, and a second aspect ratio equal to the second cross-sectional area divided by the second thickness, wherein the second thickness is greater than the first thickness, and the first aspect ratio and the second aspect ratio are selected such that under operating conditions the first thermoelectric element and the second thermoelectric element both operate at optimal efficiency. a first thermoelectric element composing a first plurality of segments in electrical communication with one another; a second thermoelectric element comprising a second plurality of segments in electrical communication with one another; and at least one heat transfer device comprising at least a first portion and a second portion the first portion sandwiched between the first thermoelectric element and the second thermoelectric element the second portion projecting away from the first portion and configured to be in thermal communication with a working medium; wherein the first thermoelectric element has a first thickness along a first direction of current flow through the first thermoelectric element, a first cross-sectional area in a plane generally perpendicular to the first direction, and a first aspect ratio equal to the first cross-sectional area divided by the first thickness, the second thermoelectric element has a second thickness along a second direction of current flow through the second thermoelectric element, a second cross-sectional area in a plane generally perpendicular to the second direction, and a second aspect ratio equal to the second cross-sectional area divided by the second thickness, wherein the second thickness is greater than the first thickness, and the first aspect ratio and the second aspect ratio are selected such that under operating conditions the first thermoelectric element and the second thermoelectric element both operate at optimal efficiency.