An interface architecture between a first digital baseband subassembly, BB, and at least one second radio subassembly, RF, connected by means of a link L, which architecture comprising at least the following elements: • at the digital BB subassembly, • a signal processing, TS, application module, the operation of which is based on the operation of a time H B, said application module, TS, is adapted to generate and/or receive messages MSG(H, data) comprising a time H of implementation and data, the data comprising parameters or IQ samples, which are associated with the operation of the RF subassembly, and works with a generic interface controller, the BB subassembly has a simplified functional and temporal view of the RF subassembly, • at the RF subassembly comprising a digital portion and an analog portion, • an interface controller linked to a module for processing the messages MSG(H, data), said module for processing the messages is adapted to work on the basis of a time H R, and transmitting control signals to the digital portion and the analog portion of the RF subassembly, transmitting and/or receiving messages to/from BB subassembly, • a memory for storing the messages awaiting processing, a table for anticipating messages containing the temporal acquisition values corresponding to each type of message and that are used by the message processing module to implement the message, a module adapted to compare a time H of implementation of a message with a time that is necessary for execution thereof and to provide a signal for triggering the processing of the message for the message processing module generating control signals to said digital portion and to said analog portion, and a time-setting module, • said interface controllers, are adapted to synchronize the time H B of the digital BB subassembly and the time H R of the RF subassembly, • said link L is adapted for conveying the dated messages between the RF subassembly and the BB subassembly. • at the digital BB subassembly, • a signal processing, TS, application module, the operation of which is based on the operation of a time H B, said application module, TS, is adapted to generate and/or receive messages MSG(H, data) comprising a time H of implementation and data, the data comprising parameters or IQ samples, which are associated with the operation of the RF subassembly, and works with a generic interface controller, the BB subassembly has a simplified functional and temporal view of the RF subassembly, • a signal processing, TS, application module, the operation of which is based on the operation of a time H B, said application module, TS, is adapted to generate and/or receive messages MSG(H, data) comprising a time H of implementation and data, the data comprising parameters or IQ samples, which are associated with the operation of the RF subassembly, and works with a generic interface controller, the BB subassembly has a simplified functional and temporal view of the RF subassembly, • at the RF subassembly comprising a digital portion and an analog portion, • an interface controller linked to a module for processing the messages MSG(H, data), said module for processing the messages is adapted to work on the basis of a time H R, and transmitting control signals to the digital portion and the analog portion of the RF subassembly, transmitting and/or receiving messages to/from BB subassembly, • a memory for storing the messages awaiting processing, a table for anticipating messages containing the temporal acquisition values corresponding to each type of message and that are used by the message processing module to implement the message, a module adapted to compare a time H of implementation of a message with a time that is necessary for execution thereof and to provide a signal for triggering the processing of the message for the message processing module generating control signals to said digital portion and to said analog portion, and a time-setting module, • an interface controller linked to a module for processing the messages MSG(H, data), said module for processing the messages is adapted to work on the basis of a time H R, and transmitting control signals to the digital portion and the analog portion of the RF subassembly, transmitting and/or receiving messages to/from BB subassembly, • a memory for storing the messages awaiting processing, a table for anticipating messages containing the temporal acquisition values corresponding to each type of message and that are used by the message processing module to implement the message, a module adapted to compare a time H of implementation of a message with a time that is necessary for execution thereof and to provide a signal for triggering the processing of the message for the message processing module generating control signals to said digital portion and to said analog portion, and a time-setting module, • said interface controllers, are adapted to synchronize the time H B of the digital BB subassembly and the time H R of the RF subassembly, • said link L is adapted for conveying the dated messages between the RF subassembly and the BB subassembly.