A method of making a semiconductor switch device, the method comprising: providing a semiconductor substrate having: a major surface; and a first semiconductor region comprising a doped epitaxial layer having a first conductivity type located adjacent the major surface; depositing a gate dielectric on the major surface of the substrate; implanting ions into the first semiconductor region through an opening in a mask positioned over the first semiconductor region, thereby to form a well region located in the first semiconductor region, the well region having a second conductivity type different to the first conductivity type; depositing and patterning a gate electrode material on the gate dielectric to form a gate electrode located directly above the well region, wherein the gate electrode is located toward one side of the well region when viewed from above the major surface of the semiconductor substrate; and performing ion implantation to: form a source region having said first conductivity type located in the well region on a first side of the gate electrode, and form a drain region having said first conductivity type, wherein the drain region is located outside the well region on a second side of the gate electrode, and wherein the drain region is located adjacent the side of the well region toward which the gate electrode is located. providing a semiconductor substrate having: a major surface; and a first semiconductor region comprising a doped epitaxial layer having a first conductivity type located adjacent the major surface; a major surface; and a first semiconductor region comprising a doped epitaxial layer having a first conductivity type located adjacent the major surface; depositing a gate dielectric on the major surface of the substrate; implanting ions into the first semiconductor region through an opening in a mask positioned over the first semiconductor region, thereby to form a well region located in the first semiconductor region, the well region having a second conductivity type different to the first conductivity type; depositing and patterning a gate electrode material on the gate dielectric to form a gate electrode located directly above the well region, wherein the gate electrode is located toward one side of the well region when viewed from above the major surface of the semiconductor substrate; and performing ion implantation to: form a source region having said first conductivity type located in the well region on a first side of the gate electrode, and form a drain region having said first conductivity type, wherein the drain region is located outside the well region on a second side of the gate electrode, and wherein the drain region is located adjacent the side of the well region toward which the gate electrode is located. form a source region having said first conductivity type located in the well region on a first side of the gate electrode, and form a drain region having said first conductivity type, wherein the drain region is located outside the well region on a second side of the gate electrode, and wherein the drain region is located adjacent the side of the well region toward which the gate electrode is located.