A normally-off high electron mobility transistor, HEMT, comprising: a channel layer including a first nitride semiconductor; a channel supply layer on the channel layer, the channel supply layer including a second nitride semiconductor, the channel supply layer configured to induce a two-dimensional electron gas, 2DEG, in the channel layer; a source electrode and a drain electrode at sides of the channel supply layer; a depletion-forming layer on the channel supply layer, the depletion-forming layer configured to form a depletion region in at least a partial region of the 2DEG, the depletion-forming layer having at least two thicknesses; a gate insulation layer on the depletion-forming layer, wherein the gate insulating layer defines an opening that exposes a portion of the depletion-forming layer; and a gate electrode on the gate insulation layer wherein the gate electrode contacts the depletion-forming layer through the opening, and wherein the depletion-forming layer includes a first part having a first thickness, and the depletion-forming layer includes a second part at a side of the first part and the depletion-forming layer includes a third part at a different side of the first part, and wherein the opening in the gate insulating layer is on the first part of the depletion-forming layer, and the first part of the depletion-forming layer is configured to form the depletion region below the first part; the second part and the third part having second thicknesses, wherein the first thickness is larger than the second thicknesses and wherein the second part and the third part are spaced apart from the source electrode and the drain electrode, respectively, and wherein the bottom surface of the entire depletion-forming layer is planar, wherein the first part of the depletion-forming layer has the largest thickness among all parts of the depletion-forming layer and is formed at the central part of the depletion forming layer, and the remaining parts of the depletion-forming layer have sequentially smaller thicknesses, and an electron density of the 2DEG below the at least one of the second part and the third part of the depletion-forming layer is relatively lower than an electron density of the 2DEG that is not located below the depletion-forming layer, and wherein the gate electrode is on the gate insulation layer above at least a portion of each of the first to third parts of the depletion-forming layer. a channel layer including a first nitride semiconductor; a channel supply layer on the channel layer, the channel supply layer including a second nitride semiconductor, the channel supply layer configured to induce a two-dimensional electron gas, 2DEG, in the channel layer; the channel supply layer including a second nitride semiconductor, the channel supply layer configured to induce a two-dimensional electron gas, 2DEG, in the channel layer; a source electrode and a drain electrode at sides of the channel supply layer; a depletion-forming layer on the channel supply layer, the depletion-forming layer configured to form a depletion region in at least a partial region of the 2DEG, the depletion-forming layer having at least two thicknesses; a gate insulation layer on the depletion-forming layer, wherein the gate insulating layer defines an opening that exposes a portion of the depletion-forming layer; and a gate electrode on the gate insulation layer wherein the gate electrode contacts the depletion-forming layer through the opening, and wherein the depletion-forming layer includes a first part having a first thickness, and the depletion-forming layer includes a second part at a side of the first part and the depletion-forming layer includes a third part at a different side of the first part, and wherein the opening in the gate insulating layer is on the first part of the depletion-forming layer, and the first part of the depletion-forming layer is configured to form the depletion region below the first part; the second part and the third part having second thicknesses, wherein the first thickness is larger than the second thicknesses and wherein the second part and the third part are spaced apart from the source electrode and the drain electrode, respectively, and wherein the bottom surface of the entire depletion-forming layer is planar, wherein the first part of the depletion-forming layer has the largest thickness among all parts of the depletion-forming layer and is formed at the central part of the depletion forming layer, and the remaining parts of the depletion-forming layer have sequentially smaller thicknesses, and an electron density of the 2DEG below the at least one of the second part and the third part of the depletion-forming layer is relatively lower than an electron density of the 2DEG that is not located below the depletion-forming layer, and wherein the gate electrode is on the gate insulation layer above at least a portion of each of the first to third parts of the depletion-forming layer.