A phase-locked loop circuit, comprising: a voltage-controlled oscillator, VCO, for providing a VCO output signal; an N-divider having an input for receiving the VCO output signal and further having an output for providing an N-divided output signal; a first input for receiving a signal oscillating at a reference frequency; a second input for receiving the N-divided output signal from the N-divider; a phase detector and charge-pump circuit arranged for comparing a phase of the signal at the first input and a phase of the signal at the second input; a loop filter (204,200) arranged between the phase detector and charge-pump circuit and the VCO,; characterized in that the loop filter comprises an integrator, a buffer circuit (213,313,300), and a filter circuit and is configured to provide a tuning voltage, the buffer circuit being connected between the integrator and the filter circuit, the buffer circuit being arranged for receiving an output signal from the integrator and for isolating the integrator from an input impedance of the filter circuit, and the buffer circuit having a P-type source follower configured to provide a plus level shift signal adapted to shift up the voltage level at the input of the VCO from the voltage level at the output of the integrator, an N-type source follower configured to provide a minus level shift signal adapted to shift down the voltage level at the input of the VCO from the voltage level at the output of the integrator, and a multiplexer for selecting either the plus level shift signal or a minus level shift signal, dependent upon the direction of the required voltage shift, and in that the VCO is arranged in series with the loop filter and the N-divider, and the VCO is configured to receive the tuning voltage from the loop filter. a voltage-controlled oscillator, VCO, for providing a VCO output signal; an N-divider having an input for receiving the VCO output signal and further having an output for providing an N-divided output signal; a first input for receiving a signal oscillating at a reference frequency; a second input for receiving the N-divided output signal from the N-divider; a phase detector and charge-pump circuit arranged for comparing a phase of the signal at the first input and a phase of the signal at the second input; a loop filter (204,200) arranged between the phase detector and charge-pump circuit and the VCO,; characterized in that the loop filter comprises an integrator, a buffer circuit (213,313,300), and a filter circuit and is configured to provide a tuning voltage, the buffer circuit being connected between the integrator and the filter circuit, the buffer circuit being arranged for receiving an output signal from the integrator and for isolating the integrator from an input impedance of the filter circuit, and the buffer circuit having a P-type source follower configured to provide a plus level shift signal adapted to shift up the voltage level at the input of the VCO from the voltage level at the output of the integrator, an N-type source follower configured to provide a minus level shift signal adapted to shift down the voltage level at the input of the VCO from the voltage level at the output of the integrator, and a multiplexer for selecting either the plus level shift signal or a minus level shift signal, dependent upon the direction of the required voltage shift, and in that the VCO is arranged in series with the loop filter and the N-divider, and the VCO is configured to receive the tuning voltage from the loop filter.