An apparatus, comprising: a processing unit configured to run an operating system, wherein the operating system is a memory management hypervisor operating system, wherein the MMH operating system provides memory management threads configured to manage the memory, wherein the MMH operating system is configured to support a guest operating system run on the processing unit; a memory coupled to the processing unit, the memory configured to communicate with the processing unit via a memory bus, wherein the memory includes a first memory controller and at least one of non-volatile memory or volatile memory, wherein the at least one of the non-volatile memory or the volatile memory is a multi-channel memory, wherein the first memory controller is configured to access the at least one of a volatile memory or a non-volatile memory; and an adaptive memory controller configured to receive monitored statistical data from the first memory controller and from the processing unit, wherein the adaptive memory controller is configured to manage the memory based on the monitored statistical data, wherein the adaptive memory controller comprises a memory management processor configured to run the MMT, wherein the MMP running the MMT is configured to manage the memory based on the monitored statistical data, wherein the monitored statistical data includes statistical data from the processing unit, wherein the MMP running the MMT being configured to manage the memory is configured to at least one of: change a frequency of a portion of the at least one of the non-volatile memory or the volatile memory; change a refresh period of a portion of the volatile memory; perform a memory scrub of a portion of the at least one of the non-volatile memory or the volatile memory; or change a multi-level cell mode of a portion of the at least one of the non-volatile memory or the volatile memory. a processing unit configured to run an operating system, wherein the operating system is a memory management hypervisor operating system, wherein the MMH operating system provides memory management threads configured to manage the memory, wherein the MMH operating system is configured to support a guest operating system run on the processing unit; a memory coupled to the processing unit, the memory configured to communicate with the processing unit via a memory bus, wherein the memory includes a first memory controller and at least one of non-volatile memory or volatile memory, wherein the at least one of the non-volatile memory or the volatile memory is a multi-channel memory, wherein the first memory controller is configured to access the at least one of a volatile memory or a non-volatile memory; and an adaptive memory controller configured to receive monitored statistical data from the first memory controller and from the processing unit, wherein the adaptive memory controller is configured to manage the memory based on the monitored statistical data, wherein the adaptive memory controller comprises a memory management processor configured to run the MMT, wherein the MMP running the MMT is configured to manage the memory based on the monitored statistical data, wherein the monitored statistical data includes statistical data from the processing unit, wherein the MMP running the MMT being configured to manage the memory is configured to at least one of: change a frequency of a portion of the at least one of the non-volatile memory or the volatile memory; change a refresh period of a portion of the volatile memory; perform a memory scrub of a portion of the at least one of the non-volatile memory or the volatile memory; or change a multi-level cell mode of a portion of the at least one of the non-volatile memory or the volatile memory. change a frequency of a portion of the at least one of the non-volatile memory or the volatile memory; change a refresh period of a portion of the volatile memory; perform a memory scrub of a portion of the at least one of the non-volatile memory or the volatile memory; or change a multi-level cell mode of a portion of the at least one of the non-volatile memory or the volatile memory.