A signal generator having: a nominal frequency control input, and a modulation frequency control input and comprising: an oscillator, with: a first set of capacitors (136, 138, 140) at least partially switchably connectable for adjusting a frequency of said oscillator as part of a phase-locked loop, PLL, comprised in said signal generator and as set by said nominal frequency control input, and a second set of capacitors comprised in a modulation, MOD, stage of said oscillator, switchably connectable for modulating said frequency and controlled by said modulation frequency control input; a modulation gain estimation stage configured to determine, derived from said modulation frequency control input and a state of said PLL, a frequency-to-capacitor modulation gain; said signal generator being characterised in that it further comprises a modulation range reduction module connected between said modulation frequency control input and said modulation stage and configured for: clipping a modulation range of said oscillator to a range achievable using said second set of capacitors, using said modulation gain; averaging out, in time, a phase error caused by said clipping; and mimicking said clipping, additively output to said nominal frequency control input to compensate said PLL for said modulation including the effect of said clipping. a nominal frequency control input, and a modulation frequency control input an oscillator, with: a first set of capacitors (136, 138, 140) at least partially switchably connectable for adjusting a frequency of said oscillator as part of a phase-locked loop, PLL, comprised in said signal generator and as set by said nominal frequency control input, and a second set of capacitors comprised in a modulation, MOD, stage of said oscillator, switchably connectable for modulating said frequency and controlled by said modulation frequency control input; a first set of capacitors (136, 138, 140) at least partially switchably connectable for adjusting a frequency of said oscillator as part of a phase-locked loop, PLL, comprised in said signal generator and as set by said nominal frequency control input, and a second set of capacitors comprised in a modulation, MOD, stage of said oscillator, switchably connectable for modulating said frequency and controlled by said modulation frequency control input; a modulation gain estimation stage configured to determine, derived from said modulation frequency control input and a state of said PLL, a frequency-to-capacitor modulation gain; said signal generator being characterised in that it further comprises a modulation range reduction module connected between said modulation frequency control input and said modulation stage and configured for: clipping a modulation range of said oscillator to a range achievable using said second set of capacitors, using said modulation gain; averaging out, in time, a phase error caused by said clipping; and mimicking said clipping, additively output to said nominal frequency control input to compensate said PLL for said modulation including the effect of said clipping. clipping a modulation range of said oscillator to a range achievable using said second set of capacitors, using said modulation gain; averaging out, in time, a phase error caused by said clipping; and mimicking said clipping, additively output to said nominal frequency control input to compensate said PLL for said modulation including the effect of said clipping.