A network node of a synchronous network, comprising: - a timing circuit which recovers a reference clock from a reception signal received by said network node from an upstream network node of said synchronous network and uses the recovered reference clock for a transmission signal transmitted by said network node to a downstream network node of said synchronous network; and - a clock stability monitoring circuit which monitors internal control parameters of said timing circuit to detect an instability of the reference clock distributed within said synchronous network, the network node of a synchronous network characterised in that: the timing circuit comprises a first-in-first-out FIFO register in which dummy data is written with a frequency of the recovered reference clock and from which said dummy data is read with a rate of an outgoing transmission clock to detect a reference clock instability by monitoring at least one flag signal of said register, wherein said at least one flag signal is the fill level of the first-in first-out register, and said internal control parameters are based on said at least one flag; the network node further comprising: a clock stability monitoring circuit and a network management system, wherein said clock stability monitoring circuit monitors internal control parameters of said timing circuit in the time domain and/or in the frequency domain; and wherein the network management system analyses a read out regarding internal control parameters of the network node to identify a faulty entity within the network node causing reference clock instability in said synchronous network. - a timing circuit which recovers a reference clock from a reception signal received by said network node from an upstream network node of said synchronous network and uses the recovered reference clock for a transmission signal transmitted by said network node to a downstream network node of said synchronous network; and - a clock stability monitoring circuit which monitors internal control parameters of said timing circuit to detect an instability of the reference clock distributed within said synchronous network, the timing circuit comprises a first-in-first-out FIFO register in which dummy data is written with a frequency of the recovered reference clock and from which said dummy data is read with a rate of an outgoing transmission clock to detect a reference clock instability by monitoring at least one flag signal of said register, wherein said at least one flag signal is the fill level of the first-in first-out register, and said internal control parameters are based on said at least one flag; the network node further comprising: a clock stability monitoring circuit and a network management system, wherein said clock stability monitoring circuit monitors internal control parameters of said timing circuit in the time domain and/or in the frequency domain; and wherein the network management system analyses a read out regarding internal control parameters of the network node to identify a faulty entity within the network node causing reference clock instability in said synchronous network. a clock stability monitoring circuit and a network management system, wherein said clock stability monitoring circuit monitors internal control parameters of said timing circuit in the time domain and/or in the frequency domain; and wherein the network management system analyses a read out regarding internal control parameters of the network node to identify a faulty entity within the network node causing reference clock instability in said synchronous network.