A power semiconductor module arrangement comprises, a substrate comprising a dielectric insulation layer and a first metallization layer arranged on a first side of the dielectric insulation layer, wherein the first metallization layer comprises a plurality of different sections that are separate and distinct from each other; a plurality of semiconductor bodies arranged on the first metallization layer; and a connection clip, the connection clip comprising a layer of an electrically conducting material having a thickness in a vertical direction (y) that is significantly smaller than its length in a first horizontal direction (x) and its width in a second horizontal direction (z), wherein a first electrode of each of the plurality of semiconductor bodies is electrically coupled to a first section (111 1) of the first metallization layer, a second electrode of each of the plurality of semiconductor bodies is electrically coupled to a second section (111 2) of the first metallization layer, a third electrode of each of the plurality of semiconductor bodies is electrically coupled to an additional metallization layer (111 A) by means of one or more electrical connection elements, the additional metallization layer (111 A) is arranged distant from and in parallel to the first metallization layer, the additional metallization layer (111 A) is arranged on an additional dielectric insulation layer (11 A), wherein the additional dielectric insulation layer (11 A) is arranged in parallel to and distant from the dielectric insulation layer, and wherein the additional dielectric insulation layer (11 A) is arranged between the additional metallization layer (111 A) and the first metallization layer, the second electrode of each of the plurality of semiconductor bodies is electrically coupled to the second section (111 2) of the first metallization layer by means of the connection clip, and the additional dielectric insulation layer (11 A) is coupled to the connection clip by means of a second connection layer, wherein the connection clip is arranged between the additional dielectric insulation layer (11 A) and the second section (111 2) of the first metallization layer. a substrate comprising a dielectric insulation layer and a first metallization layer arranged on a first side of the dielectric insulation layer, wherein the first metallization layer comprises a plurality of different sections that are separate and distinct from each other; a plurality of semiconductor bodies arranged on the first metallization layer; and a connection clip, the connection clip comprising a layer of an electrically conducting material having a thickness in a vertical direction (y) that is significantly smaller than its length in a first horizontal direction (x) and its width in a second horizontal direction (z), wherein a first electrode of each of the plurality of semiconductor bodies is electrically coupled to a first section (111 1) of the first metallization layer, a second electrode of each of the plurality of semiconductor bodies is electrically coupled to a second section (111 2) of the first metallization layer, a third electrode of each of the plurality of semiconductor bodies is electrically coupled to an additional metallization layer (111 A) by means of one or more electrical connection elements, the additional metallization layer (111 A) is arranged distant from and in parallel to the first metallization layer, the additional metallization layer (111 A) is arranged on an additional dielectric insulation layer (11 A), wherein the additional dielectric insulation layer (11 A) is arranged in parallel to and distant from the dielectric insulation layer, and wherein the additional dielectric insulation layer (11 A) is arranged between the additional metallization layer (111 A) and the first metallization layer, the second electrode of each of the plurality of semiconductor bodies is electrically coupled to the second section (111 2) of the first metallization layer by means of the connection clip, and the additional dielectric insulation layer (11 A) is coupled to the connection clip by means of a second connection layer, wherein the connection clip is arranged between the additional dielectric insulation layer (11 A) and the second section (111 2) of the first metallization layer.