A liquid crystal display panel, comprising: a plurality of data lines (Dn, Dn+1, Dn+2, Dn+3, Dn+4, Dn+5), a plurality of scan lines (Gn, Gn+1, Gn+2, Gn+3), and a plurality of pixel sets comprising a first pixel unit and a second pixel unit; rows of pixel units are arranged with corresponding scan lines (Gn, Gn+1, Gn+2, Gn+3), columns of pixels units are arranged with corresponding data lines (Dn, Dn+1, Dn+2, Dn+3, Dn+4, Dn+5); the first pixel unit comprises a first thin film transistor, a first charging capacitor, a second charging capacitor, a first storage capacitor and a first liquid crystal capacitor; a gate of the first thin film transistor is connected to a first scan line (Gn, Gn+1, Gn+2, Gn+3), and a source of the first thin film transistor is connected to a corresponding data line (Dn, Dn+1, Dn+2, Dn+3, Dn+4, Dn+5); the first charging capacitor is connected between a drain of the first thin film transistor, and one side of the second charging capacitor; the other side of the second charging capacitor is connected to an electrode providing a common voltage; one side of the first storage capacitor and the first liquid crystal capacitor is connected to the drain of the first thin film transistor, the other side of the first storage capacitor is connected to a common electrode on one side of an array substrate, the other side of the first liquid crystal capacitor is connected to a common electrode on one side of a color film substrate; the second pixel unit comprises a second thin film transistor, a second storage capacitor and a second liquid crystal capacitor; a source of the second thin film transistor is connected to the corresponding data line (Dn, Dn+1, Dn+2, Dn+3, Dn+4, Dn+5); a drain of the second thin film transistor is connected to a node between the first charging capacitor and the second charging capacitor; one side of the second storage capacitor and the second liquid crystal capacitor is connected to the drain of the second thin film transistor, the other side of the second storage capacitor is connected to the common electrode on one side of the array substrate, the other side of the second liquid crystal capacitor is connected to the common electrode on one side of the color film substrate; a gate of the second thin film transistor is connected to a second scan line (Gn, Gn+1, Gn+2, Gn+3) adjacent to the first scan line (Gn, Gn+1, Gn+2, Gn+3); characterized in that the first pixel unit and the second pixel unit are arranged alternately within a same column, the first pixel unit of a given pixel set is disposed on an nth row and a (2k-1)th column and the second pixel unit of said given pixel set is disposed on an (n+1)th row and a (2k-1)th column; the first pixel unit of another pixel set adjacent to said given pixel set in the row direction is disposed on an (n+1)th row and a th column and the second pixel unit of said another pixel set is disposed on an nth row and a th column, where the liquid crystal display panel comprises N rows of pixel units, where 0<n<N, N≥2, k≥1. the first pixel unit comprises a first thin film transistor, a first charging capacitor, a second charging capacitor, a first storage capacitor and a first liquid crystal capacitor; a gate of the first thin film transistor is connected to a first scan line (Gn, Gn+1, Gn+2, Gn+3), and a source of the first thin film transistor is connected to a corresponding data line (Dn, Dn+1, Dn+2, Dn+3, Dn+4, Dn+5); the first charging capacitor is connected between a drain of the first thin film transistor, and one side of the second charging capacitor; the other side of the second charging capacitor is connected to an electrode providing a common voltage; one side of the first storage capacitor and the first liquid crystal capacitor is connected to the drain of the first thin film transistor, the other side of the first storage capacitor is connected to a common electrode on one side of an array substrate, the other side of the first liquid crystal capacitor is connected to a common electrode on one side of a color film substrate; the second pixel unit comprises a second thin film transistor, a second storage capacitor and a second liquid crystal capacitor; a source of the second thin film transistor is connected to the corresponding data line (Dn, Dn+1, Dn+2, Dn+3, Dn+4, Dn+5); a drain of the second thin film transistor is connected to a node between the first charging capacitor and the second charging capacitor; one side of the second storage capacitor and the second liquid crystal capacitor is connected to the drain of the second thin film transistor, the other side of the second storage capacitor is connected to the common electrode on one side of the array substrate, the other side of the second liquid crystal capacitor is connected to the common electrode on one side of the color film substrate; a gate of the second thin film transistor is connected to a second scan line (Gn, Gn+1, Gn+2, Gn+3) adjacent to the first scan line (Gn, Gn+1, Gn+2, Gn+3); characterized in that the first pixel unit and the second pixel unit are arranged alternately within a same column, the first pixel unit of a given pixel set is disposed on an nth row and a (2k-1)th column and the second pixel unit of said given pixel set is disposed on an (n+1)th row and a (2k-1)th column; the first pixel unit of another pixel set adjacent to said given pixel set in the row direction is disposed on an (n+1)th row and a th column and the second pixel unit of said another pixel set is disposed on an nth row and a th column, where the liquid crystal display panel comprises N rows of pixel units, where 0<n<N, N≥2, k≥1.