An amplification apparatus for generating two constant amplitude signals from an input signal by vector decomposition and amplifying the two constant amplitude signals, the apparatus comprising: a first amplification section (1a; 36a) configured to amplify a first signal obtained by the vector decomposition; a second amplification section (1b; 36b) configured to amplify a second signal obtained by the vector decomposition; an impedance inverting circuit (2; 38; 91; 131; 161) consisting of a transmission line having a characteristic impedance and a length; and a combining circuit (3; 39; 70; 100; 120; 140) configured to correct a phase of the first signal amplified by the first amplification section (1a; 36a) and a phase of the second signal which is adjusted by the impedance inverting circuit (2; 38; 91; 131; 161) and to combine and output the first signal and the second signal, wherein: the combining circuit (3; 39; 70; 100; 120; 140) comprises lines (3a to 3d; 61 to 64; 73 to 74; 101 to 104; 121 to 124; 141 to 144) having a tetragon arrangement, each said line being defined by a corresponding characteristic impedance and length; the amplification apparatus comprises asymmetrical circuit elements (3b and 3c; 62 and 63), which can be included in the combining circuit or being the impedance inverting circuit (2; 38; 91; 131; 161), or being inserted between the first amplification section or the second amplification section and the combining circuit; and the combining circuit (3; 39; 70; 100; 120; 140) includes: a first said line (3a; 61) and a second said line (3b; 62) coupled in parallel to output sides of the first amplification section (1a; 36a) and the second amplification section (1b; 36b); and a third said line (3c; 63) and a fourth said line (3d; 64) coupled in series between the first line (3a; 61) and the second line (3b; 62), wherein, if two of the lines included in the combining circuit form the asymmetrical circuit elements: the first line (3a; 61) has a length of λ/4, the fourth line (3d; 64) has a length of λ/4; and the second line (3b; 62) and the third line (3c; 63) are the asymmetrical circuit elements, at least one of the second line (3b; 62) and the third line (3c; 63) having a length different to λ/4; wherein the impedance inverting circuit (2; 38; 91; 131; 161) having a length different to λ/4 if it is an asymmetrical circuit element, or having a length of λ/4 if otherwise. a first amplification section (1a; 36a) configured to amplify a first signal obtained by the vector decomposition; a second amplification section (1b; 36b) configured to amplify a second signal obtained by the vector decomposition; an impedance inverting circuit (2; 38; 91; 131; 161) consisting of a transmission line having a characteristic impedance and a length; and a combining circuit (3; 39; 70; 100; 120; 140) configured to correct a phase of the first signal amplified by the first amplification section (1a; 36a) and a phase of the second signal which is adjusted by the impedance inverting circuit (2; 38; 91; 131; 161) and to combine and output the first signal and the second signal, the combining circuit (3; 39; 70; 100; 120; 140) comprises lines (3a to 3d; 61 to 64; 73 to 74; 101 to 104; 121 to 124; 141 to 144) having a tetragon arrangement, each said line being defined by a corresponding characteristic impedance and length; the amplification apparatus comprises asymmetrical circuit elements (3b and 3c; 62 and 63), which can be included in the combining circuit or being the impedance inverting circuit (2; 38; 91; 131; 161), or being inserted between the first amplification section or the second amplification section and the combining circuit; and the combining circuit (3; 39; 70; 100; 120; 140) includes: a first said line (3a; 61) and a second said line (3b; 62) coupled in parallel to output sides of the first amplification section (1a; 36a) and the second amplification section (1b; 36b); and a third said line (3c; 63) and a fourth said line (3d; 64) coupled in series between the first line (3a; 61) and the second line (3b; 62), a first said line (3a; 61) and a second said line (3b; 62) coupled in parallel to output sides of the first amplification section (1a; 36a) and the second amplification section (1b; 36b); and a third said line (3c; 63) and a fourth said line (3d; 64) coupled in series between the first line (3a; 61) and the second line (3b; 62), wherein, if two of the lines included in the combining circuit form the asymmetrical circuit elements: the first line (3a; 61) has a length of λ/4, the fourth line (3d; 64) has a length of λ/4; and the second line (3b; 62) and the third line (3c; 63) are the asymmetrical circuit elements, at least one of the second line (3b; 62) and the third line (3c; 63) having a length different to λ/4; wherein the impedance inverting circuit (2; 38; 91; 131; 161) having a length different to λ/4 if it is an asymmetrical circuit element, or having a length of λ/4 if otherwise. the first line (3a; 61) has a length of λ/4, the fourth line (3d; 64) has a length of λ/4; and the second line (3b; 62) and the third line (3c; 63) are the asymmetrical circuit elements, at least one of the second line (3b; 62) and the third line (3c; 63) having a length different to λ/4; wherein the impedance inverting circuit (2; 38; 91; 131; 161) having a length different to λ/4 if it is an asymmetrical circuit element, or having a length of λ/4 if otherwise.