A semiconductor chip testing system provided with a semiconductor chip and an on-chip monitor circuit that is mounted on said semiconductor chip, wherein said semiconductor chip is provided with a security function module configured to perform a security function process on an input signal and output a security function signal, the on-chip monitor circuit being provided with a monitor circuit configured to monitor a signal waveform of the substrate potential of said semiconductor chip or the power potential of said security function module, wherein the on-chip monitor circuit is configured to be controlled during a time period and the on-chip monitor circuit is provided with: a test signal generation means configured for generating a test signal and outputting this to the semiconductor chip such that a time period of side-channel information leakage from the security function module falls within said time period of the on-chip monitor circuit, and a judgment means configured to judge a security score by quantifying information leakage from the security function module on the basis of said signal waveform; wherein the semiconductor chip testing system is characterised in that the on-chip monitor circuit further comprises: a first storage means configured to store data that designates a time window corresponding to the period of time during which there is the most side-channel information leakage in said security function module, and a control means configured to perform control on said on-chip monitor such that when said test signal is input by the semiconductor chip said on-chip monitor circuit monitors said semiconductor chip during said time window in which there is the most side-channel information leakage in said security function module. a security function process on an input signal and output a security function signal, the on-chip monitor circuit being provided with a monitor circuit configured to monitor a signal waveform of the substrate potential of said semiconductor chip or the power potential of said security function module, wherein the on-chip monitor circuit is configured to be controlled during a time period and the on-chip monitor circuit is provided with: a test signal generation means configured for generating a test signal and outputting this to the semiconductor chip such that a time period of side-channel information leakage from the security function module falls within said time period of the on-chip monitor circuit, and a judgment means configured to judge a security score by quantifying information leakage from the security function module on the basis of said signal waveform; wherein the semiconductor chip testing system is characterised in that the on-chip monitor circuit further comprises: a first storage means configured to store data that designates a time window corresponding to the period of time during which there is the most side-channel information leakage in said security function module, and a control means configured to perform control on said on-chip monitor such that when said test signal is input by the semiconductor chip said on-chip monitor circuit monitors said semiconductor chip during said time window in which there is the most side-channel information leakage in said security function module. a test signal generation means configured for generating a test signal and outputting this to the semiconductor chip such that a time period of side-channel information leakage from the security function module falls within said time period of the on-chip monitor circuit, and a judgment means configured to judge a security score by quantifying information leakage from the security function module on the basis of said signal waveform; wherein the semiconductor chip testing system is characterised in that the on-chip monitor circuit further comprises: a first storage means configured to store data that designates a time window corresponding to the period of time during which there is the most side-channel information leakage in said security function module, and a control means configured to perform control on said on-chip monitor such that when said test signal is input by the semiconductor chip said on-chip monitor circuit monitors said semiconductor chip during said time window in which there is the most side-channel information leakage in said security function module. a first storage means configured to store data that designates a time window corresponding to the period of time during which there is the most side-channel information leakage in said security function module, and a control means configured to perform control on said on-chip monitor such that when said test signal is input by the semiconductor chip said on-chip monitor circuit monitors said semiconductor chip during said time window in which there is the most side-channel information leakage in said security function module.