Interface unit comprising an input adapted to receive an input current having an input voltage (V IN), from an electrochemical measuring probe for use in contact with a process material, the electrochemical measuring probe comprising an electrode provided with a sensing element arranged so as to generate a sensor voltage (V SENSOR), the electrode voltage being related to at least one property of the process material when the electrode is in contact with the process material; the interface unit further comprises an output adapted to be coupled to the input of an evaluating device; the interface unit being arranged to deliver, on the output, an output current having an output voltage (V OUT) sensibly equal to the input voltage (V IN), characterized in that the interfacing unit comprises: • a first transistor provided with a first insulated gate terminal coupled to the input, a first source terminal coupled to a first terminal of a first resistor, and a first drain terminal coupled to a first terminal of a second resistor; the second terminal of the second resistor being coupled to a point where a constant voltage (Vc) is maintained to a constant value; the first transistor being arranged to generate in the second resistor a second resistor voltage (V R2), according to the input voltage (V IN); • a first operational amplifier provided with a first non-inverting input coupled to a point of the circuit where a reference voltage (V ref) is maintained to a constant value; with a first inverting input coupled to the first drain terminal of the first transistor; and with a first output coupled to a second terminal of the first resistor; • a second transistor provided with a second source terminal coupled to a second terminal of a third resistor, and a second drain terminal coupled to a first terminal of a fourth resistor; a first terminal of the third resistor being coupled to the second terminal of the first resistor; the second terminal of the fourth resistor being coupled to a point where the constant voltage (Vc) is maintained; • a second operational amplifier provided with a second non-inverting input coupled to the second drain terminal of the second transistor; and, with an a second inverting input coupled to the first inverting input of the first operational amplifier; and, with a second output coupled a second insulated gate terminal of the second transistor and to the output of the interface unit; the first operational amplifier being arranged to provide a variable tension to the first source terminal of the first transistor, according to the comparison between the reference voltage (V ref) and the second resistor voltage (V R2), in order to control the operating point of the first transistor. • a first transistor provided with a first insulated gate terminal coupled to the input, a first source terminal coupled to a first terminal of a first resistor, and a first drain terminal coupled to a first terminal of a second resistor; the second terminal of the second resistor being coupled to a point where a constant voltage (Vc) is maintained to a constant value; the first transistor being arranged to generate in the second resistor a second resistor voltage (V R2), according to the input voltage (V IN); • a first operational amplifier provided with a first non-inverting input coupled to a point of the circuit where a reference voltage (V ref) is maintained to a constant value; with a first inverting input coupled to the first drain terminal of the first transistor; and with a first output coupled to a second terminal of the first resistor; • a second transistor provided with a second source terminal coupled to a second terminal of a third resistor, and a second drain terminal coupled to a first terminal of a fourth resistor; a first terminal of the third resistor being coupled to the second terminal of the first resistor; the second terminal of the fourth resistor being coupled to a point where the constant voltage (Vc) is maintained; • a second operational amplifier provided with a second non-inverting input coupled to the second drain terminal of the second transistor; and, with an a second inverting input coupled to the first inverting input of the first operational amplifier; and, with a second output coupled a second insulated gate terminal of the second transistor and to the output of the interface unit;