A translation-lookaside buffer, TLB, comprising: a plurality of entries, wherein each entry of the plurality of entries is configured to hold an address translation and a valid bit vector (302, 304), wherein each bit of the valid bit vector (302, 304) indicates, for a respective address translation context, the address translation is valid if set and invalid if clear; and an invalidation bit vector (232, 234) having bits corresponding to the bits of the valid bit vector (302, 304) of the plurality of entries, wherein a set bit of the invalidation bit vector (232, 234) indicates to simultaneously clear the corresponding bit of the valid bit vector (302, 304) of each entry of the plurality of entries; wherein the valid bit vector (302, 304) comprises global and local portions and the invalidation bit vector (232, 234) comprises global and local portions corresponding to the global and local portions of the valid bit vector (302, 304), respectively, wherein the global and local portions are mutually exclusive, wherein the address translation is a valid local address translation when one or more bits of the local portion of the valid bit vector (302, 304) is set, the local address translation being an address translation in which a single address translation context is used to translate the address to be translated into the translated address, and wherein the address translation is a valid global address translation when one or more bits of the global portion of the valid bit vector (302, 304) is set, the global address translation being an address translation in which multiple address translation contexts are used to translate the address to be translated into the translated address. a plurality of entries, wherein each entry of the plurality of entries is configured to hold an address translation and a valid bit vector (302, 304), wherein each bit of the valid bit vector (302, 304) indicates, for a respective address translation context, the address translation is valid if set and invalid if clear; and an invalidation bit vector (232, 234) having bits corresponding to the bits of the valid bit vector (302, 304) of the plurality of entries, wherein a set bit of the invalidation bit vector (232, 234) indicates to simultaneously clear the corresponding bit of the valid bit vector (302, 304) of each entry of the plurality of entries; wherein the valid bit vector (302, 304) comprises global and local portions and the invalidation bit vector (232, 234) comprises global and local portions corresponding to the global and local portions of the valid bit vector (302, 304), respectively, wherein the global and local portions are mutually exclusive, wherein the address translation is a valid local address translation when one or more bits of the local portion of the valid bit vector (302, 304) is set, the local address translation being an address translation in which a single address translation context is used to translate the address to be translated into the translated address, and wherein the address translation is a valid global address translation when one or more bits of the global portion of the valid bit vector (302, 304) is set, the global address translation being an address translation in which multiple address translation contexts are used to translate the address to be translated into the translated address.