A power supply controller, comprising: a signal separator circuit coupled to generate a feedback signal in response to a sense signal representative of an output of a power supply; an error signal generator coupled to generate an error signal in response to the feedback signal and a reference signal; and a control circuit coupled to generate a drive signal in response to the error signal and a current sense signal, wherein the drive signal is coupled to control switching of a switch of the power supply, wherein the current sense signal is representative of a current through the switch; an oscillator (162; 316) included in the control circuit configured to provide a clock signal that establishes a switching frequency and marks switching periods for the power supply; characterized by a minimum-sum multi-cycle modulation circuit included in the control circuit and coupled to generate a skip signal in response to a start skip signal, a stop skip signal and a skip mask signal, wherein the skip mask signal is generated in response to the skip signal, wherein the start skip signal is coupled to cause the drive signal to start skipping on-time intervals of cycles, wherein the stop skip signal is coupled to cause the drive signal to stop skipping the on-time intervals of cycles, and wherein the skip mask signal is coupled to mask a start skip signal for K consecutive clock cycles of the oscillator (162; 316) to restrict a number of skipped periods such that a sum of the number of skipped switching periods M in a group where switching is prevented plus the number of switching periods N in the following group where switching is allowed is equal to or greater than K. a signal separator circuit coupled to generate a feedback signal in response to a sense signal representative of an output of a power supply; an error signal generator coupled to generate an error signal in response to the feedback signal and a reference signal; and a control circuit coupled to generate a drive signal in response to the error signal and a current sense signal, wherein the drive signal is coupled to control switching of a switch of the power supply, wherein the current sense signal is representative of a current through the switch; an oscillator (162; 316) included in the control circuit configured to provide a clock signal that establishes a switching frequency and marks switching periods for the power supply; characterized by a minimum-sum multi-cycle modulation circuit included in the control circuit and coupled to generate a skip signal in response to a start skip signal, a stop skip signal and a skip mask signal, wherein the skip mask signal is generated in response to the skip signal, wherein the start skip signal is coupled to cause the drive signal to start skipping on-time intervals of cycles, wherein the stop skip signal is coupled to cause the drive signal to stop skipping the on-time intervals of cycles, and wherein the skip mask signal is coupled to mask a start skip signal for K consecutive clock cycles of the oscillator (162; 316) to restrict a number of skipped periods such that a sum of the number of skipped switching periods M in a group where switching is prevented plus the number of switching periods N in the following group where switching is allowed is equal to or greater than K.