A field effect transistor comprising: a lower barrier layer which is placed on a substrate and which is made of Al x Ga 1-x N; a channel layer which is placed on a surface of the lower barrier layer that is opposite to the substrate and which is made of GaN; an upper barrier layer which is placed on a surface of the channel layer that is opposite to the lower barrier layer and which is made of Al y Ga 1-y N having an Al composition proportion exceeding the Al composition proportion of the lower barrier layer; a source electrode and drain electrode which are placed on a surface of the upper barrier layer that is opposite to the channel layer; an insulating layer placed on a region of the upper barrier layer, the region being in the surface of the upper barrier layer that is provided with the source electrode and the drain electrode, the region excluding a region provided with the source electrode and the drain electrode; and a gate electrode placed through the insulating layer; wherein a region directly under the gate electrode has a recessed structure in which the insulating layer extends through the upper barrier layer to the channel layer; wherein at least one portion of GaN making up the channel layer is negatively doped; characterized in that the channel layer includes a first channel sub-layer located on the upper barrier layer side and a second channel sub-layer located on the lower barrier layer side, the n-type doping concentration of the first channel sub-layer is less than the n-type doping concentration of the second channel sub-layer, and the insulating layer is placed so as not to reach the second channel sub-layer. a lower barrier layer which is placed on a substrate and which is made of Al x Ga 1-x N; a channel layer which is placed on a surface of the lower barrier layer that is opposite to the substrate and which is made of GaN; an upper barrier layer which is placed on a surface of the channel layer that is opposite to the lower barrier layer and which is made of Al y Ga 1-y N having an Al composition proportion exceeding the Al composition proportion of the lower barrier layer; a source electrode and drain electrode which are placed on a surface of the upper barrier layer that is opposite to the channel layer; an insulating layer placed on a region of the upper barrier layer, the region being in the surface of the upper barrier layer that is provided with the source electrode and the drain electrode, the region excluding a region provided with the source electrode and the drain electrode; and a gate electrode placed through the insulating layer; wherein a region directly under the gate electrode has a recessed structure in which the insulating layer extends through the upper barrier layer to the channel layer; wherein at least one portion of GaN making up the channel layer is negatively doped; characterized in that the channel layer includes a first channel sub-layer located on the upper barrier layer side and a second channel sub-layer located on the lower barrier layer side, the n-type doping concentration of the first channel sub-layer is less than the n-type doping concentration of the second channel sub-layer, and the insulating layer is placed so as not to reach the second channel sub-layer.