An apparatus (100, 200) for determining an offset calibration value and a gain calibration value of an analog-to-digital converter, ADC (101, 201), the apparatus configured to receive a first reference signal (102, 202) and a second reference signal (103, 203) and, based on the first reference signal and the second reference signal, apply to the ADC, over four separate signal application periods (516A, 516B, 516C, 516D), the following: over a first signal application period, a first ADC input signal comprising the first reference signal; over a second signal application period, a second ADC input signal, the second ADC input signal having a substantially equal magnitude and an inverse polarity to the first ADC input signal; over a third signal application period, a third ADC input signal comprising the second reference signal; and over a fourth signal application period, a fourth ADC input signal, the fourth ADC input signal having a substantially equal magnitude and an inverse polarity to the third ADC input signal, the apparatus configured to determine the one or more calibration values based, at least in part, on an ADC output signal of the ADC over the four signal application periods, wherein: (i) the offset calibration value is calculated based on a sum of the ADC output signal over at least the four signal application periods; and (ii) the gain calibration value is calculated based on a sum of: (a) a signal comprising one of the ADC output signal over the first signal application period and the ADC output signal over the second signal application period and a signal having a substantially equal magnitude and an inverse polarity to the other of the ADC output signal over the first signal application period and the ADC output signal over the second signal application period; and (b) a signal comprising one of the ADC output signal over the third signal application period and the ADC output signal over the fourth signal application period and a signal having a substantially equal magnitude and an inverse polarity to the other of the ADC output signal over the third signal application period and the ADC output signal over the fourth signal application period. over a first signal application period, a first ADC input signal comprising the first reference signal; over a second signal application period, a second ADC input signal, the second ADC input signal having a substantially equal magnitude and an inverse polarity to the first ADC input signal; over a third signal application period, a third ADC input signal comprising the second reference signal; and over a fourth signal application period, a fourth ADC input signal, the fourth ADC input signal having a substantially equal magnitude and an inverse polarity to the third ADC input signal, (i) the offset calibration value is calculated based on a sum of the ADC output signal over at least the four signal application periods; and (ii) the gain calibration value is calculated based on a sum of: (a) a signal comprising one of the ADC output signal over the first signal application period and the ADC output signal over the second signal application period and a signal having a substantially equal magnitude and an inverse polarity to the other of the ADC output signal over the first signal application period and the ADC output signal over the second signal application period; and (b) a signal comprising one of the ADC output signal over the third signal application period and the ADC output signal over the fourth signal application period and a signal having a substantially equal magnitude and an inverse polarity to the other of the ADC output signal over the third signal application period and the ADC output signal over the fourth signal application period. (a) a signal comprising one of the ADC output signal over the first signal application period and the ADC output signal over the second signal application period and a signal having a substantially equal magnitude and an inverse polarity to the other of the ADC output signal over the first signal application period and the ADC output signal over the second signal application period; and (b) a signal comprising one of the ADC output signal over the third signal application period and the ADC output signal over the fourth signal application period and a signal having a substantially equal magnitude and an inverse polarity to the other of the ADC output signal over the third signal application period and the ADC output signal over the fourth signal application period.