An electric power steering apparatus comprising an inverter, and a motor, said inverter comprising a FET bridge, said FET bridge comprising a plurality of upper FETs and a plurality of lower FETs forming a plurality of phases, the electric power steering apparatus being configured to calculate each-phase duty command values of a pulse width modulation, based on said each-phase duty command values, said electric power steering apparatus being configured to drive the upper-FETs (FET1 to FET3) of the FET bridge through an upper-FET gate driving section and to drive the lower-FETs (FET4 to FET6) of said FET bridge through a lower-FET gate driving section (105B2), and to perform an assist control of a steering system by drive-controlling the motor with the inverter which comprises said FET bridge and wherein the electric power steering apparatus is configured to receive a system voltage (Vbs), wherein said electric power steering apparatus further comprises: a charge pump circuit that is connected to said upper-FET gate driving section and to said system voltage (Vbs) and that comprises a plurality of charge pump diodes (D21, D22, D23), a plurality of charge pump capacitors (C21, C22, C23) and a switching circuit arranged to provide, from said system voltage, an output voltage (Vcp) which is a boosted voltage; a bootstrap circuit that is connected to said system voltage (Vbs) and to said upper-FET gate driving section, and that comprises a plurality of diodes (D31, D32, D33) and a plurality of capacitors (C31, C32, C33), wherein for each phase of the FET bridge, one of the plurality of diodes is connected in series with one of the plurality of capacitors between the system voltage (Vbs) and the connection between the upper FET and the lower FET of each phase of the FET bridge; a duty control section that is connected to said system voltage (Vbs) and said output voltage, and that is configured to determine a failure of the charge pump based on the system voltage and on the output voltage, and when a failure is detected, the duty control section is configured to limit the maximum values of said each-phase duty command values, wherein the upper-FET gate driving section comprises a plurality of first diodes (D11, D13, D15) and a plurality of second diodes (D12, D14, D16), wherein for each phase of the FET bridge, one of the plurality of first diodes is connected to the output voltage, one of the plurality of second diodes is connected to the connection point between the one of the plurality of diodes and the one of the plurality of capacitors of the bootstrap circuit, wherein the one of the plurality of first diodes and the one of the plurality of second diodes are configured to produce a booster power voltage to drive one of the plurality of upper FETs, the booster voltage being the highest voltage among the output voltage and the voltage at the connection point between the one of the plurality of diodes and the one of the plurality of capacitors of the bootstrap circuit. a charge pump circuit that is connected to said upper-FET gate driving section and to said system voltage (Vbs) and that comprises a plurality of charge pump diodes (D21, D22, D23), a plurality of charge pump capacitors (C21, C22, C23) and a switching circuit arranged to provide, from said system voltage, an output voltage (Vcp) which is a boosted voltage; a bootstrap circuit that is connected to said system voltage (Vbs) and to said upper-FET gate driving section, and that comprises a plurality of diodes (D31, D32, D33) and a plurality of capacitors (C31, C32, C33), wherein for each phase of the FET bridge, one of the plurality of diodes is connected in series with one of the plurality of capacitors between the system voltage (Vbs) and the connection between the upper FET and the lower FET of each phase of the FET bridge; a duty control section that is connected to said system voltage (Vbs) and said output voltage, and that is configured to determine a failure of the charge pump based on the system voltage and on the output voltage, and when a failure is detected, the duty control section is configured to limit the maximum values of said each-phase duty command values, wherein the upper-FET gate driving section comprises a plurality of first diodes (D11, D13, D15) and a plurality of second diodes (D12, D14, D16), wherein for each phase of the FET bridge, one of the plurality of first diodes is connected to the output voltage, one of the plurality of second diodes is connected to the connection point between the one of the plurality of diodes and the one of the plurality of capacitors of the bootstrap circuit, wherein the one of the plurality of first diodes and the one of the plurality of second diodes are configured to produce a booster power voltage to drive one of the plurality of upper FETs, the booster voltage being the highest voltage among the output voltage and the voltage at the connection point between the one of the plurality of diodes and the one of the plurality of capacitors of the bootstrap circuit.