A write operation circuit applied to a semiconductor memory, the semiconductor memory is a Dynamic Random Access Memory, DRAM, the write operation circuit comprising: a data determination module, configured to determine whether to flip a current input data depending on a number of changed data bits between a previous input data and the current input data of the semiconductor memory to generate a flip flag data and an intermediate data; the data determination module further configured to: determine a change flag data according to a change between the current input data and the previous input data; when a number of high data bits in the change flag data is greater than a preset value, output a flipped data of the current input data as the intermediate data, and set the flip flag data to high; and when the number of high data bits in the change flag data is less than or equal to the preset value, output the original current input data as the intermediate data, and set the flip flag data to low; characterized in that, the write operation circuit further comprises: a data buffer module, coupled to the data determination module and configured to determine an initial state of a global bus based on an enable signal and the intermediate data; and a data receiving module coupled to a memory bank, wherein the data receiving module is configured to receive a global bus data on the global bus, receive the flip flag data through a flip flag signal line, decode the global bus data according to the flip flag data, and write a decoded data into the memory bank of the semiconductor memory, wherein the decoding comprises determining whether to flip the global bus data. a data determination module, configured to determine whether to flip a current input data depending on a number of changed data bits between a previous input data and the current input data of the semiconductor memory to generate a flip flag data and an intermediate data; the data determination module further configured to: determine a change flag data according to a change between the current input data and the previous input data; when a number of high data bits in the change flag data is greater than a preset value, output a flipped data of the current input data as the intermediate data, and set the flip flag data to high; and when the number of high data bits in the change flag data is less than or equal to the preset value, output the original current input data as the intermediate data, and set the flip flag data to low; determine a change flag data according to a change between the current input data and the previous input data; when a number of high data bits in the change flag data is greater than a preset value, output a flipped data of the current input data as the intermediate data, and set the flip flag data to high; and when the number of high data bits in the change flag data is less than or equal to the preset value, output the original current input data as the intermediate data, and set the flip flag data to low; characterized in that, the write operation circuit further comprises: a data buffer module, coupled to the data determination module and configured to determine an initial state of a global bus based on an enable signal and the intermediate data; and a data receiving module coupled to a memory bank, wherein the data receiving module is configured to receive a global bus data on the global bus, receive the flip flag data through a flip flag signal line, decode the global bus data according to the flip flag data, and write a decoded data into the memory bank of the semiconductor memory, wherein the decoding comprises determining whether to flip the global bus data. a data buffer module, coupled to the data determination module and configured to determine an initial state of a global bus based on an enable signal and the intermediate data; and a data receiving module coupled to a memory bank, wherein the data receiving module is configured to receive a global bus data on the global bus, receive the flip flag data through a flip flag signal line, decode the global bus data according to the flip flag data, and write a decoded data into the memory bank of the semiconductor memory, wherein the decoding comprises determining whether to flip the global bus data.