A memory unit (23, 24) for a computer system, the memory unit (23, 24) comprising physical memory cells arranged to implement a plurality of corresponding locations for storing respective data elements; the memory unit (23, 24) defining a logical memory space including a plurality of said locations arranged in an array, the locations of the memory space having respective logical addresses in the array based on the respective index values of one or more index variables, the memory unit (23, 24) being operative: (a) upon receiving a read command including a read address in the memory space, to transmit out of the memory unit, data stored at the read address; (b) upon receiving a write command including (i) a write address in the memory space and (ii) one or more data elements, to write the data elements to locations at the write address; and (c) upon receiving a shift command including shift data which indicates a source address in the memory space, to perform a shift function comprising (i) using the source address to identify a portion of the memory space and (ii) writing the data stored in the identified portion of data to a different location in the memory space; characterised by: in which for one or more pairs of said locations, a respective data pipe is provided as circuitry between the memory cells implementing the pair of the locations, the shift function being performed by at least one step of copying data from first ones of said locations to second ones of said locations which are respectively connected to the first locations by the respective data pipes; and wherein the locations further include buffer locations which collectively constitute a buffer, each buffer location being associated with a respective group of the locations of the memory space and being connected by a respective said data pipe to at least one of the respective group of locations; whereby each location of the memory space sets the value stored in the corresponding buffer location, or alternately each location of the memory space stores the value in the corresponding buffer location. the memory unit (23, 24) defining a logical memory space including a plurality of said locations arranged in an array, the locations of the memory space having respective logical addresses in the array based on the respective index values of one or more index variables, the memory unit (23, 24) being operative: (a) upon receiving a read command including a read address in the memory space, to transmit out of the memory unit, data stored at the read address; (b) upon receiving a write command including (i) a write address in the memory space and (ii) one or more data elements, to write the data elements to locations at the write address; and (c) upon receiving a shift command including shift data which indicates a source address in the memory space, to perform a shift function comprising (i) using the source address to identify a portion of the memory space and (ii) writing the data stored in the identified portion of data to a different location in the memory space; (a) upon receiving a read command including a read address in the memory space, to transmit out of the memory unit, data stored at the read address; (b) upon receiving a write command including (i) a write address in the memory space and (ii) one or more data elements, to write the data elements to locations at the write address; and (c) upon receiving a shift command including shift data which indicates a source address in the memory space, to perform a shift function comprising (i) using the source address to identify a portion of the memory space and (ii) writing the data stored in the identified portion of data to a different location in the memory space; characterised by: in which for one or more pairs of said locations, a respective data pipe is provided as circuitry between the memory cells implementing the pair of the locations, the shift function being performed by at least one step of copying data from first ones of said locations to second ones of said locations which are respectively connected to the first locations by the respective data pipes; and wherein the locations further include buffer locations which collectively constitute a buffer, each buffer location being associated with a respective group of the locations of the memory space and being connected by a respective said data pipe to at least one of the respective group of locations; whereby each location of the memory space sets the value stored in the corresponding buffer location, or alternately each location of the memory space stores the value in the corresponding buffer location. in which for one or more pairs of said locations, a respective data pipe is provided as circuitry between the memory cells implementing the pair of the locations, the shift function being performed by at least one step of copying data from first ones of said locations to second ones of said locations which are respectively connected to the first locations by the respective data pipes; and wherein the locations further include buffer locations which collectively constitute a buffer, each buffer location being associated with a respective group of the locations of the memory space and being connected by a respective said data pipe to at least one of the respective group of locations; whereby each location of the memory space sets the value stored in the corresponding buffer location, or alternately each location of the memory space stores the value in the corresponding buffer location.