A pixel comprising: a first transistor comprising a first electrode connected to a first voltage line, a second electrode, and a gate electrode; a first capacitor (Cst) connected between a first node and the gate electrode of the first transistor; a light emitting diode comprising a first electrode connected to the second electrode of the first transistor, and a second electrode connected to a second voltage line; a second transistor comprising a first electrode connected to the gate electrode of the first transistor, a second electrode, and a gate electrode connected to a first scan line (GCLj); a third transistor comprising a first electrode connected to the second electrode of the second transistor, a second electrode connected to a third voltage line, and a gate electrode connected to a second scan line (EBLj); a fourth transistor comprising a first electrode connected to the first electrode of the first transistor, a second electrode connected to the first node, and a gate electrode connected to a first scan line (GCLj); a fifth transistor comprising a first electrode connected to the first voltage line, a second electrode connected to the first electrode of the first transistor, and a gate electrode connected to a first light emission control line (EML1j); a sixth transistor comprising a first electrode connected to the second electrode of the first transistor, a second electrode connected to the first electrode of the light emitting diode, and a gate electrode connected to a second light emission control line (EM2j); a seventh transistor comprising a first electrode connected to the first electrode of the light emitting diode, a second electrode connected to a fourth voltage line, and a gate electrode connected to the second scan line (EBLj); and an eighth transistor comprising a first electrode connected to a data line (DLi), a second electrode connected to the first electrode of the first transistor, and a gate electrode connected to a third scan line (GWLj); wherein the pixel is configured such that: during an initialization period, an initialization voltage (VINT1) is provided from the third voltage line to the gate electrode of the first transistor through the third transistor and the second transistor, and when the initialization period is terminated, at least one of the second transistor and the third transistor is turned off. a first transistor comprising a first electrode connected to a first voltage line, a second electrode, and a gate electrode; a first capacitor (Cst) connected between a first node and the gate electrode of the first transistor; a light emitting diode comprising a first electrode connected to the second electrode of the first transistor, and a second electrode connected to a second voltage line; a second transistor comprising a first electrode connected to the gate electrode of the first transistor, a second electrode, and a gate electrode connected to a first scan line (GCLj); a third transistor comprising a first electrode connected to the second electrode of the second transistor, a second electrode connected to a third voltage line, and a gate electrode connected to a second scan line (EBLj); a fourth transistor comprising a first electrode connected to the first electrode of the first transistor, a second electrode connected to the first node, and a gate electrode connected to a first scan line (GCLj); a fifth transistor comprising a first electrode connected to the first voltage line, a second electrode connected to the first electrode of the first transistor, and a gate electrode connected to a first light emission control line (EML1j); a sixth transistor comprising a first electrode connected to the second electrode of the first transistor, a second electrode connected to the first electrode of the light emitting diode, and a gate electrode connected to a second light emission control line (EM2j); a seventh transistor comprising a first electrode connected to the first electrode of the light emitting diode, a second electrode connected to a fourth voltage line, and a gate electrode connected to the second scan line (EBLj); and an eighth transistor comprising a first electrode connected to a data line (DLi), a second electrode connected to the first electrode of the first transistor, and a gate electrode connected to a third scan line (GWLj); wherein the pixel is configured such that: during an initialization period, an initialization voltage (VINT1) is provided from the third voltage line to the gate electrode of the first transistor through the third transistor and the second transistor, and when the initialization period is terminated, at least one of the second transistor and the third transistor is turned off. during an initialization period, an initialization voltage (VINT1) is provided from the third voltage line to the gate electrode of the first transistor through the third transistor and the second transistor, and when the initialization period is terminated, at least one of the second transistor and the third transistor is turned off.