A system for controlling a DC/DC forward converter having a transformer with primary and secondary windings, a reset switch, and a first switch coupled to the primary winding of the transformer, the system comprising: a PWM control circuit responsive to an output signal of the converter for producing a PWM signal to control switching of the reset switch and the first switch, a period of the PWM signal including an on-time interval for enabling transfer of power via the transformer when the first switch is on, and a reset time interval for enabling reset of the transformer when the reset switch is on, a maximum value of the on-time interval being pre-set to provide sufficient time for the reset, the reset switch being turned off when the PWM signal goes from a first level to a second level, a first delay period being set between time when the reset switch turns off and time when the first switch turns on; a first delay control circuit for reducing the first delay period when the on-time interval approaches the maximum value; and a second switch coupled to the secondary winding of the transformer, wherein: a second delay period shorter than the first delay period being set between time when the reset switch turns off and time when the second switch turns on, characterized in that the system further comprises a second delay control circuit for reducing the second delay period when the on-time interval approaches the maximum value, and in that the first delay control circuit is configured to determine a difference Δt between duration of the on-time interval and the maximum value of the on-time interval, and to reduce the first delay period to a value of (m x Δt) if the value of (m x Δt) is less the first delay period, where m is a constant value selected to provide stability of converter operations, and in that the second delay control circuit is configured to determine the difference Δt between duration of the on-time interval and the maximum value of the on-time interval, and to reduce the second delay period to a value of (k x Δt), if the value of (k x Δt) is less than the second delay period, where k is a constant value selected to provide stability of converter operations, and m exceeds k. a PWM control circuit responsive to an output signal of the converter for producing a PWM signal to control switching of the reset switch and the first switch, a period of the PWM signal including an on-time interval for enabling transfer of power via the transformer when the first switch is on, and a reset time interval for enabling reset of the transformer when the reset switch is on, a maximum value of the on-time interval being pre-set to provide sufficient time for the reset, the reset switch being turned off when the PWM signal goes from a first level to a second level, a first delay period being set between time when the reset switch turns off and time when the first switch turns on; a first delay control circuit for reducing the first delay period when the on-time interval approaches the maximum value; and a second delay period shorter than the first delay period being set between time when the reset switch turns off and time when the second switch turns on, characterized in that the system further comprises a second delay control circuit for reducing the second delay period when the on-time interval approaches the maximum value, and in that the first delay control circuit is configured to determine a difference Δt between duration of the on-time interval and the maximum value of the on-time interval, and to reduce the first delay period to a value of (m x Δt) if the value of (m x Δt) is less the first delay period, where m is a constant value selected to provide stability of converter operations, and in that the second delay control circuit is configured to determine the difference Δt between duration of the on-time interval and the maximum value of the on-time interval, and to reduce the second delay period to a value of (k x Δt), if the value of (k x Δt) is less than the second delay period, where k is a constant value selected to provide stability of converter operations, and m exceeds k.