An apparatus for iterative layer decoding of non-binary low density parity check encoded data, the apparatus comprising: a message processing circuit (306, 316, 320, 324, 328) operable to process variable node values and check node values (312, 330)in a log domain by combining variable node values for a connected layer and check node values for said connected layer with check node values for a current layer to yield updated variable node values for said current layer; and a check node calculation circuit (336, 340, 344, 350, 352, 356, 360, 362, 366, 370) operable to perform a Fast Fourier Transform in a probability domain, wherein the check node calculation circuit comprises: a transformation circuit operable to transform said updated variable node values for said current layer from the log domain to the probability domain; a Fast Fourier Transform circuit operable to perform a Fast Fourier Transform on said updated and transformed variable node values for said current layer in the probability domain; a first inverse Fast Fourier Transform circuit operable to perform an inverse Fast Fourier Transform to yield check node values for said connected layer in the probability domain; a first retransformation circuit operable to transform said check node values for said connected layer from the probability domain to the log domain; a second inverse Fast Fourier Transform circuit operable to perform an inverse Fast Fourier Transform to yield check node values for said current layer in the probability domain; a second retransformation circuit operable to transform said check node values for said current layer from the probability domain to the log domain; wherein the message processing circuit and the check node calculation circuit are operable to perform iterative layer decoding. a message processing circuit (306, 316, 320, 324, 328) operable to process variable node values and check node values (312, 330)in a log domain by combining variable node values for a connected layer and check node values for said connected layer with check node values for a current layer to yield updated variable node values for said current layer; and a check node calculation circuit (336, 340, 344, 350, 352, 356, 360, 362, 366, 370) operable to perform a Fast Fourier Transform in a probability domain, wherein the check node calculation circuit comprises: a transformation circuit operable to transform said updated variable node values for said current layer from the log domain to the probability domain; a Fast Fourier Transform circuit operable to perform a Fast Fourier Transform on said updated and transformed variable node values for said current layer in the probability domain; a first inverse Fast Fourier Transform circuit operable to perform an inverse Fast Fourier Transform to yield check node values for said connected layer in the probability domain; a first retransformation circuit operable to transform said check node values for said connected layer from the probability domain to the log domain; a second inverse Fast Fourier Transform circuit operable to perform an inverse Fast Fourier Transform to yield check node values for said current layer in the probability domain; a second retransformation circuit operable to transform said check node values for said current layer from the probability domain to the log domain; a transformation circuit operable to transform said updated variable node values for said current layer from the log domain to the probability domain; a Fast Fourier Transform circuit operable to perform a Fast Fourier Transform on said updated and transformed variable node values for said current layer in the probability domain; a first inverse Fast Fourier Transform circuit operable to perform an inverse Fast Fourier Transform to yield check node values for said connected layer in the probability domain; a first retransformation circuit operable to transform said check node values for said connected layer from the probability domain to the log domain; a second inverse Fast Fourier Transform circuit operable to perform an inverse Fast Fourier Transform to yield check node values for said current layer in the probability domain; a second retransformation circuit operable to transform said check node values for said current layer from the probability domain to the log domain; wherein the message processing circuit and the check node calculation circuit are operable to perform iterative layer decoding.