Organic light emitting screen comprising n.m image points organised in a matrix according to m rows and n columns, each image point comprising an organic light emitting diode (OLED) and a first and second current control circuit (COM,COM') for said LED, each one of them comprising: - a current control transistor connected between a reference voltage and an electrode for said LED, - a switching transistor to switch from a grid voltage to the grid of said current control transistor, - a capacity connected to the grid of said current control transistor, to maintain said grid voltage, an addressing circuit for said n.m image points being configured to alternately control an image point recovery phase on a control circuit by applying a blocking voltage (Vb) as respective current control transistor grid voltage and an image point display phase on the other control circuit, by applying a video voltage (Vv) as respective current control transistor grid voltage, characterised in that The addressing circuit comprises m row selection lines, one per matrix row and the image points of a row of the matrix are connected to a respective selection line (Si) of said row and to another selection line of another row, and n data lines, one per matrix column, each one to apply a video voltage to an image point of a respective column and a selected current row, and the addressing circuit is configured to select in a sequence each one of the screen selection lines, in a vertical downward screen scanning direction for a frame, and in a vertical upward screen scanning direction for the next frame, And in that each image point on a respective row and column of the matrix: - the respective data line (D i) is connected to the switching transistors (T1, T1') of the two associated control circuits, - the respective selection line (S i) is connected to the grid of the switching transistor of one of the two control circuits, - the other selection line (S i-1) is connected to the grid of the switching transistor (T1') of the other control circuits (COM') and, - each one of the two control circuits (COM, COM') comprises an additional transistor (T3, T3') for the application of a blocking voltage as grid voltage of the control circuit transistor considered, said transistor being connected between the grid of the current control transistor of the control circuit considered and the associated selection line, and controlled on its grid by the other selection line associated with the other control circuit. - a current control transistor connected between a reference voltage and an electrode for said LED, - a switching transistor to switch from a grid voltage to the grid of said current control transistor, - a capacity connected to the grid of said current control transistor, to maintain said grid voltage, an addressing circuit for said n.m image points being configured to alternately control an image point recovery phase on a control circuit by applying a blocking voltage (Vb) as respective current control transistor grid voltage and an image point display phase on the other control circuit, by applying a video voltage (Vv) as respective current control transistor grid voltage, characterised in that The addressing circuit comprises m row selection lines, one per matrix row and the image points of a row of the matrix are connected to a respective selection line (Si) of said row and to another selection line of another row, and n data lines, one per matrix column, each one to apply a video voltage to an image point of a respective column and a selected current row, and the addressing circuit is configured to select in a sequence each one of the screen selection lines, in a vertical downward screen scanning direction for a frame, and in a vertical upward screen scanning direction for the next frame, - the respective data line (D i) is connected to the switching transistors (T1, T1') of the two associated control circuits, - the respective selection line (S i) is connected to the grid of the switching transistor of one of the two control circuits, - the other selection line (S i-1) is connected to the grid of the switching transistor (T1') of the other control circuits (COM') and, - each one of the two control circuits (COM, COM') comprises an additional transistor (T3, T3') for the application of a blocking voltage as grid voltage of the control circuit transistor considered, said transistor being connected between the grid of the current control transistor of the control circuit considered and the associated selection line, and controlled on its grid by the other selection line associated with the other control circuit.