A CMOS image sensor, comprising: a photosensitive semiconductor layer comprising an epitaxial layer (220a, 120a, 620), the epitaxial layer (220a, 120a, 620) comprising a plurality of photodiodes (113, 115, 117) or photo gates to convert incident light into electrical charges; and an integrated shallow trench isolation structure (T2-T4, 621, 622, 116) disposed in the epitaxial layer (220a, 120a, 620) and between photodiodes (113, 115, 117) or photogates, wherein: the integrated shallow trench isolation structure (T2-T4, 621, 622, 116) comprises a dielectric material having a first dielectric constant; the photosensitive semiconductor layer, which surrounds the integrated shallow trench isolation structure (T2-T4, 621, 622, 116), has a second dielectric constant which is different than the first dielectric constant; the integrated shallow trench isolation structure (T2-T4, 621, 622, 116) and the photosensitive semiconductor layer provide an optical grating; and the optical grating is configured to at least one of diffract, deflect or reflect the incident light at the interface between the integrated shallow trench isolation structure (T2-T4, 621, 622, 116) and the photosensitive semiconductor layer and to redistribute the incident light within the photosensitive semiconductor layer to improve an optical sensitivity of a pixel, wherein the CMOS image sensor further comprises a dopant (102c, 103c, 104c, 105c) within the photosensitive semiconductor layer adjacent to the walls of the integrated shallow trench isolation structure (T2-T4, 621, 622, 116) which is configured to passivate sidewalls of the integrated shallow trench isolation structure (T2-T4, 621, 622, 116), resulting in a low dark current pixel. a photosensitive semiconductor layer comprising an epitaxial layer (220a, 120a, 620), the epitaxial layer (220a, 120a, 620) comprising a plurality of photodiodes (113, 115, 117) or photo gates to convert incident light into electrical charges; and an integrated shallow trench isolation structure (T2-T4, 621, 622, 116) disposed in the epitaxial layer (220a, 120a, 620) and between photodiodes (113, 115, 117) or photogates, wherein: the integrated shallow trench isolation structure (T2-T4, 621, 622, 116) comprises a dielectric material having a first dielectric constant; the photosensitive semiconductor layer, which surrounds the integrated shallow trench isolation structure (T2-T4, 621, 622, 116), has a second dielectric constant which is different than the first dielectric constant; the integrated shallow trench isolation structure (T2-T4, 621, 622, 116) and the photosensitive semiconductor layer provide an optical grating; and the optical grating is configured to at least one of diffract, deflect or reflect the incident light at the interface between the integrated shallow trench isolation structure (T2-T4, 621, 622, 116) and the photosensitive semiconductor layer and to redistribute the incident light within the photosensitive semiconductor layer to improve an optical sensitivity of a pixel, wherein the CMOS image sensor further comprises a dopant (102c, 103c, 104c, 105c) within the photosensitive semiconductor layer adjacent to the walls of the integrated shallow trench isolation structure (T2-T4, 621, 622, 116) which is configured to passivate sidewalls of the integrated shallow trench isolation structure (T2-T4, 621, 622, 116), resulting in a low dark current pixel. the integrated shallow trench isolation structure (T2-T4, 621, 622, 116) comprises a dielectric material having a first dielectric constant; the photosensitive semiconductor layer, which surrounds the integrated shallow trench isolation structure (T2-T4, 621, 622, 116), has a second dielectric constant which is different than the first dielectric constant; the integrated shallow trench isolation structure (T2-T4, 621, 622, 116) and the photosensitive semiconductor layer provide an optical grating; and the optical grating is configured to at least one of diffract, deflect or reflect the incident light at the interface between the integrated shallow trench isolation structure (T2-T4, 621, 622, 116) and the photosensitive semiconductor layer and to redistribute the incident light within the photosensitive semiconductor layer to improve an optical sensitivity of a pixel, wherein the CMOS image sensor further comprises a dopant (102c, 103c, 104c, 105c) within the photosensitive semiconductor layer adjacent to the walls of the integrated shallow trench isolation structure (T2-T4, 621, 622, 116) which is configured to passivate sidewalls of the integrated shallow trench isolation structure (T2-T4, 621, 622, 116), resulting in a low dark current pixel.