A package method for packaging a chip on a thin substrate, comprising: providing a carrier; forming at least one metal layer (202, 206, 210) and at least one dielectric layer on the carrier for manufacturing the thin substrate, and the thin substrate comprises at least one package unit for connecting at least one chip; forming pad layers (202, 210) on a top surface and a bottom surface of the thin substrate; parting the thin substrate from the carrier; clamping the thin substrate with a clamp system so as to reveal the pad layers (202, 210) on the top surface and the bottom surface of the thin substrate, the clamp system having: a peripheral part, clamp parts clamping edges of the thin substrate, adjustment springs coupled between the clamp parts and the peripheral part for adjusting the position of the thin substrate clamped in the peripheral part by the clamp parts, and fixing screws coupled to the clamp parts, the adjustment springs and the fixing screws providing a controllable tension to the thin substrate; performing a test to the thin substrate to weed out the package unit with defects in the at least one package unit and select the package units without defects for connecting the chips, wherein the pad layers (202, 210) on the top surface and the bottom surface of the thin substrate are used simultaneously for the test; connecting the chips with the selected package units by flip chip bonding; dicing the thin substrate according to a molding panel size; and performing a molding to the chips which are flip chip bonded on the thin substrate diced to a molding panel size to build electronic components. providing a carrier; forming at least one metal layer (202, 206, 210) and at least one dielectric layer on the carrier for manufacturing the thin substrate, and the thin substrate comprises at least one package unit for connecting at least one chip; forming pad layers (202, 210) on a top surface and a bottom surface of the thin substrate; parting the thin substrate from the carrier; clamping the thin substrate with a clamp system so as to reveal the pad layers (202, 210) on the top surface and the bottom surface of the thin substrate, the clamp system having: a peripheral part, clamp parts clamping edges of the thin substrate, adjustment springs coupled between the clamp parts and the peripheral part for adjusting the position of the thin substrate clamped in the peripheral part by the clamp parts, and fixing screws coupled to the clamp parts, the adjustment springs and the fixing screws providing a controllable tension to the thin substrate; performing a test to the thin substrate to weed out the package unit with defects in the at least one package unit and select the package units without defects for connecting the chips, wherein the pad layers (202, 210) on the top surface and the bottom surface of the thin substrate are used simultaneously for the test; connecting the chips with the selected package units by flip chip bonding; dicing the thin substrate according to a molding panel size; and performing a molding to the chips which are flip chip bonded on the thin substrate diced to a molding panel size to build electronic components. a peripheral part, clamp parts clamping edges of the thin substrate, adjustment springs coupled between the clamp parts and the peripheral part for adjusting the position of the thin substrate clamped in the peripheral part by the clamp parts, and fixing screws coupled to the clamp parts, the adjustment springs and the fixing screws providing a controllable tension to the thin substrate; performing a test to the thin substrate to weed out the package unit with defects in the at least one package unit and select the package units without defects for connecting the chips, wherein the pad layers (202, 210) on the top surface and the bottom surface of the thin substrate are used simultaneously for the test; connecting the chips with the selected package units by flip chip bonding; dicing the thin substrate according to a molding panel size; and performing a molding to the chips which are flip chip bonded on the thin substrate diced to a molding panel size to build electronic components.