An apparatus for performing memory operations, comprising: a solid state device, SSD, comprising: a controller comprising a plurality of base address registers, BARs, including: a write BAR having a first cache attribute assigned thereto for use in performance of write operations; a read BAR having a second cache attribute assigned thereto for use in performance of read operations, the write BAR and the read BAR each including same addresses for data storage in a same memory resource (228, 328); and the same memory resource having the first cache attribute and the second cache attribute simultaneously assigned thereto; and an SSD driver (118, 218, 318) included in the SSD or outside of the SSD, wherein the SSD driver in combination with the controller is configured to: assign a write operation to the write BAR; select a particular buffer local to a processor for storage of data values of the write operation before transfer to the SSD, wherein the particular buffer is controlled by the selected first cache attribute such that data in the particular buffer is accumulated and released in burst mode for transfer to the same memory resource; assign a read operation to the read BAR; and select a particular cache (112, 114) local to the processor for storage of data values of the read operation after transfer from the SSD, wherein the particular cache is controlled by the selected second cache attribute such that no write operations may be performed on data in the particular cache, although read operations may be performed on data in the particular cache. a solid state device, SSD, comprising: a controller comprising a plurality of base address registers, BARs, including: a write BAR having a first cache attribute assigned thereto for use in performance of write operations; a read BAR having a second cache attribute assigned thereto for use in performance of read operations, the write BAR and the read BAR each including same addresses for data storage in a same memory resource (228, 328); and the same memory resource having the first cache attribute and the second cache attribute simultaneously assigned thereto; and a controller comprising a plurality of base address registers, BARs, including: a write BAR having a first cache attribute assigned thereto for use in performance of write operations; a read BAR having a second cache attribute assigned thereto for use in performance of read operations, the write BAR and the read BAR each including same addresses for data storage in a same memory resource (228, 328); and a write BAR having a first cache attribute assigned thereto for use in performance of write operations; a read BAR having a second cache attribute assigned thereto for use in performance of read operations, the write BAR and the read BAR each including same addresses for data storage in a same memory resource (228, 328); and the same memory resource having the first cache attribute and the second cache attribute simultaneously assigned thereto; and an SSD driver (118, 218, 318) included in the SSD or outside of the SSD, wherein the SSD driver in combination with the controller is configured to: assign a write operation to the write BAR; select a particular buffer local to a processor for storage of data values of the write operation before transfer to the SSD, wherein the particular buffer is controlled by the selected first cache attribute such that data in the particular buffer is accumulated and released in burst mode for transfer to the same memory resource; assign a read operation to the read BAR; and select a particular cache (112, 114) local to the processor for storage of data values of the read operation after transfer from the SSD, wherein the particular cache is controlled by the selected second cache attribute such that no write operations may be performed on data in the particular cache, although read operations may be performed on data in the particular cache. assign a write operation to the write BAR; select a particular buffer local to a processor for storage of data values of the write operation before transfer to the SSD, wherein the particular buffer is controlled by the selected first cache attribute such that data in the particular buffer is accumulated and released in burst mode for transfer to the same memory resource; assign a read operation to the read BAR; and select a particular cache (112, 114) local to the processor for storage of data values of the read operation after transfer from the SSD, wherein the particular cache is controlled by the selected second cache attribute such that no write operations may be performed on data in the particular cache, although read operations may be performed on data in the particular cache.