A configurable hardware platform comprising: a reconfigurable logic region comprising hardware that is configurable to implement application logic; and host logic for encapsulating the application logic, wherein the host logic comprises: hard macros including a configuration access port that is available when the configurable hardware platform is powered on; static logic that is loaded at boot time onto reconfigurable logic blocks using the configuration access port, prior to the reconfigurable logic region being configured; a host interface for communicating with a processor; a management function accessible via the host interface, the management function adapted to cause the reconfigurable logic region to be configured with the application logic by accessing the configuration access port in response to an authorized transaction received at the host interface; and a data path function accessible via the host interface, the data path function comprising a layer for formatting data transfers between the host interface and the application logic, wherein the static logic is adapted to configure signal lines for communication between the reconfigurable logic region for implementing application logic and the hard macros and to mask off the signaling lines directly accessing the configuration access port from the reconfigurable logic region for implementing application logic so that the reconfigurable logic region for implementing application logic cannot directly access the configuration access port, and wherein at least a portion of the host logic is reconfigurable logic that is loaded on the configurable hardware platform after the static logic has been loaded in response to an authorized transaction received at the host interface. a reconfigurable logic region comprising hardware that is configurable to implement application logic; and host logic for encapsulating the application logic, wherein the host logic comprises: hard macros including a configuration access port that is available when the configurable hardware platform is powered on; static logic that is loaded at boot time onto reconfigurable logic blocks using the configuration access port, prior to the reconfigurable logic region being configured; a host interface for communicating with a processor; a management function accessible via the host interface, the management function adapted to cause the reconfigurable logic region to be configured with the application logic by accessing the configuration access port in response to an authorized transaction received at the host interface; and a data path function accessible via the host interface, the data path function comprising a layer for formatting data transfers between the host interface and the application logic, wherein the static logic is adapted to configure signal lines for communication between the reconfigurable logic region for implementing application logic and the hard macros and to mask off the signaling lines directly accessing the configuration access port from the reconfigurable logic region for implementing application logic so that the reconfigurable logic region for implementing application logic cannot directly access the configuration access port, and wherein at least a portion of the host logic is reconfigurable logic that is loaded on the configurable hardware platform after the static logic has been loaded in response to an authorized transaction received at the host interface. hard macros including a configuration access port that is available when the configurable hardware platform is powered on; static logic that is loaded at boot time onto reconfigurable logic blocks using the configuration access port, prior to the reconfigurable logic region being configured; a host interface for communicating with a processor; a management function accessible via the host interface, the management function adapted to cause the reconfigurable logic region to be configured with the application logic by accessing the configuration access port in response to an authorized transaction received at the host interface; and a data path function accessible via the host interface, the data path function comprising a layer for formatting data transfers between the host interface and the application logic, wherein the static logic is adapted to configure signal lines for communication between the reconfigurable logic region for implementing application logic and the hard macros and to mask off the signaling lines directly accessing the configuration access port from the reconfigurable logic region for implementing application logic so that the reconfigurable logic region for implementing application logic cannot directly access the configuration access port, and wherein at least a portion of the host logic is reconfigurable logic that is loaded on the configurable hardware platform after the static logic has been loaded in response to an authorized transaction received at the host interface.