A flight control system comprising: at least one sensor configured to collect data; a flight controller coupled to said at least one sensor, said flight controller comprising: a random access memory, RAM, device comprising one continuous bank of RAM, said RAM device configured to store at least one executable program in a first RAM sector and a second RAM sector of said continuous bank of RAM, wherein said first RAM sector is a low-RAM sector on a low address space and said second RAM sector is a high-RAM sector on high-address space of said continuous bank of RAM; and a processor configured to execute the at least one executable program from the first RAM sector to process the sensor data, and to output operational instructions; and said flight control system further comprising: at least one actuator coupled to said flight controller, said actuator configured to receive and execute the operational instructions, wherein the system further comprises a read only memory, ROM, device configured to store the at least one executable program, and said processor is further configured to: control transfer of the at least one executable program from the ROM device to the first RAM sector and the second RAM sector of said continuous bank of RAM at a startup of said flight controller; control transfer of the at least one executable program from the second RAM sector to the first RAM sector after an error or fault with the processor; and reinitialize the processor using the executable program transferred to the first RAM sector to resolve the error or fault with the processor. at least one sensor configured to collect data; a flight controller coupled to said at least one sensor, said flight controller comprising: a random access memory, RAM, device comprising one continuous bank of RAM, said RAM device configured to store at least one executable program in a first RAM sector and a second RAM sector of said continuous bank of RAM, wherein said first RAM sector is a low-RAM sector on a low address space and said second RAM sector is a high-RAM sector on high-address space of said continuous bank of RAM; and a processor configured to execute the at least one executable program from the first RAM sector to process the sensor data, and to output operational instructions; and said flight control system further comprising: at least one actuator coupled to said flight controller, said actuator configured to receive and execute the operational instructions, wherein the system further comprises a read only memory, ROM, device configured to store the at least one executable program, and said processor is further configured to: control transfer of the at least one executable program from the ROM device to the first RAM sector and the second RAM sector of said continuous bank of RAM at a startup of said flight controller; control transfer of the at least one executable program from the second RAM sector to the first RAM sector after an error or fault with the processor; and reinitialize the processor using the executable program transferred to the first RAM sector to resolve the error or fault with the processor. a random access memory, RAM, device comprising one continuous bank of RAM, said RAM device configured to store at least one executable program in a first RAM sector and a second RAM sector of said continuous bank of RAM, wherein said first RAM sector is a low-RAM sector on a low address space and said second RAM sector is a high-RAM sector on high-address space of said continuous bank of RAM; and a processor configured to execute the at least one executable program from the first RAM sector to process the sensor data, and to output operational instructions; and said flight control system further comprising: at least one actuator coupled to said flight controller, said actuator configured to receive and execute the operational instructions, wherein the system further comprises a read only memory, ROM, device configured to store the at least one executable program, and said processor is further configured to: control transfer of the at least one executable program from the ROM device to the first RAM sector and the second RAM sector of said continuous bank of RAM at a startup of said flight controller; control transfer of the at least one executable program from the second RAM sector to the first RAM sector after an error or fault with the processor; and reinitialize the processor using the executable program transferred to the first RAM sector to resolve the error or fault with the processor. control transfer of the at least one executable program from the ROM device to the first RAM sector and the second RAM sector of said continuous bank of RAM at a startup of said flight controller; control transfer of the at least one executable program from the second RAM sector to the first RAM sector after an error or fault with the processor; and reinitialize the processor using the executable program transferred to the first RAM sector to resolve the error or fault with the processor.