A circuit for protecting a controllable power switch connected between a first terminal and a second terminal of the circuit from over-voltage applicable between the first terminal and the second terminal, the circuit comprising: the controllable power switch having a first power switch terminal connected to the first terminal, a second power switch terminal connected to the second terminal, and a power switch control terminal, wherein a conducting state between the first power switch terminal and the second power switch terminal is based on a voltage applied between the power switch control terminal and the second power switch terminal; a diode having a first diode terminal and a second diode terminal, the diode allowing electric current flow between the first diode terminal and the second diode terminal in a forward direction and allowing electric current flow in a reverse direction opposite to the forward direction, when a voltage applied between the second diode terminal and the first diode terminal is above a diode threshold voltage, the second diode terminal being connected to the first terminal; a controllable control switch having a first control switch terminal connected to the first diode terminal, a second control switch terminal, and a control switch control terminal, wherein a conducting state between the first control switch terminal and the second control switch terminal is based on a voltage applied between the control switch control terminal and the second control switch terminal, the circuit further comprising: a gate driver circuit having a gate driver reference terminal connected to the second power switch terminal, having a gate driver input terminal and having a gate driver output terminal connected to the power switch control terminal, wherein a signal generated at the gate driver output terminal is based on a signal applied to the gate driver input terminal, characterized in that the circuit further comprises: a control switch driver circuit comprising a timer circuit and having a control switch driver output terminal connected to the control switch control terminal and having a control switch driver input terminal connected to the gate driver output terminal, wherein the control switch driver circuit is adapted, using the timer circuit, to generate a signal at the control switch driver output terminal based on the signal generated at the gate driver output terminal which signal is received at the control switch driver input terminal, wherein the second control switch terminal is connected, in particular electrically directly connected, to the power switch control terminal, wherein the signal generated at the control switch driver output terminal is such that the control switch is in an extended conducting state for a time interval (Δt) between 500 ns and 30 μs after the controllable power switch has switched from the conducting state to the non-conducting state and the control switch is in the non-conducting state after this time interval, when the controllable power switch is in the non-conducting state. the controllable power switch having a first power switch terminal connected to the first terminal, a second power switch terminal connected to the second terminal, and a power switch control terminal, wherein a conducting state between the first power switch terminal and the second power switch terminal is based on a voltage applied between the power switch control terminal and the second power switch terminal; a diode having a first diode terminal and a second diode terminal, the diode allowing electric current flow between the first diode terminal and the second diode terminal in a forward direction and allowing electric current flow in a reverse direction opposite to the forward direction, when a voltage applied between the second diode terminal and the first diode terminal is above a diode threshold voltage, the second diode terminal being connected to the first terminal; a controllable control switch having a first control switch terminal connected to the first diode terminal, a second control switch terminal, and a control switch control terminal, wherein a conducting state between the first control switch terminal and the second control switch terminal is based on a voltage applied between the control switch control terminal and the second control switch terminal, a gate driver circuit having a gate driver reference terminal connected to the second power switch terminal, having a gate driver input terminal and having a gate driver output terminal connected to the power switch control terminal, wherein a signal generated at the gate driver output terminal is based on a signal applied to the gate driver input terminal, a control switch driver circuit comprising a timer circuit and having a control switch driver output terminal connected to the control switch control terminal and having a control switch driver input terminal connected to the gate driver output terminal, the control switch is in an extended conducting state for a time interval (Δt) between 500 ns and 30 μs after the controllable power switch has switched from the conducting state to the non-conducting state and the control switch is in the non-conducting state after this time interval, when the controllable power switch is in the non-conducting state.