An amplifier (400, 700) configured to provide two RF output signals to different mixers, that is a first output signal to a first mixer and a second output signal to a second mixer, and configured to receive a first input signal comprising an intra-band non-contiguous carrier aggregation band, hereinafter NCCA band, including at least a primary component carrier channel, hereinafter PCC channel, and a secondary component carrier channel, hereinafter SCC channel, not adjacent to each other, the amplifier comprising: a first amplifier circuit (401, 701), arranged to receive the first input signal and generate the first output signal at an output port of the first amplifier circuit (401, 701) configured to be coupled to the first mixer configured to down-convert the PCC channel; and a second amplifier circuit (402, 702), arranged to receive at least one second input signal and generate the second output signal at an output port of the second amplifier circuit (402, 702) configured to be coupled to the second mixer configured to down-convert the SCC channel; wherein the at least one second input signal received by the second amplifier circuit (402, 702) is provided by the first amplifier circuit (401, 701), wherein the first amplifier circuit (401, 701) comprises: a first slice circuit (PCC_1, PCC_2, PCC_N), comprising: an input stage (411A, 700A), arranged to receive and amplify the first input signal to generate a respective one of the at least one second input signal at an output of the input stage (700A, 411A); and an output buffer (411B, 700B), coupled to the output of the input stage (411A, 700A) and arranged to output a first amplified output to the output port of the first amplifier circuit (401, 701), wherein the first amplified output is at least a portion of the first output signal generated at the output port of the first amplifier circuit (401, 701), wherein the first slice circuit (PCC_1, PCC_2, PCC_N) further comprises: a signal reconstruction circuit (700C, 717), coupled to the output of the input stage (411A, 700A) and arranged to reconstruct the respective one of the at least one second input signal provided from the first slice circuit (PCC_1, PCC_2, PCC_N) and to deliver a reconstructed respective one of the at least one second input signal to the second amplifier circuit (402, 702) when the output buffer (411B, 700B) is turned off. a first amplifier circuit (401, 701), arranged to receive the first input signal and generate the first output signal at an output port of the first amplifier circuit (401, 701) configured to be coupled to the first mixer configured to down-convert the PCC channel; and a second amplifier circuit (402, 702), arranged to receive at least one second input signal and generate the second output signal at an output port of the second amplifier circuit (402, 702) configured to be coupled to the second mixer configured to down-convert the SCC channel; wherein the at least one second input signal received by the second amplifier circuit (402, 702) is provided by the first amplifier circuit (401, 701), wherein the first amplifier circuit (401, 701) comprises: a first slice circuit (PCC_1, PCC_2, PCC_N), comprising: an input stage (411A, 700A), arranged to receive and amplify the first input signal to generate a respective one of the at least one second input signal at an output of the input stage (700A, 411A); and an output buffer (411B, 700B), coupled to the output of the input stage (411A, 700A) and arranged to output a first amplified output to the output port of the first amplifier circuit (401, 701), wherein the first amplified output is at least a portion of the first output signal generated at the output port of the first amplifier circuit (401, 701), wherein the first slice circuit (PCC_1, PCC_2, PCC_N) further comprises: a signal reconstruction circuit (700C, 717), coupled to the output of the input stage (411A, 700A) and arranged to reconstruct the respective one of the at least one second input signal provided from the first slice circuit (PCC_1, PCC_2, PCC_N) and to deliver a reconstructed respective one of the at least one second input signal to the second amplifier circuit (402, 702) when the output buffer (411B, 700B) is turned off. an input stage (411A, 700A), arranged to receive and amplify the first input signal to generate a respective one of the at least one second input signal at an output of the input stage (700A, 411A); and an output buffer (411B, 700B), coupled to the output of the input stage (411A, 700A) and arranged to output a first amplified output to the output port of the first amplifier circuit (401, 701), wherein the first amplified output is at least a portion of the first output signal generated at the output port of the first amplifier circuit (401, 701), wherein the first slice circuit (PCC_1, PCC_2, PCC_N) further comprises: a signal reconstruction circuit (700C, 717), coupled to the output of the input stage (411A, 700A) and arranged to reconstruct the respective one of the at least one second input signal provided from the first slice circuit (PCC_1, PCC_2, PCC_N) and to deliver a reconstructed respective one of the at least one second input signal to the second amplifier circuit (402, 702) when the output buffer (411B, 700B) is turned off.