A frequency determination circuit comprising: an input port for receiving an input signal, the input signal including a frequency component that is unknown prior to frequency determination; a phase frequency difference detector for determining a difference in phase and frequency between the input signal and a feedback signal and for providing a control signal based on the detected difference; a voltage controlled crystal oscillator for producing an output signal based on the control signal, the voltage controlled crystal oscillator having an oscillator frequency; a feedback loop including the voltage controlled crystal oscillator and a feedback divider for frequency dividing the output signal by a factor R to produce the feedback signal, the voltage controlled crystal oscillator being a reference crystal oscillator provided in the feedback loop, the feedback divider being programmable to a plurality of values of the factor R to correspond to a plurality of different test frequencies; a lock detect circuit configured and adapted to determine that the circuit has achieved a locked state; and a processor coupled to the feedback loop and the lock detect circuit, the processor configured and adapted to: step through a plurality of test frequencies by programing the feedback divider to a plurality of values of R; and when the locked state has been achieved, determine the input signal frequency component based on the reference crystal oscillator frequency and the programmed value of the feedback divider. an input port for receiving an input signal, the input signal including a frequency component that is unknown prior to frequency determination; a phase frequency difference detector for determining a difference in phase and frequency between the input signal and a feedback signal and for providing a control signal based on the detected difference; a voltage controlled crystal oscillator for producing an output signal based on the control signal, the voltage controlled crystal oscillator having an oscillator frequency; a feedback loop including the voltage controlled crystal oscillator and a feedback divider for frequency dividing the output signal by a factor R to produce the feedback signal, the voltage controlled crystal oscillator being a reference crystal oscillator provided in the feedback loop, the feedback divider being programmable to a plurality of values of the factor R to correspond to a plurality of different test frequencies; a lock detect circuit configured and adapted to determine that the circuit has achieved a locked state; and a processor coupled to the feedback loop and the lock detect circuit, the processor configured and adapted to: step through a plurality of test frequencies by programing the feedback divider to a plurality of values of R; and when the locked state has been achieved, determine the input signal frequency component based on the reference crystal oscillator frequency and the programmed value of the feedback divider. step through a plurality of test frequencies by programing the feedback divider to a plurality of values of R; and when the locked state has been achieved, determine the input signal frequency component based on the reference crystal oscillator frequency and the programmed value of the feedback divider.