An integrated circuit comprising: one or more processing components, wherein each processing component includes: first memory to store image data; a plurality of multiplier-accumulator execution pipelines, coupled to the first memory, wherein each multiplier-accumulator execution pipeline includes a plurality of multiplier-accumulator circuits to, in operation, perform multiply and accumulate operations, wherein the plurality of multiplier-accumulator execution pipelines includes: a first multiplier-accumulator execution pipeline configured to: (i) input first data from the first memory, (ii) perform a first plurality of multiply and accumulate operations using the first data and a first set of filter weights, and (iii) output first processed data to the first memory, wherein the first processed data is stored therein, and a second multiplier-accumulator execution pipeline configured to: (i) input second data from the first memory, wherein the second data includes the first processed data, (ii) perform a second plurality of multiply and accumulate operations using the second data and a second set of filter weights, and (iii) output second processed data; and wherein, in operation, the first multiplier-accumulator execution pipeline performs a portion of the first plurality of multiply and accumulate operations concurrently with respect to performance of the second plurality of multiply and accumulate operations by the second multiplier-accumulator execution pipeline. first memory to store image data; a plurality of multiplier-accumulator execution pipelines, coupled to the first memory, wherein each multiplier-accumulator execution pipeline includes a plurality of multiplier-accumulator circuits to, in operation, perform multiply and accumulate operations, wherein the plurality of multiplier-accumulator execution pipelines includes: a first multiplier-accumulator execution pipeline configured to: (i) input first data from the first memory, (ii) perform a first plurality of multiply and accumulate operations using the first data and a first set of filter weights, and (iii) output first processed data to the first memory, wherein the first processed data is stored therein, and a second multiplier-accumulator execution pipeline configured to: (i) input second data from the first memory, wherein the second data includes the first processed data, (ii) perform a second plurality of multiply and accumulate operations using the second data and a second set of filter weights, and (iii) output second processed data; and a first multiplier-accumulator execution pipeline configured to: (i) input first data from the first memory, (ii) perform a first plurality of multiply and accumulate operations using the first data and a first set of filter weights, and (iii) output first processed data to the first memory, wherein the first processed data is stored therein, and a second multiplier-accumulator execution pipeline configured to: (i) input second data from the first memory, wherein the second data includes the first processed data, (ii) perform a second plurality of multiply and accumulate operations using the second data and a second set of filter weights, and (iii) output second processed data; and wherein, in operation, the first multiplier-accumulator execution pipeline performs a portion of the first plurality of multiply and accumulate operations concurrently with respect to performance of the second plurality of multiply and accumulate operations by the second multiplier-accumulator execution pipeline.