A method of forming an integrated circuit, the method comprising: providing a first substrate having a plurality of conductive contact pads spaced apart from one another on a surface of the first substrate; disposing a dielectric layer over the first substrate and the plurality of conductive contact pads; performing a first etch on the dielectric layer to provide extended via openings through the dielectric layer to the first substrate with each extended via opening being aligned with a respective conductive contact pad of the plurality of conductive contact pads; performing a second etch on a second substrate to form a plurality of through substrate via, TSV, openings in the second substrate; disposing the second substrate over the dielectric layer, wherein the second substrate is disposed over the dielectric layer either before or after the second etch, the plurality of TSV openings being aligned with the plurality of extended via openings to form a plurality of vias from a top surface of the second substrate, through the second substrate and the dielectric layer to the first substrate with each via extending to and being aligned with a respective conductive contact pad of the plurality of conductive contact pads; and performing a contact material fill to fill the plurality of vias with superconducting material and form a plurality of superconducting contacts extending through the second substrate and the dielectric layer to the first substrate, wherein each superconducting contact of the plurality of superconducting contacts is aligned with and in contact with a respective conductive contact pad of the plurality of conductive contact pads. providing a first substrate having a plurality of conductive contact pads spaced apart from one another on a surface of the first substrate; disposing a dielectric layer over the first substrate and the plurality of conductive contact pads; performing a first etch on the dielectric layer to provide extended via openings through the dielectric layer to the first substrate with each extended via opening being aligned with a respective conductive contact pad of the plurality of conductive contact pads; performing a second etch on a second substrate to form a plurality of through substrate via, TSV, openings in the second substrate; disposing the second substrate over the dielectric layer, wherein the second substrate is disposed over the dielectric layer either before or after the second etch, the plurality of TSV openings being aligned with the plurality of extended via openings to form a plurality of vias from a top surface of the second substrate, through the second substrate and the dielectric layer to the first substrate with each via extending to and being aligned with a respective conductive contact pad of the plurality of conductive contact pads; and performing a contact material fill to fill the plurality of vias with superconducting material and form a plurality of superconducting contacts extending through the second substrate and the dielectric layer to the first substrate, wherein each superconducting contact of the plurality of superconducting contacts is aligned with and in contact with a respective conductive contact pad of the plurality of conductive contact pads.