A microcontroller comprising an instruction register, a data memory divided into a plurality of memory banks (000...111) wherein in said data memory more than one memory bank (000...011) of said plurality of memory banks (000...111) comprise a plurality of memory mapped special function registers, wherein at least one special function register is memory mapped to more than one memory bank (000...011) and wherein more than one memory bank (100...111) of said plurality of memory banks (000...111) form a block of linear data memory to which no special function registers are mapped, a bank select register which is not mapped to said data memory for selecting a memory bank (000...111), an indirect address register mapped to at least one memory bank (000...011), wherein only the instruction register, the bank select register and the indirect address register provide an address to said data memory; wherein the microcontroller comprises means to: decode instructions stored in the instruction register, wherein if a decoded instruction identifies a write access to the bank select register: - the microcontroller is configured to write a literal contained in said instruction into said bank select register, wherein the content of said bank select register selects one of said plurality of memory banks (000...111); and wherein if a decoded instruction includes a direct address: - the microcontroller is configured to select a memory bank (000... 111) by said bank select register, and - the microcontroller is configured to address said selected memory bank (000...111) by an address provided by the instruction register; and if a decoded instruction identifies indirect addressing: - the microcontroller is configured to use an address provided by said indirect address register to address the data memory. decode instructions stored in the instruction register, wherein if a decoded instruction identifies a write access to the bank select register: - the microcontroller is configured to write a literal contained in said instruction into said bank select register, wherein the content of said bank select register selects one of said plurality of memory banks (000...111); - the microcontroller is configured to write a literal contained in said instruction into said bank select register, wherein the content of said bank select register selects one of said plurality of memory banks (000...111); and wherein if a decoded instruction includes a direct address: - the microcontroller is configured to select a memory bank (000... 111) by said bank select register, and - the microcontroller is configured to address said selected memory bank (000...111) by an address provided by the instruction register; - the microcontroller is configured to select a memory bank (000... 111) by said bank select register, and - the microcontroller is configured to address said selected memory bank (000...111) by an address provided by the instruction register; and if a decoded instruction identifies indirect addressing: - the microcontroller is configured to use an address provided by said indirect address register to address the data memory. - the microcontroller is configured to use an address provided by said indirect address register to address the data memory.