A voltage-controlled oscillator, comprising: a voltage-controlled LC resonator (301; 501) comprising first (V out1) and second (V out2) output nodes; an amplifier (303; 503) comprising: - a first FDSOI MOS transistor comprising a front gate (fg) and a back gate (bg), coupling the first output node (V out1) of the resonator to a node of application of a reference potential, - a second FDSOI MOS transistor comprising a front gate (fg) and a back gate (bg), coupling the second output node (V out2) of the resonator to said node of application of a reference potential, and - first and second decoupling capacitive elements coupling respectively the front gate (fg) of the first transistor to the second output node (V out2) of the resonator and the front gate (fg) of the second transistor to the first output node (V out1) of the resonator; a regulation circuit (305; 505) capable of applying to the back gates (bg) of the first and second transistors a bias voltage (V bg) variable according to the amplitude of the oscillations of a signal delivered on the first (V out1) or second (V out2) output node of the resonator; and a circuit (R1, R2) of application of a fixed bias voltage (V gbias) to the front gates (fg) of the first and second transistors, wherein the fixed (V gbias) and variable (V bg) bias voltages are such that the fixed bias voltage (V gbias) is higher or equal than the threshold voltage of the first and second transistors during a start-up phase of the oscillator, and is lower than the voltage threshold of the first and second transistors in steady state, so that the amplifier (303; 503) has a class-A, -B, or -AB biasing during the start-up phase of the oscillator, and has a class-C biasing in steady state, the variation of the threshold voltage of the first and second transistors between the start-up phase and the steady state resulting from the variation of the variable bias voltage (V bg) between said phases. a voltage-controlled LC resonator (301; 501) comprising first (V out1) and second (V out2) output nodes; an amplifier (303; 503) comprising: - a first FDSOI MOS transistor comprising a front gate (fg) and a back gate (bg), coupling the first output node (V out1) of the resonator to a node of application of a reference potential, - a second FDSOI MOS transistor comprising a front gate (fg) and a back gate (bg), coupling the second output node (V out2) of the resonator to said node of application of a reference potential, and - first and second decoupling capacitive elements coupling respectively the front gate (fg) of the first transistor to the second output node (V out2) of the resonator and the front gate (fg) of the second transistor to the first output node (V out1) of the resonator; - a first FDSOI MOS transistor comprising a front gate (fg) and a back gate (bg), coupling the first output node (V out1) of the resonator to a node of application of a reference potential, - a second FDSOI MOS transistor comprising a front gate (fg) and a back gate (bg), coupling the second output node (V out2) of the resonator to said node of application of a reference potential, and - first and second decoupling capacitive elements coupling respectively the front gate (fg) of the first transistor to the second output node (V out2) of the resonator and the front gate (fg) of the second transistor to the first output node (V out1) of the resonator; a regulation circuit (305; 505) capable of applying to the back gates (bg) of the first and second transistors a bias voltage (V bg) variable according to the amplitude of the oscillations of a signal delivered on the first (V out1) or second (V out2) output node of the resonator; and a circuit (R1, R2) of application of a fixed bias voltage (V gbias) to the front gates (fg) of the first and second transistors, wherein the fixed (V gbias) and variable (V bg) bias voltages are such that the fixed bias voltage (V gbias) is higher or equal than the threshold voltage of the first and second transistors during a start-up phase of the oscillator, and is lower than the voltage threshold of the first and second transistors in steady state, so that the amplifier (303; 503) has a class-A, -B, or -AB biasing during the start-up phase of the oscillator, and has a class-C biasing in steady state, the variation of the threshold voltage of the first and second transistors between the start-up phase and the steady state resulting from the variation of the variable bias voltage (V bg) between said phases.