A display apparatus comprising a scan line (SCn), a data line (Dam), a power driving line (ELVDDL) and a pixel, wherein the pixel comprises a pixel circuit and an organic light-emitting diode (OLED), wherein the pixel circuit comprises a first TFT, a second TFT and a capacitor, wherein the first TFT comprises a source electrode, a drain electrode, a gate electrode and an active layer, the second TFT comprises a source electrode, a drain electrode, a gate electrode and an active layer, the capacitor comprises a first electrode and a second electrode and wherein the pixel circuit comprises: a first conductive layer, wherein the first conductive layer comprises the first electrode of the capacitor; a first insulation layer on the first conductive layer; a second conductive layer in a layer different from the first conductive layer, the second conductive layer being on the first insulation layer, wherein the second conductive layer is the gate electrode of the first TFT; a second insulation layer on the gate electrode of the first TFT and on the gate electrode of the second TFT; and a connection node (CNOD) coupling the first electrode of the capacitor to the gate electrode of the first TFT, wherein the first insulation layer and the second insulation layer have a node contact hole formed by: a first contact hole formed in the first insulation layer and formed in the second insulation layer, the first contact hole being on the first conductive layer; and a second contact hole formed in the second insulation layer, the second contact hole being on the second conductive layer, the second contact hole being integral with the first contact hole and not being separated from the first contact hole by an insulating layer, and wherein at least a portion of the connection node (CNOD) is in the node contact hole, wherein the first conductive layer and the second conductive layer partially overlap at a region in which the node contact hole is located, wherein the gate electrode of the second TFT is on the first insulation layer and is on the same layer as the gate electrode of the first TFT and the scan line, wherein the first conductive layer is in a same layer as the active layer of the first TFT and the active layer of the second TFT and wherein the first conductive layer comprises a same material as the active layer of the first TFT, and wherein the source electrode of the first TFT is coupled to the driving power line, the drain electrode of the first TFT is coupled to the organic light-emitting diode, the source electrode of the second TFT is connected to the data line, the gate electrode of the second TFT is coupled to the scan line, the drain electrode of the second TFT is coupled to the gate electrode of the first TFT and the second electrode of the capacitor is coupled to the driving power line. a first conductive layer, wherein the first conductive layer comprises the first electrode of the capacitor; a first insulation layer on the first conductive layer; a second conductive layer in a layer different from the first conductive layer, the second conductive layer being on the first insulation layer, wherein the second conductive layer is the gate electrode of the first TFT; a second insulation layer on the gate electrode of the first TFT and on the gate electrode of the second TFT; and a connection node (CNOD) coupling the first electrode of the capacitor to the gate electrode of the first TFT, wherein the first insulation layer and the second insulation layer have a node contact hole formed by: a first contact hole formed in the first insulation layer and formed in the second insulation layer, the first contact hole being on the first conductive layer; and a second contact hole formed in the second insulation layer, the second contact hole being on the second conductive layer, the second contact hole being integral with the first contact hole and not being separated from the first contact hole by an insulating layer, and a first contact hole formed in the first insulation layer and formed in the second insulation layer, the first contact hole being on the first conductive layer; and a second contact hole formed in the second insulation layer, the second contact hole being on the second conductive layer, the second contact hole being integral with the first contact hole and not being separated from the first contact hole by an insulating layer, and wherein at least a portion of the connection node (CNOD) is in the node contact hole, wherein the first conductive layer and the second conductive layer partially overlap at a region in which the node contact hole is located, wherein the gate electrode of the second TFT is on the first insulation layer and is on the same layer as the gate electrode of the first TFT and the scan line, wherein the first conductive layer is in a same layer as the active layer of the first TFT and the active layer of the second TFT and wherein the first conductive layer comprises a same material as the active layer of the first TFT, and wherein the source electrode of the first TFT is coupled to the driving power line, the drain electrode of the first TFT is coupled to the organic light-emitting diode, the source electrode of the second TFT is connected to the data line, the gate electrode of the second TFT is coupled to the scan line, the drain electrode of the second TFT is coupled to the gate electrode of the first TFT and the second electrode of the capacitor is coupled to the driving power line.