A semiconductor processing apparatus, comprising: a first chamber portion; and a second chamber portion movable relative to the first chamber portion between an open position and a closed position, wherein when the second chamber portion is in the closed position relative to the first chamber portion, a micro chamber is formed between the first chamber portion and the second chamber portion, the micro chamber configured to house a semiconductor wafer, and when the second chamber portion is in the open position relative to the first chamber portion, the micro chamber is configured for the semiconductor wafer to be transferred into or out of the micro chamber, wherein the first chamber portion comprises a recessed groove formed on an internal surface of the first chamber portion facing the micro chamber, a first through-hole passing through the first chamber portion from an outer side of the first chamber portion and connected to a first location of the recessed groove, and a second through-hole passing through the first chamber portion from the outer side of the first chamber portion and connected to a second location of the recessed groove, and wherein when the second chamber portion is in the closed position relative to the first chamber portion and the semiconductor wafer is housed in the micro chamber, a surface of the semiconductor wafer abuts against the internal surface of the first chamber portion such that the recessed groove is sealed by the surface of the semiconductor wafer to form a closed channel being connected to the outer side of the first chamber portion via the first through-hole, and the second through-hole. a first chamber portion; and a second chamber portion movable relative to the first chamber portion between an open position and a closed position, wherein when the second chamber portion is in the closed position relative to the first chamber portion, a micro chamber is formed between the first chamber portion and the second chamber portion, the micro chamber configured to house a semiconductor wafer, and when the second chamber portion is in the open position relative to the first chamber portion, the micro chamber is configured for the semiconductor wafer to be transferred into or out of the micro chamber, wherein the first chamber portion comprises a recessed groove formed on an internal surface of the first chamber portion facing the micro chamber, a first through-hole passing through the first chamber portion from an outer side of the first chamber portion and connected to a first location of the recessed groove, and a second through-hole passing through the first chamber portion from the outer side of the first chamber portion and connected to a second location of the recessed groove, and wherein when the second chamber portion is in the closed position relative to the first chamber portion and the semiconductor wafer is housed in the micro chamber, a surface of the semiconductor wafer abuts against the internal surface of the first chamber portion such that the recessed groove is sealed by the surface of the semiconductor wafer to form a closed channel being connected to the outer side of the first chamber portion via the first through-hole, and the second through-hole.