A programmable-gain amplifier, including: - two complementary cross-coupled transistor (e.g. MOS) pairs (M n-a, M n-b; M p-a, M p-b) mutually coupled with each transistor in one pair (M n-a resp. M n-b) having a current flow path cascaded with a current flow path of a respective one of the transistors in the other pair (M p-a resp. M p-b) to provide first and second coupling points between said complementary cross-coupled transistor pairs (M n-a, M n-b; M p-a, M p-b); - first (C a) and second (C b) sampling capacitors set between said first and second coupling points, respectively, and ground; - first and second input stages having input terminals for receiving input signals (V in-, V in+) for sampling by said first (C a) and second (C b) sampling capacitors; - switching means (201 to 206; 301, 302) selectively activatable: - i) to couple said first and second input stages to said first (C a) and second (C b) sampling capacitors, whereby said input signals (V in-, V in+) are sampled as sampled signals (V out+, V out-) on said first (C a) and second (C b) sampling capacitors, and - ii) to energize (V dd) said complementary cross-coupled transistor pairs (M n-a, M n-b; M p-a, M p-b) whereby said sampled signals (V out+, V out-) on said first (C a) and second (C b) sampling capacitors undergo negative resistance regeneration growing exponentially over time, thereby providing an exponential amplifier gain. - two complementary cross-coupled transistor (e.g. MOS) pairs (M n-a, M n-b; M p-a, M p-b) mutually coupled with each transistor in one pair (M n-a resp. M n-b) having a current flow path cascaded with a current flow path of a respective one of the transistors in the other pair (M p-a resp. M p-b) to provide first and second coupling points between said complementary cross-coupled transistor pairs (M n-a, M n-b; M p-a, M p-b); - first (C a) and second (C b) sampling capacitors set between said first and second coupling points, respectively, and ground; - first and second input stages having input terminals for receiving input signals (V in-, V in+) for sampling by said first (C a) and second (C b) sampling capacitors; - switching means (201 to 206; 301, 302) selectively activatable: - i) to couple said first and second input stages to said first (C a) and second (C b) sampling capacitors, whereby said input signals (V in-, V in+) are sampled as sampled signals (V out+, V out-) on said first (C a) and second (C b) sampling capacitors, and - ii) to energize (V dd) said complementary cross-coupled transistor pairs (M n-a, M n-b; M p-a, M p-b) whereby said sampled signals (V out+, V out-) on said first (C a) and second (C b) sampling capacitors undergo negative resistance regeneration growing exponentially over time, thereby providing an exponential amplifier gain. - i) to couple said first and second input stages to said first (C a) and second (C b) sampling capacitors, whereby said input signals (V in-, V in+) are sampled as sampled signals (V out+, V out-) on said first (C a) and second (C b) sampling capacitors, and - ii) to energize (V dd) said complementary cross-coupled transistor pairs (M n-a, M n-b; M p-a, M p-b) whereby said sampled signals (V out+, V out-) on said first (C a) and second (C b) sampling capacitors undergo negative resistance regeneration growing exponentially over time, thereby providing an exponential amplifier gain.