A hybrid wafer bonding method, comprising: providing a first semiconductor structure including: a first substrate, a first dielectric layer formed on the first substrate, and a first via structure formed in the first dielectric layer and on the first substrate, wherein: the first via structure includes a first switch element, a first contact via in contact with the first switch element, and first metal impurities doped in the first contact via, the first contact via having a first contact via surface; wherein an orthogonal projection of the first contact via on the first substrate is greater than an orthogonal projection of the first switch element on the first substrate; and providing a second semiconductor structure including: a second substrate, a second dielectric layer formed on the second substrate, and a second via structure formed in the second dielectric layer and on the second substrate, wherein: the second via structure includes a second switch element, a second contact via in contact with the second switch element, and second metal impurities doped in the second contact via, the second contact via having a second contact via surface; wherein an orthogonal projection of the second contact via on the second substrate is greater than an orthogonal projection of the second switch element on the second substrate; bonding the first semiconductor structure with the second semiconductor structure by attaching the first contact via surface with the second contact via surface, wherein the second contact via surface and the first contact via surface have different surface areas and have an overlapped interface; and forming a self-barrier layer on a non-overlapped surface of one or more of the first and second contact via surfaces by an alloying process between the first semiconductor structure and the second semiconductor structure, wherein the self-barrier layer is formed by a multi-component oxide corresponding to the first and second metal impurities. providing a first semiconductor structure including: a first substrate, a first dielectric layer formed on the first substrate, and a first via structure formed in the first dielectric layer and on the first substrate, wherein: the first via structure includes a first switch element, a first contact via in contact with the first switch element, and first metal impurities doped in the first contact via, the first contact via having a first contact via surface; wherein an orthogonal projection of the first contact via on the first substrate is greater than an orthogonal projection of the first switch element on the first substrate; and providing a second semiconductor structure including: a second substrate, a second dielectric layer formed on the second substrate, and a second via structure formed in the second dielectric layer and on the second substrate, wherein: the second via structure includes a second switch element, a second contact via in contact with the second switch element, and second metal impurities doped in the second contact via, the second contact via having a second contact via surface; wherein an orthogonal projection of the second contact via on the second substrate is greater than an orthogonal projection of the second switch element on the second substrate; bonding the first semiconductor structure with the second semiconductor structure by attaching the first contact via surface with the second contact via surface, wherein the second contact via surface and the first contact via surface have different surface areas and have an overlapped interface; and forming a self-barrier layer on a non-overlapped surface of one or more of the first and second contact via surfaces by an alloying process between the first semiconductor structure and the second semiconductor structure, wherein the self-barrier layer is formed by a multi-component oxide corresponding to the first and second metal impurities.