A method for performing write and read operations on a gain cell, said gain cell comprising: a write bit line input connected to a write bit line; a read bit line output connected to a read bit line; a write trigger input connected to a write word line; a read trigger input connected to a read word line; a write transistor, comprising a first diffusion connection, a gate connection, and a second diffusion connection, said first diffusion connection being connected to said write bit line input and said gate connection being connected to said write trigger input; a read transistor, comprising a first diffusion connection, a gate connection and a second diffusion connection, said first diffusion connection being connected to said read bit line output and said second diffusion connection being connected to said read trigger input; a retention element associated with said write transistor and said read transistor, comprising: a buffer switch, having a buffer input, a buffer output and a buffer control input; and a feedback switch associated with said buffer switch, having a feedback input connected to a constant voltage, a feedback output and a feedback control input; wherein said buffer input is connected to said second diffusion connection of said write transistor and to said feedback output, and said buffer output is connected to said gate connection of said read transistor and to said feedback control input, and said buffer control input is connected to said write word line, and wherein said feedback switch connects said feedback input and said feedback output when said feedback control input is at a first data level and disconnects said feedback input and said feedback output when said feedback control input is at a second data level, said method comprising: writing to said gain cell by applying a data signal to said write bit line input and connecting said write bit line input to said gate of said read transistor via said write transistor and said buffer switch 410 using said write trigger input; and reading from said gain cell by charging said read bit line by applying a pulsed control signal to said read bit line input, and, subsequent to said pulsed control signal, setting said read trigger input to an opposite level than said charged read bit line. a write bit line input connected to a write bit line; a read bit line output connected to a read bit line; a write trigger input connected to a write word line; a read trigger input connected to a read word line; a write transistor, comprising a first diffusion connection, a gate connection, and a second diffusion connection, said first diffusion connection being connected to said write bit line input and said gate connection being connected to said write trigger input; a read transistor, comprising a first diffusion connection, a gate connection and a second diffusion connection, said first diffusion connection being connected to said read bit line output and said second diffusion connection being connected to said read trigger input; a retention element associated with said write transistor and said read transistor, comprising: a buffer switch, having a buffer input, a buffer output and a buffer control input; and a feedback switch associated with said buffer switch, having a feedback input connected to a constant voltage, a feedback output and a feedback control input; a buffer switch, having a buffer input, a buffer output and a buffer control input; and a feedback switch associated with said buffer switch, having a feedback input connected to a constant voltage, a feedback output and a feedback control input; and wherein said feedback switch connects said feedback input and said feedback output when said feedback control input is at a first data level and disconnects said feedback input and said feedback output when said feedback control input is at a second data level, said method comprising: writing to said gain cell by applying a data signal to said write bit line input and connecting said write bit line input to said gate of said read transistor via said write transistor and said buffer switch 410 using said write trigger input; and reading from said gain cell by charging said read bit line by applying a pulsed control signal to said read bit line input, and, subsequent to said pulsed control signal, setting said read trigger input to an opposite level than said charged read bit line. writing to said gain cell by applying a data signal to said write bit line input and connecting said write bit line input to said gate of said read transistor via said write transistor and said buffer switch 410 using said write trigger input; and reading from said gain cell by charging said read bit line by applying a pulsed control signal to said read bit line input, and, subsequent to said pulsed control signal, setting said read trigger input to an opposite level than said charged read bit line.