An electrostatic discharge protection device, the ESD protection device comprising: a first PNP bipolar transistor (412, 1312) connected between a high voltage terminal and a ground terminal, wherein a drain terminal of an NMOS device to be protected is connectable to the high voltage terminal (422; 122), and wherein a body of the NMOS device to be protected is connectable to the ground terminal, wherein the base of the first PNP bipolar transistor (412, 1312) is connected to the emitter of the first PNP bipolar transistor (412, 1312) by a short circuit or a resistor, and wherein the collector of the first PNP bipolar transistor is connected to the ground terminal; a second PNP bipolar transistor connected in series with the first PNP bipolar transistor and arranged with the first PNP bipolar transistor device to allow current to flow between the high voltage terminal and the ground terminal, wherein the base of the second PNP bipolar transistor is connected to the emitter of the second PNP bipolar transistor by a short circuit or a resistor, wherein the emitter of the second PNP bipolar transistor (414, 1314) is connected to the high voltage terminal, and wherein the collector of the second PNP bipolar transistor (414, 1314) is connected to the emitter of the first PNP bipolar transistor (412, 1312); and a diode device connected between the ground terminal and a low voltage terminal, wherein the diode device comprises a diode; wherein the cathode of the diode is connected to the low voltage terminal and wherein the anode of the diode is connected to the ground terminal, wherein a source terminal of the NMOS device to be protected is connectable to the low voltage terminal; and wherein the diode device and the first PNP bipolar transistor are configured to form a parasitic silicon controlled rectifier. a first PNP bipolar transistor (412, 1312) connected between a high voltage terminal and a ground terminal, wherein a drain terminal of an NMOS device to be protected is connectable to the high voltage terminal (422; 122), and wherein a body of the NMOS device to be protected is connectable to the ground terminal, wherein the base of the first PNP bipolar transistor (412, 1312) is connected to the emitter of the first PNP bipolar transistor (412, 1312) by a short circuit or a resistor, and wherein the collector of the first PNP bipolar transistor is connected to the ground terminal; a second PNP bipolar transistor connected in series with the first PNP bipolar transistor and arranged with the first PNP bipolar transistor device to allow current to flow between the high voltage terminal and the ground terminal, wherein the base of the second PNP bipolar transistor is connected to the emitter of the second PNP bipolar transistor by a short circuit or a resistor, wherein the emitter of the second PNP bipolar transistor (414, 1314) is connected to the high voltage terminal, and wherein the collector of the second PNP bipolar transistor (414, 1314) is connected to the emitter of the first PNP bipolar transistor (412, 1312); and a diode device connected between the ground terminal and a low voltage terminal, wherein the diode device comprises a diode; wherein the cathode of the diode is connected to the low voltage terminal and wherein the anode of the diode is connected to the ground terminal, wherein a source terminal of the NMOS device to be protected is connectable to the low voltage terminal; and wherein the diode device and the first PNP bipolar transistor are configured to form a parasitic silicon controlled rectifier.