A monolithic microwave integrated circuit low noise amplifier comprising: a substrate; an input port (RF_IN) on the substrate for receiving an input signal to be amplified; a first Group III-nitride based transistor on the substrate, the first Group III-nitride based transistor having a gate coupled to the input port and a source coupled to ground, wherein the first Group III-nitride based transistor is configured to provide a first stage of amplification to the input signal; a second Group III-nitride based transistor on the substrate, the second Group III-nitride based transistor having a gate coupled to a drain of the first Group III-nitride based transistor and a source coupled to ground, wherein the second Group III-nitride based transistor is configured to provide a second stage of amplification to the input signal; an output port (RF_OUT) on the substrate and coupled to a drain of the second Group III-nitride based transistor, wherein at least one of the first and second Group III-nitride based transistors comprises two field plates (32, 44), wherein the two field plates comprise a first field plate and a second field plate that is electrically isolated from the first field plate; an input network coupled between the input port and the first Group III-nitride based transistor; a first gate bias port coupled to the gate of the first Group III-nitride based transistor; a first drain bias port coupled to a drain of the first Group III-nitride based transistor; a second gate bias port coupled to the gate of the second Group III-nitride based transistor; a second drain bias port coupled to the drain of the second Group III-nitride based transistor; an interstage network coupled between the first Group III-nitride based transistor and the second Group III-nitride based transistor; and and an output network coupled between the second Group III-nitride based transistor and the output port, wherein the first Group III-nitride transistor has a gate periphery less than 1 mm, and the second Group III-nitride transistor has a gate periphery greater than 1 mm. a substrate; an input port (RF_IN) on the substrate for receiving an input signal to be amplified; a first Group III-nitride based transistor on the substrate, the first Group III-nitride based transistor having a gate coupled to the input port and a source coupled to ground, wherein the first Group III-nitride based transistor is configured to provide a first stage of amplification to the input signal; a second Group III-nitride based transistor on the substrate, the second Group III-nitride based transistor having a gate coupled to a drain of the first Group III-nitride based transistor and a source coupled to ground, wherein the second Group III-nitride based transistor is configured to provide a second stage of amplification to the input signal; an output port (RF_OUT) on the substrate and coupled to a drain of the second Group III-nitride based transistor, wherein at least one of the first and second Group III-nitride based transistors comprises two field plates (32, 44), wherein the two field plates comprise a first field plate and a second field plate that is electrically isolated from the first field plate; an input network coupled between the input port and the first Group III-nitride based transistor; a first gate bias port coupled to the gate of the first Group III-nitride based transistor; a first drain bias port coupled to a drain of the first Group III-nitride based transistor; a second gate bias port coupled to the gate of the second Group III-nitride based transistor; a second drain bias port coupled to the drain of the second Group III-nitride based transistor; an interstage network coupled between the first Group III-nitride based transistor and the second Group III-nitride based transistor; and and an output network coupled between the second Group III-nitride based transistor and the output port, wherein the first Group III-nitride transistor has a gate periphery less than 1 mm, and the second Group III-nitride transistor has a gate periphery greater than 1 mm.