A liquid crystal display, comprising: a liquid crystal panel assembly comprising a plurality of pixels; a signal controller configured to generate image data signals so that among the data voltages applied to the plurality of pixels to display images in one frame, using an asymmetrical gamma correction, a first data voltage relating to a first gray level (Black) of the image data signal is shifted from a first original data voltage by a first value, a second data voltage relating to a second gray level (Gray) of the image data signal is shifted from a second original data voltage by a second value, and a third data voltage relating to a third gray level (White) of the image data signal is shifted from a third original data voltage by a third value; a data driver configured to apply the data voltages to a plurality of data lines (D1-Dm) connected to the plurality of pixels, wherein the polarity of the data voltage applied to each pixel is opposite to the polarity in the previous frame; and a common voltage generator configured to provide a first common voltage optimal for the third data voltage as an actual common voltage to the liquid crystal panel assembly when the temperature of the liquid crystal panel assembly is lower than a reference temperature and providing a second common voltage optimal for the first data voltage or the second data voltage as an actual common voltage to the liquid crystal panel assembly when the temperature of the liquid crystal panel assembly is higher than or equal to the reference temperature; wherein the first value is a value obtained by adding a first dummy value to a first offset value, wherein the first data voltage is compensated by applying the offset value in advance according to a kickback voltage of the first data voltage, wherein the second value is a value obtained by adding a second dummy value to a second offset value, wherein the second data voltage is compensated by applying the offset value in advance according to a kickback voltage of the second data voltage, and wherein the third value is a third offset value corresponding to a kickback voltage of the third data voltage. a liquid crystal panel assembly comprising a plurality of pixels; a signal controller configured to generate image data signals so that among the data voltages applied to the plurality of pixels to display images in one frame, using an asymmetrical gamma correction, a first data voltage relating to a first gray level (Black) of the image data signal is shifted from a first original data voltage by a first value, a second data voltage relating to a second gray level (Gray) of the image data signal is shifted from a second original data voltage by a second value, and a third data voltage relating to a third gray level (White) of the image data signal is shifted from a third original data voltage by a third value; a data driver configured to apply the data voltages to a plurality of data lines (D1-Dm) connected to the plurality of pixels, wherein the polarity of the data voltage applied to each pixel is opposite to the polarity in the previous frame; and a common voltage generator configured to provide a first common voltage optimal for the third data voltage as an actual common voltage to the liquid crystal panel assembly when the temperature of the liquid crystal panel assembly is lower than a reference temperature and providing a second common voltage optimal for the first data voltage or the second data voltage as an actual common voltage to the liquid crystal panel assembly when the temperature of the liquid crystal panel assembly is higher than or equal to the reference temperature; wherein the first value is a value obtained by adding a first dummy value to a first offset value, wherein the first data voltage is compensated by applying the offset value in advance according to a kickback voltage of the first data voltage, wherein the second value is a value obtained by adding a second dummy value to a second offset value, wherein the second data voltage is compensated by applying the offset value in advance according to a kickback voltage of the second data voltage, and wherein the third value is a third offset value corresponding to a kickback voltage of the third data voltage.