A method for indexing a plurality of dice obtainable from a material wafer comprising a plurality of stacked material layers, each die being obtained in a respective position of the wafer, the plurality of dice being obtained by means of a manufacturing process performed in at least one manufacturing stage using at least one lithographic mask for treating a surface of the material wafer through an exposition to a radiation, said at least one manufacturing stage comprising at least two steps for treating a respective superficial portion of the material wafer that corresponds to a subset of said plurality of dice using the at least one lithographic mask through the exposition to the radiation in temporal succession, the method including providing a die index on each die which is indicative of the position of the respective die, said providing a die index on each die comprising forming an external index indicative of the position of the superficial portion of the material wafer corresponding to the subset of the plurality of dice including said die, said forming the external index comprising: - forming in a set of material layers of the die a first reference structure indicative of the position on the material wafer of the superficial portion of the wafer corresponding to the subset of the plurality of dice including said die, said position of the superficial portion being associated with a corresponding pair of first coordinate and second coordinate values, said first reference structure comprising a first array of electronic components (215(i)) associated with the first coordinate, and a second array of electronic components (235(j)) associated with the second coordinate, the electronic components of the first array being electrically coupled to each other by means of a first common line, and the electronic components of the second array being electrically coupled to each other by means of a second common line, wherein each one of said electronic components are either transistors or resistors, wherein each transistor of the first array has its control terminal connected to the first common line, its first conduction terminal connected to a first biasing line for receiving a supply voltage (Vdd) and its second conduction terminal connected to a reference line for receiving a reference voltage, one end of the first common line being connected to the first biasing line and the other end of the first common line being connected to the reference line, and each transistor of the second array having its control terminal connected to the second common line, its first conduction terminal connected to a second biasing line for receiving a supply voltage and its second conduction terminal connected to the reference line for receiving the reference voltage, one end of the second common line being connected to the second biasing line and the other end of the second common line being connected to the reference line, wherein each resistor of the first array has its first conduction terminal connected to the first common line for receiving a supply voltage (Vdd) and its second conduction terminal connected to a reference line for receiving a reference voltage, and each resistor of the second array has its first conduction terminal connected to the second common line for receiving a supply voltage (Vdd) and its second conduction terminal connected to the reference line for receiving the reference voltage, the resistors having all the same resistance value; - interrupting the first common line at a location based on the first coordinate value associated with said position of the superficial portion, and - interrupting the second common line at a location based on the second coordinate value associated with said position of the superficial portion. - forming in a set of material layers of the die a first reference structure indicative of the position on the material wafer of the superficial portion of the wafer corresponding to the subset of the plurality of dice including said die, said position of the superficial portion being associated with a corresponding pair of first coordinate and second coordinate values, said first reference structure comprising a first array of electronic components (215(i)) associated with the first coordinate, and a second array of electronic components (235(j)) associated with the second coordinate, the electronic components of the first array being electrically coupled to each other by means of a first common line, and the electronic components of the second array being electrically coupled to each other by means of a second common line, - interrupting the first common line at a location based on the first coordinate value associated with said position of the superficial portion, and - interrupting the second common line at a location based on the second coordinate value associated with said position of the superficial portion.