Optoelectronic device, comprising: o a photonic interposer, having an upper face and an opposite, lower face, produced based on silicon, and comprising: • a photonic circuit (14.1) containing at least one active optical component (14.2), and • an upper interconnect layer, defining the upper face, and comprising at least one first upper conductive control portion (11.2); o at least one first microelectronic chip, joined to the upper face and connected to the first upper conductive control portion (11.2), intended to transmit or receive an electrical signal to or from a second microelectronic chip; o the second microelectronic chip, called electro-optical conversion chip, joined and connected to the photonic interposer, which provides the electrical connection of the second microelectronic chip to the active optical component (14.2), on the one hand, and to the first microelectronic chip, on the other hand; o characterized in that: o the photonic interposer comprises: • a lower interconnect layer, defining the lower face, comprising at least one first lower conductive control portion (17.2), and first lower conductive intermediate portions (17.3); • at least one through-silicon via (18.1) directly connecting the first upper conductive control portion (11.2) to the first lower conductive control portion (17.2); • conductive vias (15.1) connecting the first lower conductive intermediate portions (17.3) to the active optical component (14.2); o the second microelectronic chip is joined to the lower face, and is connected to the first lower conductive control portion (17.2), on the one hand, and to the first lower conductive intermediate portions (17.3), on the other hand. o a photonic interposer, having an upper face and an opposite, lower face, produced based on silicon, and comprising: • a photonic circuit (14.1) containing at least one active optical component (14.2), and • an upper interconnect layer, defining the upper face, and comprising at least one first upper conductive control portion (11.2); • a photonic circuit (14.1) containing at least one active optical component (14.2), and • an upper interconnect layer, defining the upper face, and comprising at least one first upper conductive control portion (11.2); o at least one first microelectronic chip, joined to the upper face and connected to the first upper conductive control portion (11.2), intended to transmit or receive an electrical signal to or from a second microelectronic chip; o the second microelectronic chip, called electro-optical conversion chip, joined and connected to the photonic interposer, which provides the electrical connection of the second microelectronic chip to the active optical component (14.2), on the one hand, and to the first microelectronic chip, on the other hand; o characterized in that: o the photonic interposer comprises: • a lower interconnect layer, defining the lower face, comprising at least one first lower conductive control portion (17.2), and first lower conductive intermediate portions (17.3); • at least one through-silicon via (18.1) directly connecting the first upper conductive control portion (11.2) to the first lower conductive control portion (17.2); • conductive vias (15.1) connecting the first lower conductive intermediate portions (17.3) to the active optical component (14.2); o the second microelectronic chip is joined to the lower face, and is connected to the first lower conductive control portion (17.2), on the one hand, and to the first lower conductive intermediate portions (17.3), on the other hand. o the photonic interposer comprises: • a lower interconnect layer, defining the lower face, comprising at least one first lower conductive control portion (17.2), and first lower conductive intermediate portions (17.3); • at least one through-silicon via (18.1) directly connecting the first upper conductive control portion (11.2) to the first lower conductive control portion (17.2); • conductive vias (15.1) connecting the first lower conductive intermediate portions (17.3) to the active optical component (14.2); • a lower interconnect layer, defining the lower face, comprising at least one first lower conductive control portion (17.2), and first lower conductive intermediate portions (17.3); • at least one through-silicon via (18.1) directly connecting the first upper conductive control portion (11.2) to the first lower conductive control portion (17.2); • conductive vias (15.1) connecting the first lower conductive intermediate portions (17.3) to the active optical component (14.2); o the second microelectronic chip is joined to the lower face, and is connected to the first lower conductive control portion (17.2), on the one hand, and to the first lower conductive intermediate portions (17.3), on the other hand.