A semiconductor device comprising: a first plurality of first through sixth field effect transistors, FETs, (102, 104, 108, 110, 112, 114) interconnected as a first double-balanced mixer coupled to a radio frequency signal, an intermediate frequency signal, a local oscillator signal, an inverted LO signal, an inverted RF signal, and an inverted IF signal; and characterised in that the semiconductor device further comprises: a second plurality of seventh through twelfth FETs (202, 204, 208, 210, 212, 214), each of the first through sixth FETs forming a pair with a respective one of the seventh through twelfth FETs, where each pair forms an interleaved device on a substrate wherein the interleaved device forms a single device with a common drain and separate gates and separate sources or a single device with a common source and separate gates and separate drains and wherein the second plurality of FETs is interconnected as an inverted double- balanced mixer, the first through twelfth FET's having first through twelfth gate terminals, first through twelfth source terminals, and first through twelfth drain terminals, respectively, wherein the first, third, seventh, and ninth drain terminals are coupled to the RF signal, the second, fourth, eighth, and tenth drain terminals are coupled to the inverted RF signal, the first, fourth, eighth, and ninth gate terminals are coupled to the LO signal, the second, third, seventh, and tenth gate terminals are coupled to the inverted LO signal, the first and second source terminals are coupled to the fifth drain terminal, the seventh and eighth source terminals are coupled to the eleventh drain terminal, the third and fourth source terminals are coupled to the sixth drain terminal, the ninth and tenth source terminals are coupled to the twelfth drain terminal, the fifth and twelfth gate terminals are coupled to the IF signal, the sixth and eleventh terminals are coupled to the inverted IF signal, wherein the fifth and eleventh as well as the sixth and twelfth FETs form matched pairs and the fifth, sixth, eleventh, and twelfth source terminals are tied together and to a current source; wherein a LO leakage signal in an output signal of the semiconductor device is removed. a second plurality of seventh through twelfth FETs (202, 204, 208, 210, 212, 214), each of the first through sixth FETs forming a pair with a respective one of the seventh through twelfth FETs, where each pair forms an interleaved device on a substrate wherein the interleaved device forms a single device with a common drain and separate gates and separate sources or a single device with a common source and separate gates and separate drains and wherein the second plurality of FETs is interconnected as an inverted double- balanced mixer, the first through twelfth FET's having first through twelfth gate terminals, first through twelfth source terminals, and first through twelfth drain terminals, respectively, wherein the first, third, seventh, and ninth drain terminals are coupled to the RF signal, the second, fourth, eighth, and tenth drain terminals are coupled to the inverted RF signal, the first, fourth, eighth, and ninth gate terminals are coupled to the LO signal, the second, third, seventh, and tenth gate terminals are coupled to the inverted LO signal, the first and second source terminals are coupled to the fifth drain terminal, the seventh and eighth source terminals are coupled to the eleventh drain terminal, the third and fourth source terminals are coupled to the sixth drain terminal, the ninth and tenth source terminals are coupled to the twelfth drain terminal, the fifth and twelfth gate terminals are coupled to the IF signal, the sixth and eleventh terminals are coupled to the inverted IF signal, wherein the fifth and eleventh as well as the sixth and twelfth FETs form matched pairs and the fifth, sixth, eleventh, and twelfth source terminals are tied together and to a current source; wherein a LO leakage signal in an output signal of the semiconductor device is removed.