A method for fault current limiting and bridge-arm current suppression for VSC-HVDC, comprising the following step: step 1: extracting an equivalent inductance L eq and an equivalent capacitance C eq of a converter, an inductance value L d of a DC smoothing reactor, a rated DC voltage U dcN, a proportional parameter k p and an integral parameter k i of a current inner loop PI controller, a DC current real-time value i dc, and a DC current reference value i dcref; characterized in that it further comprises the following steps: step 2: setting a corner frequency f z of a DC current suppression control according to a fault current suppression requirement, and calculating a switching coefficient K c = 1 i dc − i dcref ⋅ sT a + 1 + 1 sT b / i dc − i dcref of the converter, where T a = 1 2 πƒ z, T b = 2 πf z C eq L dc, L dc = L eq +2 L d, T a is a differential coefficient, s is a Laplace operator, T b is an integral coefficient, and L dc is an integrated inductance; step 3: in an inner loop current control stage, adding a bridge-arm current suppression control to a reference current input point of a d axis, wherein a time constant of the bridge-arm current suppression control is T d = k p k i, where k p and k i are parameters of the inner loop PI controller, respectively; step 4: unlocking a converter station to enable a VSC-HVDC system to operate stably; step 5: setting a DC pole-to-pole fault to occur; when a rising rate of a DC current is detected to exceed U dcN /2 L dc, triggering the DC suppression control, and changing the initial switching coefficient of the converter to a calculated adaptive switching coefficient K c; meanwhile, adding the bridge-arm current suppression control to reduce a bridge-arm current by suppressing an AC current component; after a delay, breaking a fault current by a DC circuit breaker and isolating the fault; and after the fault is isolated, exiting operation of the two controls; and step 6: after a predetermined deionization time, reclosing the DC circuit breaker to enable the system to resume operation. step 1: extracting an equivalent inductance L eq and an equivalent capacitance C eq of a converter, an inductance value L d of a DC smoothing reactor, a rated DC voltage U dcN, a proportional parameter k p and an integral parameter k i of a current inner loop PI controller, a DC current real-time value i dc, and a DC current reference value i dcref; characterized in that it further comprises the following steps: step 2: setting a corner frequency f z of a DC current suppression control according to a fault current suppression requirement, and calculating a switching coefficient K c = 1 i dc − i dcref ⋅ sT a + 1 + 1 sT b / i dc − i dcref of the converter, where T a = 1 2 πƒ z, T b = 2 πf z C eq L dc, L dc = L eq +2 L d, T a is a differential coefficient, s is a Laplace operator, T b is an integral coefficient, and L dc is an integrated inductance; step 3: in an inner loop current control stage, adding a bridge-arm current suppression control to a reference current input point of a d axis, wherein a time constant of the bridge-arm current suppression control is T d = k p k i, where k p and k i are parameters of the inner loop PI controller, respectively; step 4: unlocking a converter station to enable a VSC-HVDC system to operate stably; step 5: setting a DC pole-to-pole fault to occur; when a rising rate of a DC current is detected to exceed U dcN /2 L dc, triggering the DC suppression control, and changing the initial switching coefficient of the converter to a calculated adaptive switching coefficient K c; meanwhile, adding the bridge-arm current suppression control to reduce a bridge-arm current by suppressing an AC current component; after a delay, breaking a fault current by a DC circuit breaker and isolating the fault; and after the fault is isolated, exiting operation of the two controls; and step 6: after a predetermined deionization time, reclosing the DC circuit breaker to enable the system to resume operation. step 2: setting a corner frequency f z of a DC current suppression control according to a fault current suppression requirement, and calculating a switching coefficient K c = 1 i dc − i dcref ⋅ sT a + 1 + 1 sT b / i dc − i dcref of the converter, where T a = 1 2 πƒ z, T b = 2 πf z C eq L dc, L dc = L eq +2 L d, T a is a differential coefficient, s is a Laplace operator, T b is an integral coefficient, and L dc is an integrated inductance; step 3: in an inner loop current control stage, adding a bridge-arm current suppression control to a reference current input point of a d axis, wherein a time constant of the bridge-arm current suppression control is T d = k p k i, where k p and k i are parameters of the inner loop PI controller, respectively; step 4: unlocking a converter station to enable a VSC-HVDC system to operate stably; step 5: setting a DC pole-to-pole fault to occur; when a rising rate of a DC current is detected to exceed U dcN /2 L dc, triggering the DC suppression control, and changing the initial switching coefficient of the converter to a calculated adaptive switching coefficient K c; meanwhile, adding the bridge-arm current suppression control to reduce a bridge-arm current by suppressing an AC current component; after a delay, breaking a fault current by a DC circuit breaker and isolating the fault; and after the fault is isolated, exiting operation of the two controls; and step 6: after a predetermined deionization time, reclosing the DC circuit breaker to enable the system to resume operation.