A computer-implemented method for creating a metrology target structure design for a reticle layout, characterised in that it comprises the steps of: • generating one or more initial metrology target structure designs using a set of rules selected based on one or more parameters describing one or more metrology processes, that will be used to measure a metrology target structure on a wafer; • simulating how one or more initial metrology target structures will be formed on the wafer using input, wherein the input comprises • one or more fabrication processes that will be used to form said metrology target structure on the wafer and • said one or more initial metrology target structure designs, wherein said simulating comprises simulating how said one or more initial metrology target structures will be formed on the wafer at different values of one or more parameters of said one or more fabrication processes; and • creating said metrology target structure design which comprises • determining a process window for said one or more initial metrology target structure designs based on the results of said simulating, • comparing the process window for said one or more initial metrology target structure designs to a process window for device structures to be formed on the wafer using said one or more fabrication processes, and • selecting the metrology target structure design based on said one or more initial metrology target structure designs that have a process window that is larger than the process window for the device structures. • generating one or more initial metrology target structure designs using a set of rules selected based on one or more parameters describing one or more metrology processes, that will be used to measure a metrology target structure on a wafer; • simulating how one or more initial metrology target structures will be formed on the wafer using input, wherein the input comprises • one or more fabrication processes that will be used to form said metrology target structure on the wafer and • said one or more initial metrology target structure designs, wherein said simulating comprises simulating how said one or more initial metrology target structures will be formed on the wafer at different values of one or more parameters of said one or more fabrication processes; and • one or more fabrication processes that will be used to form said metrology target structure on the wafer and • said one or more initial metrology target structure designs, • creating said metrology target structure design which comprises • determining a process window for said one or more initial metrology target structure designs based on the results of said simulating, • comparing the process window for said one or more initial metrology target structure designs to a process window for device structures to be formed on the wafer using said one or more fabrication processes, and • selecting the metrology target structure design based on said one or more initial metrology target structure designs that have a process window that is larger than the process window for the device structures. • determining a process window for said one or more initial metrology target structure designs based on the results of said simulating, • comparing the process window for said one or more initial metrology target structure designs to a process window for device structures to be formed on the wafer using said one or more fabrication processes, and • selecting the metrology target structure design based on said one or more initial metrology target structure designs that have a process window that is larger than the process window for the device structures.