A system comprising: a microcomputer comprising a microprocessor unit and a first memory unit, said microprocessor unit comprising at least one functional unit having memory accesses of single words and at least one register, wherein said at least one register is a wide register comprising a plurality of second memory units which are capable to each contain one word, said wide register being adapted so that said second memory units can simultaneously read a plurality of words from or write a plurality of words to said first memory unit, and at least part of said second memory units are separately accessible by said at least one functional unit, wherein said first memory unit is an embedded non-volatile memory unit; and, a compiler for converting application code into execution code adapted for execution on the microcomputer, said compiler comprising - means to receive application code, the application code including memory access operations, - means to convert the application code such that the memory access operations are translated into irregular and regular memory accesses (a) read operations comprising simultaneously reading of a plurality of words from the first memory unit and simultaneously writing the plurality of words into the register, (b) write operations comprising simultaneously reading a plurality of words from the register and simultaneously writing the plurality of words into the first memory unit, and whereby a reorganized mapping of array indices for the regular and irregular memory accesses towards read operations and write operations is performed, whereby the irregular memory accesses are dominating in the read operations and the regular memory accesses are dominating in the write operations. a microcomputer comprising a microprocessor unit and a first memory unit, said microprocessor unit comprising at least one functional unit having memory accesses of single words and at least one register, wherein said at least one register is a wide register comprising a plurality of second memory units which are capable to each contain one word, said wide register being adapted so that said second memory units can simultaneously read a plurality of words from or write a plurality of words to said first memory unit, and at least part of said second memory units are separately accessible by said at least one functional unit, wherein said first memory unit is an embedded non-volatile memory unit; and, a compiler for converting application code into execution code adapted for execution on the microcomputer, said compiler comprising - means to receive application code, the application code including memory access operations, - means to convert the application code such that the memory access operations are translated into irregular and regular memory accesses (a) read operations comprising simultaneously reading of a plurality of words from the first memory unit and simultaneously writing the plurality of words into the register, (b) write operations comprising simultaneously reading a plurality of words from the register and simultaneously writing the plurality of words into the first memory unit, - means to receive application code, the application code including memory access operations, - means to convert the application code such that the memory access operations are translated into irregular and regular memory accesses (a) read operations comprising simultaneously reading of a plurality of words from the first memory unit and simultaneously writing the plurality of words into the register, (b) write operations comprising simultaneously reading a plurality of words from the register and simultaneously writing the plurality of words into the first memory unit, (a) read operations comprising simultaneously reading of a plurality of words from the first memory unit and simultaneously writing the plurality of words into the register, (b) write operations comprising simultaneously reading a plurality of words from the register and simultaneously writing the plurality of words into the first memory unit, and whereby a reorganized mapping of array indices for the regular and irregular memory accesses towards read operations and write operations is performed, whereby the irregular memory accesses are dominating in the read operations and the regular memory accesses are dominating in the write operations.