A signal receiver, comprising: an antenna interface configured to receive signals from an antenna; a calibration signal generator, coupled to the antenna interface, configured to inject a calibration signal at the antenna interface; analog signal processing circuitry (208a-208c) coupled to the antenna interface configured to process the received signals to produce filtered signals; sampling circuitry (210a-210c) configured to sample the filtered signals so as to produce digitized received signals; a digital compensator (212a-212c) configured to receive the digitized received signals, to signals and compensate for non-uniform group delay and amplitude distortion introduced by the analog signal processing circuitry (208a-208c) and to produce compensated digitized received signals; and a digital processor configured to process the compensated digitized received signals so as to produce a result, wherein the calibration signal generator is configured to produce the calibration signal which includes a time domain signal corresponding to orthogonal frequency components in a predefined range of frequencies, the duration or period of the time domain signal being equal to, or an integral multiple of, the inverse of the frequency spacing between the orthogonal frequency components, and wherein the digital processor is configured to configure the digital compensator (212a-212c) in accordance with phase and amplitude values produced by a Fourier transform of signals received by the digital compensator (212a-212c) in response to injection of the calibration signal at the antenna interface, the Fourier transform producing the phase and amplitude values for a plurality of frequencies corresponding to the orthogonal frequency components of the calibration signal, characterized in that the digital processor includes control instructions for controlling the calibration signal generator to inject the calibration signal after fixed or variable intervals of time at the antenna interface such that the average calibration signal power is kept lower than a value corresponding to the broadband noise floor of the signal receiver that would cause a gain control circuit of the signal receiver to change its gain settings and that the digital processor includes control instructions for controlling configuration of the digital compensator in accordance with the digitized received signals received in response to the injection of the calibration signal at the antenna interface. an antenna interface configured to receive signals from an antenna; a calibration signal generator, coupled to the antenna interface, configured to inject a calibration signal at the antenna interface; analog signal processing circuitry (208a-208c) coupled to the antenna interface configured to process the received signals to produce filtered signals; sampling circuitry (210a-210c) configured to sample the filtered signals so as to produce digitized received signals; a digital compensator (212a-212c) configured to receive the digitized received signals, to signals and compensate for non-uniform group delay and amplitude distortion introduced by the analog signal processing circuitry (208a-208c) and to produce compensated digitized received signals; and a digital processor configured to process the compensated digitized received signals so as to produce a result, wherein the calibration signal generator is configured to produce the calibration signal which includes a time domain signal corresponding to orthogonal frequency components in a predefined range of frequencies, the duration or period of the time domain signal being equal to, or an integral multiple of, the inverse of the frequency spacing between the orthogonal frequency components, and wherein the digital processor is configured to configure the digital compensator (212a-212c) in accordance with phase and amplitude values produced by a Fourier transform of signals received by the digital compensator (212a-212c) in response to injection of the calibration signal at the antenna interface, the Fourier transform producing the phase and amplitude values for a plurality of frequencies corresponding to the orthogonal frequency components of the calibration signal, characterized in that the digital processor includes control instructions for controlling the calibration signal generator to inject the calibration signal after fixed or variable intervals of time at the antenna interface such that the average calibration signal power is kept lower than a value corresponding to the broadband noise floor of the signal receiver that would cause a gain control circuit of the signal receiver to change its gain settings and that the digital processor includes control instructions for controlling configuration of the digital compensator in accordance with the digitized received signals received in response to the injection of the calibration signal at the antenna interface.