An apparatus comprising: - an interconnect fabric comprising one or more switches; - a memory interface coupled to the interconnect fabric; - an input/output, I/O, interface coupled to the interconnect fabric; - an array of processing clusters coupled to the interconnect fabric, the array of processing clusters configured to process mixed-precision instructions, wherein the mixed-precision dot-product instructions are primitives of a machine learning framework. at least one processing cluster (214A,..., 214N) comprising: -- a plurality of registers configured to store a plurality of packed data elements at a first precision; and characterized in that: -- an execution unit is configured to execute mixed-precision dot-product instructions, the execution unit is configured to perform a plurality of multiplications of different pairs of the plurality of packed data elements to generate a corresponding plurality of products and to add the corresponding plurality of products to an accumulation value stored at a second precision greater than the first precision in an accumulator register. - an interconnect fabric comprising one or more switches; - a memory interface coupled to the interconnect fabric; - an input/output, I/O, interface coupled to the interconnect fabric; - an array of processing clusters coupled to the interconnect fabric, the array of processing clusters configured to process mixed-precision instructions, wherein the mixed-precision dot-product instructions are primitives of a machine learning framework. at least one processing cluster (214A,..., 214N) comprising: -- a plurality of registers configured to store a plurality of packed data elements at a first precision; and characterized in that: -- an execution unit is configured to execute mixed-precision dot-product instructions, the execution unit is configured to perform a plurality of multiplications of different pairs of the plurality of packed data elements to generate a corresponding plurality of products and to add the corresponding plurality of products to an accumulation value stored at a second precision greater than the first precision in an accumulator register. -- a plurality of registers configured to store a plurality of packed data elements at a first precision; and characterized in that: -- an execution unit is configured to execute mixed-precision dot-product instructions, the execution unit is configured to perform a plurality of multiplications of different pairs of the plurality of packed data elements to generate a corresponding plurality of products and to add the corresponding plurality of products to an accumulation value stored at a second precision greater than the first precision in an accumulator register. -- an execution unit is configured to execute mixed-precision dot-product instructions, the execution unit is configured to perform a plurality of multiplications of different pairs of the plurality of packed data elements to generate a corresponding plurality of products and to add the corresponding plurality of products to an accumulation value stored at a second precision greater than the first precision in an accumulator register. the plurality of packed data elements to generate a corresponding plurality of products and to add the corresponding plurality of products to an accumulation value stored at a second precision greater than the first precision in an accumulator register.