A genomics analysis platform for executing a sequence analysis pipeline, the genomics analysis platform comprising: one or more of a first integrated circuit, each first integrated circuit forming a central processing unit that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline, the CPU having a first set of physical electronic interconnects; one or more of a second integrated circuit, each second integrated circuit forming a field programmable gate array (FPGA) having a second set of physical electronic interconnects to connect with at least one CPU via a portion of the first set of physical electronic interconnects using a point-to-point interconnect protocol, the FPGA being configured by firmware to arrange a set of hardwired digital logic circuits that are interconnected by a plurality of physical interconnects to perform a second set of genomic processing steps of the sequence analysis pipeline, the set of hardwired digital logic circuits of each FPGA being arranged as a set of processing engines to perform the second set of genomic processing steps; and a shared memory (14; 1014) electronically connected with each CPU via at least a portion of the first set of physical electronic interconnects, the shared memory (14; 1014) being accessible by each CPU and each FPGA to provide genetic sequence data and to store result data from the genomic processing steps performed on the genetic sequence data by each CPU and each FPGA, characterized in that rules for alternating processing of genetic sequence data stored in the shared memory (14; 1014) include using the one or more second integrated circuits to process genetic sequence data stored in the shared memory (14; 1014) that is associated with algorithmic complexity operations satisfying a threshold level of computational intensity. one or more of a first integrated circuit, each first integrated circuit forming a central processing unit that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline, the CPU having a first set of physical electronic interconnects; one or more of a second integrated circuit, each second integrated circuit forming a field programmable gate array (FPGA) having a second set of physical electronic interconnects to connect with at least one CPU via a portion of the first set of physical electronic interconnects using a point-to-point interconnect protocol, the FPGA being configured by firmware to arrange a set of hardwired digital logic circuits that are interconnected by a plurality of physical interconnects to perform a second set of genomic processing steps of the sequence analysis pipeline, the set of hardwired digital logic circuits of each FPGA being arranged as a set of processing engines to perform the second set of genomic processing steps; and a shared memory (14; 1014) electronically connected with each CPU via at least a portion of the first set of physical electronic interconnects, the shared memory (14; 1014) being accessible by each CPU and each FPGA to provide genetic sequence data and to store result data from the genomic processing steps performed on the genetic sequence data by each CPU and each FPGA, characterized in that rules for alternating processing of genetic sequence data stored in the shared memory (14; 1014) include using the one or more second integrated circuits to process genetic sequence data stored in the shared memory (14; 1014) that is associated with algorithmic complexity operations satisfying a threshold level of computational intensity.