A multi-state ferroelectric memory comprising: a plurality of ferroelectric memory cells, each ferroelectric memory cell comprising a ferroelectric capacitor having more than two states, said ferroelectric memory cells being organized as a plurality of rows and columns; a plurality of write lines; a plurality of read lines; a plurality of ferroelectric memory cell select buses, each of said ferroelectric memory cells in a given row being connected to a corresponding one of said ferromagnetic memory cell select buses, and each of said ferroelectric memory cells in a given column being connected to a corresponding one of said write lines and a corresponding one of said read lines wherein each of said ferroelectric memory cells comprises first and second gates for connecting said ferroelectric memory cell to said read line and said write line, respectively, corresponding to that ferroelectric memory cell in response to signals on said ferroelectric memory cell select bus corresponding to that ferroelectric memory cell; a write circuit that is adapted to receive and store a data value in said ferroelectric capacitor, by resetting said ferroelectric capacitor to a predetermined polarization state defined by a first stored electric charge corresponding to a first data value; converting said received data value to a second electric charge corresponding to said received data value, each possible state of the second data value corresponding to a fixed predefined electric charge; and causing said second electric charge to be stored in said ferroelectric capacitor of said ferroelectric memory cell currently connected to said write line to be added to said first stored electric charge, said second electric charge not causing said ferroelectric capacitor to become fully polarized; said data values having at least three states; and a read circuit that is arranged to measure said electric charge stored in said ferroelectric capacitor of said ferroelectric memory cell currently connected to said read line to generate an output value, said output value corresponding to one of said states. a plurality of ferroelectric memory cells, each ferroelectric memory cell comprising a ferroelectric capacitor having more than two states, said ferroelectric memory cells being organized as a plurality of rows and columns; a plurality of write lines; a plurality of read lines; a plurality of ferroelectric memory cell select buses, each of said ferroelectric memory cells in a given row being connected to a corresponding one of said ferromagnetic memory cell select buses, and each of said ferroelectric memory cells in a given column being connected to a corresponding one of said write lines and a corresponding one of said read lines wherein each of said ferroelectric memory cells comprises first and second gates for connecting said ferroelectric memory cell to said read line and said write line, respectively, corresponding to that ferroelectric memory cell in response to signals on said ferroelectric memory cell select bus corresponding to that ferroelectric memory cell; a write circuit that is adapted to receive and store a data value in said ferroelectric capacitor, by resetting said ferroelectric capacitor to a predetermined polarization state defined by a first stored electric charge corresponding to a first data value; converting said received data value to a second electric charge corresponding to said received data value, each possible state of the second data value corresponding to a fixed predefined electric charge; and causing said second electric charge to be stored in said ferroelectric capacitor of said ferroelectric memory cell currently connected to said write line to be added to said first stored electric charge, said second electric charge not causing said ferroelectric capacitor to become fully polarized; said data values having at least three states; and a read circuit that is arranged to measure said electric charge stored in said ferroelectric capacitor of said ferroelectric memory cell currently connected to said read line to generate an output value, said output value corresponding to one of said states.