A Reverse-conducting semiconductor device, which comprises a freewheeling diode and an insulated gate bipolar transistor on a common wafer, part of which wafer forms a base layer of a first conductivity type with a first doping concentration and a base layer thickness, wherein the insulated gate bipolar transistor comprises a collector side and an emitter side opposite to the collector side of the wafer, wherein the base layer thickness is the maximum vertical distance between the collector and emitter side (103, 104) of that part of the wafer with the first doping concentration, a cathode layer of the first conductivity type and higher doping concentration than the first doping concentration, and a anode layer of a second conductivity type, which is different from the first conductivity type, are alternately arranged on the collector side, wherein a plurality of source regions of the first conductivity type, a well layer of the second conductivity type and a gate electrode having an electrically conductive gate layer, which is insulated from any layer of the first or second conductivity type by a first insulating layer, are arranged on the emitter side, wherein the cathode layer comprises at least one first region, wherein each first region has a first region width, wherein the anode layer comprises at least one second region, wherein each second region has a second region width, and at least one pilot region, wherein each pilot region has a pilot region width, wherein any region has a region width and a region area, which is surrounded by a region border, wherein a shortest distance is the minimum length between a point within said region area and a point on said region border, each region width is defined as two times the maximum value of all shortest distances within said region, the reverse-conducting semiconductor device comprises an active region in a central part of the device, which active region is an area within the wafer, which includes and is arranged in projection of the source region, well layer and gate layer, wherein each pilot region area is an area having a width of at least two times the base layer thickness, wherein the pilot region is laterally surrounded on the pilot region border by first regions, which have a distance from each other of less than two times the base layer thickness, wherein the at least one second region is that part of the anode layer, which is not the at least one pilot region, wherein a mixed region comprises the at least one first and second regions (10,20), wherein the at least one pilot region is arranged in the central part of the device such that the mixed region laterally surrounds the at least one pilot region, wherein the mixed region has a width of at least once the base layer thickness, wherein the total area of the at least one pilot region is between 10 % and 45 % of the area of the mixed region, wherein each first region width is smaller than the base layer thickness, in each area on the emitter side, which lies in projection to one of the at least one pilot region, the plurality of source regions have a first area density, in that in each area on the emitter side, which lies in projection to the mixed region, the plurality of source regions have a second area density, characterized in that the first area density is lower than the second area density.