A method for operating non-volatile storage, comprising: accessing an indication of the number of program/erase cycles performed; dynamically determining a current read pass voltage (Vreadc) for multiple word lines on a common side of a selected word line (WLn) based on the indication of the number of program/erase cycles performed; and reading data from one or more non-volatile storage elements connected to the selected word line (WLn), the reading data includes applying the determined current read pass voltage (Vreadc) to multiple word lines on the common side of the selected word line (WLn) and applying a read voltage to the selected word line (WLn); characterised in that: dynamically determining the current read pass voltage (Vreadc) comprises: accessing a first read pass voltage (VreadO), wherein said first read pass voltage (VreadO) is a read pass voltage optimised for cycled memory; reading a starting read pass voltage (Vreadl) calculated specific to a first die to result in a number of failed bits for the first die in a fresh condition to be within a predetermined percentage of a number of failed bits caused by the first read pass voltage (VreadO) for the first die in the fresh condition; and determining the current read pass voltage (Vreadc) based on the first read pass voltage (VreadO), the starting read pass voltage (Vreadl) and the indication of the number of program/erase cycles performed. accessing an indication of the number of program/erase cycles performed; dynamically determining a current read pass voltage (Vreadc) for multiple word lines on a common side of a selected word line (WLn) based on the indication of the number of program/erase cycles performed; and reading data from one or more non-volatile storage elements connected to the selected word line (WLn), the reading data includes applying the determined current read pass voltage (Vreadc) to multiple word lines on the common side of the selected word line (WLn) and applying a read voltage to the selected word line (WLn); dynamically determining a current read pass voltage (Vreadc) for multiple word lines on a common side of a selected word line (WLn) based on the indication of the number of program/erase cycles performed; and reading data from one or more non-volatile storage elements connected to the selected word line (WLn), the reading data includes applying the determined current read pass voltage (Vreadc) to multiple word lines on the common side of the selected word line (WLn) and applying a read voltage to the selected word line (WLn); dynamically determining the current read pass voltage (Vreadc) comprises: accessing a first read pass voltage (VreadO), wherein said first read pass voltage (VreadO) is a read pass voltage optimised for cycled memory; reading a starting read pass voltage (Vreadl) calculated specific to a first die to result in a number of failed bits for the first die in a fresh condition to be within a predetermined percentage of a number of failed bits caused by the first read pass voltage (VreadO) for the first die in the fresh condition; and determining the current read pass voltage (Vreadc) based on the first read pass voltage (VreadO), the starting read pass voltage (Vreadl) and the indication of the number of program/erase cycles performed. accessing a first read pass voltage (VreadO), wherein said first read pass voltage (VreadO) is a read pass voltage optimised for cycled memory; reading a starting read pass voltage (Vreadl) calculated specific to a first die to result in a number of failed bits for the first die in a fresh condition to be within a predetermined percentage of a number of failed bits caused by the first read pass voltage (VreadO) for the first die in the fresh condition; and determining the current read pass voltage (Vreadc) based on the first read pass voltage (VreadO), the starting read pass voltage (Vreadl) and the indication of the number of program/erase cycles performed.