A processor implemented method, comprising: obtaining, via one or more hardware processors, a machine programming language code from a user, wherein the MPL code comprises at least one of one or more printf statements and one or more scanf statements for debugging the MPL code; converting, via a synthesizable logic, the MPL code comprising the at least one of one or more printf statements and one or more scanf statements to register transfer language instructions, wherein the RTL instructions comprises a logic; and characterized by synthesizing, at run-time, at least one of one or more printf statements and one or more scanf statements by: executing, via the one or more hardware processors, the logic, wherein the logic when executed interacts with a local field-programmable gate array (FPGA) memory and writes one or more debug messages on the local FPGA memory; transmitting, via the one or more hardware processors, the one or more written debug messages to a Direct Memory Access block; transmitting, via the one or more hardware processors, the one or more written debug messages by the DMA block to a host memory based on an interaction of the DMA block with a controller; and writing, via a device driver executed by the one or more hardware processors, the one or more transmitted debug messages to a file system, wherein an output file is generated that comprises the one or more debug messages, wherein a debug message reader reads the one or more debug messages and prints the one or more debug messages thereof, and wherein the printed one or more debug messages are indicative of (i) an execution flow of the instructions at run-time, and (ii) one or more values associated with one or more parameters comprised in the instructions. obtaining, via one or more hardware processors, a machine programming language code from a user, wherein the MPL code comprises at least one of one or more printf statements and one or more scanf statements for debugging the MPL code; converting, via a synthesizable logic, the MPL code comprising the at least one of one or more printf statements and one or more scanf statements to register transfer language instructions, wherein the RTL instructions comprises a logic; and characterized by synthesizing, at run-time, at least one of one or more printf statements and one or more scanf statements by: executing, via the one or more hardware processors, the logic, wherein the logic when executed interacts with a local field-programmable gate array (FPGA) memory and writes one or more debug messages on the local FPGA memory; transmitting, via the one or more hardware processors, the one or more written debug messages to a Direct Memory Access block; transmitting, via the one or more hardware processors, the one or more written debug messages by the DMA block to a host memory based on an interaction of the DMA block with a controller; and writing, via a device driver executed by the one or more hardware processors, the one or more transmitted debug messages to a file system, wherein an output file is generated that comprises the one or more debug messages, wherein a debug message reader reads the one or more debug messages and prints the one or more debug messages thereof, and wherein the printed one or more debug messages are indicative of (i) an execution flow of the instructions at run-time, and (ii) one or more values associated with one or more parameters comprised in the instructions. executing, via the one or more hardware processors, the logic, wherein the logic when executed interacts with a local field-programmable gate array (FPGA) memory and writes one or more debug messages on the local FPGA memory; transmitting, via the one or more hardware processors, the one or more written debug messages to a Direct Memory Access block; transmitting, via the one or more hardware processors, the one or more written debug messages by the DMA block to a host memory based on an interaction of the DMA block with a controller; and writing, via a device driver executed by the one or more hardware processors, the one or more transmitted debug messages to a file system, wherein an output file is generated that comprises the one or more debug messages, wherein a debug message reader reads the one or more debug messages and prints the one or more debug messages thereof, and wherein the printed one or more debug messages are indicative of (i) an execution flow of the instructions at run-time, and (ii) one or more values associated with one or more parameters comprised in the instructions.