A secure electronic apparatus comprising: a memory; and a plurality of sensors, wherein each sensor includes: an input operable to receive an input signal comprising a pair of clock signals (CLK, CLKD); an output operable to output a digital signal determined by a value of the input signal and by a physical quantity sensed by the sensor, wherein the physical quantity sensed by each sensor comprises the capacitances of two sense capacitors (C sense, C ref) of each sensor, and wherein the output digital signal is determined by a ratio of the capacitances of the two capacitors and by the value of the input signal, wherein the output digital signal is indicative of whether the value of the input signal exceeds a detection threshold value for that sensor, wherein the secure electronic apparatus is operable to perform a measurement routine comprising: applying a plurality of input signal values to the inputs of the sensors to ramp through a range of said input signal values to determine where in the range of input signal values the detection threshold value for each sensor is exceeded, wherein each of the input signal values corresponds to a delay between the pair of clock signals; for each input signal value, using the digital signals outputted by the sensors to determine a combined output result; comparing the combined output results of the measurement routine with a set of combined output results stored in the memory, and in response to detecting a difference between the combined output results of the measurement routine and the set of combined output results stored in the memory, determining that the secure electronic apparatus has been tampered with. a memory; and a plurality of sensors, wherein each sensor includes: an input operable to receive an input signal comprising a pair of clock signals (CLK, CLKD); an output operable to output a digital signal determined by a value of the input signal and by a physical quantity sensed by the sensor, wherein the physical quantity sensed by each sensor comprises the capacitances of two sense capacitors (C sense, C ref) of each sensor, and wherein the output digital signal is determined by a ratio of the capacitances of the two capacitors and by the value of the input signal, wherein the output digital signal is indicative of whether the value of the input signal exceeds a detection threshold value for that sensor, an input operable to receive an input signal comprising a pair of clock signals (CLK, CLKD); an output operable to output a digital signal determined by a value of the input signal and by a physical quantity sensed by the sensor, wherein the physical quantity sensed by each sensor comprises the capacitances of two sense capacitors (C sense, C ref) of each sensor, and wherein the output digital signal is determined by a ratio of the capacitances of the two capacitors and by the value of the input signal, wherein the output digital signal is indicative of whether the value of the input signal exceeds a detection threshold value for that sensor, applying a plurality of input signal values to the inputs of the sensors to ramp through a range of said input signal values to determine where in the range of input signal values the detection threshold value for each sensor is exceeded, wherein each of the input signal values corresponds to a delay between the pair of clock signals; for each input signal value, using the digital signals outputted by the sensors to determine a combined output result; comparing the combined output results of the measurement routine with a set of combined output results stored in the memory, and in response to detecting a difference between the combined output results of the measurement routine and the set of combined output results stored in the memory, determining that the secure electronic apparatus has been tampered with.