A method to achieve a fast switchable high voltage power transistor driver circuit, comprising the following steps: - providing a circuit comprising a port (VDDB) for a high voltage supply voltage, a port for a low voltage supply voltage (VDDL), an input stage comprising a high voltage power transistor (HP 1), an output port, a port for a digital input signal, and a high voltage transistor, the high voltage power transistor being connected between said high voltage supply voltage (VDDB) and said output port, the high voltage transistor being connected to the gate of the high voltage power transistor, the digital input signal being connected to the gate of the high voltage transistor, and providing a control stage to achieve a constant gate-source voltage of the high voltage power transistor when the digital signal is high; - limiting the gate-source voltage of the high voltage power transistor using a voltage drop of a first reference current (IREF) across a resistive load connected between the high voltage supply voltage (VDDB) and the gate of the high voltage power transistor if the digital input signal is high; - pulling the gate of the high voltage power transistor to the level of the high voltage supply voltage (VDDB) if the digital input signal is low; and characterized in that it further comprises the step of: - generating a second reference current (IREF), which is controlled by a reference voltage (VREF) across a means of resistance wherein the second reference current (IREF) is mirrored twice to generate the first reference current, wherein the means of resistance is matched to the resistive load (R 2), by having a resistance equal to the resistance of the resistive load divided by a factor, where said factor equals the low voltage supply voltage (VDDL) divided by the low voltage reference voltage (VREF) in order to establish a gate source voltage of the high voltage power transistor without variations due to current temperature and/or process changes. - providing a circuit comprising a port (VDDB) for a high voltage supply voltage, a port for a low voltage supply voltage (VDDL), an input stage comprising a high voltage power transistor (HP 1), an output port, a port for a digital input signal, and a high voltage transistor, the high voltage power transistor being connected between said high voltage supply voltage (VDDB) and said output port, the high voltage transistor being connected to the gate of the high voltage power transistor, the digital input signal being connected to the gate of the high voltage transistor, and providing a control stage to achieve a constant gate-source voltage of the high voltage power transistor when the digital signal is high; - limiting the gate-source voltage of the high voltage power transistor using a voltage drop of a first reference current (IREF) across a resistive load connected between the high voltage supply voltage (VDDB) and the gate of the high voltage power transistor if the digital input signal is high; - pulling the gate of the high voltage power transistor to the level of the high voltage supply voltage (VDDB) if the digital input signal is low; and - generating a second reference current (IREF), which is controlled by a reference voltage (VREF) across a means of resistance wherein the second reference current (IREF) is mirrored twice to generate the first reference current, wherein the means of resistance is matched to the resistive load (R 2), by having a resistance equal to the resistance of the resistive load divided by a factor, where said factor equals the low voltage supply voltage (VDDL) divided by the low voltage reference voltage (VREF) in order to establish a gate source voltage of the high voltage power transistor without variations due to current temperature and/or process changes.