A method of forming a power semiconductor device comprising the steps of: A. providing a substrate of a first or second conductivity type; B. forming a voltage sustaining region on said substrate by: 1. depositing an epitaxial layer on the substrate; said epitaxial layer having a first conductivity type; 2. forming at least one trench in said epitaxial layer; 3. depositing a barrier material along the walls of said trench; 4. implanting a dopant of a second conductivity type through the barrier material into a portion of the epitaxial layer adjacent to and beneath the bottom of said trench; 5. diffusing said dopant to form a first doped layer in said epitaxial layer; 6. removing the barrier material from at least the bottom of the trench; 7. etching the trench through said first doped layer and repeating steps (B.3)-(B.6) to form a second doped layer vertically below said first doped layer; 8. depositing a filler material in said trench to substantially fill said trench; 9. diffusing said dopant in the first and second doped layers to cause the first and second doped layers to overlap one another; and C. forming over said voltage sustaining region at least one region of said second conductivity type to define a junction therebetween. A. providing a substrate of a first or second conductivity type; B. forming a voltage sustaining region on said substrate by: 1. depositing an epitaxial layer on the substrate; said epitaxial layer having a first conductivity type; 2. forming at least one trench in said epitaxial layer; 3. depositing a barrier material along the walls of said trench; 4. implanting a dopant of a second conductivity type through the barrier material into a portion of the epitaxial layer adjacent to and beneath the bottom of said trench; 5. diffusing said dopant to form a first doped layer in said epitaxial layer; 6. removing the barrier material from at least the bottom of the trench; 7. etching the trench through said first doped layer and repeating steps (B.3)-(B.6) to form a second doped layer vertically below said first doped layer; 8. depositing a filler material in said trench to substantially fill said trench; 9. diffusing said dopant in the first and second doped layers to cause the first and second doped layers to overlap one another; and 1. depositing an epitaxial layer on the substrate; said epitaxial layer having a first conductivity type; 2. forming at least one trench in said epitaxial layer; 3. depositing a barrier material along the walls of said trench; 4. implanting a dopant of a second conductivity type through the barrier material into a portion of the epitaxial layer adjacent to and beneath the bottom of said trench; 5. diffusing said dopant to form a first doped layer in said epitaxial layer; 6. removing the barrier material from at least the bottom of the trench; 7. etching the trench through said first doped layer and repeating steps (B.3)-(B.6) to form a second doped layer vertically below said first doped layer; 8. depositing a filler material in said trench to substantially fill said trench; 9. diffusing said dopant in the first and second doped layers to cause the first and second doped layers to overlap one another; and C. forming over said voltage sustaining region at least one region of said second conductivity type to define a junction therebetween.