A circuit for deriving a reference signal at a first reference node having a reference voltage level (Vr) from a system voltage source having a system voltage level (Vdd) and for regulating the reference voltage level, the circuit comprising: a reference generator circuit operative to generate a second reference signal having a second reference voltage level (Vr'); a regulator circuit responsive to the second reference signal and the reference signal and operative to generate a voltage control signal; and an output circuit coupled to the system voltage source and responsive to the voltage control signal for developing the reference signal therefrom; characterised by: the circuit further comprising a translator circuit coupled to the system voltage source and operative to amplify the voltage control signal to obtain a translated voltage control signal which is input to the output circuit for generating the reference signal therefrom; the reference generator circuit being coupled to receive the reference signal as a voltage source and comprises a voltage divider for generating the second reference signal by dividing the reference voltage level; and wherein the voltage divider comprises a first transistor having a gate terminal coupled to a ground terminal, a source terminal coupled to receive the reference signal and a drain terminal coupled to the second reference node and a second transistor having a gate terminal coupled to the reference signal, a drain terminal coupled to ground and a source terminal coupled to the second reference node. a reference generator circuit operative to generate a second reference signal having a second reference voltage level (Vr'); a regulator circuit responsive to the second reference signal and the reference signal and operative to generate a voltage control signal; and an output circuit coupled to the system voltage source and responsive to the voltage control signal for developing the reference signal therefrom; characterised by: the circuit further comprising a translator circuit coupled to the system voltage source and operative to amplify the voltage control signal to obtain a translated voltage control signal which is input to the output circuit for generating the reference signal therefrom; the reference generator circuit being coupled to receive the reference signal as a voltage source and comprises a voltage divider for generating the second reference signal by dividing the reference voltage level; and wherein the voltage divider comprises a first transistor having a gate terminal coupled to a ground terminal, a source terminal coupled to receive the reference signal and a drain terminal coupled to the second reference node and a second transistor having a gate terminal coupled to the reference signal, a drain terminal coupled to ground and a source terminal coupled to the second reference node. the circuit further comprising a translator circuit coupled to the system voltage source and operative to amplify the voltage control signal to obtain a translated voltage control signal which is input to the output circuit for generating the reference signal therefrom; the reference generator circuit being coupled to receive the reference signal as a voltage source and comprises a voltage divider for generating the second reference signal by dividing the reference voltage level; and wherein the voltage divider comprises a first transistor having a gate terminal coupled to a ground terminal, a source terminal coupled to receive the reference signal and a drain terminal coupled to the second reference node and a second transistor having a gate terminal coupled to the reference signal, a drain terminal coupled to ground and a source terminal coupled to the second reference node.