A method allowing switched power converters, providing simultaneously charging power for at least one battery and at the same time delivering current to operate an electronic device, to stay out of current limit mode for the maximum possible range of system load requirements, characterized in that it further comprises the following steps: providing a sole synchronous switched power converter, a means to measure the input current of the switched power converter, a buck converter comprising a drive logic, a high-side switch and a low-side switch, an error amplifier comparing the output voltage (Vout) of the power converter with a reference voltage (Vref) and generates an output voltage (Verror), a PWM comparator, a controllable charger, providing current for the battery, and means to control a charge current (500, 501) wherein a means to detect if the input current exceeds a defined portion of the maximum allowable input current and, if true, initiates the controllable charger via a digital control to reduce a charging current (Ichg), wherein said sole switched power converter supplies power to the electronic device and to the controllable charger; sensing an input current of the switched power converter cycle-by-cycle and go to step; checking if the actual input current is higher than a maximum input current limit of the power converter and, if false, go to step, else go to step; reducing said input current via increasing an off part of a duty cycle of the high-side switch of said power converter and go to step; checking if the actual input current is higher than a defined portion of the maximum input current limit of the power converter and, if false, go to step, else go to step; reduce the charge current and go to step; ramping up charge current to a default value using output current regulation; and turning on the main switch via the drive logic at the beginning of each clock cycle, wherein the main switch is only turned off when the positive input (Gi*IL) of the PWM comparator 52, which is proportional, using a factor (Gi), to the output current exceeds the error voltage (Verror), which corresponds via a factor Ge to the difference between Vout and Vref and go to step. providing a sole synchronous switched power converter, a means to measure the input current of the switched power converter, a buck converter comprising a drive logic, a high-side switch and a low-side switch, an error amplifier comparing the output voltage (Vout) of the power converter with a reference voltage (Vref) and generates an output voltage (Verror), a PWM comparator, a controllable charger, providing current for the battery, and means to control a charge current (500, 501) wherein a means to detect if the input current exceeds a defined portion of the maximum allowable input current and, if true, initiates the controllable charger via a digital control to reduce a charging current (Ichg), wherein said sole switched power converter supplies power to the electronic device and to the controllable charger; sensing an input current of the switched power converter cycle-by-cycle and go to step; checking if the actual input current is higher than a maximum input current limit of the power converter and, if false, go to step, else go to step; reducing said input current via increasing an off part of a duty cycle of the high-side switch of said power converter and go to step; checking if the actual input current is higher than a defined portion of the maximum input current limit of the power converter and, if false, go to step, else go to step; reduce the charge current and go to step; ramping up charge current to a default value using output current regulation; and turning on the main switch via the drive logic at the beginning of each clock cycle, wherein the main switch is only turned off when the positive input (Gi*IL) of the PWM comparator 52, which is proportional, using a factor (Gi), to the output current exceeds the error voltage (Verror), which corresponds via a factor Ge to the difference between Vout and Vref and go to step.