A method of programming a nonvolatile memory, comprising: a group of memory cells in an array of memory cells of the nonvolatile memory, wherein each memory cell of the group is programmable to a respective target state in parallel, wherein a program index is provided for each memory cell of the group under programming, the program index of a memory cell indicating the number of voltage pulses last used to program the memory cell, the method comprising: (a) performing a programming pass by applying a programming voltage as a series of incrementing voltage pulses to the group of memory cells; (b) during the programming pass, allowing or inhibiting programming of a memory cell when the number of voltage pulses applied respectively does not or does exceed the program index of the memory cell, the programming pass being performed without a verify step on the group of memory cells in between the voltage pulses; (c) after the programming pass, verifying the memory cells of the group relative to their respective target states; (d) enabling a memory cell not verified for further programming in the next programming pass by incrementing the program index of the memory cell not verified by one pulse; and (e) repeating steps (a)-(d) until the memory cells of the group have been verified relative to their respective target states. a group of memory cells in an array of memory cells of the nonvolatile memory, wherein each memory cell of the group is programmable to a respective target state in parallel, wherein a program index is provided for each memory cell of the group under programming, the program index of a memory cell indicating the number of voltage pulses last used to program the memory cell, the method comprising: (a) performing a programming pass by applying a programming voltage as a series of incrementing voltage pulses to the group of memory cells; (b) during the programming pass, allowing or inhibiting programming of a memory cell when the number of voltage pulses applied respectively does not or does exceed the program index of the memory cell, the programming pass being performed without a verify step on the group of memory cells in between the voltage pulses; (c) after the programming pass, verifying the memory cells of the group relative to their respective target states; (d) enabling a memory cell not verified for further programming in the next programming pass by incrementing the program index of the memory cell not verified by one pulse; and (e) repeating steps (a)-(d) until the memory cells of the group have been verified relative to their respective target states. (a) performing a programming pass by applying a programming voltage as a series of incrementing voltage pulses to the group of memory cells; (b) during the programming pass, allowing or inhibiting programming of a memory cell when the number of voltage pulses applied respectively does not or does exceed the program index of the memory cell, the programming pass being performed without a verify step on the group of memory cells in between the voltage pulses; (c) after the programming pass, verifying the memory cells of the group relative to their respective target states; (d) enabling a memory cell not verified for further programming in the next programming pass by incrementing the program index of the memory cell not verified by one pulse; and (e) repeating steps (a)-(d) until the memory cells of the group have been verified relative to their respective target states.