A method for performing sum-of-absolute-differences, SAD, operations, the method comprising: receiving a single SAD instruction specifying a destination register to store SAD operation results and further specifying a first source register and a second source register storing source values for processing by two independent SAD operations; and performing, in response to receiving the single SAD instruction, the two independent SAD operations, a result of the first SAD operation being stored in a first section of the destination register and a result of the second SAD operation being stored in a second section of the destination register, wherein performing the two independent SAD operations comprises performing the first SAD operation (910, 915) on the source values stored in a first section of the first source register and a first section of the second source register, and performing the second SAD operation (925, 930) on the source values stored in a second section of the first source register and a second section of the second source register; and wherein performing the two independent SAD operations further comprises adding a result of another SAD operation stored in the first section of the destination register with the result of the first SAD operation and storing the sum in the first section of the destination register, and adding a result of another SAD operation stored in the second section of the destination register with the result of the second SAD operation and storing the sum in the second section of the destination register; wherein the destination and source registers each comprise a pair of aligned registers, the first register in the pair comprising the first section and the second register in the pair comprising the second section of the source or destination register; wherein the source values stored in the first and second source registers comprise pixel values of video frames; and wherein the first source register stores pixel values (A0-A3) of a current block of a current frame and the second source register stores pixel values (BoB3; C0-C3) of two different reference blocks of a reference frame, for parallel comparison between the current block and the two different reference blocks. receiving a single SAD instruction specifying a destination register to store SAD operation results and further specifying a first source register and a second source register storing source values for processing by two independent SAD operations; and performing, in response to receiving the single SAD instruction, the two independent SAD operations, a result of the first SAD operation being stored in a first section of the destination register and a result of the second SAD operation being stored in a second section of the destination register, wherein performing the two independent SAD operations comprises performing the first SAD operation (910, 915) on the source values stored in a first section of the first source register and a first section of the second source register, and performing the second SAD operation (925, 930) on the source values stored in a second section of the first source register and a second section of the second source register; and wherein performing the two independent SAD operations further comprises adding a result of another SAD operation stored in the first section of the destination register with the result of the first SAD operation and storing the sum in the first section of the destination register, and adding a result of another SAD operation stored in the second section of the destination register with the result of the second SAD operation and storing the sum in the second section of the destination register; wherein the destination and source registers each comprise a pair of aligned registers, the first register in the pair comprising the first section and the second register in the pair comprising the second section of the source or destination register; wherein the source values stored in the first and second source registers comprise pixel values of video frames; and wherein the first source register stores pixel values (A0-A3) of a current block of a current frame and the second source register stores pixel values (BoB3; C0-C3) of two different reference blocks of a reference frame, for parallel comparison between the current block and the two different reference blocks.