A circuit arrangement comprising - a first input node; - a first output node; - a sampling capacitor means (Cs, Cs1, Cs2); - a first switching means (S1, S2, S3, S4) being switchable between a first switching state and a second switching state, the first switching means (S1, S2, S3, S4) being coupled to a first terminal of the sampling capacitor means (Cs, Cs1, Cs2), the first input node and the first output node in such a way that the first terminal of the sampling capacitor means (Cs, Cs1, Cs2) is conductively connected to the first input node and disconnected from the first output node in the first switching state and the first terminal of the sampling capacitor means (Cs, Cs1, Cs2) is disconnected from the first input node and conductively connected to the first output node in the second switching state; wherein - a first charge-storing element (C1, C2) is coupled via a second switching means (S01, S02, S03, S04, S05, S06, S07, S08) to the first input node in such a way that the first charge-storing element is charged in the first switching state and discharged in the second switching such that a first compensation current flows to the first input node in the second switching state, wherein the first charge-storing element comprises a first capacitor that is charged via a first buffer amplifier means in the first switching state, and forms a first charge source for providing the first compensation current flowing to the first input node in the second switching state, thereby at least partly compensating current flow for charging the sampling capacitor means (Cs, Cs1, Cs2) in the first switching state. - a first input node; - a first output node; - a sampling capacitor means (Cs, Cs1, Cs2); - a first switching means (S1, S2, S3, S4) being switchable between a first switching state and a second switching state, the first switching means (S1, S2, S3, S4) being coupled to a first terminal of the sampling capacitor means (Cs, Cs1, Cs2), the first input node and the first output node in such a way that the first terminal of the sampling capacitor means (Cs, Cs1, Cs2) is conductively connected to the first input node and disconnected from the first output node in the first switching state and the first terminal of the sampling capacitor means (Cs, Cs1, Cs2) is disconnected from the first input node and conductively connected to the first output node in the second switching state; wherein - a first charge-storing element (C1, C2) is coupled via a second switching means (S01, S02, S03, S04, S05, S06, S07, S08) to the first input node in such a way that the first charge-storing element is charged in the first switching state and discharged in the second switching such that a first compensation current flows to the first input node in the second switching state, wherein the first charge-storing element comprises a first capacitor that is charged via a first buffer amplifier means in the first switching state, and forms a first charge source for providing the first compensation current flowing to the first input node in the second switching state, thereby at least partly compensating current flow for charging the sampling capacitor means (Cs, Cs1, Cs2) in the first switching state.