A method for producing a semiconductor device comprising a Schottky diode and a High Electron Mobility Transistor, the method comprising the steps of: - producing a III-nitride stack (2,3,4) on a carrier substrate 1, said stack comprising at least a lower and an upper III-nitride layer (3,4) forming a heterojunction there between, so that a 2DEG layer may be formed in the lower of the two layers, - Depositing a dielectric layer on said III-nitride stack, - Patterning said dielectric layer to form a plurality of openings through the dielectric layer, corresponding to the location (31,32,33) of the anode and cathode electrodes of the Schottky diode and to the location (34,35,36) of the source, drain and gate electrodes of the HEMT, wherein the opening or openings corresponding to the location of said anode, hereafter referred to as 'anode-opening(s)', comprise a first portion corresponding to the Schottky junction of said diode and a second portion adjacent to said first portion, each opening of said second portion being located between the first portion and one of the opening or openings corresponding to the cathode electrode, - Producing a first layer or layers of a doped III-nitride material in said second portion of the anode-opening or openings, and producing a second layer or layers of a doped III-nitride material in the opening or openings corresponding to the gate of said HEMT, hereafter referred to as 'gate opening (s)', wherein the thickness of said first and second layers (18,26) is not equal, - Producing said anode and cathode electrodes (11,12) and said source, gate and drain electrodes (21,23,22), a portion or portions of said anode being produced on top of said first layer or layers of a doped III-nitride material and the gate electrode being produced on top of said second layer or layers of a doped III-nitride material, - Producing an isolation area between the diode and the HEMT, wherein the step of producing said first and second layers (18,26) of a doped III-nitride material is performed by selectively depositing a doped III-nitride material in said second portion of the anode-opening(s), and in the gate opening(s), said selective deposition taking place in a single deposition step, and wherein the dimensions of said second portion of the anode opening (s) and the dimensions of the gate-opening (s) are selected so that the thickness of the obtained first layer(s) is not equal to the thickness of the obtained second layer(s). - producing a III-nitride stack (2,3,4) on a carrier substrate 1, said stack comprising at least a lower and an upper III-nitride layer (3,4) forming a heterojunction there between, so that a 2DEG layer may be formed in the lower of the two layers, - Depositing a dielectric layer on said III-nitride stack, - Patterning said dielectric layer to form a plurality of openings through the dielectric layer, corresponding to the location (31,32,33) of the anode and cathode electrodes of the Schottky diode and to the location (34,35,36) of the source, drain and gate electrodes of the HEMT, wherein the opening or openings corresponding to the location of said anode, hereafter referred to as 'anode-opening(s)', comprise a first portion corresponding to the Schottky junction of said diode and a second portion adjacent to said first portion, each opening of said second portion being located between the first portion and one of the opening or openings corresponding to the cathode electrode, - Producing a first layer or layers of a doped III-nitride material in said second portion of the anode-opening or openings, and producing a second layer or layers of a doped III-nitride material in the opening or openings corresponding to the gate of said HEMT, hereafter referred to as 'gate opening (s)', wherein the thickness of said first and second layers (18,26) is not equal, - Producing said anode and cathode electrodes (11,12) and said source, gate and drain electrodes (21,23,22), a portion or portions of said anode being produced on top of said first layer or layers of a doped III-nitride material and the gate electrode being produced on top of said second layer or layers of a doped III-nitride material, - Producing an isolation area between the diode and the HEMT, wherein the step of producing said first and second layers (18,26) of a doped III-nitride material is performed by selectively depositing a doped III-nitride material in said second portion of the anode-opening(s), and in the gate opening(s), said selective deposition taking place in a single deposition step, and wherein the dimensions of said second portion of the anode opening (s) and the dimensions of the gate-opening (s) are selected so that the thickness of the obtained first layer(s) is not equal to the thickness of the obtained second layer(s). wherein the step of producing said first and second layers (18,26) of a doped III-nitride material is performed by selectively depositing a doped III-nitride material in said second portion of the anode-opening(s), and in the gate opening(s), said selective deposition taking place in a single deposition step, and wherein the dimensions of said second portion of the anode opening (s) and the dimensions of the gate-opening (s) are selected so that the thickness of the obtained first layer(s) is not equal to the thickness of the obtained second layer(s).