A stacked integrated circuit package, comprising: a first semiconductor integrated circuit, IC, having a first active face, and a first interconnect structure on the first active face; a second semiconductor integrated circuit, IC, stacked on the first semiconductor IC, the second semiconductor IC having a second active face disposed opposite the first active face, the first and second semiconductor integrated circuits being coupled through the first interconnect structure; a voltage regulator adapted to supply regulated voltage to the first and second semiconductor integrated circuits and comprising an active portion disposed in the first semiconductor IC and coupled to the first interconnect structure, the voltage regulator further comprising at least one inductor at least partially embedded in a packaging substrate; a packaging connection on the second face, opposite the first face, of first semiconductor IC, the packaging connection coupling the first IC to a first surface of the packaging substrate, wherein the active portion of the voltage regulator is coupled to the packaging connection via a first set of through substrate vias in the first semiconductor IC and wherein the at least one inductor is coupled to the active portion of the voltage regulator via the packaging connection, wherein the packaging connection is further coupled to the first interconnect structure by a second set of through substrate vias in the first semiconductor IC to enable communication between the second semiconductor IC and the packaging substrate, wherein the at least one inductor comprises a third set of through substrate vias (522,720) in the packaging substrate, coupled to the first set of through vias; and a second packaging connection on a second surface, opposite the first surface, of the packaging substrate and coupled to the third set of through substrate vias in the packaging substrate; a printed circuit board having a front side coupled to the packaging substrate through the second packaging connection, the printed circuit board having a fourth set of through substrate vias (512,712) coupled to the third set of through substrate vias to provide additional length and inductance to the active portion of the voltage regulator; and at least one conducting path (514,714) on the back side of the printed circuit board, the at least one conducting path configured to couple at least two through substrate vias of the fourth set of through substrate vias (512,712) in the printed circuit board. a first semiconductor integrated circuit, IC, having a first active face, and a first interconnect structure on the first active face; a second semiconductor integrated circuit, IC, stacked on the first semiconductor IC, the second semiconductor IC having a second active face disposed opposite the first active face, the first and second semiconductor integrated circuits being coupled through the first interconnect structure; a voltage regulator adapted to supply regulated voltage to the first and second semiconductor integrated circuits and comprising an active portion disposed in the first semiconductor IC and coupled to the first interconnect structure, the voltage regulator further comprising at least one inductor at least partially embedded in a packaging substrate; a packaging connection on the second face, opposite the first face, of first semiconductor IC, the packaging connection coupling the first IC to a first surface of the packaging substrate, wherein the active portion of the voltage regulator is coupled to the packaging connection via a first set of through substrate vias in the first semiconductor IC and wherein the at least one inductor is coupled to the active portion of the voltage regulator via the packaging connection, wherein the packaging connection is further coupled to the first interconnect structure by a second set of through substrate vias in the first semiconductor IC to enable communication between the second semiconductor IC and the packaging substrate, wherein the at least one inductor comprises a third set of through substrate vias (522,720) in the packaging substrate, coupled to the first set of through vias; and wherein the packaging connection is further coupled to the first interconnect structure by a second set of through substrate vias in the first semiconductor IC to enable communication between the second semiconductor IC and the packaging substrate, wherein the at least one inductor comprises a third set of through substrate vias (522,720) in the packaging substrate, coupled to the first set of through vias; and a second packaging connection on a second surface, opposite the first surface, of the packaging substrate and coupled to the third set of through substrate vias in the packaging substrate; a printed circuit board having a front side coupled to the packaging substrate through the second packaging connection, the printed circuit board having a fourth set of through substrate vias (512,712) coupled to the third set of through substrate vias to provide additional length and inductance to the active portion of the voltage regulator; and at least one conducting path (514,714) on the back side of the printed circuit board, the at least one conducting path configured to couple at least two through substrate vias of the fourth set of through substrate vias (512,712) in the printed circuit board.