A processing core, comprising: a processing cluster configured to generate a value for a unit of directed graph data using input directed graph data, wherein the unit of directed graph data is an activation of the directed graph; a core controller configured to load a threshold value into a threshold register when a particular aspect of the value for the unit of directed graph data is loaded into a data register; a comparator coupled to the threshold register and the data register and configured to generate a comparator output based on: (i) the threshold value in the threshold register; and (ii) the particular aspect of the value for the unit of directed graph data in the data register; and a rounding circuit: (i) configured to receive the value for the unit of directed graph data from the processing cluster; and (ii) configured to conditionally round the value for the unit of directed graph data based on the comparator output from the comparator; wherein the core controller is further configured to instruct the rounding circuit to calculate the threshold value; wherein the unit of directed graph data is a vector with a set of entries; wherein the value for the unit of directed graph data is a value for one entry of the set of entries in the vector; wherein the rounding circuit is configured to calculate the threshold value using the set of entries in the vector; wherein the entries in the set of entries are stored as floating-point numbers in the processing core; and wherein the particular aspect of the value for the unit of directed graph data is an exponent of one entry in the set of entries. a processing cluster configured to generate a value for a unit of directed graph data using input directed graph data, wherein the unit of directed graph data is an activation of the directed graph; a core controller configured to load a threshold value into a threshold register when a particular aspect of the value for the unit of directed graph data is loaded into a data register; a comparator coupled to the threshold register and the data register and configured to generate a comparator output based on: (i) the threshold value in the threshold register; and (ii) the particular aspect of the value for the unit of directed graph data in the data register; and a rounding circuit: (i) configured to receive the value for the unit of directed graph data from the processing cluster; and (ii) configured to conditionally round the value for the unit of directed graph data based on the comparator output from the comparator; wherein the core controller is further configured to instruct the rounding circuit to calculate the threshold value; wherein the unit of directed graph data is a vector with a set of entries; wherein the value for the unit of directed graph data is a value for one entry of the set of entries in the vector; wherein the rounding circuit is configured to calculate the threshold value using the set of entries in the vector; wherein the entries in the set of entries are stored as floating-point numbers in the processing core; and wherein the particular aspect of the value for the unit of directed graph data is an exponent of one entry in the set of entries.