An apparatus comprising: a baseband filter having configurable efficiency; an upconverter having configurable efficiency and coupled to the baseband filter, and wherein the baseband filter and upconverter are configured to operate at a first efficiency level in a first output power range and to operate at a second efficiency level in a second output power range; a controller operable to configure the baseband filter and the upconverter to operate at the first or second efficiency level based on a selected output power level, characterized by the baseband filter comprising: a DC bleed circuit configured to reduce a DC level of a digital to analog converter, DAC, output, and wherein the DC bleed circuit is configurable for operation at the first or second efficiency level based on the selected output power level, the DC bleed circuit comprising a transistor having a drain terminal connected to the DAC output, a source terminal connected to a system ground, and a gate terminal selectively connected to one of the system ground and a bias voltage, a rectifier circuit configured to receive the DAC output and produce a rectified output, and wherein the rectifier circuit is configurable for operation at the first or second efficiency level based on the selected output power level, the rectifier circuit comprising first and second transistors having connected source terminals that are selectively connected to the DC bleed circuit; a transimpedance loop configured to receive the rectified output and remove a tail current to generate an adjusted rectified output, and wherein the transimpedance loop is configurable for operation at the first or second efficiency level based on the selected output power level, the transimpedance loop comprising first, second, and third transistors coupled to the rectifier circuit; further characterized by the upconverter comprising a transconductance cell configured to amplify the adjusted rectified output from the transimpedance loop, and wherein the transconductance cell is configurable for operation at the first or second efficiency level based on the selected output power level, the transconductance cell comprising at least one transistor coupled to the transimpedance loop. a baseband filter having configurable efficiency; an upconverter having configurable efficiency and coupled to the baseband filter, and wherein the baseband filter and upconverter are configured to operate at a first efficiency level in a first output power range and to operate at a second efficiency level in a second output power range; a controller operable to configure the baseband filter and the upconverter to operate at the first or second efficiency level based on a selected output power level, characterized by the baseband filter comprising: a DC bleed circuit configured to reduce a DC level of a digital to analog converter, DAC, output, and wherein the DC bleed circuit is configurable for operation at the first or second efficiency level based on the selected output power level, the DC bleed circuit comprising a transistor having a drain terminal connected to the DAC output, a source terminal connected to a system ground, and a gate terminal selectively connected to one of the system ground and a bias voltage, a rectifier circuit configured to receive the DAC output and produce a rectified output, and wherein the rectifier circuit is configurable for operation at the first or second efficiency level based on the selected output power level, the rectifier circuit comprising first and second transistors having connected source terminals that are selectively connected to the DC bleed circuit; a DC bleed circuit configured to reduce a DC level of a digital to analog converter, DAC, output, and wherein the DC bleed circuit is configurable for operation at the first or second efficiency level based on the selected output power level, the DC bleed circuit comprising a transistor having a drain terminal connected to the DAC output, a source terminal connected to a system ground, and a gate terminal selectively connected to one of the system ground and a bias voltage, a rectifier circuit configured to receive the DAC output and produce a rectified output, and wherein the rectifier circuit is configurable for operation at the first or second efficiency level based on the selected output power level, the rectifier circuit comprising first and second transistors having connected source terminals that are selectively connected to the DC bleed circuit; a transimpedance loop configured to receive the rectified output and remove a tail current to generate an adjusted rectified output, and wherein the transimpedance loop is configurable for operation at the first or second efficiency level based on the selected output power level, the transimpedance loop comprising first, second, and third transistors coupled to the rectifier circuit; further characterized by the upconverter comprising a transconductance cell configured to amplify the adjusted rectified output from the transimpedance loop, and wherein the transconductance cell is configurable for operation at the first or second efficiency level based on the selected output power level, the transconductance cell comprising at least one transistor coupled to the transimpedance loop.