A method for forming spacers on a transistor gate pattern comprising the following successive steps: - providing a stack comprising at least one active layer extending along a basal plane and the gate pattern being on top of the active layer, the gate pattern having side flanks extending along planes perpendicular to the active layer, - depositing onto the gate pattern and the active layer a first layer of a first dielectric material having a thickness e1, the first layer comprising first side portions covering the side flanks of the gate pattern, and further comprising first basal portions extending in parallel to said basal plane and covering the active layer, - making an anisotropic modification in said first layer along a direction parallel to the side flanks, so as to obtain modified first basal portions while keeping first side portions unmodified, - performing at least one sequence comprising the following steps: o depositing onto said first layer a second layer of a second dielectric material having a thickness e2 and comprising second side portions covering the unmodified first side portions, said second side portions being directly in contact with the unmodified first side portions, and second basal portions, extending in parallel to the basal plane and covering the modified first basal portions, o making an anisotropic etching of said second layer along said direction parallel to the side flanks, so as to remove the second basal portions and while keeping at least part of the second side portions unmodified, - withdrawing the modified first basal portions which are bared at the end of said anisotropic etching of said second layer while keeping the first and second side portions (11L, 12L) unmodified to form spacers, by selectively etching the first modified dielectric material with respect to the unmodified first dielectric material, the second dielectric material and the material of the active layer. - providing a stack comprising at least one active layer extending along a basal plane and the gate pattern being on top of the active layer, the gate pattern having side flanks extending along planes perpendicular to the active layer, - depositing onto the gate pattern and the active layer a first layer of a first dielectric material having a thickness e1, the first layer comprising first side portions covering the side flanks of the gate pattern, and further comprising first basal portions extending in parallel to said basal plane and covering the active layer, - making an anisotropic modification in said first layer along a direction parallel to the side flanks, so as to obtain modified first basal portions while keeping first side portions unmodified, - performing at least one sequence comprising the following steps: o depositing onto said first layer a second layer of a second dielectric material having a thickness e2 and comprising second side portions covering the unmodified first side portions, said second side portions being directly in contact with the unmodified first side portions, and second basal portions, extending in parallel to the basal plane and covering the modified first basal portions, o making an anisotropic etching of said second layer along said direction parallel to the side flanks, so as to remove the second basal portions and while keeping at least part of the second side portions unmodified, o depositing onto said first layer a second layer of a second dielectric material having a thickness e2 and comprising second side portions covering the unmodified first side portions, said second side portions being directly in contact with the unmodified first side portions, and second basal portions, extending in parallel to the basal plane and covering the modified first basal portions, o making an anisotropic etching of said second layer along said direction parallel to the side flanks, so as to remove the second basal portions and while keeping at least part of the second side portions unmodified, - withdrawing the modified first basal portions which are bared at the end of said anisotropic etching of said second layer while keeping the first and second side portions (11L, 12L) unmodified to form spacers, by selectively etching the first modified dielectric material with respect to the unmodified first dielectric material, the second dielectric material and the material of the active layer.