A semiconductor device comprising: a first transistor provided between a high-potential side voltage terminal to which a constant voltage (Vin) generated by reducing a power-supply voltage (VBAT) is supplied, and a first output terminal; a second transistor provided between a low-potential side voltage terminal to which a reference voltage is supplied, and the first output terminal; a control circuit that controls turning-on/off of the first and second transistors (Tr1, Tr2); a boosting circuit that boosts the power-supply voltage (VBAT) by using a voltage of the first output terminal, to generate an output voltage (Vout); and an overvoltage detection circuit that detects an overvoltage of a power-supply line coupling the high-potential side voltage terminal and the first transistor to each other, wherein the control circuit controls at least the second transistor in such a manner that the second transistor is turned off, when the overvoltage has been detected by the overvoltage detection circuit, wherein the semiconductor device further comprises: a resistor element provided between a control terminal and a first terminal of the second transistor, the first terminal being provided on a side close to the low-potential side voltage terminal; and a third transistor provided in parallel to the resistor element, wherein the control circuit sets an output to the control terminal of the second transistor to be in a high-impedance state and controls the third transistor in such a manner that the third transistor is turned on, when the overvoltage has been detected by the overvoltage detection circuit. a first transistor provided between a high-potential side voltage terminal to which a constant voltage (Vin) generated by reducing a power-supply voltage (VBAT) is supplied, and a first output terminal; a second transistor provided between a low-potential side voltage terminal to which a reference voltage is supplied, and the first output terminal; a control circuit that controls turning-on/off of the first and second transistors (Tr1, Tr2); a boosting circuit that boosts the power-supply voltage (VBAT) by using a voltage of the first output terminal, to generate an output voltage (Vout); and an overvoltage detection circuit that detects an overvoltage of a power-supply line coupling the high-potential side voltage terminal and the first transistor to each other, wherein the control circuit controls at least the second transistor in such a manner that the second transistor is turned off, when the overvoltage has been detected by the overvoltage detection circuit, wherein the semiconductor device further comprises: a resistor element provided between a control terminal and a first terminal of the second transistor, the first terminal being provided on a side close to the low-potential side voltage terminal; and a third transistor provided in parallel to the resistor element, wherein the control circuit sets an output to the control terminal of the second transistor to be in a high-impedance state and controls the third transistor in such a manner that the third transistor is turned on, when the overvoltage has been detected by the overvoltage detection circuit. a resistor element provided between a control terminal and a first terminal of the second transistor, the first terminal being provided on a side close to the low-potential side voltage terminal; and a third transistor provided in parallel to the resistor element, wherein the control circuit sets an output to the control terminal of the second transistor to be in a high-impedance state and controls the third transistor in such a manner that the third transistor is turned on, when the overvoltage has been detected by the overvoltage detection circuit.