An electronic device comprising a digital module (11; 21; 31; 41) comprising a microprocessor to access a non volatile memory, an internal memory, in particular a RAM, and a non volatile memory, in particular a flash memory, for storing data, in particular read only data, said data being stored encrypted in said non volatile memory, wherein said digital module (21; 31; 41) includes a decryption module configured to perform a decryption on the fly of blocks of data read from said non volatile memory stored encrypted in said non volatile memory to obtain read decrypted data, said decryption module being arranged interposed on a interconnect network identifying a data path for exchanging data (RB, WB) between said non-volatile memory and said microprocessor to access a non volatile memory, and connected to a decryption unaware memory controller of the non-volatile memory comprised in said digital module (21; 31; 41) for receiving said blocks of data read from said non volatile memory corresponding to said data stored encrypted, said decryption module being configured to generate decryption masks corresponding to said blocks of data being read from said non volatile memory at a given read address and to generate speculative decryption masks corresponding to second blocks of data read from said non volatile memory at a next estimated read address, wherein said digital module (11; 21; 31; 41) is a a digital microcontroller, preferably an ARM-based microcontroller, comprising the microprocessor, the internal memory, in particular a RAM, and the non volatile memory, in particular a flash memory, for storing data comprising a user application code image, said microcontroller being configured to operate according to an eXecution-In-Place XIP flow, including the microprocessor fetching instructions of said user application code image from the non-volatile memory and executing said instructions, said instructions of said user application code image being stored encrypted in said non volatile memory, said digital module (21; 31; 41) including said decryption module configured to perform a decryption on the fly of blocks of data read from said non volatile memory corresponding to said instructions stored encrypted in said non volatile memory to obtain read decrypted instructions, said decryption module being arranged interposed on said interconnect network identifying a data path for exchanging data (RB, WB) between said non-volatile memory and said microcontroller, and connected to the decryption unaware memory controller of the non-volatile memory for receiving said blocks of data read from said non volatile memory corresponding to said instructions stored encrypted. said decryption module being configured to generate decryption masks corresponding to said blocks of data being read from said non volatile memory at a given read address and to generate speculative decryption masks corresponding to second blocks of data read from said non volatile memory at a next estimated read address, wherein said digital module (11; 21; 31; 41) is a a digital microcontroller, preferably an ARM-based microcontroller, comprising the microprocessor, the internal memory, in particular a RAM, and the non volatile memory, in particular a flash memory, for storing data comprising a user application code image, said microcontroller being configured to operate according to an eXecution-In-Place XIP flow, including the microprocessor fetching instructions of said user application code image from the non-volatile memory and executing said instructions, said instructions of said user application code image being stored encrypted in said non volatile memory, said digital module (21; 31; 41) including said decryption module configured to perform a decryption on the fly of blocks of data read from said non volatile memory corresponding to said instructions stored encrypted in said non volatile memory to obtain read decrypted instructions, said decryption module being arranged interposed on said interconnect network identifying a data path for exchanging data (RB, WB) between said non-volatile memory and said microcontroller, and connected to the decryption unaware memory controller of the non-volatile memory for receiving said blocks of data read from said non volatile memory corresponding to said instructions stored encrypted.