A method for making a micro-electronic non-volatile memory device provided with transistors having gates placed side by side, the method comprising the steps of: - forming a diblock copolymer layer above the layer based on said first gate material lying on a support, - selectively removing in the diblock copolymer layer, blocks based on a polymer of said copolymer, so as to retain patterns separated by a given distance, said patterns being based on another polymer of said copolymer, the method further comprising the steps of: a) forming, by etching said first gate material through said patterns, of at least one first transistor gate block and at least one sacrificial block, said first block and said sacrificial block being separated by a given space (l 2), b) forming in said given space at least one insulating layer and a second gate material, said second gate material in said space forming another gate block separated from the first block by said insulating layer, - formation of a mask covering said first gate block and said a part of said sacrificial block, the mask being formed to cover part of the sacrificial block on one side of the first gate block and extending beyond another side of the first gate block, in particular of a length that is less than the given distance (l 2) - successive etchings through said mask, of the second gate material, the insulating layer, c) suppressing said sacrificial block, the sacrificial block being removed by etching through said mask, - forming a diblock copolymer layer above the layer based on said first gate material lying on a support, - selectively removing in the diblock copolymer layer, blocks based on a polymer of said copolymer, so as to retain patterns separated by a given distance, said patterns being based on another polymer of said copolymer, the method further comprising the steps of: a) forming, by etching said first gate material through said patterns, of at least one first transistor gate block and at least one sacrificial block, said first block and said sacrificial block being separated by a given space (l 2), b) forming in said given space at least one insulating layer and a second gate material, said second gate material in said space forming another gate block separated from the first block by said insulating layer, a) forming, by etching said first gate material through said patterns, of at least one first transistor gate block and at least one sacrificial block, said first block and said sacrificial block being separated by a given space (l 2), b) forming in said given space at least one insulating layer and a second gate material, said second gate material in said space forming another gate block separated from the first block by said insulating layer, - formation of a mask covering said first gate block and said a part of said sacrificial block, the mask being formed to cover part of the sacrificial block on one side of the first gate block and extending beyond another side of the first gate block, in particular of a length that is less than the given distance (l 2) - successive etchings through said mask, of the second gate material, the insulating layer, c) suppressing said sacrificial block, the sacrificial block being removed by etching through said mask, c) suppressing said sacrificial block, the sacrificial block being removed by etching through said mask,