A block-based computing system, comprising: a plurality of processor cores configured to execute at least one instruction block, the instruction block comprising an instruction block header and a plurality of instructions, the plurality of instructions comprising a first plurality of instructions and a second plurality of instructions, the at least one instruction block encoding a data-flow instruction set architecture ISA, wherein the data-flow ISA comprises: the first plurality of instructions, wherein the first plurality of instructions specify at least a first target instruction without specifying a data source operand; the second plurality of instructions, wherein the second plurality of instructions specify a second target instruction and at least one operand, wherein one or more of the second plurality of instructions comprises at least one register Read instruction (430, 431) specifying at least a second target instruction and a data source operand that specifies a register and wherein a result from executing the at least one register Read instruction (430, 431) is forwarded to an operand buffer of the second target instruction, prior to fetching the second target instruction, wherein the first plurality of instructions comprises the second target instruction; and a predicated instruction associated with a condition, characterized in that: the at least one register Read instruction forms part of the plurality of instructions, instead of the instruction block header, and wherein execution of a first register Read instruction is predicated upon whether the condition is satisfied. a plurality of processor cores configured to execute at least one instruction block, the instruction block comprising an instruction block header and a plurality of instructions, the plurality of instructions comprising a first plurality of instructions and a second plurality of instructions, the at least one instruction block encoding a data-flow instruction set architecture ISA, wherein the data-flow ISA comprises: the first plurality of instructions, wherein the first plurality of instructions specify at least a first target instruction without specifying a data source operand; the second plurality of instructions, wherein the second plurality of instructions specify a second target instruction and at least one operand, wherein one or more of the second plurality of instructions comprises at least one register Read instruction (430, 431) specifying at least a second target instruction and a data source operand that specifies a register and wherein a result from executing the at least one register Read instruction (430, 431) is forwarded to an operand buffer of the second target instruction, prior to fetching the second target instruction, wherein the first plurality of instructions comprises the second target instruction; and a predicated instruction associated with a condition, characterized in that: the at least one register Read instruction forms part of the plurality of instructions, instead of the instruction block header, and wherein execution of a first register Read instruction is predicated upon whether the condition is satisfied. the first plurality of instructions, wherein the first plurality of instructions specify at least a first target instruction without specifying a data source operand; the second plurality of instructions, wherein the second plurality of instructions specify a second target instruction and at least one operand, wherein one or more of the second plurality of instructions comprises at least one register Read instruction (430, 431) specifying at least a second target instruction and a data source operand that specifies a register and wherein a result from executing the at least one register Read instruction (430, 431) is forwarded to an operand buffer of the second target instruction, prior to fetching the second target instruction, wherein the first plurality of instructions comprises the second target instruction; and a predicated instruction associated with a condition, the at least one register Read instruction forms part of the plurality of instructions, instead of the instruction block header, and wherein execution of a first register Read instruction is predicated upon whether the condition is satisfied.