A semiconductor device comprising: a semiconductor substrate consisting of an n + drain region and thereon an n- region; two p-wells (67,68) in the exposed surface of the n- region; a respective n + source region (69,70) in the exposed surface of each p-well (67,68); an insulated gate transistor a) that includes an insulated gate electrode, encapsulated in an insulating film, the gate electrode extends over the portion of the n- region between the two p-wells (67,68) and over a channel forming region in each p-well to a respective source region (69,70), and b) that is configured to perform switching for a current flowing through the channel forming region in a thickness direction of the semiconductor substrate; a first electrode terminal that is provided on a first conductive material that is provided on an upper surface of the semiconductor substrate, and a second electrode terminal that is provided on a second conductive material that is provided on a lower surface of the semiconductor substrate; wherein a respective first support is provided on each p-well (67,68) outside the source region (69,70); a second support is provided on the insulated gate electrode; and third supports are provided on the drain region opposite to the first supports, and wherein the first conductive material is on the source regions (69,70), the p-wells (67,68), the insulated gate electrode and the first and second supports (72,73); and the second conductive material is on the drain region and the third supports. a semiconductor substrate consisting of an n + drain region and thereon an n- region; two p-wells (67,68) in the exposed surface of the n- region; a respective n + source region (69,70) in the exposed surface of each p-well (67,68); an insulated gate transistor a) that includes an insulated gate electrode, encapsulated in an insulating film, the gate electrode extends over the portion of the n- region between the two p-wells (67,68) and over a channel forming region in each p-well to a respective source region (69,70), and b) that is configured to perform switching for a current flowing through the channel forming region in a thickness direction of the semiconductor substrate; a) that includes an insulated gate electrode, encapsulated in an insulating film, the gate electrode extends over the portion of the n- region between the two p-wells (67,68) and over a channel forming region in each p-well to a respective source region (69,70), and b) that is configured to perform switching for a current flowing through the channel forming region in a thickness direction of the semiconductor substrate; a first electrode terminal that is provided on a first conductive material that is provided on an upper surface of the semiconductor substrate, and a second electrode terminal that is provided on a second conductive material that is provided on a lower surface of the semiconductor substrate; wherein a respective first support is provided on each p-well (67,68) outside the source region (69,70); a second support is provided on the insulated gate electrode; and third supports are provided on the drain region opposite to the first supports, and wherein the first conductive material is on the source regions (69,70), the p-wells (67,68), the insulated gate electrode and the first and second supports (72,73); and the second conductive material is on the drain region and the third supports.