A display panel having an array of a plurality of subpixels (Sp1, Sp2, Sp3, Sp4,..., Sp10), comprising: a plurality of light modulators (M1, M2, M3,..., M10) configured to modulate display contrast of the display panel, each of the plurality of light modulators (M1, M2, M3,..., M10) is in a light modulation region (R1, R2, R3,..., R10) configured to allow light transmitting through the display panel; wherein light transmittance in the light modulation region is controlled by a first gate line and a first data line for driving image display in a first subpixel of the plurality of subpixels (Sp1, Sp2, Sp3, Sp4,..., Sp10), wherein each subpixel (Spl, Sp2, Sp3, Sp4,..., Sp10) is associated with one of the plurality of light modulators (MI, M2, M3,..., M10), and each subpixel (Spl, Sp2, Sp3, Sp4,..., Sp10) and the light modulator being associated therewith are connected to the same gate line and the same data line, wherein each of the plurality of light modulators (M1, M2, M3,..., M10) comprises a first electrode, an electrochromic layer on the first electrode, and a second electrode on a side of the electrochromic layer distal to the first electrode, and wherein the display panel further comprises a first thin film transistor in the light modulation region having a gate electrode coupled to the first gate line, a source electrode coupled to the first electrode, and a drain electrode coupled to ground, and a second thin film transistor in the first subpixel comprising a gate electrode coupled to the first gate line, a source electrode coupled to the first data line, and a drain electrode coupled to a third electrode in the first subpixel, wherein the second thin film transistor in the first subpixel further comprising an active layer; and the source electrode of the first thin film transistor is coupled to the active layer of the second thin film transistor. a plurality of light modulators (M1, M2, M3,..., M10) configured to modulate display contrast of the display panel, each of the plurality of light modulators (M1, M2, M3,..., M10) is in a light modulation region (R1, R2, R3,..., R10) configured to allow light transmitting through the display panel; wherein light transmittance in the light modulation region is controlled by a first gate line and a first data line for driving image display in a first subpixel of the plurality of subpixels (Sp1, Sp2, Sp3, Sp4,..., Sp10), wherein each subpixel (Spl, Sp2, Sp3, Sp4,..., Sp10) is associated with one of the plurality of light modulators (MI, M2, M3,..., M10), and each subpixel (Spl, Sp2, Sp3, Sp4,..., Sp10) and the light modulator being associated therewith are connected to the same gate line and the same data line, wherein each of the plurality of light modulators (M1, M2, M3,..., M10) comprises a first electrode, an electrochromic layer on the first electrode, and a second electrode on a side of the electrochromic layer distal to the first electrode, and wherein the display panel further comprises a first thin film transistor in the light modulation region having a gate electrode coupled to the first gate line, a source electrode coupled to the first electrode, and a drain electrode coupled to ground, and a second thin film transistor in the first subpixel comprising a gate electrode coupled to the first gate line, a source electrode coupled to the first data line, and a drain electrode coupled to a third electrode in the first subpixel, wherein the second thin film transistor in the first subpixel further comprising an active layer; and the source electrode of the first thin film transistor is coupled to the active layer of the second thin film transistor.