A semiconductor device comprising: a first semiconductor substrate in which a pixel region where pixel portions performing photoelectric conversion are two-dimensionally arranged is formed; an on-chip lens formed on the first semiconductor substrate in the pixel region; and a second semiconductor substrate in which a logic circuit processing a pixel signal output from the pixel portion is formed, the first and second semiconductor substrates (12, 11) being laminated, wherein: a laminated structure of the first and second semiconductor substrates (12, 11) includes a wiring layer of the first semiconductor substrate and a wiring layer of the second semiconductor substrate being in contact with one another, a protective substrate protecting the on-chip lens is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin interposed between the protective substrate and the on-chip lens; a through electrode penetrates through the first semiconductor substrate and the second semiconductor substrate and electrically connects an electrode portion outputting the pixel signal to an outside of the semiconductor device to the wiring layer of the second semiconductor substrate; a rewiring electrically connects the through electrode to the electrode portion, the rewiring and the electrode portion are formed on a surface of the second semiconductor substrate opposite to the surface facing the first semiconductor substrate, and the wiring layer of the first semiconductor substrate and the wiring layer of the second semiconductor substrate are connected by a metal bond of one or more of the wiring layers (82, 102). a first semiconductor substrate in which a pixel region where pixel portions performing photoelectric conversion are two-dimensionally arranged is formed; an on-chip lens formed on the first semiconductor substrate in the pixel region; and a second semiconductor substrate in which a logic circuit processing a pixel signal output from the pixel portion is formed, the first and second semiconductor substrates (12, 11) being laminated, wherein: a laminated structure of the first and second semiconductor substrates (12, 11) includes a wiring layer of the first semiconductor substrate and a wiring layer of the second semiconductor substrate being in contact with one another, a protective substrate protecting the on-chip lens is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin interposed between the protective substrate and the on-chip lens; a through electrode penetrates through the first semiconductor substrate and the second semiconductor substrate and electrically connects an electrode portion outputting the pixel signal to an outside of the semiconductor device to the wiring layer of the second semiconductor substrate; a rewiring electrically connects the through electrode to the electrode portion, the rewiring and the electrode portion are formed on a surface of the second semiconductor substrate opposite to the surface facing the first semiconductor substrate, and the wiring layer of the first semiconductor substrate and the wiring layer of the second semiconductor substrate are connected by a metal bond of one or more of the wiring layers (82, 102). a laminated structure of the first and second semiconductor substrates (12, 11) includes a wiring layer of the first semiconductor substrate and a wiring layer of the second semiconductor substrate being in contact with one another, a protective substrate protecting the on-chip lens is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin interposed between the protective substrate and the on-chip lens; a through electrode penetrates through the first semiconductor substrate and the second semiconductor substrate and electrically connects an electrode portion outputting the pixel signal to an outside of the semiconductor device to the wiring layer of the second semiconductor substrate; a rewiring electrically connects the through electrode to the electrode portion, the rewiring and the electrode portion are formed on a surface of the second semiconductor substrate opposite to the surface facing the first semiconductor substrate, and the wiring layer of the first semiconductor substrate and the wiring layer of the second semiconductor substrate are connected by a metal bond of one or more of the wiring layers (82, 102).