A circuit (100, 101) for an artificial neural network, comprising: an input configured to receive one or more bits whose values are representative of an input value; a sampling circuit connectable to a multibit memory array, wherein the sampling circuit includes a sampling capacitor and is configured to sample a weight value stored in a memory cell of the multibit memory array, and output on a bit line associated with said memory cell, as a voltage across the sampling capacitor; a capacitance network including a plurality of capacitors (142, 143) and a plurality of switching elements (144, 146) connecting the multiple capacitors together, such that the capacitance network can be operated to have a selected capacitance which depends on a configuration of the plurality of switching elements, and at least one buffering circuit configured to charge the selected capacitance of the capacitance network based on the voltage across the sampling capacitor, wherein the circuit is further configured to: operating the capacitance network, by means of the plurality of switches, to a first state wherein the capacitance network has a first selected capacitance and to a second state wherein the capacitance network has a second selected capacitance, wherein either the first selected capacitance or the second selected capacitance depends on the value of the one or more bits of the input value and the other selected capacitance does not depend on the value of the one or more bits of the input value; charging to a first charge, by using the at least one buffering circuit, the capacitance network while the capacitance network is in the first state, and after charging and with the buffering circuit disabled or disconnected from the selected capacitance, allowing the first charge to be redistributed within the capacitance network when the capacitance network changes from the first state to the second state, and such that a potential at one or more points within the capacitance network is representative of a scaling of said input value with said weight value; and wherein the circuit further comprises an output configured to provide an output voltage representative of said potential at said one or more points. an input configured to receive one or more bits whose values are representative of an input value; a sampling circuit connectable to a multibit memory array, wherein the sampling circuit includes a sampling capacitor and is configured to sample a weight value stored in a memory cell of the multibit memory array, and output on a bit line associated with said memory cell, as a voltage across the sampling capacitor; a capacitance network including a plurality of capacitors (142, 143) and a plurality of switching elements (144, 146) connecting the multiple capacitors together, such that the capacitance network can be operated to have a selected capacitance which depends on a configuration of the plurality of switching elements, and at least one buffering circuit configured to charge the selected capacitance of the capacitance network based on the voltage across the sampling capacitor, wherein the circuit is further configured to: operating the capacitance network, by means of the plurality of switches, to a first state wherein the capacitance network has a first selected capacitance and to a second state wherein the capacitance network has a second selected capacitance, wherein either the first selected capacitance or the second selected capacitance depends on the value of the one or more bits of the input value and the other selected capacitance does not depend on the value of the one or more bits of the input value; charging to a first charge, by using the at least one buffering circuit, the capacitance network while the capacitance network is in the first state, and after charging and with the buffering circuit disabled or disconnected from the selected capacitance, allowing the first charge to be redistributed within the capacitance network when the capacitance network changes from the first state to the second state, and such that a potential at one or more points within the capacitance network is representative of a scaling of said input value with said weight value; and wherein the circuit further comprises an output configured to provide an output voltage representative of said potential at said one or more points. operating the capacitance network, by means of the plurality of switches, to a first state wherein the capacitance network has a first selected capacitance and to a second state wherein the capacitance network has a second selected capacitance, wherein either the first selected capacitance or the second selected capacitance depends on the value of the one or more bits of the input value and the other selected capacitance does not depend on the value of the one or more bits of the input value; charging to a first charge, by using the at least one buffering circuit, the capacitance network while the capacitance network is in the first state, and after charging and with the buffering circuit disabled or disconnected from the selected capacitance, allowing the first charge to be redistributed within the capacitance network when the capacitance network changes from the first state to the second state, and such that a potential at one or more points within the capacitance network is representative of a scaling of said input value with said weight value; and wherein the circuit further comprises an output configured to provide an output voltage representative of said potential at said one or more points.