A method of manufacturing a semiconductor device wherein said method includes: providing a semiconductor body (1, 2); forming a first semiconductor region from a semiconductor material having a band-gap width different from that of the semiconductor body (1, 2) and having a first conductivity type, so that a first hetero-junction interface is formed between the semiconductor body (1, 2) and the first semiconductor region; forming a second semiconductor region (6, 6a) in a predetermined area of a surface of the semiconductor body (1, 2), doped into the first semiconductor region, from a semiconductor material having a band-gap width different from that of the semiconductor body (1, 2), and having a second conductivity type, so that a second hetero-junction interface is formed between the semiconductor body (1, 2) and the second semiconductor region (6, 6a); forming the first semiconductor region doped with an impurity of the first conductivity type on the surface of the semiconductor body (1, 2); forming a mask layer on the first semiconductor region; forming a side wall that is provided on a side face of the mask layer and covers part of the second semiconductor region (6, 6a), the width of the side wall being controlled to form said second semiconductor region of a desired width, etching the second semiconductor region using the mask layer, or the mask layer and the side wall as a mask; thereafter, arranging a gate electrode in said predetermined area to be adjacent, via a gate insulating film, to at least said second hetero-junction interface of said first and second hetero-junction interfaces; forming a source electrode connected to the first and second semiconductor region (5, 6, 6a); and forming a drain electrode connected to the semiconductor body (1, 2). providing a semiconductor body (1, 2); forming a first semiconductor region from a semiconductor material having a band-gap width different from that of the semiconductor body (1, 2) and having a first conductivity type, so that a first hetero-junction interface is formed between the semiconductor body (1, 2) and the first semiconductor region; forming a second semiconductor region (6, 6a) in a predetermined area of a surface of the semiconductor body (1, 2), doped into the first semiconductor region, from a semiconductor material having a band-gap width different from that of the semiconductor body (1, 2), and having a second conductivity type, so that a second hetero-junction interface is formed between the semiconductor body (1, 2) and the second semiconductor region (6, 6a); forming the first semiconductor region doped with an impurity of the first conductivity type on the surface of the semiconductor body (1, 2); forming a mask layer on the first semiconductor region; forming a side wall that is provided on a side face of the mask layer and covers part of the second semiconductor region (6, 6a), the width of the side wall being controlled to form said second semiconductor region of a desired width, etching the second semiconductor region using the mask layer, or the mask layer and the side wall as a mask; thereafter, arranging a gate electrode in said predetermined area to be adjacent, via a gate insulating film, to at least said second hetero-junction interface of said first and second hetero-junction interfaces; forming a source electrode connected to the first and second semiconductor region (5, 6, 6a); and forming a drain electrode connected to the semiconductor body (1, 2).