A receiver, comprising: a first signal processing block coupled to a communications channel, comprising: an automatic gain control "AGC" block and a continuous time linear equalization "CTLE" block for receiving a modulated signal for providing an analog signal; an analog-to-digital converter "ADC" for converting the analog signal to digital samples; and a feed-forward equalization "FFE" block for equalizing the digital samples to provide equalized samples; a second signal processing block, comprising: a decision feedback equalization "DFE" block for receiving the equalized samples for providing re-equalized samples; and a slicer coupled to the DFE block for slicing the re-equalized samples to provide decisions; a receiver adaptation block coupled to the first signal processing block and the second signal processing block, the receiver adaptation block configured for providing an AGC adaptation, a CTLE adaptation, and a slicer adaptation to the communications channel; a digital finite impulse response filter configured for receiving the decisions to provide an estimated residual inter-symbol interference "ISI"; a pre-filter configured for partial response equalization and noise shaping of the digital samples to provide a pre-filtered output; and a subtractor configured for receiving the pre-filtered output and the estimated residual ISI to reduce actual residual ISI in the pre-filtered output for providing an equalized signal. a first signal processing block coupled to a communications channel, comprising: an automatic gain control "AGC" block and a continuous time linear equalization "CTLE" block for receiving a modulated signal for providing an analog signal; an analog-to-digital converter "ADC" for converting the analog signal to digital samples; and a feed-forward equalization "FFE" block for equalizing the digital samples to provide equalized samples; an automatic gain control "AGC" block and a continuous time linear equalization "CTLE" block for receiving a modulated signal for providing an analog signal; an analog-to-digital converter "ADC" for converting the analog signal to digital samples; and a feed-forward equalization "FFE" block for equalizing the digital samples to provide equalized samples; a second signal processing block, comprising: a decision feedback equalization "DFE" block for receiving the equalized samples for providing re-equalized samples; and a slicer coupled to the DFE block for slicing the re-equalized samples to provide decisions; a decision feedback equalization "DFE" block for receiving the equalized samples for providing re-equalized samples; and a slicer coupled to the DFE block for slicing the re-equalized samples to provide decisions; a receiver adaptation block coupled to the first signal processing block and the second signal processing block, the receiver adaptation block configured for providing an AGC adaptation, a CTLE adaptation, and a slicer adaptation to the communications channel; a digital finite impulse response filter configured for receiving the decisions to provide an estimated residual inter-symbol interference "ISI"; a pre-filter configured for partial response equalization and noise shaping of the digital samples to provide a pre-filtered output; and a subtractor configured for receiving the pre-filtered output and the estimated residual ISI to reduce actual residual ISI in the pre-filtered output for providing an equalized signal.