A method of initiating a memory storage system having flash memory containing firmware code, a microprocessor, a read-only-memory, hereinafter referred to as ROM, containing microprocessor accessible boot code and a random-access-memory, hereinafter referred to as RAM, for storing microprocessor accessible firmware code; the method characterised in that: the boot code comprises an error correction algorithm; the flash memory contains at least first and second copies of the firmware code stored in different locations, therein; the method further characterised by: storing each of the first and second firmware copies as units of data that individually have an error-correction-code, hereinafter referred to as ECC, calculated therefrom and stored in association therewith; initially accessing a plurality of fixed locations in the flash memory one at a time until an initialization memory map is discovered to be stored at least one of the plurality of fixed locations and that contains addresses (67, 69) of the different locations of the flash memory wherein said at least first and second copies of firmware code are stored, reading data of the initialization memory map to obtain said addresses (67, 69), and thereafter accessing the first copy of the firmware code; thereafter executing the boot code to transfer a first copy of the firmware from the flash memory to the RAM together with the ECCs stored in association with the units of data of the first copy of the firmware code; and identifying any bit errors in the transferred first copy of the firmware code and therefore the data unit in which they occur by calculating ECCs of the data units of the transferred first copy of the firmware and by comparing the calculated ECCs of the said data units with the transferred ECCs; the method further characterised in that: if any of the identified bit errors are correctable with the transferred ECC, correcting the correctable erroneous bits using the error correction algorithm of the boot code and the transferred ECC; and if any of the identified bit errors are not correctable with the transferred ECC, reading a portion of the second copy of the firmware code including the data unit containing the uncorrectable bits into the RAM in place of the corresponding data unit of the first copy; the method further characterised by: in response to identifying a number of bit errors of a predefined number of one or more, rewriting the corrected first copy of the firmware in the flash memory in a different location than it was originally stored; and executing a copy of the firmware code from the RAM. the boot code comprises an error correction algorithm; the flash memory contains at least first and second copies of the firmware code stored in different locations, therein; storing each of the first and second firmware copies as units of data that individually have an error-correction-code, hereinafter referred to as ECC, calculated therefrom and stored in association therewith; initially accessing a plurality of fixed locations in the flash memory one at a time until an initialization memory map is discovered to be stored at least one of the plurality of fixed locations and that contains addresses (67, 69) of the different locations of the flash memory wherein said at least first and second copies of firmware code are stored, reading data of the initialization memory map to obtain said addresses (67, 69), and thereafter accessing the first copy of the firmware code; thereafter executing the boot code to transfer a first copy of the firmware from the flash memory to the RAM together with the ECCs stored in association with the units of data of the first copy of the firmware code; and identifying any bit errors in the transferred first copy of the firmware code and therefore the data unit in which they occur by calculating ECCs of the data units of the transferred first copy of the firmware and by comparing the calculated ECCs of the said data units with the transferred ECCs; if any of the identified bit errors are correctable with the transferred ECC, correcting the correctable erroneous bits using the error correction algorithm of the boot code and the transferred ECC; and if any of the identified bit errors are not correctable with the transferred ECC, reading a portion of the second copy of the firmware code including the data unit containing the uncorrectable bits into the RAM in place of the corresponding data unit of the first copy; in response to identifying a number of bit errors of a predefined number of one or more, rewriting the corrected first copy of the firmware in the flash memory in a different location than it was originally stored; and executing a copy of the firmware code from the RAM.