A mixed signal programmable integrated circuit architecture for image processing in a single chip, capable of performing image sensing, preprocessing, storage and autonomous post-processing, which comprises: a) a regular two-dimensional spatial distribution of locally interconnected identical cells which combine the capabilities of photo-transduction, pre-processing over analogue and binary images and storing them, and b) a digital post-processing and storage system; and wherein each cell of said regular two-dimensional spatial distribution of identical cells comprises means for computing one or several weighted sums of neighbouring cell contributions by means of programmable analogue circuitry, these weighted sums being achieved as the basis for the image early-processing algorithms, and wherein each cell of said regular two-dimensional spatial distribution of identical cells comprises: - at least one photosensor and its adaptation and interface circuitry; - at least one analogue memory and at least one binary memory, which at the system level make up image memories the pixels of which have respective analogue or binary values, - a weighting and addition circuitry in which the weighting factors used in calculating the weighted sums are electrically programmable in a spatially uniform manner, - processing circuitry responsible for performing simple operations on the result of adding one or several weighted sums of neigbouring cell contributions proportional to one or several images, the relevant coefficients for performing said operations also being electrically programmable in a spatially invariant manner; - control and connection circuitry for data exchange between said photosensors, memories and processing circuits at cell level, simultaneously in all cells, such that they make up image transfers in a completely parallel manner at system level, with a bus width equal to the number of pixels in the image; characterized in that it further comprises: - conversion circuitry and - a local circuitry and connection configured for allowing transferring the content of a respective analogue or binary memory to another specified neighbouring cell according to a spatially invariant programmable shift vector, thus resulting at a global level in a shift in the entire image. a) a regular two-dimensional spatial distribution of locally interconnected identical cells which combine the capabilities of photo-transduction, pre-processing over analogue and binary images and storing them, and b) a digital post-processing and storage system; and wherein each cell of said regular two-dimensional spatial distribution of identical cells comprises means for computing one or several weighted sums of neighbouring cell contributions by means of programmable analogue circuitry, these weighted sums being achieved as the basis for the image early-processing algorithms, and wherein each cell of said regular two-dimensional spatial distribution of identical cells comprises: - at least one photosensor and its adaptation and interface circuitry; - at least one analogue memory and at least one binary memory, which at the system level make up image memories the pixels of which have respective analogue or binary values, - a weighting and addition circuitry in which the weighting factors used in calculating the weighted sums are electrically programmable in a spatially uniform manner, - processing circuitry responsible for performing simple operations on the result of adding one or several weighted sums of neigbouring cell contributions proportional to one or several images, the relevant coefficients for performing said operations also being electrically programmable in a spatially invariant manner; - control and connection circuitry for data exchange between said photosensors, memories and processing circuits at cell level, simultaneously in all cells, such that they make up image transfers in a completely parallel manner at system level, with a bus width equal to the number of pixels in the image; - at least one photosensor and its adaptation and interface circuitry; - at least one analogue memory and at least one binary memory, which at the system level make up image memories the pixels of which have respective analogue or binary values, - a weighting and addition circuitry in which the weighting factors used in calculating the weighted sums are electrically programmable in a spatially uniform manner, - processing circuitry responsible for performing simple operations on the result of adding one or several weighted sums of neigbouring cell contributions proportional to one or several images, the relevant coefficients for performing said operations also being electrically programmable in a spatially invariant manner; - control and connection circuitry for data exchange between said photosensors, memories and processing circuits at cell level, simultaneously in all cells, such that they make up image transfers in a completely parallel manner at system level, with a bus width equal to the number of pixels in the image; - conversion circuitry and - a local circuitry and connection configured for allowing transferring the content of a respective analogue or binary memory to another specified neighbouring cell according to a spatially invariant programmable shift vector, thus resulting at a global level in a shift in the entire image.