An encoding method comprising: a step of inputting information X r,i at point in time i, the r representing each integer from 1 to z-1, and generating parity bits of a low-density parity-check convolutional code, LDPC-CC, of a time varying period of g, where g is a natural number, by using a parity check polynomial that is according to equation 1, with respect to a coding rate of (z-1)/z; or a step of inputting information X r,i at point in time i, the r representing each integer from 1 to y-1, and generating parity bits of the LDPC-CC of the time varying period of g by using a parity check polynomial that is according to equation 2, with respect to a coding rate of (y-1)/y, where y < z, wherein: the combination of the y and the z is any one of (2, 3), (3, 4), and (4, 5); B k D P D + ∑ r = 1 z − 1 A Xr, k D X r D = 0 k = i mod g where D is a delay operator and k is a integer equal to or greater than zero; B k D P D + ∑ r = 1 y − 1 A Xr, k D X r D = 0 k = i mod g where D is a delay operator and k is a integer equal to or greater than zero; the method characterized in that when r is an integer from 1 to y-1, the coefficients A Xr,k of equation 1 and A Xr,k of equation 2 are equal, and the coefficients B k of equation 1 and B k of equation 2 are equal, wherein said generating parity bits by using the parity check polynomial that is according to equation 1 and said generating parity bits by using the parity check polynomial that is according to equation 2 use, respectively, encoders, which have a shared circuit. a step of inputting information X r,i at point in time i, the r representing each integer from 1 to z-1, and generating parity bits of a low-density parity-check convolutional code, LDPC-CC, of a time varying period of g, where g is a natural number, by using a parity check polynomial that is according to equation 1, with respect to a coding rate of (z-1)/z; or a step of inputting information X r,i at point in time i, the r representing each integer from 1 to y-1, and generating parity bits of the LDPC-CC of the time varying period of g by using a parity check polynomial that is according to equation 2, with respect to a coding rate of (y-1)/y, where y < z, wherein: the combination of the y and the z is any one of (2, 3), (3, 4), and (4, 5); B k D P D + ∑ r = 1 z − 1 A Xr, k D X r D = 0 k = i mod g where D is a delay operator and k is a integer equal to or greater than zero; B k D P D + ∑ r = 1 y − 1 A Xr, k D X r D = 0 k = i mod g where D is a delay operator and k is a integer equal to or greater than zero; the method characterized in that when r is an integer from 1 to y-1, the coefficients A Xr,k of equation 1 and A Xr,k of equation 2 are equal, and the coefficients B k of equation 1 and B k of equation 2 are equal, wherein said generating parity bits by using the parity check polynomial that is according to equation 1 and said generating parity bits by using the parity check polynomial that is according to equation 2 use, respectively, encoders, which have a shared circuit. the combination of the y and the z is any one of (2, 3), (3, 4), and (4, 5); B k D P D + ∑ r = 1 z − 1 A Xr, k D X r D = 0 k = i mod g where D is a delay operator and k is a integer equal to or greater than zero; B k D P D + ∑ r = 1 y − 1 A Xr, k D X r D = 0 k = i mod g where D is a delay operator and k is a integer equal to or greater than zero; the method characterized in that when r is an integer from 1 to y-1, the coefficients A Xr,k of equation 1 and A Xr,k of equation 2 are equal, and the coefficients B k of equation 1 and B k of equation 2 are equal, wherein said generating parity bits by using the parity check polynomial that is according to equation 1 and said generating parity bits by using the parity check polynomial that is according to equation 2 use, respectively, encoders, which have a shared circuit.