A system for calibrating a transimpedance amplifier, comprising: a current digital to analog converter, DAC, operable to generate an idac current, wherein the current DAC is a DAC controlled by a digital state machine, and a value of the idac current is determined based on a first state level of the digital state machine a transimpedance amplifier, TIA, operable to receive the idac current and to generate an intermediate signal voltage and generate an output voltage (Vout), wherein the TIA comprises: a first bipolar transistor, BJT, having its base connected to receive the idac current from the current DAC, a load coupled between a supply voltage and a collector of the first bipolar transistor, a buffer coupled between the collector of the first bipolar transistor and an intermediate node, an output of the buffer being an intermediate signal received at the intermediate node, the intermediate signal having the intermediate signal voltage, a feedback resistor coupled between the intermediate node and the base of the first bipolar transistor, a second bipolar transistor, BJT, a resistor connected between the intermediate signal node and a base of the second bipolar transistor, a second feedback resistor connected between the base and the collector of the second bipolar transistor, and a second load connected to the collector of the second bipolar transistor; a comparator operable to receive the intermediate signal voltage and a reference voltage and generate an output indicating whether the intermediate signal voltage is less than the reference voltage, the reference voltage being a voltage of a node between the resistor and the base of the second bipolar transistor; and the digital state machine operable to generate a second state level based on the output of the comparator; wherein, the current DAC changes its generated idac current if there is a difference between the first state level and the second state level during a calibration process of the TIA. a current digital to analog converter, DAC, operable to generate an idac current, wherein the current DAC is a DAC controlled by a digital state machine, and a value of the idac current is determined based on a first state level of the digital state machine a transimpedance amplifier, TIA, operable to receive the idac current and to generate an intermediate signal voltage and generate an output voltage (Vout), wherein the TIA comprises: a first bipolar transistor, BJT, having its base connected to receive the idac current from the current DAC, a load coupled between a supply voltage and a collector of the first bipolar transistor, a buffer coupled between the collector of the first bipolar transistor and an intermediate node, an output of the buffer being an intermediate signal received at the intermediate node, the intermediate signal having the intermediate signal voltage, a feedback resistor coupled between the intermediate node and the base of the first bipolar transistor, a second bipolar transistor, BJT, a resistor connected between the intermediate signal node and a base of the second bipolar transistor, a second feedback resistor connected between the base and the collector of the second bipolar transistor, and a second load connected to the collector of the second bipolar transistor; a comparator operable to receive the intermediate signal voltage and a reference voltage and generate an output indicating whether the intermediate signal voltage is less than the reference voltage, the reference voltage being a voltage of a node between the resistor and the base of the second bipolar transistor; and the digital state machine operable to generate a second state level based on the output of the comparator; wherein, the current DAC changes its generated idac current if there is a difference between the first state level and the second state level during a calibration process of the TIA. a first bipolar transistor, BJT, having its base connected to receive the idac current from the current DAC, a load coupled between a supply voltage and a collector of the first bipolar transistor, a buffer coupled between the collector of the first bipolar transistor and an intermediate node, an output of the buffer being an intermediate signal received at the intermediate node, the intermediate signal having the intermediate signal voltage, a feedback resistor coupled between the intermediate node and the base of the first bipolar transistor, a second bipolar transistor, BJT, a resistor connected between the intermediate signal node and a base of the second bipolar transistor, a second feedback resistor connected between the base and the collector of the second bipolar transistor, and a second load connected to the collector of the second bipolar transistor; a comparator operable to receive the intermediate signal voltage and a reference voltage and generate an output indicating whether the intermediate signal voltage is less than the reference voltage, the reference voltage being a voltage of a node between the resistor and the base of the second bipolar transistor; and the digital state machine operable to generate a second state level based on the output of the comparator; wherein, the current DAC changes its generated idac current if there is a difference between the first state level and the second state level during a calibration process of the TIA.