An apparatus comprising: a package comprising one or more integrated circuit dies (1310, 1311, 1312, 1313, 1314), the one or more integrated circuit dies comprising: a plurality of cores (1315, 1316, 1317, 1318, 1319); and a security controller (1321, 1322, 1323, 1324, 1325) coupled to the plurality of cores, a first core of the plurality of cores comprising: a decoder to decode a microcode patching instruction, the microcode patching instruction comprising an operand to be used to identify an address; and execution circuitry to execute the microcode patching instruction, wherein responsive to the microcode patching instruction, the execution circuitry and/or security controller are to: retrieve a microcode patch from a location in memory based on the address, validate the microcode patch, wherein validating the microcode patch comprises evaluating metadata associated with the microcode patch to determine applicability of the microcode patch to the plurality of cores and/or intellectual property blocks of the one or more integrated circuit dies (1310, 1311, 1312, 1313, 1314), apply the microcode patch to update or replace microcode associated with the one or more integrated circuit dies, and transmit the microcode patch to a persistent storage device; wherein the microcode patch is to be subsequently retrieved from the persistent storage device by one or more external security controllers of one or more external integrated circuit dies, the one or more external security controllers to cause the microcode patch to be applied to update or replace microcode associated with the one or more external integrated circuit dies. a plurality of cores (1315, 1316, 1317, 1318, 1319); and a security controller (1321, 1322, 1323, 1324, 1325) coupled to the plurality of cores, a first core of the plurality of cores comprising: a decoder to decode a microcode patching instruction, the microcode patching instruction comprising an operand to be used to identify an address; and execution circuitry to execute the microcode patching instruction, wherein responsive to the microcode patching instruction, the execution circuitry and/or security controller are to: retrieve a microcode patch from a location in memory based on the address, validate the microcode patch, wherein validating the microcode patch comprises evaluating metadata associated with the microcode patch to determine applicability of the microcode patch to the plurality of cores and/or intellectual property blocks of the one or more integrated circuit dies (1310, 1311, 1312, 1313, 1314), apply the microcode patch to update or replace microcode associated with the one or more integrated circuit dies, and transmit the microcode patch to a persistent storage device; wherein the microcode patch is to be subsequently retrieved from the persistent storage device by one or more external security controllers of one or more external integrated circuit dies, the one or more external security controllers to cause the microcode patch to be applied to update or replace microcode associated with the one or more external integrated circuit dies. a decoder to decode a microcode patching instruction, the microcode patching instruction comprising an operand to be used to identify an address; and execution circuitry to execute the microcode patching instruction, wherein responsive to the microcode patching instruction, the execution circuitry and/or security controller are to: retrieve a microcode patch from a location in memory based on the address, validate the microcode patch, wherein validating the microcode patch comprises evaluating metadata associated with the microcode patch to determine applicability of the microcode patch to the plurality of cores and/or intellectual property blocks of the one or more integrated circuit dies (1310, 1311, 1312, 1313, 1314), apply the microcode patch to update or replace microcode associated with the one or more integrated circuit dies, and transmit the microcode patch to a persistent storage device; wherein the microcode patch is to be subsequently retrieved from the persistent storage device by one or more external security controllers of one or more external integrated circuit dies, the one or more external security controllers to cause the microcode patch to be applied to update or replace microcode associated with the one or more external integrated circuit dies. retrieve a microcode patch from a location in memory based on the address, validate the microcode patch, wherein validating the microcode patch comprises evaluating metadata associated with the microcode patch to determine applicability of the microcode patch to the plurality of cores and/or intellectual property blocks of the one or more integrated circuit dies (1310, 1311, 1312, 1313, 1314), apply the microcode patch to update or replace microcode associated with the one or more integrated circuit dies, and transmit the microcode patch to a persistent storage device; wherein the microcode patch is to be subsequently retrieved from the persistent storage device by one or more external security controllers of one or more external integrated circuit dies, the one or more external security controllers to cause the microcode patch to be applied to update or replace microcode associated with the one or more external integrated circuit dies.