A gate driver for providing a gate drive signal for a thin film transistor array substrate, the gate driver comprising: a driving capability detection module configured to receive at least a feedback signal collected from the gate drive signal and to detect a driving capability of the gate drive signal based at least on the feedback signal, the driving capability being represented by a rising time for the gate drive signal in the form of a voltage pulse signal to rise from a low level to a high level, the driving capability detection module further configured to output a detection signal indicative of the driving capability to a controller; a push-pull output circuit comprising a first MOS transistor and a second MOS transistor that are connected in series; and a driving capability adjustment module configured to adjust the driving capability of the gate drive signal based on an adjustment instruction in the form of a digital signal from the controller, wherein the driving capability adjustment module comprises: a register configured to receive and configurably store the adjustment instruction; characterized in that the driving capability adjustment module further comprises a driving capability adjustment component connected in series with the first MOS transistor and the second MOS transistor and between the first MOS transistor and the second MOS transistor, the driving capability adjustment component being adjusted and controlled by the adjustment instruction in the register, wherein the feedback signal is collected at a node between the second MOS transistor and the driving capability adjusting component. a driving capability detection module configured to receive at least a feedback signal collected from the gate drive signal and to detect a driving capability of the gate drive signal based at least on the feedback signal, the driving capability being represented by a rising time for the gate drive signal in the form of a voltage pulse signal to rise from a low level to a high level, the driving capability detection module further configured to output a detection signal indicative of the driving capability to a controller; a push-pull output circuit comprising a first MOS transistor and a second MOS transistor that are connected in series; and a driving capability adjustment module configured to adjust the driving capability of the gate drive signal based on an adjustment instruction in the form of a digital signal from the controller, wherein the driving capability adjustment module comprises: a register configured to receive and configurably store the adjustment instruction; characterized in that the driving capability adjustment module further comprises a driving capability adjustment component connected in series with the first MOS transistor and the second MOS transistor and between the first MOS transistor and the second MOS transistor, the driving capability adjustment component being adjusted and controlled by the adjustment instruction in the register, wherein the feedback signal is collected at a node between the second MOS transistor and the driving capability adjusting component. a register configured to receive and configurably store the adjustment instruction; characterized in that the driving capability adjustment module further comprises a driving capability adjustment component connected in series with the first MOS transistor and the second MOS transistor and between the first MOS transistor and the second MOS transistor, the driving capability adjustment component being adjusted and controlled by the adjustment instruction in the register, wherein the feedback signal is collected at a node between the second MOS transistor and the driving capability adjusting component.