A circuit, comprising: a first power averaging circuit including a first integrator (C16a) arranged to generate a first average power signal in response to resolver sensor output signals, wherein the first average power signal is generated by averaging the resolver sensor output signals over a first time window; a second power averaging circuit including a second integrator (C16b) arranged to generate a second average power signal in response to the resolver sensor output signals, wherein the second average power signal is generated by averaging resolver sensor output signals over a second time window shorter than the first time window; and a comparator circuit (1662, 1664) for comparing the first average power signal and the second average power signal and for generating a fault signal when the first average power signal and the second average power signal differ by a voltage threshold, wherein the circuit is configured to select the durations of the first and second time windows to have a duration such that an imbalance caused by a transient event is detectable by comparing the first average power signal and the second average power signal, characterized in that the first power averaging circuit and the second power averaging circuit each include: a first square circuit (1610, 1612) for generating a resolver sensor first output power signal for indicating the power of the resolver sensor first output signal, a second square circuit (1620, 1622) for generating a resolver sensor second output power signal for indicating the power of the resolver sensor second output signal, a third square circuit (1630, 1632) for generating an average value of the first and second average power signals (Vc1, Vc2) respectively, a summer (1640, 1642) for summing the resolver sensor first and second output power signals and subtracting the average value output by said third square circuit (1630, 1632) and coupling the summation to a respective one of the first integrator (C16a) and the second integrator (C16b). a first power averaging circuit including a first integrator (C16a) arranged to generate a first average power signal in response to resolver sensor output signals, wherein the first average power signal is generated by averaging the resolver sensor output signals over a first time window; a second power averaging circuit including a second integrator (C16b) arranged to generate a second average power signal in response to the resolver sensor output signals, wherein the second average power signal is generated by averaging resolver sensor output signals over a second time window shorter than the first time window; and a comparator circuit (1662, 1664) for comparing the first average power signal and the second average power signal and for generating a fault signal when the first average power signal and the second average power signal differ by a voltage threshold, wherein the circuit is configured to select the durations of the first and second time windows to have a duration such that an imbalance caused by a transient event is detectable by comparing the first average power signal and the second average power signal, characterized in that the first power averaging circuit and the second power averaging circuit each include: a first square circuit (1610, 1612) for generating a resolver sensor first output power signal for indicating the power of the resolver sensor first output signal, a second square circuit (1620, 1622) for generating a resolver sensor second output power signal for indicating the power of the resolver sensor second output signal, a third square circuit (1630, 1632) for generating an average value of the first and second average power signals (Vc1, Vc2) respectively, a summer (1640, 1642) for summing the resolver sensor first and second output power signals and subtracting the average value output by said third square circuit (1630, 1632) and coupling the summation to a respective one of the first integrator (C16a) and the second integrator (C16b). a first square circuit (1610, 1612) for generating a resolver sensor first output power signal for indicating the power of the resolver sensor first output signal, a second square circuit (1620, 1622) for generating a resolver sensor second output power signal for indicating the power of the resolver sensor second output signal, a third square circuit (1630, 1632) for generating an average value of the first and second average power signals (Vc1, Vc2) respectively, a summer (1640, 1642) for summing the resolver sensor first and second output power signals and subtracting the average value output by said third square circuit (1630, 1632) and coupling the summation to a respective one of the first integrator (C16a) and the second integrator (C16b).