An adaptive voltage modulation circuit, comprising: a supply voltage droop detection and mitigation circuit comprising: a detection circuit configured to generate a droop detection signal in an active state in response to a supply voltage provided to a load circuit being less than a droop threshold voltage; and a clock adjustment circuit configured to adjust a load clock signal (CLK_LD) provided to the load circuit in response to the droop detection signal; a supply voltage adjust circuit comprising: a counter circuit configured to increment a count in response to each cycle of a reference clock signal (CLK_REF) in which the droop detection signal is in an active state; a voltage adjust-up circuit configured to generate a voltage adjust-up signal in an active state in response to the count being greater than an adjust-up threshold value; and a voltage adjust-down circuit configured to generate a voltage adjust-down signal in an active state in response to the count being less than an adjust-down threshold value at an end of a defined period as measured by the reference clock signal (CLK_REF); characterized in that the adaptive modulation circuit also comprises a supply voltage controller circuit configured to: increase the supply voltage provided to the load circuit in response to the voltage adjust-up signal being in an active state; and decrease the supply voltage provided to the load circuit in response to the voltage adjust-down signal being in an active state. a supply voltage droop detection and mitigation circuit comprising: a detection circuit configured to generate a droop detection signal in an active state in response to a supply voltage provided to a load circuit being less than a droop threshold voltage; and a clock adjustment circuit configured to adjust a load clock signal (CLK_LD) provided to the load circuit in response to the droop detection signal; a detection circuit configured to generate a droop detection signal in an active state in response to a supply voltage provided to a load circuit being less than a droop threshold voltage; and a clock adjustment circuit configured to adjust a load clock signal (CLK_LD) provided to the load circuit in response to the droop detection signal; a supply voltage adjust circuit comprising: a counter circuit configured to increment a count in response to each cycle of a reference clock signal (CLK_REF) in which the droop detection signal is in an active state; a voltage adjust-up circuit configured to generate a voltage adjust-up signal in an active state in response to the count being greater than an adjust-up threshold value; and a voltage adjust-down circuit configured to generate a voltage adjust-down signal in an active state in response to the count being less than an adjust-down threshold value at an end of a defined period as measured by the reference clock signal (CLK_REF); characterized in that the adaptive modulation circuit also comprises a counter circuit configured to increment a count in response to each cycle of a reference clock signal (CLK_REF) in which the droop detection signal is in an active state; a voltage adjust-up circuit configured to generate a voltage adjust-up signal in an active state in response to the count being greater than an adjust-up threshold value; and a voltage adjust-down circuit configured to generate a voltage adjust-down signal in an active state in response to the count being less than an adjust-down threshold value at an end of a defined period as measured by the reference clock signal (CLK_REF); characterized in that the adaptive modulation circuit also comprises a supply voltage controller circuit configured to: increase the supply voltage provided to the load circuit in response to the voltage adjust-up signal being in an active state; and decrease the supply voltage provided to the load circuit in response to the voltage adjust-down signal being in an active state. increase the supply voltage provided to the load circuit in response to the voltage adjust-up signal being in an active state; and decrease the supply voltage provided to the load circuit in response to the voltage adjust-down signal being in an active state.