A DC/DC converter with three-level rectification, comprising: a primary circuit receiving an input voltage (Vin) and comprising a plurality of primary switches; a resonant tank circuit comprising a resonant inductor (Lr), a resonant capacitor (Cr), and a transformer (Tr), wherein a first primary terminal and a second primary terminal of the resonant tank circuit are coupled to the primary circuit, a primary winding (Np) of the transformer (Tr) is coupled between the first and second primary terminals (121, 122), a secondary winding (Ns) of the transformer (Tr) is coupled between a first secondary terminal and a second secondary terminal of the resonant tank circuit, a voltage between the first and second primary terminals (121, 122) is a first voltage, wherein the first voltage is a square wave, a voltage between the first and second secondary terminals (123, 124) is a second voltage; and a secondary circuit comprising a switch bridge arm and a capacitor bridge arm, wherein the switch bridge arm comprises a first secondary switch, a second secondary switch, a third secondary switch, and a fourth secondary switch sequentially connected in series, a node between the first and second secondary switches (S21, S22) is connected to the first secondary terminal, a node between the third and fourth secondary switches (S23, S24) is connected to the second secondary terminal, the capacitor bridge arm comprises a first output capacitor and a second output capacitor connected in series, a node between the first and second output capacitors (Co1, Co2) is connected to a node between the second and third secondary switches (S22, S23), two terminals of the capacitor bridge arm are connected to two terminals of the switch bridge arm, and a voltage between the two terminals of the capacitor bridge arm is an output voltage (Vo), characterized in that the first, second, third, and fourth secondary switches (S21, S22, S23, S24) have a same switching frequency, there are two rising edges and two falling edges in two consecutive periods of the first voltage, during the two consecutive periods, the first secondary switch is at least in an on state for a preset time length after one of the two falling edges, the fourth secondary switch is at least in the on state for the preset time length after another one of the two falling edges, the second secondary switch is at least in the on state for the preset time length after one of the two rising edges, and the third secondary switch is at least in the on state for the preset time length after another one of the two rising edges. a primary circuit receiving an input voltage (Vin) and comprising a plurality of primary switches; a resonant tank circuit comprising a resonant inductor (Lr), a resonant capacitor (Cr), and a transformer (Tr), wherein a first primary terminal and a second primary terminal of the resonant tank circuit are coupled to the primary circuit, a primary winding (Np) of the transformer (Tr) is coupled between the first and second primary terminals (121, 122), a secondary winding (Ns) of the transformer (Tr) is coupled between a first secondary terminal and a second secondary terminal of the resonant tank circuit, a voltage between the first and second primary terminals (121, 122) is a first voltage, wherein the first voltage is a square wave, a voltage between the first and second secondary terminals (123, 124) is a second voltage; and a secondary circuit comprising a switch bridge arm and a capacitor bridge arm, wherein the switch bridge arm comprises a first secondary switch, a second secondary switch, a third secondary switch, and a fourth secondary switch sequentially connected in series, a node between the first and second secondary switches (S21, S22) is connected to the first secondary terminal, a node between the third and fourth secondary switches (S23, S24) is connected to the second secondary terminal, the capacitor bridge arm comprises a first output capacitor and a second output capacitor connected in series, a node between the first and second output capacitors (Co1, Co2) is connected to a node between the second and third secondary switches (S22, S23), two terminals of the capacitor bridge arm are connected to two terminals of the switch bridge arm, and a voltage between the two terminals of the capacitor bridge arm is an output voltage (Vo), characterized in that the first, second, third, and fourth secondary switches (S21, S22, S23, S24) have a same switching frequency, there are two rising edges and two falling edges in two consecutive periods of the first voltage, during the two consecutive periods, the first secondary switch is at least in an on state for a preset time length after one of the two falling edges, the fourth secondary switch is at least in the on state for the preset time length after another one of the two falling edges, the second secondary switch is at least in the on state for the preset time length after one of the two rising edges, and the third secondary switch is at least in the on state for the preset time length after another one of the two rising edges.