A packet processing apparatus comprising: a packet buffer unit configured to temporarily hold packet data; a plurality of packet processing units (13, 15) including a first packet processing unit configured to process the packet data output from the packet buffer unit in synchronization with a first clock signal, and output the processed packet data to a clock transfer unit, and a second packet processing unit configured to process the packet data output via the clock transfer unit in synchronization with a second clock signal; a clock supply unit (24, 25) configured to supply the first clock signal and the second clock signal to the plurality of packet processing units (13, 15); a buffer vacant time detection unit configured to receive from the packet buffer unit an accumulation amount signal indicating an accumulation amount of the packet data in the packet buffer unit, and measure a buffer vacant time indicating a time during which no packet data exists in the packet buffer unit based on the received accumulation amount signal; and a comparison unit configured to compare the buffer vacant time with a comparison reference time and control an operational state of the clock supply unit (24, 25) based on a comparison result, the comparison reference time being determined in advance, wherein the comparison reference time is a time required to process one packet output by the packet buffer unit in all the plurality of packet processing units (13, 15), and the comparison unit is further configured to: control the clock supply unit (24, 25) such that supply operation of the first clock signal and the second clock signal is suspended when a state where the packet data exists in the packet buffer unit is changed to a state where no packet data exists in the packet buffer unit and the buffer vacant time is longer than the comparison reference time, and control the clock supply unit (24, 25) such that the supply operation of the first clock signal and the second clock signal is started when the state where no packet data exists in the packet buffer unit is changed to the state where packet data exists in the packet buffer unit. a packet buffer unit configured to temporarily hold packet data; a plurality of packet processing units (13, 15) including a first packet processing unit configured to process the packet data output from the packet buffer unit in synchronization with a first clock signal, and output the processed packet data to a clock transfer unit, and a second packet processing unit configured to process the packet data output via the clock transfer unit in synchronization with a second clock signal; a clock supply unit (24, 25) configured to supply the first clock signal and the second clock signal to the plurality of packet processing units (13, 15); a buffer vacant time detection unit configured to receive from the packet buffer unit an accumulation amount signal indicating an accumulation amount of the packet data in the packet buffer unit, and measure a buffer vacant time indicating a time during which no packet data exists in the packet buffer unit based on the received accumulation amount signal; and a comparison unit configured to compare the buffer vacant time with a comparison reference time and control an operational state of the clock supply unit (24, 25) based on a comparison result, the comparison reference time being determined in advance, wherein the comparison reference time is a time required to process one packet output by the packet buffer unit in all the plurality of packet processing units (13, 15), and the comparison unit is further configured to: control the clock supply unit (24, 25) such that supply operation of the first clock signal and the second clock signal is suspended when a state where the packet data exists in the packet buffer unit is changed to a state where no packet data exists in the packet buffer unit and the buffer vacant time is longer than the comparison reference time, and control the clock supply unit (24, 25) such that the supply operation of the first clock signal and the second clock signal is started when the state where no packet data exists in the packet buffer unit is changed to the state where packet data exists in the packet buffer unit. control the clock supply unit (24, 25) such that supply operation of the first clock signal and the second clock signal is suspended when a state where the packet data exists in the packet buffer unit is changed to a state where no packet data exists in the packet buffer unit and the buffer vacant time is longer than the comparison reference time, and control the clock supply unit (24, 25) such that the supply operation of the first clock signal and the second clock signal is started when the state where no packet data exists in the packet buffer unit is changed to the state where packet data exists in the packet buffer unit.