A method, comprising: in a processing device comprising a multi-chip demodulation module, a multiplexed transport interface, and a video processing system-on-chip, SoC,, wherein said multi-chip demodulation module comprises a plurality of demodulator chips (250 1, 250 2,..., 250 M): concurrently demodulating, via at least a portion of said plurality of demodulator chips (250 1, 250 2,..., 250 M), a plurality of modulated input data streams; multiplexing corresponding demodulated data, which is generated by said at least a portion of said plurality of demodulator chips (250 1, 250 2,..., 250 M), and communication of said multiplexed demodulated data via said multiplexed transport interface to said video processing SoC; generating timestamps based on a timestamp counter in said multi-chip demodulation module, timestamping packets communicated via said multiplexed transport interface with said generated timestamps and comparing said timestamps with values generated by a further Y timestamp counter in said video processing SoC; synchronizing operations of said timestamp counters (440, 442) by way of a reset signal sent from said video processing SoC to said multi-chip demodulation module; and demultiplexing, in said video processing SoC, said multiplexed demodulated data received via said multiplexed transport interface. in a processing device comprising a multi-chip demodulation module, a multiplexed transport interface, and a video processing system-on-chip, SoC,, wherein said multi-chip demodulation module comprises a plurality of demodulator chips (250 1, 250 2,..., 250 M): concurrently demodulating, via at least a portion of said plurality of demodulator chips (250 1, 250 2,..., 250 M), a plurality of modulated input data streams; multiplexing corresponding demodulated data, which is generated by said at least a portion of said plurality of demodulator chips (250 1, 250 2,..., 250 M), and communication of said multiplexed demodulated data via said multiplexed transport interface to said video processing SoC; generating timestamps based on a timestamp counter in said multi-chip demodulation module, timestamping packets communicated via said multiplexed transport interface with said generated timestamps and comparing said timestamps with values generated by a further Y timestamp counter in said video processing SoC; synchronizing operations of said timestamp counters (440, 442) by way of a reset signal sent from said video processing SoC to said multi-chip demodulation module; and demultiplexing, in said video processing SoC, said multiplexed demodulated data received via said multiplexed transport interface. concurrently demodulating, via at least a portion of said plurality of demodulator chips (250 1, 250 2,..., 250 M), a plurality of modulated input data streams; multiplexing corresponding demodulated data, which is generated by said at least a portion of said plurality of demodulator chips (250 1, 250 2,..., 250 M), and communication of said multiplexed demodulated data via said multiplexed transport interface to said video processing SoC; generating timestamps based on a timestamp counter in said multi-chip demodulation module, timestamping packets communicated via said multiplexed transport interface with said generated timestamps and comparing said timestamps with values generated by a further Y timestamp counter in said video processing SoC; synchronizing operations of said timestamp counters (440, 442) by way of a reset signal sent from said video processing SoC to said multi-chip demodulation module; and demultiplexing, in said video processing SoC, said multiplexed demodulated data received via said multiplexed transport interface.