A method of manufacturing a semiconductor device to provide a back-illuminated solid-state imaging device, comprising the steps of: bonding a first semiconductor substrate and a second semiconductor substrate together, wherein the first semiconductor substrate includes a pixel array in a half-finished product state, and, formed on the first semiconductor substrate, a first multi-wiring layer including a metal wiring layer and a first layer of the first multi-wiring layer; the second semiconductor substrate includes a logic circuit in a half-finished product state, and, formed on the second semiconductor substrate, a second multi-wiring layer including a metal wiring layer and a second layer over the second multi-wiring layer; and the first semiconductor substrate and the second semiconductor substrate are bonded together, such that the first and second multi-wiring layers (41, 55) face to each other; after bonding, thinning the first semiconductor substrate to a thickness of 1 to 10 μm; next, forming a through-connection hole penetrating the first semiconductor substrate, the first multi-wiring layer and the first and second layers, so as to expose the metal wiring layer of the second multi-wiring layer, and a connection hole passing through the first semiconductor substrate into the multi-wiring layer, so as to expose the metal wiring layer of the first multi-wiring layer; electrically connecting the pixel array and the logic circuit by embedding a through-connection conductor into the through-connection hole, the through-connection conductor penetrating the first semiconductor substrate, the first multi-wiring layer and the first and second layers, extending to the logic circuit of the second semiconductor substrate and electrically connecting to the wiring layer of the second multi-wiring layer, and embedding a connection conductor in the connection hole and electrically connecting the metal wiring layer of the first multi-wiring layer; forming a connection wiring electrically connected to the through-connection conductor and the connection conductor. bonding a first semiconductor substrate and a second semiconductor substrate together, wherein the first semiconductor substrate includes a pixel array in a half-finished product state, and, formed on the first semiconductor substrate, a first multi-wiring layer including a metal wiring layer and a first layer of the first multi-wiring layer; the second semiconductor substrate includes a logic circuit in a half-finished product state, and, formed on the second semiconductor substrate, a second multi-wiring layer including a metal wiring layer and a second layer over the second multi-wiring layer; and the first semiconductor substrate and the second semiconductor substrate are bonded together, such that the first and second multi-wiring layers (41, 55) face to each other; after bonding, thinning the first semiconductor substrate to a thickness of 1 to 10 μm; next, forming a through-connection hole penetrating the first semiconductor substrate, the first multi-wiring layer and the first and second layers, so as to expose the metal wiring layer of the second multi-wiring layer, and a connection hole passing through the first semiconductor substrate into the multi-wiring layer, so as to expose the metal wiring layer of the first multi-wiring layer; electrically connecting the pixel array and the logic circuit by embedding a through-connection conductor into the through-connection hole, the through-connection conductor penetrating the first semiconductor substrate, the first multi-wiring layer and the first and second layers, extending to the logic circuit of the second semiconductor substrate and electrically connecting to the wiring layer of the second multi-wiring layer, and embedding a connection conductor in the connection hole and electrically connecting the metal wiring layer of the first multi-wiring layer; forming a connection wiring electrically connected to the through-connection conductor and the connection conductor.