Double-boost DC/DC converter, operable in a voltage balancing mode; wherein the double-boost DC/DC converter comprises: a split DC-link (101, 102) with midpoint; outer switches (111, 114) and inner switches (112, 113) parallel-connected to the DC-link (101, 102), wherein the outer switches are connected to capacitors of the split DC-link and to the inner switches (112, 113), and the inner (112, 113) switches are connected to each other at a midpoint; and a DC source terminal to which a DC source is connectable in parallel to the inner switches (112, 113) over inductances (131, 132); the inductances (131, 132) by which the DC source is connectable in parallel to the inner switches (112, 113); an inductance connected to the midpoint of the DC link and to the midpoint of the inner switches (112, 113); and a controller configured to perform the following steps: in a first operation mode, which is a double-boost converter mode wherein current is exchanged with the DC source: S1: the first inner and the second inner switch are switched on; S2: after a first time interval int1, the second inner switch is switched off; S3: after a further second time interval int2, the first inner switch is switched off; S4: after a further third time interval int3, jump to S1; wherein the sequence of switching of the first and the second inner switch may be reversed such that S3 is performed prior to S2; or, in a second operation which is a capacitor voltage balancing mode wherein no current is exchanged with the DC source, switch on the first outer switch and the first inner switch contemporarily with switching off the second outer switch and the second inner switch; switch off the first outer switch and the first inner switch contemporarily with switching on the second outer switch and the second inner switch. a split DC-link (101, 102) with midpoint; outer switches (111, 114) and inner switches (112, 113) parallel-connected to the DC-link (101, 102), wherein the outer switches are connected to capacitors of the split DC-link and to the inner switches (112, 113), and the inner (112, 113) switches are connected to each other at a midpoint; and a DC source terminal to which a DC source is connectable in parallel to the inner switches (112, 113) over inductances (131, 132); the inductances (131, 132) by which the DC source is connectable in parallel to the inner switches (112, 113); an inductance connected to the midpoint of the DC link and to the midpoint of the inner switches (112, 113); and a controller configured to perform the following steps: in a first operation mode, which is a double-boost converter mode wherein current is exchanged with the DC source: S1: the first inner and the second inner switch are switched on; S2: after a first time interval int1, the second inner switch is switched off; S3: after a further second time interval int2, the first inner switch is switched off; S4: after a further third time interval int3, jump to S1; wherein the sequence of switching of the first and the second inner switch may be reversed such that S3 is performed prior to S2; or, in a second operation which is a capacitor voltage balancing mode wherein no current is exchanged with the DC source, switch on the first outer switch and the first inner switch contemporarily with switching off the second outer switch and the second inner switch; switch off the first outer switch and the first inner switch contemporarily with switching on the second outer switch and the second inner switch. in a first operation mode, which is a double-boost converter mode wherein current is exchanged with the DC source: S1: the first inner and the second inner switch are switched on; S2: after a first time interval int1, the second inner switch is switched off; S3: after a further second time interval int2, the first inner switch is switched off; S4: after a further third time interval int3, jump to S1; S1: the first inner and the second inner switch are switched on; S2: after a first time interval int1, the second inner switch is switched off; S3: after a further second time interval int2, the first inner switch is switched off; S4: after a further third time interval int3, jump to S1; wherein the sequence of switching of the first and the second inner switch may be reversed such that S3 is performed prior to S2; or, in a second operation which is a capacitor voltage balancing mode wherein no current is exchanged with the DC source, switch on the first outer switch and the first inner switch contemporarily with switching off the second outer switch and the second inner switch; switch off the first outer switch and the first inner switch contemporarily with switching on the second outer switch and the second inner switch.