A compensating device (330; 430; 530; 630) for detecting and compensating for a sampling clock offset in a receiver (300; 400; 500; 600), comprising: a sampling clock offset detector (311; 411; 511; 611), and a sampling clock offset compensator (304; 404; 504; 604), coupled to the sampling clock offset detector and configured for receiving the sampling clock offset therefrom and compensating for the sampling clock offset on a signal generated in a signal processing path of the receiver, characterized in that said sampling clock offset detector comprises: a plurality of calculation paths, each for receiving a time domain signal and a hypothetic offset, calculating a plurality of correlation coefficients between the time domain signal and a delayed version of the time domain signal according to a predetermined delay and the hypothetic offset, calculating a plurality of correlation coefficient sums according to the correlation coefficients, and extracting a maximum correlation coefficient sum for the hypothetic offset from the correlation coefficient sums; and a controller, coupled to the calculation paths and configured for providing different hypothetic offsets (i 0, i 1,..., i j) to each calculation path and detecting the sampling clock offset according to the maximum correlation coefficient sums obtained from the calculation paths. a sampling clock offset detector (311; 411; 511; 611), and a sampling clock offset compensator (304; 404; 504; 604), coupled to the sampling clock offset detector and configured for receiving the sampling clock offset therefrom and compensating for the sampling clock offset on a signal generated in a signal processing path of the receiver, characterized in that said sampling clock offset detector comprises: a plurality of calculation paths, each for receiving a time domain signal and a hypothetic offset, calculating a plurality of correlation coefficients between the time domain signal and a delayed version of the time domain signal according to a predetermined delay and the hypothetic offset, calculating a plurality of correlation coefficient sums according to the correlation coefficients, and extracting a maximum correlation coefficient sum for the hypothetic offset from the correlation coefficient sums; and a controller, coupled to the calculation paths and configured for providing different hypothetic offsets (i 0, i 1,..., i j) to each calculation path and detecting the sampling clock offset according to the maximum correlation coefficient sums obtained from the calculation paths. a plurality of calculation paths, each for receiving a time domain signal and a hypothetic offset, calculating a plurality of correlation coefficients between the time domain signal and a delayed version of the time domain signal according to a predetermined delay and the hypothetic offset, calculating a plurality of correlation coefficient sums according to the correlation coefficients, and extracting a maximum correlation coefficient sum for the hypothetic offset from the correlation coefficient sums; and a controller, coupled to the calculation paths and configured for providing different hypothetic offsets (i 0, i 1,..., i j) to each calculation path and detecting the sampling clock offset according to the maximum correlation coefficient sums obtained from the calculation paths.