Data processing device, comprising: an information data generation unit configured to classify the information data into significant bit data and less significant bit data; an interleaving process unit configured to generate two-bit symbol data equivalent to a symbol in four-valued FSK, the interleaving process unit being configured to generate two-bit protected data symbols by dividing the significant bit data into one-bit data and adding one-bit protection data thereto, to generate two-bit non-protected data symbols by dividing the less significant bit data into two-bit data, and generating a symbol data string by arranging the protected data symbols and the non-protected data symbols in a predetermined order, the symbol data string representing a string of 4-ary symbols having four amplitude values and including in a value area at least a predetermined pair of a positive value and a negative value having an identical absolute value; a scrambler, including: pattern generation means for generating a scramble pattern formed of a binary bit string, multiplication value decision means for determining a positive or a negative multiplication value corresponding to a bit value of each bit in the binary string forming a scramble pattern generated by the pattern generation means, multiplication processing means for executing a multiplication between the symbol data string and the multiplication values on a one-symbol by one-bit basis, the data processing device further comprising baseband signal generation means for converting the symbol data string obtained as a result of the multiplication into a baseband signal representing a string of the 4-ary symbol data having four amplitude values and including in a value area at least a predetermined pair of a positive value and a negative value having an identical absolute value; wherein a possible symbol value of the symbol obtained by adding the one-bit protection data as redundant bit data to the significant one-bit data is either a maximum value or a minimum value in the value area of the 4-ary symbols. an information data generation unit configured to classify the information data into significant bit data and less significant bit data; an interleaving process unit configured to generate two-bit symbol data equivalent to a symbol in four-valued FSK, the interleaving process unit being configured to generate two-bit protected data symbols by dividing the significant bit data into one-bit data and adding one-bit protection data thereto, to generate two-bit non-protected data symbols by dividing the less significant bit data into two-bit data, and generating a symbol data string by arranging the protected data symbols and the non-protected data symbols in a predetermined order, the symbol data string representing a string of 4-ary symbols having four amplitude values and including in a value area at least a predetermined pair of a positive value and a negative value having an identical absolute value; a scrambler, including: pattern generation means for generating a scramble pattern formed of a binary bit string, multiplication value decision means for determining a positive or a negative multiplication value corresponding to a bit value of each bit in the binary string forming a scramble pattern generated by the pattern generation means, multiplication processing means for executing a multiplication between the symbol data string and the multiplication values on a one-symbol by one-bit basis, pattern generation means for generating a scramble pattern formed of a binary bit string, multiplication value decision means for determining a positive or a negative multiplication value corresponding to a bit value of each bit in the binary string forming a scramble pattern generated by the pattern generation means, multiplication processing means for executing a multiplication between the symbol data string and the multiplication values on a one-symbol by one-bit basis,