A method for programming a NAND flash memory system, the NAND flash memory system comprising a plurality of memory blocks (B1-BK), each comprising a plurality of memory cells (MCA(1,1) to MCA (M,N)), the method comprising: performing a background media scan to determine a data valid ratio of a second memory block that has been programmed previously and if the data valid ratio of the second memory block is smaller than a threshold value, it implies that the instant threshold voltage shift has begun to affect the stability of the data stored in the second memory block; when the data valid ratio of the second memory block is determined to be smaller than a threshold value: copying valid data stored in the second memory block; selecting the first memory block from at least one memory block (B1-BK) that has not been programmed previously; and initiating the program process for programming the data copied from the second memory block to the first memory block during the program process: performing a first program operation to program the first memory block; waiting for a predetermined delay time after the first program operation is completed such that an instant threshold voltage shift can be observed which occurs in the form that the threshold voltage raised by the program operation drops within a short period of time after the program operation; after waiting for the delay time, performing an all-level threshold voltage test to determine if threshold voltages of memory cells (MCA(1,1) to MCA (M,N)) in the first memory block are greater than corresponding threshold voltages; and performing a second program operation to program the first memory block according to a result of the all-level threshold voltage test, such that two times of program operations are performed with a predetermined delay time in between so the retention error caused by instant threshold voltage shift is reduced. performing a background media scan to determine a data valid ratio of a second memory block that has been programmed previously and if the data valid ratio of the second memory block is smaller than a threshold value, it implies that the instant threshold voltage shift has begun to affect the stability of the data stored in the second memory block; when the data valid ratio of the second memory block is determined to be smaller than a threshold value: copying valid data stored in the second memory block; selecting the first memory block from at least one memory block (B1-BK) that has not been programmed previously; and copying valid data stored in the second memory block; selecting the first memory block from at least one memory block (B1-BK) that has not been programmed previously; and initiating the program process for programming the data copied from the second memory block to the first memory block during the program process: performing a first program operation to program the first memory block; waiting for a predetermined delay time after the first program operation is completed such that an instant threshold voltage shift can be observed which occurs in the form that the threshold voltage raised by the program operation drops within a short period of time after the program operation; after waiting for the delay time, performing an all-level threshold voltage test to determine if threshold voltages of memory cells (MCA(1,1) to MCA (M,N)) in the first memory block are greater than corresponding threshold voltages; and performing a second program operation to program the first memory block according to a result of the all-level threshold voltage test, such that two times of program operations are performed with a predetermined delay time in between so the retention error caused by instant threshold voltage shift is reduced. performing a first program operation to program the first memory block; waiting for a predetermined delay time after the first program operation is completed such that an instant threshold voltage shift can be observed which occurs in the form that the threshold voltage raised by the program operation drops within a short period of time after the program operation; after waiting for the delay time, performing an all-level threshold voltage test to determine if threshold voltages of memory cells (MCA(1,1) to MCA (M,N)) in the first memory block are greater than corresponding threshold voltages; and performing a second program operation to program the first memory block according to a result of the all-level threshold voltage test, such that two times of program operations are performed with a predetermined delay time in between so the retention error caused by instant threshold voltage shift is reduced.