A driving power supply for an organic light emitting diode display, comprising a boost module and a voltage adjusting module connected to the boost module, wherein the boost module is arranged to boost an initial voltage input from an initial voltage input terminal of the driving power supply to generate a reference voltage and for outputting the reference voltage to the voltage adjusting module; and the voltage adjusting module comprises a plurality of driving voltage output terminals respectively connectable to pixel units of different colors of the organic light emitting diode display and is arranged to adjust magnitude of the reference voltage according to the colors of the pixel units to generate a plurality of driving voltages (VDDR, VDDG, VDDB), respectively, and output the plurality of driving voltages (VDDR, VDDG, VDDB) to corresponding pixel units through the plurality of driving voltage output terminals when the plurality of driving voltage output terminals are connected to the pixel units, wherein, the driving voltages (VDDR, VDDG, VDDB) corresponding to the pixel units of different colors are different, each driving voltage output terminal is arranged to be connected and to drive the pixel units of one color, and different driving voltage output terminals output different driving voltages (VDDR, VDDG, VDDB), the voltage adjusting module comprises: a pulse control module, switching tubes and filter capacitors, the number of the switching tubes and the number of the filter capacitors are equal to that of the driving voltage output terminals, the switching tubes are in one-to-one correspondence with the driving voltage output terminals, and the filter capacitors are in one-to-one correspondence with the driving voltage output terminals; gates of the switching tubes are connected to the pulse control module, first electrodes of the switching tubes are connected to the boost module, second electrodes of the switching tubes are connected to the corresponding driving voltage output terminals and first terminals of the filter capacitors, second terminals of the filter capacitors are grounded; the pulse control module is arranged to generate the pulse control signals (PR, PG, PB) and sending the pulse control signals (PR. PG, PB) to the switching tubes, respectively, and duty ratio of each pulse control signal equals to a ratio between the driving voltage (VDDR, VDDG, VDDB) output from the driving voltage output terminal connected to the switching tube which receives said pulse control signal and the reference voltage; the pulse control module comprises: a pulse-adjusting control sub-module, a pulse generator, a pulse width modulation circuit and a level conversion circuit, and the pulse width modulation circuit is connected to all of the pulse-adjusting control sub-module, the pulse generator and the level conversion circuit; the pulse-adjusting control sub-module comprises: a storage device and a decoding circuit connected to both the storage device and the pulse width modulation circuit; the storage device is configured to store data information of the reference voltage (VDD 1) and data information of the driving voltages (VDDR, VDDG, VDDB) to be generated by the voltage adjusting module; and the decoding circuit is arranged to perform a decoding process on the data information of the reference voltage (VDD 1) and the data information of the driving voltages (VDDR, VDDG, VDDB) to be generated by the voltage adjusting module, so as to obtain voltage values of the reference voltage (VDD 1) and the driving voltages (VDDR, VDDG, VDDB) to be generated by the voltage adjusting module, and the decoding circuit is further arranged to generate pulse-adjusting control signals according to ratios between the voltage values of the driving voltages (VDDR, VDDG, VDDB) to be generated by the voltage adjusting module and the voltage value of the reference voltage; the pulse generator is arranged to generate an initial pulse signal with a preset frequency; the pulse width modulation circuit is arranged to perform pulse width modulation on the initial pulse signal according to the respective pulse-adjusting control signals, so as to generate a plurality of initial pulse control signals (DR, DG, DB); and the level conversion circuit is arranged to perform level conversion on the initial pulse control signals (DR, DG, DB) so as to generate a plurality of pulse control signals (PR, PG, PB), which are arranged to control on/off states of the switching tubes, respectively.