A driver (201, 301) for a switched capacitor circuit (230, 330), the driver comprising: a voltage amplifier (210, 310) comprising a signal input (212, 312), configured to receive a signal to be amplified by the voltage amplifier, a feedback input (214, 314), different to the signal input, and an amplifier output (216, 316); and a feedback network (220, 320) coupled between the amplifier output (216, 316) and the feedback input (214, 314); wherein the feedback network (220, 320) comprises: a track-and-hold circuit configured to begin a hold phase synchronously with the beginning of a charging phase of the switched capacitor circuit and begin a tracking phase after a predetermined fraction (Δt) of the switched capacitor circuit charging phase has passed; wherein the track and hold circuit is adapted to cause the feedback network (220, 320) to supply a voltage corresponding to the amplifier output voltage (V O) to the feedback input (214, 314) during the tracking phase and to cause the feedback network (220, 320) to supply a constant voltage to the feedback input during the hold phase where the constant voltage corresponds to the amplifier output voltage (V O) at the end of the preceding tracking phase, thereby masking a voltage dip occurring at the amplifier output (216, 316) at the beginning of the switched capacitor circuit charging phase. a voltage amplifier (210, 310) comprising a signal input (212, 312), configured to receive a signal to be amplified by the voltage amplifier, a feedback input (214, 314), different to the signal input, and an amplifier output (216, 316); and a feedback network (220, 320) coupled between the amplifier output (216, 316) and the feedback input (214, 314); wherein the feedback network (220, 320) comprises: a track-and-hold circuit configured to begin a hold phase synchronously with the beginning of a charging phase of the switched capacitor circuit and begin a tracking phase after a predetermined fraction (Δt) of the switched capacitor circuit charging phase has passed; wherein the track and hold circuit is adapted to cause the feedback network (220, 320) to supply a voltage corresponding to the amplifier output voltage (V O) to the feedback input (214, 314) during the tracking phase and to cause the feedback network (220, 320) to supply a constant voltage to the feedback input during the hold phase where the constant voltage corresponds to the amplifier output voltage (V O) at the end of the preceding tracking phase, thereby masking a voltage dip occurring at the amplifier output (216, 316) at the beginning of the switched capacitor circuit charging phase. a track-and-hold circuit configured to begin a hold phase synchronously with the beginning of a charging phase of the switched capacitor circuit and begin a tracking phase after a predetermined fraction (Δt) of the switched capacitor circuit charging phase has passed; wherein the track and hold circuit is adapted to cause the feedback network (220, 320) to supply a voltage corresponding to the amplifier output voltage (V O) to the feedback input (214, 314) during the tracking phase and to cause the feedback network (220, 320) to supply a constant voltage to the feedback input during the hold phase where the constant voltage corresponds to the amplifier output voltage (V O) at the end of the preceding tracking phase, thereby masking a voltage dip occurring at the amplifier output (216, 316) at the beginning of the switched capacitor circuit charging phase.