A method of generating an implementation of one or more polynomials using rounded arithmetic, the method comprising: receiving, in an input module, a set of input polynomials for implementing the one or more polynomials accurately; reducing, in an assessment module, the set of input polynomials to a smaller set of polynomial components from which all the set of input polynomials can be evaluated accurately, by only adding those polynomials from the input set of polynomials which cannot be evaluated using other polynomials in the set of input polynomials or set of polynomial components to the set of polynomial components; and generating an implementation of the one or more polynomials comprising a plurality of interconnected hardware logic elements, each of the hardware logic elements arranged to correctly evaluate one of the polynomial components using the rounded arithmetic and the plurality of hardware logic elements comprising at least one hardware logic element corresponding to each of the polynomial components, wherein reducing the set of input polynomials to a smaller set of polynomial components from which all the set of input polynomials can be evaluated accurately comprises: (i) selecting a polynomial q from the set of input polynomials and removing a polynomial q from the set of input polynomials; (ii) determining if there is any variable assignment for which a function F is equal to zero (606, 608), where: F x 1,..., x m, y 1,..., y r = ∏ p z p z x − q y where p z is the union of the set of input polynomials and the set of polynomial components; (iii) in response to determining that there is no variable assignment for which a function F is equal to zero, adding the polynomial q to the set of polynomial components and in response to determining that there is a variable assignment for which a function F is equal to zero, not adding the polynomial q to the set of polynomial components; and repeating (i)-(iii) until all polynomials have been removed from the set of input polynomials. receiving, in an input module, a set of input polynomials for implementing the one or more polynomials accurately; reducing, in an assessment module, the set of input polynomials to a smaller set of polynomial components from which all the set of input polynomials can be evaluated accurately, by only adding those polynomials from the input set of polynomials which cannot be evaluated using other polynomials in the set of input polynomials or set of polynomial components to the set of polynomial components; and generating an implementation of the one or more polynomials comprising a plurality of interconnected hardware logic elements, each of the hardware logic elements arranged to correctly evaluate one of the polynomial components using the rounded arithmetic and the plurality of hardware logic elements comprising at least one hardware logic element corresponding to each of the polynomial components, wherein reducing the set of input polynomials to a smaller set of polynomial components from which all the set of input polynomials can be evaluated accurately comprises: (i) selecting a polynomial q from the set of input polynomials and removing a polynomial q from the set of input polynomials; (ii) determining if there is any variable assignment for which a function F is equal to zero (606, 608), where: F x 1,..., x m, y 1,..., y r = ∏ p z p z x − q y where p z is the union of the set of input polynomials and the set of polynomial components; (iii) in response to determining that there is no variable assignment for which a function F is equal to zero, adding the polynomial q to the set of polynomial components and in response to determining that there is a variable assignment for which a function F is equal to zero, not adding the polynomial q to the set of polynomial components; and (i) selecting a polynomial q from the set of input polynomials and removing a polynomial q from the set of input polynomials; (ii) determining if there is any variable assignment for which a function F is equal to zero (606, 608), where: F x 1,..., x m, y 1,..., y r = ∏ p z p z x − q y where p z is the union of the set of input polynomials and the set of polynomial components; (iii) in response to determining that there is no variable assignment for which a function F is equal to zero, adding the polynomial q to the set of polynomial components and in response to determining that there is a variable assignment for which a function F is equal to zero, not adding the polynomial q to the set of polynomial components; and repeating (i)-(iii) until all polynomials have been removed from the set of input polynomials.