A solid-state imaging device comprising a plurality of pixels arranged in a matrix on a semiconductor substrate, wherein each of the plurality of pixels includes: a photoelectric converter which is configured to receive light from an object and convert the light into charge; an overflow drain which is configured to discharge the charge of the photoelectric converter; two exposure controllers which are configured to switch between accumulation of the charge into the photoelectric converter and discharge of the charge from the photoelectric converter, each of the exposure controllers having a gate to which a drive pulse signal is applied to control that signal charge generated in the photoelectric converter is either discharged to the overflow drain via the exposure controllers and not accumulated in the photoelectric converter, or is not discharged to the overflow drain and accumulated in the photoelectric converter; two charge accumulators (2A, 4A) each of which is configured to hold the signal charge accumulated in the photoelectric converter; two readers (12A1, 12A2) which are configured to respectively read the signal charge from the photoelectric converter to the two charge accumulators (2A, 4A) and obtain two signals having different exposure periods; a transfer controller which performs a transfer control including controlling whether the charge accumulated in one of the two charge accumulators (2A, 4A) is transferred or blocked from being transferred to another one of the two charge accumulators, and wherein the transfer controller is disposed between the two charge accumulators (2a, 4A), each of the two exposure controllers and the two readers (12A1, 12A2) has a gate electrode formed on the semiconductor substrate, and in a plan view of the semiconductor substrate, a gate electrode of one of the two readers (12A1, 12A2) and a gate electrode of the other of the two readers (12A1, 12A2) are axisymmetrically arranged with respect to a center line (H A) passing through the center of a light-receiving region of photoelectric converter and are disposed on an identical side of an outer edge of a light-receiving region of the photoelectric converter, and the two gate electrodes of the exposure controllers are axisymmetrically arranged with respect to said center line (H A) and are disposed on two sides of the outer edge of the light-receiving region of photoelectric converter that are orthogonal to said identical side of the outer edge of the light-receiving region of photoelectric converter. a photoelectric converter which is configured to receive light from an object and convert the light into charge; an overflow drain which is configured to discharge the charge of the photoelectric converter; two exposure controllers which are configured to switch between accumulation of the charge into the photoelectric converter and discharge of the charge from the photoelectric converter, each of the exposure controllers having a gate to which a drive pulse signal is applied to control that signal charge generated in the photoelectric converter is either discharged to the overflow drain via the exposure controllers and not accumulated in the photoelectric converter, or is not discharged to the overflow drain and accumulated in the photoelectric converter; two charge accumulators (2A, 4A) each of which is configured to hold the signal charge accumulated in the photoelectric converter; two readers (12A1, 12A2) which are configured to respectively read the signal charge from the photoelectric converter to the two charge accumulators (2A, 4A) and obtain two signals having different exposure periods; a transfer controller which performs a transfer control including controlling whether the charge accumulated in one of the two charge accumulators (2A, 4A) is transferred or blocked from being transferred to another one of the two charge accumulators, and wherein the transfer controller is disposed between the two charge accumulators (2a, 4A), each of the two exposure controllers and the two readers (12A1, 12A2) has a gate electrode formed on the semiconductor substrate, and in a plan view of the semiconductor substrate, a gate electrode of one of the two readers (12A1, 12A2) and a gate electrode of the other of the two readers (12A1, 12A2) are axisymmetrically arranged with respect to a center line (H A) passing through the center of a light-receiving region of photoelectric converter and are disposed on an identical side of an outer edge of a light-receiving region of the photoelectric converter, and the two gate electrodes of the exposure controllers are axisymmetrically arranged with respect to said center line (H A) and are disposed on two sides of the outer edge of the light-receiving region of photoelectric converter that are orthogonal to said identical side of the outer edge of the light-receiving region of photoelectric converter.