An organic light-emitting diode display, comprising: a substrate with a notch; display driver circuitry; data lines coupled to the display driver circuitry; gate lines coupled to the display driver circuitry; an array of organic light-emitting diode pixels having rows (Ro...RN) and columns on the substrate, wherein the gate lines of rows (Ro...RM) in a first area of the display are coupled to fewer of the pixels in the array of pixels than the gate lines of rows (RM+1...RN) in a second area of the display, wherein the organic light-emitting diode display comprises one or more dielectric layers and conductive layers; and supplemental gate line loading structures that are positioned in an inactive area of the substrate that is adjacent to the display notch and that is free of pixels, wherein the supplemental gate line loading structures are coupled to at least some of the gate lines in the first area, wherein the supplemental gate line loading structures provide loading on the gate lines in the first area such that brightness variations between the first area and the second area is reduced, wherein a first (k) of the rows in the first area is coupled to a supplemental gate line loading structure in a second (k+1) of the rows of the first area, wherein the supplemental gate line loading structures comprise capacitors, and wherein each of the capacitors has a first electrode coupled to a respective gate line in the first area and a second electrode coupled to at least one ground line, wherein the first electrode and the second electrode are separated by a dielectric, wherein the dielectric is formed from the one or more dielectric layers in the display, and wherein the first electrode and the second electrode are formed from the conductive layers in the display, wherein the supplemental gate line loading structures (22 D) impose progressively decreasing amounts of loading on the gate lines of the first area at progressively increasing distances between the second area and the gate lines of the first area. a substrate with a notch; display driver circuitry; data lines coupled to the display driver circuitry; gate lines coupled to the display driver circuitry; an array of organic light-emitting diode pixels having rows (Ro...RN) and columns on the substrate, wherein the gate lines of rows (Ro...RM) in a first area of the display are coupled to fewer of the pixels in the array of pixels than the gate lines of rows (RM+1...RN) in a second area of the display, wherein the organic light-emitting diode display comprises one or more dielectric layers and conductive layers; and supplemental gate line loading structures that are positioned in an inactive area of the substrate that is adjacent to the display notch and that is free of pixels, wherein the supplemental gate line loading structures are coupled to at least some of the gate lines in the first area, wherein the supplemental gate line loading structures provide loading on the gate lines in the first area such that brightness variations between the first area and the second area is reduced, wherein a first (k) of the rows in the first area is coupled to a supplemental gate line loading structure in a second (k+1) of the rows of the first area, wherein the supplemental gate line loading structures comprise capacitors, and wherein each of the capacitors has a first electrode coupled to a respective gate line in the first area and a second electrode coupled to at least one ground line, wherein the first electrode and the second electrode are separated by a dielectric, wherein the dielectric is formed from the one or more dielectric layers in the display, and wherein the first electrode and the second electrode are formed from the conductive layers in the display, wherein the supplemental gate line loading structures (22 D) impose progressively decreasing amounts of loading on the gate lines of the first area at progressively increasing distances between the second area and the gate lines of the first area.