A method of forming memory cells, comprising: forming a pair of spaced-apart electrical nodes (32a, 32b) supported by a semiconductor substrate; the nodes being a first node and a second node; forming a patterning structure line (34, 35, 36) over the nodes (32a, 32b), the patterning structure line (34, 35, 36) spanning the space between the nodes and having a first sidewall in opposing relation to a second sidewall and a top extending the distance between the sidewalls (39, 41); the first sidewall being directly over the first node and the second sidewall being directly over the second node; the patterning structure line (34, 35, 36) comprising a first non-oxygen-containing material; forming oxygen-sensitive material along an exterior surface of the patterning structure line (34, 35, 36); the oxygen-sensitive material being configured as a bridge extending from an upper surface of the first node to an upper surface of the second node; said bridge having a first segment along the first sidewall, a second segment along the second sidewall, and a third segment across the top of the patterning structure line (34, 35, 36); forming second non-oxygen-containing material along the first, second and third segments (45, 46, 47) of the oxygen-sensitive material bridge; removing at least some of the third segment of the oxygen-sensitive material bridge to separate the first segment from the second segment, the removing exposing the top of the patterning structure line (34, 35, 36); forming a third non-oxygen-containing material over the exposed top of the patterning structure line (34, 35, 36) and along a lateral edge of the horizontal portions of the oxygen-sensitive material; forming a dielectric material over the third non-oxygen-containing material; incorporating the first segment and first node into a first memory cell; and incorporating the second segment and second node into a second memory cell which is adjacent to the first memory cell. forming a pair of spaced-apart electrical nodes (32a, 32b) supported by a semiconductor substrate; the nodes being a first node and a second node; forming a patterning structure line (34, 35, 36) over the nodes (32a, 32b), the patterning structure line (34, 35, 36) spanning the space between the nodes and having a first sidewall in opposing relation to a second sidewall and a top extending the distance between the sidewalls (39, 41); the first sidewall being directly over the first node and the second sidewall being directly over the second node; the patterning structure line (34, 35, 36) comprising a first non-oxygen-containing material; forming oxygen-sensitive material along an exterior surface of the patterning structure line (34, 35, 36); the oxygen-sensitive material being configured as a bridge extending from an upper surface of the first node to an upper surface of the second node; said bridge having a first segment along the first sidewall, a second segment along the second sidewall, and a third segment across the top of the patterning structure line (34, 35, 36); forming second non-oxygen-containing material along the first, second and third segments (45, 46, 47) of the oxygen-sensitive material bridge; removing at least some of the third segment of the oxygen-sensitive material bridge to separate the first segment from the second segment, the removing exposing the top of the patterning structure line (34, 35, 36); forming a third non-oxygen-containing material over the exposed top of the patterning structure line (34, 35, 36) and along a lateral edge of the horizontal portions of the oxygen-sensitive material; forming a dielectric material over the third non-oxygen-containing material; incorporating the first segment and first node into a first memory cell; and incorporating the second segment and second node into a second memory cell which is adjacent to the first memory cell.