An adaptive AC power exchanger generating output AC power (182, 282) for a load (180, 280) from input AC power (102, 202) from a power source, comprising: an AC-DC circuit stage coupled to receive the input AC power comprising: an AC rectifier (114, 214) coupled to generate rectified power characterized by a rectified input current waveform and a rectified input voltage waveform; a power factor correction circuit (116, 216) coupled for receiving and modifying the rectified input power so that the waveform of the rectified input current follows the waveform of the rectified input voltage, the power factor correction circuit generating a first VDC output; and a plurality of capacitors coupled in series between the first VDC output and common connection voltage for generating a second VDC output intermediate between the first VDC output and common connection voltage defining a VDC inverter bias voltage; and a DC-AC circuit stage comprising: a pulse-width modulation inverter circuit (142, 242) coupled to receive the first VDC output and the VDC inverter bias voltage and generating an average output AC; a load current limit circuit (146, 246) coupled to receive the average output AC and limit the cycle-to-cycle frequency at the switching frequency of the pulse- width modulation inverter circuit; and an output dual inductor LC filter (148, 248) coupled to the average output AC, the output dual LC filter having a first inductor and a second inductor coupled in parallel and a bypass relay coupled to the parallel first and second inductors for selectively coupling and decoupling the second inductor in response to the output VAC applied to a load, the adaptive AC power exchanger further comprising a load disconnect relay (168, 268) for disconnecting the output AC power from the load in response to a load disconnect control signal when the current drawn by the load is greater than a predefined amount. an AC rectifier (114, 214) coupled to generate rectified power characterized by a rectified input current waveform and a rectified input voltage waveform; a power factor correction circuit (116, 216) coupled for receiving and modifying the rectified input power so that the waveform of the rectified input current follows the waveform of the rectified input voltage, the power factor correction circuit generating a first VDC output; and a plurality of capacitors coupled in series between the first VDC output and common connection voltage for generating a second VDC output intermediate between the first VDC output and common connection voltage defining a VDC inverter bias voltage; and a DC-AC circuit stage comprising: a pulse-width modulation inverter circuit (142, 242) coupled to receive the first VDC output and the VDC inverter bias voltage and generating an average output AC; a load current limit circuit (146, 246) coupled to receive the average output AC and limit the cycle-to-cycle frequency at the switching frequency of the pulse- width modulation inverter circuit; and an output dual inductor LC filter (148, 248) coupled to the average output AC, the output dual LC filter having a first inductor and a second inductor coupled in parallel and a bypass relay coupled to the parallel first and second inductors for selectively coupling and decoupling the second inductor in response to the output VAC applied to a load, a pulse-width modulation inverter circuit (142, 242) coupled to receive the first VDC output and the VDC inverter bias voltage and generating an average output AC; a load current limit circuit (146, 246) coupled to receive the average output AC and limit the cycle-to-cycle frequency at the switching frequency of the pulse- width modulation inverter circuit; and an output dual inductor LC filter (148, 248) coupled to the average output AC, the output dual LC filter having a first inductor and a second inductor coupled in parallel and a bypass relay coupled to the parallel first and second inductors for selectively coupling and decoupling the second inductor in response to the output VAC applied to a load,