Modularly assembled automation system comprising - a main unit with a plug-in bus port connector, - a plurality of modules each with a plug-in bus connector and a plug-in signal connector, - a backplane bus board (RP1,RP2,RP3) in a layered structure with bus conductor tracks (BL1,...,BL4) is connected to a plurality of plug-in module connectors (211,...,234) in which the plug-in bus connectors of the modules are arranged, - a motherboard on which a plurality of connector elements (312,...,334) are arranged, wherein the plug-in signal connectors of the modules are arranged in the connector elements (312,...,334) and the connector elements (312,...,334) are in electrical contact with conductor tracks (L1,..,L8) of the motherboard, - a plurality of connection means (B1,B2,B3,B4) which are arranged on the motherboard and are in electrical contact with the conductor tracks (L1,...,L8) of the motherboard such that electrical connection paths (VW1,...,VW4) are provided between the connector elements (312,...,334) and hence to the plug-in signal connectors of the modules and the connection means (B1,B2,B3,B4), wherein the connection means (B1,B2,B3,B4) are embodied for connection to process signal cables, - herein, the modules are embodied to communicate with the main unit via the plug-in bus connectors by means of the backplane bus board (RP1,RP2,RP3) and to forward logic outputs of the main unit as signals to the plug-in signal connectors, - the modules are also embodied to forward signals at the plug-in signal connectors which come from the connection means (B1,B2,B3,B4) as logic inputs to the main unit via the plug-in bus connectors and the backplane bus board (RP1,RP2,RP3), - wherein the bus conductor tracks (BL1,...,BL4) and the layered structure of the backplane bus board (RP1,RP2,RP3) are embodied such that a layer stack comprising the bus conductor tracks (BL1,...,BL4) and core material contains features necessary for maintaining the signal integrity of the signals on the backplane bus board (RP1,RP2,RP3) and thus, in respect of the signal integrity of the signals on the backplane bus board (RP1,RP2,RP3), this is arranged separately on the motherboard. - a main unit with a plug-in bus port connector, - a plurality of modules each with a plug-in bus connector and a plug-in signal connector, - a backplane bus board (RP1,RP2,RP3) in a layered structure with bus conductor tracks (BL1,...,BL4) is connected to a plurality of plug-in module connectors (211,...,234) in which the plug-in bus connectors of the modules are arranged, - a motherboard on which a plurality of connector elements (312,...,334) are arranged, wherein the plug-in signal connectors of the modules are arranged in the connector elements (312,...,334) and the connector elements (312,...,334) are in electrical contact with conductor tracks (L1,..,L8) of the motherboard, - a plurality of connection means (B1,B2,B3,B4) which are arranged on the motherboard and are in electrical contact with the conductor tracks (L1,...,L8) of the motherboard such that electrical connection paths (VW1,...,VW4) are provided between the connector elements (312,...,334) and hence to the plug-in signal connectors of the modules and the connection means (B1,B2,B3,B4), wherein the connection means (B1,B2,B3,B4) are embodied for connection to process signal cables, - herein, the modules are embodied to communicate with the main unit via the plug-in bus connectors by means of the backplane bus board (RP1,RP2,RP3) and to forward logic outputs of the main unit as signals to the plug-in signal connectors, - the modules are also embodied to forward signals at the plug-in signal connectors which come from the connection means (B1,B2,B3,B4) as logic inputs to the main unit via the plug-in bus connectors and the backplane bus board (RP1,RP2,RP3), - wherein the bus conductor tracks (BL1,...,BL4) and the layered structure of the backplane bus board (RP1,RP2,RP3) are embodied such that a layer stack comprising the bus conductor tracks (BL1,...,BL4) and core material contains features necessary for maintaining the signal integrity of the signals on the backplane bus board (RP1,RP2,RP3) and thus, in respect of the signal integrity of the signals on the backplane bus board (RP1,RP2,RP3), this is arranged separately on the motherboard.