A memory, comprising: an array of memory cells; a plurality of sense circuits, each sense circuit of the plurality of sense circuits comprising a respective capacitor of a plurality of capacitors, wherein each capacitor of the plurality of capacitors is connected to a respective node of a plurality of nodes, and wherein each node of the plurality of nodes is selectively connected to memory cells of the array of memory cells; and a controller for access of the array of memory cells, wherein the controller is configured to cause the memory to: apply a boost voltage level to each capacitor of the plurality of capacitors; selectively discharge each node of the plurality of nodes through a respective memory cell of a plurality of memory cells of the array of memory cells selected for a sense operation, with each memory cell of the plurality of memory cells connected to its respective node of the plurality of nodes; measure a current demand of the plurality of capacitors while each node of the plurality of nodes is connected to its respective memory cell of the plurality of memory cells; isolate each node of the plurality of nodes from its respective memory cell of the plurality of memory cells; determine a deboost voltage level in response to the measured current demand; apply the deboost voltage level to each capacitor of the plurality of capacitors; and determine a respective data state of each memory cell of the plurality of memory cells while the deboost voltage level is applied to each capacitor of the plurality of capacitors. an array of memory cells; a plurality of sense circuits, each sense circuit of the plurality of sense circuits comprising a respective capacitor of a plurality of capacitors, wherein each capacitor of the plurality of capacitors is connected to a respective node of a plurality of nodes, and wherein each node of the plurality of nodes is selectively connected to memory cells of the array of memory cells; and a controller for access of the array of memory cells, wherein the controller is configured to cause the memory to: apply a boost voltage level to each capacitor of the plurality of capacitors; selectively discharge each node of the plurality of nodes through a respective memory cell of a plurality of memory cells of the array of memory cells selected for a sense operation, with each memory cell of the plurality of memory cells connected to its respective node of the plurality of nodes; measure a current demand of the plurality of capacitors while each node of the plurality of nodes is connected to its respective memory cell of the plurality of memory cells; isolate each node of the plurality of nodes from its respective memory cell of the plurality of memory cells; determine a deboost voltage level in response to the measured current demand; apply the deboost voltage level to each capacitor of the plurality of capacitors; and determine a respective data state of each memory cell of the plurality of memory cells while the deboost voltage level is applied to each capacitor of the plurality of capacitors. apply a boost voltage level to each capacitor of the plurality of capacitors; selectively discharge each node of the plurality of nodes through a respective memory cell of a plurality of memory cells of the array of memory cells selected for a sense operation, with each memory cell of the plurality of memory cells connected to its respective node of the plurality of nodes; measure a current demand of the plurality of capacitors while each node of the plurality of nodes is connected to its respective memory cell of the plurality of memory cells; isolate each node of the plurality of nodes from its respective memory cell of the plurality of memory cells; determine a deboost voltage level in response to the measured current demand; apply the deboost voltage level to each capacitor of the plurality of capacitors; and determine a respective data state of each memory cell of the plurality of memory cells while the deboost voltage level is applied to each capacitor of the plurality of capacitors.