A method of manufacturing a light emitting device, the method comprising: providing a semiconductor stack including a first semiconductor layer and a second semiconductor layer disposed on an upper face of the first semiconductor layer; forming a plurality of light emitting cells arranged in column and row directions by forming a plurality of grooves in the semiconductor stack from an upper face side of the semiconductor stack, the grooves reaching the first semiconductor layer; exposing a portion of the first semiconductor layer from the second semiconductor layer by partially removing the second semiconductor layer from an upper face side of the second semiconductor layer in each of the light emitting cells; forming a first insulation layer continuously on the light emitting cells and the grooves, the first insulation layer having a second hole above a prescribed region of the upper face of the second semiconductor layer in each of the light emitting cells; forming a wiring electrode in electrical connection with the second semiconductor layer at the second hole in each of the light emitting cells, the wiring electrode covering the first insulation layer formed on the grooves, the wiring electrode covering the first insulation layer above the upper face of the second semiconductor layer except the prescribed region of the upper face of the second semiconductor layer in each of the light emitting cells; forming a first hole in the first insulation layer on or above the first semiconductor layer exposed from the second semiconductor layer in each of the light emitting cells; forming a first electrode in each of the light emitting cells to be in electrical connection with the first semiconductor layer at the first hole; thinning the first semiconductor layer from a lower face side of the first semiconductor layer by dry etching or polishing so as not to reach the first insulation layer formed on the grooves and thus not to reach the wiring electrode that covers the grooves; and subsequent to the step of thinning the first semiconductor layer, removing a portion of the first semiconductor layer in a thickness direction from the lower face side of the first semiconductor layer by wet etching, thereby exposing the first insulation layer from the first semiconductor layer at locations of the grooves while roughening a surface of the first semiconductor layer that has been partially removed by the step of thinning the first semiconductor layer. providing a semiconductor stack including a first semiconductor layer and a second semiconductor layer disposed on an upper face of the first semiconductor layer; forming a plurality of light emitting cells arranged in column and row directions by forming a plurality of grooves in the semiconductor stack from an upper face side of the semiconductor stack, the grooves reaching the first semiconductor layer; exposing a portion of the first semiconductor layer from the second semiconductor layer by partially removing the second semiconductor layer from an upper face side of the second semiconductor layer in each of the light emitting cells; forming a first insulation layer continuously on the light emitting cells and the grooves, the first insulation layer having a second hole above a prescribed region of the upper face of the second semiconductor layer in each of the light emitting cells; forming a wiring electrode in electrical connection with the second semiconductor layer at the second hole in each of the light emitting cells, the wiring electrode covering the first insulation layer formed on the grooves, the wiring electrode covering the first insulation layer above the upper face of the second semiconductor layer except the prescribed region of the upper face of the second semiconductor layer in each of the light emitting cells; forming a first hole in the first insulation layer on or above the first semiconductor layer exposed from the second semiconductor layer in each of the light emitting cells; forming a first electrode in each of the light emitting cells to be in electrical connection with the first semiconductor layer at the first hole; thinning the first semiconductor layer from a lower face side of the first semiconductor layer by dry etching or polishing so as not to reach the first insulation layer formed on the grooves and thus not to reach the wiring electrode that covers the grooves; and subsequent to the step of thinning the first semiconductor layer, removing a portion of the first semiconductor layer in a thickness direction from the lower face side of the first semiconductor layer by wet etching, thereby exposing the first insulation layer from the first semiconductor layer at locations of the grooves while roughening a surface of the first semiconductor layer that has been partially removed by the step of thinning the first semiconductor layer.