A computing system comprising: a prefetch unit, wherein the prefetch unit is configured to: detect an access to a given data stream of one or more data streams, wherein a data stream corresponds to a plurality of contiguous blocks of data in lower-level memory (114,118); responsive to detecting said access and determining a number of cache misses to the given data stream has reached a predetermined threshold: prefetch a portion of the given data stream from lower-level memory without write permission, responsive to there having not been an access to the given data stream that requests write permission subsequent to said number of cache misses reaching the predetermined threshold; and prefetch said portion of the given data stream from lower-level memory with write permission, responsive to there having been an access to the given data stream that requests write permission subsequent to said number of cache misses reaching the predetermined threshold. a prefetch unit, wherein the prefetch unit is configured to: detect an access to a given data stream of one or more data streams, wherein a data stream corresponds to a plurality of contiguous blocks of data in lower-level memory (114,118); responsive to detecting said access and determining a number of cache misses to the given data stream has reached a predetermined threshold: prefetch a portion of the given data stream from lower-level memory without write permission, responsive to there having not been an access to the given data stream that requests write permission subsequent to said number of cache misses reaching the predetermined threshold; and prefetch said portion of the given data stream from lower-level memory with write permission, responsive to there having been an access to the given data stream that requests write permission subsequent to said number of cache misses reaching the predetermined threshold. detect an access to a given data stream of one or more data streams, wherein a data stream corresponds to a plurality of contiguous blocks of data in lower-level memory (114,118); responsive to detecting said access and determining a number of cache misses to the given data stream has reached a predetermined threshold: prefetch a portion of the given data stream from lower-level memory without write permission, responsive to there having not been an access to the given data stream that requests write permission subsequent to said number of cache misses reaching the predetermined threshold; and prefetch said portion of the given data stream from lower-level memory with write permission, responsive to there having been an access to the given data stream that requests write permission subsequent to said number of cache misses reaching the predetermined threshold. prefetch a portion of the given data stream from lower-level memory without write permission, responsive to there having not been an access to the given data stream that requests write permission subsequent to said number of cache misses reaching the predetermined threshold; and prefetch said portion of the given data stream from lower-level memory with write permission, responsive to there having been an access to the given data stream that requests write permission subsequent to said number of cache misses reaching the predetermined threshold.