A thin film transistor substrate comprising: a substrate; a first semiconductor layer disposed on the substrate and including a polycrystalline semiconductor material; a gate insulating layer covering the first semiconductor layer; a first gate electrode disposed on the gate insulating layer and overlapping with the first semiconductor layer; an intermediate insulating layer including a nitride layer, and covering the first gate electrode; a second gate electrode, a first source electrode and a first drain electrode disposed on the intermediate insulating layer; an oxide layer covering the first source electrode, the first drain electrode and the second gate electrode; a second semiconductor layer including an oxide semiconductor material disposed on the oxide layer and overlapping with the second gate electrode; and a second source electrode and a second drain electrode disposed on the second semiconductor layer, wherein the first source electrode is connected to one portion of the first semiconductor layer through a source contact hole penetrating the intermediate insulating layer and the gate insulating layer, wherein the first drain electrode is connected to another portion of the first semiconductor layer through a drain contact hole penetrating the intermediate insulating layer and the gate insulating layer, wherein the second source electrode contacts one portion of the second semiconductor layer, and wherein the second drain electrode contacts another portion of the second semiconductor layer, wherein the first source electrode and the first drain electrode include the same material as the second gate electrode wherein the second gate electrode is connected to a gate line including the same material as the first gate electrode, through a gate contact hole penetrating the intermediate insulating layer, wherein the gate line is formed at the same layer with the first gate electrode, wherein the second source electrode is connected to a data line including the same material as the second gate electrode, through a data contact hole penetrating the oxide layer, wherein the data line is formed at the same layer with the second gate electrode. a substrate; a first semiconductor layer disposed on the substrate and including a polycrystalline semiconductor material; a gate insulating layer covering the first semiconductor layer; a first gate electrode disposed on the gate insulating layer and overlapping with the first semiconductor layer; an intermediate insulating layer including a nitride layer, and covering the first gate electrode; a second gate electrode, a first source electrode and a first drain electrode disposed on the intermediate insulating layer; an oxide layer covering the first source electrode, the first drain electrode and the second gate electrode; a second semiconductor layer including an oxide semiconductor material disposed on the oxide layer and overlapping with the second gate electrode; and a second source electrode and a second drain electrode disposed on the second semiconductor layer, wherein the first source electrode is connected to one portion of the first semiconductor layer through a source contact hole penetrating the intermediate insulating layer and the gate insulating layer, wherein the first drain electrode is connected to another portion of the first semiconductor layer through a drain contact hole penetrating the intermediate insulating layer and the gate insulating layer, wherein the second source electrode contacts one portion of the second semiconductor layer, and wherein the second drain electrode contacts another portion of the second semiconductor layer, wherein the first source electrode and the first drain electrode include the same material as the second gate electrode wherein the second gate electrode is connected to a gate line including the same material as the first gate electrode, through a gate contact hole penetrating the intermediate insulating layer, wherein the gate line is formed at the same layer with the first gate electrode, wherein the second source electrode is connected to a data line including the same material as the second gate electrode, through a data contact hole penetrating the oxide layer, wherein the data line is formed at the same layer with the second gate electrode.