A method comprising: providing a memory device storing a plurality of instructions of an application, each instruction of the plurality of instructions including (a) an instruction code, (b) a source type, and (c) a source address; providing a processing device operably coupled to the memory device; the method characterized by: retrieving, by the processing device, a first instruction of the plurality of instructions from the memory device, the first instruction being a first memory access instruction including a source address; inputting, by the processing device, the first memory access instruction to a memory control system (204, 206) interposed between the memory device and the processing device; processing, by the memory control system, the first instruction by: determining that the source type of the first instruction is a transfer descriptor flag; in response to determining that the source type of the first instruction is the transfer descriptor flag, executing a first transfer descriptor stored at the source address of the first instruction in a transfer buffer, the first transfer descriptor being executable code that, when executed by the memory control system, outputs a first intermediate result; executing the instruction code of the first instruction on an address of the memory device corresponding to the first intermediate result. providing a memory device storing a plurality of instructions of an application, each instruction of the plurality of instructions including (a) an instruction code, (b) a source type, and (c) a source address; providing a processing device operably coupled to the memory device; the method characterized by: retrieving, by the processing device, a first instruction of the plurality of instructions from the memory device, the first instruction being a first memory access instruction including a source address; inputting, by the processing device, the first memory access instruction to a memory control system (204, 206) interposed between the memory device and the processing device; processing, by the memory control system, the first instruction by: determining that the source type of the first instruction is a transfer descriptor flag; in response to determining that the source type of the first instruction is the transfer descriptor flag, executing a first transfer descriptor stored at the source address of the first instruction in a transfer buffer, the first transfer descriptor being executable code that, when executed by the memory control system, outputs a first intermediate result; executing the instruction code of the first instruction on an address of the memory device corresponding to the first intermediate result. retrieving, by the processing device, a first instruction of the plurality of instructions from the memory device, the first instruction being a first memory access instruction including a source address; inputting, by the processing device, the first memory access instruction to a memory control system (204, 206) interposed between the memory device and the processing device; processing, by the memory control system, the first instruction by: determining that the source type of the first instruction is a transfer descriptor flag; in response to determining that the source type of the first instruction is the transfer descriptor flag, executing a first transfer descriptor stored at the source address of the first instruction in a transfer buffer, the first transfer descriptor being executable code that, when executed by the memory control system, outputs a first intermediate result; executing the instruction code of the first instruction on an address of the memory device corresponding to the first intermediate result. determining that the source type of the first instruction is a transfer descriptor flag; in response to determining that the source type of the first instruction is the transfer descriptor flag, executing a first transfer descriptor stored at the source address of the first instruction in a transfer buffer, the first transfer descriptor being executable code that, when executed by the memory control system, outputs a first intermediate result; executing the instruction code of the first instruction on an address of the memory device corresponding to the first intermediate result.