A battery pack comprising: a plurality of battery cells; a printed circuit board substrate electrically connected to the plurality of battery cells and comprising first and second surfaces (s1, s2) opposite each other; and first and second electrode tabs (141, 142) electrically connecting each of the plurality of battery cells to the PCB substrate, the first and second electrode tabs (141, 142) being respectively connected to conductive pads (cp1, cp2) having different polarities and located on the first surface of the PCB substrate, wherein the conductive pads (cp1, cp2) form portions of conductive patterns of the PCB substrate forming a charge-discharge current path of the battery cell, characterized in that the conductive patterns of the PCB substrate comprise the conductive pads (cp1, cp2) located on the first surface, a conductive section located on the second surface, and vias penetrating the PCB substrate to connect at least one of the conductive pads on the first surface to the conductive section on the second surface, wherein the first and second electrode tabs comprise: first and second coupling portions (141e, 142e) respectively coupled to first and second electrodes (111, 112) of the battery cell; and first and second conductive portions (141c, 142c) extending from the first and second coupling portions toward the PCB substrate and respectively connected to the conductive pads having different polarities and located on the first surface, and wherein the first and second electrode tabs further comprise first and second fixing portions (141n, 142n).. extending from the first and second coupling portions and respectively coupled to different isolated pads (NP1, NP2) located on the first surface of the PCB substrate. a plurality of battery cells; a printed circuit board substrate electrically connected to the plurality of battery cells and comprising first and second surfaces (s1, s2) opposite each other; and first and second electrode tabs (141, 142) electrically connecting each of the plurality of battery cells to the PCB substrate, the first and second electrode tabs (141, 142) being respectively connected to conductive pads (cp1, cp2) having different polarities and located on the first surface of the PCB substrate, wherein the conductive pads (cp1, cp2) form portions of conductive patterns of the PCB substrate forming a charge-discharge current path of the battery cell, characterized in that the conductive patterns of the PCB substrate comprise the conductive pads (cp1, cp2) located on the first surface, a conductive section located on the second surface, and vias penetrating the PCB substrate to connect at least one of the conductive pads on the first surface to the conductive section on the second surface, wherein the first and second electrode tabs comprise: first and second coupling portions (141e, 142e) respectively coupled to first and second electrodes (111, 112) of the battery cell; and first and second conductive portions (141c, 142c) extending from the first and second coupling portions toward the PCB substrate and respectively connected to the conductive pads having different polarities and located on the first surface, and wherein the first and second electrode tabs further comprise first and second fixing portions (141n, 142n).. extending from the first and second coupling portions and respectively coupled to different isolated pads (NP1, NP2) located on the first surface of the PCB substrate. first and second coupling portions (141e, 142e) respectively coupled to first and second electrodes (111, 112) of the battery cell; and first and second conductive portions (141c, 142c) extending from the first and second coupling portions toward the PCB substrate and respectively connected to the conductive pads having different polarities and located on the first surface, and wherein the first and second electrode tabs further comprise first and second fixing portions (141n, 142n).. extending from the first and second coupling portions and respectively coupled to different isolated pads (NP1, NP2) located on the first surface of the PCB substrate.