A display controller of a data processing system, the display controller comprising: a first display processing core comprising a first input stage operable to read at least one input image surface from external memory, a first processing stage operable to process one or more input image surfaces including the at least one input image surface read by the first input stage to generate an output image surface for display, and a first output stage operable to provide the output image surface for display generated by the first processing stage to a first display; and a second display processing core comprising a second input stage operable to read at least one input image surface from external memory, a second processing stage operable to process one or more input image surfaces including the at least one input image surface read by the second input stage to generate a final output image surface for display or an intermediate output image surface, and a second output stage operable to provide the final output image surface for display generated by the second processing stage to a second display; characterised in that the display controller further comprises: an internal data path configured to pass pixel data of the intermediate output image surface generated by the second processing stage together with synchronisation signals from the second processing stage of the second display core to the first processing stage of the first display core such that the first display core receives via the internal data path the intermediate output image surface from the second display core directly from the second display processing core within the display controller without the intermediate output image surface being output from the display controller and without the intermediate output image surface being stored in external memory; wherein the first display processing core and the second display processing core are provided on the same monolithic integrated circuit, and wherein the internal data path is internal to the monolithic integrated circuit; wherein the first processing stage comprises a first composition stage and the second processing stage comprises a second composition stage; wherein the internal data path connects the second composition stage to the first composition stage; and wherein the intermediate output image surface is a composited output surface generated by the second composition stage. a first display processing core comprising a first input stage operable to read at least one input image surface from external memory, a first processing stage operable to process one or more input image surfaces including the at least one input image surface read by the first input stage to generate an output image surface for display, and a first output stage operable to provide the output image surface for display generated by the first processing stage to a first display; and a second display processing core comprising a second input stage operable to read at least one input image surface from external memory, a second processing stage operable to process one or more input image surfaces including the at least one input image surface read by the second input stage to generate a final output image surface for display or an intermediate output image surface, and a second output stage operable to provide the final output image surface for display generated by the second processing stage to a second display; characterised in that the display controller further comprises: an internal data path configured to pass pixel data of the intermediate output image surface generated by the second processing stage together with synchronisation signals from the second processing stage of the second display core to the first processing stage of the first display core such that the first display core receives via the internal data path the intermediate output image surface from the second display core directly from the second display processing core within the display controller without the intermediate output image surface being output from the display controller and without the intermediate output image surface being stored in external memory; wherein the first display processing core and the second display processing core are provided on the same monolithic integrated circuit, and wherein the internal data path is internal to the monolithic integrated circuit; wherein the first processing stage comprises a first composition stage and the second processing stage comprises a second composition stage; wherein the internal data path connects the second composition stage to the first composition stage; and wherein the intermediate output image surface is a composited output surface generated by the second composition stage.