A circuit for separating error bursts comprising: a frame alignment signal, FAS, search block characterized by being configured for performing two searches, a first search for a first part of a sequence of framing bits and a second search for a second part of said sequence of framing bits, said first and second parts together forming a frame alignment signal, characterised in that said circuit further comprises a shift block connected to the FAS search block, wherein the shift block is configured to receive the frame alignment signal from the FAS search block and is configured to receive a parallel, reordered stream (26, 300) of a number of digital symbols, wherein said shift block comprises a delay block and a shifter, said delay block for receiving said parallel, reordered stream (26, 300) and for outputting the symbols of the previous clock cycle of said parallel, re-ordered stream (26, 300) to the shifter; and said shifter for receiving the symbols of the present clock cycle of said parallel, reordered stream (26, 300) and said symbols of the previous clock cycle of said parallel, reordered stream (26, 300); an output of said shifter being electrically connected to an input of a descrambler for outputting a number of output symbols in parallel that comprise the frame alignment signal at a first position, if said frame alignment signal is part of the number of output symbols; and a framer supervision block being electrically connected to said shifter for providing shift information for putting said frame alignment signal at the first position. a frame alignment signal, FAS, search block characterized by being configured for performing two searches, a first search for a first part of a sequence of framing bits and a second search for a second part of said sequence of framing bits, said first and second parts together forming a frame alignment signal, characterised in that said circuit further comprises a shift block connected to the FAS search block, wherein the shift block is configured to receive the frame alignment signal from the FAS search block and is configured to receive a parallel, reordered stream (26, 300) of a number of digital symbols, wherein said shift block comprises a delay block and a shifter, said delay block for receiving said parallel, reordered stream (26, 300) and for outputting the symbols of the previous clock cycle of said parallel, re-ordered stream (26, 300) to the shifter; and said shifter for receiving the symbols of the present clock cycle of said parallel, reordered stream (26, 300) and said symbols of the previous clock cycle of said parallel, reordered stream (26, 300); an output of said shifter being electrically connected to an input of a descrambler for outputting a number of output symbols in parallel that comprise the frame alignment signal at a first position, if said frame alignment signal is part of the number of output symbols; and a framer supervision block being electrically connected to said shifter for providing shift information for putting said frame alignment signal at the first position. a shift block connected to the FAS search block, wherein the shift block is configured to receive the frame alignment signal from the FAS search block and is configured to receive a parallel, reordered stream (26, 300) of a number of digital symbols, wherein said shift block comprises a delay block and a shifter, said delay block for receiving said parallel, reordered stream (26, 300) and for outputting the symbols of the previous clock cycle of said parallel, re-ordered stream (26, 300) to the shifter; and said shifter for receiving the symbols of the present clock cycle of said parallel, reordered stream (26, 300) and said symbols of the previous clock cycle of said parallel, reordered stream (26, 300); an output of said shifter being electrically connected to an input of a descrambler for outputting a number of output symbols in parallel that comprise the frame alignment signal at a first position, if said frame alignment signal is part of the number of output symbols; and a framer supervision block being electrically connected to said shifter for providing shift information for putting said frame alignment signal at the first position.