A solid-state imaging device comprising: a plurality of pixel sections including, respectively, photoelectric converting circuits which include photodiodes for generating charges corresponding to intensities of incident lights and output voltages corresponding to the amounts of the generated charges, and holding circuits arranged to hold voltages output from the photoelectric converting circuits and successively output the charges to a common wire, the amounts of the charges output to the common wire corresponding to the held voltages; a transimpedance circuit including: a first amplifier(A 20), a first capacitor (C 20), and a resistor (R 20), where the first capacitor (C 20) and the resistor (R 20) are connected in parallel to each other and provided between an input terminal and an output terminal of the first amplifier (A 20), and the input terminal of the first amplifier (A 20) is connected to the common wire; the common wire being connected to the inverting input terminal of the first amplifier (A 20) and being maintained at the same fixed voltage as the voltage (Vref) input into the non-inverting input terminal of the first amplifier (A 20), and an integrating circuit which includes: a second amplifier (A 30), a second capacitor (C 30), and a switch (SW 30), where the second capacitor (C 30) and the switch (SW 30) are connected in parallel to each other and provided between an input terminal and an output terminal of the second amplifier (A 30), and the input terminal of the second amplifier (A 30) is connected to the output terminal of the first amplifier (A 20) of the transimpedance circuit, wherein the capacity of a capacitor (C 12) for holding a voltage in the holding circuit is in the range of 1pF to 2pF wherein the capacity of the first capacitor (C 20) of the transimpedance circuit is in the range of 1pF to 5pF, and wherein the transimpedance circuit and the integrating circuit are connected so as to transmit a pulse current from the transimpedance circuit to the integrating circuit. a plurality of pixel sections including, respectively, photoelectric converting circuits which include photodiodes for generating charges corresponding to intensities of incident lights and output voltages corresponding to the amounts of the generated charges, and holding circuits arranged to hold voltages output from the photoelectric converting circuits and successively output the charges to a common wire, the amounts of the charges output to the common wire corresponding to the held voltages; a transimpedance circuit including: a first amplifier(A 20), a first capacitor (C 20), and a resistor (R 20), where the first capacitor (C 20) and the resistor (R 20) are connected in parallel to each other and provided between an input terminal and an output terminal of the first amplifier (A 20), and the input terminal of the first amplifier (A 20) is connected to the common wire; a first amplifier(A 20), a first capacitor (C 20), and a resistor (R 20), where the first capacitor (C 20) and the resistor (R 20) are connected in parallel to each other and provided between an input terminal and an output terminal of the first amplifier (A 20), and the input terminal of the first amplifier (A 20) is connected to the common wire; the common wire being connected to the inverting input terminal of the first amplifier (A 20) and being maintained at the same fixed voltage as the voltage (Vref) input into the non-inverting input terminal of the first amplifier (A 20), and an integrating circuit which includes: a second amplifier (A 30), a second capacitor (C 30), and a switch (SW 30), where the second capacitor (C 30) and the switch (SW 30) are connected in parallel to each other and provided between an input terminal and an output terminal of the second amplifier (A 30), and the input terminal of the second amplifier (A 30) is connected to the output terminal of the first amplifier (A 20) of the transimpedance circuit, a second amplifier (A 30), a second capacitor (C 30), and a switch (SW 30), where the second capacitor (C 30) and the switch (SW 30) are connected in parallel to each other and provided between an input terminal and an output terminal of the second amplifier (A 30), and the input terminal of the second amplifier (A 30) is connected to the output terminal of the first amplifier (A 20) of the transimpedance circuit, wherein the capacity of a capacitor (C 12) for holding a voltage in the holding circuit is in the range of 1pF to 2pF wherein the capacity of the first capacitor (C 20) of the transimpedance circuit is in the range of 1pF to 5pF, and wherein the transimpedance circuit and the integrating circuit are connected so as to transmit a pulse current from the transimpedance circuit to the integrating circuit.