An input stage for a switched capacitor analog-to-digital converter, comprising a switching unit comprising a plurality of switching devices (410, 420, 430, 440, 470, 480); a differential voltage input (Vin) receiving a differential input voltage; a differential reference voltage input (Vref) receiving a chopped differential reference voltage comprising a positive reference voltage (Vref+) and a negative reference voltage (Vref-); a common voltage connection; a differential output (OP, OM); a pair of input capacitors (450a, b), wherein a first terminal of a first input capacitor is coupled with a first voltage input (Vin+) of the differential voltage input (Vin) via a first switching device and a second terminal of the first input capacitor is coupled with a first output of the differential output (OP, OM), and wherein a first terminal of a second input capacitor is coupled with a second voltage input (Vin-) of the differential voltage input (Vin) via the first switching device and a second terminal of the second input capacitor is coupled with a second output of the differential output (OP, OM); a pair of reference capacitors (460a, b), wherein a first terminal of a first reference capacitor is coupled with a first or a second reference input (Vref+, Vref-) of the differential reference voltage input (Vref) via a second switching device (420, 430) and a second terminal of the first reference capacitor is coupled with the first output of the differential output(OP, OM), and wherein a first terminal of a second reference capacitor is coupled with the second or the first reference input (Vref-, Vref+) of the differential reference voltage input (Vref) via the second switching device (420, 430) and a second terminal of the second reference capacitor is coupled with the second output of the differential output (OP, OM); wherein the switching unit is controlled by a first and second phase and operable: during the first phase to connect the first terminals of the first and second input capacitors (450a, b) via a third switching device with the common voltage connection and couple the first terminals of the reference capacitors via the second switching device with an inverted chopped differential reference voltage (Vref); and during a second phase to connect the first terminals of the first and second input capacitors (450a, b) via the first switching device with the differential input voltage (Vin) and couple the first terminals of the first and second reference capacitors (460a, b) via the second switching device with the non-inverted chopped differential reference voltage (Vref), wherein the chopped differential reference voltage (Vref) is chopped between the first and second phase such that a positive offset occurs during one phase and a negative offset occurs during the other phase. during the first phase to connect the first terminals of the first and second input capacitors (450a, b) via a third switching device with the common voltage connection and couple the first terminals of the reference capacitors via the second switching device with an inverted chopped differential reference voltage (Vref); and during a second phase to connect the first terminals of the first and second input capacitors (450a, b) via the first switching device with the differential input voltage (Vin) and couple the first terminals of the first and second reference capacitors (460a, b) via the second switching device with the non-inverted chopped differential reference voltage (Vref), wherein the chopped differential reference voltage (Vref) is chopped between the first and second phase such that a positive offset occurs during one phase and a negative offset occurs during the other phase.