A manufacturing method of a semiconductor device which includes a memory cell and a peripheral transistor formed on a major surface of a semiconductor substrate the manufacturing method comprising the steps of: preparing the semiconductor substrate; forming a first stacked structure on the major surface in a memory cell formation region where the memory cell is formed, the first stacked structure being obtained by stacking: a first insulating film; and a first dummy electrode that is in contact with an upper surface of the first insulating film; forming a second stacked structure on the major surface in the memory cell formation region, the second stacked structure being obtained by stacking: a second insulating film formed so as to be in contact with a side face of the first stacked structure and also so as to have an extension part extending on the major surface of the semiconductor substrate; and a second dummy electrode that is in contact with the second insulating film including an upper surface of the extension part in the second insulating film; forming a third stacked structure on the major surface in a peripheral transistor formation region where the peripheral transistor is formed, the third stacked structure being obtained by stacking: a third insulating film and a third dummy electrode that is in contact with an upper surface of the third insulating film; forming an interlayer insulating film so as to cover the first, second, and third stacked structures wherein each of the first and second stacked structures is formed so as to have a larger height than the third stacked structure; polishing a part of the interlayer insulating layer and upper surfaces of the first, second, and third dummy electrodes so that the upper surfaces of the first, second, and third dummy electrodes are exposed from the interlayer insulating layer, and an upper surface of the interlayer insulating layer and the upper surfaces of the first, second, and third dummy electrodes exposed become flat; removing the exposed first, second, and third dummy electrodes, and forming each of a first opening part, a second opening part and a third opening part; and embedding metal-containing stacked films including a metal-containing film and another film into each of the first opening part, the second opening part, and the third opening part, and thus forming a first metal-containing film, a second metal-containing film, and a third metal-containing film. preparing the semiconductor substrate; forming a first stacked structure on the major surface in a memory cell formation region where the memory cell is formed, the first stacked structure being obtained by stacking: a first insulating film; and a first dummy electrode that is in contact with an upper surface of the first insulating film; forming a second stacked structure on the major surface in the memory cell formation region, the second stacked structure being obtained by stacking: a second insulating film formed so as to be in contact with a side face of the first stacked structure and also so as to have an extension part extending on the major surface of the semiconductor substrate; and a second dummy electrode that is in contact with the second insulating film including an upper surface of the extension part in the second insulating film; forming a third stacked structure on the major surface in a peripheral transistor formation region where the peripheral transistor is formed, the third stacked structure being obtained by stacking: a third insulating film and a third dummy electrode that is in contact with an upper surface of the third insulating film; forming an interlayer insulating film so as to cover the first, second, and third stacked structures wherein each of the first and second stacked structures is formed so as to have a larger height than the third stacked structure; polishing a part of the interlayer insulating layer and upper surfaces of the first, second, and third dummy electrodes so that the upper surfaces of the first, second, and third dummy electrodes are exposed from the interlayer insulating layer, and an upper surface of the interlayer insulating layer and the upper surfaces of the first, second, and third dummy electrodes exposed become flat; removing the exposed first, second, and third dummy electrodes, and forming each of a first opening part, a second opening part and a third opening part; and embedding metal-containing stacked films including a metal-containing film and another film into each of the first opening part, the second opening part, and the third opening part, and thus forming a first metal-containing film, a second metal-containing film, and a third metal-containing film.