An amplifier system comprising: an RF signal generation circuit to generate an RF signal (S RF); a power amplifier comprising a first input transistor (M 1A, M 1B) and a first cascode transistor (M 3A, M 3B), wherein the power amplifier is any of a class B or class AB or class C power amplifier; and a linearization circuit, comprising: a replica circuit replicating the operation of the power amplifier comprising a second input transistor (M 1C+,M 1C-) and a second cascode transistor (M 3c); and an adaptive amplifier; and wherein: an output of the RF signal generation circuit is coupled to a gate of the first input transistor (M 1A, M 1B) to provide the RF signal (S RF) to the power amplifier; the output of the RF signal generation circuit is coupled to a gate of the second input transistor (M 1C+,M 1C-) to provide the RF signal (S RF) to the replica circuit; an output of the second input transistor (M 1C+,M 1C-) of the replica circuit is coupled to a first input of the adaptive amplifier to provide a sensing voltage (V SENSE) to the adaptive amplifier based on an envelope of the RF signal (S RF); an output of the adaptive amplifier is coupled to a gate of the first cascode transistor (M 3A, M 3B) to provide an adaptive bias voltage (V AB) based on the sensing voltage to the power amplifier; the output of the adaptive amplifier is coupled to a gate of the second cascode transistor (M 3c) to provide the adaptive bias voltage (V AB) to the replica circuit. an RF signal generation circuit to generate an RF signal (S RF); a power amplifier comprising a first input transistor (M 1A, M 1B) and a first cascode transistor (M 3A, M 3B), wherein the power amplifier is any of a class B or class AB or class C power amplifier; and a linearization circuit, comprising: a replica circuit replicating the operation of the power amplifier comprising a second input transistor (M 1C+,M 1C-) and a second cascode transistor (M 3c); and an adaptive amplifier; and wherein: an output of the RF signal generation circuit is coupled to a gate of the first input transistor (M 1A, M 1B) to provide the RF signal (S RF) to the power amplifier; the output of the RF signal generation circuit is coupled to a gate of the second input transistor (M 1C+,M 1C-) to provide the RF signal (S RF) to the replica circuit; an output of the second input transistor (M 1C+,M 1C-) of the replica circuit is coupled to a first input of the adaptive amplifier to provide a sensing voltage (V SENSE) to the adaptive amplifier based on an envelope of the RF signal (S RF); an output of the adaptive amplifier is coupled to a gate of the first cascode transistor (M 3A, M 3B) to provide an adaptive bias voltage (V AB) based on the sensing voltage to the power amplifier; the output of the adaptive amplifier is coupled to a gate of the second cascode transistor (M 3c) to provide the adaptive bias voltage (V AB) to the replica circuit. a replica circuit replicating the operation of the power amplifier comprising a second input transistor (M 1C+,M 1C-) and a second cascode transistor (M 3c); and an adaptive amplifier; an output of the RF signal generation circuit is coupled to a gate of the first input transistor (M 1A, M 1B) to provide the RF signal (S RF) to the power amplifier; the output of the RF signal generation circuit is coupled to a gate of the second input transistor (M 1C+,M 1C-) to provide the RF signal (S RF) to the replica circuit; an output of the second input transistor (M 1C+,M 1C-) of the replica circuit is coupled to a first input of the adaptive amplifier to provide a sensing voltage (V SENSE) to the adaptive amplifier based on an envelope of the RF signal (S RF); an output of the adaptive amplifier is coupled to a gate of the first cascode transistor (M 3A, M 3B) to provide an adaptive bias voltage (V AB) based on the sensing voltage to the power amplifier; the output of the adaptive amplifier is coupled to a gate of the second cascode transistor (M 3c) to provide the adaptive bias voltage (V AB) to the replica circuit.