A system (100, 300) for thwarting personal identification number, PIN, retry attacks in a trusted platform module, TPM, the system comprising: a system on a chip, SOC, comprising: a plurality of programmable fuses; one or more processors; one or more memory devices, the one or more memory devices comprising an on-die random access memory, RAM, storing a TPM state comprising a TPM state PIN-attempt-failure count and a TPM state fuse count; and the one or more memory devices storing program code to be executed by the one or more processors, the program code comprising: TPM logic, the TPM logic configured to: initialize the TPM, wherein the on-die RAM stores a blown-fuse count comprising a count of currently blown fuses of the plurality of programmable fuses, wherein to initialize the TPM, the TPM logic is configured to at least: in response to the blown-fuse count being greater than the TPM state fuse count: increment the TPM state PIN-attempt-failure count; receive a PIN in a first PIN attempt for accessing a system protected by the TPM; in response to the TPM state PIN-attempt-failure count satisfying a PIN-attempt-failure count policy: in response to the received PIN being correct: clear the TPM state PIN-attempt-failure count; in response to the received PIN being incorrect: blow a fuse; increment the blown-fuse count in the on-die RAM; in response to the fuse blow failing: halt TPM activity; and in response to the fuse blow succeeding: increment the TPM state PIN-attempt-failure count; set the TPM state fuse count equal to the blown-fuse count in the on-die RAM; and save the TPM state to an off-die non-volatile, NV, memory to update a NV state stored in the off-die NV memory. a plurality of programmable fuses; one or more processors; one or more memory devices, the one or more memory devices comprising an on-die random access memory, RAM, storing a TPM state comprising a TPM state PIN-attempt-failure count and a TPM state fuse count; and the one or more memory devices storing program code to be executed by the one or more processors, the program code comprising: TPM logic, the TPM logic configured to: initialize the TPM, wherein the on-die RAM stores a blown-fuse count comprising a count of currently blown fuses of the plurality of programmable fuses, wherein to initialize the TPM, the TPM logic is configured to at least: in response to the blown-fuse count being greater than the TPM state fuse count: increment the TPM state PIN-attempt-failure count; receive a PIN in a first PIN attempt for accessing a system protected by the TPM; in response to the TPM state PIN-attempt-failure count satisfying a PIN-attempt-failure count policy: in response to the received PIN being correct: clear the TPM state PIN-attempt-failure count; in response to the received PIN being incorrect: blow a fuse; increment the blown-fuse count in the on-die RAM; in response to the fuse blow failing: halt TPM activity; and in response to the fuse blow succeeding: increment the TPM state PIN-attempt-failure count; set the TPM state fuse count equal to the blown-fuse count in the on-die RAM; and save the TPM state to an off-die non-volatile, NV, memory to update a NV state stored in the off-die NV memory. initialize the TPM, wherein the on-die RAM stores a blown-fuse count comprising a count of currently blown fuses of the plurality of programmable fuses, wherein to initialize the TPM, the TPM logic is configured to at least: in response to the blown-fuse count being greater than the TPM state fuse count: increment the TPM state PIN-attempt-failure count; receive a PIN in a first PIN attempt for accessing a system protected by the TPM; in response to the TPM state PIN-attempt-failure count satisfying a PIN-attempt-failure count policy: in response to the received PIN being correct: clear the TPM state PIN-attempt-failure count; in response to the received PIN being incorrect: blow a fuse; increment the blown-fuse count in the on-die RAM; in response to the fuse blow failing: halt TPM activity; and in response to the fuse blow succeeding: increment the TPM state PIN-attempt-failure count; in response to the received PIN being correct: clear the TPM state PIN-attempt-failure count; in response to the received PIN being incorrect: blow a fuse; increment the blown-fuse count in the on-die RAM; blow a fuse; increment the blown-fuse count in the on-die RAM; in response to the fuse blow failing: halt TPM activity; and in response to the fuse blow succeeding: increment the TPM state PIN-attempt-failure count; set the TPM state fuse count equal to the blown-fuse count in the on-die RAM; and save the TPM state to an off-die non-volatile, NV, memory to update a NV state stored in the off-die NV memory.