A semiconductor device comprising: a first transistor (101; 1101; 1201); a second transistor (102, 1102, 1202); a switch (105; 1105; 1205); and a capacitor (104; 1104; 1204), wherein the first transistor includes a gate terminal, a first terminal, and a second terminal; wherein the second transistor includes a gate terminal, a first terminal, and a second terminal; wherein the gate terminal of the first transistor and the first terminal of the first transistor are connected via the switch; wherein the second terminal of the first transistor is connected to the first terminal of the second transistor; wherein the gate terminal of the first transistor is connected to the gate terminal of the second transistor; wherein the gate terminal of the first transistor is connected to one terminal of the capacitor; wherein the other terminal of the capacitor is connected to the second terminal of the second transistor; wherein one of the first terminal of the first transistor and the second terminal of the second transistor is connected to a terminal of a load (109; 1109; 1209), wherein the other of the first terminal of the first transistor and the second terminal of the second transistor is connected to a first current source circuit (108; 1108; 1208) via a switch, wherein the other of the first terminal of the first transistor and the second terminal of the second transistor is connected to a wiring (111; 1111) via a switch (107; 1107), the wiring being supplied with a first potential (Vdd); wherein a means (103; 1103; 1203) for short-circuiting between the first terminal of the second transistor and the second terminal of the second transistor is included, wherein the load is a display element, wherein the display element is an EL element and the other terminal of the load is connected to a second potential (Vss) different from said first potential (Vdd). a first transistor (101; 1101; 1201); a second transistor (102, 1102, 1202); a switch (105; 1105; 1205); and a capacitor (104; 1104; 1204), wherein the first transistor includes a gate terminal, a first terminal, and a second terminal; wherein the second transistor includes a gate terminal, a first terminal, and a second terminal; wherein the gate terminal of the first transistor and the first terminal of the first transistor are connected via the switch; wherein the second terminal of the first transistor is connected to the first terminal of the second transistor; wherein the gate terminal of the first transistor is connected to the gate terminal of the second transistor; wherein the gate terminal of the first transistor is connected to one terminal of the capacitor; wherein the other terminal of the capacitor is connected to the second terminal of the second transistor; wherein one of the first terminal of the first transistor and the second terminal of the second transistor is connected to a terminal of a load (109; 1109; 1209), wherein the other of the first terminal of the first transistor and the second terminal of the second transistor is connected to a first current source circuit (108; 1108; 1208) via a switch, wherein the other of the first terminal of the first transistor and the second terminal of the second transistor is connected to a wiring (111; 1111) via a switch (107; 1107), the wiring being supplied with a first potential (Vdd); wherein a means (103; 1103; 1203) for short-circuiting between the first terminal of the second transistor and the second terminal of the second transistor is included, wherein the load is a display element, wherein the display element is an EL element and the other terminal of the load is connected to a second potential (Vss) different from said first potential (Vdd).