A trench gate power semiconductor device comprising: a semiconductor layer of first conductive type; a body region of second conductive type opposite to the first conductive type, the body region formed in the vicinity of an upper surface of the semiconductor layer of first conductive type; a plurality of trenches formed so as to reach the semiconductor layer of first conductive type from an upper surface side of the body region of second conductive type; and gates formed in the plurality of trenches, wherein a second trench of a depth smaller than a depth of the body region of second conductive type and including a metal layer connected with an electrode different from a gate electrode out of electrodes formed on an upper surface of the semiconductor layer of first conductive type therein is formed in the body region of second conductive type, and a carrier extracting region (36a, 36b) of second conductive type is formed on a lower surface of the second trench such that the carrier extracting region is connected to the metal layer and reaches the semiconductor layer of first conductive type, and wherein the second trench is formed in partial or whole regions of some or all inter-trench regions out of all inter-trench regions which are respectively sandwiched between two neighboring trenches out of the plurality of trenches and the second trench also formed in a peripheral region further outside the outermost trench out of the plurality of trenches, and characterized in that the second trench formed in the peripheral region has a width larger than a width of the second trench formed in the inter-trench region; and in that the carrier extracting region of second conductive type formed in the peripheral region is formed so as to reach a position deeper than the carrier extracting region of second conductive type formed in the inter-trench region, and wherein the carrier extracting region (36a, 36b) of second conductive type is formed so as to reach a position of a depth larger than a depth of the trench; and wherein the impurity concentration of the carrier extracting region (36a, 36b) is lower than the impurity concentration of the body region, except than at the lower surface of the second trench in contact with the metal layer, where the impurity concentration of the carrier extracting region (36a, 36b) is higher than the impurity concentration of the body region. a semiconductor layer of first conductive type; a body region of second conductive type opposite to the first conductive type, the body region formed in the vicinity of an upper surface of the semiconductor layer of first conductive type; a plurality of trenches formed so as to reach the semiconductor layer of first conductive type from an upper surface side of the body region of second conductive type; and gates formed in the plurality of trenches, wherein a second trench of a depth smaller than a depth of the body region of second conductive type and including a metal layer connected with an electrode different from a gate electrode out of electrodes formed on an upper surface of the semiconductor layer of first conductive type therein is formed in the body region of second conductive type, and a carrier extracting region (36a, 36b) of second conductive type is formed on a lower surface of the second trench such that the carrier extracting region is connected to the metal layer and reaches the semiconductor layer of first conductive type, and wherein the second trench is formed in partial or whole regions of some or all inter-trench regions out of all inter-trench regions which are respectively sandwiched between two neighboring trenches out of the plurality of trenches and the second trench also formed in a peripheral region further outside the outermost trench out of the plurality of trenches, and characterized in that the second trench formed in the peripheral region has a width larger than a width of the second trench formed in the inter-trench region; and in that the carrier extracting region of second conductive type formed in the peripheral region is formed so as to reach a position deeper than the carrier extracting region of second conductive type formed in the inter-trench region, and wherein the carrier extracting region (36a, 36b) of second conductive type is formed so as to reach a position of a depth larger than a depth of the trench; and wherein the impurity concentration of the carrier extracting region (36a, 36b) is lower than the impurity concentration of the body region, except than at the lower surface of the second trench in contact with the metal layer, where the impurity concentration of the carrier extracting region (36a, 36b) is higher than the impurity concentration of the body region.