A system, comprising: a host processor; a host memory coupled to the host processor; a pre-processor; and a device implemented in hardware, comprising: a first Graph Convolutional Network, GCN, layer including: a multiplication module (520; 520-1) to perform a multiplication based on at least a node data for a graph or a weight data stored in a buffer in the device, and an accumulation and aggregation, ACG, module to perform accumulation and aggregation based at least in part on the multiplication module (520; 520-1) or an edge data for the graph; a second GCN layer including: a second multiplication module (520; 520-2) to perform a multiplication based on at least the output of the accumulation and aggregation module, and a second ACG module (525; 525-2) to perform accumulation and aggregation based at least in part on the second multiplication module or an edge data for the graph; and a control unit implemented as a Field Programmable Gate Array, FPGA, to manage the multiplication modules (520; 520-1, 520-2) and the ACG modules (525; 525-1, 525-2) of the first and second GCN layers (515-1, 515-2), wherein the pre-processor is configured to modify a value in the node data for the graph, and wherein the pre-processor is executed at least in part on the host processor, and wherein the pre-processor is configured to remove a zero from the node data for the graph, wherein: the device further comprises a pre-fetcher to retrieve the modified node data for the graph and the weight data from the memory of the host processor; and the control unit is configured to manage the pre-fetcher, and wherein pre-fetching the node data for the graph includes storing the node data for the graph in a buffer in the device. a host processor; a host memory coupled to the host processor; a pre-processor; and a device implemented in hardware, comprising: a first Graph Convolutional Network, GCN, layer including: a multiplication module (520; 520-1) to perform a multiplication based on at least a node data for a graph or a weight data stored in a buffer in the device, and an accumulation and aggregation, ACG, module to perform accumulation and aggregation based at least in part on the multiplication module (520; 520-1) or an edge data for the graph; a second GCN layer including: a second multiplication module (520; 520-2) to perform a multiplication based on at least the output of the accumulation and aggregation module, and a second ACG module (525; 525-2) to perform accumulation and aggregation based at least in part on the second multiplication module or an edge data for the graph; and a control unit implemented as a Field Programmable Gate Array, FPGA, to manage the multiplication modules (520; 520-1, 520-2) and the ACG modules (525; 525-1, 525-2) of the first and second GCN layers (515-1, 515-2), a first Graph Convolutional Network, GCN, layer including: a multiplication module (520; 520-1) to perform a multiplication based on at least a node data for a graph or a weight data stored in a buffer in the device, and an accumulation and aggregation, ACG, module to perform accumulation and aggregation based at least in part on the multiplication module (520; 520-1) or an edge data for the graph; a multiplication module (520; 520-1) to perform a multiplication based on at least a node data for a graph or a weight data stored in a buffer in the device, and an accumulation and aggregation, ACG, module to perform accumulation and aggregation based at least in part on the multiplication module (520; 520-1) or an edge data for the graph; a second GCN layer including: a second multiplication module (520; 520-2) to perform a multiplication based on at least the output of the accumulation and aggregation module, and a second ACG module (525; 525-2) to perform accumulation and aggregation based at least in part on the second multiplication module or an edge data for the graph; and a second multiplication module (520; 520-2) to perform a multiplication based on at least the output of the accumulation and aggregation module, and a second ACG module (525; 525-2) to perform accumulation and aggregation based at least in part on the second multiplication module or an edge data for the graph; and a control unit implemented as a Field Programmable Gate Array, FPGA, to manage the multiplication modules (520; 520-1, 520-2) and the ACG modules (525; 525-1, 525-2) of the first and second GCN layers (515-1, 515-2), wherein the pre-processor is configured to modify a value in the node data for the graph, and wherein the pre-processor is executed at least in part on the host processor, and wherein the pre-processor is configured to remove a zero from the node data for the graph, wherein: the device further comprises a pre-fetcher to retrieve the modified node data for the graph and the weight data from the memory of the host processor; and the control unit is configured to manage the pre-fetcher, and wherein pre-fetching the node data for the graph includes storing the node data for the graph in a buffer in the device. the device further comprises a pre-fetcher to retrieve the modified node data for the graph and the weight data from the memory of the host processor; and the control unit is configured to manage the pre-fetcher, and wherein pre-fetching the node data for the graph includes storing the node data for the graph in a buffer in the device.