A computer-implemented method for simulating a quantum circuit, the method comprising: receiving data representing the quantum circuit, wherein the quantum circuit comprises multiple quantum logic gates; generating a simulation of the quantum circuit using the received data, comprising: representing the multiple quantum logic gates specified by the received data as functions of one or more classical Boolean variables, wherein the functions of one or more classical Boolean variables define an undirected graphical model with each classical Boolean variable representing a vertex in the undirected graphical model and each function of respective classical Boolean variables representing a clique between vertices corresponding to the respective classical Boolean variables; representing the probability of obtaining a particular output bit string from the quantum circuit as a first sum of products of the functions; and calculating the probability of obtaining the particular output bit string from the quantum circuit by directly evaluating the sum of products of the functions, directly evaluating the sum of products of the functions comprising applying a variable elimination algorithm, wherein applying a variable elimination algorithm comprises: approximating the treewidth of the defined undirected graphical model; determining, based on the approximated treewidth, an order of elimination for the variable elimination algorithm; and evaluating the sum of products of the functions by performing the variable elimination algorithm with the determined order of elimination; determining one or more properties of the quantum circuit using the calculated probability of obtaining a particular output bit string from the generated simulation, using the determined one or more properties to (i) calibrate, (ii) validate, or (iii) benchmark quantum computing hardware implementing the quantum circuit. receiving data representing the quantum circuit, wherein the quantum circuit comprises multiple quantum logic gates; generating a simulation of the quantum circuit using the received data, comprising: representing the multiple quantum logic gates specified by the received data as functions of one or more classical Boolean variables, wherein the functions of one or more classical Boolean variables define an undirected graphical model with each classical Boolean variable representing a vertex in the undirected graphical model and each function of respective classical Boolean variables representing a clique between vertices corresponding to the respective classical Boolean variables; representing the probability of obtaining a particular output bit string from the quantum circuit as a first sum of products of the functions; and calculating the probability of obtaining the particular output bit string from the quantum circuit by directly evaluating the sum of products of the functions, directly evaluating the sum of products of the functions comprising applying a variable elimination algorithm, wherein applying a variable elimination algorithm comprises: approximating the treewidth of the defined undirected graphical model; determining, based on the approximated treewidth, an order of elimination for the variable elimination algorithm; and evaluating the sum of products of the functions by performing the variable elimination algorithm with the determined order of elimination; representing the multiple quantum logic gates specified by the received data as functions of one or more classical Boolean variables, wherein the functions of one or more classical Boolean variables define an undirected graphical model with each classical Boolean variable representing a vertex in the undirected graphical model and each function of respective classical Boolean variables representing a clique between vertices corresponding to the respective classical Boolean variables; representing the probability of obtaining a particular output bit string from the quantum circuit as a first sum of products of the functions; and calculating the probability of obtaining the particular output bit string from the quantum circuit by directly evaluating the sum of products of the functions, directly evaluating the sum of products of the functions comprising applying a variable elimination algorithm, wherein applying a variable elimination algorithm comprises: approximating the treewidth of the defined undirected graphical model; determining, based on the approximated treewidth, an order of elimination for the variable elimination algorithm; and evaluating the sum of products of the functions by performing the variable elimination algorithm with the determined order of elimination; approximating the treewidth of the defined undirected graphical model; determining, based on the approximated treewidth, an order of elimination for the variable elimination algorithm; and evaluating the sum of products of the functions by performing the variable elimination algorithm with the determined order of elimination; determining one or more properties of the quantum circuit using the calculated probability of obtaining a particular output bit string from the generated simulation, using the determined one or more properties to (i) calibrate, (ii) validate, or (iii) benchmark quantum computing hardware implementing the quantum circuit.