A display panel, comprising: a base substrate comprising a display area and a peripheral area surrounding the display area; a plurality of sub-pixels located at the display area, wherein each of the plurality of sub-pixels comprises a light-emitting element and a pixel driving circuit configured to drive the light-emitting element; a plurality of gate lines located at the display area and electrically connected to the plurality of sub-pixels; a gate driving circuit located at the display area and comprising cascaded multistage gate driving units electrically connected to the plurality of gate lines, wherein one or more stages gate driving units of the multistage gate driving units comprise a plurality of gate driving sub-circuits, the plurality of gate driving sub-circuits comprises a first gate driving sub-circuit (211A1) and a second gate driving sub-circuit (211A2) that are spaced apart by pixel driving circuits of a first group of sub-pixels of the plurality of sub-pixels; and a gate driving sub-circuit connection line located at the display area, wherein one end of the gate driving sub-circuit connection line is electrically connected to the first gate driving sub-circuit (211A1), and the other end of the gate driving sub-circuit connection line is electrically connected to the second gate driving sub-circuit (211A2), wherein the pixel driving circuits of at least one sub-pixel of the first group of sub-pixels comprises: a first pixel driving sub-circuit located on one side of the gate driving sub-circuit connection line and comprising a driving transistor which comprises a first active layer located on one side of the base substrate, a second pixel driving sub-circuit located on one side of the gate driving sub-circuit connection line away from the first pixel driving sub-circuit, and a connector located in a different layer from the first active layer, wherein one end of the connector is electrically connected to the first pixel driving sub-circuit, the other end of the connector is electrically connected to the second pixel driving sub-circuit, and an orthographic projection of the connector on the base substrate overlaps with an orthographic projection of the gate driving sub-circuit connection line on the base substrate. a base substrate comprising a display area and a peripheral area surrounding the display area; a plurality of sub-pixels located at the display area, wherein each of the plurality of sub-pixels comprises a light-emitting element and a pixel driving circuit configured to drive the light-emitting element; a plurality of gate lines located at the display area and electrically connected to the plurality of sub-pixels; a gate driving circuit located at the display area and comprising cascaded multistage gate driving units electrically connected to the plurality of gate lines, wherein one or more stages gate driving units of the multistage gate driving units comprise a plurality of gate driving sub-circuits, the plurality of gate driving sub-circuits comprises a first gate driving sub-circuit (211A1) and a second gate driving sub-circuit (211A2) that are spaced apart by pixel driving circuits of a first group of sub-pixels of the plurality of sub-pixels; and a gate driving sub-circuit connection line located at the display area, wherein one end of the gate driving sub-circuit connection line is electrically connected to the first gate driving sub-circuit (211A1), and the other end of the gate driving sub-circuit connection line is electrically connected to the second gate driving sub-circuit (211A2), wherein the pixel driving circuits of at least one sub-pixel of the first group of sub-pixels comprises: a first pixel driving sub-circuit located on one side of the gate driving sub-circuit connection line and comprising a driving transistor which comprises a first active layer located on one side of the base substrate, a second pixel driving sub-circuit located on one side of the gate driving sub-circuit connection line away from the first pixel driving sub-circuit, and a connector located in a different layer from the first active layer, wherein one end of the connector is electrically connected to the first pixel driving sub-circuit, the other end of the connector is electrically connected to the second pixel driving sub-circuit, and an orthographic projection of the connector on the base substrate overlaps with an orthographic projection of the gate driving sub-circuit connection line on the base substrate. a first pixel driving sub-circuit located on one side of the gate driving sub-circuit connection line and comprising a driving transistor which comprises a first active layer located on one side of the base substrate, a second pixel driving sub-circuit located on one side of the gate driving sub-circuit connection line away from the first pixel driving sub-circuit, and a connector located in a different layer from the first active layer, wherein one end of the connector is electrically connected to the first pixel driving sub-circuit, the other end of the connector is electrically connected to the second pixel driving sub-circuit, and an orthographic projection of the connector on the base substrate overlaps with an orthographic projection of the gate driving sub-circuit connection line on the base substrate.