A ring oscillator (500, 600, 700), comprising: a control gate (510, 610); a first inverter (520, 620); a second inverter (530, 630); wherein a ring structure is formed by cascading the control gate (510, 610), the first inverter (520, 620), and the second inverter (530, 630); wherein each of the first inverter (520, 620) and the second inverter (520, 620) has an input node and an output node, and comprises: a first converter, coupled between a supply voltage and the output node; and a second converter, coupled between the output node and a ground voltage, wherein the first converter comprises: a first PMOS transistor, P-type Metal Oxide Semiconductor Field Effect Transistor, wherein the first PMOS transistor has a control terminal connected to the input node, a first terminal, and a second terminal coupled to the output node; and a second PMOS transistor, wherein the second PMOS transistor has a control terminal connected to the first terminal of the first PMOS transistor, a first terminal connected to the supply voltage, and a second terminal coupled to the output node, and/or wherein the second converter comprises: a first NMOS transistor, N-type Metal Oxide Semiconductor Field Effect Transistor, wherein the first NMOS transistor has a control terminal connected to the input node, a first terminal, and a second terminal connected to the output node; and a second NMOS transistor, wherein the second NMOS transistor has a control terminal connected to the first terminal of the first NMOS transistor, a first terminal connected to the ground voltage, and a second terminal connected to the output node. a control gate (510, 610); a first inverter (520, 620); a second inverter (530, 630); wherein a ring structure is formed by cascading the control gate (510, 610), the first inverter (520, 620), and the second inverter (530, 630); wherein each of the first inverter (520, 620) and the second inverter (520, 620) has an input node and an output node, and comprises: a first converter, coupled between a supply voltage and the output node; and a second converter, coupled between the output node and a ground voltage, a first converter, coupled between a supply voltage and the output node; and a second converter, coupled between the output node and a ground voltage, wherein the first converter comprises: a first PMOS transistor, P-type Metal Oxide Semiconductor Field Effect Transistor, wherein the first PMOS transistor has a control terminal connected to the input node, a first terminal, and a second terminal coupled to the output node; and a second PMOS transistor, wherein the second PMOS transistor has a control terminal connected to the first terminal of the first PMOS transistor, a first terminal connected to the supply voltage, and a second terminal coupled to the output node, a first PMOS transistor, P-type Metal Oxide Semiconductor Field Effect Transistor, wherein the first PMOS transistor has a control terminal connected to the input node, a first terminal, and a second terminal coupled to the output node; and a second PMOS transistor, wherein the second PMOS transistor has a control terminal connected to the first terminal of the first PMOS transistor, a first terminal connected to the supply voltage, and a second terminal coupled to the output node, and/or wherein the second converter comprises: a first NMOS transistor, N-type Metal Oxide Semiconductor Field Effect Transistor, wherein the first NMOS transistor has a control terminal connected to the input node, a first terminal, and a second terminal connected to the output node; and a second NMOS transistor, wherein the second NMOS transistor has a control terminal connected to the first terminal of the first NMOS transistor, a first terminal connected to the ground voltage, and a second terminal connected to the output node. a first NMOS transistor, N-type Metal Oxide Semiconductor Field Effect Transistor, wherein the first NMOS transistor has a control terminal connected to the input node, a first terminal, and a second terminal connected to the output node; and a second NMOS transistor, wherein the second NMOS transistor has a control terminal connected to the first terminal of the first NMOS transistor, a first terminal connected to the ground voltage, and a second terminal connected to the output node.