A method of operating a switched capacitor differentiator, which includes an operational amplifier having an output, an inverting input and a non-inverting input, an input port and a reference voltage, a first capacitor and a second capacitor, and a switching structure, which comprises three pairs of switches (41, 42, 43, 44, 45, 46) to alternately couple at least one of the first and the second capacitors (30, 32) with the operational amplifier, the input port and with the reference voltage in at least three different switch configurations, wherein the method comprises determining a difference between two input signals, by: - transferring the switching structure in a first phase into a first switch configuration in which the first capacitor is coupled between the input port to receive the first input signal and the reference voltage, by closing a first switch of a first pair connected to a top plate of the first capacitor and the input port, and by closing a second switch of the first pair connected to a bottom plate of the first capacitor and the reference voltage, - transferring the switching structure in a second phase into a second switch configuration in which the second capacitor is coupled between the input port to receive the second signal and a node connected to the operational amplifier output and inverting input, by closing a third switch of a second pair connected to a top plate of the second capacitor and the input port, and by closing a fourth switch of the second pair connected to the operational amplifier output and the node linked to the inverted input and a bottom plate of the second capacitor, and - transferring the switching structure in a third phase into a third switch configuration in which the first and second capacitors (30, 32) are connected in series between the inverting input and the operational amplifier output, by closing a fifth switch of a third pair connected to the top plate of the first capacitor and the top plate of the second capacitor, and by closing a sixth switch of the third pair connected to the bottom plate of the first capacitor and the operational amplifier output wherein the first and second switches of the first pair are closed during the first switch configuration, while the other switches are designed to be open, wherein the third and fourth switches of the second pair are closed during the second switch configuration, while the other switches are designed to be open, and wherein the fifth and sixth switches of the third pair are closed during the third switch configuration, while the other switches are designed to be open. - transferring the switching structure in a first phase into a first switch configuration in which the first capacitor is coupled between the input port to receive the first input signal and the reference voltage, by closing a first switch of a first pair connected to a top plate of the first capacitor and the input port, and by closing a second switch of the first pair connected to a bottom plate of the first capacitor and the reference voltage, - transferring the switching structure in a second phase into a second switch configuration in which the second capacitor is coupled between the input port to receive the second signal and a node connected to the operational amplifier output and inverting input, by closing a third switch of a second pair connected to a top plate of the second capacitor and the input port, and by closing a fourth switch of the second pair connected to the operational amplifier output and the node linked to the inverted input and a bottom plate of the second capacitor, and - transferring the switching structure in a third phase into a third switch configuration in which the first and second capacitors (30, 32) are connected in series between the inverting input and the operational amplifier output, by closing a fifth switch of a third pair connected to the top plate of the first capacitor and the top plate of the second capacitor, and by closing a sixth switch of the third pair connected to the bottom plate of the first capacitor and the operational amplifier output wherein the first and second switches of the first pair are closed during the first switch configuration, while the other switches are designed to be open, wherein the third and fourth switches of the second pair are closed during the second switch configuration, while the other switches are designed to be open, and wherein the fifth and sixth switches of the third pair are closed during the third switch configuration, while the other switches are designed to be open.