A variable gain amplifier comprising: an input voltage connector (V INN, V INP); a number of voltage to current converter circuits (1, 2, 3) adapted to generate signal currents based on a voltage input signal applied to the input voltage connector; a gain adjustment connector (V GAIN); current mirrors (M1, M2, M3) connected to each of the voltage to current converters (1, 2, 3) copying the signal currents; and a steering mechanism (10, 20, 30) adapted to steer the copied currents to at least one of a load resistor (R L) and another appropriate location based on the signal present at the gain adjustment connector (V GAIN); wherein each voltage to current converter circuit (1, 2, 3) comprises: a first current source, a first transistor (M11, M12, M13) and a second transistor (M31, M32, M33) connected in series between first and second power supply rails; a second current source, a third transistor (M21, M22, M23) and a fourth transistor (M41, M42, M43) connected in series between the first and second power supply rails; and a resistor connected between outputs of the first and second current sources; wherein the voltage input signal is a differential signal and gates of the first and third transistors are arranged to receive inverted and non-inverted signals of the differential voltage input signal, respectively; and the current mirrors (M1, M2, M3) include the second and fourth transistors. an input voltage connector (V INN, V INP); a number of voltage to current converter circuits (1, 2, 3) adapted to generate signal currents based on a voltage input signal applied to the input voltage connector; a gain adjustment connector (V GAIN); current mirrors (M1, M2, M3) connected to each of the voltage to current converters (1, 2, 3) copying the signal currents; and a steering mechanism (10, 20, 30) adapted to steer the copied currents to at least one of a load resistor (R L) and another appropriate location based on the signal present at the gain adjustment connector (V GAIN); wherein each voltage to current converter circuit (1, 2, 3) comprises: a first current source, a first transistor (M11, M12, M13) and a second transistor (M31, M32, M33) connected in series between first and second power supply rails; a second current source, a third transistor (M21, M22, M23) and a fourth transistor (M41, M42, M43) connected in series between the first and second power supply rails; and a resistor connected between outputs of the first and second current sources; wherein the voltage input signal is a differential signal and gates of the first and third transistors are arranged to receive inverted and non-inverted signals of the differential voltage input signal, respectively; and the current mirrors (M1, M2, M3) include the second and fourth transistors. a first current source, a first transistor (M11, M12, M13) and a second transistor (M31, M32, M33) connected in series between first and second power supply rails; a second current source, a third transistor (M21, M22, M23) and a fourth transistor (M41, M42, M43) connected in series between the first and second power supply rails; and a resistor connected between outputs of the first and second current sources; wherein the voltage input signal is a differential signal and gates of the first and third transistors are arranged to receive inverted and non-inverted signals of the differential voltage input signal, respectively; and the current mirrors (M1, M2, M3) include the second and fourth transistors.