A photonic integrated circuit, PIC, comprising: an optical switch; a plurality of input edge couplers comprising a first input edge coupler and coupled to the optical switch; a plurality of input surface grating couplers, SGCs, comprising a first input SGC and coupled to the optical switch; a plurality of output edge couplers comprising a first output edge coupler and coupled to the optical switch; and a plurality of output SGCs comprising a first output SGC and coupled to the optical switch; wherein the optical switch comprises an inner architecture, a plurality of input cells comprising an input cell and a plurality of output cells comprising an output cell, wherein each input cell comprises a first input, a second input, a first input cell output coupled to the inner architecture and a second input cell output coupled to the inner architecture, and wherein each output cell comprises a first output cell input coupled to the inner architecture, a second output cell input coupled to the inner architecture, a first output and a second output; wherein the first input is coupled to the first input edge coupler, the second input is coupled to the first input SGC, the first output is coupled to the first output edge coupler, and the second output is coupled to the first output SGC; and wherein each of the plurality of input surface grating couplers is coupled to one input cell and each of the plurality of output surface grating couplers is coupled to one output cell; further comprising a chip, wherein the chip comprises the optical switch, the input edge couplers, the input SGCs, the output edge couplers, and the output SGCs; wherein the chip primarily comprises silicon or the chip is a silicon-on-insulator, SOI, chip. an optical switch; a plurality of input edge couplers comprising a first input edge coupler and coupled to the optical switch; a plurality of input surface grating couplers, SGCs, comprising a first input SGC and coupled to the optical switch; a plurality of output edge couplers comprising a first output edge coupler and coupled to the optical switch; and a plurality of output SGCs comprising a first output SGC and coupled to the optical switch; wherein the optical switch comprises an inner architecture, a plurality of input cells comprising an input cell and a plurality of output cells comprising an output cell, wherein each input cell comprises a first input, a second input, a first input cell output coupled to the inner architecture and a second input cell output coupled to the inner architecture, and wherein each output cell comprises a first output cell input coupled to the inner architecture, a second output cell input coupled to the inner architecture, a first output and a second output; wherein the first input is coupled to the first input edge coupler, the second input is coupled to the first input SGC, the first output is coupled to the first output edge coupler, and the second output is coupled to the first output SGC; and wherein each of the plurality of input surface grating couplers is coupled to one input cell and each of the plurality of output surface grating couplers is coupled to one output cell; further comprising a chip, wherein the chip comprises the optical switch, the input edge couplers, the input SGCs, the output edge couplers, and the output SGCs; wherein the chip primarily comprises silicon or the chip is a silicon-on-insulator, SOI, chip.