A method for performing trellis equalization on a sequence of modulated symbols with state reduction, the method comprising: computing accumulated path metrics, APMs, for candidate states of a leading symbol; selecting a subset of the APMs for candidate states of the leading symbol to propagate over a trellis to candidate states of a trailing symbol, the leading symbol preceding the trailing symbol in the sequence of symbols; computing APMs for candidate states of the trailing symbol using APMs in the subset of APMs selected to propagate over the trellis without using APMs for candidate states of the leading symbol that are not propagated over the trellis; and decoding the sequence of symbols in accordance with at least some of the APMs computed for the candidate states of the trailing symbol; wherein computing the APMs for candidate states of the leading symbol comprises: computing a set of branch metrics, BMs, for candidate states of the leading symbol; and storing, in memory, the set of BMs for the leading symbol and the subset of APMs selected to propagate over the trellis; the method being characterised by performing bit-level decoding for the leading symbol after decoding the sequence of symbols, wherein performing bit-level decoding for the leading symbol comprises computing a hard decision for a bit in the leading symbol, and computing a log likelihood ratio, LLR, for the bit in the leading symbol using at least some BMs in the set of BMs when a degenerate LLR condition occurs; wherein the degenerate LLR condition occurs when all APMs in the subset of APMs map to a value of one for the bit such that no APMs in the subset of APMs map to a value of zero for the bit, or when all APMs in the subset of APMs map to a value of zero for the bit such that no APMs in the subset of APMs map to a value of one for the bit. computing accumulated path metrics, APMs, for candidate states of a leading symbol; selecting a subset of the APMs for candidate states of the leading symbol to propagate over a trellis to candidate states of a trailing symbol, the leading symbol preceding the trailing symbol in the sequence of symbols; computing APMs for candidate states of the trailing symbol using APMs in the subset of APMs selected to propagate over the trellis without using APMs for candidate states of the leading symbol that are not propagated over the trellis; and decoding the sequence of symbols in accordance with at least some of the APMs computed for the candidate states of the trailing symbol; wherein computing the APMs for candidate states of the leading symbol comprises: computing a set of branch metrics, BMs, for candidate states of the leading symbol; and storing, in memory, the set of BMs for the leading symbol and the subset of APMs selected to propagate over the trellis; the method being characterised by performing bit-level decoding for the leading symbol after decoding the sequence of symbols, wherein performing bit-level decoding for the leading symbol comprises computing a hard decision for a bit in the leading symbol, and computing a log likelihood ratio, LLR, for the bit in the leading symbol using at least some BMs in the set of BMs when a degenerate LLR condition occurs; wherein the degenerate LLR condition occurs when all APMs in the subset of APMs map to a value of one for the bit such that no APMs in the subset of APMs map to a value of zero for the bit, or when all APMs in the subset of APMs map to a value of zero for the bit such that no APMs in the subset of APMs map to a value of one for the bit. computing a set of branch metrics, BMs, for candidate states of the leading symbol; and storing, in memory, the set of BMs for the leading symbol and the subset of APMs selected to propagate over the trellis; the method being characterised by performing bit-level decoding for the leading symbol after decoding the sequence of symbols, wherein performing bit-level decoding for the leading symbol comprises computing a hard decision for a bit in the leading symbol, and computing a log likelihood ratio, LLR, for the bit in the leading symbol using at least some BMs in the set of BMs when a degenerate LLR condition occurs; wherein the degenerate LLR condition occurs when all APMs in the subset of APMs map to a value of one for the bit such that no APMs in the subset of APMs map to a value of zero for the bit, or when all APMs in the subset of APMs map to a value of zero for the bit such that no APMs in the subset of APMs map to a value of one for the bit.