A method of forming a semiconductor device, the method comprising: providing a terminal region of a first conductivity type within a semiconductor layer of the first conductivity type at a surface of the semiconductor layer; providing a well region of a second conductivity type within the semiconductor layer wherein the well region is adjacent at least a portion of the terminal region within the semiconductor layer, wherein a depth of the well region into the semiconductor layer is greater than a depth of the terminal region into the semiconductor layer, and wherein the first and second conductivity types are different; after providing the well region and the terminal region, providing a continuous epitaxial semiconductor layer on the semiconductor layer, wherein the continuous epitaxial semiconductor layer has opposing first and second surfaces, wherein the first surface is adjacent the semiconductor layer, and wherein the second surface is remote from the semiconductor layer so that the first surface is between the second surface and the semiconductor layer and wherein the continuous epitaxial semiconductor layer extends across an entirety of the well region and terminal region at a surface of the semiconductor layer; after forming the continuous epitaxial semiconductor layer, providing a terminal contact region of the first conductivity type in and extending through the continuous epitaxial semiconductor layer, wherein the terminal contact region provides electrical contact with the terminal region, and wherein an outermost edge of the terminal contact region is set back from an outer edge of the terminal region around a perimeter of the terminal region in a direction parallel to a surface of the semiconductor layer; providing an ohmic contact on the terminal contact region; providing a gate insulating layer on the continuous epitaxial semiconductor layer opposite a channel; and providing a gate electrode on the gate insulating layer opposite the channel so that the continuous epitaxial semiconductor layer is between the gate electrode and portions of the well region surrounding the terminal region at the surface of the semiconductor layer, said portions defining the channel, while maintaining the continuous epitaxial semiconductor layer across the entirety of the well region and terminal region at the surface of the semiconductor layer. providing a terminal region of a first conductivity type within a semiconductor layer of the first conductivity type at a surface of the semiconductor layer; providing a well region of a second conductivity type within the semiconductor layer wherein the well region is adjacent at least a portion of the terminal region within the semiconductor layer, wherein a depth of the well region into the semiconductor layer is greater than a depth of the terminal region into the semiconductor layer, and wherein the first and second conductivity types are different; after providing the well region and the terminal region, providing a continuous epitaxial semiconductor layer on the semiconductor layer, wherein the continuous epitaxial semiconductor layer has opposing first and second surfaces, wherein the first surface is adjacent the semiconductor layer, and wherein the second surface is remote from the semiconductor layer so that the first surface is between the second surface and the semiconductor layer and wherein the continuous epitaxial semiconductor layer extends across an entirety of the well region and terminal region at a surface of the semiconductor layer; after forming the continuous epitaxial semiconductor layer, providing a terminal contact region of the first conductivity type in and extending through the continuous epitaxial semiconductor layer, wherein the terminal contact region provides electrical contact with the terminal region, and wherein an outermost edge of the terminal contact region is set back from an outer edge of the terminal region around a perimeter of the terminal region in a direction parallel to a surface of the semiconductor layer; providing an ohmic contact on the terminal contact region; providing a gate insulating layer on the continuous epitaxial semiconductor layer opposite a channel; and providing a gate electrode on the gate insulating layer opposite the channel so that the continuous epitaxial semiconductor layer is between the gate electrode and portions of the well region surrounding the terminal region at the surface of the semiconductor layer, said portions defining the channel, while maintaining the continuous epitaxial semiconductor layer across the entirety of the well region and terminal region at the surface of the semiconductor layer.