A magnetic article proximity detector comprising: (a) a magnetic field sensor providing a Vsig voltage proportional to a magnetic field; (b) a comparator for comparing said Vsig voltage to a threshold voltage to generate a detector output voltage that becomes a first binary level when said Vsig voltage exceeds said threshold voltage and a second binary level when said Vsig voltage falls to below said threshold voltage; and (c) a threshold voltage generator operative to generate said threshold voltage, characterised in that said threshold voltage generator comprises: (i) a first counter responsive to said Vsig voltage for providing a first count signal; (ii) a first digital-to-analog converter coupled to said first counter for converting said first count signal into a PDAC voltage which, for each transition of said detector output voltage from said second binary level to said first binary level, decreases for a first interval beginning at said transition and ending when said PDAC voltage reaches said Vsig voltage, and increases for a second interval beginning at the end of said first interval and ending when said Vsig voltage reaches the next positive peak; (iii) a second counter responsive to said Vsig voltage for providing a second count signal; and (iv) a second digital-to-analog converter coupled to said second counter for converting said second count signal into an NDAC voltage which, for each transition of said detector output voltage from said first binary level to said second binary level, increases for a third interval beginning at said transition and ending when said NDAC voltage reaches said Vsig voltage, and decreases for a fourth interval beginning at the end of said third interval and ending when said Vsig voltage reaches the next negative peak. (a) a magnetic field sensor providing a Vsig voltage proportional to a magnetic field; (b) a comparator for comparing said Vsig voltage to a threshold voltage to generate a detector output voltage that becomes a first binary level when said Vsig voltage exceeds said threshold voltage and a second binary level when said Vsig voltage falls to below said threshold voltage; and (c) a threshold voltage generator operative to generate said threshold voltage, characterised in that said threshold voltage generator comprises: (i) a first counter responsive to said Vsig voltage for providing a first count signal; (ii) a first digital-to-analog converter coupled to said first counter for converting said first count signal into a PDAC voltage which, for each transition of said detector output voltage from said second binary level to said first binary level, decreases for a first interval beginning at said transition and ending when said PDAC voltage reaches said Vsig voltage, and increases for a second interval beginning at the end of said first interval and ending when said Vsig voltage reaches the next positive peak; (iii) a second counter responsive to said Vsig voltage for providing a second count signal; and (iv) a second digital-to-analog converter coupled to said second counter for converting said second count signal into an NDAC voltage which, for each transition of said detector output voltage from said first binary level to said second binary level, increases for a third interval beginning at said transition and ending when said NDAC voltage reaches said Vsig voltage, and decreases for a fourth interval beginning at the end of said third interval and ending when said Vsig voltage reaches the next negative peak. (i) a first counter responsive to said Vsig voltage for providing a first count signal; (ii) a first digital-to-analog converter coupled to said first counter for converting said first count signal into a PDAC voltage which, for each transition of said detector output voltage from said second binary level to said first binary level, decreases for a first interval beginning at said transition and ending when said PDAC voltage reaches said Vsig voltage, and increases for a second interval beginning at the end of said first interval and ending when said Vsig voltage reaches the next positive peak; (iii) a second counter responsive to said Vsig voltage for providing a second count signal; and (iv) a second digital-to-analog converter coupled to said second counter for converting said second count signal into an NDAC voltage which, for each transition of said detector output voltage from said first binary level to said second binary level, increases for a third interval beginning at said transition and ending when said NDAC voltage reaches said Vsig voltage, and decreases for a fourth interval beginning at the end of said third interval and ending when said Vsig voltage reaches the next negative peak.