A viterbi decoding apparatus for decoding convolution codes, the apparatus including a path memory circuit comprising: a memory unit that stores one of two paths toward respective transition states of a convolution code, as a selected path, for a plurality of continuous time points; a tracing unit that traces a selected path stored in the path memory unit in a reversed-time direction, thereby decoding a convolution code at respective time points, each of the time points being prior to a predetermined trace-skipping period; and a control unit that controls the path memory unit; wherein the memory unit has a storage area adapted to store selected paths assuming respective transition states at respective time points, the storage area being divided into two sub-areas, the two sub-areas being a higher-order region and a low-order region, where the higher-order region stores a selected path in a high-order transision state which is any state in which the least significant bit of a bit train that represents the transition state of the convolution code is 1 and the lower-order region stores a selected path in a low-order transision state which is any state in which the least significant bit of a bit train that represents the transition state of the convolution code is 0 and wherein each of the sub-areas having a predetermined number of bits, and reading of data can be stopped for each sub-area; and the control unit designates a sub-area from which no selected path needs to be read at respective time points so as to stop the reading of data from the designated sub-area, and is operable to store the selected paths in either the higher-order region or the lower-order region, wherein the selected paths whose least significant bit is a 1 are stored in the high-order region and the selected paths whose least significant bit is a 0 are stored in the low-order region. a memory unit that stores one of two paths toward respective transition states of a convolution code, as a selected path, for a plurality of continuous time points; a tracing unit that traces a selected path stored in the path memory unit in a reversed-time direction, thereby decoding a convolution code at respective time points, each of the time points being prior to a predetermined trace-skipping period; and a control unit that controls the path memory unit; wherein the memory unit has a storage area adapted to store selected paths assuming respective transition states at respective time points, the storage area being divided into two sub-areas, the two sub-areas being a higher-order region and a low-order region, where the higher-order region stores a selected path in a high-order transision state which is any state in which the least significant bit of a bit train that represents the transition state of the convolution code is 1 and the lower-order region stores a selected path in a low-order transision state which is any state in which the least significant bit of a bit train that represents the transition state of the convolution code is 0 and wherein each of the sub-areas having a predetermined number of bits, and reading of data can be stopped for each sub-area; and the control unit designates a sub-area from which no selected path needs to be read at respective time points so as to stop the reading of data from the designated sub-area, and is operable to store the selected paths in either the higher-order region or the lower-order region, wherein the selected paths whose least significant bit is a 1 are stored in the high-order region and the selected paths whose least significant bit is a 0 are stored in the low-order region.