A pixel driving circuit, comprising: a data line (Data) for supplying a data voltage, a gate line (Gate) for supplying a scan voltage, a first power supply line (ELVDD) for supplying a first power supply voltage, a second power supply line (ELVSS) for supplying a second power supply voltage, a reference signal line (ref) for supplying a reference voltage, a light emitting device, a driving transistor, a storage capacitor, a reset unit, a data writing unit, a compensating unit and a light emitting control unit; the reset unit is connected to the reference signal line (ref) and the storage capacitor, and is configured to reset a voltage across the storage capacitor to a predefined signal voltage, the data writing unit is connected to the gate line (Gate), the data line (Data) and a second terminal of the storage capacitor, and is configured to write information including a data voltage into the second terminal of the storage capacitor, the compensating unit is connected to the gate line (Gate), a first terminal of the storage capacitor and the drain of the driving transistor, and is configured to write information including a threshold voltage of the driving transistor and an information of the first power supply voltage into the first terminal of the storage capacitor, the light emitting control unit is connected to the reference signal line (ref), the second terminal of the storage capacitor, the driving transistor and the light emitting device, and is configured to write the reference voltage into the second terminal of the storage capacitor and control the driving transistor to drive the light emitting device to emit light, the first terminal of the storage capacitor is connected to a gate of the driving transistor, and the storage capacitor is configured to transfer the information including the data voltage into the gate of the driving transistor, and the driving transistor is connected to the first power supply line (ELVDD), a first terminal of the light emitting device is connected to the second power supply line (ELVSS), and the driving transistor is configured to control an amplitude of a current flowing through the light emitting device according to the information including the data voltage, the threshold voltage of the driving transistor, the reference voltage and the first power supply voltage under the control of the light emitting control unit, wherein, the reset unit comprises a reset control line (Reset), a reset signal line (ini), a first transistor and a second transistor, the first transistor has a gate connected to the reset control line (Reset) and a source connected to the reset signal line (ini); the second transistor has a gate connected to the reset control line (Reset) and a source connected the reference signal line (ref), wherein, the first transistor has a drain connected to the first terminal of the storage capacitor, and is configured to write a voltage on the reset signal line (ini) into the first terminal of the storage capacitor, the second transistor has a drain connected to the second terminal of the storage capacitor, and is configured to write the reference voltage into the second terminal of the storage capacitor, the reference signal line (ref) is separate from the first power supply line (ELVDD), the light emitting control unit comprises a light emitting control line, a fifth transistor and a sixth transistor, wherein the fifth transistor has a gate connected to the light emitting control line, a source connected to the reference signal line (ref) and the source of the second transistor, and a drain connected to the second terminal of the storage capacitor, and is configured to write the reference voltage supplied by the reference signal line (ref) into the second terminal of the storage capacitor such that the storage capacitor transfers the reference voltage to the gate of the driving transistor, and the sixth transistor has a gate connected to the light emitting control line, a source connected to the drain of the driving transistor and a drain connected to the second terminal of the light emitting device and is configured to control the light emitting device to emit light, the driving transistor is configured to control the amplitude of the current flowing through the light emitting device according to the information including the data voltage, the threshold voltage of the driving transistor, the first power supply voltage and the reference voltage under the control of the light emitting control unit, and wherein the reference voltage is a high level voltage and the voltage on the reset signal line is a low level (Vint) such that the light emitting control unit writes the high level voltage into the second terminal of the storage capacitor during a light emitting period.