A semiconductor device including a semiconductor substrate having an upper main surface and a lower main surface, said semiconductor substrate including: a drain layer of a first conductivity type formed in said upper main surface; a main base region of a second conductivity type selectively formed in said drain layer to be shallower than said drain layer and exposed to said upper main surface, said main base region having a projection protruded selectively toward said lower main surface at a bottom face; an underpad base region of a second conductivity type selectively formed in said drain layer to be shallower than said drain layer, exposed to said upper main surface and isolated from said main base region; and a source region of a first conductivity type selectively formed in said main base region to be shallower than said main base region and exposed to said upper main surface, said semiconductor device further comprising: a first main electrode connected to said main base region and said source region and not connected to said underpad base region; a gate electrode opposed to a channel region in said main base region interposed between said drain layer and said source region with a gate insulating film provided therebetween; a conductive gate pad opposed to an exposed surface of said underpad base region in said upper main surface with an insulating layer interposed therebetween and connected to said gate electrode; and a second main electrode connected to said lower main surface, characterized in that the semiconductor device further comprises a conductive layer buried in said insulating layer to be opposed to said main upper surface in a position closer to said upper main surface than said conductive gate pad, wherein said conductive layer extends to reach a portion provided above said main base region. a drain layer of a first conductivity type formed in said upper main surface; a main base region of a second conductivity type selectively formed in said drain layer to be shallower than said drain layer and exposed to said upper main surface, said main base region having a projection protruded selectively toward said lower main surface at a bottom face; an underpad base region of a second conductivity type selectively formed in said drain layer to be shallower than said drain layer, exposed to said upper main surface and isolated from said main base region; and a source region of a first conductivity type selectively formed in said main base region to be shallower than said main base region and exposed to said upper main surface, said semiconductor device further comprising: a first main electrode connected to said main base region and said source region and not connected to said underpad base region; a gate electrode opposed to a channel region in said main base region interposed between said drain layer and said source region with a gate insulating film provided therebetween; a conductive gate pad opposed to an exposed surface of said underpad base region in said upper main surface with an insulating layer interposed therebetween and connected to said gate electrode; and a second main electrode connected to said lower main surface, characterized in that the semiconductor device further comprises a conductive layer buried in said insulating layer to be opposed to said main upper surface in a position closer to said upper main surface than said conductive gate pad, wherein said conductive layer extends to reach a portion provided above said main base region. a first main electrode connected to said main base region and said source region and not connected to said underpad base region; a gate electrode opposed to a channel region in said main base region interposed between said drain layer and said source region with a gate insulating film provided therebetween; a conductive gate pad opposed to an exposed surface of said underpad base region in said upper main surface with an insulating layer interposed therebetween and connected to said gate electrode; and a second main electrode connected to said lower main surface, characterized in that the semiconductor device further comprises a conductive layer buried in said insulating layer to be opposed to said main upper surface in a position closer to said upper main surface than said conductive gate pad, wherein said conductive layer extends to reach a portion provided above said main base region.