A device, comprising: a Doherty amplifier having a carrier path and a peaking path, the carrier path including: a carrier amplifier configured to amplify a signal received from an input to the Doherty amplifier, the carrier amplifier having only a single output, an output pre-match circuit connected directly to the single output of the carrier amplifier, the output pre-match circuit exhibiting a phase delay, an output matching network connected directly to an output of the output pre-match circuit, the output matching network exhibiting a phase delay during operation of the Doherty amplifier, and a phase advance network connected directly to the output matching network and an output node of the Doherty amplifier, the phase advance network exhibiting a phase advance configured to offset at least a portion of the phase delay of the output pre-match circuit and the output matching network, wherein the phase advance network includes a high-pass filter, wherein a combination of the phase delay of the output pre-match circuit, the phase delay of the output matching network and the phase delay of the phase advance network results in a phase advance on the carrier path of 90 degrees; and the peaking path including a peaking amplifier and a further output matching network; a power divider, wherein the carrier amplifier is connected directly to a first output of the power divider, and the peaking amplifier is connected directly to a second output of the power divider; and wherein the output node connects the phase advance network of the carrier path and the further output matching network of the peaking path. a Doherty amplifier having a carrier path and a peaking path, the carrier path including: a carrier amplifier configured to amplify a signal received from an input to the Doherty amplifier, the carrier amplifier having only a single output, an output pre-match circuit connected directly to the single output of the carrier amplifier, the output pre-match circuit exhibiting a phase delay, an output matching network connected directly to an output of the output pre-match circuit, the output matching network exhibiting a phase delay during operation of the Doherty amplifier, and a phase advance network connected directly to the output matching network and an output node of the Doherty amplifier, the phase advance network exhibiting a phase advance configured to offset at least a portion of the phase delay of the output pre-match circuit and the output matching network, wherein the phase advance network includes a high-pass filter, wherein a combination of the phase delay of the output pre-match circuit, the phase delay of the output matching network and the phase delay of the phase advance network results in a phase advance on the carrier path of 90 degrees; and the peaking path including a peaking amplifier and a further output matching network; the carrier path including: a carrier amplifier configured to amplify a signal received from an input to the Doherty amplifier, the carrier amplifier having only a single output, an output pre-match circuit connected directly to the single output of the carrier amplifier, the output pre-match circuit exhibiting a phase delay, an output matching network connected directly to an output of the output pre-match circuit, the output matching network exhibiting a phase delay during operation of the Doherty amplifier, and a phase advance network connected directly to the output matching network and an output node of the Doherty amplifier, the phase advance network exhibiting a phase advance configured to offset at least a portion of the phase delay of the output pre-match circuit and the output matching network, wherein the phase advance network includes a high-pass filter, wherein a combination of the phase delay of the output pre-match circuit, the phase delay of the output matching network and the phase delay of the phase advance network results in a phase advance on the carrier path of 90 degrees; and a carrier amplifier configured to amplify a signal received from an input to the Doherty amplifier, the carrier amplifier having only a single output, an output pre-match circuit connected directly to the single output of the carrier amplifier, the output pre-match circuit exhibiting a phase delay, an output matching network connected directly to an output of the output pre-match circuit, the output matching network exhibiting a phase delay during operation of the Doherty amplifier, and a phase advance network connected directly to the output matching network and an output node of the Doherty amplifier, the phase advance network exhibiting a phase advance configured to offset at least a portion of the phase delay of the output pre-match circuit and the output matching network, wherein the phase advance network includes a high-pass filter, wherein a combination of the phase delay of the output pre-match circuit, the phase delay of the output matching network and the phase delay of the phase advance network results in a phase advance on the carrier path of 90 degrees; and the peaking path including a peaking amplifier and a further output matching network; a power divider, wherein the carrier amplifier is connected directly to a first output of the power divider, and the peaking amplifier is connected directly to a second output of the power divider; and wherein the output node connects the phase advance network of the carrier path and the further output matching network of the peaking path.