A channel estimation circuit, characterized in that, the channel estimation circuit comprises: a signal recovery circuit receiving an input signal (Sin) and generating a recovery signal (Sr) as a transmission signal (Str) corresponding to the input signal (Sin); a channel estimator coupled to the signal recovery circuit and including: a divider receiving the input signal (Sin) and the transmission signal (Str), and outputting a division signal; a first equalizer receiving the input signal (Sin) and outputting a first equalization signal (Seq_1); a comparator receiving the first equalization signal (Seq_1) and the transmission signal (Str) for calculating a difference between the first equalization signal (Seq_1) and the transmission signal (Str), and comparing the difference with a threshold value for outputting a comparison result (Scomp); and an output circuit receiving the division signal and outputting an estimation signal (Sls) according to the comparison result (Scomp), wherein the division signal is output as the estimation signal (Sls) when the comparison result (Scomp) showing that the difference is smaller than the threshold value; a time domain filter coupled to the channel estimator and performing time domain filtering on the estimation signal (Sls); and a frequency domain filter coupled to the time domain filter and performing frequency domain filtering on the estimation signal (Sls) filtered by the time domain filter, so as to generate a channel estimation result; wherein the channel estimation result is transmitted to the first equalizer and the signal recovery circuit, the first equalizer generates the first equalization signal (Seq_1) according to the input signal (Sin) and the channel estimation result, and the signal recovery circuit generates the recovery signal (Sr) according to the input signal (Sin) and the channel estimation result; wherein the channel estimator further includes: a register coupled to the output circuit and storing the estimation signal (Sls) outputted by the output circuit; wherein when the comparison result (Scomp) shows that the difference is greater than or equal to the threshold value, the output circuit outputs the estimation signal (Sls) stored by the register. a signal recovery circuit receiving an input signal (Sin) and generating a recovery signal (Sr) as a transmission signal (Str) corresponding to the input signal (Sin); a channel estimator coupled to the signal recovery circuit and including: a divider receiving the input signal (Sin) and the transmission signal (Str), and outputting a division signal; a first equalizer receiving the input signal (Sin) and outputting a first equalization signal (Seq_1); a comparator receiving the first equalization signal (Seq_1) and the transmission signal (Str) for calculating a difference between the first equalization signal (Seq_1) and the transmission signal (Str), and comparing the difference with a threshold value for outputting a comparison result (Scomp); and an output circuit receiving the division signal and outputting an estimation signal (Sls) according to the comparison result (Scomp), wherein the division signal is output as the estimation signal (Sls) when the comparison result (Scomp) showing that the difference is smaller than the threshold value; a divider receiving the input signal (Sin) and the transmission signal (Str), and outputting a division signal; a first equalizer receiving the input signal (Sin) and outputting a first equalization signal (Seq_1); a comparator receiving the first equalization signal (Seq_1) and the transmission signal (Str) for calculating a difference between the first equalization signal (Seq_1) and the transmission signal (Str), and comparing the difference with a threshold value for outputting a comparison result (Scomp); and an output circuit receiving the division signal and outputting an estimation signal (Sls) according to the comparison result (Scomp), wherein the division signal is output as the estimation signal (Sls) when the comparison result (Scomp) showing that the difference is smaller than the threshold value; a time domain filter coupled to the channel estimator and performing time domain filtering on the estimation signal (Sls); and a frequency domain filter coupled to the time domain filter and performing frequency domain filtering on the estimation signal (Sls) filtered by the time domain filter, so as to generate a channel estimation result; wherein the channel estimation result is transmitted to the first equalizer and the signal recovery circuit, the first equalizer generates the first equalization signal (Seq_1) according to the input signal (Sin) and the channel estimation result, and the signal recovery circuit generates the recovery signal (Sr) according to the input signal (Sin) and the channel estimation result; wherein the channel estimator further includes: a register coupled to the output circuit and storing the estimation signal (Sls) outputted by the output circuit; wherein when the comparison result (Scomp) shows that the difference is greater than or equal to the threshold value, the output circuit outputs the estimation signal (Sls) stored by the register. a register coupled to the output circuit and storing the estimation signal (Sls) outputted by the output circuit; wherein when the comparison result (Scomp) shows that the difference is greater than or equal to the threshold value, the output circuit outputs the estimation signal (Sls) stored by the register.