A clock regeneration circuit for sampling a demodulated signal with an amplitude corresponding to a deviation in frequency or phase of modulated waves, at a predetermined symbol point, and regenerating a symbol clock defining a timing of the sampling, so as to regenerate demodulated data from an amplitude value of obtained symbol data, comprising: a timer operable to generate the symbol clock; an oversampling section (29, 30) operable to oversample the demodulated signal at a frequency higher than the symbol clock; a calculation section (336-1, 336-2, 336-3) operable to calculate a difference value from an ideal amplitude level to be obtained at the predetermined symbol point, for each of a first to third symbol data at each of a first to third measurement points, the second measurement point being the predetermined symbol point, the first measurement point being on delay side with respect to the predetermined symbol point, the third measurement point being on advance side with respect to the predetermined symbol point, among a plurality of symbol data at a plurality of measurement points obtained by the oversampling; characterized in that the clock regeneration circuit further comprises: a selection section operable to compare a first difference value for the first symbol data at the first measurement point with a third difference value for the third symbol data at the third measurement point, and to select one of the first and third measurement points, the selected measurement point being smaller than the other measurement point in terms of the difference value; and a timing correction section causing the timer to shift a sampling timing at the predetermined symbol point in a next cycle, toward the selected measurement point selected by the selection section, by a time corresponding to a second difference value for the second symbol data. a timer operable to generate the symbol clock; an oversampling section (29, 30) operable to oversample the demodulated signal at a frequency higher than the symbol clock; a calculation section (336-1, 336-2, 336-3) operable to calculate a difference value from an ideal amplitude level to be obtained at the predetermined symbol point, for each of a first to third symbol data at each of a first to third measurement points, the second measurement point being the predetermined symbol point, the first measurement point being on delay side with respect to the predetermined symbol point, the third measurement point being on advance side with respect to the predetermined symbol point, among a plurality of symbol data at a plurality of measurement points obtained by the oversampling; characterized in that the clock regeneration circuit further comprises: a selection section operable to compare a first difference value for the first symbol data at the first measurement point with a third difference value for the third symbol data at the third measurement point, and to select one of the first and third measurement points, the selected measurement point being smaller than the other measurement point in terms of the difference value; and a timing correction section causing the timer to shift a sampling timing at the predetermined symbol point in a next cycle, toward the selected measurement point selected by the selection section, by a time corresponding to a second difference value for the second symbol data. a selection section operable to compare a first difference value for the first symbol data at the first measurement point with a third difference value for the third symbol data at the third measurement point, and to select one of the first and third measurement points, the selected measurement point being smaller than the other measurement point in terms of the difference value; and a timing correction section causing the timer to shift a sampling timing at the predetermined symbol point in a next cycle, toward the selected measurement point selected by the selection section, by a time corresponding to a second difference value for the second symbol data.