A stage of a shift register, the stage including: a voltage shifting module, a voltage inverting module, a voltage complementing module, a voltage shifting control module, a first output terminal and a second output terminal; wherein the voltage shifting module is configured to receive a voltage non-inverted to a startup voltage under the control of a first clock signal and output the received voltage non-inverted to the startup voltage from the second output terminal and simultaneously to the voltage inverting module under the control of a second clock signal; the voltage inverting module is connected to the voltage shifting module and is configured to output a voltage inverse to the startup voltage from the first output terminal and simultaneously to the voltage complementing module under the control of the received voltage outputted from the voltage shifting module and a voltage supplied from an inverse voltage source; and to output the voltage non-inverted to the startup voltage from the first output terminal and simultaneously to the voltage complementing module under the control of the first clock signal and a voltage supplied from a startup voltage source or under the control of a third clock signal and the voltage supplied from the startup voltage source; the voltage complementing module is connected to the voltage inverting module and the voltage shifting module, and is configured to output the voltage inverse to the startup voltage from the second output terminal and simultaneously to the voltage inverting module under the control of the received voltage outputted from the voltage inverting module and the voltage supplied from the inverse voltage source, when the voltage inverting module outputs the voltage non-inverted to the startup voltage; and the voltage shifting control module is connected to the voltage shifting module, and is configured to control to turn off the voltage shifting module under the control of the third clock signal and the voltage supplied from the inverse voltage source, wherein the stage of the shift register is configured to delay the startup voltage and simultaneously output the delayed startup voltage at the second output terminal and the voltage inverse to the delayed startup voltage at the first output terminal. a voltage shifting module, a voltage inverting module, a voltage complementing module, a voltage shifting control module, a first output terminal and a second output terminal; wherein the voltage shifting module is configured to receive a voltage non-inverted to a startup voltage under the control of a first clock signal and output the received voltage non-inverted to the startup voltage from the second output terminal and simultaneously to the voltage inverting module under the control of a second clock signal; the voltage inverting module is connected to the voltage shifting module and is configured to output a voltage inverse to the startup voltage from the first output terminal and simultaneously to the voltage complementing module under the control of the received voltage outputted from the voltage shifting module and a voltage supplied from an inverse voltage source; and to output the voltage non-inverted to the startup voltage from the first output terminal and simultaneously to the voltage complementing module under the control of the first clock signal and a voltage supplied from a startup voltage source or under the control of a third clock signal and the voltage supplied from the startup voltage source; the voltage complementing module is connected to the voltage inverting module and the voltage shifting module, and is configured to output the voltage inverse to the startup voltage from the second output terminal and simultaneously to the voltage inverting module under the control of the received voltage outputted from the voltage inverting module and the voltage supplied from the inverse voltage source, when the voltage inverting module outputs the voltage non-inverted to the startup voltage; and the voltage shifting control module is connected to the voltage shifting module, and is configured to control to turn off the voltage shifting module under the control of the third clock signal and the voltage supplied from the inverse voltage source,