A microcontroller comprising: a processor; a plurality of peripherals (18, 20, 22, 24, 26); a programmable peripheral interconnect; an event-generating unit; and a memory, storing software, wherein: the event-generating unit comprises an event-generating register (61, 63, 66), addressable by the processor; the event-generating unit is connected to the programmable peripheral interconnect; and the event-generating unit is arranged to detect a predetermined change to the contents of the event-generating register and, in response to detecting such a predetermined change, to signal an event to the programmable peripheral interconnect; each of the peripherals is connected to the programmable peripheral interconnect; each of the peripherals is configured to respond to a task signal from the programmable peripheral interconnect by performing a respective task; the programmable peripheral interconnect is configured to access a mapping memory in which a plurality of mappings can be stored, each mapping an event of the event-generating unit to a task of one of the peripherals; and the programmable peripheral interconnect is configured so that, when a mapping is stored in the mapping memory from an event of the event-generating unit to a task of one of the peripherals, the programmable peripheral interconnect will respond to a signal of the event from the event-generating unit by sending a task signal to the peripheral; characterised in that: the programmable peripheral interconnect is configured so that, when the mapping memory stores mappings from one event of the event-generating unit to two or more different tasks, the programmable peripheral interconnect will send the two or more respective task signals within a predetermined maximum time from receiving a signal of the event; the software comprises instructions, executable by the processor, to i) store, in the mapping memory, mappings from one event of the event-generating unit to at least two different peripheral tasks, and ii) make said predetermined change to the contents of the event-generating register; and the event-generating unit does not comprise a timing mechanism; has no inputs other than a clock input, one or more registers, and zero or more task lines; and has no outputs other than one or more event lines to the programmable peripheral interconnect, zero or more interrupt lines to the processor, and zero or more output registers. a processor; a plurality of peripherals (18, 20, 22, 24, 26); a programmable peripheral interconnect; an event-generating unit; and a memory, storing software, the event-generating unit comprises an event-generating register (61, 63, 66), addressable by the processor; the event-generating unit is connected to the programmable peripheral interconnect; and the event-generating unit is arranged to detect a predetermined change to the contents of the event-generating register and, in response to detecting such a predetermined change, to signal an event to the programmable peripheral interconnect; each of the peripherals is connected to the programmable peripheral interconnect; each of the peripherals is configured to respond to a task signal from the programmable peripheral interconnect by performing a respective task; the programmable peripheral interconnect is configured to access a mapping memory in which a plurality of mappings can be stored, each mapping an event of the event-generating unit to a task of one of the peripherals; and the programmable peripheral interconnect is configured so that, when a mapping is stored in the mapping memory from an event of the event-generating unit to a task of one of the peripherals, the programmable peripheral interconnect will respond to a signal of the event from the event-generating unit by sending a task signal to the peripheral; the programmable peripheral interconnect is configured so that, when the mapping memory stores mappings from one event of the event-generating unit to two or more different tasks, the programmable peripheral interconnect will send the two or more respective task signals within a predetermined maximum time from receiving a signal of the event; the software comprises instructions, executable by the processor, to i) store, in the mapping memory, mappings from one event of the event-generating unit to at least two different peripheral tasks, and ii) make said predetermined change to the contents of the event-generating register; and the event-generating unit does not comprise a timing mechanism; has no inputs other than a clock input, one or more registers, and zero or more task lines; and has no outputs other than one or more event lines to the programmable peripheral interconnect, zero or more interrupt lines to the processor, and zero or more output registers.