A method of forming a semiconductor structure, the method comprising: forming at least one electrical device (102, 104, 106, 302, 304, 306) in a substrate; forming one or more intermediate metal layers (110, 318) between a top metal layer 112, 328) and the substrate, the one or more intermediate metal layers and the top metal layer separated from each with respective portions of insulating material (122, 328), wherein forming one or more intermediate metal layers includes patterning the one or more intermediate metal layers to form one or more conductor lines; forming a passivation layer (132, 332) over the top metal layer; characterized by forming a bond pad (130, 330) on a surface of the top metal layer by patterning the passivation layer to expose a portion of the top metal layer, the exposed portion of the top metal layer being the bond pad, wherein the at least one electrical device and the one or more conductor lines are located directly under the bond pad; forming one or more gaps (124, 322) in the underlying conductor line closest to the top metal layer (112, 328); and wherein the one or more conductor lines directly underlying the bond pad are electrically isolated from the bond pad by the insulating material; wherein the respective portion of the insulating material located between the bond pad and the underlying conductor line closest to the top metal layer is relatively thicker than the remaining portions of insulating material separating the conductor lines from each other or the underlying electrical device; wherein each one of the one or more gaps (124, 322) in the underlying conductor line closest to the top metal layer (112, 328) is filled with the relatively thicker insulating material (122, 328) to strengthen the semiconductor structure by forming a pillar of hard oxide. forming at least one electrical device (102, 104, 106, 302, 304, 306) in a substrate; forming one or more intermediate metal layers (110, 318) between a top metal layer 112, 328) and the substrate, the one or more intermediate metal layers and the top metal layer separated from each with respective portions of insulating material (122, 328), wherein forming one or more intermediate metal layers includes patterning the one or more intermediate metal layers to form one or more conductor lines; forming a passivation layer (132, 332) over the top metal layer; characterized by forming a bond pad (130, 330) on a surface of the top metal layer by patterning the passivation layer to expose a portion of the top metal layer, the exposed portion of the top metal layer being the bond pad, wherein the at least one electrical device and the one or more conductor lines are located directly under the bond pad; forming one or more gaps (124, 322) in the underlying conductor line closest to the top metal layer (112, 328); and wherein the one or more conductor lines directly underlying the bond pad are electrically isolated from the bond pad by the insulating material; wherein the respective portion of the insulating material located between the bond pad and the underlying conductor line closest to the top metal layer is relatively thicker than the remaining portions of insulating material separating the conductor lines from each other or the underlying electrical device; wherein each one of the one or more gaps (124, 322) in the underlying conductor line closest to the top metal layer (112, 328) is filled with the relatively thicker insulating material (122, 328) to strengthen the semiconductor structure by forming a pillar of hard oxide.