A capacitance sensing circuit, configured to sense a detection capacitor in a detection circuit comprising: a front-end circuit adapted to be coupled to the detection circuit, wherein the front-end circuit comprises at least one active component; a capacitance judging circuit; a first subtracting and summing circuit (104, 204, 304, 704_a,, 804) coupled between the front-end circuit and the capacitance judging circuit of the capacitance sensing circuit, wherein the first subtracting and summing circuit (104, 204, 304, 704_a, 804) is configured to generate a first output signal (V OUT, V OUT1) according to a first input signal (VIN, VIN1), and the first subtracting and summing circuit (104, 204, 304, 704_a,, 804) comprises: at least one subtracting unit (140, 240, 340, 840, 940-1, 940-2), configured to generate at least one first subtracting signal (V Δ, V Δ1, V Δ2) according to a first signal (V S); at least one summing unit (142, 242, 342, 842, 942-1, 942-2), coupled to the at least one subtracting unit (140, 240, 340, 840, 940-1, 940-2) of the first subtracting and summing circuit, and configured to generate at least one first summing signal (V SUM, V SUM1, V SUM2) according to the at least one first subtracting signal; an analog -to-digital converter, coupled between the at least one summing unit (142, 242, 342, 842, 942-1, 942-2) of the first subtracting and summing circuit and the capacitance judging circuit, and configured to generate the first output signal; and a digital-to-analog converter, coupled between the analog -to-digital converter and the at least one subtracting unit (140, 240, 340, 840, 940-1, 940-2) of the first subtracting and summing circuit, and configured to convert the first output signal (V OUT, V OUT1) into the first signal; and the capacitance judging circuit configured to judge a capacitance change of the detection capacitor according to the first output signal. a front-end circuit adapted to be coupled to the detection circuit, wherein the front-end circuit comprises at least one active component; a capacitance judging circuit; a first subtracting and summing circuit (104, 204, 304, 704_a,, 804) coupled between the front-end circuit and the capacitance judging circuit of the capacitance sensing circuit, wherein the first subtracting and summing circuit (104, 204, 304, 704_a, 804) is configured to generate a first output signal (V OUT, V OUT1) according to a first input signal (VIN, VIN1), and the first subtracting and summing circuit (104, 204, 304, 704_a,, 804) comprises: at least one subtracting unit (140, 240, 340, 840, 940-1, 940-2), configured to generate at least one first subtracting signal (V Δ, V Δ1, V Δ2) according to a first signal (V S); at least one summing unit (142, 242, 342, 842, 942-1, 942-2), coupled to the at least one subtracting unit (140, 240, 340, 840, 940-1, 940-2) of the first subtracting and summing circuit, and configured to generate at least one first summing signal (V SUM, V SUM1, V SUM2) according to the at least one first subtracting signal; an analog -to-digital converter, coupled between the at least one summing unit (142, 242, 342, 842, 942-1, 942-2) of the first subtracting and summing circuit and the capacitance judging circuit, and configured to generate the first output signal; and a digital-to-analog converter, coupled between the analog -to-digital converter and the at least one subtracting unit (140, 240, 340, 840, 940-1, 940-2) of the first subtracting and summing circuit, and configured to convert the first output signal (V OUT, V OUT1) into the first signal; and the capacitance judging circuit configured to judge a capacitance change of the detection capacitor according to the first output signal. at least one subtracting unit (140, 240, 340, 840, 940-1, 940-2), configured to generate at least one first subtracting signal (V Δ, V Δ1, V Δ2) according to a first signal (V S); at least one summing unit (142, 242, 342, 842, 942-1, 942-2), coupled to the at least one subtracting unit (140, 240, 340, 840, 940-1, 940-2) of the first subtracting and summing circuit, and configured to generate at least one first summing signal (V SUM, V SUM1, V SUM2) according to the at least one first subtracting signal; an analog -to-digital converter, coupled between the at least one summing unit (142, 242, 342, 842, 942-1, 942-2) of the first subtracting and summing circuit and the capacitance judging circuit, and configured to generate the first output signal; and a digital-to-analog converter, coupled between the analog -to-digital converter and the at least one subtracting unit (140, 240, 340, 840, 940-1, 940-2) of the first subtracting and summing circuit, and configured to convert the first output signal (V OUT, V OUT1) into the first signal; and the capacitance judging circuit configured to judge a capacitance change of the detection capacitor according to the first output signal.