An insulated gate semiconductor device comprising: a first-conduction-type drift layer that is a semiconductor substrate; a second-conduction-type base region that is selectively formed on one main surface of the first-conduction-type drift layer; a first-conduction-type emitter region that is selectively formed in a surface of the second-conduction-type base region; a second-conduction-type semiconductor layer that is formed on the other main surface of the first-conduction-type drift layer; a plurality of trenches that have a depth greater than that of the second-conduction-type base region from the surface of the first-conduction-type emitter region and have a parallel-stripe-shaped planar pattern along a longitudinal direction of the first-conduction-type emitter region; and a gate electrode that is filled in each of the plurality of trenches with an insulating film interposed therebetween, a plurality of surface regions selectively formed on one main surface of the first-conduction-type drift layer, said plurality of surface regions being interposed between the plurality of trenches and comprising in the surface thereof second-conduction-type floating regions that are electrically insulated from an emitter electrode and are alternately arranged together with the second-conduction-type base region and the first-conduction-type emitter region which come into conductive contact with the emitter electrode, and wherein the second-conduction-type floating region of the surface regions extends deeper than the trench, characterized in that the second-conduction-type floating region has a lower impurity concentration than the second-conduction-type base region. a first-conduction-type drift layer that is a semiconductor substrate; a second-conduction-type base region that is selectively formed on one main surface of the first-conduction-type drift layer; a first-conduction-type emitter region that is selectively formed in a surface of the second-conduction-type base region; a second-conduction-type semiconductor layer that is formed on the other main surface of the first-conduction-type drift layer; a plurality of trenches that have a depth greater than that of the second-conduction-type base region from the surface of the first-conduction-type emitter region and have a parallel-stripe-shaped planar pattern along a longitudinal direction of the first-conduction-type emitter region; and a gate electrode that is filled in each of the plurality of trenches with an insulating film interposed therebetween, a plurality of surface regions selectively formed on one main surface of the first-conduction-type drift layer, said plurality of surface regions being interposed between the plurality of trenches and comprising in the surface thereof second-conduction-type floating regions that are electrically insulated from an emitter electrode and are alternately arranged together with the second-conduction-type base region and the first-conduction-type emitter region which come into conductive contact with the emitter electrode, and wherein the second-conduction-type floating region of the surface regions extends deeper than the trench, characterized in that the second-conduction-type floating region has a lower impurity concentration than the second-conduction-type base region.