A bias circuit in which a signal having a signal power Pin to be amplified is applied to a gate terminal of an amplifier element that amplifies the signal and that is a transistor including a crystal defect, the bias circuit comprises: a switching element (11; 15; 16) having a first terminal (11a; 15a; 16a) and a second terminal (11b; 15b; 16b), the first terminal (11a; 15a; 16a) being electrically connected to the gate terminal; a trap compensation element having a third terminal and a fourth terminal, the third terminal being connected to the second terminal (11b; 15b; 16b), wherein the trap compensation element is implemented by a field effect transistor, FET, including crystal defects; a control circuit to apply a bias voltage to the gate terminal, wherein when the signal to be amplified is a transmission signal and the amplifier element is in a high Pin period, the control circuit performs control to cause the switching element (11; 15; 16) to be in an open state and control to cause the third terminal and the fourth terminal in the trap compensation element to be in a non-conductive state in which the third terminal and the fourth terminal are electrically disconnected from each other, and when the signal to be amplified is a reception signal and the amplifier element is in a low Pin period, the control circuit performs control to cause the switching element (11; 15; 16) to be in a closed state and control to cause the third terminal and the fourth terminal to be in a conductive state in which the third terminal and the fourth terminal are electrically connected to each other; and a voltage application circuit (14;17) to apply a first voltage to the fourth terminal when the signal to be amplified is a transmission signal, and apply a second voltage to the fourth terminal when the signal to be amplified is a reception signal, the second voltage being a negative voltage, wherein when the amplifier element is in the high Pin period and the signal to be amplified is the transmission signal, the voltage application circuit charges electrons to the crystal defects included in the trap compensation element by applying the first voltage to the fourth terminal of the trap compensation element, and when the high Pin period is switched to the low Pin period and the signal to be amplified is the reception signal, electrons are transiently discharged from the crystal defects. a switching element (11; 15; 16) having a first terminal (11a; 15a; 16a) and a second terminal (11b; 15b; 16b), the first terminal (11a; 15a; 16a) being electrically connected to the gate terminal; a trap compensation element having a third terminal and a fourth terminal, the third terminal being connected to the second terminal (11b; 15b; 16b), wherein the trap compensation element is implemented by a field effect transistor, FET, including crystal defects; a control circuit to apply a bias voltage to the gate terminal, wherein when the signal to be amplified is a transmission signal and the amplifier element is in a high Pin period, the control circuit performs control to cause the switching element (11; 15; 16) to be in an open state and control to cause the third terminal and the fourth terminal in the trap compensation element to be in a non-conductive state in which the third terminal and the fourth terminal are electrically disconnected from each other, and when the signal to be amplified is a reception signal and the amplifier element is in a low Pin period, the control circuit performs control to cause the switching element (11; 15; 16) to be in a closed state and control to cause the third terminal and the fourth terminal to be in a conductive state in which the third terminal and the fourth terminal are electrically connected to each other; and a voltage application circuit (14;17) to apply a first voltage to the fourth terminal when the signal to be amplified is a transmission signal, and apply a second voltage to the fourth terminal when the signal to be amplified is a reception signal, the second voltage being a negative voltage, wherein when the amplifier element is in the high Pin period and the signal to be amplified is the transmission signal, the voltage application circuit charges electrons to the crystal defects included in the trap compensation element by applying the first voltage to the fourth terminal of the trap compensation element, and when the high Pin period is switched to the low Pin period and the signal to be amplified is the reception signal, electrons are transiently discharged from the crystal defects.