A non-Foster circuit comprising: two pairs (Q1, Q2; Q3, Q4) of transistors, a first one of the pairs of transistors comprising a first transistor and a second transistor, a second one of the pairs of transistors comprising a third transistor and a fourth transistor, each of the first to fourth transistors having a first and a second current carrying electrodes and a control electrode; the control electrode of the first transistor being coupled to the first current carrying electrode of the third transistor, the control electrode of the second transistor being coupled to the first current carrying electrode of the fourth transistor, the control electrode of the third transistor being coupled to the first current carrying electrode of the first transistor, the control electrode of the fourth transistor being coupled to the first current carrying electrode of the second transistor; and first connection terminals connected to said first current carrying electrodes of the first and second transistors; second connection terminals connected to said second current carrying electrodes of said first and second transistors; a reactive load (Y L; Z L) coupled across said first connection terminals or across said second connection terminals; third connection terminals connected to the first current carrying electrodes of the third and fourth transistors; current sources (CS1, CS2, CS3, CS4) for supplying a flow of current to the second current carrying electrode of each of the first to fourth (Q1, Q2, Q3, Q4) transistors; and fourth connection terminals coupled to the second current carrying electrodes of the third and fourth transistors; a negative reactance appearing, in use, across said third or fourth connection terminals; characterized in that the non-Foster circuit further comprises a first common-mode feedback network (CMFB1) and a second common-mode feedback network (CMFB2), the first common-mode feedback network being coupled to the first current carrying electrodes of the first and second transistors, and the second common-mode feedback network being coupled to the first current carrying electrodes of the third and fourth transistors. two pairs (Q1, Q2; Q3, Q4) of transistors, a first one of the pairs of transistors comprising a first transistor and a second transistor, a second one of the pairs of transistors comprising a third transistor and a fourth transistor, each of the first to fourth transistors having a first and a second current carrying electrodes and a control electrode; the control electrode of the first transistor being coupled to the first current carrying electrode of the third transistor, the control electrode of the second transistor being coupled to the first current carrying electrode of the fourth transistor, the control electrode of the third transistor being coupled to the first current carrying electrode of the first transistor, the control electrode of the fourth transistor being coupled to the first current carrying electrode of the second transistor; and first connection terminals connected to said first current carrying electrodes of the first and second transistors; second connection terminals connected to said second current carrying electrodes of said first and second transistors; a reactive load (Y L; Z L) coupled across said first connection terminals or across said second connection terminals; third connection terminals connected to the first current carrying electrodes of the third and fourth transistors; current sources (CS1, CS2, CS3, CS4) for supplying a flow of current to the second current carrying electrode of each of the first to fourth (Q1, Q2, Q3, Q4) transistors; and fourth connection terminals coupled to the second current carrying electrodes of the third and fourth transistors; a negative reactance appearing, in use, across said third or fourth connection terminals; characterized in that the non-Foster circuit further comprises a first common-mode feedback network (CMFB1) and a second common-mode feedback network (CMFB2), the first common-mode feedback network being coupled to the first current carrying electrodes of the first and second transistors, and the second common-mode feedback network being coupled to the first current carrying electrodes of the third and fourth transistors.