An amplification circuit, comprising: - an input for receiving an input voltage (v IN), - an output for exhibiting an output voltage (v OUT), - a primary amplifier (202, 602, 702) designed to: + receive the input voltage (v IN) from the input, + receive a primary control voltage (v CTL,1), + amplify the input voltage (v IN) by a primary gain (G 1) by amplifying a difference between the input voltage (v IN) and the primary control voltage (v CTL,1), the output voltage (v OUT) corresponding to the input voltage (v IN) amplified this way, + supply the output voltage (v OUT) to the output, - a secondary amplifier (212, 604, 714) designed to: + receive the input voltage (v IN) from the input, + amplify the input voltage (v IN) by a secondary gain, the primary control voltage (v CTL,1) corresponding to the input voltage (v IN) amplified this way, + supply the primary control voltage (v CTL,1) to the primary amplifier, wherein the secondary amplifier (212, 604, 714) is designed to have in operation an input admittance (g 2) of at least 1 millisiemens, the secondary amplifier (212, 604, 714) is designed to receive a secondary control voltage (v CTL,2) and to amplify the input voltage (v IN) by the secondary gain (G 2) by amplifying a difference between the input voltage (v IN) and the secondary control voltage (v CTL,2), and wherein the amplification circuit further comprises a tertiary amplifier (226, 724, 802) designed to amplify a tertiary input voltage dependent on the input voltage (V in) by a tertiary gain (G 3), the secondary control voltage (v CTL,2) corresponding to the tertiary input voltage amplified this way. - an input for receiving an input voltage (v IN), - an output for exhibiting an output voltage (v OUT), - a primary amplifier (202, 602, 702) designed to: + receive the input voltage (v IN) from the input, + receive a primary control voltage (v CTL,1), + amplify the input voltage (v IN) by a primary gain (G 1) by amplifying a difference between the input voltage (v IN) and the primary control voltage (v CTL,1), the output voltage (v OUT) corresponding to the input voltage (v IN) amplified this way, + supply the output voltage (v OUT) to the output, + receive the input voltage (v IN) from the input, + receive a primary control voltage (v CTL,1), + amplify the input voltage (v IN) by a primary gain (G 1) by amplifying a difference between the input voltage (v IN) and the primary control voltage (v CTL,1), the output voltage (v OUT) corresponding to the input voltage (v IN) amplified this way, + supply the output voltage (v OUT) to the output, - a secondary amplifier (212, 604, 714) designed to: + receive the input voltage (v IN) from the input, + amplify the input voltage (v IN) by a secondary gain, the primary control voltage (v CTL,1) corresponding to the input voltage (v IN) amplified this way, + supply the primary control voltage (v CTL,1) to the primary amplifier, + receive the input voltage (v IN) from the input, + amplify the input voltage (v IN) by a secondary gain, the primary control voltage (v CTL,1) corresponding to the input voltage (v IN) amplified this way, + supply the primary control voltage (v CTL,1) to the primary amplifier,