A method for forming a three-dimensional, 3D, memory device (100, 300, 500, 700, 900), comprising: forming a film stack (135, 150) with a plurality of dielectric layer pairs on a substrate; forming a channel structure region in the film stack (135, 150) including a plurality of channel structures; forming a top select gate staircase structure including a number X 2 of steps arranged along the second direction in the channel structure region; and forming a first staircase structure in a first staircase region and a second staircase structure in a second staircase region, each of the first staircase structure and the second staircase structure including a plurality of division block structures (762, 764, 766, 768) arranged along a first direction; wherein a first vertical offset defines a boundary between adjacent division block structures (762, 764, 766, 768), and each division block structure (762, 764, 766, 768) includes a plurality of staircases (701, 702, 703, 704, etc.) arranged along a second direction that is different from the first direction, each staircase (701, 702, 703, 704, etc.) including a plurality of steps arranged along the first direction, and the first vertical offset between two adjacent division block structures equals to 2X 2 X 3 times a thickness of one step, wherein the two adjacent division block structures (762, 764, 766, 768) are located at a same side of the channel structure region and arranged in a same position in the second direction, wherein a number of the plurality of staircases (701, 702, 703, 704, etc.) in each division block structure (762, 764, 766, 768) is X 3, wherein the plurality of division block structures (762, 764, 766, 768) is formed by using a second staircase division pattern mask, wherein the second staircase division pattern mask is used to cover the channel structure region and at least one first division block structure in the first staircase region and at least one second division block structure in the second staircase region, wherein the second staircase division pattern mask also exposes at least one first division block structure in the first staircase region and at least one second division block structure in the second staircase region. forming a film stack (135, 150) with a plurality of dielectric layer pairs on a substrate; forming a channel structure region in the film stack (135, 150) including a plurality of channel structures; forming a top select gate staircase structure including a number X 2 of steps arranged along the second direction in the channel structure region; and forming a first staircase structure in a first staircase region and a second staircase structure in a second staircase region, each of the first staircase structure and the second staircase structure including a plurality of division block structures (762, 764, 766, 768) arranged along a first direction; wherein a first vertical offset defines a boundary between adjacent division block structures (762, 764, 766, 768), and each division block structure (762, 764, 766, 768) includes a plurality of staircases (701, 702, 703, 704, etc.) arranged along a second direction that is different from the first direction, each staircase (701, 702, 703, 704, etc.) including a plurality of steps arranged along the first direction, and the first vertical offset between two adjacent division block structures equals to 2X 2 X 3 times a thickness of one step, wherein the two adjacent division block structures (762, 764, 766, 768) are located at a same side of the channel structure region and arranged in a same position in the second direction, wherein a number of the plurality of staircases (701, 702, 703, 704, etc.) in each division block structure (762, 764, 766, 768) is X 3, wherein the plurality of division block structures (762, 764, 766, 768) is formed by using a second staircase division pattern mask, wherein the second staircase division pattern mask is used to cover the channel structure region and at least one first division block structure in the first staircase region and at least one second division block structure in the second staircase region, wherein the second staircase division pattern mask also exposes at least one first division block structure in the first staircase region and at least one second division block structure in the second staircase region.