A head-wearable hearing device comprising: a multiple-output switched capacitor DC-DC converter (100, 500)) comprising a DC input for receipt and conversion of a battery supply voltage (Vbat) into a first DC output voltage and a second DC output voltage; said multiple-output switched capacitor DC-DC converter (100, 500) comprising: - a switch matrix comprising a plurality of individually controllable semiconductor switches, - P flying capacitors (C fly1, C fly2, C fly3) connected between respective sets of circuit nodes of the switch matrix; - a controller connected to respective control terminals of the plurality of individually controllable semiconductor switches of the switch matrix to configure: - a first converter section (V1v2) by selecting a first subset of individually controllable semiconductor switches and a first set of N flying capacitors to form a first converter topology configured to generate the first DC output voltage; and - a second converter section (V1v8) by selecting a second subset of individually controllable semiconductor switches and a second set of (P-N) flying capacitors to form a second converter topology configured to generate the second DC output voltage; - said controller being configured to select the first converter topology and second converter topology based on a topology selection rule; wherein P > 1; N is a positive integer and 0<=N<=P, characterized in that the first and second subsets of the individually controllable semiconductor switches do not overlap, and the first set of N flying capacitors and the second set of (P-N) flying capacitors also do not overlap, in order to avoid cross coupling or interference between the first and second DC output voltages. a multiple-output switched capacitor DC-DC converter (100, 500)) comprising a DC input for receipt and conversion of a battery supply voltage (Vbat) into a first DC output voltage and a second DC output voltage; said multiple-output switched capacitor DC-DC converter (100, 500) comprising: - a switch matrix comprising a plurality of individually controllable semiconductor switches, - P flying capacitors (C fly1, C fly2, C fly3) connected between respective sets of circuit nodes of the switch matrix; - a controller connected to respective control terminals of the plurality of individually controllable semiconductor switches of the switch matrix to configure: - a first converter section (V1v2) by selecting a first subset of individually controllable semiconductor switches and a first set of N flying capacitors to form a first converter topology configured to generate the first DC output voltage; and - a second converter section (V1v8) by selecting a second subset of individually controllable semiconductor switches and a second set of (P-N) flying capacitors to form a second converter topology configured to generate the second DC output voltage; - said controller being configured to select the first converter topology and second converter topology based on a topology selection rule; - a switch matrix comprising a plurality of individually controllable semiconductor switches, - P flying capacitors (C fly1, C fly2, C fly3) connected between respective sets of circuit nodes of the switch matrix; - a controller connected to respective control terminals of the plurality of individually controllable semiconductor switches of the switch matrix to configure: - a first converter section (V1v2) by selecting a first subset of individually controllable semiconductor switches and a first set of N flying capacitors to form a first converter topology configured to generate the first DC output voltage; and - a second converter section (V1v8) by selecting a second subset of individually controllable semiconductor switches and a second set of (P-N) flying capacitors to form a second converter topology configured to generate the second DC output voltage; - said controller being configured to select the first converter topology and second converter topology based on a topology selection rule; wherein P > 1; N is a positive integer and 0<=N<=P, characterized in that the first and second subsets of the individually controllable semiconductor switches do not overlap, and the first set of N flying capacitors and the second set of (P-N) flying capacitors also do not overlap, in order to avoid cross coupling or interference between the first and second DC output voltages.