A multi-channel receiver comprising: an analog-to-digital converter configured to convert using a sampling rate S an analog signal z which resides in a frequency band B Hz to a digital signal x, wherein digital signal x is representative of analog signal z; and a multi-band selector circuit configured to receive the digital signal x and to map the digital signal x into M time domain sub-signals x 1...x M, wherein each sub-signal represents in a time domain a frequency domain content of digital signal x, wherein each sub-signal resides in a sub-range of band B, wherein each frequency component of digital signal x is represented at least in one of the sub-signals x 1...x M in its original form, and wherein each of the sub-signals x 1...x M has a sampling rate less than S, characterized in that: said ADC is a partition time-interleaved ADC comprising: a main signal input for inputting an analog signal into the circuit; a front end circuitry comprising a plurality N of sampling units each having a signal input and a signal output, wherein the signal input of each of the sampling units is connected to said main signal input; a backend circuitry comprising a plurality of demultiplexers each having a signal input and a group K of signal outputs; a plurality N of groups K of ADC units each ADC unit having a signal input and a data output; wherein: the signal output of each sampling unit is connected to the signal input of one demultiplexer of said plurality of demultiplexers, and the signal outputs of each demultiplexer are connected to the signal inputs of the ADC units of one group of ADC units, and wherein said main signal input is configured to feed the analog signal to said plurality N of sampling units using time interleaving, and wherein said demultiplexers are configured to feed the sampled signal to said plurality N of groups of ADC units using time interleaving. an analog-to-digital converter configured to convert using a sampling rate S an analog signal z which resides in a frequency band B Hz to a digital signal x, wherein digital signal x is representative of analog signal z; and a multi-band selector circuit configured to receive the digital signal x and to map the digital signal x into M time domain sub-signals x 1...x M, wherein each sub-signal represents in a time domain a frequency domain content of digital signal x, wherein each sub-signal resides in a sub-range of band B, wherein each frequency component of digital signal x is represented at least in one of the sub-signals x 1...x M in its original form, and wherein each of the sub-signals x 1...x M has a sampling rate less than S, said ADC is a partition time-interleaved ADC comprising: a main signal input for inputting an analog signal into the circuit; a front end circuitry comprising a plurality N of sampling units each having a signal input and a signal output, wherein the signal input of each of the sampling units is connected to said main signal input; a backend circuitry comprising a plurality of demultiplexers each having a signal input and a group K of signal outputs; a plurality N of groups K of ADC units each ADC unit having a signal input and a data output; a main signal input for inputting an analog signal into the circuit; a front end circuitry comprising a plurality N of sampling units each having a signal input and a signal output, wherein the signal input of each of the sampling units is connected to said main signal input; a backend circuitry comprising a plurality of demultiplexers each having a signal input and a group K of signal outputs; a plurality N of groups K of ADC units each ADC unit having a signal input and a data output; the signal output of each sampling unit is connected to the signal input of one demultiplexer of said plurality of demultiplexers, and the signal outputs of each demultiplexer are connected to the signal inputs of the ADC units of one group of ADC units, and wherein said main signal input is configured to feed the analog signal to said plurality N of sampling units using time interleaving, and wherein said demultiplexers are configured to feed the sampled signal to said plurality N of groups of ADC units using time interleaving.