An access controlling method of a dual port memory system, the method comprising: requesting, by a first processor, an access from a dual port memory; and transmitting, by the dual port memory, a result signal according to the access request to the first processor, wherein the result signal comprises a first result signal for notifying access success, a second result signal for notifying access failure, and a third result signal for notifying access hold; characterized in that the transmitting of the result signal comprises: transmitting an access allowance signal corresponding to the first result signal; and transmitting a busy signal corresponding to the second result signal and the third result signal, wherein the busy signal recognizes the busy signal as the third result signal until the allowance time does not elapse on the basis of a predetermined allowance time and recognizes the busy signal as the second result signal after the allowance time elapses; wherein the allowance time comprises a first allowance time set in the dual port memory and a second allowance time set in the first processor, wherein the dual port memory transmits a busy signal representing one of the second result signal and the third result signal on the basis of the first allowance time; and wherein the first processor recognizes a busy signal transmitted from the dual port memory as one of the second result signal and the third result signal on the basis of the second allowance time. requesting, by a first processor, an access from a dual port memory; and transmitting, by the dual port memory, a result signal according to the access request to the first processor, wherein the result signal comprises a first result signal for notifying access success, a second result signal for notifying access failure, and a third result signal for notifying access hold; characterized in that the transmitting of the result signal comprises: transmitting an access allowance signal corresponding to the first result signal; and transmitting a busy signal corresponding to the second result signal and the third result signal, wherein the busy signal recognizes the busy signal as the third result signal until the allowance time does not elapse on the basis of a predetermined allowance time and recognizes the busy signal as the second result signal after the allowance time elapses; wherein the allowance time comprises a first allowance time set in the dual port memory and a second allowance time set in the first processor, wherein the dual port memory transmits a busy signal representing one of the second result signal and the third result signal on the basis of the first allowance time; and wherein the first processor recognizes a busy signal transmitted from the dual port memory as one of the second result signal and the third result signal on the basis of the second allowance time. transmitting an access allowance signal corresponding to the first result signal; and transmitting a busy signal corresponding to the second result signal and the third result signal, wherein the busy signal recognizes the busy signal as the third result signal until the allowance time does not elapse on the basis of a predetermined allowance time and recognizes the busy signal as the second result signal after the allowance time elapses; wherein the allowance time comprises a first allowance time set in the dual port memory and a second allowance time set in the first processor, wherein the dual port memory transmits a busy signal representing one of the second result signal and the third result signal on the basis of the first allowance time; and wherein the first processor recognizes a busy signal transmitted from the dual port memory as one of the second result signal and the third result signal on the basis of the second allowance time.