A transistor comprising: a stack of III-nitride semiconductor layers (104, 106, 108, 110), the stack having a frontside and a backside; a source electrode in contact with the frontside of the stack; a drain electrode in contact with the backside of the stack; a trench extending through a portion of the stack, the trench having a sidewall; and a gate structure formed in the trench comprising: an AIN layer (127; 225, 226) formed on the sidewall and bottom of the trench; an insulator cap layer formed on the AIN layer; and a gate electrode formed on the insulator cap layer and covering the sidewall of the trench; wherein the stack of III-nitride semiconductor layers comprises: a drain contact layer comprising n+ GaN on the backside, the drain contact layer in contact with the drain electrode; a first channel layer of n- GaN on the drain contact layer; a p- layer of AlGaN or GaN on the first channel layer; and a source contact layer of n+ GaN on the p-layer, the source contact layer in contact with the source electrode; wherein the trench extends through the source contact layer and the p- layer; and a second GaN channel layer between the AIN layer (127; 225, 226) and the sidewall of the trench; wherein the second GaN channel layer is in contact with the first channel layer; and wherein the AIN layer comprises: a single-crystalline AlN layer formed on the sidewall of the trench; and a poly-crystalline AlN layer formed on the single- crystalline AlN layer. a stack of III-nitride semiconductor layers (104, 106, 108, 110), the stack having a frontside and a backside; a source electrode in contact with the frontside of the stack; a drain electrode in contact with the backside of the stack; a trench extending through a portion of the stack, the trench having a sidewall; and a gate structure formed in the trench comprising: an AIN layer (127; 225, 226) formed on the sidewall and bottom of the trench; an insulator cap layer formed on the AIN layer; and a gate electrode formed on the insulator cap layer and covering the sidewall of the trench; wherein the stack of III-nitride semiconductor layers comprises: a drain contact layer comprising n+ GaN on the backside, the drain contact layer in contact with the drain electrode; a first channel layer of n- GaN on the drain contact layer; a p- layer of AlGaN or GaN on the first channel layer; and a source contact layer of n+ GaN on the p-layer, the source contact layer in contact with the source electrode; wherein the trench extends through the source contact layer and the p- layer; and a second GaN channel layer between the AIN layer (127; 225, 226) and the sidewall of the trench; wherein the second GaN channel layer is in contact with the first channel layer; and wherein the AIN layer comprises: a single-crystalline AlN layer formed on the sidewall of the trench; and a poly-crystalline AlN layer formed on the single- crystalline AlN layer. an AIN layer (127; 225, 226) formed on the sidewall and bottom of the trench; an insulator cap layer formed on the AIN layer; and a gate electrode formed on the insulator cap layer and covering the sidewall of the trench; wherein the stack of III-nitride semiconductor layers comprises: a drain contact layer comprising n+ GaN on the backside, the drain contact layer in contact with the drain electrode; a first channel layer of n- GaN on the drain contact layer; a p- layer of AlGaN or GaN on the first channel layer; and a source contact layer of n+ GaN on the p-layer, the source contact layer in contact with the source electrode; wherein the trench extends through the source contact layer and the p- layer; and a second GaN channel layer between the AIN layer (127; 225, 226) and the sidewall of the trench; wherein the second GaN channel layer is in contact with the first channel layer; and wherein the AIN layer comprises: a single-crystalline AlN layer formed on the sidewall of the trench; and a poly-crystalline AlN layer formed on the single- crystalline AlN layer. a drain contact layer comprising n+ GaN on the backside, the drain contact layer in contact with the drain electrode; a first channel layer of n- GaN on the drain contact layer; a p- layer of AlGaN or GaN on the first channel layer; and a source contact layer of n+ GaN on the p-layer, the source contact layer in contact with the source electrode; wherein the trench extends through the source contact layer and the p- layer; and a second GaN channel layer between the AIN layer (127; 225, 226) and the sidewall of the trench; wherein the second GaN channel layer is in contact with the first channel layer; and wherein the AIN layer comprises: a single-crystalline AlN layer formed on the sidewall of the trench; and a poly-crystalline AlN layer formed on the single- crystalline AlN layer. a single-crystalline AlN layer formed on the sidewall of the trench; and a poly-crystalline AlN layer formed on the single- crystalline AlN layer.