A monolithic three dimensional NAND memory device, comprising: a plurality of control gate electrodes extending substantially parallel to a major surface of a substrate, wherein the plurality of control gate electrodes comprises at least a first control gate electrode located in a first device level and a second control gate electrode located in a second device level located over the major surface of the substrate and below the first device level; an interlevel insulating layer located between the first control gate electrode and the second control gate electrode; a plurality of semiconductor channels, wherein at least one end portion of each of the plurality of semiconductor channels extends substantially perpendicular to the major surface of the substrate, such that at least one first portion of each of the plurality of semiconductor channels is located in the first device level, and at least one second portion of each of the plurality of semiconductor channels is located in the second device level; at least one memory film located between each of the plurality of control gate electrodes and each respective semiconductor channel of the plurality of semiconductor channels; and at least one first trench extending substantially perpendicular to the major surface of the substrate, the at least one first trench filled with at least a first trench material (206/207) and a second trench material; wherein the at least one first trench further comprises an electrically insulating material located on the walls of the at least one first trench to electrically insulate the plurality of control gate electrodes from the first trench material (206/207); and characterized in that: the second trench material is located between the electrically insulating material and the first trench material (206/207); and the first trench material (206/207) comprises a material under a first magnitude of a first stress type, and the second trench material comprises a material under no stress, a second stress type opposite the first stress type, or a second magnitude of the first stress type lower than the first magnitude of the first stress type. a plurality of control gate electrodes extending substantially parallel to a major surface of a substrate, wherein the plurality of control gate electrodes comprises at least a first control gate electrode located in a first device level and a second control gate electrode located in a second device level located over the major surface of the substrate and below the first device level; an interlevel insulating layer located between the first control gate electrode and the second control gate electrode; a plurality of semiconductor channels, wherein at least one end portion of each of the plurality of semiconductor channels extends substantially perpendicular to the major surface of the substrate, such that at least one first portion of each of the plurality of semiconductor channels is located in the first device level, and at least one second portion of each of the plurality of semiconductor channels is located in the second device level; at least one memory film located between each of the plurality of control gate electrodes and each respective semiconductor channel of the plurality of semiconductor channels; and at least one first trench extending substantially perpendicular to the major surface of the substrate, the at least one first trench filled with at least a first trench material (206/207) and a second trench material; wherein the at least one first trench further comprises an electrically insulating material located on the walls of the at least one first trench to electrically insulate the plurality of control gate electrodes from the first trench material (206/207); and characterized in that: the second trench material is located between the electrically insulating material and the first trench material (206/207); and the first trench material (206/207) comprises a material under a first magnitude of a first stress type, and the second trench material comprises a material under no stress, a second stress type opposite the first stress type, or a second magnitude of the first stress type lower than the first magnitude of the first stress type. the second trench material is located between the electrically insulating material and the first trench material (206/207); and the first trench material (206/207) comprises a material under a first magnitude of a first stress type, and the second trench material comprises a material under no stress, a second stress type opposite the first stress type, or a second magnitude of the first stress type lower than the first magnitude of the first stress type.