A method for producing a microelectronic device, comprising one or more Si 1-z Ge z based semiconductor wire(s) (with 0 < z ≤ 1), said method including the steps of: a) thermal oxidation of at least a portion of a Si 1-x Ge x -based semiconductor layer (104, 204) (with 0 < x < 1) resting on a semi-conductor on insulator type substrate, so as to form at least one Si 1-y Ge y based semiconductor zone (with 0 < y < 1 and x < y), b) lateral thermal oxidation of the sides of one or more so-called semiconductor "connection" blocks (108a, 108b, C') from said Si 1-y Ge y -based semiconductor zone and connecting a semiconductor block intended to form a transistor source region and another block intended to form a transistor drain region so as to reduce the semiconductor connection blocks (108a, 108b, C') in at least one direction parallel to the main plane of the support and to form one or more Si 1-z Ge z -based semiconductor wire(s) (116a, 116b, 226) (with 0 < y < 1 and y < z) or a) lateral thermal oxidation of the sides of one or more semiconductor "connection" blocks (108a, 108b, C') of a Si 1-x Ge x -based semiconductor layer (104, 204) (with 0 < x < 1) resting on a semi-conductor on insulator type substrate and connecting a semiconductor block intended to form a transistor source region and another block intended to form a transistor drain region so as to reduce the semiconductor connection blocks (108a, 108b, C') in at least one direction parallel to the main plane of the support and to form one or more Si 1-y Ge y based semiconductor wire (s) (with 0 < y < 1 and x < y), b) thermal oxidation of at least a portion of the semiconductor layer (104, 204), so as to form the semi-conductor blocks into Si 1-z Ge z based wires (with 0 < y < 1 et y < z). a) thermal oxidation of at least a portion of a Si 1-x Ge x -based semiconductor layer (104, 204) (with 0 < x < 1) resting on a semi-conductor on insulator type substrate, so as to form at least one Si 1-y Ge y based semiconductor zone (with 0 < y < 1 and x < y), b) lateral thermal oxidation of the sides of one or more so-called semiconductor "connection" blocks (108a, 108b, C') from said Si 1-y Ge y -based semiconductor zone and connecting a semiconductor block intended to form a transistor source region and another block intended to form a transistor drain region so as to reduce the semiconductor connection blocks (108a, 108b, C') in at least one direction parallel to the main plane of the support and to form one or more Si 1-z Ge z -based semiconductor wire(s) (116a, 116b, 226) (with 0 < y < 1 and y < z) or a) lateral thermal oxidation of the sides of one or more semiconductor "connection" blocks (108a, 108b, C') of a Si 1-x Ge x -based semiconductor layer (104, 204) (with 0 < x < 1) resting on a semi-conductor on insulator type substrate and connecting a semiconductor block intended to form a transistor source region and another block intended to form a transistor drain region so as to reduce the semiconductor connection blocks (108a, 108b, C') in at least one direction parallel to the main plane of the support and to form one or more Si 1-y Ge y based semiconductor wire (s) (with 0 < y < 1 and x < y), b) thermal oxidation of at least a portion of the semiconductor layer (104, 204), so as to form the semi-conductor blocks into Si 1-z Ge z based wires (with 0 < y < 1 et y < z).