An interleaver for scrambling an information word, the information word comprising a plurality of digits, in order to obtain a permuted information word, comprising: a first interleaver stage for a row-by-row arranging of the digits of the information word in a plurality of first rows and first columns, a last of the first rows being incomplete and having a gap in at least a last of the first columns; and a second interleaver stage for scrambling the digits of the first rows including the last row having at least the gap in the last first column by interchanging at least two digits of the respective first row, such that in the last first row a position of the gap remains unchanged in order to obtain first scrambled rows, and for replacing the first rows by the first scrambled rows; a third interleaver stage for performing inter-row-permutation at the first rows after replacing the same by the scrambled rows; wherein the first interleaver stage is configured for reading the first columns after the inter-row-permutation in a column-by-column manner using a calculation regulation, and lining the digits of the first columns up without gaps in order to obtain the permuted information word, wherein the interleaver is configured to use the calculation regulation in order to obtain an address Addr in the permuted information word for a digit in a first row with a column index Ilvd_Col_Idx after scrambling the digits of the first rows and with a row index Ilvd_Row_Idx after inter-row permutation, wherein Short_Row_Idx is the row index of the incomplete first row after inter-row permutation, Num_Rem_Bits is a number of digits in the incomplete row, and Num_Full_Rows is the number of complete first rows, and the calculation regulation is: if Ilvd_Col_Idx is smaller than Num_Rem_Bits, calculate Addr to be equal to (Num_Full_Rows+ 1) * Ilvd_Col_Idx + Ilvd_Row_Idx; if Ilvd_Col_Idx is not smaller than Num_Rem_Bits and Ilvd_Row_Idx is smaller than Short_Row_Idx, calculate Addr to be equal to (Num_Full_Rows+ 1) * Num_Rem_Bits + Num_Full_Rows * (Ilvd_Col_Idx - Num_Rem_Bits) + Ilvd_Row_Idx; if Ilvd_Col_Idx is not smaller than Num_Rem_Bits and Ilvd_Row_Idx is not smaller than Short_Row_Idx, calculate Addr to be equal to (Num_Full_Rows+ 1) * Num_Rem_Bits + Num_Full_Rows * (Ilvd_Col_Idx - Num_Rem_Bits) + Ilvd_Row_Idx. a first interleaver stage for a row-by-row arranging of the digits of the information word in a plurality of first rows and first columns, a last of the first rows being incomplete and having a gap in at least a last of the first columns; and a second interleaver stage for scrambling the digits of the first rows including the last row having at least the gap in the last first column by interchanging at least two digits of the respective first row, such that in the last first row a position of the gap remains unchanged in order to obtain first scrambled rows, and for replacing the first rows by the first scrambled rows; a third interleaver stage for performing inter-row-permutation at the first rows after replacing the same by the scrambled rows; wherein the first interleaver stage is configured for reading the first columns after the inter-row-permutation in a column-by-column manner using a calculation regulation, and lining the digits of the first columns up without gaps in order to obtain the permuted information word, wherein the interleaver is configured to use the calculation regulation in order to obtain an address Addr in the permuted information word for a digit in a first row with a column index Ilvd_Col_Idx after scrambling the digits of the first rows and with a row index Ilvd_Row_Idx after inter-row permutation, wherein Short_Row_Idx is the row index of the incomplete first row after inter-row permutation, Num_Rem_Bits is a number of digits in the incomplete row, and Num_Full_Rows is the number of complete first rows, and the calculation regulation is: if Ilvd_Col_Idx is smaller than Num_Rem_Bits, calculate Addr to be equal to (Num_Full_Rows+ 1) * Ilvd_Col_Idx + Ilvd_Row_Idx; if Ilvd_Col_Idx is not smaller than Num_Rem_Bits and Ilvd_Row_Idx is smaller than Short_Row_Idx, calculate Addr to be equal to (Num_Full_Rows+ 1) * Num_Rem_Bits + Num_Full_Rows * (Ilvd_Col_Idx - Num_Rem_Bits) + Ilvd_Row_Idx; if Ilvd_Col_Idx is not smaller than Num_Rem_Bits and Ilvd_Row_Idx is not smaller than Short_Row_Idx, calculate Addr to be equal to (Num_Full_Rows+ 1) * Num_Rem_Bits + Num_Full_Rows * (Ilvd_Col_Idx - Num_Rem_Bits) + Ilvd_Row_Idx. if Ilvd_Col_Idx is smaller than Num_Rem_Bits, calculate Addr to be equal to (Num_Full_Rows+ 1) * Ilvd_Col_Idx + Ilvd_Row_Idx; if Ilvd_Col_Idx is not smaller than Num_Rem_Bits and Ilvd_Row_Idx is smaller than Short_Row_Idx, calculate Addr to be equal to (Num_Full_Rows+ 1) * Num_Rem_Bits + Num_Full_Rows * (Ilvd_Col_Idx - Num_Rem_Bits) + Ilvd_Row_Idx; if Ilvd_Col_Idx is not smaller than Num_Rem_Bits and Ilvd_Row_Idx is not smaller than Short_Row_Idx, calculate Addr to be equal to (Num_Full_Rows+ 1) * Num_Rem_Bits + Num_Full_Rows * (Ilvd_Col_Idx - Num_Rem_Bits) + Ilvd_Row_Idx.