A method for manufacturing a capacitor structure, comprising: providing a substrate; forming a stacked structure on the substrate, the stacked structure comprising at least two support material layers arranged at an interval and a sacrificial material layer located between adjacent support material layers; forming (S 130) capacitance holes having a cross section of circular shape in the stacked structure, each of the capacitance holes consisting of four through holes arranged in isolation; forming (S 140) a lower electrode, the lower electrode at least covering a side wall and a bottom of each of the through holes; removing (S 150) the sacrificial material layer, and forming a capacitance dielectric layer on a surface of the lower electrode; and forming (S 160) an upper electrode on a surface of the capacitance dielectric layer; wherein the method further comprises forming capacitance contact pads on the substrate before forming the stacked structure, wherein the capacitance contact pads correspond to the capacitance holes one by one; and the four through holes are connected to a same capacitance contact pad; wherein a step of forming the capacitance holes in the stacked structure comprises: forming a first hard mask layer on the stacked structure, the first hard mask layer forming a first concave pattern, and the first concave pattern defining an external outline of the capacitance hole; forming a filling layer, the filling layer covering a surface of the first hard mask layer and filling up the first concave pattern; forming a first strip pattern and a second strip pattern that intersect on the filling layer, and form an overlapping portion between the first strip pattern and the second strip pattern to be located above the first concave pattern; etching the filling layer, the first hard mask layer and the stacked structure based on the first concave pattern, the first strip pattern and the second strip pattern, till the stacked structure is removed for a preset height; and forming a second concave pattern defining the capacitance hole in the stacked structure; and etching the filling layer based on the second concave pattern to form the capacitance hole. providing a substrate; forming a stacked structure on the substrate, the stacked structure comprising at least two support material layers arranged at an interval and a sacrificial material layer located between adjacent support material layers; forming (S 130) capacitance holes having a cross section of circular shape in the stacked structure, each of the capacitance holes consisting of four through holes arranged in isolation; forming (S 140) a lower electrode, the lower electrode at least covering a side wall and a bottom of each of the through holes; removing (S 150) the sacrificial material layer, and forming a capacitance dielectric layer on a surface of the lower electrode; and forming (S 160) an upper electrode on a surface of the capacitance dielectric layer; wherein the method further comprises forming capacitance contact pads on the substrate before forming the stacked structure, wherein the capacitance contact pads correspond to the capacitance holes one by one; and the four through holes are connected to a same capacitance contact pad; wherein a step of forming the capacitance holes in the stacked structure comprises: forming a first hard mask layer on the stacked structure, the first hard mask layer forming a first concave pattern, and the first concave pattern defining an external outline of the capacitance hole; forming a filling layer, the filling layer covering a surface of the first hard mask layer and filling up the first concave pattern; forming a first strip pattern and a second strip pattern that intersect on the filling layer, and form an overlapping portion between the first strip pattern and the second strip pattern to be located above the first concave pattern; etching the filling layer, the first hard mask layer and the stacked structure based on the first concave pattern, the first strip pattern and the second strip pattern, till the stacked structure is removed for a preset height; and forming a second concave pattern defining the capacitance hole in the stacked structure; and etching the filling layer based on the second concave pattern to form the capacitance hole. forming a first hard mask layer on the stacked structure, the first hard mask layer forming a first concave pattern, and the first concave pattern defining an external outline of the capacitance hole; forming a filling layer, the filling layer covering a surface of the first hard mask layer and filling up the first concave pattern; forming a first strip pattern and a second strip pattern that intersect on the filling layer, and form an overlapping portion between the first strip pattern and the second strip pattern to be located above the first concave pattern; etching the filling layer, the first hard mask layer and the stacked structure based on the first concave pattern, the first strip pattern and the second strip pattern, till the stacked structure is removed for a preset height; and forming a second concave pattern defining the capacitance hole in the stacked structure; and etching the filling layer based on the second concave pattern to form the capacitance hole.