A semiconductor package assembly (10a, 10b), comprising: a first semiconductor package (100a, 100b), comprising: a first redistribution layer, RDL, structure having a first surface and a second surface opposite thereto; a first semiconductor die disposed on the first surface of the first RDL structure; a first molding compound disposed on the first surface of the first RDL structure and surrounding the first semiconductor die; and an electronic component embedded in the first RDL structure and electrically coupled to the first semiconductor die through the first RDL structure; wherein the first RDL structure comprises: a first inter-metal dielectric, IMD, layer; a plurality of first conductive traces at a first layer-level of the first IMD layer and one of the plurality of first conductive traces electrically coupled to the first semiconductor die; and a plurality of second conductive traces at a second layer-level different from the first layer-level of the first IMD layer; and characterized in that the electronic component is a multi-layer ceramic capacitor, comprising: a body; and first and second electrode layers (154, 156) disposed on respective ends of the body, such that sidewalls, portions of an upper surface, and a lower surface of the body are covered by the first and second electrode layers (154, 156), wherein the first and second electrode layers (154, 156) are electrically coupled to at least a respective one of the plurality of second conductive traces. a first semiconductor package (100a, 100b), comprising: a first redistribution layer, RDL, structure having a first surface and a second surface opposite thereto; a first semiconductor die disposed on the first surface of the first RDL structure; a first molding compound disposed on the first surface of the first RDL structure and surrounding the first semiconductor die; and an electronic component embedded in the first RDL structure and electrically coupled to the first semiconductor die through the first RDL structure; a first redistribution layer, RDL, structure having a first surface and a second surface opposite thereto; a first semiconductor die disposed on the first surface of the first RDL structure; a first molding compound disposed on the first surface of the first RDL structure and surrounding the first semiconductor die; and an electronic component embedded in the first RDL structure and electrically coupled to the first semiconductor die through the first RDL structure; wherein the first RDL structure comprises: a first inter-metal dielectric, IMD, layer; a plurality of first conductive traces at a first layer-level of the first IMD layer and one of the plurality of first conductive traces electrically coupled to the first semiconductor die; and a plurality of second conductive traces at a second layer-level different from the first layer-level of the first IMD layer; and a first inter-metal dielectric, IMD, layer; a plurality of first conductive traces at a first layer-level of the first IMD layer and one of the plurality of first conductive traces electrically coupled to the first semiconductor die; and a plurality of second conductive traces at a second layer-level different from the first layer-level of the first IMD layer; and characterized in that the electronic component is a multi-layer ceramic capacitor, comprising: a body; and first and second electrode layers (154, 156) disposed on respective ends of the body, such that sidewalls, portions of an upper surface, and a lower surface of the body are covered by the first and second electrode layers (154, 156), wherein the first and second electrode layers (154, 156) are electrically coupled to at least a respective one of the plurality of second conductive traces. a body; and first and second electrode layers (154, 156) disposed on respective ends of the body, such that sidewalls, portions of an upper surface, and a lower surface of the body are covered by the first and second electrode layers (154, 156), wherein the first and second electrode layers (154, 156) are electrically coupled to at least a respective one of the plurality of second conductive traces.