A method of manufacturing a semiconductor device comprising: forming a N- (P-) type epitaxial region on N+ (P+) type substrate; forming a first trench in said epitaxial region; forming an insulating layer in said first trench wherein said insulating layer lines said first trench; filling said first trench with a first polysilicon forming a top surface of said trench; forming a second trench in said epitaxial region, adjacent said first trench; forming a gate oxide layer in said second trench wherein said gate oxide layer lines said second trench and is also formed on the top of the first polysilicon that fills the first trench; filling said second trench with a second polysilicon; implanting a P+ (N+) type dopant, forming a P+ (N+) type region of said first polysilicon in said first trench; performing a body implant to form a P type body region in said epitaxial region; implanting a N+ (P+) type dopant, forming a N+ (P+) type region of said first polysilicon in said first trench; wherein said forming a P+ (N+) type region of said first polysilicon in said first trench and said forming a N+ (P+) type region of said first polysilicon in said first trench result in forming a polysilicon diode in said first trench wherein a portion of said diode is lower than said top surface of first said trench, wherein said method further comprises the step of forming a trench metal-oxide semiconductor field effect transistor (MOSFET) in said epitaxial region, said MOSFET using said second polysilicon in said second trench as a gate and said body region as a body region; said implanting a N+ (P+) type dopant further comprising forming at the same time N+ (P+) type source implant area silicon regions of said MOSFET. forming a N- (P-) type epitaxial region on N+ (P+) type substrate; forming a first trench in said epitaxial region; forming an insulating layer in said first trench wherein said insulating layer lines said first trench; filling said first trench with a first polysilicon forming a top surface of said trench; forming a second trench in said epitaxial region, adjacent said first trench; forming a gate oxide layer in said second trench wherein said gate oxide layer lines said second trench and is also formed on the top of the first polysilicon that fills the first trench; filling said second trench with a second polysilicon; implanting a P+ (N+) type dopant, forming a P+ (N+) type region of said first polysilicon in said first trench; performing a body implant to form a P type body region in said epitaxial region; implanting a N+ (P+) type dopant, forming a N+ (P+) type region of said first polysilicon in said first trench; wherein said forming a P+ (N+) type region of said first polysilicon in said first trench and said forming a N+ (P+) type region of said first polysilicon in said first trench result in forming a polysilicon diode in said first trench wherein a portion of said diode is lower than said top surface of first said trench, wherein said method further comprises the step of forming a trench metal-oxide semiconductor field effect transistor (MOSFET) in said epitaxial region, said MOSFET using said second polysilicon in said second trench as a gate and said body region as a body region; said implanting a N+ (P+) type dopant further comprising forming at the same time N+ (P+) type source implant area silicon regions of said MOSFET.