A switch control circuit configured to control a voltage regulator, said switch control circuit comprising an error amplifier, which is configured to operate in an amplification state or in a voltage following state, a compensation network and a control circuit; wherein the compensation network is connected to an output end of the error amplifier, and the control circuit comprises switches from a first switch (K 1) to a fifth switch (K 5) and is configured to control said operating states of the error amplifier and the compensation network by controlling on/off states of switches from the first switch (K 1) to the fifth switch (K 5); and characterized in that: the control circuit controls on/off states of switches from the first switch (K 1) to the fifth switch (K 5) using a single enable signal (PWM_PSM); the compensation network comprises a resistor (R 1) and a capacitor (C 1); the control circuit controls the first switch (K 1) and the second switch (K 2) to be switched on, and the switches from the third switch (K 3) to the fifth switch (K 5) to be switched off when the enable signal (PWM_PSM) is in a first logic state, wherein the error amplifier is configured to operate in the amplification state, in which a difference of an output sampling voltage (V FB) of the voltage regulator and a reference voltage (V REF) is amplified, and is configured to control the voltage regulator in a Pulse Width Modulation mode, and the compensation network is configured to operate in a mutual compensation state of resistor (R 1) and capacitor (C 1); and the control circuit controls the first switch (K 1) and the second switch (K 2) to be switched off, and the switches from the third switch (K 3) to the fifth switch (K 5) are switched on when the enable signal (PWM_PSM) is the inverse of the first logic state, wherein the error amplifier is configured to operate in the voltage following state, in which an in-phase input end of the error amplifier is configured to be directly connected with the circuit output voltage (V OUT) of the voltage regulator, and is configured to control the voltage regulator in a Pulse Skip Modulation mode, and the compensation network is configured to operate in a capacitance (C 1) self-compensation state. the control circuit comprises switches from a first switch (K 1) to a fifth switch (K 5) and is configured to control said operating states of the error amplifier and the compensation network by controlling on/off states of switches from the first switch (K 1) to the fifth switch (K 5); and characterized in that: the control circuit controls on/off states of switches from the first switch (K 1) to the fifth switch (K 5) using a single enable signal (PWM_PSM); the compensation network comprises a resistor (R 1) and a capacitor (C 1); the control circuit controls the first switch (K 1) and the second switch (K 2) to be switched on, and the switches from the third switch (K 3) to the fifth switch (K 5) to be switched off when the enable signal (PWM_PSM) is in a first logic state, wherein the error amplifier is configured to operate in the amplification state, in which a difference of an output sampling voltage (V FB) of the voltage regulator and a reference voltage (V REF) is amplified, and is configured to control the voltage regulator in a Pulse Width Modulation mode, and the compensation network is configured to operate in a mutual compensation state of resistor (R 1) and capacitor (C 1); and the control circuit controls the first switch (K 1) and the second switch (K 2) to be switched off, and the switches from the third switch (K 3) to the fifth switch (K 5) are switched on when the enable signal (PWM_PSM) is the inverse of the first logic state, wherein the error amplifier is configured to operate in the voltage following state, in which an in-phase input end of the error amplifier is configured to be directly connected with the circuit output voltage (V OUT) of the voltage regulator, and is configured to control the voltage regulator in a Pulse Skip Modulation mode, and the compensation network is configured to operate in a capacitance (C 1) self-compensation state.