A device for processing data, the device comprising: an integrator unit (103, 104) comprising a first input, a second input and an output and adapted for integrating an input signal (V I); a feedback loop which connects an output signal to the first input of the integrator unit, where the first input comprises a virtual ground node of the integrator unit; a capacitor coupled between the virtual ground node of the integrator unit (103, 104) and the output of the integrator unit; a clipping detection unit adapted for detecting the clipping behavior of the integrator unit (103, 104); a correction unit (101, 102) adapted for correcting clipping of the integrator unit (103, 104) by injecting a current pulse in the integrator unit thereby forcing a zero-crossing of an output signal (V 1, V 2) of the integrator unit (103, 104), the correction unit (101, 102) comprising a first switchable current source (106,107) switchably coupled to the virtual ground node of the integrator unit (103, 104) and adapted for forcing the integrator unit (103, 104) up to a zero value when the feedback loop is clipping to a low side, and a second switchable current source (108, 109) switchably coupled to the virtual ground node of the integrator unit (103,104) and adapted for forcing the integrator unit (103, 104) down to the zero value when the feedback loop is clipping to a high side; and a zero-crossing detector comprising a comparator connected to an output of the integrator unit (103, 104) and adapted for detecting the zero-crossing of the output signal (V 1) of the integrator unit (103, 104); wherein in response to the detection of the zero crossing, the comparator is adapted to control at least one of the group consisting of the first switchable current source (106, 107) and the second switchable current source (108, 109) to perform efficient clipping equilibration. an integrator unit (103, 104) comprising a first input, a second input and an output and adapted for integrating an input signal (V I); a feedback loop which connects an output signal to the first input of the integrator unit, where the first input comprises a virtual ground node of the integrator unit; a capacitor coupled between the virtual ground node of the integrator unit (103, 104) and the output of the integrator unit; a clipping detection unit adapted for detecting the clipping behavior of the integrator unit (103, 104); a correction unit (101, 102) adapted for correcting clipping of the integrator unit (103, 104) by injecting a current pulse in the integrator unit thereby forcing a zero-crossing of an output signal (V 1, V 2) of the integrator unit (103, 104), the correction unit (101, 102) comprising a first switchable current source (106,107) switchably coupled to the virtual ground node of the integrator unit (103, 104) and adapted for forcing the integrator unit (103, 104) up to a zero value when the feedback loop is clipping to a low side, and a second switchable current source (108, 109) switchably coupled to the virtual ground node of the integrator unit (103,104) and adapted for forcing the integrator unit (103, 104) down to the zero value when the feedback loop is clipping to a high side; and a zero-crossing detector comprising a comparator connected to an output of the integrator unit (103, 104) and adapted for detecting the zero-crossing of the output signal (V 1) of the integrator unit (103, 104); wherein in response to the detection of the zero crossing, the comparator is adapted to control at least one of the group consisting of the first switchable current source (106, 107) and the second switchable current source (108, 109) to perform efficient clipping equilibration.