A motor control device that controls an electric motor which is a three-phase motor on the basis of a pulse width modulation signal generated for each of a plurality of PWM cycles (Tc) included in a current control cycle (Ta) which is a computation cycle of a control loop of a motor current, the motor control device comprising: a PWM count computation unit that computes a PWM count (Cu, Cv, Cw) for each of three phases for each current control cycle (Ta); a PWM count setting unit that sets the PWM count (Cu, Cv, Cw) for each phase in the current control cycle (Ta) as a PWM count (Cu, Cv, Cw) for each PWM cycle (Tc) in the relevant current control cycle (Ta) for the corresponding phase; and a common mode noise reduction unit; characterized in that the common mode noise reduction unit changes the PWM count (Cu, Cv, Cw) in a PWM cycle (Tc) for one phase or both phases, of two of the three phases other than one desired phase which is a reference phase, the one phase or both phases being the count change target phase/phases, such that a current that flows through a stray capacitance because of an output voltage for the one desired phase is canceled out with a current that flows through the stray capacitance because of an output voltage for the at least one of the two other phases in at least one PWM cycle (Tc) in the current control cycle (Ta), wherein the common mode noise reduction unit includes a PWM count change unit that changes the PWM count (Cu, Cv, Cw) for at least one of the two other phases, of the PWM counts (Cu, Cv, Cw) for the three phases for each PWM cycle (Tc) in the current control cycle (Ta), such that an output voltage waveform for the relevant phase is a waveform obtained by inverting an output voltage waveform for the one desired phase in at least one PWM cycle (Tc) without changing a total value of PWM counts (Cu, Cv, Cw) for the relevant phase in the relevant current control cycle (Ta). a PWM count computation unit that computes a PWM count (Cu, Cv, Cw) for each of three phases for each current control cycle (Ta); a PWM count setting unit that sets the PWM count (Cu, Cv, Cw) for each phase in the current control cycle (Ta) as a PWM count (Cu, Cv, Cw) for each PWM cycle (Tc) in the relevant current control cycle (Ta) for the corresponding phase; and a common mode noise reduction unit; characterized in that the common mode noise reduction unit changes the PWM count (Cu, Cv, Cw) in a PWM cycle (Tc) for one phase or both phases, of two of the three phases other than one desired phase which is a reference phase, the one phase or both phases being the count change target phase/phases, such that a current that flows through a stray capacitance because of an output voltage for the one desired phase is canceled out with a current that flows through the stray capacitance because of an output voltage for the at least one of the two other phases in at least one PWM cycle (Tc) in the current control cycle (Ta), wherein the common mode noise reduction unit includes a PWM count change unit that changes the PWM count (Cu, Cv, Cw) for at least one of the two other phases, of the PWM counts (Cu, Cv, Cw) for the three phases for each PWM cycle (Tc) in the current control cycle (Ta), such that an output voltage waveform for the relevant phase is a waveform obtained by inverting an output voltage waveform for the one desired phase in at least one PWM cycle (Tc) without changing a total value of PWM counts (Cu, Cv, Cw) for the relevant phase in the relevant current control cycle (Ta).