A zero-current detector for a voltage converter, comprising: a comparator having a first input terminal that receives a voltage on a LX node of the voltage converter as an first signal from the voltage converter, a second input terminal configured to receive a second signal representing a ground voltage, and an output terminal configured to provide a ZCD signal in response to a comparison of the first and second signals, wherein the ZCD signal is an output of the zero-current detector; an offset cancellation circuit coupled to the comparator that is configured to (i) be enabled in response to and during a power switch (S 1) of the voltage converter being switched on, (ii) receive sample signals from the comparator and determine an offset of the comparator in response to the sample signals, and (iii) provide an offset cancellation signal indicative of the determined offset to the comparator to cancel the comparator offset generated in response to comparing the first and second signals; and a delay circuit coupled to the offset cancellation circuit, the delay circuit configured to, after the power switch (S 1) switches off, enable the offset cancellation circuit for a first predetermined duration in response to an output voltage of the voltage converter being less than a threshold voltage; an auto-zero switch (SW 1) coupled between the first and second input terminals of the comparator, wherein the auto-zero switch (SW 1) is configured to be closed when the offset cancellation circuit is enabled; and an LX enable switch (SW 2) coupled between the LX node and the first input terminal of the comparator, wherein the LX enable switch (SW 2) is configured to be closed when the offset cancellation circuit is not enabled so that the first signal from the voltage converter is provided to the comparator. a comparator having a first input terminal that receives a voltage on a LX node of the voltage converter as an first signal from the voltage converter, a second input terminal configured to receive a second signal representing a ground voltage, and an output terminal configured to provide a ZCD signal in response to a comparison of the first and second signals, wherein the ZCD signal is an output of the zero-current detector; an offset cancellation circuit coupled to the comparator that is configured to (i) be enabled in response to and during a power switch (S 1) of the voltage converter being switched on, (ii) receive sample signals from the comparator and determine an offset of the comparator in response to the sample signals, and (iii) provide an offset cancellation signal indicative of the determined offset to the comparator to cancel the comparator offset generated in response to comparing the first and second signals; and a delay circuit coupled to the offset cancellation circuit, the delay circuit configured to, after the power switch (S 1) switches off, enable the offset cancellation circuit for a first predetermined duration in response to an output voltage of the voltage converter being less than a threshold voltage; an auto-zero switch (SW 1) coupled between the first and second input terminals of the comparator, wherein the auto-zero switch (SW 1) is configured to be closed when the offset cancellation circuit is enabled; and an LX enable switch (SW 2) coupled between the LX node and the first input terminal of the comparator, wherein the LX enable switch (SW 2) is configured to be closed when the offset cancellation circuit is not enabled so that the first signal from the voltage converter is provided to the comparator.