An apparatus for interconnecting a first die and a second die of a multi-die device, comprising: a master circuit block that interfaces with the first die of the multi-die device; a slave circuit block that interfaces with the second die of the multi-die device; a first memory (416a-416e) in the slave circuit block; a second memory (430a-430e) in the master circuit block; and a carrier between the first die and the second die, wherein the carrier comprises a third die having a first side and a second side opposite from the first side, wherein the first side of the third die has a first subset of a plurality of μbumps for interfacing with the first die, and wherein the second side of the third die has a second subset of the plurality of μbumps for interfacing with the second die, the plurality of μbumps including a redundant bump between the first die and the second die; wherein the master circuit block and the slave circuit block are configured to: identify one of the μbumps as a faulty μbump; store a first value that corresponds with the identified faulty μbump in the first memory and a second value that corresponds with the identified faulty μbump in the second memory; and replace a functionality of the faulty μbump with a first one of the plurality of μbumps, a functionality of the first μbump with a second one of the plurality of μbumps, and a functionality of the second μbump with the redundant bump, based at least in part on the values stored in the first and second memories. a master circuit block that interfaces with the first die of the multi-die device; a slave circuit block that interfaces with the second die of the multi-die device; a first memory (416a-416e) in the slave circuit block; a second memory (430a-430e) in the master circuit block; and a carrier between the first die and the second die, wherein the carrier comprises a third die having a first side and a second side opposite from the first side, wherein the first side of the third die has a first subset of a plurality of μbumps for interfacing with the first die, and wherein the second side of the third die has a second subset of the plurality of μbumps for interfacing with the second die, the plurality of μbumps including a redundant bump between the first die and the second die; wherein the master circuit block and the slave circuit block are configured to: identify one of the μbumps as a faulty μbump; store a first value that corresponds with the identified faulty μbump in the first memory and a second value that corresponds with the identified faulty μbump in the second memory; and replace a functionality of the faulty μbump with a first one of the plurality of μbumps, a functionality of the first μbump with a second one of the plurality of μbumps, and a functionality of the second μbump with the redundant bump, based at least in part on the values stored in the first and second memories. identify one of the μbumps as a faulty μbump; store a first value that corresponds with the identified faulty μbump in the first memory and a second value that corresponds with the identified faulty μbump in the second memory; and replace a functionality of the faulty μbump with a first one of the plurality of μbumps, a functionality of the first μbump with a second one of the plurality of μbumps, and a functionality of the second μbump with the redundant bump, based at least in part on the values stored in the first and second memories.