A solid-state imaging device providing an extended dynamic range by combining a plurality of read-out signals each formed of a signal at a reference level and a signal at a signal level, the solid-state imaging device comprising: a pixel part including a pixel arranged therein; and a reading part including a column signal processing part arranged so as to correspond to a column output of the pixel part, wherein the column signal processing part includes an amplifying part for amplifying the plurality of read-out signals read out from the pixel, and wherein the amplifying part includes: an amplifier including an inverting input terminal and a non-inverting input terminal, the inverting input terminal having at least a first inverting input channel and a second inverting input channel; a first node to which the plurality of read-out signals are input; a second node connected to the first inverting input channel; a third node connected to the second inverting input channel; a fourth node connected to an output terminal of the amplifier; a fifth node connected to the fourth node via a first output switch; a sixth node connected to the fourth node via a second output switch; a first input switch and a first sampling capacitor connected in series between the first node and the second node; a second input switch and a second sampling capacitor connected in series between the first node and the third node; a first feedback capacitor connected between the second node and the fifth node; and a second feedback capacitor connected between the third node and the sixth node. a pixel part including a pixel arranged therein; and a reading part including a column signal processing part arranged so as to correspond to a column output of the pixel part, wherein the column signal processing part includes an amplifying part for amplifying the plurality of read-out signals read out from the pixel, and wherein the amplifying part includes: an amplifier including an inverting input terminal and a non-inverting input terminal, the inverting input terminal having at least a first inverting input channel and a second inverting input channel; a first node to which the plurality of read-out signals are input; a second node connected to the first inverting input channel; a third node connected to the second inverting input channel; a fourth node connected to an output terminal of the amplifier; a fifth node connected to the fourth node via a first output switch; a sixth node connected to the fourth node via a second output switch; a first input switch and a first sampling capacitor connected in series between the first node and the second node; a second input switch and a second sampling capacitor connected in series between the first node and the third node; a first feedback capacitor connected between the second node and the fifth node; and a second feedback capacitor connected between the third node and the sixth node. an amplifier including an inverting input terminal and a non-inverting input terminal, the inverting input terminal having at least a first inverting input channel and a second inverting input channel; a first node to which the plurality of read-out signals are input; a second node connected to the first inverting input channel; a third node connected to the second inverting input channel; a fourth node connected to an output terminal of the amplifier; a fifth node connected to the fourth node via a first output switch; a sixth node connected to the fourth node via a second output switch; a first input switch and a first sampling capacitor connected in series between the first node and the second node; a second input switch and a second sampling capacitor connected in series between the first node and the third node; a first feedback capacitor connected between the second node and the fifth node; and a second feedback capacitor connected between the third node and the sixth node.