A circuit for automatic common-mode rejection calibration in a differential conversion system, comprising: - an analog input stage for an analog input signal; - an analog-digital-converter for converting an analog signal into its digital representation; - a digital block arranged to adapt said digital representation of a portion of a DC offset of said analog input signal in accordance with whether said analog input signal is in a predetermined input range of said analog-digital-converter; - a digital-analog-converter arranged in a feedback path from said digital block to subtraction means of said analog input stage for converting a digital signal into an analog output signal, wherein said analog output signal is subtracted from said analog input signal resulting in said analog signal; - controlling means configured to switch said differential conversion system between at least two unbalanced states in accordance with a calibration signal (q). wherein an average of said calibration signal is stored as said calibration sequence in memory means of said differential conversion system, and said calibration sequence is produced from said average value having said average value by means of an additional sigma-delta-modulator, the circuit being characterized in that it further comprises - a second additional sigma-delta-modulator, and wherein said controlling means is further arranged to produce said calibration signal from said average value by means of said additional sigma-delta-modulator together with said second additional sigma-delta-modulator, both using said average value as input signal, wherein in said conversion mode of said differential conversion system said calibration signal is comprised of an output of said additional sigma-delta-modulator and an output of said second additional sigma-delta-modulator by using an actual output of said differential conversion system for switching between said output of said additional sigma-delta-modulator and said output of said second additional sigma-delta-modulator. - an analog input stage for an analog input signal; - an analog-digital-converter for converting an analog signal into its digital representation; - a digital block arranged to adapt said digital representation of a portion of a DC offset of said analog input signal in accordance with whether said analog input signal is in a predetermined input range of said analog-digital-converter; - a digital-analog-converter arranged in a feedback path from said digital block to subtraction means of said analog input stage for converting a digital signal into an analog output signal, wherein said analog output signal is subtracted from said analog input signal resulting in said analog signal; - controlling means configured to switch said differential conversion system between at least two unbalanced states in accordance with a calibration signal (q). wherein an average of said calibration signal is stored as said calibration sequence in memory means of said differential conversion system, and said calibration sequence is produced from said average value having said average value by means of an additional sigma-delta-modulator, the circuit being characterized in that it further comprises - a second additional sigma-delta-modulator, and wherein said controlling means is further arranged to produce said calibration signal from said average value by means of said additional sigma-delta-modulator together with said second additional sigma-delta-modulator, both using said average value as input signal, wherein in said conversion mode of said differential conversion system said calibration signal is comprised of an output of said additional sigma-delta-modulator and an output of said second additional sigma-delta-modulator by using an actual output of said differential conversion system for switching between said output of said additional sigma-delta-modulator and said output of said second additional sigma-delta-modulator.