A data processing apparatus comprising: processing circuitry configured to process data, said processing circuitry having a plurality of exception states, said exception states including a base level exception state and at least one further level exception state; at least one exception return register for storing exception return data for controlling the processing circuitry to return from handling an exception event, the at least one further level exception state each having a corresponding exception return register dedicated for use by the processing circuitry when in the corresponding further level exception state; a base level stack pointer register for storing a base level stack pointer for use when said processing circuitry is in any of said exception states, said base level stack pointer indicating the location within a memory of a base level stack data store; at least one further level stack pointer register (30-1, 30-2, 30-3) for storing at least one further level stack pointer, each further level stack pointer being dedicated for use when said processing circuitry is in a corresponding further level exception state and indicating the location within said memory of a corresponding further level stack data store; and stack pointer selection circuitry configured to select a current stack pointer and to control said processing circuitry to use a current stack data store indicated by said current stack pointer when processing data; wherein: when said processing circuitry is in said base level exception state, said stack pointer selection circuitry is configured to select said base level stack pointer as said current stack pointer; and when said processing circuitry is in one of said at least one further level exception state, said stack pointer selection circuitry is configured to select one of said base level stack pointer and the further level stack pointer corresponding to a current further level exception state as said current stack pointer, said processing circuitry continuing to use the exception return register corresponding to said current further level exception state irrespective of whether said current stack pointer is said base level stack pointer or said further level stack pointer. processing circuitry configured to process data, said processing circuitry having a plurality of exception states, said exception states including a base level exception state and at least one further level exception state; at least one exception return register for storing exception return data for controlling the processing circuitry to return from handling an exception event, the at least one further level exception state each having a corresponding exception return register dedicated for use by the processing circuitry when in the corresponding further level exception state; a base level stack pointer register for storing a base level stack pointer for use when said processing circuitry is in any of said exception states, said base level stack pointer indicating the location within a memory of a base level stack data store; at least one further level stack pointer register (30-1, 30-2, 30-3) for storing at least one further level stack pointer, each further level stack pointer being dedicated for use when said processing circuitry is in a corresponding further level exception state and indicating the location within said memory of a corresponding further level stack data store; and stack pointer selection circuitry configured to select a current stack pointer and to control said processing circuitry to use a current stack data store indicated by said current stack pointer when processing data; wherein: when said processing circuitry is in said base level exception state, said stack pointer selection circuitry is configured to select said base level stack pointer as said current stack pointer; and when said processing circuitry is in one of said at least one further level exception state, said stack pointer selection circuitry is configured to select one of said base level stack pointer and the further level stack pointer corresponding to a current further level exception state as said current stack pointer, said processing circuitry continuing to use the exception return register corresponding to said current further level exception state irrespective of whether said current stack pointer is said base level stack pointer or said further level stack pointer. when said processing circuitry is in said base level exception state, said stack pointer selection circuitry is configured to select said base level stack pointer as said current stack pointer; and when said processing circuitry is in one of said at least one further level exception state, said stack pointer selection circuitry is configured to select one of said base level stack pointer and the further level stack pointer corresponding to a current further level exception state as said current stack pointer, said processing circuitry continuing to use the exception return register corresponding to said current further level exception state irrespective of whether said current stack pointer is said base level stack pointer or said further level stack pointer.