A multi-stage amplifier comprising - a first amplification stage (260, 261) configured to activate or to deactivate a first output stage (270, 271, 201) in response to an input voltage at an input node, wherein the first amplification stage further comprises a first current source configured to provide a first current; and a first input transistor arranged in series with the first current source; wherein a gate of the first input transistor is coupled to the input node; wherein the first amplification stage (260, 261) is configured to control a voltage level at a first midpoint between the first current source and the first input transistor, subject to the input voltage at the input node; wherein the first output stage (270, 271, 201) is coupled to the first midpoint; - the first output stage (270, 271, 201) configured to source a current at an output node of the multi-stage amplifier from a high potential, when activated; - a second amplification stage (400, 401) configured to activate or to deactivate a second output stage (410, 411, 412) in response to the input voltage at the input node, wherein the second amplification stage further comprises a second current source configured to provide a second current; and a second input transistor arranged in series with the second current source; wherein a gate of the second input transistor is coupled to the input node; wherein the second amplification stage (400, 401) is configured to control a voltage level at a second midpoint between the second current source and the second input transistor, subject to the input voltage at the input node; wherein the second output stage (410, 411, 412) is coupled to the second midpoint; and - the second output stage (410, 411, 412) configured to sink a current at the output node of the multi-stage amplifier to a low potential, when activated; wherein the first amplification stage (260, 261) and the second amplification stage (400, 401) are configured to activate the first output stage (270, 271, 201) and the second output stage (410, 411, 412) in a mutually exclusive manner. - a first amplification stage (260, 261) configured to activate or to deactivate a first output stage (270, 271, 201) in response to an input voltage at an input node, wherein the first amplification stage further comprises a first current source configured to provide a first current; and a first input transistor arranged in series with the first current source; wherein a gate of the first input transistor is coupled to the input node; wherein the first amplification stage (260, 261) is configured to control a voltage level at a first midpoint between the first current source and the first input transistor, subject to the input voltage at the input node; wherein the first output stage (270, 271, 201) is coupled to the first midpoint; - the first output stage (270, 271, 201) configured to source a current at an output node of the multi-stage amplifier from a high potential, when activated; - a second amplification stage (400, 401) configured to activate or to deactivate a second output stage (410, 411, 412) in response to the input voltage at the input node, wherein the second amplification stage further comprises a second current source configured to provide a second current; and a second input transistor arranged in series with the second current source; wherein a gate of the second input transistor is coupled to the input node; wherein the second amplification stage (400, 401) is configured to control a voltage level at a second midpoint between the second current source and the second input transistor, subject to the input voltage at the input node; wherein the second output stage (410, 411, 412) is coupled to the second midpoint; and - the second output stage (410, 411, 412) configured to sink a current at the output node of the multi-stage amplifier to a low potential, when activated; wherein the first amplification stage (260, 261) and the second amplification stage (400, 401) are configured to activate the first output stage (270, 271, 201) and the second output stage (410, 411, 412) in a mutually exclusive manner.