An electronic switching device comprising: an input terminal; an output terminal (150, 160); at least a first field effect transistor, FET, having a first current terminal (240, 290), a second current terminal (245, 295), a channel region (215, 265) between the first current terminal and the second current terminal, and a body region (202, 252); the first FET configured to provide a first conductive current path between the input terminal and the second current terminal (245, 295) of the first FET via the channel region (215, 265) of the first FET; at least a second field effect transistor, FET, connected in series with the first FET between the input terminal and the output terminal (150, 160); the second FET having a first current terminal (240, 290), a second current terminal (245, 295), a channel region (215, 265) between the first current terminal and the second current terminal, and a body region (202, 252); the second FET configured to provide a second conductive current path between the second current terminal (245, 295) of the second FET and the output terminal (150, 160) via the channel region (215, 295) of the second FET; a first electrostatic discharge, ESD, protection circuit electrically coupled to the first current terminal (240, 290) of the first FET and the body region (202, 252) of the first FET; and a second ESD protection circuit electrically coupled to the first current terminal (240, 290) of the second FET and the body region of the second FET (202, 252); wherein the first ESD protection circuit includes a first set of diodes connected in series between the first current terminal (240, 290) of the first FET and the body region (202, 252) of the first FET and oriented to pass current from the first current terminal (240, 290) of the first FET toward the body region (202, 252) of the first FET; and wherein the second ESD protection circuit includes a second set of diodes connected in series between the first current terminal (240, 290) of the second FET and the body region (202, 252) of the second FET and oriented to pass current from the first current terminal of the second FET toward the body region of the second FET, characterised in that the first and second FETs and the first and second sets of diodes are formed within a single semiconductor substrate. an input terminal; an output terminal (150, 160); at least a first field effect transistor, FET, having a first current terminal (240, 290), a second current terminal (245, 295), a channel region (215, 265) between the first current terminal and the second current terminal, and a body region (202, 252); the first FET configured to provide a first conductive current path between the input terminal and the second current terminal (245, 295) of the first FET via the channel region (215, 265) of the first FET; at least a second field effect transistor, FET, connected in series with the first FET between the input terminal and the output terminal (150, 160); the second FET having a first current terminal (240, 290), a second current terminal (245, 295), a channel region (215, 265) between the first current terminal and the second current terminal, and a body region (202, 252); the second FET configured to provide a second conductive current path between the second current terminal (245, 295) of the second FET and the output terminal (150, 160) via the channel region (215, 295) of the second FET; a first electrostatic discharge, ESD, protection circuit electrically coupled to the first current terminal (240, 290) of the first FET and the body region (202, 252) of the first FET; and a second ESD protection circuit electrically coupled to the first current terminal (240, 290) of the second FET and the body region of the second FET (202, 252); wherein the first ESD protection circuit includes a first set of diodes connected in series between the first current terminal (240, 290) of the first FET and the body region (202, 252) of the first FET and oriented to pass current from the first current terminal (240, 290) of the first FET toward the body region (202, 252) of the first FET; and wherein the second ESD protection circuit includes a second set of diodes connected in series between the first current terminal (240, 290) of the second FET and the body region (202, 252) of the second FET and oriented to pass current from the first current terminal of the second FET toward the body region of the second FET, characterised in that the first and second FETs and the first and second sets of diodes are formed within a single semiconductor substrate.