An insulation detection circuit for a power battery pack, comprising: a positive sampling unit, a negative sampling unit, a positive sampling point, a negative sampling point, a reference voltage terminal, and a processor, wherein a first terminal of the positive sampling unit is connected with positive electrode of the power battery pack to be measured, a second terminal of the positive sampling unit is connected with the reference voltage terminal, and a third terminal of the positive sampling unit is connected with the positive sampling point; wherein a first terminal of the negative sampling unit is connected with negative electrode of the power battery pack to be measured, a second terminal of the negative sampling unit is connected with the reference voltage terminal, and a third terminal of the negative sampling unit is connected with the negative sampling point; and wherein the processor is connected with the positive sampling point and the negative sampling point, characterized in that the positive sampling unit comprises a first switch, and the negative sampling unit comprises a second switch, wherein: the positive sampling unit is configured to provide a first positive sampled signal for the positive sampling point and the negative sampling unit is configured to provide a first negative sampled signal for the negative sampling point when both of the first switch and the second switch are configured to be in ON state, the positive sampling unit is configured to provide a second positive sampled signal for the positive sampling point when the first switch is configured to be in ON state and the second switch is configured to be in OFF state; and the negative sampling unit is configured to provide a second negative sampled signal for the negative sampling point when the first switch is configured to be in OFF state and the second switch is configured to be in ON state, and wherein the processor is configured to obtain a positive insulation resistance value and a negative insulation resistance value of the power battery pack to be measured simultaneously based on all of the first positive sampled signal, the first negative sampled signal, the second positive sampled signal and the second negative sampled signal. a positive sampling unit, a negative sampling unit, a positive sampling point, a negative sampling point, a reference voltage terminal, and a processor, wherein a first terminal of the positive sampling unit is connected with positive electrode of the power battery pack to be measured, a second terminal of the positive sampling unit is connected with the reference voltage terminal, and a third terminal of the positive sampling unit is connected with the positive sampling point; wherein a first terminal of the negative sampling unit is connected with negative electrode of the power battery pack to be measured, a second terminal of the negative sampling unit is connected with the reference voltage terminal, and a third terminal of the negative sampling unit is connected with the negative sampling point; and wherein the processor is connected with the positive sampling point and the negative sampling point, characterized in that the positive sampling unit comprises a first switch, and the negative sampling unit comprises a second switch, wherein: the positive sampling unit is configured to provide a first positive sampled signal for the positive sampling point and the negative sampling unit is configured to provide a first negative sampled signal for the negative sampling point when both of the first switch and the second switch are configured to be in ON state, the positive sampling unit is configured to provide a second positive sampled signal for the positive sampling point when the first switch is configured to be in ON state and the second switch is configured to be in OFF state; and the negative sampling unit is configured to provide a second negative sampled signal for the negative sampling point when the first switch is configured to be in OFF state and the second switch is configured to be in ON state, and wherein the processor is configured to obtain a positive insulation resistance value and a negative insulation resistance value of the power battery pack to be measured simultaneously based on all of the first positive sampled signal, the first negative sampled signal, the second positive sampled signal and the second negative sampled signal. the positive sampling unit is configured to provide a first positive sampled signal for the positive sampling point and the negative sampling unit is configured to provide a first negative sampled signal for the negative sampling point when both of the first switch and the second switch are configured to be in ON state, the positive sampling unit is configured to provide a second positive sampled signal for the positive sampling point when the first switch is configured to be in ON state and the second switch is configured to be in OFF state; and the negative sampling unit is configured to provide a second negative sampled signal for the negative sampling point when the first switch is configured to be in OFF state and the second switch is configured to be in ON state, and wherein the processor is configured to obtain a positive insulation resistance value and a negative insulation resistance value of the power battery pack to be measured simultaneously based on all of the first positive sampled signal, the first negative sampled signal, the second positive sampled signal and the second negative sampled signal.