Power factor correction, PFC, circuit comprising: an input terminal which is connectable to a power source, an output terminal which is connectable to a load, a PFC choke connected to said input terminal, a PFC diode connected in series with said PFC choke, an inrush diode connected in parallel to the series connection of the PFC choke and the PFC diode, and a PFC switch connected between said PFC choke and a reference potential to form a boost converter, a bulk filter PFC capacitor connected between the output terminal and the reference potential and configured to provide a DC voltage to the load, and Z an inrush current limiting device, which is connected between said PFC diode and the output terminal, wherein said inrush current limiting device comprises a first node and a second node, a resistive limiter unit (114, R3) with a resistor with negative temperature coefficient, NTC, for limiting current flowing through said limiter unit from said first to said second node, and a controllable bridging device which is connected between said first and said second nodes (110, 112) in parallel to the limiter unit (114, R3), wherein the bridging device comprises a semiconductor switch and a charge pump circuit (C1, D3, D4) connected to a control terminal of the semiconductor switch for controlling the semiconductor switch, the semiconductor switch being a transistor with a gate terminal forming the control terminal, and wherein the charge pump (C1, D3, D4) is connected between the PFC switch and the PFC choke, and is further connected to the bridging device and configured to provide a boosted control voltage that equals to a sum of a voltage across said bulk capacitor and a voltage across said PFC switch, said charge pump circuit comprising a charge pump capacitor, which is connected with a first end via a first diode to an auxiliary voltage (Vaux), and is further connected with said first end to the gate terminal of the bypass transistor, wherein the charge pump is configured to generate a control voltage, which is higher than the bulk voltage at the PFC capacitor by the value of the auxiliary voltage (Vaux), the control voltage being used to switch the bridging transistor on, when the PFC stage is active, so that the resistive limiter unit is bypassed when the PFC circuit is active, and to switch the bridging transistor off, when the PFC circuit is inactive, thereby deactivating the bypassing. an input terminal which is connectable to a power source, an output terminal which is connectable to a load, a PFC choke connected to said input terminal, a PFC diode connected in series with said PFC choke, an inrush diode connected in parallel to the series connection of the PFC choke and the PFC diode, and a PFC switch connected between said PFC choke and a reference potential to form a boost converter, a bulk filter PFC capacitor connected between the output terminal and the reference potential and configured to provide a DC voltage to the load, and Z an inrush current limiting device, which is connected between said PFC diode and the output terminal, wherein said inrush current limiting device comprises a first node and a second node, a resistive limiter unit (114, R3) with a resistor with negative temperature coefficient, NTC, for limiting current flowing through said limiter unit from said first to said second node, and a controllable bridging device which is connected between said first and said second nodes (110, 112) in parallel to the limiter unit (114, R3), wherein the bridging device comprises a semiconductor switch and a charge pump circuit (C1, D3, D4) connected to a control terminal of the semiconductor switch for controlling the semiconductor switch, the semiconductor switch being a transistor with a gate terminal forming the control terminal, and wherein the charge pump (C1, D3, D4) is connected between the PFC switch and the PFC choke, and is further connected to the bridging device and configured to provide a boosted control voltage that equals to a sum of a voltage across said bulk capacitor and a voltage across said PFC switch, said charge pump circuit comprising a charge pump capacitor, which is connected with a first end via a first diode to an auxiliary voltage (Vaux), and is further connected with said first end to the gate terminal of the bypass transistor, wherein the charge pump is configured to generate a control voltage, which is higher than the bulk voltage at the PFC capacitor by the value of the auxiliary voltage (Vaux), the control voltage being used to switch the bridging transistor on, when the PFC stage is active, so that the resistive limiter unit is bypassed when the PFC circuit is active, and to switch the bridging transistor off, when the PFC circuit is inactive, thereby deactivating the bypassing.