Method for controlling with six-step commutation scheme a three-phase inverter configured to drive a brushless electric motor, comprising the steps of: - generating, by an electronic control unit of the three-phase inverter, control signals comprising a first and a second (NPWM) pulse width modulation signal, said second pulse width modulation signal (NPWM) being the complementary over a period T of the first pulse width modulation signal; - applying, for at least part of each commutation step (Step1), by the electronic control unit, said first pulse width modulation signal to gate terminals of first transistors (T1,T4), the first transistors being the upper transistor of a first branch and the lower transistor of a second branch respectively or the lower transistor of the first branch and the upper transistor of the second branch respectively, of the three branches that make up the three-phase inverter to enable electric current conduction through said first transistors (T1,T4); - applying, for at least part of each commutation step (Step1), by the electronic control unit, said second pulse width modulation signal (NPWM) to gate terminals of second transistors (T2, T3) of the first and second branch of the three branches that make up the three-phase inverter, said second transistors being different from the first transistors, to disable electric current conduction through said second transistors (T2, T3); characterised by - subdividing, by the electronic control unit, each commutation step (Step1) of the six commutation steps into a first commutation step portion (Step1.1) and into a subsequent second commutation step portion (Step1.2), wherein each commutation step (Step1) of said six commutation steps has an extent of 60 electrical degrees and wherein the first commutation step portion (Step1.1) of each commutation step has a first extent and the subsequent second commutation step portion (Step1.2) has a second extent greater than the first extent, wherein, for each commutation step, during the first commutation step portion (Step1.1), the method comprises: - applying, by the electronic control unit, a first signal (E1; PWM--, E1) to the gate terminals of said first transistors (T1, T4) when the first pulse width modulation signal is applied to said first transistors in the subsequent second commutation step portion (Step1.2), - applying, by the electronic control unit, a second signal (E2; PWM++, E2) to the gate terminals of said second transistors (T2, T3) when the second pulse width modulation signal (NPWM) is applied to said second transistors in the subsequent second commutation step portion (Step1.2), wherein said first signal (E1; PWM--, E1) is configured to at least reduce the current conducted by the first transistors (T1, T4) of the first and second branch of the three-phase inverter, and said second signal (E2; PWM++, E2) is configured to increase the current conducted by the second transistors (T2, T3) of the first and second branch of the three-phase inverter. - generating, by an electronic control unit of the three-phase inverter, control signals comprising a first and a second (NPWM) pulse width modulation signal, said second pulse width modulation signal (NPWM) being the complementary over a period T of the first pulse width modulation signal; - applying, for at least part of each commutation step (Step1), by the electronic control unit, said first pulse width modulation signal to gate terminals of first transistors (T1,T4), the first transistors being the upper transistor of a first branch and the lower transistor of a second branch respectively or the lower transistor of the first branch and the upper transistor of the second branch respectively, of the three branches that make up the three-phase inverter to enable electric current conduction through said first transistors (T1,T4); - applying, for at least part of each commutation step (Step1), by the electronic control unit, said second pulse width modulation signal (NPWM) to gate terminals of second transistors (T2, T3) of the first and second branch of the three branches that make up the three-phase inverter, said second transistors being different from the first transistors, to disable electric current conduction through said second transistors (T2, T3); - subdividing, by the electronic control unit, each commutation step (Step1) of the six commutation steps into a first commutation step portion (Step1.1) and into a subsequent second commutation step portion (Step1.2), wherein each commutation step (Step1) of said six commutation steps has an extent of 60 electrical degrees and wherein the first commutation step portion (Step1.1) of each commutation step has a first extent and the subsequent second commutation step portion (Step1.2) has a second extent greater than the first extent, wherein, for each commutation step, during the first commutation step portion (Step1.1), the method comprises: - applying, by the electronic control unit, a first signal (E1; PWM--, E1) to the gate terminals of said first transistors (T1, T4) when the first pulse width modulation signal is applied to said first transistors in the subsequent second commutation step portion (Step1.2), - applying, by the electronic control unit, a second signal (E2; PWM++, E2) to the gate terminals of said second transistors (T2, T3) when the second pulse width modulation signal (NPWM) is applied to said second transistors in the subsequent second commutation step portion (Step1.2),