A system-on-a-chip, SoC, comprising: a first chiplet comprising: a first set of sensors configured to measure first sensory parameters throughout the first chiplet to obtain first sensory information; a first power controller configured to receive the first sensory information from the first set of sensors; and a first communication interface configured to receive a first voltage change message from the first power controller based on the first sensory information; a second chiplet comprising: a second set of sensors configured to measure second sensory parameters throughout the second chiplet to obtain second sensory information; a second power controller configured to receive the second sensory information from the second set of sensors; a second communication interface configured to receive a second voltage change message from the second power controller based on the second sensory information; and a vote counter that is configured to be initialized with a vote counter value and to increment the vote counter in response to receiving the second voltage change message to adjust a voltage of the second chiplet; and a shared power rail (118; 120) coupled to the first chiplet and the second chiplet; and a power management integrated circuit, PMIC, configured to supply power to the first chiplet and the second chiplet across the shared power rail (118; 120); wherein: the first communication interface is configured to receive the second voltage change message from the second communication interface; the first communication interface is configured to transmit to the PMIC a power rail adjustment message based on the first voltage change message and the second voltage change message; and the PMIC is configured to adjust a voltage of at least one of the first chiplet and the second chiplet based on the power rail adjustment message. a first chiplet comprising: a first set of sensors configured to measure first sensory parameters throughout the first chiplet to obtain first sensory information; a first power controller configured to receive the first sensory information from the first set of sensors; and a first communication interface configured to receive a first voltage change message from the first power controller based on the first sensory information; a first set of sensors configured to measure first sensory parameters throughout the first chiplet to obtain first sensory information; a first power controller configured to receive the first sensory information from the first set of sensors; and a first communication interface configured to receive a first voltage change message from the first power controller based on the first sensory information; a second chiplet comprising: a second set of sensors configured to measure second sensory parameters throughout the second chiplet to obtain second sensory information; a second power controller configured to receive the second sensory information from the second set of sensors; a second communication interface configured to receive a second voltage change message from the second power controller based on the second sensory information; and a vote counter that is configured to be initialized with a vote counter value and to increment the vote counter in response to receiving the second voltage change message to adjust a voltage of the second chiplet; and a second set of sensors configured to measure second sensory parameters throughout the second chiplet to obtain second sensory information; a second power controller configured to receive the second sensory information from the second set of sensors; a second communication interface configured to receive a second voltage change message from the second power controller based on the second sensory information; and a vote counter that is configured to be initialized with a vote counter value and to increment the vote counter in response to receiving the second voltage change message to adjust a voltage of the second chiplet; and a shared power rail (118; 120) coupled to the first chiplet and the second chiplet; and a power management integrated circuit, PMIC, configured to supply power to the first chiplet and the second chiplet across the shared power rail (118; 120); wherein: the first communication interface is configured to receive the second voltage change message from the second communication interface; the first communication interface is configured to transmit to the PMIC a power rail adjustment message based on the first voltage change message and the second voltage change message; and the PMIC is configured to adjust a voltage of at least one of the first chiplet and the second chiplet based on the power rail adjustment message. the first communication interface is configured to receive the second voltage change message from the second communication interface; the first communication interface is configured to transmit to the PMIC a power rail adjustment message based on the first voltage change message and the second voltage change message; and the PMIC is configured to adjust a voltage of at least one of the first chiplet and the second chiplet based on the power rail adjustment message.