A semiconductor device comprising: first and second transistors (Tr1, Tr2), each of the first and second transistors (Tr1, Tr2) being formed with a plurality of fin transistors, and the first and second transistors (Tr1, Tr2) being connected to electrically share a source, wherein the plurality of fin transistors each include an active fin layer, the active fin layer protruding from a semiconductor substrate, a source layer serving as a fin transistor source being formed on one end of the active fin layer, and a drain layer on the other end of the active fin layer so as to form a channel region, the drain layers of the plurality of fin transistors forming the first transistor being connected to a first common drain and the drain layers of the plurality of fin transistors forming the second transistor being connected to a second common drain, wherein a gate electrode is formed via an insulating film on each of the active fin layers between the drain and source layers (18, 19), and wherein either: a) the gate electrodes on the active fin layers are connected together, or b) the gate electrodes on the active fin layers included in the first transistor are connected together, and the gate electrodes on the active fin layers included in the second transistor are connected together, characterized in that the active fin layers are arranged adjacent to each other in parallel so that the drain layers of the active fin layers form drains of the first and second transistors (Tr1, Tr2), and the drain layers are disposed so that when a positive voltage is applied to the drain layers of each of the active fin layers, currents flowing from the drain layer to the source layer in first fin transistors of the first transistor flow in opposite directions to the currents in second fin transistors of the first transistor, in order for the currents in the first transistor to cancel each other out, and currents flowing from the drain layer to the source layer in first fin transistors of the second transistor flow in opposite directions to the currents in second fin transistors of the second transistor, in order for the currents in the second transistor to cancel each other out. first and second transistors (Tr1, Tr2), each of the first and second transistors (Tr1, Tr2) being formed with a plurality of fin transistors, and the first and second transistors (Tr1, Tr2) being connected to electrically share a source, wherein the plurality of fin transistors each include an active fin layer, the active fin layer protruding from a semiconductor substrate, a source layer serving as a fin transistor source being formed on one end of the active fin layer, and a drain layer on the other end of the active fin layer so as to form a channel region, an active fin layer, the active fin layer protruding from a semiconductor substrate, a source layer serving as a fin transistor source being formed on one end of the active fin layer, and a drain layer on the other end of the active fin layer so as to form a channel region, the drain layers of the plurality of fin transistors forming the first transistor being connected to a first common drain and the drain layers of the plurality of fin transistors forming the second transistor being connected to a second common drain, wherein a gate electrode is formed via an insulating film on each of the active fin layers between the drain and source layers (18, 19), and wherein either: a) the gate electrodes on the active fin layers are connected together, or b) the gate electrodes on the active fin layers included in the first transistor are connected together, and the gate electrodes on the active fin layers included in the second transistor are connected together, a gate electrode is formed via an insulating film on each of the active fin layers between the drain and source layers (18, 19), and wherein either: a) the gate electrodes on the active fin layers are connected together, or b) the gate electrodes on the active fin layers included in the first transistor are connected together, and a) the gate electrodes on the active fin layers are connected together, or b) the gate electrodes on the active fin layers included in the first transistor are connected together, and the gate electrodes on the active fin layers included in the second transistor are connected together, characterized in that the active fin layers are arranged adjacent to each other in parallel so that the drain layers of the active fin layers form drains of the first and second transistors (Tr1, Tr2), and the drain layers are disposed so that when a positive voltage is applied to the drain layers of each of the active fin layers, currents flowing from the drain layer to the source layer in first fin transistors of the first transistor flow in opposite directions to the currents in second fin transistors of the first transistor, in order for the currents in the first transistor to cancel each other out, and currents flowing from the drain layer to the source layer in first fin transistors of the second transistor flow in opposite directions to the currents in second fin transistors of the second transistor, in order for the currents in the second transistor to cancel each other out.