A liquid crystal display device comprising: a display panel including a display area and a non-display area surrounding the display area; a plurality of gate lines and data lines arranged in the display area to intersect each other with a gate insulating layer therebetween, so as to define a plurality of pixel regions; a plurality of first common lines provided between the neighboring gate lines and arranged in a same layer as and parallel to the gate lines; a plurality of second common lines provided between the neighboring data lines and arranged in a same layer as and parallel to the data lines; thin-film transistors formed at respective intersections of the gate lines and the data lines; a protective film formed over the thin-film transistors, the gate lines, the data lines, the first common lines and the second common lines; a pixel electrode and a common electrode formed on the protective film in each pixel region, the pixel electrode and the common electrode disposed in the same layer; wherein each pixel electrode is connected to a corresponding thin film transistor, and the second common lines are electrically connected to the first common lines; characterized in that the first common lines comprise common line branches branching from the first common lines and extending into the pixel regions, wherein in each pixel region a respective first common line and a respective second common line are electrically connected to each other in a manner that in an overlap region between a common line branch and the common electrode a contact hole is formed for connecting the common electrode with the first common line, and that in an overlap region between a second common line and the common electrode a contact hole is formed for connecting the common electrode with the second common line. a display panel including a display area and a non-display area surrounding the display area; a plurality of gate lines and data lines arranged in the display area to intersect each other with a gate insulating layer therebetween, so as to define a plurality of pixel regions; a plurality of first common lines provided between the neighboring gate lines and arranged in a same layer as and parallel to the gate lines; a plurality of second common lines provided between the neighboring data lines and arranged in a same layer as and parallel to the data lines; thin-film transistors formed at respective intersections of the gate lines and the data lines; a protective film formed over the thin-film transistors, the gate lines, the data lines, the first common lines and the second common lines; a pixel electrode and a common electrode formed on the protective film in each pixel region, the pixel electrode and the common electrode disposed in the same layer; wherein each pixel electrode is connected to a corresponding thin film transistor, and the second common lines are electrically connected to the first common lines; the first common lines comprise common line branches branching from the first common lines and extending into the pixel regions, wherein in each pixel region a respective first common line and a respective second common line are electrically connected to each other in a manner that in an overlap region between a common line branch and the common electrode a contact hole is formed for connecting the common electrode with the first common line, and that in an overlap region between a second common line and the common electrode a contact hole is formed for connecting the common electrode with the second common line.