A method for manufacturing an NMOS transistor, in particular for high substrate voltages, comprising - a p-doped p-semiconductor substrate having an upper side, - an n-doped n-well introduced into the upper side by ion implantation and thermal diffusion, - a p-doped pbody region formed in the n-well, reaching up to the upper side of the p-semiconductor substrate and comprising a connecting region, in which pbody region an n-doped source connecting region on the upper side of the semiconductor substrate and a channel region on the upper side of the semiconductor region are formed, - an n-doped drain connecting region on the upper side of the semiconductor substrate and formed in the n-well, - an additional n-doped drift zone formed in the n-well, which drift zone extends between the pbody region and the n-doped drain connecting region, - a p-doped pRESURF zone formed in the n-well below the n-doped drift zone, and - a gate comprising a gate isolation layer and a gate electrode provided thereon, which gate is arranged on the upper side of the semiconductor substrate and extends across the pbody region and across the n-doped drift zone, - wherein the n-doped pRESURF zone lies laterally next to the pbody region, wherein the lower side of the pbody region facing away from the upper side of the semiconductor substrate directly abuts on the n-well at least in one subregion, and - wherein the pRESURF zone - is connected to the pbody region in an electrically conducting manner or - is metallurgically connected to the pbody region, that is both transition into each other, or - is connected to the pbody region in an electrically conducting manner, characterized in that - a LOCOS process is used, where a cover layer of a material preventing oxidation of the surface of the semiconductor substrate is applied in some regions for producing individual localized oxide regions on the upper side of the semiconductor substrate, wherein at least one ion implantation is carried out using an implantation mask for producing the n-doped drift zone and/or the p-doped pRESURF zone at a time during the manufacture of the NMOS transistor when the cover layer has not yet been removed from the upper side of the semiconductor substrate, that is the implantation mask is applied to the localized oxide regions (24, 32) and the complementary cover layer. - a p-doped p-semiconductor substrate having an upper side, - an n-doped n-well introduced into the upper side by ion implantation and thermal diffusion, - a p-doped pbody region formed in the n-well, reaching up to the upper side of the p-semiconductor substrate and comprising a connecting region, in which pbody region an n-doped source connecting region on the upper side of the semiconductor substrate and a channel region on the upper side of the semiconductor region are formed, - an n-doped drain connecting region on the upper side of the semiconductor substrate and formed in the n-well, - an additional n-doped drift zone formed in the n-well, which drift zone extends between the pbody region and the n-doped drain connecting region, - a p-doped pRESURF zone formed in the n-well below the n-doped drift zone, and - a gate comprising a gate isolation layer and a gate electrode provided thereon, which gate is arranged on the upper side of the semiconductor substrate and extends across the pbody region and across the n-doped drift zone, - wherein the n-doped pRESURF zone lies laterally next to the pbody region, wherein the lower side of the pbody region facing away from the upper side of the semiconductor substrate directly abuts on the n-well at least in one subregion, and - wherein the pRESURF zone - is connected to the pbody region in an electrically conducting manner or - is metallurgically connected to the pbody region, that is both transition into each other, or - is connected to the pbody region in an electrically conducting manner, - is connected to the pbody region in an electrically conducting manner or - is metallurgically connected to the pbody region, that is both transition into each other, or - is connected to the pbody region in an electrically conducting manner, - a LOCOS process is used, where a cover layer of a material preventing oxidation of the surface of the semiconductor substrate is applied in some regions for producing individual localized oxide regions on the upper side of the semiconductor substrate, wherein at least one ion implantation is carried out using an implantation mask for producing the n-doped drift zone and/or the p-doped pRESURF zone at a time during the manufacture of the NMOS transistor when the cover layer has not yet been removed from the upper side of the semiconductor substrate, that is the implantation mask is applied to the localized oxide regions (24, 32) and the complementary cover layer.