A switching system comprising: a plurality of diodes (20, 21, 22, 23) forming a diode bridge; and a micro-mechanical system (MEMS) switch array closely coupled to the plurality of diodes, the MEMS switch array being electrically connected in an (M x N) array, the (M x N) array including a first MEMS switch leg electrically connected in parallel with a second MEMS switch leg, the first MEMS switch leg including a first plurality of MEMS dies electrically connected in series, and the second MEMS switch leg including a second plurality of MEMS dies electrically connected in series, characterized in that the first MEMS switch leg including the first plurality of MEMS dies includes a first MEMS die, a second MEMS die, a third MEMS die, and a fourth MEMS die, the second MEMS switch leg including the second plurality of MEMS dies includes a fifth MEMS die, a sixth MEMS die, a seventh MEMS die and an eighth MEMS die that are connected in series, a first grading network (90, 93) including a first resistor and a first capacitor connected in parallel, the first grading network (90, 93) being connected in parallel to the first and second MEMS dies (47, 48) of the first MEMS switch leg and the fifth MEMS die of the second MEMS switch leg, the first grading network (90, 93) further including a fourth resistor and a fourth capacitor, the first grading network (90, 93) further being connected in parallel to the third and fourth MEMS dies (49, 50) of the first MEMS switch leg and the eighth MEMS die of the second MEMS switch leg, and a second grading network (91, 92) including a second resistor and a second capacitor, a third resistor and a third capacitor, the second grading network (91, 92) connected in parallel to the first and second MEMS dies (47, 48) and the third and fourth MEMS dies (49, 50). a plurality of diodes (20, 21, 22, 23) forming a diode bridge; and a micro-mechanical system (MEMS) switch array closely coupled to the plurality of diodes, the MEMS switch array being electrically connected in an (M x N) array, the (M x N) array including a first MEMS switch leg electrically connected in parallel with a second MEMS switch leg, the first MEMS switch leg including a first plurality of MEMS dies electrically connected in series, and the second MEMS switch leg including a second plurality of MEMS dies electrically connected in series, characterized in that the first MEMS switch leg including the first plurality of MEMS dies includes a first MEMS die, a second MEMS die, a third MEMS die, and a fourth MEMS die, the second MEMS switch leg including the second plurality of MEMS dies includes a fifth MEMS die, a sixth MEMS die, a seventh MEMS die and an eighth MEMS die that are connected in series, a first grading network (90, 93) including a first resistor and a first capacitor connected in parallel, the first grading network (90, 93) being connected in parallel to the first and second MEMS dies (47, 48) of the first MEMS switch leg and the fifth MEMS die of the second MEMS switch leg, the first grading network (90, 93) further including a fourth resistor and a fourth capacitor, the first grading network (90, 93) further being connected in parallel to the third and fourth MEMS dies (49, 50) of the first MEMS switch leg and the eighth MEMS die of the second MEMS switch leg, and a second grading network (91, 92) including a second resistor and a second capacitor, a third resistor and a third capacitor, the second grading network (91, 92) connected in parallel to the first and second MEMS dies (47, 48) and the third and fourth MEMS dies (49, 50).