Computer device with a synchronization barrier, comprising: - a memory (RAM, 202), - a processing unit, capable of multiprocess processing on various processors (PZ, 200) and enabling a parallel execution of blocks by processes, said blocks being associated by groups in successive work steps, - a hardware circuit (HBM, 400) with a usable address space to the memory (RAM, 202), capable of receiving a call from each process indicating the end of execution of a block in progress, each call comprising data, wherein the processes include a first group of processes and a second group of processes, distinct from each other, wherein said hardware circuit (HBM, 400) is arranged to perform a first level of synchronization of the first group, respectively second group, processes, by performing the following steps: • extracting the number of first group, respectively second group, processes, from a first call of a process from the first group, respectively second group, • downcounting on this number from other calls, wherein the first group, respectively second group, processes are synchronized when the downcounting indicates that all the blocks of the first group, respectively second group, processes of the work step in progress have been executed, wherein said hardware circuit (HBM, 400) is further arranged to: • when the first level of synchronization has been performed for the first group, respectively second group, choose one of the first group, respectively second group, processes as a master, • send a response to the master process of the first group, respectively second group, indicating that this process is the master of the first group, respectively second group, such that the first group master process and the second group master process perform a second level of synchronization to synchronize the first group and the second group with each other, • receiving a call from the first group, respectively second group, master process, indicating that the master process has performed the second level of synchronization, • after receipt of the call from the first group master process and the call from the second group master process, indicating that the first group master process and the second group master process have performed the second level of synchronization, send responses to the other processes of the first group and the second group to authorize the execution of blocks of a later work step, wherein the access to the hardware circuit's address space is performed by segments drawn from said data of each call, said data more particularly including the address of the hardware circuit in the address space. - a memory (RAM, 202), - a processing unit, capable of multiprocess processing on various processors (PZ, 200) and enabling a parallel execution of blocks by processes, said blocks being associated by groups in successive work steps, - a hardware circuit (HBM, 400) with a usable address space to the memory (RAM, 202), capable of receiving a call from each process indicating the end of execution of a block in progress, each call comprising data, • extracting the number of first group, respectively second group, processes, from a first call of a process from the first group, respectively second group, • downcounting on this number from other calls, • when the first level of synchronization has been performed for the first group, respectively second group, choose one of the first group, respectively second group, processes as a master, • send a response to the master process of the first group, respectively second group, indicating that this process is the master of the first group, respectively second group, such that the first group master process and the second group master process perform a second level of synchronization to synchronize the first group and the second group with each other, • receiving a call from the first group, respectively second group, master process, indicating that the master process has performed the second level of synchronization, • after receipt of the call from the first group master process and the call from the second group master process, indicating that the first group master process and the second group master process have performed the second level of synchronization, send responses to the other processes of the first group and the second group to authorize the execution of blocks of a later work step,