Apparatus for processing data, comprising: a plurality of registers to hold respective data values, each of said plurality of registers having an associated ownership variable; processing circuitry to perform data processing operations specified by program instructions upon data values held within said plurality of registers; register access control circuitry responsive to an ownership value specified by said associated ownership variable for a register of said plurality of registers to control access to said register by said processing circuitry in dependence upon said ownership value; and exception level control circuitry to control said processing circuitry to operate in a current exception level among a plurality of exception levels, wherein: said ownership value specifies one of said plurality of exception level states, and said register access control circuitry restricts access to said register by said processing circuitry to perform data processing operations specified by at least some program instructions when said current exception level is different in a predetermined manner from that specified by said ownership value, and said plurality of exception levels corresponds to a hierarchy of privilege levels extending from a lowest privilege level to a highest privilege level, an exception condition arising in operation of said processing circuitry, when operating at an exception level corresponding to a privilege level lower than said highest privilege level, triggering a switch to an exception level with a higher level of privilege, and said predetermined manner is that said current exception level is higher in said hierarchy than an exception level specified by said ownership value, and the lowest privilege level is less privileged than the highest privilege level. a plurality of registers to hold respective data values, each of said plurality of registers having an associated ownership variable; processing circuitry to perform data processing operations specified by program instructions upon data values held within said plurality of registers; register access control circuitry responsive to an ownership value specified by said associated ownership variable for a register of said plurality of registers to control access to said register by said processing circuitry in dependence upon said ownership value; and exception level control circuitry to control said processing circuitry to operate in a current exception level among a plurality of exception levels, wherein: said ownership value specifies one of said plurality of exception level states, and said register access control circuitry restricts access to said register by said processing circuitry to perform data processing operations specified by at least some program instructions when said current exception level is different in a predetermined manner from that specified by said ownership value, and said plurality of exception levels corresponds to a hierarchy of privilege levels extending from a lowest privilege level to a highest privilege level, an exception condition arising in operation of said processing circuitry, when operating at an exception level corresponding to a privilege level lower than said highest privilege level, triggering a switch to an exception level with a higher level of privilege, and said predetermined manner is that said current exception level is higher in said hierarchy than an exception level specified by said ownership value, and the lowest privilege level is less privileged than the highest privilege level. said ownership value specifies one of said plurality of exception level states, and said register access control circuitry restricts access to said register by said processing circuitry to perform data processing operations specified by at least some program instructions when said current exception level is different in a predetermined manner from that specified by said ownership value, and said plurality of exception levels corresponds to a hierarchy of privilege levels extending from a lowest privilege level to a highest privilege level, an exception condition arising in operation of said processing circuitry, when operating at an exception level corresponding to a privilege level lower than said highest privilege level, triggering a switch to an exception level with a higher level of privilege, and said predetermined manner is that said current exception level is higher in said hierarchy than an exception level specified by said ownership value, and the lowest privilege level is less privileged than the highest privilege level.