An active matrix substrate including a thin film transistor, the thin film transistor having an oxide semiconductor, comprising: a gate electrode, a source electrode, and a drain electrode of the thin film transistor; a signal line for supplying a voltage to the source electrode; a scanning line for supplying a switching signal for the thin film transistor; and a source connection line for interconnecting the signal line and the source electrode; and a semiconductor layer connected to the source electrode and the drain electrode, the semiconductor layer being made of an oxide semiconductor, wherein, the active matrix substrate further comprises a gate insulating layer of silicon oxide which is on the gate electrode, and on which the source electrode, the drain electrode, and the semiconductor layer are arranged, a first protection layer of silicon nitride which is on the gate insulating layer, the signal line and the source connection line, which is not in contact with the semiconductor layer, and which has no overlap with the semiconductor layer when viewed along a normal to the active matrix substrate; and a second protection layer of silicon oxide which is on the semiconductor layer; or the active matrix substrate further comprises a first protection layer of silicon nitride which is on the signal line and the source connection line, which is not in contact with the semiconductor layer, and which has no overlap with the semiconductor layer when viewed along a normal to the active matrix substrate; a gate insulating layer of silicon oxide which is on the semiconductor layer, and on which the gate electrode is arranged above a channel portion of the semiconductor layer, and a second protection layer of silicon nitride which is on the gate electrode. a gate electrode, a source electrode, and a drain electrode of the thin film transistor; a signal line for supplying a voltage to the source electrode; a scanning line for supplying a switching signal for the thin film transistor; and a source connection line for interconnecting the signal line and the source electrode; and a semiconductor layer connected to the source electrode and the drain electrode, the semiconductor layer being made of an oxide semiconductor, wherein, the active matrix substrate further comprises a gate insulating layer of silicon oxide which is on the gate electrode, and on which the source electrode, the drain electrode, and the semiconductor layer are arranged, a first protection layer of silicon nitride which is on the gate insulating layer, the signal line and the source connection line, which is not in contact with the semiconductor layer, and which has no overlap with the semiconductor layer when viewed along a normal to the active matrix substrate; and a second protection layer of silicon oxide which is on the semiconductor layer; or the active matrix substrate further comprises a first protection layer of silicon nitride which is on the signal line and the source connection line, which is not in contact with the semiconductor layer, and which has no overlap with the semiconductor layer when viewed along a normal to the active matrix substrate; a gate insulating layer of silicon oxide which is on the semiconductor layer, and on which the gate electrode is arranged above a channel portion of the semiconductor layer, and a second protection layer of silicon nitride which is on the gate electrode. the active matrix substrate further comprises a gate insulating layer of silicon oxide which is on the gate electrode, and on which the source electrode, the drain electrode, and the semiconductor layer are arranged, a first protection layer of silicon nitride which is on the gate insulating layer, the signal line and the source connection line, which is not in contact with the semiconductor layer, and which has no overlap with the semiconductor layer when viewed along a normal to the active matrix substrate; and a second protection layer of silicon oxide which is on the semiconductor layer; or a first protection layer of silicon nitride which is on the gate insulating layer, the signal line and the source connection line, which is not in contact with the semiconductor layer, and which has no overlap with the semiconductor layer when viewed along a normal to the active matrix substrate; and a second protection layer of silicon oxide which is on the semiconductor layer; or the active matrix substrate further comprises a first protection layer of silicon nitride which is on the signal line and the source connection line, which is not in contact with the semiconductor layer, and which has no overlap with the semiconductor layer when viewed along a normal to the active matrix substrate; a gate insulating layer of silicon oxide which is on the semiconductor layer, and on which the gate electrode is arranged above a channel portion of the semiconductor layer, and a second protection layer of silicon nitride which is on the gate electrode. a gate insulating layer of silicon oxide which is on the semiconductor layer, and on which the gate electrode is arranged above a channel portion of the semiconductor layer, and a second protection layer of silicon nitride which is on the gate electrode.