An inverter with power cell of dual structure, the inverter comprising: a plurality of power cells each with a plurality of power cell regions, where each phase of power is formed by serially connecting a plurality of the power cells, and each of the plurality of power cells is configured to receive a power supplied from a phase shift transformer: characterized in that each power cell comprises: a first SMPS (Switching Mode Power Supply, 210) connected to a first region, a second SMPS connected to a second region and a controller connected to the first and second SMPSs (210, 220), wherein the first region is configured to include a first rectification unit, a first capacitor and a first inverter unit, and the second region is configured to include a second rectification unit, a second capacitor and a second inverter unit, wherein the first capacitor and the second capacitor are serially connected, wherein the controller is configured to control the first SMPS and the second SMPS, wherein the first SMPS is arranged to generate inverter gate signals to control the first inverter unit by receiving a first control signal from the controller, wherein the second SMPS is arranged to generate inverter gate signals to control the second inverter unit by receiving a second control signal from the controller, wherein each of the first rectification unit and the second rectification unit is configured to include a plurality of thyristors (SCR1-SCR3, SCR4-SCR6) to prevent inrush current, and wherein the first SMPS is arranged to generate thyristor gate signals to drive the thyristors (SCR1-SCR3) of the first rectification unit using the first DC link voltage generated by the first capacitor as a power source, and the second SMPS is arranged to generate thyristor gate signals to drive the thyristors (SCR4-SCR6) of the second rectification unit using the second DC link voltage generated by the second capacitor as a power source, wherein the first inverter unit includes first and second inverter groups (151, 152) each formed with a plurality of unit inverters, and the second inverter unit includes third and fourth inverter groups (161, 162) each formed with a plurality of unit inverters, wherein the first inverter group is serially connected to the third inverter group at a first contact point and the second inverter group is serially connected to the fourth inverter group at a second contact point. a first SMPS (Switching Mode Power Supply, 210) connected to a first region, a second SMPS connected to a second region and a controller connected to the first and second SMPSs (210, 220), wherein the first region is configured to include a first rectification unit, a first capacitor and a first inverter unit, and the second region is configured to include a second rectification unit, a second capacitor and a second inverter unit, wherein the first capacitor and the second capacitor are serially connected, wherein the controller is configured to control the first SMPS and the second SMPS, wherein the first SMPS is arranged to generate inverter gate signals to control the first inverter unit by receiving a first control signal from the controller, wherein the second SMPS is arranged to generate inverter gate signals to control the second inverter unit by receiving a second control signal from the controller, wherein each of the first rectification unit and the second rectification unit is configured to include a plurality of thyristors (SCR1-SCR3, SCR4-SCR6) to prevent inrush current, and wherein the first SMPS is arranged to generate thyristor gate signals to drive the thyristors (SCR1-SCR3) of the first rectification unit using the first DC link voltage generated by the first capacitor as a power source, and the second SMPS is arranged to generate thyristor gate signals to drive the thyristors (SCR4-SCR6) of the second rectification unit using the second DC link voltage generated by the second capacitor as a power source, wherein the first inverter unit includes first and second inverter groups (151, 152) each formed with a plurality of unit inverters, and the second inverter unit includes third and fourth inverter groups (161, 162) each formed with a plurality of unit inverters, wherein the first inverter group is serially connected to the third inverter group at a first contact point and the second inverter group is serially connected to the fourth inverter group at a second contact point.