A voltage control device (100, 200, 300) comprising: a charge pump (110, 310) configured to provide a first voltage; a driving circuit (120, 320) coupled to the charge pump (110, 310) and configured to receive the first voltage and a reference voltage and to output a driving signal (SIG OUT) by shifting levels of an input signal (SIG IN) to one of the first voltage and the reference voltage, the driving circuit comprising a first inverter, the first inverter comprising at least one stage and each stage of the first inverter comprising: an input terminal configured to receive a first shift signal (SIG LS1) having a phase following wtttrthe input signal (SIG IN) or an inversion signal (SIG INV1) output by a previous stage of the first inverter, a first power terminal configured to receive the reference voltage, a second power terminal configured to receive the first voltage, an output terminal configured to output an inversion signal (SIG INV1) or the driving signal (SIGout), a first P-type transistor (P1A), having a first terminal coupled to the first power terminal, a second terminal coupled to the output terminal and a control terminal coupled to the input terminal, and a first N-type transistor (N1A), having a first terminal coupled to the second terminal of the first P-type transistor (P1A), a second terminal coupled to the second power terminal and a control terminal coupled to the control terminal of the first P-type transistor (P1A); the voltage control device characterized by a control circuit (130, 230, 330) coupled to the charge pump (110, 310) and the driving circuit (120, 320) and configured to supply the reference voltage to the driving circuit, to compare the first voltage to a predefined threshold value, and, based on a comparison result, to instantly adjust the reference voltage to provide for a voltage gap between the first voltage and the reference voltage, such that sufficient headroom for the operation voltages of the first inverter is provided and simultaneous conduction of the first P-type (P1A) and first N-type (N1A) transistor is avoided. a charge pump (110, 310) configured to provide a first voltage; a driving circuit (120, 320) coupled to the charge pump (110, 310) and configured to receive the first voltage and a reference voltage and to output a driving signal (SIG OUT) by shifting levels of an input signal (SIG IN) to one of the first voltage and the reference voltage, the driving circuit comprising a first inverter, the first inverter comprising at least one stage and each stage of the first inverter comprising: an input terminal configured to receive a first shift signal (SIG LS1) having a phase following wtttrthe input signal (SIG IN) or an inversion signal (SIG INV1) output by a previous stage of the first inverter, a first power terminal configured to receive the reference voltage, a second power terminal configured to receive the first voltage, an output terminal configured to output an inversion signal (SIG INV1) or the driving signal (SIGout), a first P-type transistor (P1A), having a first terminal coupled to the first power terminal, a second terminal coupled to the output terminal and a control terminal coupled to the input terminal, and a first N-type transistor (N1A), having a first terminal coupled to the second terminal of the first P-type transistor (P1A), a second terminal coupled to the second power terminal and a control terminal coupled to the control terminal of the first P-type transistor (P1A); the voltage control device characterized by a control circuit (130, 230, 330) coupled to the charge pump (110, 310) and the driving circuit (120, 320) and configured to supply the reference voltage to the driving circuit, to compare the first voltage to a predefined threshold value, and, based on a comparison result, to instantly adjust the reference voltage to provide for a voltage gap between the first voltage and the reference voltage, such that sufficient headroom for the operation voltages of the first inverter is provided and simultaneous conduction of the first P-type (P1A) and first N-type (N1A) transistor is avoided. an input terminal configured to receive a first shift signal (SIG LS1) having a phase following wtttrthe input signal (SIG IN) or an inversion signal (SIG INV1) output by a previous stage of the first inverter, a first power terminal configured to receive the reference voltage, a second power terminal configured to receive the first voltage, an output terminal configured to output an inversion signal (SIG INV1) or the driving signal (SIGout), a first P-type transistor (P1A), having a first terminal coupled to the first power terminal, a second terminal coupled to the output terminal and a control terminal coupled to the input terminal, and a first N-type transistor (N1A), having a first terminal coupled to the second terminal of the first P-type transistor (P1A), a second terminal coupled to the second power terminal and a control terminal coupled to the control terminal of the first P-type transistor (P1A); the voltage control device characterized by a control circuit (130, 230, 330) coupled to the charge pump (110, 310) and the driving circuit (120, 320) and configured to supply the reference voltage to the driving circuit, to compare the first voltage to a predefined threshold value, and, based on a comparison result, to instantly adjust the reference voltage to provide for a voltage gap between the first voltage and the reference voltage, such that sufficient headroom for the operation voltages of the first inverter is provided and simultaneous conduction of the first P-type (P1A) and first N-type (N1A) transistor is avoided.