An implantable medical device comprising: a processor; and a system clock that comprises a low power oscillator, according to which the processor operates the IMD; a reference clock that comprises a high accuracy oscillator; and a clock calibrator configured to periodically perform a calibration routine to calibrate the system clock based on the reference clock, wherein the system clock is continuously powered and the reference clock is powered during the calibration routine, wherein the clock calibrator comprises: a controller configured to power on the reference clock at a start of the calibration routine, and to disable the reference clock at an end of the calibration routine; a clock comparator configured to determine a clock error of the system clock based on a difference between frequencies of the system clock and the reference clock over a fixed number of clock cycles of the system clock; and a clock adjuster configured to adjust a trim value of the system clock to compensate for the clock error; and characterised in that: the clock calibrator is configured to perform the calibration routine with a delta-sigma loop, and wherein the clock adjuster is configured to integrate the clock error over time to calculate a cumulative clock error of the system clock, and to adjust the trim value of the system clock based on a magnitude and sign of the cumulative clock error. a processor; and a system clock that comprises a low power oscillator, according to which the processor operates the IMD; a reference clock that comprises a high accuracy oscillator; and a clock calibrator configured to periodically perform a calibration routine to calibrate the system clock based on the reference clock, wherein the system clock is continuously powered and the reference clock is powered during the calibration routine, wherein the clock calibrator comprises: a controller configured to power on the reference clock at a start of the calibration routine, and to disable the reference clock at an end of the calibration routine; a clock comparator configured to determine a clock error of the system clock based on a difference between frequencies of the system clock and the reference clock over a fixed number of clock cycles of the system clock; and a clock adjuster configured to adjust a trim value of the system clock to compensate for the clock error; and characterised in that: a controller configured to power on the reference clock at a start of the calibration routine, and to disable the reference clock at an end of the calibration routine; a clock comparator configured to determine a clock error of the system clock based on a difference between frequencies of the system clock and the reference clock over a fixed number of clock cycles of the system clock; and a clock adjuster configured to adjust a trim value of the system clock to compensate for the clock error; and characterised in that: the clock calibrator is configured to perform the calibration routine with a delta-sigma loop, and wherein the clock adjuster is configured to integrate the clock error over time to calculate a cumulative clock error of the system clock, and to adjust the trim value of the system clock based on a magnitude and sign of the cumulative clock error.