A circuit for converting a negative voltage to a positive proportional voltage, the circuit comprising: a first power supply terminal (Vdd); a second power supply terminal (Vss); an input node coupled to receive the negative voltage; an output node coupled to provide the positive proportional voltage; a first resistive element having a first terminal coupled to the input node; a second resistive element having a first terminal coupled to the first power supply terminal; a third resistive element having a first terminal coupled to the first power supply terminal; a first current mirror having: a first transistor having a first current electrode coupled to a second terminal of the second resistive element, and a second transistor having a first current electrode coupled to a second terminal of the third resistive element and a control electrode coupled to a control electrode of the first transistor and a second current electrode of the second transistor, wherein the output node corresponds to the second terminal of the third resistive element; and a second current mirror having: a third transistor having a first current electrode coupled to a second current electrode of the first transistor, a control electrode coupled to the first current electrode of the third transistor, and a second current electrode coupled to the second power supply terminal, and a fourth transistor having a first current electrode coupled to a second current electrode of the second transistor, a control electrode coupled to the control electrode of the third transistor, and a second current electrode coupled to a second terminal of the first resistive element. a first power supply terminal (Vdd); a second power supply terminal (Vss); an input node coupled to receive the negative voltage; an output node coupled to provide the positive proportional voltage; a first resistive element having a first terminal coupled to the input node; a second resistive element having a first terminal coupled to the first power supply terminal; a third resistive element having a first terminal coupled to the first power supply terminal; a first current mirror having: a first transistor having a first current electrode coupled to a second terminal of the second resistive element, and a second transistor having a first current electrode coupled to a second terminal of the third resistive element and a control electrode coupled to a control electrode of the first transistor and a second current electrode of the second transistor, wherein the output node corresponds to the second terminal of the third resistive element; and a first transistor having a first current electrode coupled to a second terminal of the second resistive element, and a second transistor having a first current electrode coupled to a second terminal of the third resistive element and a control electrode coupled to a control electrode of the first transistor and a second current electrode of the second transistor, wherein the output node corresponds to the second terminal of the third resistive element; and a second current mirror having: a third transistor having a first current electrode coupled to a second current electrode of the first transistor, a control electrode coupled to the first current electrode of the third transistor, and a second current electrode coupled to the second power supply terminal, and a fourth transistor having a first current electrode coupled to a second current electrode of the second transistor, a control electrode coupled to the control electrode of the third transistor, and a second current electrode coupled to a second terminal of the first resistive element. a third transistor having a first current electrode coupled to a second current electrode of the first transistor, a control electrode coupled to the first current electrode of the third transistor, and a second current electrode coupled to the second power supply terminal, and a fourth transistor having a first current electrode coupled to a second current electrode of the second transistor, a control electrode coupled to the control electrode of the third transistor, and a second current electrode coupled to a second terminal of the first resistive element.