Method, comprising: forming at least one first trench in a first major surface of the semiconductor wafer in a device region, wherein the semiconductor wafer comprises a second major surface opposing the first major surface and comprises separation regions arranged between component positions of the semiconductor wafer, the component positions comprising the device region comprising a single vertical transistor device, wherein the vertical transistor device comprises a MOSFET device comprising a source electrode and a gate electrode arranged on the first major surface and a drain electrode arranged on the second major surface; forming a first metallization structure on the first surface in the component positions, the first metallization structure comprising a source outer contact pad, a gate outer contact pad and a drain outer contact pad) forming a package footprint; inserting conductive material into the first trench; forming at least one second trench in the first surface of the semiconductor wafer in the separation regions; applying a first epoxy layer to the first surface of a semiconductor wafer such that the second trenches and edge regions of the component positions are covered with the first epoxy layer; removing portions of the second major surface of the semiconductor wafer and revealing portions of the first epoxy layer in the separation regions and the conductive material in the first trenches and producing a worked second surface; applying a second metallization layer to the worked second surface and operably coupling the second metallization layer to the conductive material and the drain outer contact pad on the first major surface, wherein the second metallization layer is coupled to the drain electrode of the vertical transistor device and wherein the conductive material within the first trench provides a vertical conductive via from the drain electrode to the drain outer contact pad; cutting through the first epoxy layer in the separation regions to form a plurality of separate semiconductor packages. forming at least one first trench in a first major surface of the semiconductor wafer in a device region, wherein the semiconductor wafer comprises a second major surface opposing the first major surface and comprises separation regions arranged between component positions of the semiconductor wafer, the component positions comprising the device region comprising a single vertical transistor device, wherein the vertical transistor device comprises a MOSFET device comprising a source electrode and a gate electrode arranged on the first major surface and a drain electrode arranged on the second major surface; forming a first metallization structure on the first surface in the component positions, the first metallization structure comprising a source outer contact pad, a gate outer contact pad and a drain outer contact pad) forming a package footprint; inserting conductive material into the first trench; forming at least one second trench in the first surface of the semiconductor wafer in the separation regions; applying a first epoxy layer to the first surface of a semiconductor wafer such that the second trenches and edge regions of the component positions are covered with the first epoxy layer; removing portions of the second major surface of the semiconductor wafer and revealing portions of the first epoxy layer in the separation regions and the conductive material in the first trenches and producing a worked second surface; applying a second metallization layer to the worked second surface and operably coupling the second metallization layer to the conductive material and the drain outer contact pad on the first major surface, wherein the second metallization layer is coupled to the drain electrode of the vertical transistor device and wherein the conductive material within the first trench provides a vertical conductive via from the drain electrode to the drain outer contact pad; cutting through the first epoxy layer in the separation regions to form a plurality of separate semiconductor packages.