A terminal apparatus for mapping bits to a matrix for transmission, wherein the matrix comprises a first axis and a second axis, the first axis corresponding to a time domain, the second axis corresponding to a frequency domain, the terminal apparatus comprising: an encoding unit configured to: map first coded bits for first channel state information, CSI, onto the matrix starting with a first element of the matrix in a second-axis prioritized manner and in ascending order on the first axis and the second axis; map second coded bits for second CSI and third coded bits for an uplink shared channel, UL-SCH, onto the matrix in a second-axis prioritized manner and in ascending order on the first axis and the second axis; map fourth coded bits for acknowledgment onto the matrix within at least one rectangular block of the matrix comprising one or more columns and one or more rows of the matrix, in the second-axis prioritized manner and in the ascending order on the first axis and the second axis, wherein: a number of bits for the second CSI is determined based on a value of the first CSI, the second coded bits and the third coded bits are not mapped onto elements where the first coded bits and the fourth coded bits are mapped in the matrix, and the fourth coded bits are mapped to predetermined positions of the matrix based on the information of a Physical Downlink Control Channel, PDCCH, and one of the third coded bits is punctured when the one of the third coded bits and one of the fourth coded bits are mapped onto a same element of the matrix; and acquire a sequence from the matrix in the second-axis prioritized manner; and a transmission unit configured to transmit the sequence. map first coded bits for first channel state information, CSI, onto the matrix starting with a first element of the matrix in a second-axis prioritized manner and in ascending order on the first axis and the second axis; map second coded bits for second CSI and third coded bits for an uplink shared channel, UL-SCH, onto the matrix in a second-axis prioritized manner and in ascending order on the first axis and the second axis; map fourth coded bits for acknowledgment onto the matrix within at least one rectangular block of the matrix comprising one or more columns and one or more rows of the matrix, in the second-axis prioritized manner and in the ascending order on the first axis and the second axis, wherein: a number of bits for the second CSI is determined based on a value of the first CSI, the second coded bits and the third coded bits are not mapped onto elements where the first coded bits and the fourth coded bits are mapped in the matrix, and the fourth coded bits are mapped to predetermined positions of the matrix based on the information of a Physical Downlink Control Channel, PDCCH, and one of the third coded bits is punctured when the one of the third coded bits and one of the fourth coded bits are mapped onto a same element of the matrix; and acquire a sequence from the matrix in the second-axis prioritized manner; and a number of bits for the second CSI is determined based on a value of the first CSI, the second coded bits and the third coded bits are not mapped onto elements where the first coded bits and the fourth coded bits are mapped in the matrix, and the fourth coded bits are mapped to predetermined positions of the matrix based on the information of a Physical Downlink Control Channel, PDCCH, and one of the third coded bits is punctured when the one of the third coded bits and one of the fourth coded bits are mapped onto a same element of the matrix; and acquire a sequence from the matrix in the second-axis prioritized manner; and a transmission unit configured to transmit the sequence.