A high-voltage field effect transistor, comprising: a first semiconductor material, a second semiconductor material, and a heterojunction, wherein the heterojunction is disposed between the first semiconductor material and the second semiconductor material; a plurality of composite passivation layers, including a first composite passivation layer with a first insulation layer and a first passivation layer, wherein the first passivation layer is disposed between the second semiconductor material and the first insulation layer and the first insulation layer is made from a dielectric suitable for forming a gate insulator, a second composite passivation layer with a second insulation layer and a second passivation layer, wherein the second passivation layer is disposed between the first insulation layer and the second insulation layer and the second insulation layer is made from a dielectric suitable for forming a gate insulator, and a third composite passivation layer with a third insulation layer and a third passivation layer, wherein the third passivation layer is disposed between the second insulation layer and the third insulation layer; a fourth passivation layer, wherein the third insulation layer is disposed between the fourth passivation layer and the third passivation layer; a first gate field plate disposed between the first passivation layer and the second passivation layer, wherein the first gate field plate is coupled to a gate electrode; a second gate field plate coupled to the first gate field plate, wherein the second gate field plate extends from the second passivation layer, through the second insulation layer, through the third passivation layer, through the third insulation layer, and into the fourth passivation layer; and the high-voltage field effect transistor further comprises a gate dielectric disposed between the first passivation layer and the second semiconductor material, wherein the gate electrode is disposed between the gate dielectric and the first passivation layer. a first semiconductor material, a second semiconductor material, and a heterojunction, wherein the heterojunction is disposed between the first semiconductor material and the second semiconductor material; a plurality of composite passivation layers, including a first composite passivation layer with a first insulation layer and a first passivation layer, wherein the first passivation layer is disposed between the second semiconductor material and the first insulation layer and the first insulation layer is made from a dielectric suitable for forming a gate insulator, a second composite passivation layer with a second insulation layer and a second passivation layer, wherein the second passivation layer is disposed between the first insulation layer and the second insulation layer and the second insulation layer is made from a dielectric suitable for forming a gate insulator, and a third composite passivation layer with a third insulation layer and a third passivation layer, wherein the third passivation layer is disposed between the second insulation layer and the third insulation layer; a first composite passivation layer with a first insulation layer and a first passivation layer, wherein the first passivation layer is disposed between the second semiconductor material and the first insulation layer and the first insulation layer is made from a dielectric suitable for forming a gate insulator, a second composite passivation layer with a second insulation layer and a second passivation layer, wherein the second passivation layer is disposed between the first insulation layer and the second insulation layer and the second insulation layer is made from a dielectric suitable for forming a gate insulator, and a third composite passivation layer with a third insulation layer and a third passivation layer, wherein the third passivation layer is disposed between the second insulation layer and the third insulation layer; a fourth passivation layer, wherein the third insulation layer is disposed between the fourth passivation layer and the third passivation layer; a first gate field plate disposed between the first passivation layer and the second passivation layer, wherein the first gate field plate is coupled to a gate electrode; a second gate field plate coupled to the first gate field plate, wherein the second gate field plate extends from the second passivation layer, through the second insulation layer, through the third passivation layer, through the third insulation layer, and into the fourth passivation layer; and the high-voltage field effect transistor further comprises a gate dielectric disposed between the first passivation layer and the second semiconductor material, wherein the gate electrode is disposed between the gate dielectric and the first passivation layer.