A light emitting diode, comprising: a substrate; a semiconductor stack arranged on the substrate, the semiconductor stack comprising a p-type semiconductor layer, an active layer and an n-type semiconductor layer; a first metal layer interposed between the substrate and the semiconductor stack, the first metal layer is ohmic-contacted with the semiconductor stack; a first electrode pad arranged on the semiconductor stack; an electrode extension extending from the first electrode pad, the electrode extension comprising a contact region being in contact with the n-type semiconductor layer; a first insulating layer interposed between the substrate and the semiconductor stack, the first insulating layer covering a first region of the p-type semiconductor layer under the contact region of the electrode extension (5 la); and a second insulating layer interposed between the first electrode pad and the semiconductor stack; characterized in that the substrate comprises: a first substrate metal layer comprising at least one of W and Mo; and second substrate metal layers (62, 66) arranged on first and second surfaces of the first substrate metal layer, respectively, the second substrate metal layers (62, 66) comprising a higher thermal expansion coefficient than the first metal layer; and adhesive layers (63, 65) interposed between the first substrate metal layer and the second substrate metal layers (62, 66), respectively; wherein the adhesive layers (63, 65) comprise at least one of Ni, Ti, Cr, and Pt. a substrate; a semiconductor stack arranged on the substrate, the semiconductor stack comprising a p-type semiconductor layer, an active layer and an n-type semiconductor layer; a first metal layer interposed between the substrate and the semiconductor stack, the first metal layer is ohmic-contacted with the semiconductor stack; a first electrode pad arranged on the semiconductor stack; an electrode extension extending from the first electrode pad, the electrode extension comprising a contact region being in contact with the n-type semiconductor layer; a first insulating layer interposed between the substrate and the semiconductor stack, the first insulating layer covering a first region of the p-type semiconductor layer under the contact region of the electrode extension (5 la); and a second insulating layer interposed between the first electrode pad and the semiconductor stack; characterized in that the substrate comprises: a first substrate metal layer comprising at least one of W and Mo; and second substrate metal layers (62, 66) arranged on first and second surfaces of the first substrate metal layer, respectively, the second substrate metal layers (62, 66) comprising a higher thermal expansion coefficient than the first metal layer; and a first substrate metal layer comprising at least one of W and Mo; and second substrate metal layers (62, 66) arranged on first and second surfaces of the first substrate metal layer, respectively, the second substrate metal layers (62, 66) comprising a higher thermal expansion coefficient than the first metal layer; and adhesive layers (63, 65) interposed between the first substrate metal layer and the second substrate metal layers (62, 66), respectively; wherein the adhesive layers (63, 65) comprise at least one of Ni, Ti, Cr, and Pt.