A method for interleaving input data having a size of L symbols, comprising the steps of: providing an interleaver memory, an address generator, a comparator and a subtractor, said address generator having N g Pseudo Noise generators (711,721) each including m shift register cells and corresponding to a respective address area of size 2 m, with m>1; wherein the size N of an address area is L + OSV = N g ×2 m by adding an offset value, OSV, to the input data size L, the input data size L not being equal to N g ×2 m; providing OSV random addresses corresponding to random addresses defined by the address generator for the OSV addresses [L...N-1] and using those OSV random addresses as threshold values in the comparator; sequentially storing the input data having a size of L symbols in said interleaver memory; sequentially reading input data symbols from the interleaver memory in a sequence defined by random addresses generated by the address generator and shifted by corresponding specific values by means of the subtractor, each said reading step comprising: generating by means of the address generator a random address; identifying by means of the comparator for said random address how many of the threshold values are smaller than said current random address; shifting said current random address by a specific value by subtracting by means of the subtractor, the number of threshold values, whose value is smaller than said current random address; and reading a symbol of the stored input data from the interleaver memory using the random address as shifted by the subtractor; repeating the reading step of input data from the interleaver memory L times. providing an interleaver memory, an address generator, a comparator and a subtractor, said address generator having N g Pseudo Noise generators (711,721) each including m shift register cells and corresponding to a respective address area of size 2 m, with m>1; wherein the size N of an address area is L + OSV = N g ×2 m by adding an offset value, OSV, to the input data size L, the input data size L not being equal to N g ×2 m; providing OSV random addresses corresponding to random addresses defined by the address generator for the OSV addresses [L...N-1] and using those OSV random addresses as threshold values in the comparator; sequentially storing the input data having a size of L symbols in said interleaver memory; sequentially reading input data symbols from the interleaver memory in a sequence defined by random addresses generated by the address generator and shifted by corresponding specific values by means of the subtractor, each said reading step comprising: generating by means of the address generator a random address; identifying by means of the comparator for said random address how many of the threshold values are smaller than said current random address; shifting said current random address by a specific value by subtracting by means of the subtractor, the number of threshold values, whose value is smaller than said current random address; and reading a symbol of the stored input data from the interleaver memory using the random address as shifted by the subtractor; repeating the reading step of input data from the interleaver memory L times. generating by means of the address generator a random address; identifying by means of the comparator for said random address how many of the threshold values are smaller than said current random address; shifting said current random address by a specific value by subtracting by means of the subtractor, the number of threshold values, whose value is smaller than said current random address; and reading a symbol of the stored input data from the interleaver memory using the random address as shifted by the subtractor; repeating the reading step of input data from the interleaver memory L times.