A transceiver (100, 200), comprising: a first antenna (102, 202) to receive an input signal, wherein the input signal is an RF signal spanning a wide band of frequencies and including weak signals and a strong signal; a first analog to digital converter "ADC" coupled to receive the input signal and provide a digital sample signal in response, wherein the first ADC oversamples the input signal, wherein the digital sample signal at least includes a sample of the strong signal, and wherein the first ADC is a N-bit ADC; a first digital signal processor coupled to receive the digital sample signal and provide a digital cancellation signal in response, wherein the digital cancellation signal is a complementary estimation of the digital sample signal, wherein the first digital signal processor generates the digital cancellation signal using M-bits, wherein M is greater than N; a first digital-to-analog converter "DAC" coupled to receive the digital cancellation signal and provide an analog cancellation signal in response, wherein the first DAC generates quantization noise when converting the digital cancellation signal into the analog cancellation signal, and wherein the quantization noise is injected into the analog cancellation signal; and an adder coupled to receive the input signal and the analog cancellation signal and provide a residual analog signal in response, wherein the residual analog signal is a combination of the input signal and the analog cancellation signal, and wherein the strong signal is at least reduced in the residual analog signal due to the analog cancellation signal; a second ADC coupled to receive the residual analog signal from the adder and provide a digital residual signal in response through sampling the residual analog signal; and a second digital signal processor coupled to receive the digital residual signal and coupled to receive the digital cancellation signal from the first digital signal processor, the second digital signal processor further coupled to provide a digital representation of the input signal including the weak signals and the strong signal in response, wherein the second digital signal processor estimates the quantization noise generated by the first DAC based on the digital cancellation signal received from the first digital signal processor and removes the quantization noise from the digital residual signal by subtracting the estimated quantization noise and reinserts the strong signal to provide the digital representation of the input signal including the weak signals and the strong signal. a first antenna (102, 202) to receive an input signal, wherein the input signal is an RF signal spanning a wide band of frequencies and including weak signals and a strong signal; a first analog to digital converter "ADC" coupled to receive the input signal and provide a digital sample signal in response, wherein the first ADC oversamples the input signal, wherein the digital sample signal at least includes a sample of the strong signal, and wherein the first ADC is a N-bit ADC; a first digital signal processor coupled to receive the digital sample signal and provide a digital cancellation signal in response, wherein the digital cancellation signal is a complementary estimation of the digital sample signal, wherein the first digital signal processor generates the digital cancellation signal using M-bits, wherein M is greater than N; a first digital-to-analog converter "DAC" coupled to receive the digital cancellation signal and provide an analog cancellation signal in response, wherein the first DAC generates quantization noise when converting the digital cancellation signal into the analog cancellation signal, and wherein the quantization noise is injected into the analog cancellation signal; and an adder coupled to receive the input signal and the analog cancellation signal and provide a residual analog signal in response, wherein the residual analog signal is a combination of the input signal and the analog cancellation signal, and wherein the strong signal is at least reduced in the residual analog signal due to the analog cancellation signal; a second ADC coupled to receive the residual analog signal from the adder and provide a digital residual signal in response through sampling the residual analog signal; and a second digital signal processor coupled to receive the digital residual signal and coupled to receive the digital cancellation signal from the first digital signal processor, the second digital signal processor further coupled to provide a digital representation of the input signal including the weak signals and the strong signal in response, wherein the second digital signal processor estimates the quantization noise generated by the first DAC based on the digital cancellation signal received from the first digital signal processor and removes the quantization noise from the digital residual signal by subtracting the estimated quantization noise and reinserts the strong signal to provide the digital representation of the input signal including the weak signals and the strong signal.