A system for wirelessly transmitting HDMI data from a source to a display, comprising: a source comprising: a DVI receiver receiving HDMI data; a transmit digital processing system receiving an output of the DVI receiver; and a wireless transmitter receiving an output of the transmit digital processing system and wirelessly sending it to a receiver; and a display comprising: the receiver; a receive digital processing system receiving an output of the receiver; a DVI transmitter receiving an output of the receive digital processing system; and a video display receiving an output of the DVI transmitter and displaying, in response, the HDMI data, including audibly displaying audio data present in the HDMI data; characterised in that the transmit digital processing system comprises: a multiplexer to multiplex video data output from the DVI receiver with control words, the front end multiplexer operable to receive at a video clock rate incoming video data as video pixels and incoming control words, and a control signal comprising a bit indicating whether the incoming data is a video pixel or a control word, and output at the video clock rate 25-bit words each comprising the relevant control signal bit as a most significant bit and the remaining 24 bits comprising either the video pixel or the control word, a FIFO operable to hold received data as 100-bit words formed from four 25-bit words output from the multiplexer, a converter operable to remove a 100-bit word from the FIFO and output a group of five 20-bit words and also to generate five null words if data is not available from the FIFO, and a Reed-Solomon encoder operable to encode data from the converter; and the receive digital processing system has a Reed-Solomon decoder, and a back end component comprising a stripper operable to strip every fifth word in 20-bit word data decoded by the Reed-Solomon decoder if the fifth word is a null word, the fifth word being discarded along with the following four words, and otherwise the five words being assembled into a 100-bit word. a source comprising: a DVI receiver receiving HDMI data; a transmit digital processing system receiving an output of the DVI receiver; and a wireless transmitter receiving an output of the transmit digital processing system and wirelessly sending it to a receiver; and a DVI receiver receiving HDMI data; a transmit digital processing system receiving an output of the DVI receiver; and a wireless transmitter receiving an output of the transmit digital processing system and wirelessly sending it to a receiver; and a display comprising: the receiver; a receive digital processing system receiving an output of the receiver; a DVI transmitter receiving an output of the receive digital processing system; and a video display receiving an output of the DVI transmitter and displaying, in response, the HDMI data, including audibly displaying audio data present in the HDMI data; the receiver; a receive digital processing system receiving an output of the receiver; a DVI transmitter receiving an output of the receive digital processing system; and a video display receiving an output of the DVI transmitter and displaying, in response, the HDMI data, including audibly displaying audio data present in the HDMI data; characterised in that the transmit digital processing system comprises: a multiplexer to multiplex video data output from the DVI receiver with control words, the front end multiplexer operable to receive at a video clock rate incoming video data as video pixels and incoming control words, and a control signal comprising a bit indicating whether the incoming data is a video pixel or a control word, and output at the video clock rate 25-bit words each comprising the relevant control signal bit as a most significant bit and the remaining 24 bits comprising either the video pixel or the control word, a FIFO operable to hold received data as 100-bit words formed from four 25-bit words output from the multiplexer, a converter operable to remove a 100-bit word from the FIFO and output a group of five 20-bit words and also to generate five null words if data is not available from the FIFO, and a Reed-Solomon encoder operable to encode data from the converter; and a multiplexer to multiplex video data output from the DVI receiver with control words, the front end multiplexer operable to receive at a video clock rate incoming video data as video pixels and incoming control words, and a control signal comprising a bit indicating whether the incoming data is a video pixel or a control word, and output at the video clock rate 25-bit words each comprising the relevant control signal bit as a most significant bit and the remaining 24 bits comprising either the video pixel or the control word, a FIFO operable to hold received data as 100-bit words formed from four 25-bit words output from the multiplexer, a converter operable to remove a 100-bit word from the FIFO and output a group of five 20-bit words and also to generate five null words if data is not available from the FIFO, and a Reed-Solomon encoder operable to encode data from the converter; and the receive digital processing system has a Reed-Solomon decoder, and a back end component comprising a stripper operable to strip every fifth word in 20-bit word data decoded by the Reed-Solomon decoder if the fifth word is a null word, the fifth word being discarded along with the following four words, and otherwise the five words being assembled into a 100-bit word.