A circuit providing switching regulation with a current monitor using a feedback loop, comprising: - a pulse width modulation controller configured to provide output signal voltages (pdrv, ndrv) to drive the transistors (335, 345) at the output stage; and - an output stage configured to provide switching comprising a first and second transistor; - an inductor coupled to said output stage and said output signal (Vout); - a sense circuit (Sense NMOS) configured to provide two sensed voltages from said output stage corresponding to the voltage drop across one of the transistors (335, 345) of the output stage; - a sampling switch circuit comprising a first and second switch and configured to receive a first and second signal from said sense circuit (SENSE NMOS) and to provide sample signals; characterized in that the circuit comprises - a differential integrator circuit configured to receive a first (Vinn) and second (Vinp) signal from the sampling switch circuit and to provide sample signals; - a comparator configured to receive signals from said integrator circuit; - a control logic circuit configured to receive signals from said comparator; - a digital filter configured to provide output current information received from said control logic; - a current digital-to-analog converter configured to provide feedback signal from said control logic circuit to said sense circuit (Sense NMOS) wherein the feedback is added to the signals (Vsensep, Vsensen) sensed from said output stage; and, wherein by the feedback loop the outputs of the current DAC (Idacp and Idacn) are injected to the sensed voltages (Vsensep and Vsensen) and the control logic increases or decreases the output of the current DAC depending on the comparator output and wherein the current digital-to-analog circuit is configured to provide a first and second feedback signal and to inject the first and second signal to the sensed voltages of the sense circuit. - a pulse width modulation controller configured to provide output signal voltages (pdrv, ndrv) to drive the transistors (335, 345) at the output stage; and - an output stage configured to provide switching comprising a first and second transistor; - an inductor coupled to said output stage and said output signal (Vout); - a sense circuit (Sense NMOS) configured to provide two sensed voltages from said output stage corresponding to the voltage drop across one of the transistors (335, 345) of the output stage; - a sampling switch circuit comprising a first and second switch and configured to receive a first and second signal from said sense circuit (SENSE NMOS) and to provide sample signals; - a differential integrator circuit configured to receive a first (Vinn) and second (Vinp) signal from the sampling switch circuit and to provide sample signals; - a comparator configured to receive signals from said integrator circuit; - a control logic circuit configured to receive signals from said comparator; - a digital filter configured to provide output current information received from said control logic; - a current digital-to-analog converter configured to provide feedback signal from said control logic circuit to said sense circuit (Sense NMOS) wherein the feedback is added to the signals (Vsensep, Vsensen) sensed from said output stage;