A method for measuring switching mismatch error among elements of a feedback digital to analog converter of a continuous-time delta-sigma analog-to-digital converter, the feedback DAC having an output which is coupled to an analog input path of the ADC and an input which is coupled to a digital output of the ADC, the method comprising: shorting an analog input of the ADC to ground, wherein the ADC is configured such that in response to the analog input being shorted to ground: a first plurality of elements (UE1, UE2, UE3, UE4, UE5, UE6) of the feedback DAC output a first default value, a second plurality of elements (UE11, UE12, UE13, UE14, UE15, UE16) of the feedback DAC output a second default value, and a third plurality of elements (UE7, UE8, UE9, UE10) of the feedback DAC toggle between the first default value and the second default value, and wherein one of the first, the second or the third plurality of elements include an element under test of the feedback DAC; if the element under test is in the third plurality of elements (UE7, UE8, UE9, UE10), forcing one or more elements from the first plurality of elements (UE1, UE2, UE3, UE4, UE5, UE6) to output the second default value so that a corresponding number of elements from the third plurality of elements (UE7, UE8, UE9, UE10), including the element under test, do not toggle in response to the analog input being shorted to ground; applying a fixed frequency square wave signal (Vsw) to an input of the element under test whilst the digital output of the ADC is applied to other elements of the feedback DAC; summing samples of the digital output of the ADC over a period of time when the fixed frequency square wave is applied to the element under test; and measuring a switching mismatch error of the element under test of the feedback digital to analog converter by dividing the sum of the samples by a number of transitions introduced to the input of the element under test by the fixed frequency square wave (Vsw), wherein the number of transitions is a frequency of the fixed frequency square wave multiplied by a period of time the fixed frequency square wave is applied to the input of the element under test. shorting an analog input of the ADC to ground, wherein the ADC is configured such that in response to the analog input being shorted to ground: a first plurality of elements (UE1, UE2, UE3, UE4, UE5, UE6) of the feedback DAC output a first default value, a second plurality of elements (UE11, UE12, UE13, UE14, UE15, UE16) of the feedback DAC output a second default value, and a third plurality of elements (UE7, UE8, UE9, UE10) of the feedback DAC toggle between the first default value and the second default value, and wherein one of the first, the second or the third plurality of elements include an element under test of the feedback DAC; if the element under test is in the third plurality of elements (UE7, UE8, UE9, UE10), forcing one or more elements from the first plurality of elements (UE1, UE2, UE3, UE4, UE5, UE6) to output the second default value so that a corresponding number of elements from the third plurality of elements (UE7, UE8, UE9, UE10), including the element under test, do not toggle in response to the analog input being shorted to ground; applying a fixed frequency square wave signal (Vsw) to an input of the element under test whilst the digital output of the ADC is applied to other elements of the feedback DAC; summing samples of the digital output of the ADC over a period of time when the fixed frequency square wave is applied to the element under test; and measuring a switching mismatch error of the element under test of the feedback digital to analog converter by dividing the sum of the samples by a number of transitions introduced to the input of the element under test by the fixed frequency square wave (Vsw), wherein the number of transitions is a frequency of the fixed frequency square wave multiplied by a period of time the fixed frequency square wave is applied to the input of the element under test.