An apparatus, comprising: a memory comprising data storage locations addressable by physical addresses; and a virtual memory interface comprising a direct memory access controller operable to interface to the memory and operable to receive a virtual address from a bus and to internally translate the virtual address into a physical address, characterized in that the virtual address is an address in a flat memory linear addressing space and the virtual address is applied as an index into a sequence of the physical addresses that is ordered in accordance with a group of buffers, wherein each buffer is defined by an address pointer which points to a physical reference address and a buffer length, wherein the DMA controller comprises: an index register configured to store the virtual address; a descriptor register configured to store a list pointer pointing to a buffer list associated with the virtual address; a state machine for controlling operations of the DMA controller and configured to directly determine the physical address, wherein under control of said state machine upon receipt of a data transfer request, the state machine stores an associated virtual address in the index register and stores an associated buffer list pointer in the descriptor register and determines one of a plurality of buffers from said buffer list according to the virtual address of the data transfer request by using said buffer list pointer, wherein said state machine loads a physical reference address and buffer length through the selected buffer, determines the physical address by determining an offset within the selected buffer using said index register, and performs said data transfer request using said physical address. a memory comprising data storage locations addressable by physical addresses; and a virtual memory interface comprising a direct memory access controller operable to interface to the memory and operable to receive a virtual address from a bus and to internally translate the virtual address into a physical address, characterized in that the virtual address is an address in a flat memory linear addressing space and the virtual address is applied as an index into a sequence of the physical addresses that is ordered in accordance with a group of buffers, wherein each buffer is defined by an address pointer which points to a physical reference address and a buffer length, wherein the DMA controller comprises: an index register configured to store the virtual address; a descriptor register configured to store a list pointer pointing to a buffer list associated with the virtual address; a state machine for controlling operations of the DMA controller and configured to directly determine the physical address, wherein under control of said state machine upon receipt of a data transfer request, the state machine stores an associated virtual address in the index register and stores an associated buffer list pointer in the descriptor register and determines one of a plurality of buffers from said buffer list according to the virtual address of the data transfer request by using said buffer list pointer, wherein said state machine loads a physical reference address and buffer length through the selected buffer, determines the physical address by determining an offset within the selected buffer using said index register, and performs said data transfer request using said physical address. an index register configured to store the virtual address; a descriptor register configured to store a list pointer pointing to a buffer list associated with the virtual address; a state machine for controlling operations of the DMA controller and configured to directly determine the physical address, wherein under control of said state machine upon receipt of a data transfer request, the state machine stores an associated virtual address in the index register and stores an associated buffer list pointer in the descriptor register and determines one of a plurality of buffers from said buffer list according to the virtual address of the data transfer request by using said buffer list pointer, wherein said state machine loads a physical reference address and buffer length through the selected buffer, determines the physical address by determining an offset within the selected buffer using said index register, and performs said data transfer request using said physical address.