Signal generator, comprising: - a signal source that is configured for generating a source signal being a proportional to the absolute temperature, PTAT, signal; - a buffer (12, 56) that is configured for generating an internal signal being a complementary to the absolute temperature, CTAT, signal and a reference signal (SREF, SBG) by summing the internal signal to the source signal or to a signal (SO') derived from the source signal; and - a current mirror that couples the signal source to a supply voltage terminal by means of a first and a second current mirror transistor (29, 30) and that couples the buffer to the supply voltage terminal by means of a third current mirror transistor; Wherein the signal source comprises - a first source transistor having a first terminal coupled to the first mirror transistor and to a control terminal of the current mirror and having a second terminal coupled to a reference potential terminal by means of a first resistor; - a second source transistor having a first terminal coupled to the second mirror transistor and to respective control terminals of the first and the second source transistors (20, 25) and having a second terminal coupled to the reference potential terminal, the second source transistor having a smaller current driving capability in comparison to the first source transistor; and - an output for providing the source signal that is coupled to an input of the buffer characterized in that - the current mirror comprises a fourth mirror transistor; and - the signal source comprises a second resistor that couples the second terminal of the first source transistor to the fourth mirror transistor and to the output of the signal source. - a signal source that is configured for generating a source signal being a proportional to the absolute temperature, PTAT, signal; - a buffer (12, 56) that is configured for generating an internal signal being a complementary to the absolute temperature, CTAT, signal and a reference signal (SREF, SBG) by summing the internal signal to the source signal or to a signal (SO') derived from the source signal; and - a current mirror that couples the signal source to a supply voltage terminal by means of a first and a second current mirror transistor (29, 30) and that couples the buffer to the supply voltage terminal by means of a third current mirror transistor; Wherein the signal source comprises - a first source transistor having a first terminal coupled to the first mirror transistor and to a control terminal of the current mirror and having a second terminal coupled to a reference potential terminal by means of a first resistor; - a second source transistor having a first terminal coupled to the second mirror transistor and to respective control terminals of the first and the second source transistors (20, 25) and having a second terminal coupled to the reference potential terminal, the second source transistor having a smaller current driving capability in comparison to the first source transistor; and - an output for providing the source signal that is coupled to an input of the buffer characterized in that - the current mirror comprises a fourth mirror transistor; and - the signal source comprises a second resistor that couples the second terminal of the first source transistor to the fourth mirror transistor and to the output of the signal source.