An active-matrix liquid crystal display apparatus comprising: a plurality of gate lines (GL1 to GLm) extending in a first direction; a plurality of data lines (DL1 to DLm) extending in a second direction crossing the first direction; and a plurality of pixels connected to the gate lines (GL1 to GLm) and the data lines, wherein the pixels comprise pixels arranged in a k-th row, pixels arranged in a (k+1)th row, pixels arranged in a (k+2)th row and pixels arranged in a (k+3)th row, the pixels arranged in the k-th row are disposed adjacent to the pixels arranged in the (k+1)th row in the second direction such that only an (i+1)th gate line of the gate lines is disposed between the pixels arranged in the k-th row and the pixels arranged in the (k+1)th row, i and k being a natural number, the pixels arranged in the g-th column among the pixels arranged in the k-th, (k+1)th, (k+2)th and (k+3)th rows are connected to a j-th data line, g and j being a natural number; wherein in the k-th row between the i-th gate line and the (i+1)th gate line, every 4th pixel is alternately connected to the i-th gate line and the (i+1)th gate line, wherein adjacent pixels in each group of 4 pixels are alternately connected to the i-th gate line and the (i+1)th gate line after every one pixel; wherein a connectivity how the pixels arranged in the (k+1)th row, the pixels arranged in the (k+2)th row, and the pixels arranged in the (k+3)th row are connected to the j-th data line and corresponding immediately adjacent gate lines is the same as a connectivity how the pixels arranged in the k-th row are connected to the j-th data line and the i-th and (i+1)th gate lines; wherein the pixels are grouped into first and second pixel groups, wherein the first pixel groups are alternately arranged with the second pixel groups in the first and second directions, and each of the first and second pixel groups consists of two pixels differing in colour, the first and second pixel groups comprising pixels of four different colours; and further comprising a data driver adapted to generate data voltages having a positive polarity and data voltages having a negative polarity and adapted to apply the data voltages to the data lines with different polarities from each other every two data lines; characterized in that in each column, all of the pixels are connected to the same data line and have the same connectivity how the pixels in the column are connected to the same data line and to the respective immediately adjacent gate lines. a plurality of gate lines (GL1 to GLm) extending in a first direction; a plurality of data lines (DL1 to DLm) extending in a second direction crossing the first direction; and a plurality of pixels connected to the gate lines (GL1 to GLm) and the data lines, wherein the pixels comprise pixels arranged in a k-th row, pixels arranged in a (k+1)th row, pixels arranged in a (k+2)th row and pixels arranged in a (k+3)th row, the pixels arranged in the k-th row are disposed adjacent to the pixels arranged in the (k+1)th row in the second direction such that only an (i+1)th gate line of the gate lines is disposed between the pixels arranged in the k-th row and the pixels arranged in the (k+1)th row, i and k being a natural number, the pixels arranged in the g-th column among the pixels arranged in the k-th, (k+1)th, (k+2)th and (k+3)th rows are connected to a j-th data line, g and j being a natural number; wherein in the k-th row between the i-th gate line and the (i+1)th gate line, every 4th pixel is alternately connected to the i-th gate line and the (i+1)th gate line, wherein adjacent pixels in each group of 4 pixels are alternately connected to the i-th gate line and the (i+1)th gate line after every one pixel; wherein a connectivity how the pixels arranged in the (k+1)th row, the pixels arranged in the (k+2)th row, and the pixels arranged in the (k+3)th row are connected to the j-th data line and corresponding immediately adjacent gate lines is the same as a connectivity how the pixels arranged in the k-th row are connected to the j-th data line and the i-th and (i+1)th gate lines; wherein the pixels are grouped into first and second pixel groups, wherein the first pixel groups are alternately arranged with the second pixel groups in the first and second directions, and each of the first and second pixel groups consists of two pixels differing in colour, the first and second pixel groups comprising pixels of four different colours; and further comprising a data driver adapted to generate data voltages having a positive polarity and data voltages having a negative polarity and adapted to apply the data voltages to the data lines with different polarities from each other every two data lines; characterized in that in each column, all of the pixels are connected to the same data line and have the same connectivity how the pixels in the column are connected to the same data line and to the respective immediately adjacent gate lines.