A charge pump for receiving an input voltage and generating an output voltage for a flash memory device, the charge pump comprising a plurality of boost stages and each of the plurality of boost stages comprising: an input node (VINi) for the boost stage; an output node (VOUTi) for the boost stage; a first capacitor comprising an input terminal for receiving a first clock signal (CLKP) and an output terminal coupled to the input node; a second capacitor comprising an input terminal for receiving a second clock signal (CLKB) and an output terminal; a pass gate comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor; a diode-connected transistor in parallel with the pass gate, a first terminal of the diode-connected transistor coupled to the first terminal of the pass gate and a second terminal of the diode-connected transistor coupled to the second terminal of the pass gate, the diode-connected transistor ensuring that the output voltage is never lower than the input voltage minus the threshold voltage of the diode-connected transistor; a boost gate comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node; a local feedforward precharge transistor comprising a first terminal coupled to the input node, a gate coupled to the input node, and a second terminal coupled to the output node for the boost stage; and a precharge transistor comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled directly to the output node, the precharge transistor ensuring that the output voltage is at a precharge voltage VB at the outset of the charging operation; wherein the input node for the boost stage is coupled to an output node of another boost stage in the plurality of boost stages or to a source providing the input voltage; and wherein the output node for the boost stage is coupled to an input node of another boost stage in the plurality of boost stages or provides the output voltage to the flash memory device. an input node (VINi) for the boost stage; an output node (VOUTi) for the boost stage; a first capacitor comprising an input terminal for receiving a first clock signal (CLKP) and an output terminal coupled to the input node; a second capacitor comprising an input terminal for receiving a second clock signal (CLKB) and an output terminal; a pass gate comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor; a diode-connected transistor in parallel with the pass gate, a first terminal of the diode-connected transistor coupled to the first terminal of the pass gate and a second terminal of the diode-connected transistor coupled to the second terminal of the pass gate, the diode-connected transistor ensuring that the output voltage is never lower than the input voltage minus the threshold voltage of the diode-connected transistor; a boost gate comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node; a local feedforward precharge transistor comprising a first terminal coupled to the input node, a gate coupled to the input node, and a second terminal coupled to the output node for the boost stage; and a precharge transistor comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled directly to the output node, the precharge transistor ensuring that the output voltage is at a precharge voltage VB at the outset of the charging operation; wherein the input node for the boost stage is coupled to an output node of another boost stage in the plurality of boost stages or to a source providing the input voltage; and wherein the output node for the boost stage is coupled to an input node of another boost stage in the plurality of boost stages or provides the output voltage to the flash memory device.