A DC-DC voltage converter, comprising: a pair of switching transistors (709, 711) configured to provide an output voltage (Vout) and to switch alternately in a boost mode of operation responsive to control signals; an inductor connected with the pair of switching transistors (709, 711) and configured to have an inductor current flowing therethrough; a current sensor configured to monitor an input current and to generate a current-sense signal (Isns) responsive to the input current; wherein the DC-DC voltage converter further comprises control circuitry comprising a summation circuit configured to a generate a modified current-sense signal (Vsum) by combining the input-current sense signal (Isns) with a sloped compensation signal and a boost mode offset signal; an error amplifier configured to compare the output voltage (Vout) with a reference voltage (Vref) and to generate an error voltage (Vcomp) responsive thereto; a PWM comparator configured to compare the error voltage (Vcomp) with the modified current-sense signal (Vsum) and to generate an output (Vcompout) responsive thereto; an OR gate connected to receive at respective first and second inputs thereof the output (Vcompout) of the PWM comparator and a current-limit signal (Current Limit) indicating whether the inductor current exceeds a current limit; an inverter connected to receive an output of the OR gate; an SR latch connected to receive an output of the inverter and a clock signal; and converter driver circuitry connected to receive an output from the latch comprising a PWM signal (PWM_Boost), and configured to generate control signals (HD Boost, LD Boost) responsive thereto; wherein the control circuitry is configured such that as long as a current limit condition exists, the inductor current is kept in a ramp down mode until exiting from the current limit condition; the current-limit signal (Current Limit) modulates an "off" time of valley-current mode control and replaces the error voltage (Vcomp) when a current limit event occurs; and the control signals (HD Boost, LD Boost) are provided to respective gates of the pair of switching transistors (709, 711) and control switching of the pair of switching transistors (709, 711) during a boost mode of operation. a pair of switching transistors (709, 711) configured to provide an output voltage (Vout) and to switch alternately in a boost mode of operation responsive to control signals; an inductor connected with the pair of switching transistors (709, 711) and configured to have an inductor current flowing therethrough; a current sensor configured to monitor an input current and to generate a current-sense signal (Isns) responsive to the input current; wherein the DC-DC voltage converter further comprises control circuitry comprising a summation circuit configured to a generate a modified current-sense signal (Vsum) by combining the input-current sense signal (Isns) with a sloped compensation signal and a boost mode offset signal; an error amplifier configured to compare the output voltage (Vout) with a reference voltage (Vref) and to generate an error voltage (Vcomp) responsive thereto; a PWM comparator configured to compare the error voltage (Vcomp) with the modified current-sense signal (Vsum) and to generate an output (Vcompout) responsive thereto; an OR gate connected to receive at respective first and second inputs thereof the output (Vcompout) of the PWM comparator and a current-limit signal (Current Limit) indicating whether the inductor current exceeds a current limit; an inverter connected to receive an output of the OR gate; an SR latch connected to receive an output of the inverter and a clock signal; and converter driver circuitry connected to receive an output from the latch comprising a PWM signal (PWM_Boost), and configured to generate control signals (HD Boost, LD Boost) responsive thereto; as long as a current limit condition exists, the inductor current is kept in a ramp down mode until exiting from the current limit condition; the current-limit signal (Current Limit) modulates an "off" time of valley-current mode control and replaces the error voltage (Vcomp) when a current limit event occurs; and the control signals (HD Boost, LD Boost) are provided to respective gates of the pair of switching transistors (709, 711) and control switching of the pair of switching transistors (709, 711) during a boost mode of operation.