A method comprising: sensing a state of a data cell to generate a data voltage, wherein the state of the data cell corresponds to a state of a programmable resistance based memory element of the data cell, and wherein sensing the state of the data cell includes: sensing a first state of the data cell during a first sensing stage using a first sensing path to generate a first data voltage; and sensing a second state of the data cell during a second sensing stage using a second sensing path to generate a second data voltage, wherein the data voltage is generated based on averaging the first data voltage and the second data voltage; sensing a state of a reference cell to generate a reference voltage, wherein sensing the state of the reference cell includes: sensing a first state of the reference cell during the first sensing stage using the second sensing path to generate a first reference voltage; and sensing a second state of the reference cell during the second sensing stage using the first sensing path to generate a second reference voltage, wherein the reference voltage is generated based on averaging the first reference voltage and the second reference voltage; and determining a logic value of the data cell based on the data voltage and the reference voltage. sensing a state of a data cell to generate a data voltage, wherein the state of the data cell corresponds to a state of a programmable resistance based memory element of the data cell, and wherein sensing the state of the data cell includes: sensing a first state of the data cell during a first sensing stage using a first sensing path to generate a first data voltage; and sensing a second state of the data cell during a second sensing stage using a second sensing path to generate a second data voltage, wherein the data voltage is generated based on averaging the first data voltage and the second data voltage; sensing a first state of the data cell during a first sensing stage using a first sensing path to generate a first data voltage; and sensing a second state of the data cell during a second sensing stage using a second sensing path to generate a second data voltage, wherein the data voltage is generated based on averaging the first data voltage and the second data voltage; sensing a state of a reference cell to generate a reference voltage, wherein sensing the state of the reference cell includes: sensing a first state of the reference cell during the first sensing stage using the second sensing path to generate a first reference voltage; and sensing a second state of the reference cell during the second sensing stage using the first sensing path to generate a second reference voltage, wherein the reference voltage is generated based on averaging the first reference voltage and the second reference voltage; and sensing a first state of the reference cell during the first sensing stage using the second sensing path to generate a first reference voltage; and sensing a second state of the reference cell during the second sensing stage using the first sensing path to generate a second reference voltage, wherein the reference voltage is generated based on averaging the first reference voltage and the second reference voltage; and determining a logic value of the data cell based on the data voltage and the reference voltage.