Method, comprising: forming at least one trench in separation regions of a first surface of a semiconductor wafer; forming at least one trench in non-device regions of the first surface of the semiconductor wafer, wherein the separation regions are arranged between component positions of the semiconductor wafer, the component positions comprising at least two transistor devices for forming a half bridge circuit, a non-device region arranged between a first device region comprising a first transistor device and a second device region comprising a second transistor device, and a first metallization structure arranged on the first surface in the first device region and in the second device region; inserting a via into the second device region; inserting conductive material into the via; applying a first epoxy layer to the first surface of the semiconductor wafer such that the trenches (119, 120), edge regions of the component positions, edge regions of the first device regions and edge regions of the second device regions are covered with the first epoxy layer; removing portions of a second surface of the semiconductor wafer, the second surface opposing the first surface, revealing portions of the first epoxy layer in the separation regions and in the non-device regions revealing the conductive material in the via and producing a worked second surface; applying a second metallization layer to the worked second surface to electrically couple the first transistor device to the second transistor device and conductive material in the via to the first transistor device and to the second transistor device to form the half bridge circuit; wherein the second metallization layer is applied to the conductive material within the via to operably couple the first transistor device to the second transistor device and such that it extends from the first device region over the non-device region including the first epoxy layer which is exposed in the worked second surface onto the second device region and onto the conductive material positioned within the via. inserting a separation line through the first epoxy layer in the separation regions to form a plurality of separate semiconductor modules, each comprising the half bridge circuit. forming at least one trench in separation regions of a first surface of a semiconductor wafer; forming at least one trench in non-device regions of the first surface of the semiconductor wafer, wherein the separation regions are arranged between component positions of the semiconductor wafer, the component positions comprising at least two transistor devices for forming a half bridge circuit, a non-device region arranged between a first device region comprising a first transistor device and a second device region comprising a second transistor device, and a first metallization structure arranged on the first surface in the first device region and in the second device region; inserting a via into the second device region; inserting conductive material into the via; applying a first epoxy layer to the first surface of the semiconductor wafer such that the trenches (119, 120), edge regions of the component positions, edge regions of the first device regions and edge regions of the second device regions are covered with the first epoxy layer; removing portions of a second surface of the semiconductor wafer, the second surface opposing the first surface, revealing portions of the first epoxy layer in the separation regions and in the non-device regions revealing the conductive material in the via and producing a worked second surface; applying a second metallization layer to the worked second surface to electrically couple the first transistor device to the second transistor device and conductive material in the via to the first transistor device and to the second transistor device to form the half bridge circuit; wherein the second metallization layer is applied to the conductive material within the via to operably couple the first transistor device to the second transistor device and such that it extends from the first device region over the non-device region including the first epoxy layer which is exposed in the worked second surface onto the second device region and onto the conductive material positioned within the via. inserting a separation line through the first epoxy layer in the separation regions to form a plurality of separate semiconductor modules, each comprising the half bridge circuit.