A sample processing system comprising at least one first module (M1, M2) for testing of samples; at least one second module (M3, 6) for processing of samples which have been tested by the at least one first module (M1, M2), wherein the at least one first module (M1, M2) and the at least one second module (M3, 6) are respectively switchable between an active state and an inactive state; a conveying path (3, 5) along which there are arranged the at least one first module (M1, M2) and the at least one second module (M3, 6); and at least one processor (81a, 421a) and at least one memory (81b, 421b) that stores programs executable collectively by the at least one processor (81a, 421a) to: transport sample containers through the conveying path (3, 5); obtain a determination result whether a sample which have been tested by the at least one first module (M1, M2) is necessary to be processed by the at least one second module (M3, 6); if the sample has been determined necessary to be processed by the at least one second module (M3, 6), transport a sample container containing the sample to the at least one second module (M3, 6) for processing; and when the sample has been determined necessary to be processed by the at least one second module (M3, 6), if the at least one second module (M3, 6) is in the inactive state, place the at least one second module in the active state to make it ready to process the sample. at least one first module (M1, M2) for testing of samples; at least one second module (M3, 6) for processing of samples which have been tested by the at least one first module (M1, M2), wherein the at least one first module (M1, M2) and the at least one second module (M3, 6) are respectively switchable between an active state and an inactive state; a conveying path (3, 5) along which there are arranged the at least one first module (M1, M2) and the at least one second module (M3, 6); and at least one processor (81a, 421a) and at least one memory (81b, 421b) that stores programs executable collectively by the at least one processor (81a, 421a) to: transport sample containers through the conveying path (3, 5); obtain a determination result whether a sample which have been tested by the at least one first module (M1, M2) is necessary to be processed by the at least one second module (M3, 6); if the sample has been determined necessary to be processed by the at least one second module (M3, 6), transport a sample container containing the sample to the at least one second module (M3, 6) for processing; and when the sample has been determined necessary to be processed by the at least one second module (M3, 6), if the at least one second module (M3, 6) is in the inactive state, place the at least one second module in the active state to make it ready to process the sample. transport sample containers through the conveying path (3, 5); obtain a determination result whether a sample which have been tested by the at least one first module (M1, M2) is necessary to be processed by the at least one second module (M3, 6); if the sample has been determined necessary to be processed by the at least one second module (M3, 6), transport a sample container containing the sample to the at least one second module (M3, 6) for processing; and when the sample has been determined necessary to be processed by the at least one second module (M3, 6), if the at least one second module (M3, 6) is in the inactive state, place the at least one second module in the active state to make it ready to process the sample.