Inverter comprising a first inverter stage (1, 8) having a first switching frequency, a second inverter stage having a second switching frequency, said second inverter stage being downstream of the first inverter stage (1, 8), and a control and/or regulation unit, wherein the first inverter stage (1, 8) has a first intermediate voltage and is designed to generate a first pulse-width-modulated alternating voltage with at least three different voltage levels, wherein the different voltage levels differ in each case by at least a first differential voltage, wherein the first inverter stage (1, 8) has at least one connection circuit, wherein the connection circuit in each case has an output terminal, and said output terminal forms an output terminal of the first inverter stage (1, 8) for generating the first pulse-width-modulated alternating voltage, wherein the second inverter stage has a second intermediate voltage, which second intermediate voltage is smaller than the first intermediate voltage and greater than the first differential voltage, and wherein the second switching frequency is greater than the first switching frequency, wherein the second inverter stage has an intermediate circuit capacitor, wherein the inverter has an output filter which is arranged after the second inverter stage, characterized in that the connection circuit additionally has a coupled coil assembly (12, 82, 83) and a group of at least two parallel-connected bridge branches which are actuated out of phase with the first switching frequency in a pulse-width-modulated manner, in that each of the bridge branches has a central connection and the central connections of these bridge branches are connected to the output terminal via the coupled coil assembly (12, 82, 83) in order to superimpose the output voltages of the individual bridge branches, in that the control and/or regulation unit calculates a reference signal for the pulse width modulation of the second inverter stage by the control and/or regulation unit adding together a first reference signal (ref v) and a second reference signal (ref dc), in that the control and/or regulation unit generates the first reference signal (ref v) by standardizing or normalizing a differential voltage (Δv AM) with a setpoint value of the second intermediate circuit voltage (V DC2*) of the second inverter stage, wherein the differential voltage (Δv AM) is the difference between the voltage that is ideally to be applied to the output filter and the voltage that is actually generated by the first inverter stage, in that the inverter additionally has an intermediate circuit voltage controller which generates, from the deviation of the measured intermediate circuit voltage (V DC2) of the second inverter stage from its setpoint value (V DC2*), a quantity corresponding to a power that is to be fed into or discharged from the intermediate circuit capacitor, wherein the control and/or regulation unit generates the second reference signal (ref dc) by multiplying the output quantity of the intermediate circuit voltage controller by a setpoint value of the output current (i L1*), and in that the control and/or regulation unit controls a pulse width modulation of the second inverter stage by means of a sawtooth-shaped carrier signal.