A method for voltage tuning at an electronic device, the method comprising: determining a process parameter for the electronic device; determining a current temperature parameter for the electronic device; concurrently determining (310, 312) from a look-up table, LUT, a first coarse-grain level for a supply voltage to be provided to a digital circuit of the electronic device and a second coarse-grain level for a body-biasing voltage to be provided to the digital circuit based on the process parameter, the current temperature parameter, and a frequency of a clock signal to be supplied to the digital circuit; determining a fine-grain level for the supply voltage; determining a fine-grain level for the body-biasing voltage; providing the supply voltage based on the first coarse-grain level and the fine-grain level for the supply voltage to the digital circuit; and providing the body-biasing voltage based on the second coarse-grain level and the fine-grain level for the body-biasing voltage to the digital circuit; and wherein determining the fine-grain level for each of the supply voltage and the body-biasing voltage further comprises: providing a test voltage for each of the supply voltage and the body-biasing voltage to a replica circuit that replicates a critical path of the digital circuit, the respective test voltage based on the respective first coarse-grain level and a respective test fine-grain level; analyzing an operation of the replica circuit being provided the test voltages; and iteratively adjusting the respective test fine-grain level and analyzing the operation of the replica circuit using a respective adjusted test voltage that is based on the respective first coarse-grain level and the adjusted test fine-grain level; and setting the respective fine-grain level to the test fine-grain level of an iteration identified as having a respective test voltage that provides reduced voltage margin while the replica circuit remains functionally operational at that test voltage. determining a process parameter for the electronic device; determining a current temperature parameter for the electronic device; concurrently determining (310, 312) from a look-up table, LUT, a first coarse-grain level for a supply voltage to be provided to a digital circuit of the electronic device and a second coarse-grain level for a body-biasing voltage to be provided to the digital circuit based on the process parameter, the current temperature parameter, and a frequency of a clock signal to be supplied to the digital circuit; determining a fine-grain level for the supply voltage; determining a fine-grain level for the body-biasing voltage; providing the supply voltage based on the first coarse-grain level and the fine-grain level for the supply voltage to the digital circuit; and providing the body-biasing voltage based on the second coarse-grain level and the fine-grain level for the body-biasing voltage to the digital circuit; and wherein determining the fine-grain level for each of the supply voltage and the body-biasing voltage further comprises: providing a test voltage for each of the supply voltage and the body-biasing voltage to a replica circuit that replicates a critical path of the digital circuit, the respective test voltage based on the respective first coarse-grain level and a respective test fine-grain level; analyzing an operation of the replica circuit being provided the test voltages; and iteratively adjusting the respective test fine-grain level and analyzing the operation of the replica circuit using a respective adjusted test voltage that is based on the respective first coarse-grain level and the adjusted test fine-grain level; and setting the respective fine-grain level to the test fine-grain level of an iteration identified as having a respective test voltage that provides reduced voltage margin while the replica circuit remains functionally operational at that test voltage. providing a test voltage for each of the supply voltage and the body-biasing voltage to a replica circuit that replicates a critical path of the digital circuit, the respective test voltage based on the respective first coarse-grain level and a respective test fine-grain level; analyzing an operation of the replica circuit being provided the test voltages; and iteratively adjusting the respective test fine-grain level and analyzing the operation of the replica circuit using a respective adjusted test voltage that is based on the respective first coarse-grain level and the adjusted test fine-grain level; and setting the respective fine-grain level to the test fine-grain level of an iteration identified as having a respective test voltage that provides reduced voltage margin while the replica circuit remains functionally operational at that test voltage.