An error correction decoding device, comprising: an iterative decoding circuit configured to execute iterative decoding processing for an LDPC code sequence, sequentially output a temporary hard-decision decoding result for each iteration count i, and to sequentially output a non-zero-value count that is obtained by executing a parity check for the temporary hard-decision decoding result; a parameter generation circuit configured to initially set, as parameters for stopping the iterative decoding processing, a threshold F[i] for each iteration count i to be compared to the non-zero-value count for determining whether the LDPC code sequence is uncorrectable, and a maximum iteration count that is a maximum number of times of iteration of execution of the iterative decoding processing; and a first control circuit configured to control iterative operation of the iterative decoding circuit, wherein the first control circuit is configured to feed, when the iterative operation by the iterative decoding circuit is stopped under a state in which an iteration count i does not reach the maximum iteration count and the LDPC code sequence is determined to be uncorrectable, information including the iteration count i at a time when the iterative operation is stopped back to the parameter generation circuit, as iterative decoding stopping information, and wherein the parameter generation circuit is further configured to update, based on the iterative decoding stopping information, the parameters to be used for stopping the iterative decoding process, when the iterative decoding circuit executes the iterative decoding processing for an LDPC code sequence received next wherein the first control circuit is further configured to: receive, as the parameters, the threshold F[i] for each iteration count i and the maximum iteration count which are initially set or updated by the parameter generation circuit; stop the iterative operation by the iterative decoding circuit when an iteration count i of the iterative decoding processing executed by the iterative decoding processing reaches the maximum iteration count; and compare, when the iteration count i does not reach the maximum iteration count, the non-zero-value count sequentially output from the iterative decoding circuit and the threshold F[i] for the iteration count i, and stop the iterative operation by the iterative decoding circuit when a result of the comparison satisfies a stopping condition set in advance. an iterative decoding circuit configured to execute iterative decoding processing for an LDPC code sequence, sequentially output a temporary hard-decision decoding result for each iteration count i, and to sequentially output a non-zero-value count that is obtained by executing a parity check for the temporary hard-decision decoding result; a parameter generation circuit configured to initially set, as parameters for stopping the iterative decoding processing, a threshold F[i] for each iteration count i to be compared to the non-zero-value count for determining whether the LDPC code sequence is uncorrectable, and a maximum iteration count that is a maximum number of times of iteration of execution of the iterative decoding processing; and a first control circuit configured to control iterative operation of the iterative decoding circuit, wherein the first control circuit is configured to feed, when the iterative operation by the iterative decoding circuit is stopped under a state in which an iteration count i does not reach the maximum iteration count and the LDPC code sequence is determined to be uncorrectable, information including the iteration count i at a time when the iterative operation is stopped back to the parameter generation circuit, as iterative decoding stopping information, and wherein the parameter generation circuit is further configured to update, based on the iterative decoding stopping information, the parameters to be used for stopping the iterative decoding process, when the iterative decoding circuit executes the iterative decoding processing for an LDPC code sequence received next wherein the first control circuit is further configured to: receive, as the parameters, the threshold F[i] for each iteration count i and the maximum iteration count which are initially set or updated by the parameter generation circuit; stop the iterative operation by the iterative decoding circuit when an iteration count i of the iterative decoding processing executed by the iterative decoding processing reaches the maximum iteration count; and compare, when the iteration count i does not reach the maximum iteration count, the non-zero-value count sequentially output from the iterative decoding circuit and the threshold F[i] for the iteration count i, and stop the iterative operation by the iterative decoding circuit when a result of the comparison satisfies a stopping condition set in advance. receive, as the parameters, the threshold F[i] for each iteration count i and the maximum iteration count which are initially set or updated by the parameter generation circuit; stop the iterative operation by the iterative decoding circuit when an iteration count i of the iterative decoding processing executed by the iterative decoding processing reaches the maximum iteration count; and compare, when the iteration count i does not reach the maximum iteration count, the non-zero-value count sequentially output from the iterative decoding circuit and the threshold F[i] for the iteration count i, and stop the iterative operation by the iterative decoding circuit when a result of the comparison satisfies a stopping condition set in advance.