A method (10, 30) of forming a body-tie (56, 58, 120) of a field effect transistor, FET, the method comprising: etching a first trench (36, 38, 40) into a device layer of a Silicon-On-Insulator, SOI, substrate, wherein the first trench stops short of an insulating layer of the SOI substrate, and wherein the device layer underlies an STI stack comprising a nitride layer on top of a pad oxide layer and an oxide layer on top of the nitride layer; masking a portion of the first trench with a mask that establishes a location of the body-tie (56, 58); etching a second trench (52, 54) into a portion of the first trench, not masked by the mask or the STI stack, wherein the second trench extends to the insulating layer, wherein etching the first trench and etching the second trench defines the body-tie and an island (66, 68); implanting the body-tie (56, 58), by a first implant, at a first doping density; forming a Shallow Trench Isolation oxide above the first and second trenches; doping drain (96, 98) and source regions (100, 102) of the device layer of the FET, by a second implant, at a second doping density having a first average depth from a top surface of the device layer, the first average depth being less than a thickness of the STI oxide above the first trench; and doping the drain and the source regions, by a third implant, at a third doping density having a second average depth from the top surface of the device layer that is deeper than the first average depth, the second average depth being greater than a thickness of the STI oxide above the first trench, wherein: the second doping density is greater than the third doping density, and the third doping density is less than the first doping density of the body-tie, thereby preventing the body-tie (56, 58, 120) from switching majority carrier type. etching a first trench (36, 38, 40) into a device layer of a Silicon-On-Insulator, SOI, substrate, wherein the first trench stops short of an insulating layer of the SOI substrate, and wherein the device layer underlies an STI stack comprising a nitride layer on top of a pad oxide layer and an oxide layer on top of the nitride layer; masking a portion of the first trench with a mask that establishes a location of the body-tie (56, 58); etching a second trench (52, 54) into a portion of the first trench, not masked by the mask or the STI stack, wherein the second trench extends to the insulating layer, wherein etching the first trench and etching the second trench defines the body-tie and an island (66, 68); implanting the body-tie (56, 58), by a first implant, at a first doping density; forming a Shallow Trench Isolation oxide above the first and second trenches; doping drain (96, 98) and source regions (100, 102) of the device layer of the FET, by a second implant, at a second doping density having a first average depth from a top surface of the device layer, the first average depth being less than a thickness of the STI oxide above the first trench; and doping the drain and the source regions, by a third implant, at a third doping density having a second average depth from the top surface of the device layer that is deeper than the first average depth, the second average depth being greater than a thickness of the STI oxide above the first trench, wherein: the second doping density is greater than the third doping density, and the third doping density is less than the first doping density of the body-tie, thereby preventing the body-tie (56, 58, 120) from switching majority carrier type. the second doping density is greater than the third doping density, and the third doping density is less than the first doping density of the body-tie, thereby preventing the body-tie (56, 58, 120) from switching majority carrier type.