An information processing device comprising: a multiply-accumulate operation circuit (200; 300; 400; 500) configured to execute a multiply-accumulate operation y = ∑ r = 0 p − 1 ∑ i s x i s w i 2 − ⌊ m i + n i / p ⌋ δ r, m i + n i mod p 2 − r p on a basis of multiple input values, x i, and multiple weight coefficients, w i, that both are quantized by an exponential representation 2 -[ m i + n i / p] and that correspond to each of the input values x i, wherein p is an element of the set of natural numbers {2,3,...}, s x i s w i are elements in the set {1,-1}, r is the remainder of ( m i + n i) mod p, p ∈ {2,3,...}, and r ∈ {0,1,..., p - 1}, wherein m i are obtained by quantizing the input values, x i according to x i = s x i 2 - m i / p and n i are obtained by quantizing the weight coefficients, w i, according to w i = s w i 2 - n i / p, and m i,n i are elements in the set {1, 2,...}, wherein y r = ∑ i ( s x i s w i)2 -[ m i + n i / p] δ r,(( m i + n i) mod p), y r being calculated using only bit-shifts and additions for all values of the remainder r, and wherein exponents -[ m i + n i / p] of the quantized weight coefficients w i and the quantized input values x i are expressed by fractions taking a predetermined divisor (p) as a denominator and an non-negative integer as a numerator ( m i, n i), and the multiply-accumulate operation circuit (200; 300; 400; 500) is configured to perform the multiply-accumulate operation using different addition multipliers on a basis of the remainder, r, of the ( m i + n i) mod p determined from the divisor p, such that each value of the remainder r is associated with a specific multiplier that performs the multiplication of y r with 2 − r p wherein the multiply-accumulate operation circuit (200; 300; 400; 500) is provided with multiple different accumulators configured to hold a computational result y for each remainder ( m i + n i) mod p determined from the divisor p, and wherein the remainder ( m i + n i) mod p is computed by a modulo operation mod taking a numerator ( m i + n i) related to the exponents - └ m i + n i / p ┘ of the quantized weight coefficients w i and the quantized input values x i as a dividend, and the multiply-accumulate operation circuit (200; 300; 400; 500) additionally is provided with a selector configured to connect the accumulator corresponding to the remainder ( m i + n i) mod p to the circuit. a multiply-accumulate operation circuit (200; 300; 400; 500) configured to execute a multiply-accumulate operation y = ∑ r = 0 p − 1 ∑ i s x i s w i 2 − ⌊ m i + n i / p ⌋ δ r, m i + n i mod p 2 − r p on a basis of multiple input values, x i, and multiple weight coefficients, w i, that both are quantized by an exponential representation 2 -[ m i + n i / p] and that correspond to each of the input values x i, wherein p is an element of the set of natural numbers {2,3,...}, s x i s w i are elements in the set {1,-1}, r is the remainder of ( m i + n i) mod p, p ∈ {2,3,...}, and r ∈ {0,1,..., p - 1}, wherein m i are obtained by quantizing the input values, x i according to x i = s x i 2 - m i / p and n i are obtained by quantizing the weight coefficients, w i, according to w i = s w i 2 - n i / p, and m i,n i are elements in the set {1, 2,...}, wherein y r = ∑ i ( s x i s w i)2 -[ m i + n i / p] δ r,(( m i + n i) mod p), y r being calculated using only bit-shifts and additions for all values of the remainder r, and wherein exponents -[ m i + n i / p] of the quantized weight coefficients w i and the quantized input values x i are expressed by fractions taking a predetermined divisor (p) as a denominator and an non-negative integer as a numerator ( m i, n i), and the multiply-accumulate operation circuit (200; 300; 400; 500) is configured to perform the multiply-accumulate operation using different addition multipliers on a basis of the remainder, r, of the ( m i + n i) mod p determined from the divisor p, such that each value of the remainder r is associated with a specific multiplier that performs the multiplication of y r with 2 − r p wherein the multiply-accumulate operation circuit (200; 300; 400; 500) is provided with multiple different accumulators configured to hold a computational result y for each remainder ( m i + n i) mod p determined from the divisor p, and wherein the remainder ( m i + n i) mod p is computed by a modulo operation mod taking a numerator ( m i + n i) related to the exponents - └ m i + n i / p ┘ of the quantized weight coefficients w i and the quantized input values x i as a dividend, and the multiply-accumulate operation circuit (200; 300; 400; 500) additionally is provided with a selector configured to connect the accumulator corresponding to the remainder ( m i + n i) mod p to the circuit.