A method of forming an MIS (metal-insulator-semiconductor) structure, the method comprising: forming a cavity in a crystalline semiconductor region; forming an insulating layer within the cavity; forming a first semiconductor electrode in said cavity by the following steps: depositing on the insulating layer a first silicon containing layer provided with an increased oxidation rate relatively to an exposed surface of said crystalline semiconductor region in said cavity and depositing a second silicon containing layer on said first silicon containing layer with a different oxidation rate relatively to said first silicon containing layer, said second silicon containing layer filling the cavity; partially removing the insulating layer, the first and the second silicon containing layer, thereby providing an insulated layer within the cavity which electrically isolates the first semiconductor electrode formed by the second silicon containing layer from said crystalline semiconductor region; wherein the upper portion of the first semiconductor electrode comprises exposed surface portions and the cavity comprises exposed surface areas of the crystalline semiconductor region; concurrently oxidizing said exposed surface of said crystalline semiconductor region in said cavity and an exposed surface of said first semiconductor electrode so as to form a first oxide layer on said exposed surface of said first semiconductor electrode and a second oxide layer on said exposed surface of said crystalline semiconductor region and forming a second semiconductor electrode in said cavity and above said first semiconductor electrode, said second semiconductor electrode being electrically isolated from said first semiconductor electrode by said first oxide layer; wherein providing an increased oxidation rate of said first silicon containing layer relative to an exposed surface of said crystalline semiconductor region in said cavity comprises incorporating an arsenic dopant species, or forming a semiconductor alloy comprising germanium. forming a cavity in a crystalline semiconductor region; forming an insulating layer within the cavity; forming a first semiconductor electrode in said cavity by the following steps: depositing on the insulating layer a first silicon containing layer provided with an increased oxidation rate relatively to an exposed surface of said crystalline semiconductor region in said cavity and depositing a second silicon containing layer on said first silicon containing layer with a different oxidation rate relatively to said first silicon containing layer, said second silicon containing layer filling the cavity; partially removing the insulating layer, the first and the second silicon containing layer, thereby providing an insulated layer within the cavity which electrically isolates the first semiconductor electrode formed by the second silicon containing layer from said crystalline semiconductor region; wherein the upper portion of the first semiconductor electrode comprises exposed surface portions and the cavity comprises exposed surface areas of the crystalline semiconductor region; concurrently oxidizing said exposed surface of said crystalline semiconductor region in said cavity and an exposed surface of said first semiconductor electrode so as to form a first oxide layer on said exposed surface of said first semiconductor electrode and a second oxide layer on said exposed surface of said crystalline semiconductor region and forming a second semiconductor electrode in said cavity and above said first semiconductor electrode, said second semiconductor electrode being electrically isolated from said first semiconductor electrode by said first oxide layer; depositing on the insulating layer a first silicon containing layer provided with an increased oxidation rate relatively to an exposed surface of said crystalline semiconductor region in said cavity and depositing a second silicon containing layer on said first silicon containing layer with a different oxidation rate relatively to said first silicon containing layer, said second silicon containing layer filling the cavity; partially removing the insulating layer, the first and the second silicon containing layer, thereby providing an insulated layer within the cavity which electrically isolates the first semiconductor electrode formed by the second silicon containing layer from said crystalline semiconductor region; wherein the upper portion of the first semiconductor electrode comprises exposed surface portions and the cavity comprises exposed surface areas of the crystalline semiconductor region; concurrently oxidizing said exposed surface of said crystalline semiconductor region in said cavity and an exposed surface of said first semiconductor electrode so as to form a first oxide layer on said exposed surface of said first semiconductor electrode and a second oxide layer on said exposed surface of said crystalline semiconductor region and forming a second semiconductor electrode in said cavity and above said first semiconductor electrode, said second semiconductor electrode being electrically isolated from said first semiconductor electrode by said first oxide layer; wherein providing an increased oxidation rate of said first silicon containing layer relative to an exposed surface of said crystalline semiconductor region in said cavity comprises incorporating an arsenic dopant species, or forming a semiconductor alloy comprising germanium.