A multilayer semiconductor integrated circuit device being at least provided with: a first semiconductor integrated circuit device (1 1), comprising: a first semiconductor body (2 1) of which thickness is 5 μm or less; a first n type semiconductor region (3 1) provided in the first semiconductor body (2 1), with elements including a transistor being provided in the first n type semiconductor region (3 1); a first p type semiconductor region (4 1) provided in the first semiconductor body (2 1), with elements including a transistor being provided in the first p type semiconductor region (4 1); a first penetrating semiconductor region (5 1) which is a doped region that penetrates through the first semiconductor body (2 1) in the thickness direction and is connected to a first power supply potential; and a second penetrating semiconductor region (6 1) which is a doped region that penetrates through the first semiconductor body (2 1) in the thickness direction and is connected to a second power supply potential, and a second semiconductor integrated circuit device (1 2) that forms a multilayer structure with the first semiconductor integrated circuit device, wherein the second semiconductor integrated circuit device (1 2) comprises a second semiconductor body (2 2) which is vertically arranged over or under the first semiconductor body (2 1), a first electrode (7 2) electrically connected to the first penetrating semiconductor region (5 1); and a second electrode (8 2) connected to the second penetrating semiconductor region (6 1), characterized in that the resistance value in the first penetrating semiconductor region (5 1) and the second penetrating semiconductor region (6 1) is 3 mΩ or less. a first semiconductor integrated circuit device (1 1), comprising: a first semiconductor body (2 1) of which thickness is 5 μm or less; a first n type semiconductor region (3 1) provided in the first semiconductor body (2 1), with elements including a transistor being provided in the first n type semiconductor region (3 1); a first p type semiconductor region (4 1) provided in the first semiconductor body (2 1), with elements including a transistor being provided in the first p type semiconductor region (4 1); a first penetrating semiconductor region (5 1) which is a doped region that penetrates through the first semiconductor body (2 1) in the thickness direction and is connected to a first power supply potential; and a second penetrating semiconductor region (6 1) which is a doped region that penetrates through the first semiconductor body (2 1) in the thickness direction and is connected to a second power supply potential, and a second semiconductor integrated circuit device (1 2) that forms a multilayer structure with the first semiconductor integrated circuit device, wherein the second semiconductor integrated circuit device (1 2) comprises a second semiconductor body (2 2) which is vertically arranged over or under the first semiconductor body (2 1), a first electrode (7 2) electrically connected to the first penetrating semiconductor region (5 1); and a second electrode (8 2) connected to the second penetrating semiconductor region (6 1), characterized in that the resistance value in the first penetrating semiconductor region (5 1) and the second penetrating semiconductor region (6 1) is 3 mΩ or less. a first semiconductor body (2 1) of which thickness is 5 μm or less; a first n type semiconductor region (3 1) provided in the first semiconductor body (2 1), with elements including a transistor being provided in the first n type semiconductor region (3 1); a first p type semiconductor region (4 1) provided in the first semiconductor body (2 1), with elements including a transistor being provided in the first p type semiconductor region (4 1); a first penetrating semiconductor region (5 1) which is a doped region that penetrates through the first semiconductor body (2 1) in the thickness direction and is connected to a first power supply potential; and a second penetrating semiconductor region (6 1) which is a doped region that penetrates through the first semiconductor body (2 1) in the thickness direction and is connected to a second power supply potential, and a second semiconductor integrated circuit device (1 2) that forms a multilayer structure with the first semiconductor integrated circuit device, wherein the second semiconductor integrated circuit device (1 2) comprises a second semiconductor body (2 2) which is vertically arranged over or under the first semiconductor body (2 1), a first electrode (7 2) electrically connected to the first penetrating semiconductor region (5 1); and a second electrode (8 2) connected to the second penetrating semiconductor region (6 1), characterized in that the resistance value in the first penetrating semiconductor region (5 1) and the second penetrating semiconductor region (6 1) is 3 mΩ or less.