A voltage level shifter, comprising: a first pull-up circuit, comprising: a first input configured to receive a non-complement input signal; and a second input configured to receive a non-complement output signal; the first pull-up circuit configured to generate a complement output signal on a first pull-up output coupled to a complement output; a first pull-down circuit, comprising: a first input configured to receive a complement input signal; the first pull-down circuit configured to generate the non-complement output signal comprising a ground voltage signal on a first pull-down output coupled to a non-complement output; a first preconditioning circuit, comprising: a first input configured to receive the non-complement output signal; and a second input configured to receive the complement output signal; the first preconditioning circuit configured to generate a shifted voltage signal of the complement input signal on a first preconditioning output directly coupled to the complement output in response to the non-complement output signal transitioning to a logic low voltage; and characterized by a second preconditioning circuit, comprising: a first input configured to receive the complement output signal; and a second input configured to receive the non-complement output signal; the second preconditioning circuit configured to generate the ground voltage signal on a second preconditioning output directly coupled to the non-complement output in response to the complement output signal transitioning to a logic high voltage. a first pull-up circuit, comprising: a first input configured to receive a non-complement input signal; and a second input configured to receive a non-complement output signal; the first pull-up circuit configured to generate a complement output signal on a first pull-up output coupled to a complement output; a first input configured to receive a non-complement input signal; and a second input configured to receive a non-complement output signal; the first pull-up circuit configured to generate a complement output signal on a first pull-up output coupled to a complement output; a first pull-down circuit, comprising: a first input configured to receive a complement input signal; the first pull-down circuit configured to generate the non-complement output signal comprising a ground voltage signal on a first pull-down output coupled to a non-complement output; a first input configured to receive a complement input signal; the first pull-down circuit configured to generate the non-complement output signal comprising a ground voltage signal on a first pull-down output coupled to a non-complement output; a first preconditioning circuit, comprising: a first input configured to receive the non-complement output signal; and a second input configured to receive the complement output signal; the first preconditioning circuit configured to generate a shifted voltage signal of the complement input signal on a first preconditioning output directly coupled to the complement output in response to the non-complement output signal transitioning to a logic low voltage; and characterized by a first input configured to receive the non-complement output signal; and a second input configured to receive the complement output signal; the first preconditioning circuit configured to generate a shifted voltage signal of the complement input signal on a first preconditioning output directly coupled to the complement output in response to the non-complement output signal transitioning to a logic low voltage; and characterized by a second preconditioning circuit, comprising: a first input configured to receive the complement output signal; and a second input configured to receive the non-complement output signal; the second preconditioning circuit configured to generate the ground voltage signal on a second preconditioning output directly coupled to the non-complement output in response to the complement output signal transitioning to a logic high voltage. a first input configured to receive the complement output signal; and a second input configured to receive the non-complement output signal; the second preconditioning circuit configured to generate the ground voltage signal on a second preconditioning output directly coupled to the non-complement output in response to the complement output signal transitioning to a logic high voltage.