A high-frequency signal processor provided with a first operation mode and a second operation mode, the high-frequency signal processor comprising: a test signal generating circuit that generates a test signal having a first frequency component and a second frequency component; a first switch that transmits a signal received as a first signal at an antenna in the first operation mode and transmits the test signal as the first signal in the second operation mode; a mixer circuit that includes a differential circuit capable of correcting a differential balance within a specified variable range and down-converts the first signal to a second signal having a frequency band lower than the first signal; characterized by a phase detection portion that extracts a third signal from the second signal in the second operation mode, the third signal having a frequency component equivalent to a difference between the first frequency component and the second frequency component, and detects a phase for the third signal; and a control portion that changes the differential balance for the mixer circuit according to a detection result from the phase detection portion, wherein the mixer circuit operates in the first operation mode while the differential balance is set to a first correction value within a variable range, and wherein the control portion, in the second operation mode, varies the differential balance and concurrently searches for a transition point allowing a phase for the third signal to transition by approximately 180° before and after varying the differential balance within a minimum fluctuation range and supplies the mixer circuit with the first correction value, namely, the differential balance corresponding to the transition point. a test signal generating circuit that generates a test signal having a first frequency component and a second frequency component; a first switch that transmits a signal received as a first signal at an antenna in the first operation mode and transmits the test signal as the first signal in the second operation mode; a mixer circuit that includes a differential circuit capable of correcting a differential balance within a specified variable range and down-converts the first signal to a second signal having a frequency band lower than the first signal; characterized by a phase detection portion that extracts a third signal from the second signal in the second operation mode, the third signal having a frequency component equivalent to a difference between the first frequency component and the second frequency component, and detects a phase for the third signal; and a control portion that changes the differential balance for the mixer circuit according to a detection result from the phase detection portion, wherein the mixer circuit operates in the first operation mode while the differential balance is set to a first correction value within a variable range, and wherein the control portion, in the second operation mode, varies the differential balance and concurrently searches for a transition point allowing a phase for the third signal to transition by approximately 180° before and after varying the differential balance within a minimum fluctuation range and supplies the mixer circuit with the first correction value, namely, the differential balance corresponding to the transition point.