An impedance matched load detecting line driver, comprising: a buffer amplifier switchable between a power-up state coupled to a power voltage on a main power rail and a sleep state uncoupled from the power voltage on the main power rail in response to a given sleep state signal, having a signal input at a first input of the buffer amplifier, a feedback input at a second input of the buffer amplifier, a signal output coupled to an output node for coupling to a given load, a feedback resistor (Rf) coupled between the output node and the feedback input, and a switchable feedback resistor (RLA, 240) switchably coupling, in response to the sleep state signal, the feedback input to a ground; a first comparator to generate, while the buffer amplifier is in the power-up state, a first load detection signal based on the voltage at the feedback resistor corresponding to whether a given load is coupled to the output node; a detection current source to inject a detection current (Idet) into the output node while the buffer amplifier is in the sleep state, and to inject a detection current into the output node during a collapse of the main power rail, to produce a voltage on the output node corresponding to whether the load is coupled to the output node; and a second comparator to generate, while the detection current is injected into the output node, a second load detection signal (vref) based on a resulting voltage at the output node, indicating whether the load is coupled to the output node while the buffer amplifier is in the sleep state and whether the load is coupled to the output node during a collapse of the main power rail. a buffer amplifier switchable between a power-up state coupled to a power voltage on a main power rail and a sleep state uncoupled from the power voltage on the main power rail in response to a given sleep state signal, having a signal input at a first input of the buffer amplifier, a feedback input at a second input of the buffer amplifier, a signal output coupled to an output node for coupling to a given load, a feedback resistor (Rf) coupled between the output node and the feedback input, and a switchable feedback resistor (RLA, 240) switchably coupling, in response to the sleep state signal, the feedback input to a ground; a first comparator to generate, while the buffer amplifier is in the power-up state, a first load detection signal based on the voltage at the feedback resistor corresponding to whether a given load is coupled to the output node; a detection current source to inject a detection current (Idet) into the output node while the buffer amplifier is in the sleep state, and to inject a detection current into the output node during a collapse of the main power rail, to produce a voltage on the output node corresponding to whether the load is coupled to the output node; and a second comparator to generate, while the detection current is injected into the output node, a second load detection signal (vref) based on a resulting voltage at the output node, indicating whether the load is coupled to the output node while the buffer amplifier is in the sleep state and whether the load is coupled to the output node during a collapse of the main power rail.