A method of writing to a flash memory device performed by a processor, the flash memory device comprising a plurality of memory cells, the method comprising: writing data to at least one of the plurality of memory cells at a first resolution, wherein the first resolution is a first number of bits of data per memory cell; receiving a signal to adjust a number of bits stored in the at least one of the plurality of memory cells to be at a second resolution, wherein the second resolution is a second number of bits of data per memory cell; and in response to receiving the signal, re-writing at least a portion of the data to the at least one of the plurality of memory cells at the second resolution, wherein the second number of bits exceeds the first number of bits, characterised in that: the writing and re-writing steps only occur if it is determined that both of a predetermined power supply condition of the flash memory device or a host device connected to the flash memory device and a predetermined bandwidth condition of the processor are met wherein the predetermined power supply condition is met if either the memory device is supplied with AC power or a battery supplying power is charged to a predetermined charge, and the predetermined bandwidth condition is met if a processor coupled to the flash memory device has more than a predetermined bandwidth; and if it is determined that one or both of the predetermined power supply condition and predetermined bandwidth condition are not met then the writing and re-writing steps are substituted with a step of writing the data to at least one of the plurality of memory cells at the first resolution. writing data to at least one of the plurality of memory cells at a first resolution, wherein the first resolution is a first number of bits of data per memory cell; receiving a signal to adjust a number of bits stored in the at least one of the plurality of memory cells to be at a second resolution, wherein the second resolution is a second number of bits of data per memory cell; and in response to receiving the signal, re-writing at least a portion of the data to the at least one of the plurality of memory cells at the second resolution, wherein the second number of bits exceeds the first number of bits, characterised in that: the writing and re-writing steps only occur if it is determined that both of a predetermined power supply condition of the flash memory device or a host device connected to the flash memory device and a predetermined bandwidth condition of the processor are met wherein the predetermined power supply condition is met if either the memory device is supplied with AC power or a battery supplying power is charged to a predetermined charge, and the predetermined bandwidth condition is met if a processor coupled to the flash memory device has more than a predetermined bandwidth; and if it is determined that one or both of the predetermined power supply condition and predetermined bandwidth condition are not met then the writing and re-writing steps are substituted with a step of writing the data to at least one of the plurality of memory cells at the first resolution. the writing and re-writing steps only occur if it is determined that both of a predetermined power supply condition of the flash memory device or a host device connected to the flash memory device and a predetermined bandwidth condition of the processor are met wherein the predetermined power supply condition is met if either the memory device is supplied with AC power or a battery supplying power is charged to a predetermined charge, and the predetermined bandwidth condition is met if a processor coupled to the flash memory device has more than a predetermined bandwidth; and if it is determined that one or both of the predetermined power supply condition and predetermined bandwidth condition are not met then the writing and re-writing steps are substituted with a step of writing the data to at least one of the plurality of memory cells at the first resolution.