A circuit, comprising four bridge arm units and two capacitors, wherein the four bridge arm units are a first bridge arm unit, a second bridge arm unit, a third bridge arm unit, and a fourth bridge arm unit, and the two capacitors are a first capacitor and a second capacitor; each bridge arm unit comprises two diodes (D1 to D8), an inductor (L1 to L4), and a switching transistor (Q1 to D4), wherein for each arm unit the two diodes are a first diode (D1 to D4) and a second diode (D5 to D8), an anode of the first diode (D1 to D4) is connected to a cathode of the second diode (D5 to D8), a joint between the first diode (D1 to D4) and the second diode (D5 to D8) is connected to a first port of the inductor (L1 to L4) and a first port of the switching transistor (Q1 to Q5), and a second port of the switching transistor (Q1 to Q4) is connected to a neutral wire N; a cathode of the first diode (D1 to D4) is connected to a first port of the first capacitor, an anode of the second diode (D5 to D8) is connected to a first port of the second capacitor, and a second port of the first capacitor and a second port of the second capacitor are connected to the neutral wire N; a second port of the inductor of the first bridge arm unit is configured to connect to a first-phase alternating current power supply of a three-phase power supply; a second port of the inductor of the second bridge arm unit and a second port of the inductor of the third bridge arm unit are configured to connect to a second-phase alternating current power supply of the three-phase power supply; and a second port of the inductor of the fourth bridge arm unit is configured to connect to a third-phase alternating current power supply of the three-phase power supply, the circuit further comprises a first switch, the second port of the inductor of the first bridge arm unit is further configured to connect to a positive direct current power supply (BAT +), and the first switch is configured to cause the second port of the inductor of the first bridge arm unit to switch between the first-phase alternating current power supply and the positive direct current power supply (BAT +); the circuit further comprises a second switch, the second port of the inductor of the second bridge arm unit is further configured to connect to the positive direct current power supply (BAT +), and the second switch is configured to cause the second port of the inductor of the second bridge arm unit to switch between the second-phase alternating current power supply and the positive direct current power supply (BAT +); the circuit further comprises a third switch, the second port of the inductor of the third bridge arm unit is further configured to connect to a negative direct current power supply (BAT -), and the third switch is configured to cause the second port of the inductor of the third bridge arm unit to switch between the second-phase alternating current power supply and the negative direct current power supply (BAT -); and the circuit further comprises a fourth switch, the second port of the inductor of the fourth bridge arm unit is further configured to connect to the negative direct current power supply (BAT -), and the fourth switch is configured to cause the second port of the inductor of the fourth bridge arm unit to switch between the third-phase alternating current power supply and the negative direct current power supply (BAT -), wherein the circuit is configured so that in a main supply mode the second bridge arm unit and the third bridge arm unit are connected in parallel and work alternately to charge the same capacitor, the switching transistor of the second bridge unit and the switching transistor of the third bridge unit are turned on alternately; and wherein in a battery mode the switching transistor of the second bridge unit and the switching transistor of the first bridge unit are turned on alternately to charge the first capacitor and the switching transistor of the third bridge unit and the switching transistor of the fourth bridge unit are turned on alternately to charge the second capacitor.