A circuit arrangement (CR; CR') for receiving multilevel optical signals from at least one optical guide, said multilevel optical signals comprising high-speed data signals and low-speed status signals, said circuit arrangement (CR; CR') comprising: - at least one light-receiving component for converting the optical signals into electrical current signals (I PD), - at least one transimpedance amplifier, being provided with the electrical current signals (I PD) from the light-receiving component, - at least one automatic gain controller for controlling the gain or transimpedance of the transimpedance amplifier, in particular in order to keep the amplitude of the output (V out-data-analog) of the transimpedance amplifier to a desired, for example constant, level for different levels of the electrical current signals (I PD), - at least one integrator in a feedback path, said integrator generating a control signal (Vint), - at least one voltage-controlled current source, being provided with the control signal (V int) from the integrator, - at least one first limiter acting as a comparator and generating in its output a logic level for positive or negative voltages in its input, with the output (V out-data-analog) of the transimpedance amplifier being connected - to the input of the automatic gain controller, - to the input of the integrator, and - to the input of the first limiter, characterized by - at least one second transimpedance amplifier arranged in parallel to the transimpedance amplifier, - at least one automatic offset controller for setting the voltage (V offset) for the second transimpedance amplifier, with the output (V out-data-analog) of the transimpedance amplifier being connected to the input of the automatic offset controller, with the output (V out-status-analog) of the second transimpedance amplifier being connected to the input of the automatic offset controller, and - at least one second limiter, with the output (V out-status-analog) of the second transimpedance amplifier being connected to the input of the second limiter, wherein the output (V out-data-digital) of the first limiter corresponds to the received high-speed data signals, and wherein the output (V out-status-digital) of the second limiter corresponds to the received low-speed status signals. - at least one light-receiving component for converting the optical signals into electrical current signals (I PD), - at least one transimpedance amplifier, being provided with the electrical current signals (I PD) from the light-receiving component, - at least one automatic gain controller for controlling the gain or transimpedance of the transimpedance amplifier, in particular in order to keep the amplitude of the output (V out-data-analog) of the transimpedance amplifier to a desired, for example constant, level for different levels of the electrical current signals (I PD), - at least one integrator in a feedback path, said integrator generating a control signal (Vint), - at least one voltage-controlled current source, being provided with the control signal (V int) from the integrator, - at least one first limiter acting as a comparator and generating in its output a logic level for positive or negative voltages in its input, with the output (V out-data-analog) of the transimpedance amplifier being connected - to the input of the automatic gain controller, - to the input of the integrator, and - to the input of the first limiter, - at least one second transimpedance amplifier arranged in parallel to the transimpedance amplifier, - at least one automatic offset controller for setting the voltage (V offset) for the second transimpedance amplifier, with the output (V out-data-analog) of the transimpedance amplifier being connected to the input of the automatic offset controller, with the output (V out-status-analog) of the second transimpedance amplifier being connected to the input of the automatic offset controller, and - at least one second limiter, with the output (V out-status-analog) of the second transimpedance amplifier being connected to the input of the second limiter, wherein the output (V out-data-digital) of the first limiter corresponds to the received high-speed data signals, and wherein the output (V out-status-digital) of the second limiter corresponds to the received low-speed status signals.