A computer system, comprising: a configuration comprising a core configurable between a single thread mode and a multithreading mode, the ST mode addressing a primary thread and the MT mode addressing the primary thread and one or more secondary threads on shared resources of the core; and a multithreading facility configured to control utilisation of the configuration, wherein the multithreading facility is adapted to: execute in the primary thread in the ST mode, an MT mode setting instruction; obtain a number of threads requested from a location specified by the MT mode setting instruction, wherein the MT mode setting instruction is a signal processor (SIGP) instruction from an operating system, the SIGP instruction comprising a set-MT order and a program specified maximum thread-id (PSMTID) that sets a number of bits for thread identification associated with the number of threads requested; enable the MT mode to execute the multiple threads comprising the primary thread and the one or more secondary threads based on determining that the number of threads requested indicates multiple threads and executing the set-MT order with a non-zero value of the PSMTID; and remain in the ST mode and prevent enablement of the MT mode based on executing the set-MT order with a zero value of the PSMTID. a configuration comprising a core configurable between a single thread mode and a multithreading mode, the ST mode addressing a primary thread and the MT mode addressing the primary thread and one or more secondary threads on shared resources of the core; and a multithreading facility configured to control utilisation of the configuration, wherein the multithreading facility is adapted to: execute in the primary thread in the ST mode, an MT mode setting instruction; obtain a number of threads requested from a location specified by the MT mode setting instruction, wherein the MT mode setting instruction is a signal processor (SIGP) instruction from an operating system, the SIGP instruction comprising a set-MT order and a program specified maximum thread-id (PSMTID) that sets a number of bits for thread identification associated with the number of threads requested; enable the MT mode to execute the multiple threads comprising the primary thread and the one or more secondary threads based on determining that the number of threads requested indicates multiple threads and executing the set-MT order with a non-zero value of the PSMTID; and remain in the ST mode and prevent enablement of the MT mode based on executing the set-MT order with a zero value of the PSMTID. execute in the primary thread in the ST mode, an MT mode setting instruction; obtain a number of threads requested from a location specified by the MT mode setting instruction, wherein the MT mode setting instruction is a signal processor (SIGP) instruction from an operating system, the SIGP instruction comprising a set-MT order and a program specified maximum thread-id (PSMTID) that sets a number of bits for thread identification associated with the number of threads requested; enable the MT mode to execute the multiple threads comprising the primary thread and the one or more secondary threads based on determining that the number of threads requested indicates multiple threads and executing the set-MT order with a non-zero value of the PSMTID; and remain in the ST mode and prevent enablement of the MT mode based on executing the set-MT order with a zero value of the PSMTID.