A method for forming a three-dimensional memory device, comprising: forming a dielectric stack on a substrate, the dielectric stack comprising a plurality of interleaved dielectric layers and sacrificial layers; forming a staircase structure (224, 342) on at least one side of the dielectric stack; the method further comprises: - forming a first dummy hole extending vertically through the staircase structure (224, 342) and reaching the substrate as well as forming a first spacer in the first dummy hole, the first spacer having a hollow core, or - forming a dummy channel structure (302, 303) reaching the substrate, the dummy channel structure (302, 303) extending vertically through the staircase structure (224, 342), comprises forming a first spacer by removing part of the dummy channel structure (302, 303), the first spacer having a hollow core; wherein the method for forming a three-dimensional memory device is characterized by further comprising: forming a through stair contact, TSC, in contact with the substrate by depositing a first conductor layer in the hollow core of the first spacer, the TSC extending vertically through the staircase structure (224, 342); and forming a second dummy hole outside the dielectric stack simultaneously with forming the first dummy hole or the dummy channel structure (302, 303) and forming a second spacer in the second dummy hole outside the dielectric stack simultaneously with forming the first spacer, the second spacer having a hollow core, and forming a peripheral contact by depositing a second conductor layer in the second spacer simultaneously with forming the TSC, wherein the peripheral contact is in contact with the substrate, and forming channel structures extending through the dielectric stack and in contact with the substrate. forming a dielectric stack on a substrate, the dielectric stack comprising a plurality of interleaved dielectric layers and sacrificial layers; forming a staircase structure (224, 342) on at least one side of the dielectric stack; the method further comprises: - forming a first dummy hole extending vertically through the staircase structure (224, 342) and reaching the substrate as well as forming a first spacer in the first dummy hole, the first spacer having a hollow core, or - forming a dummy channel structure (302, 303) reaching the substrate, the dummy channel structure (302, 303) extending vertically through the staircase structure (224, 342), comprises forming a first spacer by removing part of the dummy channel structure (302, 303), the first spacer having a hollow core; - forming a first dummy hole extending vertically through the staircase structure (224, 342) and reaching the substrate as well as forming a first spacer in the first dummy hole, the first spacer having a hollow core, or - forming a dummy channel structure (302, 303) reaching the substrate, the dummy channel structure (302, 303) extending vertically through the staircase structure (224, 342), comprises forming a first spacer by removing part of the dummy channel structure (302, 303), the first spacer having a hollow core; wherein the method for forming a three-dimensional memory device is characterized by further comprising: forming a through stair contact, TSC, in contact with the substrate by depositing a first conductor layer in the hollow core of the first spacer, the TSC extending vertically through the staircase structure (224, 342); and forming a second dummy hole outside the dielectric stack simultaneously with forming the first dummy hole or the dummy channel structure (302, 303) and forming a second spacer in the second dummy hole outside the dielectric stack simultaneously with forming the first spacer, the second spacer having a hollow core, and forming a peripheral contact by depositing a second conductor layer in the second spacer simultaneously with forming the TSC, wherein the peripheral contact is in contact with the substrate, and forming channel structures extending through the dielectric stack and in contact with the substrate. forming a through stair contact, TSC, in contact with the substrate by depositing a first conductor layer in the hollow core of the first spacer, the TSC extending vertically through the staircase structure (224, 342); and forming a second dummy hole outside the dielectric stack simultaneously with forming the first dummy hole or the dummy channel structure (302, 303) and forming a second spacer in the second dummy hole outside the dielectric stack simultaneously with forming the first spacer, the second spacer having a hollow core, and forming a peripheral contact by depositing a second conductor layer in the second spacer simultaneously with forming the TSC, wherein the peripheral contact is in contact with the substrate, and forming channel structures extending through the dielectric stack and in contact with the substrate.