An emissive display device comprising: a transfer substrate comprising electric connection elements (L1, L2, C1, C2, P1, P2, P3, P4); and a plurality of semiconductor chips (310; 510; 610) fastened to the substrate and connected to the electric connection elements of the substrate for the control thereof, each chip comprising: - a plurality of LEDs (120; 120 r, 120 g, 120 b); - a first terminal (Vdata) of connection to the substrate intended to receive, for each LED of the chip, a signal (Vdata r, Vdata g, Vdata b) for individually setting the LED, the signals for individually setting the different LEDs of the chip being temporally multiplexed on said first terminal (Vdata); and - a control circuit capable of demultiplexing the signals received on said first terminal and of applying to each LED of the chip a bias signal which is a function of the individual LED setting signal received on said first terminal (Vdata), wherein, in each elementary chip, the individual setting signals temporally multiplexed on the first terminal (Vdata) of the chip are digital signals, and wherein each chip further comprises a second terminal (Vsel) of connection to the substrate intended to receive a clock signal superposed to a synchronization signal (SYNC), the clock and synchronization signals being used by the control circuit to synchronize the demultiplexing of the signal received on the first terminal (Vdata). a transfer substrate comprising electric connection elements (L1, L2, C1, C2, P1, P2, P3, P4); and a plurality of semiconductor chips (310; 510; 610) fastened to the substrate and connected to the electric connection elements of the substrate for the control thereof, each chip comprising: - a plurality of LEDs (120; 120 r, 120 g, 120 b); - a first terminal (Vdata) of connection to the substrate intended to receive, for each LED of the chip, a signal (Vdata r, Vdata g, Vdata b) for individually setting the LED, the signals for individually setting the different LEDs of the chip being temporally multiplexed on said first terminal (Vdata); and - a control circuit capable of demultiplexing the signals received on said first terminal and of applying to each LED of the chip a bias signal which is a function of the individual LED setting signal received on said first terminal (Vdata), - a plurality of LEDs (120; 120 r, 120 g, 120 b); - a first terminal (Vdata) of connection to the substrate intended to receive, for each LED of the chip, a signal (Vdata r, Vdata g, Vdata b) for individually setting the LED, the signals for individually setting the different LEDs of the chip being temporally multiplexed on said first terminal (Vdata); and - a control circuit capable of demultiplexing the signals received on said first terminal and of applying to each LED of the chip a bias signal which is a function of the individual LED setting signal received on said first terminal (Vdata), wherein, in each elementary chip, the individual setting signals temporally multiplexed on the first terminal (Vdata) of the chip are digital signals, and wherein each chip further comprises a second terminal (Vsel) of connection to the substrate intended to receive a clock signal superposed to a synchronization signal (SYNC), the clock and synchronization signals being used by the control circuit to synchronize the demultiplexing of the signal received on the first terminal (Vdata).