A radio frequency mixer system comprising: a four phase clock generator to generate four phased half duty cycle clock signals of the same frequency and each being out of phase by a multiple of ninety degrees from the others; a dual differential electrical load having a first differential input and a second differential input; and a four phase half duty cycle mixer comprising: a differential input port coupled to a differential input signal, a dual differential output port comprising: an in-phase differential output port coupled to the first differential input of the dual differential load, and a quadrature-phase differential output port coupled to the second differential input of the dual differential load, wherein the mixer comprises: two pairs of first level switches (511, 512; 513, 514), each pair coupled in parallel to each of the terminals (RF-IN, RF-INb) of the differential input port and a corresponding plurality of pairs of parallel second level switches (521A, 521B; 522A, 522B; 523A, 523B; 524A, 524B), each pair of parallel second level switches coupled in series to one respective first level switch and to the dual differential output port, said first level and second level switches comprising control inputs coupled to the four phase clock generator to receive the four phased half duty cycle clock signals, (LO-I, LO-Ib, LO-Q, LO-Qb), wherein a first phased half duty cycle clock signal, (LO-I) and a second phased half duty cycle clock signal, (LO-Ib) are connected to the first level switches and a third phased half duty cycle clock signal, (LO-Q) and a fourth phased half duty cycle clock signal, (LO-Qb) are connected to the second level switches and wherein the control inputs of the first level switches are connected to first and second clock phases (401,402) and the control inputs of the second level switches are connected to third and fourth clock phases (403,404), and wherein the mixer is configured to convolve the differential input signal with the four phased half duty cycle clock signals (LO-I, LO-Ib, LO-Q, LO-Qb) to concurrently generate a differential in-phase output signal (BB-I, BB-Ib) on the in-phase differential output port and a differential quadrature-phase output signal (BB-Q, BB-Qb) on the quadrature-phase differential output port. a four phase clock generator to generate four phased half duty cycle clock signals of the same frequency and each being out of phase by a multiple of ninety degrees from the others; a dual differential electrical load having a first differential input and a second differential input; and a four phase half duty cycle mixer comprising: a differential input port coupled to a differential input signal, a dual differential output port comprising: an in-phase differential output port coupled to the first differential input of the dual differential load, and a quadrature-phase differential output port coupled to the second differential input of the dual differential load, wherein the mixer comprises: a differential input port coupled to a differential input signal, a dual differential output port comprising: an in-phase differential output port coupled to the first differential input of the dual differential load, and a quadrature-phase differential output port coupled to the second differential input of the dual differential load, wherein the mixer comprises: an in-phase differential output port coupled to the first differential input of the dual differential load, and a quadrature-phase differential output port coupled to the second differential input of the dual differential load, wherein the mixer comprises: two pairs of first level switches (511, 512; 513, 514), each pair coupled in parallel to each of the terminals (RF-IN, RF-INb) of the differential input port and a corresponding plurality of pairs of parallel second level switches (521A, 521B; 522A, 522B; 523A, 523B; 524A, 524B), each pair of parallel second level switches coupled in series to one respective first level switch and to the dual differential output port, said first level and second level switches comprising control inputs coupled to the four phase clock generator to receive the four phased half duty cycle clock signals, (LO-I, LO-Ib, LO-Q, LO-Qb), wherein a first phased half duty cycle clock signal, (LO-I) and a second phased half duty cycle clock signal, (LO-Ib) are connected to the first level switches and a third phased half duty cycle clock signal, (LO-Q) and a fourth phased half duty cycle clock signal, (LO-Qb) are connected to the second level switches and wherein the control inputs of the first level switches are connected to first and second clock phases (401,402) and the control inputs of the second level switches are connected to third and fourth clock phases (403,404), and wherein the mixer is configured to convolve the differential input signal with the four phased half duty cycle clock signals (LO-I, LO-Ib, LO-Q, LO-Qb) to concurrently generate a differential in-phase output signal (BB-I, BB-Ib) on the in-phase differential output port and a differential quadrature-phase output signal (BB-Q, BB-Qb) on the quadrature-phase differential output port.