An analog-to-digital converter with noise shaping, comprising: a weighted capacitor array that is configured to receive an analog input (Vip); a comparator (Cmp), having a first input terminal coupled to an output terminal of the weighted capacitor array, a second input terminal coupled to an amplifier-based noise shaping circuit for receiving a noise shaping signal, and outputting an output signal; successive approximation logic, having an input that is operable to receive the output signal from the comparator (Cmp), and configured to cause switching of the weighted capacitor array for successive approximations of the analog input and to provide a digital representation of the analog input at an output terminal (Dout); and wherein the amplifier-based noise shaping circuit for generating the noise shaping signal, comprises: an amplifier (Amp), having a voltage gain for amplifying a residual voltage (Vres), the residual voltage (Vres) being a difference between the analog input (Vip) and a digitized output that represents the digitized analog input (Vip), wherein the amplifier (Amp) is a dynamic amplifier; a switched capacitor network, coupled between the amplifier (Amp) and the comparator (Cmp), for sampling the amplified residual voltage (Vres_A); a finite impulse response filter, FIR, comprising the amplifier and the switched capacitor network; an infinite impulse response filter, IIR, cascaded between the finite impulse response filter and the comparator (Cmp); and the infinite impulse response filter is a passive charge sharing circuit comprising a capacitor (Cc), wherein capacitors of the switched capacitor network have a reduced capacitance, based on the voltage gain of the amplifier (Amp), that is small compared to the capacitor (Cc) of the infinite impulse response filter, wherein the passive charge sharing is between capacitors of the switched capacitor network and the capacitor (Cc) of the IIR filter. a weighted capacitor array that is configured to receive an analog input (Vip); a comparator (Cmp), having a first input terminal coupled to an output terminal of the weighted capacitor array, a second input terminal coupled to an amplifier-based noise shaping circuit for receiving a noise shaping signal, and outputting an output signal; successive approximation logic, having an input that is operable to receive the output signal from the comparator (Cmp), and configured to cause switching of the weighted capacitor array for successive approximations of the analog input and to provide a digital representation of the analog input at an output terminal (Dout); and wherein the amplifier-based noise shaping circuit for generating the noise shaping signal, comprises: an amplifier (Amp), having a voltage gain for amplifying a residual voltage (Vres), the residual voltage (Vres) being a difference between the analog input (Vip) and a digitized output that represents the digitized analog input (Vip), wherein the amplifier (Amp) is a dynamic amplifier; a switched capacitor network, coupled between the amplifier (Amp) and the comparator (Cmp), for sampling the amplified residual voltage (Vres_A); a finite impulse response filter, FIR, comprising the amplifier and the switched capacitor network; an infinite impulse response filter, IIR, cascaded between the finite impulse response filter and the comparator (Cmp); and the infinite impulse response filter is a passive charge sharing circuit comprising a capacitor (Cc), wherein capacitors of the switched capacitor network have a reduced capacitance, based on the voltage gain of the amplifier (Amp), that is small compared to the capacitor (Cc) of the infinite impulse response filter, wherein the passive charge sharing is between capacitors of the switched capacitor network and the capacitor (Cc) of the IIR filter. an amplifier (Amp), having a voltage gain for amplifying a residual voltage (Vres), the residual voltage (Vres) being a difference between the analog input (Vip) and a digitized output that represents the digitized analog input (Vip), wherein the amplifier (Amp) is a dynamic amplifier; a switched capacitor network, coupled between the amplifier (Amp) and the comparator (Cmp), for sampling the amplified residual voltage (Vres_A); a finite impulse response filter, FIR, comprising the amplifier and the switched capacitor network; an infinite impulse response filter, IIR, cascaded between the finite impulse response filter and the comparator (Cmp); and the infinite impulse response filter is a passive charge sharing circuit comprising a capacitor (Cc), wherein capacitors of the switched capacitor network have a reduced capacitance, based on the voltage gain of the amplifier (Amp), that is small compared to the capacitor (Cc) of the infinite impulse response filter, wherein the passive charge sharing is between capacitors of the switched capacitor network and the capacitor (Cc) of the IIR filter.