A north power controller comprising: a processor configured to: receive from an operating system of a computing system a request to transition the computing system to a low power state wherein latency tolerance requests will not be honoured; said lower power state being a forced Cx state; send a power management message to a south power controller, said message indicating a first time, said first time being a respective time to next timer event when the north power controller will be ready to exit the low power state and indicating to operate without honouring latency tolerance requests; receive a response from the south power controller containing information confirming the request to operate without honouring latency tolerance requests and containing a second time until the south power controller will be ready to exit the low power state; said second time being a further time to next timer event; determine the earlier of the first and second times as a determined time to a next event; if the determined time to the next event is less than or equal to the time to execute the requested forced Cx state, the north controller is configured to enter the requested forced Cx state and if the determined time to the next event is greater than the time to execute the requested forced C state, the north controller is configured to demote the request to transition to the low power state. a processor configured to: receive from an operating system of a computing system a request to transition the computing system to a low power state wherein latency tolerance requests will not be honoured; said lower power state being a forced Cx state; send a power management message to a south power controller, said message indicating a receive from an operating system of a computing system a request to transition the computing system to a low power state wherein latency tolerance requests will not be honoured; said lower power state being a forced Cx state; send a power management message to a south power controller, said message indicating a first time, said first time being a respective time to next timer event when the north power controller will be ready to exit the low power state and indicating to operate without honouring latency tolerance requests; receive a response from the south power controller containing information confirming the request to operate without honouring latency tolerance requests and containing a second time until the south power controller will be ready to exit the low power state; said second time being a further time to next timer event; determine the earlier of the first and second times as a determined time to a next event; if the determined time to the next event is less than or equal to the time to execute the requested forced Cx state, the north controller is configured to enter the requested forced Cx state receive a response from the south power controller containing information confirming the request to operate without honouring latency tolerance requests and containing a second time until the south power controller will be ready to exit the low power state; said second time being a further time to next timer event; determine the earlier of the first and second times as a determined time to a next event; if the determined time to the next event is less than or equal to the time to execute the requested forced Cx state, the north controller is configured to enter the requested forced Cx state and if the determined time to the next event is greater than the time to execute the requested forced C state, the north controller is configured to demote the request to transition to the low power state.