An apparatus comprising: a uniform random number generator, URNG, circuit to generate uniform random numbers; and an adder circuit including a plurality of adders, the adder circuitry coupled to the URNG circuit, wherein the uniform random numbers generated by the URNG circuit are transmitted with communications to any adder of the plurality of adders of the adder circuit,the adder circuit to hardware accelerate generation of Gaussian random numbers for machine learning, wherein the adder circuit comprises: a first adder of the plurality of adders, the first adder configured to add first and second uniform random numbers from the URNG circuit to generate a first output of the first adder, and to add another two uniform random numbers to generate a second output of the first adder after the first adder has generated the first output; a second adder of the plurality of adders, the second adder configured to add a third uniform random number from the URNG circuit with the first output to generate a first output of the second adder; and an N th adder of the plurality of adders, the N th adder configured to add another uniform random number from the URNG circuit with a first output of a previous adder of the plurality of adders to generate a first Gaussian random number. a uniform random number generator, URNG, circuit to generate uniform random numbers; and an adder circuit including a plurality of adders, the adder circuitry coupled to the URNG circuit, wherein the uniform random numbers generated by the URNG circuit are transmitted with communications to any adder of the plurality of adders of the adder circuit,the adder circuit to hardware accelerate generation of Gaussian random numbers for machine learning, wherein the adder circuit comprises: a first adder of the plurality of adders, the first adder configured to add first and second uniform random numbers from the URNG circuit to generate a first output of the first adder, and to add another two uniform random numbers to generate a second output of the first adder after the first adder has generated the first output; a second adder of the plurality of adders, the second adder configured to add a third uniform random number from the URNG circuit with the first output to generate a first output of the second adder; and an N th adder of the plurality of adders, the N th adder configured to add another uniform random number from the URNG circuit with a first output of a previous adder of the plurality of adders to generate a first Gaussian random number. a first adder of the plurality of adders, the first adder configured to add first and second uniform random numbers from the URNG circuit to generate a first output of the first adder, and to add another two uniform random numbers to generate a second output of the first adder after the first adder has generated the first output; a second adder of the plurality of adders, the second adder configured to add a third uniform random number from the URNG circuit with the first output to generate a first output of the second adder; and an N th adder of the plurality of adders, the N th adder configured to add another uniform random number from the URNG circuit with a first output of a previous adder of the plurality of adders to generate a first Gaussian random number.