A method for the fabrication of at least one electrical interconnect in a substrate, comprising: - Providing a substrate being a semiconductor wafer or die made of a substrate material and having a first main surface and comprising a back-end-of-line (BEOL) and a front-end-of-line (FEOL), wherein the first main surface is the backside of the wafer or die, i.e. the side which is remote from the BEOL; - Producing at least one ring structure in a substrate from the first main surface, the at least one ring structure surrounding an inner pillar structure of substrate material with a top, and having a bottom surface; - Filling the at least one ring structure with a first dielectric material with spin-on or spray-on or CVD in the ring structure and on the first main surface - Removing the first dielectric material to a level equal or higher than the first main surface - Applying a second dielectric material on the first main surface; - Removing the second and first dielectric material when present from the top of the inner pillar structure to open up the pillar structure; - Removing the inner pillar structure down to the bottom surface of the ring structure, leaving a pillar vacancy selectively to the dielectric material surrounding the pillar structure wherein the removal of the pillar structure stops on an interlayer dielectric layer of the substrate that is subsequently selectively removed in a second removal step to an underlying metal layer and stops on the underlying metal layer; - Providing a conductive inner pillar structure in the at least one ring structure, by at least partially filling the pillar vacancy with a conductive material, thereby forming at least one interconnect structure, the at least one interconnect structure forming an electrical path from the bottom surface up until the first main surface, - Providing a substrate being a semiconductor wafer or die made of a substrate material and having a first main surface and comprising a back-end-of-line (BEOL) and a front-end-of-line (FEOL), wherein the first main surface is the backside of the wafer or die, i.e. the side which is remote from the BEOL; - Producing at least one ring structure in a substrate from the first main surface, the at least one ring structure surrounding an inner pillar structure of substrate material with a top, and having a bottom surface; - Filling the at least one ring structure with a first dielectric material with spin-on or spray-on or CVD in the ring structure and on the first main surface - Removing the first dielectric material to a level equal or higher than the first main surface - Applying a second dielectric material on the first main surface; - Removing the second and first dielectric material when present from the top of the inner pillar structure to open up the pillar structure; - Removing the inner pillar structure down to the bottom surface of the ring structure, leaving a pillar vacancy selectively to the dielectric material surrounding the pillar structure wherein the removal of the pillar structure stops on an interlayer dielectric layer of the substrate that is subsequently selectively removed in a second removal step to an underlying metal layer and stops on the underlying metal layer; - Providing a conductive inner pillar structure in the at least one ring structure, by at least partially filling the pillar vacancy with a conductive material, thereby forming at least one interconnect structure, the at least one interconnect structure forming an electrical path from the bottom surface up until the first main surface,