A display device comprising: a first conductive layer disposed on a substrate; a passivation layer disposed on the first conductive layer; a second conductive layer disposed on the passivation layer; a via layer disposed on the second conductive layer; a first bank disposed on the via layer; a third conductive layer disposed on the first bank, the third conductive layer including: a first electrode; a second electrode; and a connection pattern, the first electrode, the second electrode, and the connection pattern being spaced apart from each other; a light emitting element, a first end and a second end of the light emitting element being disposed on the first electrode and the second electrode, respectively; and a transistor disposed between the substrate and the second conductive layer, the transistor comprising: an active layer; a gate electrode; a first source/drain electrode; and a second source/drain electrode, wherein the connection pattern electrically connects the first conductive layer and the second conductive layer through a first contact hole penetrating the first bank, the via layer and the passivation layer; wherein the first source/drain electrode and the second source/drain electrode are included in the first conductive layer; and wherein the second conductive layer further comprises a first power line, and the connection pattern electrically connects the first power line and the first source/drain electrode of the transistor through the first contact hole. a first conductive layer disposed on a substrate; a passivation layer disposed on the first conductive layer; a second conductive layer disposed on the passivation layer; a via layer disposed on the second conductive layer; a first bank disposed on the via layer; a third conductive layer disposed on the first bank, the third conductive layer including: a first electrode; a second electrode; and a connection pattern, the first electrode, the second electrode, and the connection pattern being spaced apart from each other; a first electrode; a second electrode; and a connection pattern, the first electrode, the second electrode, and the connection pattern being spaced apart from each other; a light emitting element, a first end and a second end of the light emitting element being disposed on the first electrode and the second electrode, respectively; and a transistor disposed between the substrate and the second conductive layer, the transistor comprising: an active layer; a gate electrode; a first source/drain electrode; and a second source/drain electrode, an active layer; a gate electrode; a first source/drain electrode; and a second source/drain electrode, wherein the connection pattern electrically connects the first conductive layer and the second conductive layer through a first contact hole penetrating the first bank, the via layer and the passivation layer; wherein the first source/drain electrode and the second source/drain electrode are included in the first conductive layer; and wherein the second conductive layer further comprises a first power line, and the connection pattern electrically connects the first power line and the first source/drain electrode of the transistor through the first contact hole.