An information processing apparatus comprising: a first processor configured to control operation of a predetermined controlled unit; a second processor configured to control operation of units of the information processing apparatus (100, 200) other than the predetermined controlled unit; a power supply unit configured to supply power from a power source to the first and second processors (115, 103); a sub control unit configured to control supply of power from the power supply unit to the first processor and to the second processor; and an authentication device, wherein the first processor and the second processor are configured to operate in a first mode, a second mode, and a third mode that is a state where the information processing apparatus (100, 200) is during return from the second mode to the first mode, in the first mode the first processor and second processor are operable respectively, in the second mode respective amounts of power supplied to the first and second processors (115, 103) are lower than that in the first mode, in the third mode respective amounts of power supplied to the first and second processors (115, 103) are an amount between that in the first mode and that in the second mode and at least the predetermined controlled unit is operable, and in the second mode, when a return factor that is a factor of returning from the second mode to the first mode has been detected, the first and second processors (115, 103) are configured to perform simultaneously a process to return from the second mode to the first mode, and the first processor is configured not to perform a synchronization process for synchronizing the first processor and the second processor until transition to the third mode is completed. a first processor configured to control operation of a predetermined controlled unit; a second processor configured to control operation of units of the information processing apparatus (100, 200) other than the predetermined controlled unit; a power supply unit configured to supply power from a power source to the first and second processors (115, 103); a sub control unit configured to control supply of power from the power supply unit to the first processor and to the second processor; and an authentication device, wherein the first processor and the second processor are configured to operate in a first mode, a second mode, and a third mode that is a state where the information processing apparatus (100, 200) is during return from the second mode to the first mode, in the first mode the first processor and second processor are operable respectively, in the second mode respective amounts of power supplied to the first and second processors (115, 103) are lower than that in the first mode, in the third mode respective amounts of power supplied to the first and second processors (115, 103) are an amount between that in the first mode and that in the second mode and at least the predetermined controlled unit is operable, and in the second mode, when a return factor that is a factor of returning from the second mode to the first mode has been detected, the first and second processors (115, 103) are configured to perform simultaneously a process to return from the second mode to the first mode, and the first processor is configured not to perform a synchronization process for synchronizing the first processor and the second processor until transition to the third mode is completed.