An amplifier system comprising: an input stage (12, 102) configured to receive an input pulse signal and to generate a reference voltage pulse (V RPLS) based on the input pulse signal; and an amplifier stage (14, 110) configured to receive at least one power voltage (V PSH, V PSL, V PS, V LDO) and configured to amplify the reference voltage pulse (V RPLS) and to provide pulse-shaping of an amplified reference voltage pulse (V AMP), wherein the pulse-shaping of the amplified reference voltage pulse is based on a change of amplitude of the at least one power voltage (V PSH, V PSL, V PS, V LDO) resulting from a change in amplitude of the reference voltage pulse (V RPLS) and, wherein the pulse-shaping of the amplified reference voltage pulse comprises a first increase in amplitude of the amplified reference voltage pulse from a first amplitude (V 1) to a second amplitude (V 2) during a first time duration, and a second increase in amplitude of the amplified reference voltage pulse from the second amplitude (V 2) to a third amplitude (V 3) during a second time duration subsequent to the first time duration, the second increase being greater than the first increase; wherein the amplifier stage comprises a Class AB amplifier comprising a first transistor device (N 1) and a second transistor device (P 1) interconnected by an output node on which the amplified reference voltage pulse (V AMP) is provided; wherein the at least one power voltage (V PSH, V PSL, V PS, V LDO) comprises: a power supply voltage (V PS) coupled to the output node via the first transistor device (N 1); and a low-dropout voltage (V LDO) coupled to the output node via the second transistor device (P 1), wherein the amplifier stage (14, 110) is configured to provide the pulse-shaping of the amplified reference voltage pulse (V AMP) based on an overshoot amplitude of the low-dropout voltage (V LDO) resulting from a change of resistance associated with the second transistor device (P 1) based on the increase in amplitude of the reference voltage pulse (V RPLS); and wherein the amplifier system is configured to generate a peripheral sensor interface, PSI, shaped output voltage pulse based on the amplified reference voltage pulse. an input stage (12, 102) configured to receive an input pulse signal and to generate a reference voltage pulse (V RPLS) based on the input pulse signal; and an amplifier stage (14, 110) configured to receive at least one power voltage (V PSH, V PSL, V PS, V LDO) and configured to amplify the reference voltage pulse (V RPLS) and to provide pulse-shaping of an amplified reference voltage pulse (V AMP), wherein the pulse-shaping of the amplified reference voltage pulse is based on a change of amplitude of the at least one power voltage (V PSH, V PSL, V PS, V LDO) resulting from a change in amplitude of the reference voltage pulse (V RPLS) and, wherein the pulse-shaping of the amplified reference voltage pulse comprises a first increase in amplitude of the amplified reference voltage pulse from a first amplitude (V 1) to a second amplitude (V 2) during a first time duration, and a second increase in amplitude of the amplified reference voltage pulse from the second amplitude (V 2) to a third amplitude (V 3) during a second time duration subsequent to the first time duration, the second increase being greater than the first increase; wherein the amplifier stage comprises a Class AB amplifier comprising a first transistor device (N 1) and a second transistor device (P 1) interconnected by an output node on which the amplified reference voltage pulse (V AMP) is provided; wherein the at least one power voltage (V PSH, V PSL, V PS, V LDO) comprises: a power supply voltage (V PS) coupled to the output node via the first transistor device (N 1); and a low-dropout voltage (V LDO) coupled to the output node via the second transistor device (P 1), wherein the amplifier stage (14, 110) is configured to provide the pulse-shaping of the amplified reference voltage pulse (V AMP) based on an overshoot amplitude of the low-dropout voltage (V LDO) resulting from a change of resistance associated with the second transistor device (P 1) based on the increase in amplitude of the reference voltage pulse (V RPLS); and wherein the amplifier system is configured to generate a peripheral sensor interface, PSI, shaped output voltage pulse based on the amplified reference voltage pulse. a power supply voltage (V PS) coupled to the output node via the first transistor device (N 1); and a low-dropout voltage (V LDO) coupled to the output node via the second transistor device (P 1), wherein the amplifier stage (14, 110) is configured to provide the pulse-shaping of the amplified reference voltage pulse (V AMP) based on an overshoot amplitude of the low-dropout voltage (V LDO) resulting from a change of resistance associated with the second transistor device (P 1) based on the increase in amplitude of the reference voltage pulse (V RPLS); and wherein the amplifier system is configured to generate a peripheral sensor interface, PSI, shaped output voltage pulse based on the amplified reference voltage pulse.