A method for data transmission in a two-wire data bus system with a differential two-wire data bus, comprising - a differential two-wire data bus (b1b2b3) having two signal lines for differential transmission of data between a bus master and between at least two bus nodes (BS1, BS2, BS3), - wherein the two-wire data bus (b1b2b3) is divided by the bus nodes (BS1, BS2, BS3) into at least two two-wire data bus sections (b1, b2, b3) and is terminated by a bus node, the terminal bus node, and - wherein each of the bus nodes (BS1, BS2, BS3), except for a first bus node, is connected to a preceding bus node (BS1, BS2) of the bus nodes (BS1, BS2, BS3) via a preceding two-wire data bus section (b2, b3) of the two-wire data bus sections (b1, b2, b3), and said one first bus node is connected to the bus master via a preceding two-wire data bus section of the two-wire data bus sections (b1, b2, b3), and - wherein each bus node (BS1, BS2, BS3), except for a terminal bus node, is connected to a subsequent bus node (BS2, BS3) of the bus nodes (BS1, BS2, BS3) via a subsequent two-wire data bus section (b2, b3) of the two-wire data bus sections (b1, b2, b3), characterized by - bidirectionally transmitting and receiving data via the two-wire data bus (b1b2b3) or at least a two-wire data bus section (b1, b2, b3) of the two-wire data bus sections (b1, b2, b3), hereinafter referred to as the two-wire data bus section (b1, b2, b3) of interest, via a master two-wire data bus interface of the bus master using a data bus protocol with more than two differential physical voltage and/or current levels - receiving data from the two-wire data bus section (b1, b2, b3) of interest via a two-wire data bus interface (OWS1, OWS2, OWS3) of a bus node of interest of the bus nodes (BS1, BS2, BS3) using a data bus protocol with more than two differential physical voltage and/or current levels; - transmitting data via the two-wire data bus section (b1, b2, b3) of interest via the two-wire data bus interface (OWS1, OWS2, OWS3) of a bus node of interest of the bus nodes (BS1, BS2, BS3) using a data bus protocol with more than two differential physical voltage and/or current levels; - bidirectionally transmitting and receiving data via at least a subsequent two-wire data bus section (b2, b3) of the two-wire data bus sections (b2, b3) via a master two-wire data bus interface (OWM1, OWM2, OWM3) of the bus node of interest using a data bus protocol with more than two differential physical voltage and/or current levels to a subsequent bus node (BS2, BS3); - controlling the master two-wire data bus interface (OWM1, OWM2, OWM3) of the bus node of interest via a bus master control register (OWMCR) of the bus node of interest, the bus master control register (OWMCR) being adapted to be written by the bus master via the two-wire data bus (b1b2b3). - a differential two-wire data bus (b1b2b3) having two signal lines for differential transmission of data between a bus master and between at least two bus nodes (BS1, BS2, BS3), - wherein the two-wire data bus (b1b2b3) is divided by the bus nodes (BS1, BS2, BS3) into at least two two-wire data bus sections (b1, b2, b3) and is terminated by a bus node, the terminal bus node, and - wherein each of the bus nodes (BS1, BS2, BS3), except for a first bus node, is connected to a preceding bus node (BS1, BS2) of the bus nodes (BS1, BS2, BS3) via a preceding two-wire data bus section (b2, b3) of the two-wire data bus sections (b1, b2, b3), and said one first bus node is connected to the bus master via a preceding two-wire data bus section of the two-wire data bus sections (b1, b2, b3), and - wherein each bus node (BS1, BS2, BS3), except for a terminal bus node, is connected to a subsequent bus node (BS2, BS3) of the bus nodes (BS1, BS2, BS3) via a subsequent two-wire data bus section (b2, b3) of the two-wire data bus sections (b1, b2, b3), - bidirectionally transmitting and receiving data via the two-wire data bus (b1b2b3) or at least a two-wire data bus section (b1, b2, b3) of the two-wire data bus sections (b1, b2, b3), hereinafter referred to as the two-wire data bus section (b1, b2, b3) of interest, via a master two-wire data bus interface of the bus master using a data bus protocol with more than two differential physical voltage and/or current levels - receiving data from the two-wire data bus section (b1, b2, b3) of interest via a two-wire data bus interface (OWS1, OWS2, OWS3) of a bus node of interest of the bus nodes (BS1, BS2, BS3) using a data bus protocol with more than two differential physical voltage and/or current levels; - transmitting data via the two-wire data bus section (b1, b2, b3) of interest via the two-wire data bus interface (OWS1, OWS2, OWS3) of a bus node of interest of the bus nodes (BS1, BS2, BS3) using a data bus protocol with more than two differential physical voltage and/or current levels; - bidirectionally transmitting and receiving data via at least a subsequent two-wire data bus section (b2, b3) of the two-wire data bus sections (b2, b3) via a master two-wire data bus interface (OWM1, OWM2, OWM3) of the bus node of interest using a data bus protocol with more than two differential physical voltage and/or current levels to a subsequent bus node (BS2, BS3); - controlling the master two-wire data bus interface (OWM1, OWM2, OWM3) of the bus node of interest via a bus master control register (OWMCR) of the bus node of interest, the bus master control register (OWMCR) being adapted to be written by the bus master via the two-wire data bus (b1b2b3).