A semiconductor device which drives a high side transistor disposed outside and coupled between a high potential side power supply voltage and a floating voltage and is comprised of one semiconductor chip, comprising: a high potential side power supply pad coupled to the high potential side power supply voltage; a floating pad coupled to the floating voltage; a low potential side power supply pad coupled to a low potential side power supply voltage; a power supply application area (AR_VP) applied with the high potential side power supply voltage; a high side area (AR_HVBK) formed with a circuit operated at a first power supply voltage with the floating voltage as a reference; a low side area (AR_LVBK) formed with a circuit operated at a second power supply voltage with the low potential side power supply voltage as a reference; a first termination area (AR_TRMBK1) which is disposed in a ring form so as to surround the power supply application area (AR_VP) and which is configured to absorb a difference in potential between the power supply application area (AR_VP) and the low side area (AR_LVBK); a second termination area (AR_TRMBK2) which is disposed in a ring form so as to surround the high side area (AR_HVBK) and which is configured to absorb a difference in potential between the high side area (AR_HVBK) and the low side area (AR_LVBK); a first isolation area which is disposed along an outer periphery of the first termination area (AR_TRMBK1) and isolates the first termination area (AR_TRMBK1) and the low side area (AR_LVBK) from each other; a second isolation area which is disposed along an outer periphery of the second termination area (AR_TRMBK2) and isolates the second termination area (AR_TRMBK2) and the low side area (AR_LVBK) from each other; and a high side driver (DVh) which is formed in the high side area (AR_HVBK) and drives the high side transistor. a high potential side power supply pad coupled to the high potential side power supply voltage; a floating pad coupled to the floating voltage; a low potential side power supply pad coupled to a low potential side power supply voltage; a power supply application area (AR_VP) applied with the high potential side power supply voltage; a high side area (AR_HVBK) formed with a circuit operated at a first power supply voltage with the floating voltage as a reference; a low side area (AR_LVBK) formed with a circuit operated at a second power supply voltage with the low potential side power supply voltage as a reference; a first termination area (AR_TRMBK1) which is disposed in a ring form so as to surround the power supply application area (AR_VP) and which is configured to absorb a difference in potential between the power supply application area (AR_VP) and the low side area (AR_LVBK); a second termination area (AR_TRMBK2) which is disposed in a ring form so as to surround the high side area (AR_HVBK) and which is configured to absorb a difference in potential between the high side area (AR_HVBK) and the low side area (AR_LVBK); a first isolation area which is disposed along an outer periphery of the first termination area (AR_TRMBK1) and isolates the first termination area (AR_TRMBK1) and the low side area (AR_LVBK) from each other; a second isolation area which is disposed along an outer periphery of the second termination area (AR_TRMBK2) and isolates the second termination area (AR_TRMBK2) and the low side area (AR_LVBK) from each other; and a high side driver (DVh) which is formed in the high side area (AR_HVBK) and drives the high side transistor.