A phase detector comprising: a first latch, for generating a first output signal and a second output signal in response to a phase difference φ between a first input signal and a second input signal, wherein each of the first and second output signals (p1, p2) comprises first phase information φ1 and second phase information φ2 of the phase difference φ; a control circuit, for generating a phase indicating signal in response to the first phase information φ1 of the phase difference φ, wherein the phase indicating signal indicates a relative position between the first input signal and the second input signal, wherein the first phase information φ1 corresponds to a phase difference between rising edges of the first and second input signals (s1, s2), and the second phase information φ2 corresponds to a phase difference between falling edges of the first and second input signals (s1, s2), or the first phase information φ1 corresponds to a phase difference between falling edges of the first and second input signals (s1, s2), and the second phase information φ2 corresponds to a phase difference between rising edges of the first and second input signals (s1, s2), and characterized in that the control circuit comprises: a control logic, for filtering out the second phase information φ2 from the first output signal and filtering out the second phase information φ2 from the second output signal to generate a first filtered signal and a second filtered signal; and a second latch, for generating the phase indicating signal with a second state in response to a first state of the first filtered signal and the second filtered signal. a first latch, for generating a first output signal and a second output signal in response to a phase difference φ between a first input signal and a second input signal, wherein each of the first and second output signals (p1, p2) comprises first phase information φ1 and second phase information φ2 of the phase difference φ; a control circuit, for generating a phase indicating signal in response to the first phase information φ1 of the phase difference φ, wherein the phase indicating signal indicates a relative position between the first input signal and the second input signal, wherein the first phase information φ1 corresponds to a phase difference between rising edges of the first and second input signals (s1, s2), and the second phase information φ2 corresponds to a phase difference between falling edges of the first and second input signals (s1, s2), or the first phase information φ1 corresponds to a phase difference between falling edges of the first and second input signals (s1, s2), and the second phase information φ2 corresponds to a phase difference between rising edges of the first and second input signals (s1, s2), and characterized in that the control circuit comprises: a control logic, for filtering out the second phase information φ2 from the first output signal and filtering out the second phase information φ2 from the second output signal to generate a first filtered signal and a second filtered signal; and a second latch, for generating the phase indicating signal with a second state in response to a first state of the first filtered signal and the second filtered signal. a control logic, for filtering out the second phase information φ2 from the first output signal and filtering out the second phase information φ2 from the second output signal to generate a first filtered signal and a second filtered signal; and a second latch, for generating the phase indicating signal with a second state in response to a first state of the first filtered signal and the second filtered signal.