Inverter arrangement, for discharging an intermediate-circuit capacitor of the inverter arrangement in a safe operating mode, comprising: a full bridge circuit having a plurality of bridge arms (20-i), wherein each bridge arm (20-i) comprises a high-side semiconductor switch (21-i) and a low-side semiconductor switch (22-i) which are respectively interconnected at a node (23-i); wherein, at a connecting point, all bridge arms (20-i) are electrically connected to a terminal of the intermediate-circuit capacitor and all other terminals of the bridge arms (20-i) are electrically connected to another terminal of the intermediate-circuit capacitor; wherein each of the nodes (23-i) can be connected to a phase terminal of an electric machine, and the safe operating mode is a freewheeling mode, in which the high-side and low-side semiconductor switches (21-i, 22-i) are open and a voltage system (U1, U2, U3) is formed; a control device which is designed to discharge the intermediate-circuit capacitor, and to ascertain a primary bridge arm having the lowest phase voltage (U1, U2, U3) at the respective node (23-i), to close the low-side semiconductor switch (22-i) of the primary bridge arm, to pulse the high-side semiconductor switch (21-i) of the primary bridge arm, and wherein the pulsing of the high-side semiconductor switch (21-i) in the primary bridge arm comprises a brief activation of the high-side semiconductor switch (21-i), and the high-side semiconductor switch (21-i) is then not completely switched to the conductive state, such that the heating of the inverter and of a connected electric machine is reduced. for discharging an intermediate-circuit capacitor of the inverter arrangement in a safe operating mode, comprising: a full bridge circuit having a plurality of bridge arms (20-i), wherein each bridge arm (20-i) comprises a high-side semiconductor switch (21-i) and a low-side semiconductor switch (22-i) which are respectively interconnected at a node (23-i); wherein, at a connecting point, all bridge arms (20-i) are electrically connected to a terminal of the intermediate-circuit capacitor and all other terminals of the bridge arms (20-i) are electrically connected to another terminal of the intermediate-circuit capacitor; wherein each of the nodes (23-i) can be connected to a phase terminal of an electric machine, and the safe operating mode is a freewheeling mode, in which the high-side and low-side semiconductor switches (21-i, 22-i) are open and a voltage system (U1, U2, U3) is formed; a control device which is designed to discharge the intermediate-circuit capacitor, and to ascertain a primary bridge arm having the lowest phase voltage (U1, U2, U3) at the respective node (23-i), to close the low-side semiconductor switch (22-i) of the primary bridge arm, to pulse the high-side semiconductor switch (21-i) of the primary bridge arm, and wherein the pulsing of the high-side semiconductor switch (21-i) in the primary bridge arm comprises a brief activation of the high-side semiconductor switch (21-i), and the high-side semiconductor switch (21-i) is then not completely switched to the conductive state, such that the heating of the inverter and of a connected electric machine is reduced. a full bridge circuit having a plurality of bridge arms (20-i), wherein each bridge arm (20-i) comprises a high-side semiconductor switch (21-i) and a low-side semiconductor switch (22-i) which are respectively interconnected at a node (23-i); wherein, at a connecting point, all bridge arms (20-i) are electrically connected to a terminal of the intermediate-circuit capacitor and all other terminals of the bridge arms (20-i) are electrically connected to another terminal of the intermediate-circuit capacitor; wherein each of the nodes (23-i) can be connected to a phase terminal of an electric machine, and the safe operating mode is a freewheeling mode, in which the high-side and low-side semiconductor switches (21-i, 22-i) are open and a voltage system (U1, U2, U3) is formed; a control device which is designed to discharge the intermediate-circuit capacitor, and to ascertain a primary bridge arm having the lowest phase voltage (U1, U2, U3) at the respective node (23-i), to close the low-side semiconductor switch (22-i) of the primary bridge arm, to pulse the high-side semiconductor switch (21-i) of the primary bridge arm, and wherein the pulsing of the high-side semiconductor switch (21-i) in the primary bridge arm comprises a brief activation of the high-side semiconductor switch (21-i), and the high-side semiconductor switch (21-i) is then not completely switched to the conductive state, such that the heating of the inverter and of a connected electric machine is reduced.