A memory controller, comprising: a command queue for receiving and storing memory access requests; an arbiter coupled to said command queue for providing a sequence of memory commands to a memory channel (130/140) from stored memory access requests; a replay queue for storing said sequence of memory commands to said memory channel (130/140), and continuing to store memory commands that have not yet received responses from said memory channel (130/140); and an error correcting code generation block and an ECC check block coupled to said replay queue, said ECC generation block for calculating in case a memory command being a write memory access request an ECC of the memory command, wherein in response to receiving a response from said memory channel (130/140), said ECC check block determines that there was an error in said response by comparing said calculated ECC with an ECC received from said memory channel (130/140), wherein: when a response indicates a completion of a corresponding memory command without any error, said replay queue removes said corresponding memory command without taking further action; and when a response indicates a completion of said corresponding memory command with an error, said replay queue replays at least said corresponding memory command, wherein said replay queue replays either the corresponding memory command on which the error may have occurred or a range of commands on which the error may have occurred. a command queue for receiving and storing memory access requests; an arbiter coupled to said command queue for providing a sequence of memory commands to a memory channel (130/140) from stored memory access requests; a replay queue for storing said sequence of memory commands to said memory channel (130/140), and continuing to store memory commands that have not yet received responses from said memory channel (130/140); and an error correcting code generation block and an ECC check block coupled to said replay queue, said ECC generation block for calculating in case a memory command being a write memory access request an ECC of the memory command, wherein in response to receiving a response from said memory channel (130/140), said ECC check block determines that there was an error in said response by comparing said calculated ECC with an ECC received from said memory channel (130/140), wherein: when a response indicates a completion of a corresponding memory command without any error, said replay queue removes said corresponding memory command without taking further action; and when a response indicates a completion of said corresponding memory command with an error, said replay queue replays at least said corresponding memory command, wherein said replay queue replays either the corresponding memory command on which the error may have occurred or a range of commands on which the error may have occurred. when a response indicates a completion of a corresponding memory command without any error, said replay queue removes said corresponding memory command without taking further action; and when a response indicates a completion of said corresponding memory command with an error, said replay queue replays at least said corresponding memory command, wherein said replay queue replays either the corresponding memory command on which the error may have occurred or a range of commands on which the error may have occurred.