A buck converter for producing a DC output voltage from a DC input voltage, comprising: n switching stages (220, 240), wherein n is an integer greater or equal to two; an output terminal (Vo); a bootstrap capacitor (221, 321); and a high side driver turn on control circuitry (215, 315), each of the n switching stages (220, 240) further comprising: a high side MOS switch (211, 231) coupled between an input terminal for a positive input voltage (Vin) and a switching node (SW1, SW2); an inductor (223, 243) coupled between the switching node (SW1, SW2) and the output terminal (Vo); and a high side driver (213, 313; 233, 333), comprising: a gate-connection terminal; and a pair of back to back NMOS transistors coupled between a top plate of the bootstrap capacitor (221, 321) and a gate terminal of the high side MOS switch (211, 231), wherein a gate terminal of each of the back to back NMOS transistors is connected to the gate-connection terminal, wherein the high side driver turn on control circuitry (215, 315) is connected to the gate-connection terminal of the high side driver (213, 313; 233, 333) of each of the n switching stages (220, 240) and is configured to select the high side driver (213, 313; 233, 333) of one of the n switching stages (220, 240); and wherein the selected high side driver (213, 313; 233, 333) is configured, upon selection, to couple the bootstrap capacitor (221, 321) to a gate terminal of the respective high side MOS switch (211, 231), wherein the bootstrap capacitor (221, 321) is configured to charge a gate capacitance of the respective high side MOS switch (211, 231). n switching stages (220, 240), wherein n is an integer greater or equal to two; an output terminal (Vo); a bootstrap capacitor (221, 321); and a high side driver turn on control circuitry (215, 315), each of the n switching stages (220, 240) further comprising: a high side MOS switch (211, 231) coupled between an input terminal for a positive input voltage (Vin) and a switching node (SW1, SW2); an inductor (223, 243) coupled between the switching node (SW1, SW2) and the output terminal (Vo); and a high side driver (213, 313; 233, 333), comprising: a gate-connection terminal; and a pair of back to back NMOS transistors coupled between a top plate of the bootstrap capacitor (221, 321) and a gate terminal of the high side MOS switch (211, 231), wherein a gate terminal of each of the back to back NMOS transistors is connected to the gate-connection terminal, a high side MOS switch (211, 231) coupled between an input terminal for a positive input voltage (Vin) and a switching node (SW1, SW2); an inductor (223, 243) coupled between the switching node (SW1, SW2) and the output terminal (Vo); and a high side driver (213, 313; 233, 333), comprising: a gate-connection terminal; and a pair of back to back NMOS transistors coupled between a top plate of the bootstrap capacitor (221, 321) and a gate terminal of the high side MOS switch (211, 231), wherein a gate terminal of each of the back to back NMOS transistors is connected to the gate-connection terminal, a gate-connection terminal; and a pair of back to back NMOS transistors coupled between a top plate of the bootstrap capacitor (221, 321) and a gate terminal of the high side MOS switch (211, 231), wherein a gate terminal of each of the back to back NMOS transistors is connected to the gate-connection terminal, wherein the high side driver turn on control circuitry (215, 315) is connected to the gate-connection terminal of the high side driver (213, 313; 233, 333) of each of the n switching stages (220, 240) and is configured to select the high side driver (213, 313; 233, 333) of one of the n switching stages (220, 240); and wherein the selected high side driver (213, 313; 233, 333) is configured, upon selection, to couple the bootstrap capacitor (221, 321) to a gate terminal of the respective high side MOS switch (211, 231), wherein the bootstrap capacitor (221, 321) is configured to charge a gate capacitance of the respective high side MOS switch (211, 231).