A method for manufacturing micromechanical structures in a device wafer (51, 71, 101, 111), wherein the manufactured structures include at least one level micromechanical structure (57, 87) which is level with regard to a horizontal face of the device wafer (51, 71, 101, 111), and at least one recessed micromechanical structure (56, 761, 762, 86, 1061, 1062, 1161, 1162) which is recessed with regard to the horizontal face of the device wafer (51, 71, 101, 111), and the method comprises the steps of: a) patterning two or more etching masks on the horizontal face of the device wafer (51, 71, 101, 111), wherein a level etching mask (52, 72, 82, 102, 112) defines at least the horizontal dimensions of the level micromechanical structures (57, 87), and one or more recess etching masks (54, 74A, 74B, 84A, 84B, 104A, 104B, 114A, 114B) which define at least the horizontal dimensions of the recessed micromechanical structures (56, 761, 762, 86, 1061, 1062, 1161, 1162), b) etching first vertical trenches (55, 75, 105) in the regions of the device wafer (51, 71, 101, 111) which are not protected by either the level (52, 72, 82, 102, 112) or recess (54, 74A, 74B, 84A, 84B, 104A, 104B, 114A, 114B) etching masks, c) removing one recess etching mask (54, 74B, 84B, 104B, 114B) from the horizontal face of the device wafer (51, 71, 101, 111), d) covering the horizontal face of the device wafer (51, 71, 101, 111) and the vertical sidewalls of the first vertical trenches (55, 75, 105) with a self-supporting etching mask (58, 78, 108) which is made of a self-supporting material, e) removing the self-supporting etching mask (58, 78, 108) from horizontal surfaces of the device wafer (51, 71, 101, 111), so that the unprotected horizontal regions from which the self-supporting etching mask (58, 78, 108) and one recess etching mask (54, 74B, 84B, 104B, 114B) were removed define the horizontal dimensions of recessed micromechanical structures (56, 761, 762, 86, 1061, 1062, 1161, 1162), f) etching second vertical trenches (59, 791, 1091) in the unprotected horizontal regions, whereby the depth of the second vertical trenches forms at least a part of the recess depth of a recessed micromechanical structure (56, 761, 762, 86, 1061, 1062, 1161, 1162), and g) removing the level etching mask (52, 72, 82, 102, 112) and the self-supporting etching mask (58, 78, 108) from the device wafer (51, 71, 101, 111) characterized in that the first vertical trenches (55, 75, 105) are etched in a deep-reactive ion etch process which proceeds through the entire device wafer (51, 71, 101, 111). a) patterning two or more etching masks on the horizontal face of the device wafer (51, 71, 101, 111), wherein a level etching mask (52, 72, 82, 102, 112) defines at least the horizontal dimensions of the level micromechanical structures (57, 87), and one or more recess etching masks (54, 74A, 74B, 84A, 84B, 104A, 104B, 114A, 114B) which define at least the horizontal dimensions of the recessed micromechanical structures (56, 761, 762, 86, 1061, 1062, 1161, 1162), b) etching first vertical trenches (55, 75, 105) in the regions of the device wafer (51, 71, 101, 111) which are not protected by either the level (52, 72, 82, 102, 112) or recess (54, 74A, 74B, 84A, 84B, 104A, 104B, 114A, 114B) etching masks, c) removing one recess etching mask (54, 74B, 84B, 104B, 114B) from the horizontal face of the device wafer (51, 71, 101, 111), d) covering the horizontal face of the device wafer (51, 71, 101, 111) and the vertical sidewalls of the first vertical trenches (55, 75, 105) with a self-supporting etching mask (58, 78, 108) which is made of a self-supporting material, e) removing the self-supporting etching mask (58, 78, 108) from horizontal surfaces of the device wafer (51, 71, 101, 111), so that the unprotected horizontal regions from which the self-supporting etching mask (58, 78, 108) and one recess etching mask (54, 74B, 84B, 104B, 114B) were removed define the horizontal dimensions of recessed micromechanical structures (56, 761, 762, 86, 1061, 1062, 1161, 1162), f) etching second vertical trenches (59, 791, 1091) in the unprotected horizontal regions, whereby the depth of the second vertical trenches forms at least a part of the recess depth of a recessed micromechanical structure (56, 761, 762, 86, 1061, 1062, 1161, 1162), and g) removing the level etching mask (52, 72, 82, 102, 112) and the self-supporting etching mask (58, 78, 108) from the device wafer (51, 71, 101, 111) characterized in that the first vertical trenches (55, 75, 105) are etched in a deep-reactive ion etch process which proceeds through the entire device wafer (51, 71, 101, 111).