A digital processing monitoring device for monitoring a neutron flux in a nuclear reactor, the device comprising: a plurality of modules (101, 102), each of which includes: a base board mounted with a main control FPGA and a man-machine control FPGA and connected to a connector, and a man-machine I/F processing sub board mounted with an I/F processing FPGA, the sub board being connected to the base board through a sub board connection I/F; and a motherboard connected to the plurality of the modules (101, 102) through the connector, wherein: the plurality of modules (101, 102) include an average power range monitor module, a local power range monitor module, and an I/O module, characterized in that, each of the sub boards of the plurality of the modules (101, 102) is mounted with a storage device (27, 28) that stores man-machine I/F information of the sub board; each of the main control FPGAs 22 and the I/F processing FPGAs of the plurality of the modules (101, 102) is configured to write transmission data to a predetermined region of a transmission area and has a common transmission protocol to share transmission data between modules (101, 102), in order for transmission to be performed between the base boards and the sub boards, the main control FPGAs 22 and the I/F processing FPGAs each is configured to allocate a transmission area to which data is written, contents of the transmission area of each of the modules (101, 102) is divided into a plurality of areas including: a base board main control writing data area, a base board man-machine control writing data area, a man-machine I/F processing data area, and a data area for writing information of the other modules, and the contents of the allocated transmission areas are shared, such that the main control FPGAs 22 and the I/F processing FPGAs make reference to required data to perform a man-machine I/F process. a plurality of modules (101, 102), each of which includes: a base board mounted with a main control FPGA and a man-machine control FPGA and connected to a connector, and a man-machine I/F processing sub board mounted with an I/F processing FPGA, the sub board being connected to the base board through a sub board connection I/F; and a base board mounted with a main control FPGA and a man-machine control FPGA and connected to a connector, and a man-machine I/F processing sub board mounted with an I/F processing FPGA, the sub board being connected to the base board through a sub board connection I/F; and a motherboard connected to the plurality of the modules (101, 102) through the connector, wherein: the plurality of modules (101, 102) include an average power range monitor module, a local power range monitor module, and an I/O module, characterized in that, each of the sub boards of the plurality of the modules (101, 102) is mounted with a storage device (27, 28) that stores man-machine I/F information of the sub board; each of the main control FPGAs 22 and the I/F processing FPGAs of the plurality of the modules (101, 102) is configured to write transmission data to a predetermined region of a transmission area and has a common transmission protocol to share transmission data between modules (101, 102), in order for transmission to be performed between the base boards and the sub boards, the main control FPGAs 22 and the I/F processing FPGAs each is configured to allocate a transmission area to which data is written, contents of the transmission area of each of the modules (101, 102) is divided into a plurality of areas including: a base board main control writing data area, a base board man-machine control writing data area, a man-machine I/F processing data area, and a data area for writing information of the other modules, and the contents of the allocated transmission areas are shared, such that the main control FPGAs 22 and the I/F processing FPGAs make reference to required data to perform a man-machine I/F process. the plurality of modules (101, 102) include an average power range monitor module, a local power range monitor module, and an I/O module, characterized in that, each of the sub boards of the plurality of the modules (101, 102) is mounted with a storage device (27, 28) that stores man-machine I/F information of the sub board; each of the main control FPGAs 22 and the I/F processing FPGAs of the plurality of the modules (101, 102) is configured to write transmission data to a predetermined region of a transmission area and has a common transmission protocol to share transmission data between modules (101, 102), in order for transmission to be performed between the base boards and the sub boards, the main control FPGAs 22 and the I/F processing FPGAs each is configured to allocate a transmission area to which data is written, contents of the transmission area of each of the modules (101, 102) is divided into a plurality of areas including: a base board main control writing data area, a base board man-machine control writing data area, a man-machine I/F processing data area, and a data area for writing information of the other modules, and the contents of the allocated transmission areas are shared, such that the main control FPGAs 22 and the I/F processing FPGAs make reference to required data to perform a man-machine I/F process.