A processor comprising: at least one processing core; an internal storage; a memory controller, operatively coupled to the at least one processing core, to access data in an off-chip memory; and a memory encryption engine MEE operatively coupled to the memory controller, wherein the MEE is a hardware-implemented processing logic that protects cache data lines that get evicted out of the processor and moved to off-chip memory if they belong to a secure enclave, the MEE is to: responsive to detecting a memory access operation with respect to a memory location identified by a memory address within a memory address range associated with the off-chip memory, - identify a security level indicator associated with the memory location based on a value stored on a security range register, and, - access evicted cache data lines associated with the memory address range of the off-chip memory in view of a security level indicator, wherein the security level indicator identifies an encryption-only memory range and a full-protection memory range of the off-chip memory, wherein the full-protection memory range provides encryption, integrity and replay protection of evicted cache data lines using encryption metadata generated by the MEE, wherein the encryption metadata is arranged in a replay protection tree structure including a hierarchy of levels of tree nodes and comprises a sequence of top-level counters stored in the internal storage of the processor, a plurality of lower-level counters stored off the processor, each encoded with an embedded message authentication code, and a message authentication code and version for each evicted cache data line. at least one processing core; an internal storage; a memory controller, operatively coupled to the at least one processing core, to access data in an off-chip memory; and a memory encryption engine MEE operatively coupled to the memory controller, wherein the MEE is a hardware-implemented processing logic that protects cache data lines that get evicted out of the processor and moved to off-chip memory if they belong to a secure enclave, the MEE is to: responsive to detecting a memory access operation with respect to a memory location identified by a memory address within a memory address range associated with the off-chip memory, - identify a security level indicator associated with the memory location based on a value stored on a security range register, and, - access evicted cache data lines associated with the memory address range of the off-chip memory in view of a security level indicator, wherein the security level indicator identifies an encryption-only memory range and a full-protection memory range of the off-chip memory, wherein the full-protection memory range provides encryption, integrity and replay protection of evicted cache data lines using encryption metadata generated by the MEE, wherein the encryption metadata is arranged in a replay protection tree structure including a hierarchy of levels of tree nodes and comprises a sequence of top-level counters stored in the internal storage of the processor, a plurality of lower-level counters stored off the processor, each encoded with an embedded message authentication code, and a message authentication code and version for each evicted cache data line. responsive to detecting a memory access operation with respect to a memory location identified by a memory address within a memory address range associated with the off-chip memory, - identify a security level indicator associated with the memory location based on a value stored on a security range register, and, - access evicted cache data lines associated with the memory address range of the off-chip memory in view of a security level indicator, - identify a security level indicator associated with the memory location based on a value stored on a security range register, and, - access evicted cache data lines associated with the memory address range of the off-chip memory in view of a security level indicator, wherein the security level indicator identifies an encryption-only memory range and a full-protection memory range of the off-chip memory, wherein the full-protection memory range provides encryption, integrity and replay protection of evicted cache data lines using encryption metadata generated by the MEE, wherein the encryption metadata is arranged in a replay protection tree structure including a hierarchy of levels of tree nodes and comprises a sequence of top-level counters stored in the internal storage of the processor, a plurality of lower-level counters stored off the processor, each encoded with an embedded message authentication code, and a message authentication code and version for each evicted cache data line.