A method of fabricating a memory device (10, 100a, 100b, 100c, 100d, 100e, 100f, 100g, 100h, 100i, 100j, 100k, 1001, 100m, 100n, 200a, 200b, 300a, 400a), comprising: providing a substrate; forming a memory cell material stack (30, 30a, 30b, 30c) over the substrate, the memory cell material stack (30, 30a, 30b, 30c) including a first active material (38, 38a, 38b) and a second active material (34, 34a, 34b) over the first active material (38, 38a, 38b), wherein one of the first and second active materials (34, 34a, 34b, 38, 38a, 38b) comprises a storage material and the other of the first and second active materials (34, 34a, 34b, 38, 38a, 38b) comprises a selector material; patterning the memory cell material stack (30, 30a, 30b, 30c), wherein patterning includes: etching through the one of the first and second active materials (34, 34a, 34b) of the memory cell material stack (30, 30a, 30b, 30c) in a dry etch chamber; forming protective liners (46a, 46b) on sidewalls of the at least one of the first and second active materials (34, 34a, 34b, 38, 38a, 38b) after etching through the one of the first and second active materials (34, 34a, 34b), wherein forming the protective liners (46a, 46b) comprises depositing in the dry etch chamber using plasma, wherein the protective liners (46a, 46b) comprise a conformal liner material deposited on exposed surfaces including the sidewalls, and wherein the conformal liner material has thicknesses on various portions of deposited surfaces that are substantially the same, and further etching through the other of the first and second active materials (38, 38a, 38b) of the memory cell material stack (30, 30a, 30b, 30c) after forming the protective liners (46a, 46b), wherein patterning the memory cell material stack (30, 30a, 30b, 30c) comprises forming a lower line stack (44a, 44b, 44c, 44d, 44e, 44f, 44g) extending in a first direction, the lower line stack (44a, 44b, 44c, 44d, 44e, 44f, 44g) comprising a first active material line (38, 38a, 38b) over the substrate and a second active material line (34, 34a, 34b) over the first active material line (38, 38a, 38b). providing a substrate; forming a memory cell material stack (30, 30a, 30b, 30c) over the substrate, the memory cell material stack (30, 30a, 30b, 30c) including a first active material (38, 38a, 38b) and a second active material (34, 34a, 34b) over the first active material (38, 38a, 38b), wherein one of the first and second active materials (34, 34a, 34b, 38, 38a, 38b) comprises a storage material and the other of the first and second active materials (34, 34a, 34b, 38, 38a, 38b) comprises a selector material; patterning the memory cell material stack (30, 30a, 30b, 30c), wherein patterning includes: etching through the one of the first and second active materials (34, 34a, 34b) of the memory cell material stack (30, 30a, 30b, 30c) in a dry etch chamber; forming protective liners (46a, 46b) on sidewalls of the at least one of the first and second active materials (34, 34a, 34b, 38, 38a, 38b) after etching through the one of the first and second active materials (34, 34a, 34b), wherein forming the protective liners (46a, 46b) comprises depositing in the dry etch chamber using plasma, wherein the protective liners (46a, 46b) comprise a conformal liner material deposited on exposed surfaces including the sidewalls, and wherein the conformal liner material has thicknesses on various portions of deposited surfaces that are substantially the same, and further etching through the other of the first and second active materials (38, 38a, 38b) of the memory cell material stack (30, 30a, 30b, 30c) after forming the protective liners (46a, 46b), wherein patterning the memory cell material stack (30, 30a, 30b, 30c) comprises forming a lower line stack (44a, 44b, 44c, 44d, 44e, 44f, 44g) extending in a first direction, the lower line stack (44a, 44b, 44c, 44d, 44e, 44f, 44g) comprising a first active material line (38, 38a, 38b) over the substrate and a second active material line (34, 34a, 34b) over the first active material line (38, 38a, 38b). etching through the one of the first and second active materials (34, 34a, 34b) of the memory cell material stack (30, 30a, 30b, 30c) in a dry etch chamber; forming protective liners (46a, 46b) on sidewalls of the at least one of the first and second active materials (34, 34a, 34b, 38, 38a, 38b) after etching through the one of the first and second active materials (34, 34a, 34b), wherein forming the protective liners (46a, 46b) comprises depositing in the dry etch chamber using plasma, wherein the protective liners (46a, 46b) comprise a conformal liner material deposited on exposed surfaces including the sidewalls, and wherein the conformal liner material has thicknesses on various portions of deposited surfaces that are substantially the same, and further etching through the other of the first and second active materials (38, 38a, 38b) of the memory cell material stack (30, 30a, 30b, 30c) after forming the protective liners (46a, 46b), wherein patterning the memory cell material stack (30, 30a, 30b, 30c) comprises forming a lower line stack (44a, 44b, 44c, 44d, 44e, 44f, 44g) extending in a first direction, the lower line stack (44a, 44b, 44c, 44d, 44e, 44f, 44g) comprising a first active material line (38, 38a, 38b) over the substrate and a second active material line (34, 34a, 34b) over the first active material line (38, 38a, 38b).