An imaging device comprising: a plurality of pixels including a first pixel and a second pixel; a differential amplifier including a first amplification transistor, a second amplification transistor, a first load transistor and a second load transistor, wherein the first load transistor and the second load transistor constitutes a current mirror circuit and the first load transistor and the second load transistor being connected to a power source voltage (Vdd); a first signal line coupled to the first amplification transistor and the first load transistor; a second signal line coupled to the second amplification transistor and the second load transistor; and a first reset transistor connected to the power source voltage (Vdd), a gate of the first reset transistor is connected to the first signal line, the drain and the gate of the first load transistor, and the gate of the second load transistor, wherein the first pixel includes a first photoelectric conversion element, a second reset transistor and the first amplification transistor, and the second pixel includes a second photoelectric conversion element, a third reset transistor and the second amplification transistor, the drain of the second reset transistor being connected to a reset voltage source(Vrst), the drain of the third reset transistor being connected to the second signal line, further comprising: a switch circuit coupled between the first reset transistor and the first signal line, wherein the switch circuit connects one of a source and a drain of the first reset transistor to the first signal line during a reset operation of the first and second pixels such that the first signal line carries a larger current than the second signal line, the imaging device being configured to turn on the second reset transistor and the third reset transistor during the reset operation. a plurality of pixels including a first pixel and a second pixel; a differential amplifier including a first amplification transistor, a second amplification transistor, a first load transistor and a second load transistor, wherein the first load transistor and the second load transistor constitutes a current mirror circuit and the first load transistor and the second load transistor being connected to a power source voltage (Vdd); a first signal line coupled to the first amplification transistor and the first load transistor; a second signal line coupled to the second amplification transistor and the second load transistor; and a first reset transistor connected to the power source voltage (Vdd), a gate of the first reset transistor is connected to the first signal line, the drain and the gate of the first load transistor, and the gate of the second load transistor, wherein the first pixel includes a first photoelectric conversion element, a second reset transistor and the first amplification transistor, and the second pixel includes a second photoelectric conversion element, a third reset transistor and the second amplification transistor, the drain of the second reset transistor being connected to a reset voltage source(Vrst), the drain of the third reset transistor being connected to the second signal line, further comprising: a switch circuit coupled between the first reset transistor and the first signal line, wherein the switch circuit connects one of a source and a drain of the first reset transistor to the first signal line during a reset operation of the first and second pixels such that the first signal line carries a larger current than the second signal line, the imaging device being configured to turn on the second reset transistor and the third reset transistor during the reset operation.