A hardware-based processing node (605, 610, 705, 710, 820, 825, 1005, 1010, 2200) suitable for being part of an object memory fabric (405, 600, 700), the processing node comprising: a memory module (625, 630) for storing and managing one or more memory objects (1705, 2005), the one or more memory objects each including at least a first memory and a second memory, wherein: each memory object is arranged to be created natively within the memory module, and each memory object is arranged to be accessed using a single memory reference instruction without Input/Output, I/O, instructions; and a router (615, 620, 715, 1220, 2205) configured to interface between a processor on the memory module and the one or more memory objects; wherein a set of data is arranged to be stored within the first memory of the memory module; wherein the router includes a memory module object directory that is arranged to index all memory objects or portions of memory objects within the memory module; wherein the memory module object directory includes one object index tree, OIT, for each memory object having at least one block stored in either the first memory or second memory of the memory module and a per object index tree, POIT, wherein each memory object represented in the OIT has a corresponding POIT and wherein each leaf of the POIT comprises a pointer to metadata and blocks of the memory object stored in the first memory or second memory of the memory module; wherein the memory module is arranged to determine dynamically, based on the OIT and POIT, that at least a portion of the set of data will be transferred from the first memory to the second memory; and wherein, in response to the determination that at least a portion of the set of data will be transferred from the first memory to the second memory, the router is configured to identify, based on the OIT and POIT, the portion to be transferred and to facilitate execution of the transfer. a memory module (625, 630) for storing and managing one or more memory objects (1705, 2005), the one or more memory objects each including at least a first memory and a second memory, wherein: each memory object is arranged to be created natively within the memory module, and each memory object is arranged to be accessed using a single memory reference instruction without Input/Output, I/O, instructions; and each memory object is arranged to be created natively within the memory module, and each memory object is arranged to be accessed using a single memory reference instruction without Input/Output, I/O, instructions; and a router (615, 620, 715, 1220, 2205) configured to interface between a processor on the memory module and the one or more memory objects; wherein a set of data is arranged to be stored within the first memory of the memory module; wherein the router includes a memory module object directory that is arranged to index all memory objects or portions of memory objects within the memory module; wherein the memory module object directory includes one object index tree, OIT, for each memory object having at least one block stored in either the first memory or second memory of the memory module and a per object index tree, POIT, wherein each memory object represented in the OIT has a corresponding POIT and wherein each leaf of the POIT comprises a pointer to metadata and blocks of the memory object stored in the first memory or second memory of the memory module; wherein the memory module is arranged to determine dynamically, based on the OIT and POIT, that at least a portion of the set of data will be transferred from the first memory to the second memory; and wherein, in response to the determination that at least a portion of the set of data will be transferred from the first memory to the second memory, the router is configured to identify, based on the OIT and POIT, the portion to be transferred and to facilitate execution of the transfer.