An image sensor comprising a first layer (1, 12) and second layer (2, 18) arranged vertically with respect to each other, wherein: the first layer is a CMOS photodetection circuit layer comprising: an array of pixel elements each pixel element comprising: a pinned photodiode; and an amplifier, the amplifier comprising N-FET transistors; and first Analog to Digital Converter circuit portions, or first Column Buffer portions (123, 124); the second layer is a CMOS layer comprising: supporting pixel circuitry, including a global shutter sample and hold circuit, the supporting pixel circuitry comprising N-FET transistors and wherein each pixel element in the first CMOS layer is connected to supporting pixel circuitry in the second CMOS layer; and second Analog to Digital Converter circuit portions connected to corresponding first ADC circuit portions in the first CMOS layer, or second Column Buffer circuit portions connected to corresponding first Column Buffer circuit portions in the first CMOS layer; and a light-blocking layer formed between the first CMOS layer and the second CMOS layer to shield the supporting pixel circuitry from light. the first layer is a CMOS photodetection circuit layer comprising: an array of pixel elements each pixel element comprising: a pinned photodiode; and an amplifier, the amplifier comprising N-FET transistors; and first Analog to Digital Converter circuit portions, or first Column Buffer portions (123, 124); the second layer is a CMOS layer comprising: supporting pixel circuitry, including a global shutter sample and hold circuit, the supporting pixel circuitry comprising N-FET transistors and wherein each pixel element in the first CMOS layer is connected to supporting pixel circuitry in the second CMOS layer; and second Analog to Digital Converter circuit portions connected to corresponding first ADC circuit portions in the first CMOS layer, or second Column Buffer circuit portions connected to corresponding first Column Buffer circuit portions in the first CMOS layer; and a light-blocking layer formed between the first CMOS layer and the second CMOS layer to shield the supporting pixel circuitry from light. an array of pixel elements each pixel element comprising: a pinned photodiode; and an amplifier, the amplifier comprising N-FET transistors; and a pinned photodiode; and an amplifier, the amplifier comprising N-FET transistors; and first Analog to Digital Converter circuit portions, or first Column Buffer portions (123, 124); the second layer is a CMOS layer comprising: supporting pixel circuitry, including a global shutter sample and hold circuit, the supporting pixel circuitry comprising N-FET transistors and wherein each pixel element in the first CMOS layer is connected to supporting pixel circuitry in the second CMOS layer; and second Analog to Digital Converter circuit portions connected to corresponding first ADC circuit portions in the first CMOS layer, or second Column Buffer circuit portions connected to corresponding first Column Buffer circuit portions in the first CMOS layer; and a light-blocking layer formed between the first CMOS layer and the second CMOS layer to shield the supporting pixel circuitry from light. supporting pixel circuitry, including a global shutter sample and hold circuit, the supporting pixel circuitry comprising N-FET transistors and wherein each pixel element in the first CMOS layer is connected to supporting pixel circuitry in the second CMOS layer; and second Analog to Digital Converter circuit portions connected to corresponding first ADC circuit portions in the first CMOS layer, or second Column Buffer circuit portions connected to corresponding first Column Buffer circuit portions in the first CMOS layer; and a light-blocking layer formed between the first CMOS layer and the second CMOS layer to shield the supporting pixel circuitry from light.