An apparatus, comprising: a memory configured to store a predistortion coefficient table that includes a plurality of different sets of predistortion coefficients, wherein a duration of a radio frame is divided into a plurality of consecutive time slice segments with time slice boundaries that are aligned with transitions between downlink, uplink, and other types of subframes, wherein a power range of interest is divided into a plurality of dynamic range segments, wherein each cell within the predistortion coefficient table corresponds to a unique combination of a time slice segment of the plurality of consecutive time slice segments and a dynamic range segment of the plurality of dynamic range segments, wherein each of the plurality of different sets of predistortion coefficients in the predistortion coefficient table is stored in a different cell in the predistortion coefficient table; a digital predistortion circuit (116, 200) configured to receive an input signal (130, 230) that includes a sequence of input sample blocks, and to perform a digital predistortion process on the input signal (130, 230) to produce a predistorted output signal (132, 232), wherein the digital predistortion process includes selecting a first set of predistortion coefficients for a first input sample block from the plurality of different sets of predistortion coefficients stored in the memory, wherein the first set of predistortion coefficients is associated with: (i) a time slice, within which the first input sample block is positioned, and (ii) a power range calculated for the first input sample block based on block power statistics of the first input sample block, and applying the first set of predistortion coefficients to the first input sample block to produce the predistorted output signal (132, 232). a memory configured to store a predistortion coefficient table that includes a plurality of different sets of predistortion coefficients, wherein a duration of a radio frame is divided into a plurality of consecutive time slice segments with time slice boundaries that are aligned with transitions between downlink, uplink, and other types of subframes, wherein a power range of interest is divided into a plurality of dynamic range segments, wherein each cell within the predistortion coefficient table corresponds to a unique combination of a time slice segment of the plurality of consecutive time slice segments and a dynamic range segment of the plurality of dynamic range segments, wherein each of the plurality of different sets of predistortion coefficients in the predistortion coefficient table is stored in a different cell in the predistortion coefficient table; a digital predistortion circuit (116, 200) configured to receive an input signal (130, 230) that includes a sequence of input sample blocks, and to perform a digital predistortion process on the input signal (130, 230) to produce a predistorted output signal (132, 232), wherein the digital predistortion process includes selecting a first set of predistortion coefficients for a first input sample block from the plurality of different sets of predistortion coefficients stored in the memory, wherein the first set of predistortion coefficients is associated with: (i) a time slice, within which the first input sample block is positioned, and (ii) a power range calculated for the first input sample block based on block power statistics of the first input sample block, and applying the first set of predistortion coefficients to the first input sample block to produce the predistorted output signal (132, 232).