A method for processing a user-level interrupt, the method comprising: writing to a user-level interrupt control register in a first local interrupt controller corresponding to a first processor core of a plurality of processor cores (302, 304) in a multi-core system by a first application thread executing on the first processor core to thereby generate the user-level interrupt; generating a user-level interrupt message by the first local interrupt controller, the user-level interrupt message including an interrupt domain identifier contained in an interrupt domain identifier register in the first local interrupt controller and the user-level interrupt message including a destination field and a delivery mode field based on the values of the corresponding fields of the user-level interrupt control register in the first local interrupt controller; accepting by a second local interrupt controller corresponding to a second processor core of the plurality of processor cores, the user-level interrupt indicated by the user-level interrupt message when an interrupt domain of an application thread executing on the second processor core and a recipient identifier of the application thread executing on the second processor core match corresponding fields in the user-level interrupt message, the interrupt domain being a set of application threads allowed to exchange user-level interrupts; and executing a user-level interrupt routine on the second processor core when the user-level interrupt has higher priority than other interrupts accepted by the second processor core and a higher priority than the application thread executing on the second processor core, wherein writing to the user-level interrupt control register comprises the first application thread configuring the destination field of the user-level interrupt control register to identify a recipient of the user-level interrupt and configuring the delivery mode field of the user-level interrupt control register to include a code indicative of the user-level interrupt. writing to a user-level interrupt control register in a first local interrupt controller corresponding to a first processor core of a plurality of processor cores (302, 304) in a multi-core system by a first application thread executing on the first processor core to thereby generate the user-level interrupt; generating a user-level interrupt message by the first local interrupt controller, the user-level interrupt message including an interrupt domain identifier contained in an interrupt domain identifier register in the first local interrupt controller and the user-level interrupt message including a destination field and a delivery mode field based on the values of the corresponding fields of the user-level interrupt control register in the first local interrupt controller; accepting by a second local interrupt controller corresponding to a second processor core of the plurality of processor cores, the user-level interrupt indicated by the user-level interrupt message when an interrupt domain of an application thread executing on the second processor core and a recipient identifier of the application thread executing on the second processor core match corresponding fields in the user-level interrupt message, the interrupt domain being a set of application threads allowed to exchange user-level interrupts; and executing a user-level interrupt routine on the second processor core when the user-level interrupt has higher priority than other interrupts accepted by the second processor core and a higher priority than the application thread executing on the second processor core, wherein writing to the user-level interrupt control register comprises the first application thread configuring the destination field of the user-level interrupt control register to identify a recipient of the user-level interrupt and configuring the delivery mode field of the user-level interrupt control register to include a code indicative of the user-level interrupt.