A driver circuit for receiving input data and generating an output signal to a termination element (R T), wherein, when the driver circuit operates as a first mode, the input data has a first bit and second bit, one of the first bit and the second bit is a most significant bit, in the following also referred to as MSB, and the other one of the first bit and the second bit is a least significant bit, in the following also referred to as LSB, and the driver circuit comprises: a pair of differential output terminals (T1, T2), arranged for outputting the output signal, wherein the pair of differential output terminals (T1, T2) has a first output terminal and a second output terminal; a first current mode drive unit (110, 410_1), coupled to the pair of differential output terminals (T1, T2), for outputting a current from one of the first output terminal and the second output terminal, and receiving the current from the other of the first output terminal and the second output terminal according to the first bit; and a voltage mode drive unit (120, 420), coupled to the pair of differential output terminals (T1, T2), for providing voltages to the first output terminal and the second output terminal according to both the first bit and the second bit; wherein the voltage mode drive unit comprises: a first voltage source, for providing a first reference voltage; a second voltage source, for providing a second reference voltage; a switch module (SW1-SW8), coupled between the first voltage source and the pair of differential output terminals (T1, T2), and coupled between the second voltage source and the pair of differential output terminals (T1, T2); characterized in that the voltage mode drive unit further comprises: a first impedance circuit module (R1-R4), coupled between the switch module (SW1-SW8) and the first output terminal; and a second impedance circuit module (R5-R8), coupled between the switch module (SW1-SW8) and the second output terminal; wherein the first impedance circuit module (R1-R4) comprises: a first impedance element, coupled between the first voltage source and the first output terminal; a second impedance element, coupled between the first voltage source and the first output terminal; a third impedance element, coupled between the second voltage source and the first output terminal; and a fourth impedance element, coupled between the second voltage source and the first output terminal; and the second impedance circuit module (R5-R8) comprises: a fifth impedance element, coupled between the first voltage source and the second output terminal; a sixth impedance element, coupled between the first voltage source and the second output terminal; a seventh impedance element, coupled between the second voltage source and the second output terminal; and an eighth impedance element, coupled between the second voltage source and the second output terminal. a first voltage source, for providing a first reference voltage; a second voltage source, for providing a second reference voltage; a switch module (SW1-SW8), coupled between the first voltage source and the pair of differential output terminals (T1, T2), and coupled between the second voltage source and the pair of differential output terminals (T1, T2); a first impedance circuit module (R1-R4), coupled between the switch module (SW1-SW8) and the first output terminal; and a second impedance circuit module (R5-R8), coupled between the switch module (SW1-SW8) and the second output terminal; a first impedance element, coupled between the first voltage source and the first output terminal; a second impedance element, coupled between the first voltage source and the first output terminal; a third impedance element, coupled between the second voltage source and the first output terminal; and a fourth impedance element, coupled between the second voltage source and the first output terminal; and a fifth impedance element, coupled between the first voltage source and the second output terminal; a sixth impedance element, coupled between the first voltage source and the second output terminal; a seventh impedance element, coupled between the second voltage source and the second output terminal; and an eighth impedance element, coupled between the second voltage source and the second output terminal.