A drive system adjustably compatible with different size of the matrix scanning device, comprising: a plurality of first drive circuits (11, X0-Xm) disposed on a first periphery along a first direction of a substrate with each said first drive circuit being coupled to at least one column wire of the matrix scanning device; a plurality of second drive circuits (11, Y0-Yn) disposed on a second periphery along a second direction of the substrate with each said second drive circuit being coupled to at least one row wire of the matrix scanning device; a master controller configured to control the first drive circuits and the second drive circuits; and a bus electrically coupled to the master controller, the first drive circuits and the second drive circuits, and the first or the second drive circuit comprises a register controller electrically coupled to the bus; characterized in that at least one bus wire of the bus is configured as either an analog channel in an analog mode or a digital channel in a digital mode; that the master controller outputs an analog/digital switching signal (AXD0/AXD1) used to switch between the analog mode and the digital mode; and that each of the first and second drive circuit further comprises: a matrix multiplexer electrically coupled to at least one said row or column wire, which is controllably communicated to one bus wire of the bus under control of the register controller and the analog/digital switching signal; and an analog/digital multiplexer configured to regulate a signal transferred on the bus under control of the register controller and the analog/digital switching signal (AXD0/AXD1), a logic circuit configured to generate a control signal under control of the register controller and the analog/digital switching signal; wherein the analog/digital multiplexer comprises a switch which is closed by control signal after the associated first or second drive circuit has been set, such that a predefined signal passes through the analog/digital multiplexer; and the master controller comprises a feedback signal node configured to receive the predefined signal from the last one of the connected first or second drive circuits. a plurality of first drive circuits (11, X0-Xm) disposed on a first periphery along a first direction of a substrate with each said first drive circuit being coupled to at least one column wire of the matrix scanning device; a plurality of second drive circuits (11, Y0-Yn) disposed on a second periphery along a second direction of the substrate with each said second drive circuit being coupled to at least one row wire of the matrix scanning device; a master controller configured to control the first drive circuits and the second drive circuits; and a bus electrically coupled to the master controller, the first drive circuits and the second drive circuits, and the first or the second drive circuit comprises a register controller electrically coupled to the bus; characterized in that at least one bus wire of the bus is configured as either an analog channel in an analog mode or a digital channel in a digital mode; that the master controller outputs an analog/digital switching signal (AXD0/AXD1) used to switch between the analog mode and the digital mode; and that each of the first and second drive circuit further comprises: a matrix multiplexer electrically coupled to at least one said row or column wire, which is controllably communicated to one bus wire of the bus under control of the register controller and the analog/digital switching signal; and an analog/digital multiplexer configured to regulate a signal transferred on the bus under control of the register controller and the analog/digital switching signal (AXD0/AXD1), a logic circuit configured to generate a control signal under control of the register controller and the analog/digital switching signal; wherein the analog/digital multiplexer comprises a switch which is closed by control signal after the associated first or second drive circuit has been set, such that a predefined signal passes through the analog/digital multiplexer; and the master controller comprises a feedback signal node configured to receive the predefined signal from the last one of the connected first or second drive circuits.