A method for compensating for semiconductor device resistance, comprising the steps of: (a) realizing a resistance equal to a desired resistance by one of combinations of a plurality of semiconductor devices (21p-0 to 21 p-N; 21 n-0 to 21 n-N), wherein the semiconductor devices comprise a combination of a plurality of pairs of first (21n-0 to 21 n-N) and second (21 p-0 to 21 p-N) semiconductor devices of different channel types, said step (a) including the step of (b) sequentially selecting two or more of the semiconductor devices to be combined, and thereby sequentially changing a resistance realized by the selected two or more of the semiconductor devices to be combined; (c) realizing the resistance equal to the desired resistance by one of combinations of a plurality of third semiconductor devices for comparison (31 n-0 to 31 n-5) corresponding to and having the same channel type as the first semiconductor devices (21n-0 to 21 n-5); (d) determining one of combinations of a plurality of fourth semiconductor devices for comparison (32n-0 to 32n-5) having the same channel type as the first semiconductor devices (21 n-0 to 21 n-5) based on information on the one of the combinations of the third semiconductor devices (31n-0 to 31 n-5) for comparison; (e) realizing a resistance equal to a resistance realized by the determined one of the combinations of the fourth semiconductor devices for comparison (32n-0 to 32n-5) by one of combinations of a plurality of fifth semiconductor devices for comparison (32p-0 to 32p-5) corresponding to and having the same channel type as the second semiconductor devices (21 p-0 to 21p-5); (f) determining one of combinations of the first semiconductor devices (21n-0 to 21 n-5) based on information on the one of the combinations of the fourth semiconductor devices for comparison (32n-0 to 32n-5); and (g) determining one of combinations of the second semiconductor devices (21 p-0 to 21 p-5) based on information on the one of the combinations of the fifth semiconductor devices for comparison (32p-0 to 32p-5). (a) realizing a resistance equal to a desired resistance by one of combinations of a plurality of semiconductor devices (21p-0 to 21 p-N; 21 n-0 to 21 n-N), wherein the semiconductor devices comprise a combination of a plurality of pairs of first (21n-0 to 21 n-N) and second (21 p-0 to 21 p-N) semiconductor devices of different channel types, said step (a) including the step of (b) sequentially selecting two or more of the semiconductor devices to be combined, and thereby sequentially changing a resistance realized by the selected two or more of the semiconductor devices to be combined; (c) realizing the resistance equal to the desired resistance by one of combinations of a plurality of third semiconductor devices for comparison (31 n-0 to 31 n-5) corresponding to and having the same channel type as the first semiconductor devices (21n-0 to 21 n-5); (d) determining one of combinations of a plurality of fourth semiconductor devices for comparison (32n-0 to 32n-5) having the same channel type as the first semiconductor devices (21 n-0 to 21 n-5) based on information on the one of the combinations of the third semiconductor devices (31n-0 to 31 n-5) for comparison; (e) realizing a resistance equal to a resistance realized by the determined one of the combinations of the fourth semiconductor devices for comparison (32n-0 to 32n-5) by one of combinations of a plurality of fifth semiconductor devices for comparison (32p-0 to 32p-5) corresponding to and having the same channel type as the second semiconductor devices (21 p-0 to 21p-5); (f) determining one of combinations of the first semiconductor devices (21n-0 to 21 n-5) based on information on the one of the combinations of the fourth semiconductor devices for comparison (32n-0 to 32n-5); and (g) determining one of combinations of the second semiconductor devices (21 p-0 to 21 p-5) based on information on the one of the combinations of the fifth semiconductor devices for comparison (32p-0 to 32p-5).