Method for operating an electrical power rectifier, wherein the power rectifier comprises at least two branches (11, 12, 13) that are connected in parallel to each other, each of said branches comprising at least two power semiconductor elements (14', 14") connected in series, and a phase node formed by a connection point between said at least two power semiconductor elements (14', 14"), and wherein the collector-emitter voltage V CE (t) and/or the collector current I C (t) of at least one of the power semiconductor elements (14', 14") is detected, wherein, in response to a short circuit being detected in one of said branches (11, 12, 13), it is determined in the at least one of the power semiconductor elements (14', 14") through which a short circuit current flows, whether at least one of the following conditions is met: dV CE t / dt < dV CE / dt crit and/or dI C t / dt < dI C / dt crit and/or I C t _ ent + delta t < I Ccrit, where (dV CE /dt) crit is a critical value of the rate of increase of the collector-emitter voltage of the at least one of the power semiconductor elements (14', 14"), (dI C /dt) crit is a critical value of the rate of increase of the collector current of the at least one of the power semiconductor element (14', 14"), t_ent is the time of the start of the desaturation of the at least one of the power semiconductor elements (14', 14"), delta t represents a time delay, and I Ccrit is a critical value of the collector current of the at least one of the power semiconductor elements (14', 14"); wherein the critical values (dV CE /dt) crit, (dI C /dt) crit, and I Ccrit are prespecified in such a manner that the corresponding value is not reached when a load short circuit exists on a load connected to the phase nodes of the power rectifier, and that a distinction can be made between a branch short circuit and a load short circuit; and wherein, if at least one of the aforementioned conditions is met, the gate-emitter voltage of at least one of the power semiconductor elements (14', 14") is increased to continue its conduction. where (dV CE /dt) crit is a critical value of the rate of increase of the collector-emitter voltage of the at least one of the power semiconductor elements (14', 14"), (dI C /dt) crit is a critical value of the rate of increase of the collector current of the at least one of the power semiconductor element (14', 14"), t_ent is the time of the start of the desaturation of the at least one of the power semiconductor elements (14', 14"), delta t represents a time delay, and I Ccrit is a critical value of the collector current of the at least one of the power semiconductor elements (14', 14"); wherein the critical values (dV CE /dt) crit, (dI C /dt) crit, and I Ccrit are prespecified in such a manner that the corresponding value is not reached when a load short circuit exists on a load connected to the phase nodes of the power rectifier, and that a distinction can be made between a branch short circuit and a load short circuit; and wherein, if at least one of the aforementioned conditions is met, the gate-emitter voltage of at least one of the power semiconductor elements (14', 14") is increased to continue its conduction.