A desktop card processor (5A, 5B, 5C, 5D, 20) for performing processing operations on cards, comprising: a card input hopper (H1, 22) located adjacent a front end region of the card processor for staging cards to be processed by the card processor; a card output hopper (H2, 24) for receiving processed cards; a first card processing level including: i) at least first and second card processing mechanisms (M, 42a) each of which is configured to perform a processing operation on a card, and ii) a first card transport (T1, 44a) for conveying a card along the first card processing level including from the card input hopper to the first card processing mechanism and from the first card processing mechanism to the second card processing mechanism; a second card processing level including: i) at least one card processing mechanism (M, 42b) which is configured to perform a processing operation on a card, and ii) a second card transport (T2, 44b) for conveying a card along the second card processing level including to the card processing mechanism of the second card processing level and from the card processing mechanism of the second card processing level to the card output hopper; wherein the first card processing level and the second card processing level are generally vertically separated one above the other; and a transport mechanism (R, 46a, 46b) for receiving a card from the first card transport and transporting the card to the second card transport; characterized in that the card output hopper (H2, 24) is located adjacent the front end region of the card processor, wherein the card input hopper (H1, 22) and the card output hopper (H2, 24) are generally vertically separated one above the other. a card input hopper (H1, 22) located adjacent a front end region of the card processor for staging cards to be processed by the card processor; a card output hopper (H2, 24) for receiving processed cards; a first card processing level including: i) at least first and second card processing mechanisms (M, 42a) each of which is configured to perform a processing operation on a card, and ii) a first card transport (T1, 44a) for conveying a card along the first card processing level including from the card input hopper to the first card processing mechanism and from the first card processing mechanism to the second card processing mechanism; i) at least first and second card processing mechanisms (M, 42a) each of which is configured to perform a processing operation on a card, and ii) a first card transport (T1, 44a) for conveying a card along the first card processing level including from the card input hopper to the first card processing mechanism and from the first card processing mechanism to the second card processing mechanism; a second card processing level including: i) at least one card processing mechanism (M, 42b) which is configured to perform a processing operation on a card, and ii) a second card transport (T2, 44b) for conveying a card along the second card processing level including to the card processing mechanism of the second card processing level and from the card processing mechanism of the second card processing level to the card output hopper; i) at least one card processing mechanism (M, 42b) which is configured to perform a processing operation on a card, and ii) a second card transport (T2, 44b) for conveying a card along the second card processing level including to the card processing mechanism of the second card processing level and from the card processing mechanism of the second card processing level to the card output hopper; a transport mechanism (R, 46a, 46b) for receiving a card from the first card transport and transporting the card to the second card transport;