A data processing apparatus comprising: tag checking circuitry responsive to a target address to: identify a guard tag stored in a memory system in association with a block of one or more memory locations, the block containing a target memory location identified by the target address; perform a tag check based on the guard tag and an address tag associated with the target address; and in response to detecting a mismatch in the tag check, perform an error response action; characterized in that the apparatus further comprises: tag mapping storage circuitry to store mapping information indicative of a mapping between guard tag values and corresponding address tag values, the mapping information specifying a plurality of remapped tag value fields; wherein the mapping information is associated with a particular thread executable by processing circuitry; wherein the mapping information is indicative of a mapping for use in response to a target address generated by the processing circuitry when executing the particular thread; and wherein the tag checking circuitry is configured to remap at least one of the guard tag and the address tag based on the mapping information stored by the tag mapping storage circuitry to generate a remapped tag for use in the tag check by selecting one of the plurality of remapped tag value fields based on a value of said at least one of the guard tag and the address tag and determining the remapped tag based on a remapped tag value specified in the remapped tag value field. identify a guard tag stored in a memory system in association with a block of one or more memory locations, the block containing a target memory location identified by the target address; perform a tag check based on the guard tag and an address tag associated with the target address; and in response to detecting a mismatch in the tag check, perform an error response action; characterized in that the apparatus further comprises: tag mapping storage circuitry to store mapping information indicative of a mapping between guard tag values and corresponding address tag values, the mapping information specifying a plurality of remapped tag value fields; wherein the mapping information is associated with a particular thread executable by processing circuitry; wherein the mapping information is indicative of a mapping for use in response to a target address generated by the processing circuitry when executing the particular thread; and wherein the tag checking circuitry is configured to remap at least one of the guard tag and the address tag based on the mapping information stored by the tag mapping storage circuitry to generate a remapped tag for use in the tag check by selecting one of the plurality of remapped tag value fields based on a value of said at least one of the guard tag and the address tag and determining the remapped tag based on a remapped tag value specified in the remapped tag value field. tag mapping storage circuitry to store mapping information indicative of a mapping between guard tag values and corresponding address tag values, the mapping information specifying a plurality of remapped tag value fields; wherein the mapping information is associated with a particular thread executable by processing circuitry; wherein the mapping information is indicative of a mapping for use in response to a target address generated by the processing circuitry when executing the particular thread; and wherein the tag checking circuitry is configured to remap at least one of the guard tag and the address tag based on the mapping information stored by the tag mapping storage circuitry to generate a remapped tag for use in the tag check by selecting one of the plurality of remapped tag value fields based on a value of said at least one of the guard tag and the address tag and determining the remapped tag based on a remapped tag value specified in the remapped tag value field.