A semiconductor switch circuit, comprising: a first switch pair including two MOSFETs (811, 812) having gates connected to one another and sources connected to one another, and a zener diode connected with its anode to the source and its cathode to the gate of the MOSFETs; a second switch pair including two MOSFETs (821, 822) having gates connected to one another and sources connected to one another, and a zener diode connected with its anode to the source and its cathode to the gate of the MOSFETs; and a third switch pair comprising two MOSFETs (831, 832) having gates connected to one another and sources connected to one another; and a floating gate control circuit which drives the first switch pair, the second switch pair, and the third switch pair, wherein the first switch pair and the second switch pair are connected in series between two input/output terminals through a connecting node, and the third switch pair is connected between a ground and the connecting node between the first switch pair and the second switch pair, wherein the floating gate control circuit is supplied with the ground and a low voltage power supply lower than a maximum voltage applied to the input/output terminals, and configured to, when a switch control signal (SCTL) is at an H level, charge the gate-source capacitances of the first switch pair and the second switch pair from the low voltage power supply and discharge the gate-source capacitance of the third switch pair to the ground, and when the switch control signal (SCTL) is at an L level, discharge the gate-source capacitances of the first switch pair and the second switch pair to the ground and charge the gate-source capacitance of the third switch pair from the low voltage power supply. a first switch pair including two MOSFETs (811, 812) having gates connected to one another and sources connected to one another, and a zener diode connected with its anode to the source and its cathode to the gate of the MOSFETs; a second switch pair including two MOSFETs (821, 822) having gates connected to one another and sources connected to one another, and a zener diode connected with its anode to the source and its cathode to the gate of the MOSFETs; and a third switch pair comprising two MOSFETs (831, 832) having gates connected to one another and sources connected to one another; and a floating gate control circuit which drives the first switch pair, the second switch pair, and the third switch pair, wherein the first switch pair and the second switch pair are connected in series between two input/output terminals through a connecting node, and the third switch pair is connected between a ground and the connecting node between the first switch pair and the second switch pair, wherein the floating gate control circuit is supplied with the ground and a low voltage power supply lower than a maximum voltage applied to the input/output terminals, and configured to, when a switch control signal (SCTL) is at an H level, charge the gate-source capacitances of the first switch pair and the second switch pair from the low voltage power supply and discharge the gate-source capacitance of the third switch pair to the ground, and when the switch control signal (SCTL) is at an L level, discharge the gate-source capacitances of the first switch pair and the second switch pair to the ground and charge the gate-source capacitance of the third switch pair from the low voltage power supply.