A method for hysteretic control of a pulse width modulation, PWM, signal generator, said method comprising the steps of: monitoring an output of the PWM signal generator; determining by means of an edge detector when the output of the PWM signal generator changes from a low to a high level; starting a blanking timer when the output of the PWM signal generator changes from the low to the high level; selecting by means of a digital multiplexer a high limit value from a high limit register after the output of the PWM signal generator changes from the low to the high level; comparing by means of a comparator (106; 108; 356; 358) the high limit value with a process feedback signal value from a device controlled by the PWM signal generator, determining when the blanking timer has timed out; coupling by means of a blanking gate an output of the comparator (106; 108; 356; 358) to a pulse stretcher and filter logic when the blanking timer has timed out; determining when the process feedback signal value is greater than the high limit value; signaling the PWM signal generator by means of the pulse stretcher and filter logic to change its output to the low level when the process feedback signal value is greater than the high limit value; determining by means of the edge detector when the output of the PWM signal generator changes from the high to the low level; starting the blanking timer when the output of the PWM signal generator changes from the high to the low level; reversing a result of the comparing by means of a polarity reversing circuit (118, 120; 370); selecting by means of a digital multiplexer a low limit value from a low limit register after the output of the PWM signal generator changes from the high to the low level; comparing by means of the comparator the low limit value with the process feedback signal value; determining when the blanking timer has timed out; coupling by means of the blanking gate the output of the polarity reversing circuit (118, 120; 370) to the pulse stretcher and filter logic when the blanking timer has timed out; determining when the process feedback signal value is less than the low limit value; signaling the PWM signal generator to change its output to the high level when the process feedback signal value is less than the low limit value; and returning to the step of monitoring the output of the PWM signal generator. monitoring an output of the PWM signal generator; determining by means of an edge detector when the output of the PWM signal generator changes from a low to a high level; starting a blanking timer when the output of the PWM signal generator changes from the low to the high level; selecting by means of a digital multiplexer a high limit value from a high limit register after the output of the PWM signal generator changes from the low to the high level; comparing by means of a comparator (106; 108; 356; 358) the high limit value with a process feedback signal value from a device controlled by the PWM signal generator, determining when the blanking timer has timed out; coupling by means of a blanking gate an output of the comparator (106; 108; 356; 358) to a pulse stretcher and filter logic when the blanking timer has timed out; determining when the process feedback signal value is greater than the high limit value; signaling the PWM signal generator by means of the pulse stretcher and filter logic to change its output to the low level when the process feedback signal value is greater than the high limit value; determining by means of the edge detector when the output of the PWM signal generator changes from the high to the low level; starting the blanking timer when the output of the PWM signal generator changes from the high to the low level; reversing a result of the comparing by means of a polarity reversing circuit (118, 120; 370); selecting by means of a digital multiplexer a low limit value from a low limit register after the output of the PWM signal generator changes from the high to the low level; comparing by means of the comparator the low limit value with the process feedback signal value; determining when the blanking timer has timed out; coupling by means of the blanking gate the output of the polarity reversing circuit (118, 120; 370) to the pulse stretcher and filter logic when the blanking timer has timed out; determining when the process feedback signal value is less than the low limit value; signaling the PWM signal generator to change its output to the high level when the process feedback signal value is less than the low limit value; and returning to the step of monitoring the output of the PWM signal generator.