A semiconductor device, comprising: a substrate; a first group of semiconductor die (102a, 102c, 102e, 102g) mounted on the substrate and including a first semiconductor die and a second semiconductor die, each semiconductor die in the first group of semiconductor die (102a, 102c, 102e, 102g) having a first set of die bond pads, an x-axis and a y-axis being defined parallel to orthogonal edges of the semiconductor die in the first group of semiconductor die (102a, 102c, 102e, 102g); a second group of semiconductor die (102b, 102d, 102f, 102h) mounted on the substrate and including a third semiconductor die and a fourth semiconductor die, each semiconductor die in the second group of semiconductor die (102b, 102d, 102f, 102h) having a second set of die bond pads, and characterised in that: the semiconductor die from the first and second groups mounted on the substrate are interspersed with each other such that the first semiconductor die is mounted atop the third semiconductor die, the third semiconductor die is mounted atop the second semiconductor die and the second semiconductor die is mounted atop the fourth semiconductor die, with the first second third and fourth semiconductor die from the first and second groups offset with respect to each other along the x-axis, and with the semiconductor die from the first group staggered along the y-axis with respect to semiconductor die from the second group, wherein the first group of semiconductor die (102a, 102c, 102e, 102g) are aligned with each other along the y-axis and/or wherein the second group of semiconductor die (102b, 102d, 102f, 102h) are aligned with each other along the y-axis; a first set of wire bonds electrically coupling corresponding die bond pads of the first set of die bond pads of the first group of die; and a second set of wire bonds electrically coupling corresponding die bond pads of the second set of die bond pads of the second group of die, the wire bonds of the first and second sets of wire bonds interspersed with each other. a substrate; a first group of semiconductor die (102a, 102c, 102e, 102g) mounted on the substrate and including a first semiconductor die and a second semiconductor die, each semiconductor die in the first group of semiconductor die (102a, 102c, 102e, 102g) having a first set of die bond pads, an x-axis and a y-axis being defined parallel to orthogonal edges of the semiconductor die in the first group of semiconductor die (102a, 102c, 102e, 102g); a second group of semiconductor die (102b, 102d, 102f, 102h) mounted on the substrate and including a third semiconductor die and a fourth semiconductor die, each semiconductor die in the second group of semiconductor die (102b, 102d, 102f, 102h) having a second set of die bond pads, and characterised in that: the semiconductor die from the first and second groups mounted on the substrate are interspersed with each other such that the first semiconductor die is mounted atop the third semiconductor die, the third semiconductor die is mounted atop the second semiconductor die and the second semiconductor die is mounted atop the fourth semiconductor die, with the first second third and fourth semiconductor die from the first and second groups offset with respect to each other along the x-axis, and with the semiconductor die from the first group staggered along the y-axis with respect to semiconductor die from the second group, wherein the first group of semiconductor die (102a, 102c, 102e, 102g) are aligned with each other along the y-axis and/or wherein the second group of semiconductor die (102b, 102d, 102f, 102h) are aligned with each other along the y-axis; a first set of wire bonds electrically coupling corresponding die bond pads of the first set of die bond pads of the first group of die; and a second set of wire bonds electrically coupling corresponding die bond pads of the second set of die bond pads of the second group of die, the wire bonds of the first and second sets of wire bonds interspersed with each other. the semiconductor die from the first and second groups mounted on the substrate are interspersed with each other such that the first semiconductor die is mounted atop the third semiconductor die, the third semiconductor die is mounted atop the second semiconductor die and the second semiconductor die is mounted atop the fourth semiconductor die, with the first second third and fourth semiconductor die from the first and second groups offset with respect to each other along the x-axis, and with the semiconductor die from the first group staggered along the y-axis with respect to semiconductor die from the second group, wherein the first group of semiconductor die (102a, 102c, 102e, 102g) are aligned with each other along the y-axis and/or wherein the second group of semiconductor die (102b, 102d, 102f, 102h) are aligned with each other along the y-axis; a first set of wire bonds electrically coupling corresponding die bond pads of the first set of die bond pads of the first group of die; and a second set of wire bonds electrically coupling corresponding die bond pads of the second set of die bond pads of the second group of die, the wire bonds of the first and second sets of wire bonds interspersed with each other.