A high side solenoid switch overcurrent protection circuit comprising: a high side switch transistor operable to connect, when in use, a voltage source to a solenoid switch; a sense resistor connecting, when in use, said voltage source to a source node of said high side switch transistor; a bias circuit operable to provide a source to gate bias voltage to said high side switch transistor, the bias circuit being connected to the source node of said high side switch transistor and the gate node of the high side switch transistor; a secondary bias circuit connecting the bias circuit to the output of an overcurrent transistor and being operable to alter said source to gate bias voltage during an overcurrent validation, wherein the overcurrent transistor is configured to cause a control current in response to the voltage across the sense resistor indicating an overcurrent event, and the control current is effective to alter said source to gate bias of the high side switch transistor, thereby limiting, when in use, a current passing through said high side solenoid switch; a comparator having a first and second input, said first input connected to a first voltage divider and said second input connected to a second voltage divider; said first voltage divider connected in parallel to said secondary bias circuit and said second voltage divider directly connected, when in use, to said voltage source; whereby the output of the first voltage divider exceeds the output of the second voltage divider only during an overcurrent; and wherein the output of the comparator is a fault detection signal operable to be connected to a general controller. a high side switch transistor operable to connect, when in use, a voltage source to a solenoid switch; a sense resistor connecting, when in use, said voltage source to a source node of said high side switch transistor; a bias circuit operable to provide a source to gate bias voltage to said high side switch transistor, the bias circuit being connected to the source node of said high side switch transistor and the gate node of the high side switch transistor; a secondary bias circuit connecting the bias circuit to the output of an overcurrent transistor and being operable to alter said source to gate bias voltage during an overcurrent validation, wherein the overcurrent transistor is configured to cause a control current in response to the voltage across the sense resistor indicating an overcurrent event, and the control current is effective to alter said source to gate bias of the high side switch transistor, thereby limiting, when in use, a current passing through said high side solenoid switch; a comparator having a first and second input, said first input connected to a first voltage divider and said second input connected to a second voltage divider; said first voltage divider connected in parallel to said secondary bias circuit and said second voltage divider directly connected, when in use, to said voltage source; whereby the output of the first voltage divider exceeds the output of the second voltage divider only during an overcurrent; and wherein the output of the comparator is a fault detection signal operable to be connected to a general controller.