Memory device formed by resistive memory cells each provided with a resistive memory element (31, 310) associated in series with a selector (33, 330), each cell implementing a so-called "multi-level" coding and being programmed to a given programming state among k with k > 2 possible programming states, the device comprising a read circuit configured, during a read operation on a given cell: to apply a sequence of at least two successive and different read voltages (Vread1, Vread2, Vread3) to the given cell, the read circuit being configured such that said sequence comprises the application of a first read voltage (Vread1) to the given cell, the first read voltage (Vread1) belonging to a first range of voltages between a first threshold voltage and a second threshold voltage, and being selected from a set of read voltages of a sequence different read voltages (Vread1, Vread2, Vread3) to which a cell of said memory is likely to be subjected during said read operation, then the application of a second read voltage (Vread2) of said sequence of read voltages, the second read voltage being different from the first read voltage and belonging to a second range of voltages between the second threshold voltage and a third threshold voltage, the given programming state being determined as a function of respective values of a first read current (Iread1) passing through said given cell resulting from the application of said first read voltage (Vread1) and a second read current (Iread2) passing through said given cell following the application of said second read voltage (Vread2), characterized in that the memory device further comprises, said given programming state being determined as a function of the value of a sum between said first read current (Iread1) and said second read current (Iread2), the read circuit being further configured to detect at each applied read voltage of said sequence whether a read current (Iread1) passing through said given cell and resulting from the application of said read voltage corresponds to a first leakage current level (loffOTS) of the selector when this selector is in an OFF state or whether the read current corresponds to a second current level (Ilimit) when the selector is in an ON state. the device comprising a read circuit configured, during a read operation on a given cell: to apply a sequence of at least two successive and different read voltages (Vread1, Vread2, Vread3) to the given cell, the read circuit being configured such that said sequence comprises the application of a first read voltage (Vread1) to the given cell, the first read voltage (Vread1) belonging to a first range of voltages between a first threshold voltage and a second threshold voltage, and being selected from a set of read voltages of a sequence different read voltages (Vread1, Vread2, Vread3) to which a cell of said memory is likely to be subjected during said read operation, then the application of a second read voltage (Vread2) of said sequence of read voltages, the second read voltage being different from the first read voltage and belonging to a second range of voltages between the second threshold voltage and a third threshold voltage, the given programming state being determined as a function of respective values of a first read current (Iread1) passing through said given cell resulting from the application of said first read voltage (Vread1) and a second read current (Iread2) passing through said given cell following the application of said second read voltage (Vread2), characterized in that the memory device further comprises, said given programming state being determined as a function of the value of a sum between said first read current (Iread1) and said second read current (Iread2), the read circuit being further configured to detect at each applied read voltage of said sequence whether a read current (Iread1) passing through said given cell and resulting from the application of said read voltage corresponds to a first leakage current level (loffOTS) of the selector when this selector is in an OFF state or whether the read current corresponds to a second current level (Ilimit) when the selector is in an ON state.