A sending and receiving system (1, 1A to 1C) comprising: a sending apparatus (10; 10A to 10C) configured to perform a serial communication and includes a sending unit configured to send a signal having a predetermined pattern formed by adding a single 1 after a predetermined number of consecutive 0 or by adding a single 0 after a predetermined number of consecutive 1; and a receiving apparatus (20; 20A to 20C) configured to perform the serial communication and includes a receiving unit configured to provide the signal sent from the sending unit with an equalizing process depending on a setup value of an equalizer amount, a sampling unit configured to sample data obtained in the equalizing process by the receiving unit at a data rate higher than a data rate of the data, and a control unit configured to control the setup value of the equalizer amount based on a change of the data corresponding to the predetermined pattern; characterized in that: the control unit is configured to determine that the setup value of the equalizer amount is proper in a case where a bit length of a data part corresponding to the added single 0 or the added single 1 is equal to or more than a predetermined length, the receiving unit includes an equalizer configured to set the equalizer amount depending on the equalizer amount setup value received from the control unit, wherein the equalizer comprises a variable resistor configured to receive the equalizer amount setup value to adjust a resistance value of the resistor, wherein in case of a high frequency signal, a gain is increased, and in case of a low frequency signal, the gain is limited by the variable resistor. a sending apparatus (10; 10A to 10C) configured to perform a serial communication and includes a sending unit configured to send a signal having a predetermined pattern formed by adding a single 1 after a predetermined number of consecutive 0 or by adding a single 0 after a predetermined number of consecutive 1; and a receiving apparatus (20; 20A to 20C) configured to perform the serial communication and includes a receiving unit configured to provide the signal sent from the sending unit with an equalizing process depending on a setup value of an equalizer amount, a sampling unit configured to sample data obtained in the equalizing process by the receiving unit at a data rate higher than a data rate of the data, and a control unit configured to control the setup value of the equalizer amount based on a change of the data corresponding to the predetermined pattern; a receiving unit configured to provide the signal sent from the sending unit with an equalizing process depending on a setup value of an equalizer amount, a sampling unit configured to sample data obtained in the equalizing process by the receiving unit at a data rate higher than a data rate of the data, and a control unit configured to control the setup value of the equalizer amount based on a change of the data corresponding to the predetermined pattern; the control unit is configured to determine that the setup value of the equalizer amount is proper in a case where a bit length of a data part corresponding to the added single 0 or the added single 1 is equal to or more than a predetermined length, the receiving unit includes an equalizer configured to set the equalizer amount depending on the equalizer amount setup value received from the control unit, wherein the equalizer comprises a variable resistor configured to receive the equalizer amount setup value to adjust a resistance value of the resistor, wherein in case of a high frequency signal, a gain is increased, and in case of a low frequency signal, the gain is limited by the variable resistor.