An amplifier circuit, comprising: a first transistor having a control terminal adapted to receive a first amplifier input (Vin+), a first terminal adapted to communicate with a supply voltage terminal, and a second terminal adapted to communicate with a ground terminal; a second transistor having a control terminal adapted to receive a second amplifier input (Vin-), a first terminal adapted to communicate with said supply voltage terminal, and a second terminal connected to said second terminal of said first transistor; a third transistor having a control terminal adapted to receive said first amplifier input (Vin+), a first terminal adapted to communicate with said ground terminal, and a second terminal adapted to communicate with a supply voltage terminal, wherein said third transistor is adapted to operate complementary to said first transistor; a fourth transistor having a control terminal adapted to receive said second amplifier input (Vin-), a first terminal adapted to communicate with said ground terminal, and a second terminal connected to said second terminal of said third transistor; wherein said fourth transistor is adapted to operate complementary to said second transistor; a first differential transimpedance amplifier having a first input connected to said first terminal of said first transistor, a second input connected to said first terminal of said second transistor, a first output (Vx-), and a second output (Vx+); and a second differential transimpedance amplifier having a first input connected to said first terminal of said third transistor, a second input connected to said first terminal of said fourth transistor, a first output (Vlx-), and a second output (Vlx+), wherein said second differential transimpedance amplifier is adapted to operate complementary to said first differential transimpedance amplifier; characterized by a differential push-pull output amplifier having a first input connected to said first output (Vx-) of said first differential transimpedance amplifier, a second input connected to said second output (Vx+) of said first differential transimpedance amplifier, a third input connected to said first output (Vlx-) of said second differential transimpedance amplifier, a fourth input connected to said second output (Vlx+) of said second differential transimpedance amplifier, a first output (Vout-), and a second output (Vout+). a first transistor having a control terminal adapted to receive a first amplifier input (Vin+), a first terminal adapted to communicate with a supply voltage terminal, and a second terminal adapted to communicate with a ground terminal; a second transistor having a control terminal adapted to receive a second amplifier input (Vin-), a first terminal adapted to communicate with said supply voltage terminal, and a second terminal connected to said second terminal of said first transistor; a third transistor having a control terminal adapted to receive said first amplifier input (Vin+), a first terminal adapted to communicate with said ground terminal, and a second terminal adapted to communicate with a supply voltage terminal, wherein said third transistor is adapted to operate complementary to said first transistor; a fourth transistor having a control terminal adapted to receive said second amplifier input (Vin-), a first terminal adapted to communicate with said ground terminal, and a second terminal connected to said second terminal of said third transistor; wherein said fourth transistor is adapted to operate complementary to said second transistor; a first differential transimpedance amplifier having a first input connected to said first terminal of said first transistor, a second input connected to said first terminal of said second transistor, a first output (Vx-), and a second output (Vx+); and a second differential transimpedance amplifier having a first input connected to said first terminal of said third transistor, a second input connected to said first terminal of said fourth transistor, a first output (Vlx-), and a second output (Vlx+), wherein said second differential transimpedance amplifier is adapted to operate complementary to said first differential transimpedance amplifier; characterized by a differential push-pull output amplifier having a first input connected to said first output (Vx-) of said first differential transimpedance amplifier, a second input connected to said second output (Vx+) of said first differential transimpedance amplifier, a third input connected to said first output (Vlx-) of said second differential transimpedance amplifier, a fourth input connected to said second output (Vlx+) of said second differential transimpedance amplifier, a first output (Vout-), and a second output (Vout+).