A semiconductor device comprising: a first semiconductor chip (100, 100c); and a second semiconductor chip (200, 200c) that is stacked on the first semiconductor chip (100, 100c), wherein the first semiconductor chip (100, 100c) includes a first wiring portion of which a side surface is exposed at a side portion of the first semiconductor chip (100, 100c), wherein the second semiconductor chip (200, 200c) includes a second wiring portion of which a side surface is exposed at a side portion of the second semiconductor chip (200, 200c), and wherein the respective side surfaces of the first wiring portion and the second wiring portion, which are exposed at the side portions of the first semiconductor chip (100, 100c) and the second semiconductor chip (200, 200c), are covered by a conductive layer, and the first wiring portion and the second wiring portion are electrically connected to each other through the conductive layer, wherein the first semiconductor chip (100, 100c) has a first semiconductor substrate, and a first wiring layer which is stacked on the first semiconductor substrate and of which the first wiring portion is formed in an insulation layer, the first wiring layer including the first wiring portion laterally extending beyond the first semiconductor substrate, and the second semiconductor chip (200, 200c) has a second semiconductor substrate, and a second wiring layer which is stacked on the second semiconductor substrate and of which the second wiring portion is formed in an insulation layer, the second wiring layer including the second wiring portion laterally extending beyond the second semiconductor substrate, and the first wiring layer and the second wiring layer are opposed to each other, and the opposed surfaces of the first semiconductor chip (100, 100c) and the second semiconductor chip (200, 200c) are bonded to each other, the semiconductor device further comprising an insulation film covering the side portion of the first semiconductor substrate and further covering the area from the side portion to the upper surface of the second semiconductor substrate, the conductive layer being formed to extend from the side portion of the first wiring layer to the upper surface of the second wiring layer with the insulation film interposed between the conductive layer and the upper surface of the second wiring layer, the side portion of the second semiconductor substrate and the upper surface of the second semiconductor substrate. a first semiconductor chip (100, 100c); and a second semiconductor chip (200, 200c) that is stacked on the first semiconductor chip (100, 100c), wherein the first semiconductor chip (100, 100c) includes a first wiring portion of which a side surface is exposed at a side portion of the first semiconductor chip (100, 100c), wherein the second semiconductor chip (200, 200c) includes a second wiring portion of which a side surface is exposed at a side portion of the second semiconductor chip (200, 200c), and wherein the respective side surfaces of the first wiring portion and the second wiring portion, which are exposed at the side portions of the first semiconductor chip (100, 100c) and the second semiconductor chip (200, 200c), are covered by a conductive layer, and the first wiring portion and the second wiring portion are electrically connected to each other through the conductive layer, wherein the first semiconductor chip (100, 100c) has a first semiconductor substrate, and a first wiring layer which is stacked on the first semiconductor substrate and of which the first wiring portion is formed in an insulation layer, the first wiring layer including the first wiring portion laterally extending beyond the first semiconductor substrate, and a first semiconductor substrate, and a first wiring layer which is stacked on the first semiconductor substrate and of which the first wiring portion is formed in an insulation layer, the first wiring layer including the first wiring portion laterally extending beyond the first semiconductor substrate, and the second semiconductor chip (200, 200c) has a second semiconductor substrate, and a second wiring layer which is stacked on the second semiconductor substrate and of which the second wiring portion is formed in an insulation layer, the second wiring layer including the second wiring portion laterally extending beyond the second semiconductor substrate, and a second semiconductor substrate, and a second wiring layer which is stacked on the second semiconductor substrate and of which the second wiring portion is formed in an insulation layer, the second wiring layer including the second wiring portion laterally extending beyond the second semiconductor substrate, and the first wiring layer and the second wiring layer are opposed to each other, and the opposed surfaces of the first semiconductor chip (100, 100c) and the second semiconductor chip (200, 200c) are bonded to each other, the semiconductor device further comprising an insulation film covering the side portion of the first semiconductor substrate and further covering the area from the side portion to the upper surface of the second semiconductor substrate, the conductive layer being formed to extend from the side portion of the first wiring layer to the upper surface of the second wiring layer with the insulation film interposed between the conductive layer and the upper surface of the second wiring layer, the side portion of the second semiconductor substrate and the upper surface of the second semiconductor substrate.