A photoelectric conversion apparatus comprising: a photoelectric conversion element; a differential pair including a first transistor for receiving a signal based on an electric charge generated in the photoelectric conversion element and a second transistor for receiving a reference signal; a clamp circuit including a clamp switch element connected to a gate of the second transistor, and a clamp capacitor element having a first terminal connected to the gate of the second transistor and a second terminal for receiving the reference signal; and an output circuit, which is connected between a drain of the second transistor and an output node, for performing a first operation to output a voltage based on a voltage at a gate of the first transistor to the gate of the second transistor, and a second operation to receive a current from the second transistor, and to output a signal based on a result of a comparison between the voltage at the gate of the first transistor and a voltage at the gate of the second transistor to the output node, wherein the output circuit includes a control unit, wherein the control unit includes: a current mirror circuit including a third transistor electrically connected to the drain of the second transistor and a fourth transistor having a gate connected to a gate of the third transistor; and a first switch element that connects the gate and a drain of the fourth transistor, and wherein, in the first operation, the current mirror circuit mirrors a current of the fourth transistor to the third transistor in response to turning-on of the first switch element, and wherein, in the second operation, the current mirror circuit mirrors a current of the third transistor to the fourth transistor in response to turning-off of the first switch element wherein the drain and the gate of the third transistor are electrically connected to one of a capacitor element, or a second switch element. a photoelectric conversion element; a differential pair including a first transistor for receiving a signal based on an electric charge generated in the photoelectric conversion element and a second transistor for receiving a reference signal; a clamp circuit including a clamp switch element connected to a gate of the second transistor, and a clamp capacitor element having a first terminal connected to the gate of the second transistor and a second terminal for receiving the reference signal; and an output circuit, which is connected between a drain of the second transistor and an output node, for performing a first operation to output a voltage based on a voltage at a gate of the first transistor to the gate of the second transistor, and a second operation to receive a current from the second transistor, and to output a signal based on a result of a comparison between the voltage at the gate of the first transistor and a voltage at the gate of the second transistor to the output node, a first operation to output a voltage based on a voltage at a gate of the first transistor to the gate of the second transistor, and a second operation to receive a current from the second transistor, and to output a signal based on a result of a comparison between the voltage at the gate of the first transistor and a voltage at the gate of the second transistor to the output node, wherein the output circuit includes a control unit, wherein the control unit includes: a current mirror circuit including a third transistor electrically connected to the drain of the second transistor and a fourth transistor having a gate connected to a gate of the third transistor; and a first switch element that connects the gate and a drain of the fourth transistor, and a current mirror circuit including a third transistor electrically connected to the drain of the second transistor and a fourth transistor having a gate connected to a gate of the third transistor; and a first switch element that connects the gate and a drain of the fourth transistor, and wherein, in the first operation, the current mirror circuit mirrors a current of the fourth transistor to the third transistor in response to turning-on of the first switch element, and wherein, in the second operation, the current mirror circuit mirrors a current of the third transistor to the fourth transistor in response to turning-off of the first switch element wherein the drain and the gate of the third transistor are electrically connected to one of a capacitor element, or a second switch element.