A continuous time linear equalizer, CTLE, comprising: a transadmittance amplifier stage having first and second gain paths (G1, G2) and configured to input a first differential signal and output a second signal, the first gain path configured to provide a DC gain recovery and a first high frequency gain to the first signal and the second gain path configured to provide a second high frequency gain to the first signal, the second signal generated by the transadmittance amplifier stage based on the gain recovery of the first signal and the high frequency gains of the first signal; and a transimpedance amplifier stage configured to input the second signal from the transadmittance amplifier stage and convert the second signal to an output voltage signal; wherein the second gain path comprises a first capacitor (C2 p) disposed between a first input (Vinp) of the first signal and a gate of a first transistor in the transadmittance amplifier stage, and a second capacitor (C2 n) disposed between a second input (Vinm) of the first signal and a gate of a second transistor in the transadmittance amplifier stage; wherein the second gain path further comprises first and second resistors (R2 p, R2 n) coupled between the gates of the first and second transistors (203, 204), characterized by the first and second resistors (R2 p, R2 n) further coupled to an output of an operational transconductance amplifier, OTA, within the transadmittance amplifier stage, wherein inputs of the OTA are connected to an actual output common mode voltage (V sns) of the transimpedance amplifier stage and a voltage representative of a desired or target common-mode voltage at the output of the transimpedance amplifier stage. a transadmittance amplifier stage having first and second gain paths (G1, G2) and configured to input a first differential signal and output a second signal, the first gain path configured to provide a DC gain recovery and a first high frequency gain to the first signal and the second gain path configured to provide a second high frequency gain to the first signal, the second signal generated by the transadmittance amplifier stage based on the gain recovery of the first signal and the high frequency gains of the first signal; and a transimpedance amplifier stage configured to input the second signal from the transadmittance amplifier stage and convert the second signal to an output voltage signal; wherein the second gain path comprises a first capacitor (C2 p) disposed between a first input (Vinp) of the first signal and a gate of a first transistor in the transadmittance amplifier stage, and a second capacitor (C2 n) disposed between a second input (Vinm) of the first signal and a gate of a second transistor in the transadmittance amplifier stage; wherein the second gain path further comprises first and second resistors (R2 p, R2 n) coupled between the gates of the first and second transistors (203, 204), characterized by the first and second resistors (R2 p, R2 n) further coupled to an output of an operational transconductance amplifier, OTA, within the transadmittance amplifier stage, wherein inputs of the OTA are connected to an actual output common mode voltage (V sns) of the transimpedance amplifier stage and a voltage representative of a desired or target common-mode voltage at the output of the transimpedance amplifier stage.