Method for forming a nanopore transistor for biosensing, comprising: a. forming an aperture in a filler material by: i. providing a fin structure comprising at least a bottom semiconductor layer and a top layer; ii. pattering the top layer to form a pillar; iii. laterally embedding the pillar in a filler material; iv. forming an aperture in the filler material by removing the pillar; v. lining the aperture with a spacer material, thereby reducing a size of the aperture; characterized in that the method further comprises: b. forming a nanopore in the bottom semiconductor layer by etching through the aperture; c. lining the nanopore with a gate dielectric material, thereby forming a gate dielectric; d. Forming a source and a drain by either: i. Between steps a.ii. and a.iii., doping the bottom semiconductor layer by ion implantation using the pillar as a mask, or ii. After step b., - filling the aperture with a sealing material so that the sealing material is coplanar with the filler material, thereby forming a post comprising the sealing material and the spacer material; - removing the filler material selectively with respect to the post, thereby exposing a part of the bottom semiconductor layer; - doping the bottom semiconductor layer by ion implantation by using the post as a mask; and - removing the sealing material. a. forming an aperture in a filler material by: i. providing a fin structure comprising at least a bottom semiconductor layer and a top layer; ii. pattering the top layer to form a pillar; iii. laterally embedding the pillar in a filler material; iv. forming an aperture in the filler material by removing the pillar; v. lining the aperture with a spacer material, thereby reducing a size of the aperture; i. providing a fin structure comprising at least a bottom semiconductor layer and a top layer; ii. pattering the top layer to form a pillar; iii. laterally embedding the pillar in a filler material; iv. forming an aperture in the filler material by removing the pillar; v. lining the aperture with a spacer material, thereby reducing a size of the aperture; b. forming a nanopore in the bottom semiconductor layer by etching through the aperture; c. lining the nanopore with a gate dielectric material, thereby forming a gate dielectric; d. Forming a source and a drain by either: i. Between steps a.ii. and a.iii., doping the bottom semiconductor layer by ion implantation using the pillar as a mask, or ii. After step b., - filling the aperture with a sealing material so that the sealing material is coplanar with the filler material, thereby forming a post comprising the sealing material and the spacer material; - removing the filler material selectively with respect to the post, thereby exposing a part of the bottom semiconductor layer; - doping the bottom semiconductor layer by ion implantation by using the post as a mask; and - removing the sealing material. i. Between steps a.ii. and a.iii., doping the bottom semiconductor layer by ion implantation using the pillar as a mask, or ii. After step b., - filling the aperture with a sealing material so that the sealing material is coplanar with the filler material, thereby forming a post comprising the sealing material and the spacer material; - removing the filler material selectively with respect to the post, thereby exposing a part of the bottom semiconductor layer; - doping the bottom semiconductor layer by ion implantation by using the post as a mask; and - removing the sealing material. - filling the aperture with a sealing material so that the sealing material is coplanar with the filler material, thereby forming a post comprising the sealing material and the spacer material; - removing the filler material selectively with respect to the post, thereby exposing a part of the bottom semiconductor layer; - doping the bottom semiconductor layer by ion implantation by using the post as a mask; and - removing the sealing material.