An apparatus for power-domain assignment, comprising: a first bus-to-switch interface; a second bus-to-switch interface; a first power-domain bus, coupled to the first bus-to-switch interface, wherein the first power-domain bus includes: a first set of power inputs, and a first I/O level shifter interface; a second power-domain bus, coupled to the second bus-to-switch interface, wherein the second power-domain bus, includes: a second set of power inputs, and a second I/O level shifter interface; a set of I/O signal level shifters, coupled between the first and second power-domain buses using the first and second I/O level shifter interfaces (310, 316); a switch including, a first IP block power coupling output; and a second IP block power coupling output; a set of IP block I/O signal paths; and a selection signal input; wherein the switch is coupled to the first and second bus-to-switch interfaces; wherein, in response to receiving a first signal on the selection signal input, the switch is configured to: couple the first set of power inputs from the first power-domain bus to the first and second IP block power coupling outputs; and couple the first I/O level shifter interface to the set of IP block I/O signal paths; and wherein in response to receiving a second signal on the selection signal input, the switch is configured to: couple the second set of power inputs from the second power-domain bus to the first and second IP block power coupling outputs; and couple the second I/O level shifter interface to the set of IP block I/O signal paths. a first bus-to-switch interface; a second bus-to-switch interface; a first power-domain bus, coupled to the first bus-to-switch interface, wherein the first power-domain bus includes: a first set of power inputs, and a first I/O level shifter interface; a first set of power inputs, and a first I/O level shifter interface; a second power-domain bus, coupled to the second bus-to-switch interface, wherein the second power-domain bus, includes: a second set of power inputs, and a second I/O level shifter interface; a second set of power inputs, and a second I/O level shifter interface; a set of I/O signal level shifters, coupled between the first and second power-domain buses using the first and second I/O level shifter interfaces (310, 316); a switch including, a first IP block power coupling output; and a second IP block power coupling output; a set of IP block I/O signal paths; and a selection signal input; a first IP block power coupling output; and a second IP block power coupling output; a set of IP block I/O signal paths; and a selection signal input; wherein the switch is coupled to the first and second bus-to-switch interfaces; wherein, in response to receiving a first signal on the selection signal input, the switch is configured to: couple the first set of power inputs from the first power-domain bus to the first and second IP block power coupling outputs; and couple the first I/O level shifter interface to the set of IP block I/O signal paths; and couple the first set of power inputs from the first power-domain bus to the first and second IP block power coupling outputs; and couple the first I/O level shifter interface to the set of IP block I/O signal paths; and wherein in response to receiving a second signal on the selection signal input, the switch is configured to: couple the second set of power inputs from the second power-domain bus to the first and second IP block power coupling outputs; and couple the second I/O level shifter interface to the set of IP block I/O signal paths. couple the second set of power inputs from the second power-domain bus to the first and second IP block power coupling outputs; and couple the second I/O level shifter interface to the set of IP block I/O signal paths.