A circuit, comprising: a first operational amplifier having an inverting input (-) and a non-inverting input (+); a negative resistance circuit (100, -R3) connected to the inverting input (-) of the first operational amplifier, characterized in that the negative resistance circuit (100, -R3) comprises: a second operational amplifier; a first current source controlled by the second operational amplifier; and a cross-coupled transistor circuit having at least one transistor (111, 112) biased by a current produced by the current source, wherein the cross-coupled transistor circuit comprises: a first transistor; and a second transistor, wherein a gate of the first transistor is connected to a drain of the second transistor and a gate of the second transistor is connected to a drain of the first transistor, wherein the first transistor and the second transistor have sources connected to a non-inverting input of the second operational amplifier, and wherein the first transistor has a drain connected to the inverting input (-) of the first operational amplifier and the second transistor has a drain connected to a ground terminal or a differential input; a second cross-coupled transistor circuit having at least one transistor (121, 122) biased by a current produced by a second current source, the second current source being controlled by the second operational amplifier, wherein the second cross-coupled transistor circuit comprises: a third transistor; and a fourth transistor, wherein a gate of the third transistor is connected to a drain of the fourth transistor and a gate of the fourth transistor is connected to a drain of the third transistor, and wherein a source of the third transistor and a source of the fourth transistor are connected to a non-inverting input of the second operational amplifier. a first operational amplifier having an inverting input (-) and a non-inverting input (+); a negative resistance circuit (100, -R3) connected to the inverting input (-) of the first operational amplifier, characterized in that the negative resistance circuit (100, -R3) comprises: a second operational amplifier; a first current source controlled by the second operational amplifier; and a cross-coupled transistor circuit having at least one transistor (111, 112) biased by a current produced by the current source, a second operational amplifier; a first current source controlled by the second operational amplifier; and a cross-coupled transistor circuit having at least one transistor (111, 112) biased by a current produced by the current source, wherein the cross-coupled transistor circuit comprises: a first transistor; and a second transistor, wherein a gate of the first transistor is connected to a drain of the second transistor and a gate of the second transistor is connected to a drain of the first transistor, wherein the first transistor and the second transistor have sources connected to a non-inverting input of the second operational amplifier, and wherein the first transistor has a drain connected to the inverting input (-) of the first operational amplifier and the second transistor has a drain connected to a ground terminal or a differential input; a second cross-coupled transistor circuit having at least one transistor (121, 122) biased by a current produced by a second current source, the second current source being controlled by the second operational amplifier, wherein the second cross-coupled transistor circuit comprises: a third transistor; and a fourth transistor, wherein a gate of the third transistor is connected to a drain of the fourth transistor and a gate of the fourth transistor is connected to a drain of the third transistor, and wherein a source of the third transistor and a source of the fourth transistor are connected to a non-inverting input of the second operational amplifier. a first transistor; and a second transistor, wherein a gate of the first transistor is connected to a drain of the second transistor and a gate of the second transistor is connected to a drain of the first transistor, wherein the first transistor and the second transistor have sources connected to a non-inverting input of the second operational amplifier, and wherein the first transistor has a drain connected to the inverting input (-) of the first operational amplifier and the second transistor has a drain connected to a ground terminal or a differential input; a second cross-coupled transistor circuit having at least one transistor (121, 122) biased by a current produced by a second current source, the second current source being controlled by the second operational amplifier, wherein the second cross-coupled transistor circuit comprises: a third transistor; and a fourth transistor, wherein a gate of the third transistor is connected to a drain of the fourth transistor and a gate of the fourth transistor is connected to a drain of the third transistor, and wherein a source of the third transistor and a source of the fourth transistor are connected to a non-inverting input of the second operational amplifier.