An integrated circuit device with a dual mode boost regulator, comprising: a power source terminal; a power source common terminal; an inductor terminal; an external transistor gate control terminal; a voltage output terminal; a boost regulator mode select terminal; a voltage sense terminal; a transistor switching control circuit having a mode select input coupled to the boost regulator mode select terminal; a first power transistor, preferably a P-channel metal oxide semiconductor field effect transistor, coupled between the inductor terminal and the voltage output terminal, and controlled by the transistor switching control circuit; a voltage feedback circuit coupled between the voltage output terminal and the transistor switching control circuit, and having at least one input coupled to at least one voltage reference; a start-up circuit; an oscillator coupled to the start-up circuit and the transistor switching control circuit; a second power transistor, preferably a N-channel metal oxide semiconductor field effect transistor, coupled between the inductor terminal and the power source common terminal, and controlled by the transistor switching control circuit; a first voltage measurement device having an output coupled to the transistor switching control circuit; a second voltage measurement device having a first differential input coupled to the inductor terminal and a second differential input coupled to the voltage sense terminal; and a mode selection switch having a common coupled to an input of the first voltage measurement device, a first input coupled to the inductor terminal and a second input coupled to an output of the second voltage measurement device; wherein when a low power boost regulator mode is selected through the boost regulator mode select terminal the first power transistor and the second power transistor are active and controlled by the transistor switching control circuit, the input of the first voltage measurement device is coupled to the inductor terminal through the mode selection switch; and when a high power boost regulator mode is selected through the boost regulator mode select terminal the first power transistor and the second power transistor are inactive, the external transistor gate control terminal is controlled to drive an external transistor, and the input of the first voltage measurement device is coupled to the output of the second voltage measurement device through the mode selection switch. a power source terminal; a power source common terminal; an inductor terminal; an external transistor gate control terminal; a voltage output terminal; a boost regulator mode select terminal; a voltage sense terminal; a transistor switching control circuit having a mode select input coupled to the boost regulator mode select terminal; a first power transistor, preferably a P-channel metal oxide semiconductor field effect transistor, coupled between the inductor terminal and the voltage output terminal, and controlled by the transistor switching control circuit; a voltage feedback circuit coupled between the voltage output terminal and the transistor switching control circuit, and having at least one input coupled to at least one voltage reference; a start-up circuit; an oscillator coupled to the start-up circuit and the transistor switching control circuit; a second power transistor, preferably a N-channel metal oxide semiconductor field effect transistor, coupled between the inductor terminal and the power source common terminal, and controlled by the transistor switching control circuit; a first voltage measurement device having an output coupled to the transistor switching control circuit; a second voltage measurement device having a first differential input coupled to the inductor terminal and a second differential input coupled to the voltage sense terminal; and a mode selection switch having a common coupled to an input of the first voltage measurement device, a first input coupled to the inductor terminal and a second input coupled to an output of the second voltage measurement device; wherein when a low power boost regulator mode is selected through the boost regulator mode select terminal the first power transistor and the second power transistor are active and controlled by the transistor switching control circuit, the input of the first voltage measurement device is coupled to the inductor terminal through the mode selection switch; and when a high power boost regulator mode is selected through the boost regulator mode select terminal the first power transistor and the second power transistor are inactive, the external transistor gate control terminal is controlled to drive an external transistor, and the input of the first voltage measurement device is coupled to the output of the second voltage measurement device through the mode selection switch. when a low power boost regulator mode is selected through the boost regulator mode select terminal the first power transistor and the second power transistor are active and controlled by the transistor switching control circuit, the input of the first voltage measurement device is coupled to the inductor terminal through the mode selection switch; and when a high power boost regulator mode is selected through the boost regulator mode select terminal the first power transistor and the second power transistor are inactive, the external transistor gate control terminal is controlled to drive an external transistor, and the input of the first voltage measurement device is coupled to the output of the second voltage measurement device through the mode selection switch.