A regulation circuit comprising: a resistive element having a first terminal coupled to a first power supply voltage terminal, and a second terminal coupled to an internal power supply node (USB_INT); a first transistor having a first current electrode coupled to the internal power supply node, a control electrode, and a second current electrode coupled to provide a first current to a circuit load; a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a control electrode, and a second current electrode coupled to provide a second current to charge a battery; a variable resistance having a first terminal coupled to a P-channel transistor, and a second terminal coupled to an N-channel transistor; a second feedback loop for controlling a conductivity of the first transistor in response to a voltage at the internal power supply node; a first feedback loop for controlling a conductivity of the second transistor in response to a voltage at the battery; and a digital control loop (16, 72, 74) coupled between the internal power supply node and the variable resistance, the digital control loop for reducing the second current to the battery in response to detecting a drop in the voltage of the internal power supply node; wherein the digital control loop comprises: a first comparator having a first input for receiving the voltage at the internal power supply node (USB_INT), a second terminal for receiving a first threshold voltage (DPM_HI), and an output coupled to a digital control circuit; and a second comparator having a first input for receiving the voltage at the internal power supply node (USB_INT), a second terminal for receiving a second threshold voltage (DPM_LO), and an output coupled to the digital control circuit wherein the second threshold voltage (DPM_LO) is lower than the first threshold voltage (DPM_HI); wherein the digital control loop is adapted to reduce the second current to a minimum current in response to the voltage at the internal power supply node (USB_INT) dropping below the first and the second threshold voltages (DPM_HI, DPM_LO); incrementally increase the second current in response to the voltage at the internal power supply node (USB_INT) increasing above the first and the second threshold voltages (DPM_HI, DPM_LO); or stop incrementally increasing the second current in response to the voltage at the internal power supply node (USB_INT) dropping between the first threshold voltage (DPM_HI) and the second threshold voltage (DPM_LO). a resistive element having a first terminal coupled to a first power supply voltage terminal, and a second terminal coupled to an internal power supply node (USB_INT); a first transistor having a first current electrode coupled to the internal power supply node, a control electrode, and a second current electrode coupled to provide a first current to a circuit load; a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a control electrode, and a second current electrode coupled to provide a second current to charge a battery; a variable resistance having a first terminal coupled to a P-channel transistor, and a second terminal coupled to an N-channel transistor; a second feedback loop for controlling a conductivity of the first transistor in response to a voltage at the internal power supply node; a first feedback loop for controlling a conductivity of the second transistor in response to a voltage at the battery; and a digital control loop (16, 72, 74) coupled between the internal power supply node and the variable resistance, the digital control loop for reducing the second current to the battery in response to detecting a drop in the voltage of the internal power supply node; wherein the digital control loop comprises: a first comparator having a first input for receiving the voltage at the internal power supply node (USB_INT), a second terminal for receiving a first threshold voltage (DPM_HI), and an output coupled to a digital control circuit; and a second comparator having a first input for receiving the voltage at the internal power supply node (USB_INT), a second terminal for receiving a second threshold voltage (DPM_LO), and an output coupled to the digital control circuit wherein the second threshold voltage (DPM_LO) is lower than the first threshold voltage (DPM_HI); wherein the digital control loop is adapted to reduce the second current to a minimum current in response to the voltage at the internal power supply node (USB_INT) dropping below the first and the second threshold voltages (DPM_HI, DPM_LO); incrementally increase the second current in response to the voltage at the internal power supply node (USB_INT) increasing above the first and the second threshold voltages (DPM_HI, DPM_LO); or stop incrementally increasing the second current in response to the voltage at the internal power supply node (USB_INT) dropping between the first threshold voltage (DPM_HI) and the second threshold voltage (DPM_LO).