A computing device for processing a data buffer, the computing device comprising: one or more microprocessors; and a data buffer processing module to: access a data buffer having a buffer length; determine a level of parallelism configured for the data buffer indicative of a plurality of data segments of the data buffer to be processed in parallel; define the plurality of data segments for the data buffer based on the level or parallelism configured for the data buffer, wherein each data segment has a segment length greater than zero and less than the buffer length and comprises one or more words; directly read the data segments into one or more data registers, each data register of the one or more data registers having a plurality of data paths, wherein to directly read the data segments into the one or more data registers comprises to serially read, into a given one of the one or more data registers, one word from each data segment into a different data path of the given data register; perform a serial data processing algorithm on each of the data paths of the one or more data registers substantially in parallel to generate a hash digest for each of the plurality of data segments; and combine the generated hash digests to form the output of the serial data processing algorithm by performing one of an exclusive-or function or a bitwise addition function on the generated hash digests, wherein the data buffer processing module is configured for execution on a single thread of a single core of a microprocessor of the one or more microprocessors. one or more microprocessors; and a data buffer processing module to: access a data buffer having a buffer length; determine a level of parallelism configured for the data buffer indicative of a plurality of data segments of the data buffer to be processed in parallel; define the plurality of data segments for the data buffer based on the level or parallelism configured for the data buffer, wherein each data segment has a segment length greater than zero and less than the buffer length and comprises one or more words; directly read the data segments into one or more data registers, each data register of the one or more data registers having a plurality of data paths, wherein to directly read the data segments into the one or more data registers comprises to serially read, into a given one of the one or more data registers, one word from each data segment into a different data path of the given data register; perform a serial data processing algorithm on each of the data paths of the one or more data registers substantially in parallel to generate a hash digest for each of the plurality of data segments; and combine the generated hash digests to form the output of the serial data processing algorithm by performing one of an exclusive-or function or a bitwise addition function on the generated hash digests, access a data buffer having a buffer length; determine a level of parallelism configured for the data buffer indicative of a plurality of data segments of the data buffer to be processed in parallel; define the plurality of data segments for the data buffer based on the level or parallelism configured for the data buffer, wherein each data segment has a segment length greater than zero and less than the buffer length and comprises one or more words; directly read the data segments into one or more data registers, each data register of the one or more data registers having a plurality of data paths, wherein to directly read the data segments into the one or more data registers comprises to serially read, into a given one of the one or more data registers, one word from each data segment into a different data path of the given data register; perform a serial data processing algorithm on each of the data paths of the one or more data registers substantially in parallel to generate a hash digest for each of the plurality of data segments; and combine the generated hash digests to form the output of the serial data processing algorithm by performing one of an exclusive-or function or a bitwise addition function on the generated hash digests, wherein the data buffer processing module is configured for execution on a single thread of a single core of a microprocessor of the one or more microprocessors.