A Ka-band, single-voltage supply pseudomorphic high electron mobility transistor (PHEMT) power device (1; 1'; 1") comprising: a semi-insulating substrate; an epitaxial substrate formed on the semi-insulating substrate; the epitaxial substrate comprising a buffer layer, a superlattice layer, a first electron supply layer (12, 13), a first spacer layer, an electron transit layer, a second spacer layer, a second electron supply layer, a Schottky layer, and a contact layer sequentially stacked on the semi-insulating substrate; wherein the first electron supply layer (12, 13) has a lower doping concentration then the second electron supply layer; source and drain electrodes (4, 5) formed on, and in ohmic contact with the contact layer; and a gate electrode formed on the Schottky layer to extend through the contact layer; wherein the contact layer comprises: a lightly doped contact layer formed on the Schottky layer; and a highly doped contact layer formed on the lightly doped contact layer and having a doping concentration higher than the lightly doped contact layer; wherein the PHEMT power device further comprises: a wide recess formed to penetrate the highly doped contact layer so as to expose a surface of the lightly doped contact layer; and a narrow recess formed in the wide recess to penetrate the lightly doped contact layer so as to expose a surface of the Schottky layer; wherein the gate electrode is formed in the narrow recess and in Schottky contact with the Schottky layer to extend from the exposed surface of the Schottky layer through the lightly and highly doped contact layers (20, 21); and wherein the source and drain electrodes (4, 5) are formed on, and in ohmic contact with the highly doped contact layer outside the wide recess so that the wide recess is arranged between the source and drain electrodes (4, 5). a semi-insulating substrate; an epitaxial substrate formed on the semi-insulating substrate; the epitaxial substrate comprising a buffer layer, a superlattice layer, a first electron supply layer (12, 13), a first spacer layer, an electron transit layer, a second spacer layer, a second electron supply layer, a Schottky layer, and a contact layer sequentially stacked on the semi-insulating substrate; wherein the first electron supply layer (12, 13) has a lower doping concentration then the second electron supply layer; source and drain electrodes (4, 5) formed on, and in ohmic contact with the contact layer; and a gate electrode formed on the Schottky layer to extend through the contact layer; wherein the contact layer comprises: a lightly doped contact layer formed on the Schottky layer; and a highly doped contact layer formed on the lightly doped contact layer and having a doping concentration higher than the lightly doped contact layer; wherein the PHEMT power device further comprises: a wide recess formed to penetrate the highly doped contact layer so as to expose a surface of the lightly doped contact layer; and a narrow recess formed in the wide recess to penetrate the lightly doped contact layer so as to expose a surface of the Schottky layer; wherein the gate electrode is formed in the narrow recess and in Schottky contact with the Schottky layer to extend from the exposed surface of the Schottky layer through the lightly and highly doped contact layers (20, 21); and wherein the source and drain electrodes (4, 5) are formed on, and in ohmic contact with the highly doped contact layer outside the wide recess so that the wide recess is arranged between the source and drain electrodes (4, 5). a lightly doped contact layer formed on the Schottky layer; and a highly doped contact layer formed on the lightly doped contact layer and having a doping concentration higher than the lightly doped contact layer; wherein the PHEMT power device further comprises: a wide recess formed to penetrate the highly doped contact layer so as to expose a surface of the lightly doped contact layer; and a narrow recess formed in the wide recess to penetrate the lightly doped contact layer so as to expose a surface of the Schottky layer; wherein the gate electrode is formed in the narrow recess and in Schottky contact with the Schottky layer to extend from the exposed surface of the Schottky layer through the lightly and highly doped contact layers (20, 21); and wherein the source and drain electrodes (4, 5) are formed on, and in ohmic contact with the highly doped contact layer outside the wide recess so that the wide recess is arranged between the source and drain electrodes (4, 5). a wide recess formed to penetrate the highly doped contact layer so as to expose a surface of the lightly doped contact layer; and a narrow recess formed in the wide recess to penetrate the lightly doped contact layer so as to expose a surface of the Schottky layer; wherein the gate electrode is formed in the narrow recess and in Schottky contact with the Schottky layer to extend from the exposed surface of the Schottky layer through the lightly and highly doped contact layers (20, 21); and wherein the source and drain electrodes (4, 5) are formed on, and in ohmic contact with the highly doped contact layer outside the wide recess so that the wide recess is arranged between the source and drain electrodes (4, 5).