A semiconductor device comprising: a silicon carbide substrate that has first and second principal surfaces; a first-conductive-type first silicon carbide layer that is provided on the first principal surface of the silicon carbide substrate; a second-conductive-type first silicon carbide region that is formed at a surface of the first silicon carbide layer; a first-conductive-type second silicon carbide region that is formed at a surface of the first silicon carbide region; a second-conductive-type third silicon carbide region that is formed below the second silicon carbide region; a gate insulating film that is continuously formed on surfaces of the second silicon carbide region, the first silicon carbide region, and the first silicon carbide layer; a gate electrode that is formed on the gate insulating film; an interlayer insulating film with which the gate electrode is completely covered; a trench that is formed so as to pierce through the interlayer insulating film and the second silicon carbide region to reach the third silicon carbide region; a first electrode that is formed only directly on the second silicon carbide region and on the interlayer insulating film on a side surface of the trench while containing a metallic element selected from a group consisting of Ni, Ti, Ta, Mo, and W; a second electrode that is formed directly on the third silicon carbide region in a bottom portion of the trench and on the first electrode while containing Al; a first main electrode that is formed on the second electrode; and a second main electrode that is formed on the second principal surface of the silicon carbide substrate; wherein the first-conductive-type is n-type and the second-conductive-type is p-type. a silicon carbide substrate that has first and second principal surfaces; a first-conductive-type first silicon carbide layer that is provided on the first principal surface of the silicon carbide substrate; a second-conductive-type first silicon carbide region that is formed at a surface of the first silicon carbide layer; a first-conductive-type second silicon carbide region that is formed at a surface of the first silicon carbide region; a second-conductive-type third silicon carbide region that is formed below the second silicon carbide region; a gate insulating film that is continuously formed on surfaces of the second silicon carbide region, the first silicon carbide region, and the first silicon carbide layer; a gate electrode that is formed on the gate insulating film; an interlayer insulating film with which the gate electrode is completely covered; a trench that is formed so as to pierce through the interlayer insulating film and the second silicon carbide region to reach the third silicon carbide region; a first electrode that is formed only directly on the second silicon carbide region and on the interlayer insulating film on a side surface of the trench while containing a metallic element selected from a group consisting of Ni, Ti, Ta, Mo, and W; a second electrode that is formed directly on the third silicon carbide region in a bottom portion of the trench and on the first electrode while containing Al; a first main electrode that is formed on the second electrode; and a second main electrode that is formed on the second principal surface of the silicon carbide substrate; wherein the first-conductive-type is n-type and the second-conductive-type is p-type.