A semiconductor light emitting element comprising: a first semiconductor layer of a first conductivity type; a pit formation layer formed on said first semiconductor layer and having a pyramidal pit caused by a threading dislocation generated in said first semiconductor layer; an active layer formed on said pit formation layer) and made of InGaN-based semiconductor materials, said active layer having a multi-quantum well structure having well layers (W(n)) and barrier layers (B(n)) that are laminated alternately in which each well layer and each barrier layer lie one upon another, and said active layer having an embedded portion formed so as to embed said pit; an electron blocking layer formed on said active layer to cover said embedded portion; and a second semiconductor layer formed on said electron blocking layer and having a second conductivity type which is opposite to said first conductivity type, characterized in that said embedded portion has embedded well portions (IW(n)) corresponding to said well layers (W(n)) respectively and embedded barrier portions (iB(n)) corresponding to said barrier layers (B(n)) respectively, each of said embedded well portions (IW(n)) and said embedded barrier portions (IB(n)) is configured such that, with respect to each IW, IW) of said embedded well portions (IW(n)) and each (IB, IB) of said embedded barrier portions (IB(n)) which are situated adjacent to each other, a second apex angle (y1,y2) of an apex (PW, PW) of said each of said embedded well portions (IW(n)) is smaller than a first apex angle (x1, x2) of an apex (PB, PB) of said each of said embedded barrier portions (IB(n)) wherein said each of said embedded well portions (IW(n)) is subsequently formed on said each of said embedded barrier portions (IB(n)), said embedded well portions (IW(n)) are configured so as to have apex angles which are gradually increased respectively as the embedded well portions (IW(n)) approach said second semiconductor layer, said embedded barrier portions (IB(n)) are configured so as to have apex angles which are gradually increased respectively as the embedded barrier portions (IB(n)) approach said second semiconductor layer, so that said embedded portion has a recess portion placed on an upper interface with said electron blocking layer above said pyramidal pit, said recess portion has an apex placed at a position existing in a layered direction of said active layer within said active layer, the depth of the apex of said recess with regard to the interface between the active layer and the electron blocking layer outside the embedded portion exceeding the well layer (W(n)) the nearest to said electron blocking layer outside the embedded portion. a first semiconductor layer of a first conductivity type; a pit formation layer formed on said first semiconductor layer and having a pyramidal pit caused by a threading dislocation generated in said first semiconductor layer; an active layer formed on said pit formation layer) and made of InGaN-based semiconductor materials, said active layer having a multi-quantum well structure having well layers (W(n)) and barrier layers (B(n)) that are laminated alternately in which each well layer and each barrier layer lie one upon another, and said active layer having an embedded portion formed so as to embed said pit; said active layer having a multi-quantum well structure having well layers (W(n)) and barrier layers (B(n)) that are laminated alternately in which each well layer and each barrier layer lie one upon another, and said active layer having an embedded portion formed so as to embed said pit; an electron blocking layer formed on said active layer to cover said embedded portion; and a second semiconductor layer formed on said electron blocking layer and having a second conductivity type which is opposite to said first conductivity type, characterized in that said embedded portion has embedded well portions (IW(n)) corresponding to said well layers (W(n)) respectively and embedded barrier portions (iB(n)) corresponding to said barrier layers (B(n)) respectively, each of said embedded well portions (IW(n)) and said embedded barrier portions (IB(n)) is configured such that, with respect to each IW, IW) of said embedded well portions (IW(n)) and each (IB, IB) of said embedded barrier portions (IB(n)) which are situated adjacent to each other, a second apex angle (y1,y2) of an apex (PW, PW) of said each of said embedded well portions (IW(n)) is smaller than a first apex angle (x1, x2) of an apex (PB, PB) of said each of said embedded barrier portions (IB(n)) wherein said each of said embedded well portions (IW(n)) is subsequently formed on said each of said embedded barrier portions (IB(n)), said embedded well portions (IW(n)) are configured so as to have apex angles which are gradually increased respectively as the embedded well portions (IW(n)) approach said second semiconductor layer, said embedded barrier portions (IB(n)) are configured so as to have apex angles which are gradually increased respectively as the embedded barrier portions (IB(n)) approach said second semiconductor layer, so that said embedded portion has a recess portion placed on an upper interface with said electron blocking layer above said pyramidal pit, said recess portion has an apex placed at a position existing in a layered direction of said active layer within said active layer, the depth of the apex of said recess with regard to the interface between the active layer and the electron blocking layer outside the embedded portion exceeding the well layer (W(n)) the nearest to said electron blocking layer outside the embedded portion.