A apparatus for a system-on-a-chip platform, the apparatus comprising: a cryptographic circuit including: one cryptographic engine selected from a plurality of cryptographic engines; and one standard interface that is generic to the plurality of cryptographic engines, wherein, in operation, an unencrypted message from an initiator component received by a system-on-a-chip interconnect interface is provided to the cryptographic engine via the standard interface to produce an encrypted message that is transmitted to a destination component, wherein the standard interface is a messaging bus in which requests to specific cryptographic engines are transmitted and translated into a specific hardware interface of the cryptographic engine and wherein the standard interface is configured to perform such translation for each cryptographic engine of the plurality of cryptographic engines, thereby making the cryptographic engine available to an interconnect fabric of the system-on-a-chip platform independently of which cryptographic engine from the plurality of cryptographic engines is selected; a cryptographic controller to manage a cryptographic key used by the cryptographic engine to create the encrypted message; and a cryptographic state manager to manage cryptographic session states of a cryptographic session between the initiator component and the destination component. a cryptographic circuit including: one cryptographic engine selected from a plurality of cryptographic engines; and one standard interface that is generic to the plurality of cryptographic engines, wherein, in operation, an unencrypted message from an initiator component received by a system-on-a-chip interconnect interface is provided to the cryptographic engine via the standard interface to produce an encrypted message that is transmitted to a destination component, wherein the standard interface is a messaging bus in which requests to specific cryptographic engines are transmitted and translated into a specific hardware interface of the cryptographic engine and wherein the standard interface is configured to perform such translation for each cryptographic engine of the plurality of cryptographic engines, thereby making the cryptographic engine available to an interconnect fabric of the system-on-a-chip platform independently of which cryptographic engine from the plurality of cryptographic engines is selected; one cryptographic engine selected from a plurality of cryptographic engines; and one standard interface that is generic to the plurality of cryptographic engines, wherein, in operation, an unencrypted message from an initiator component received by a system-on-a-chip interconnect interface is provided to the cryptographic engine via the standard interface to produce an encrypted message that is transmitted to a destination component, wherein the standard interface is a messaging bus in which requests to specific cryptographic engines are transmitted and translated into a specific hardware interface of the cryptographic engine and wherein the standard interface is configured to perform such translation for each cryptographic engine of the plurality of cryptographic engines, thereby making the cryptographic engine available to an interconnect fabric of the system-on-a-chip platform independently of which cryptographic engine from the plurality of cryptographic engines is selected; a cryptographic controller to manage a cryptographic key used by the cryptographic engine to create the encrypted message; and a cryptographic state manager to manage cryptographic session states of a cryptographic session between the initiator component and the destination component.