A display device (100a, 100b, 100c, 100d, 100e, 100f, 100g) comprising: a substrate comprising emission areas (EA1, EA2, EA3) for displaying images, and a non-emission area between the emission areas (EA1, EA2, EA3); anode electrodes above the substrate and respectively in the emission areas (EA1, EA2, EA3); a bank buffer layer above the substrate in the non-emission area and covering edges of the anode electrodes; a pixel-defining layer; a second multi-layer above the pixel-defining layer, comprising a stack of two or more different metal materials (1341, 1342, 1343), and comprising an undercut structure (UC_134); a spacer above the second multi-layer; first common layers above the anode electrodes, respectively; emissive layers above the first common layers, respectively; a second common layer in the emission areas (EA1, EA2, EA3) and the non-emission area and covering the emissive layers, the pixel-defining layer, and the spacer; and a cathode electrode above the second common layer and in the emission areas (EA1, EA2, EA3), wherein the first common layers comprise a hole transport layer, wherein the second common layer comprises an electron transport layer; characterized in that a first multi-layer is provided above the bank buffer layer, wherein the first multi-layer comprises a stack of two or more different metal materials (1321, 1322, 1323) and an undercut structure (UC_132), wherein the pixel-defining layer is disposed on the first multi-layer; wherein the first multi-layer comprises a first main layer comprising a metal material, and a first cover layer above the first main layer and comprising a metal material that is different from the metal material of the first main layer, and wherein the undercut structure (UC_132) of the first multi-layer is formed by the first cover layer having an edge extending past the first main layer. a substrate comprising emission areas (EA1, EA2, EA3) for displaying images, and a non-emission area between the emission areas (EA1, EA2, EA3); anode electrodes above the substrate and respectively in the emission areas (EA1, EA2, EA3); a bank buffer layer above the substrate in the non-emission area and covering edges of the anode electrodes; a pixel-defining layer; a second multi-layer above the pixel-defining layer, comprising a stack of two or more different metal materials (1341, 1342, 1343), and comprising an undercut structure (UC_134); a spacer above the second multi-layer; first common layers above the anode electrodes, respectively; emissive layers above the first common layers, respectively; a second common layer in the emission areas (EA1, EA2, EA3) and the non-emission area and covering the emissive layers, the pixel-defining layer, and the spacer; and a cathode electrode above the second common layer and in the emission areas (EA1, EA2, EA3), wherein the first common layers comprise a hole transport layer, wherein the second common layer comprises an electron transport layer; characterized in that a first multi-layer is provided above the bank buffer layer, wherein the first multi-layer comprises a stack of two or more different metal materials (1321, 1322, 1323) and an undercut structure (UC_132), wherein the pixel-defining layer is disposed on the first multi-layer; wherein the first multi-layer comprises a first main layer comprising a metal material, and a first cover layer above the first main layer and comprising a metal material that is different from the metal material of the first main layer, and wherein the undercut structure (UC_132) of the first multi-layer is formed by the first cover layer having an edge extending past the first main layer.