A fiber-optic Sagnac interferometer comprising a light source, a polarizer, a fiber coil, a photodetector device, an amplifier comprising an analog/digital converter connected downstream, a digital/analog converter, an evaluation circuit comprising an adder and a first multiplier, and a phase modulator, wherein two light beams, which originate from the light source, which are polarized by the polarizer and which are created by means of a beam splitting can be irradiated into the fiber coil in opposite directions and can be recombined subsequently and the two light beams can be modulated by means of the phase modulator, which is arranged in the fiber coil, the interference signal, which is created from the recombination of the light beams, can be applied to the photodetector device, wherein a signal, which corresponds to the light intensity of the interference signal and which can be applied to the amplifier comprising the analog/digital converter connected downstream, the output signals of which can be processed in the evaluation circuit, can be supplied by means of the photodetector device, and wherein a digital phase resetting signal can be created with the help of a main control circuit of the evaluation circuit and can be supplied to the digital/analog converter for obtaining a resetting signal, which acts on the phase modulator, characterized in that the output of the analog/digital converter and thus the output signals, which are processed in the main control circuit, as well as the phase resetting signal, encompass a first word width: the input of the digital/analog converter and thus the resetting signal, which acts on the phase modulator, encompasses a second word width, which is smaller than the word width, with which the modulation and resetting signal are computed in the digital part of the main control circuit, wherein the evaluation circuit is formed such that a residual value signal comprising a third word width can be created, which can be added to the output signal of the analog/digital converter via the adder, so that the signal output of the adder can be processed in the main control circuit, wherein this third word width corresponds to the number of the surplus, low-value bits, which are computed in the evaluation circuit, but which cannot be applied to the digital/analog converter, because it encompasses the smaller second word width; the evaluation circuit, the analog/digital converter and the digital/analog converter operate in work cycles, which are predetermined and synchronized by means of a clock-pulse generator, the evaluation circuit encompasses a residual value difference computation section (6, 7) for computing a residual value difference between the residual value signal of a first work cycle and the residual value signal of a further work cycle, and the first multiplier multiplies the residual value difference with an algebraic sign of the current modulation signal, which is created in the evaluation circuit. and this algebraic sign-corrected residual value difference serves as the residual value signal. the input of the digital/analog converter and thus the resetting signal, which acts on the phase modulator, encompasses a second word width, which is smaller than the word width, with which the modulation and resetting signal are computed in the digital part of the main control circuit, wherein the evaluation circuit is formed such that a residual value signal comprising a third word width can be created, which can be added to the output signal of the analog/digital converter via the adder, so that the signal output of the adder can be processed in the main control circuit, wherein this third word width corresponds to the number of the surplus, low-value bits, which are computed in the evaluation circuit, but which cannot be applied to the digital/analog converter, because it encompasses the smaller second word width; the evaluation circuit, the analog/digital converter and the digital/analog converter operate in work cycles, which are predetermined and synchronized by means of a clock-pulse generator, the evaluation circuit encompasses a residual value difference computation section (6, 7) for computing a residual value difference between the residual value signal of a first work cycle and the residual value signal of a further work cycle, and the first multiplier multiplies the residual value difference with an algebraic sign of the current modulation signal, which is created in the evaluation circuit. and this algebraic sign-corrected residual value difference serves as the residual value signal.