A method of manufacturing a semiconductor device, comprising: (a) preparing a substrate including a semiconductor base material, an insulating layer formed on the semiconductor base material, and a semiconductor layer formed on the insulating layer, wherein the substrate has an SOI region and a bulk region, wherein the SOI region is a region in which a first field effect transistor is to be formed, and wherein the bulk region has a first region in which a second field effect transistor is to be formed and a second region in which a third field effect transistor is to be formed; (b) after the (a), removing the semiconductor layer located in the bulk region of the substrate and the insulating layer located in the bulk region; (c) after the (b), forming an epitaxially grown layer by performing an epitaxial growth treatment on a surface of the semiconductor base material located in the first region of the bulk region; (d) after the (c), forming a first gate electrode on the semiconductor layer located in the SOI region of the substrate via a first gate insulating film, a second gate electrode on the epitaxially grown layer located in the first region of the bulk region via a second gate insulating film, and a third gate electrode on the semiconductor base material located in the second region (1 Bb) of the bulk region and on which the epitaxial growth treatment is not performed, via a third gate insulating film (IF3; IF5), respectively, wherein a thickness of the third gate insulating film (IF3; IF5) is larger than a thickness of each of the first gate insulating film and the second gate insulating film, and wherein each of the first gate electrode, the second gate electrode and the third gate electrode is made of a first material; (e) after the (d), forming an interlayer insulating film on the substrate so as to cover each of the first gate electrode, the second gate electrode and the third gate electrode; (f) after the (e), polishing the interlayer insulating film, and exposing each of the first gate electrode, the second gate electrode and the third gate electrode from the interlayer insulating film; and (g) after the (f), displacing the first material, that comprises each of the first gate electrode, the second gate electrode and the third gate electrode, to a second material, which is different from the first material. (a) preparing a substrate including a semiconductor base material, an insulating layer formed on the semiconductor base material, and a semiconductor layer formed on the insulating layer, wherein the substrate has an SOI region and a bulk region, wherein the SOI region is a region in which a first field effect transistor is to be formed, and wherein the bulk region has a first region in which a second field effect transistor is to be formed and a second region in which a third field effect transistor is to be formed; wherein the substrate has an SOI region and a bulk region, wherein the SOI region is a region in which a first field effect transistor is to be formed, and wherein the bulk region has a first region in which a second field effect transistor is to be formed and a second region in which a third field effect transistor is to be formed; (b) after the (a), removing the semiconductor layer located in the bulk region of the substrate and the insulating layer located in the bulk region; (c) after the (b), forming an epitaxially grown layer by performing an epitaxial growth treatment on a surface of the semiconductor base material located in the first region of the bulk region; (d) after the (c), forming a first gate electrode on the semiconductor layer located in the SOI region of the substrate via a first gate insulating film, a second gate electrode on the epitaxially grown layer located in the first region of the bulk region via a second gate insulating film, and a third gate electrode on the semiconductor base material located in the second region (1 Bb) of the bulk region and on which the epitaxial growth treatment is not performed, via a third gate insulating film (IF3; IF5), respectively, wherein a thickness of the third gate insulating film (IF3; IF5) is larger than a thickness of each of the first gate insulating film and the second gate insulating film, and wherein each of the first gate electrode, the second gate electrode and the third gate electrode is made of a first material; wherein a thickness of the third gate insulating film (IF3; IF5) is larger than a thickness of each of the first gate insulating film and the second gate insulating film, and wherein each of the first gate electrode, the second gate electrode and the third gate electrode is made of a first material; (e) after the (d), forming an interlayer insulating film on the substrate so as to cover each of the first gate electrode, the second gate electrode and the third gate electrode; (f) after the (e), polishing the interlayer insulating film, and exposing each of the first gate electrode, the second gate electrode and the third gate electrode from the interlayer insulating film; and (g) after the (f), displacing the first material, that comprises each of the first gate electrode, the second gate electrode and the third gate electrode, to a second material, which is different from the first material.