A processor within a computer system (602A, 602B, 602C), comprising: a decoder, configured to decode a first instruction that instructs the processor to perform first subsequent computations in an approximate manner on data in order to render pixels on a display (606A, 606B, 606C) of the computer system (602A, 602B, 602C); and a functional unit, configured to perform the first subsequent computations in the approximate manner on the data in response to the first instruction, wherein the processor determines an approximation policy according to a display resolution of the display (606A, 606B, 606C), wherein the functional unit performs the first subsequent computations in the approximate manner on the data according to the approximation policy, wherein the decoder is further configured to decode a second instruction that instructs the processor to perform second subsequent computations with a full degree of accuracy on the data in order to render pixels on the display (606A, 606B, 606C); and wherein the functional unit is configured to perform the second subsequent computations with the full degree of accuracy on the data in response to the second instruction, wherein in an approximating mode, the functional unit utilizes a logic circuit to perform the first subsequent computations in the approximate manner on the data, wherein in a full accuracy mode, the functional unit utilizes the logic circuit to perform the second subsequent computations with the full degree of accuracy on the data, and wherein the approximation policy specifies an approximation amount of the first subsequent computations in the approximate manner, and the approximation amount of the first subsequent computations in the approximate manner is varied based on variation in the display resolution of the display (606A, 606B, 606C) of the computer system (602A, 602B, 602C). a decoder, configured to decode a first instruction that instructs the processor to perform first subsequent computations in an approximate manner on data in order to render pixels on a display (606A, 606B, 606C) of the computer system (602A, 602B, 602C); and a functional unit, configured to perform the first subsequent computations in the approximate manner on the data in response to the first instruction, wherein the processor determines an approximation policy according to a display resolution of the display (606A, 606B, 606C), wherein the functional unit performs the first subsequent computations in the approximate manner on the data according to the approximation policy, wherein the decoder is further configured to decode a second instruction that instructs the processor to perform second subsequent computations with a full degree of accuracy on the data in order to render pixels on the display (606A, 606B, 606C); and wherein the functional unit is configured to perform the second subsequent computations with the full degree of accuracy on the data in response to the second instruction, wherein in an approximating mode, the functional unit utilizes a logic circuit to perform the first subsequent computations in the approximate manner on the data, wherein in a full accuracy mode, the functional unit utilizes the logic circuit to perform the second subsequent computations with the full degree of accuracy on the data, and wherein the approximation policy specifies an approximation amount of the first subsequent computations in the approximate manner, and the approximation amount of the first subsequent computations in the approximate manner is varied based on variation in the display resolution of the display (606A, 606B, 606C) of the computer system (602A, 602B, 602C).