A platform conforming to a virtualization technology architecture, comprising: a processor having a plurality of registers; a plurality of virtual machines 'VM's (101, 103, 105, 107), to run on the processor, each VM (101, 103, 105, 107) to run in a guest operating system; and a virtual machine monitor 'VMM', to schedule and switch context among the plurality of VMs (101, 103, 105, 107); characterised by: each VM (101, 103, 105, 107) being associated with a virtual machine control structure 'VMCS', the VMCS having fields indicating trap events for processor instructions accessing respective sets of one or more said registers from among said plurality of registers; and a trap mechanism (203, 207, 209, 211) corresponding to each VM (101, 103, 105, 107) to exit from a running VM (101, 103, 105, 107) and transfer control to the VMM, responsive to the occurrence of a predetermined trap event in the VM (101, 103, 105, 107), the trap mechanism to set a field in the VM's VMCS indicating that the predetermined trap event has occurred in the VM (101, 103, 105, 107); wherein the VMM is to determine which one or more of the plurality of respective sets of one or more said registers is to be saved and restored upon context switching among the plurality of VMs (101, 103, 105, 107), the determination being based on the trap event fields in the VM's VMCS. a processor having a plurality of registers; a plurality of virtual machines 'VM's (101, 103, 105, 107), to run on the processor, each VM (101, 103, 105, 107) to run in a guest operating system; and a virtual machine monitor 'VMM', to schedule and switch context among the plurality of VMs (101, 103, 105, 107); characterised by: each VM (101, 103, 105, 107) being associated with a virtual machine control structure 'VMCS', the VMCS having fields indicating trap events for processor instructions accessing respective sets of one or more said registers from among said plurality of registers; and a trap mechanism (203, 207, 209, 211) corresponding to each VM (101, 103, 105, 107) to exit from a running VM (101, 103, 105, 107) and transfer control to the VMM, responsive to the occurrence of a predetermined trap event in the VM (101, 103, 105, 107), the trap mechanism to set a field in the VM's VMCS indicating that the predetermined trap event has occurred in the VM (101, 103, 105, 107); wherein the VMM is to determine which one or more of the plurality of respective sets of one or more said registers is to be saved and restored upon context switching among the plurality of VMs (101, 103, 105, 107), the determination being based on the trap event fields in the VM's VMCS. each VM (101, 103, 105, 107) being associated with a virtual machine control structure 'VMCS', the VMCS having fields indicating trap events for processor instructions accessing respective sets of one or more said registers from among said plurality of registers; and a trap mechanism (203, 207, 209, 211) corresponding to each VM (101, 103, 105, 107) to exit from a running VM (101, 103, 105, 107) and transfer control to the VMM, responsive to the occurrence of a predetermined trap event in the VM (101, 103, 105, 107), the trap mechanism to set a field in the VM's VMCS indicating that the predetermined trap event has occurred in the VM (101, 103, 105, 107); wherein the VMM is to determine which one or more of the plurality of respective sets of one or more said registers is to be saved and restored upon context switching among the plurality of VMs (101, 103, 105, 107), the determination being based on the trap event fields in the VM's VMCS.