A method for light-to-digital conversion comprising the steps of: - setting an integrator circuit into a reference condition, - starting to integrate charge from a sensor device for the duration of an integration time (Atime) using the integrator circuit, - generating an integration signal (OPOUT) indicative of the integrated charge, - comparing the integration signal (OPOUT) with an adjustable reference signal (Vref), - incrementing - a first count when the comparison indicates that the integration signal (OPOUT) has reached the upper threshold of an integration range (Vdiff), wherein the integration range (Vdiff) is defined by a low and a high voltage (VL, VH), with the high voltage being the upper threshold, - incrementing a second count when the comparison indicates that the integration signal (OPOUT) has reached the adjustable reference signal (Vref), - incrementing the adjustable reference signal (Vref) in discrete steps when a second count has been generated, - resetting the integrator circuit into the reference condition, when the first count is incremented, - collecting and storing the generated first count as first count signal (CT_LOUT) and the generated second count as second count signal (CT_COUT); characterized by: - determining an initial partial integration time (Te) and an intermediate partial integration time (Tc) using a clock signal, wherein - an initial partial integration time (Te) is defined as a time interval within which the second count is incremented for the first time after starting to integrate charge from a photo sensor device or resetting the time integrator circuit into the reference condition, and - an intermediate partial integration time (Tc) is defined as a time interval within which the second count is further incremented after the initial partial integration time (Te) and before resetting the time integrator circuit into the reference condition, and generating a digital output signal (ADC-OUT), wherein - the digital output signal (ADC_OUT) is determined by the following equation: ADC − OUT = 2 n − 1 ⋅ CT LOUT + CT COUT + ∑ Te CT LOUT Tc, wherein ADC-OUT, CT LOUT, CT COUT, Te, and Tc denote the digital output signal, the first count signal, the second count signal, the initial partial integration time and the intermediate partial integration time, respectively. - setting an integrator circuit into a reference condition, - starting to integrate charge from a sensor device for the duration of an integration time (Atime) using the integrator circuit, - generating an integration signal (OPOUT) indicative of the integrated charge, - comparing the integration signal (OPOUT) with an adjustable reference signal (Vref), - incrementing - a first count when the comparison indicates that the integration signal (OPOUT) has reached the upper threshold of an integration range (Vdiff), wherein the integration range (Vdiff) is defined by a low and a high voltage (VL, VH), with the high voltage being the upper threshold, - incrementing a second count when the comparison indicates that the integration signal (OPOUT) has reached the adjustable reference signal (Vref), - incrementing the adjustable reference signal (Vref) in discrete steps when a second count has been generated, - resetting the integrator circuit into the reference condition, when the first count is incremented, - collecting and storing the generated first count as first count signal (CT_LOUT) and the generated second count as second count signal (CT_COUT); - determining an initial partial integration time (Te) and an intermediate partial integration time (Tc) using a clock signal, wherein - an initial partial integration time (Te) is defined as a time interval within which the second count is incremented for the first time after starting to integrate charge from a photo sensor device or resetting the time integrator circuit into the reference condition, and - an intermediate partial integration time (Tc) is defined as a time interval within which the second count is further incremented after the initial partial integration time (Te) and before resetting the time integrator circuit into the reference condition, and - the digital output signal (ADC_OUT) is determined by the following equation: ADC − OUT = 2 n − 1 ⋅ CT LOUT + CT COUT + ∑ Te CT LOUT Tc,