An integrated circuit board, comprising: an input port, connected with a plurality of image sensor boards and configured for receiving first image signals acquired by an image sensor mounted on each of the plurality of image sensor boards; a processor, connected with the input port and configured for performing stitching and encoding processing on the image signals by using an image stitching component and an image encoding component; and an output port, connected with the processor and configured for outputting image signals subjected to the stitching and encoding processing; wherein the image stitching component is configured for outputting second image signals, which are obtained by performing stitching processing on the first image signals, to an image encoding component; - wherein the image encoding component is connected with the image stitching component and configured for outputting third image signals which are obtained by performing encoding processing on the second image signals; - wherein the image encoding component is further configured for sending a control signal to the image stitching component and/or reading a current operation state of the image stitching component via serial peripheral interfaces, wherein the control signal is used for controlling or instructing the image stitching component to perform stitching processing on the first image signals; and wherein the image stitching component is configured for outputting the second image signals to the image encoding component via at least one pair of differential clock signal lines and twelve pairs of differential data signal lines; the twelve pairs of differential data signals derive from 16 differential data signals acquired by 4 image sensors mounted on said plurality of image sensor boards, and the at least one pair of differential clock signals derives from 4 pairs of clock signals of the 4 image sensors. an input port, connected with a plurality of image sensor boards and configured for receiving first image signals acquired by an image sensor mounted on each of the plurality of image sensor boards; a processor, connected with the input port and configured for performing stitching and encoding processing on the image signals by using an image stitching component and an image encoding component; and an output port, connected with the processor and configured for outputting image signals subjected to the stitching and encoding processing; wherein the image stitching component is configured for outputting second image signals, which are obtained by performing stitching processing on the first image signals, to an image encoding component; - wherein the image encoding component is connected with the image stitching component and configured for outputting third image signals which are obtained by performing encoding processing on the second image signals; - wherein the image encoding component is further configured for sending a control signal to the image stitching component and/or reading a current operation state of the image stitching component via serial peripheral interfaces, - wherein the image encoding component is connected with the image stitching component and configured for outputting third image signals which are obtained by performing encoding processing on the second image signals; - wherein the image encoding component is further configured for sending a control signal to the image stitching component and/or reading a current operation state of the image stitching component via serial peripheral interfaces, wherein the control signal is used for controlling or instructing the image stitching component to perform stitching processing on the first image signals; and wherein the image stitching component is configured for outputting the second image signals to the image encoding component via at least one pair of differential clock signal lines and twelve pairs of differential data signal lines; the twelve pairs of differential data signals derive from 16 differential data signals acquired by 4 image sensors mounted on said plurality of image sensor boards, and the at least one pair of differential clock signals derives from 4 pairs of clock signals of the 4 image sensors.