A radio frequency to direct current, RF-to-DC, converter, comprising: a positive RF input (RF+); a negative RF input (RF-); an output storage capacitor; a fully cross-coupled rectification circuit coupled to the positive RF input (RF+) the negative RF input (RF-), and the output storage capacitor, wherein the fully cross-coupled rectification circuit includes first and second NMOS transistors and first and second PMOS transistors; and a feedback circuit, characterized by a first capacitor connected, via a first common node, to the positive RF input (RF+) and to a second common node, a second capacitor connected, via a third common node, to the negative RF input (RF-) and to a fourth common node, a third capacitor connected, via the first common node, to the positive RF input (RF+) and to a fifth common node, and a fourth capacitor connected, via the third common node, to the negative RF input (RF-) and to a sixth common node, a gate of the first NMOS transistor is connected to the fourth common node, a source of the first NMOS transistor is connected to the second common node, and a drain of the first NMOS transistor is connected to a seventh common node, a gate of the second NMOS transistor is connected to the second common node, a source of the second NMOS transistor is connected to the fourth common node, and a drain of the second NMOS transistor is connected to the seventh common node, a gate of the first PMOS transistor is connected to the sixth common node, a source of the first PMOS transistor is connected to the second common node, and a drain of the first PMOS transistor is connected to an eighth common node, a gate of the second PMOS transistor is connected to the fifth common node, a source of the second PMOS transistor is connected to the fourth common node, and a drain of the second PMOS transistor is connected to the eighth common node, the feedback circuit is connected to the fifth, sixth, and eighth common nodes, the output storage capacitor is connected between the seventh and eighth common nodes, the feedback circuit comprises: a first resistor connected between the sixth and eighth common nodes; and a second resistor connected between the fifth and eighth common nodes. a positive RF input (RF+); a negative RF input (RF-); an output storage capacitor; a fully cross-coupled rectification circuit coupled to the positive RF input (RF+) the negative RF input (RF-), and the output storage capacitor, wherein the fully cross-coupled rectification circuit includes first and second NMOS transistors and first and second PMOS transistors; and a feedback circuit, characterized by a first capacitor connected, via a first common node, to the positive RF input (RF+) and to a second common node, a second capacitor connected, via a third common node, to the negative RF input (RF-) and to a fourth common node, a third capacitor connected, via the first common node, to the positive RF input (RF+) and to a fifth common node, and a fourth capacitor connected, via the third common node, to the negative RF input (RF-) and to a sixth common node, a gate of the first NMOS transistor is connected to the fourth common node, a source of the first NMOS transistor is connected to the second common node, and a drain of the first NMOS transistor is connected to a seventh common node, a gate of the second NMOS transistor is connected to the second common node, a source of the second NMOS transistor is connected to the fourth common node, and a drain of the second NMOS transistor is connected to the seventh common node, a gate of the first PMOS transistor is connected to the sixth common node, a source of the first PMOS transistor is connected to the second common node, and a drain of the first PMOS transistor is connected to an eighth common node, a gate of the second PMOS transistor is connected to the fifth common node, a source of the second PMOS transistor is connected to the fourth common node, and a drain of the second PMOS transistor is connected to the eighth common node, the feedback circuit is connected to the fifth, sixth, and eighth common nodes, the output storage capacitor is connected between the seventh and eighth common nodes, the feedback circuit comprises: a first resistor connected between the sixth and eighth common nodes; and a second resistor connected between the fifth and eighth common nodes. a first resistor connected between the sixth and eighth common nodes; and a second resistor connected between the fifth and eighth common nodes.