A processor comprising: a plurality of registers (110, 114) that are operative to store packed data; a decode unit operative to decode an adjoining data element pairwise swap instruction, the adjoining data element pairwise swap instruction to indicate a source packed data that is to include a plurality of pairs of adjoining data elements, and to indicate a destination storage location; and an execution unit coupled with the plurality of packed data registers (110, 114) and the decode unit, the execution unit operative, in response to the adjoining data element pairwise swap instruction, to store a result packed data in the destination storage location, the result packed data to include a plurality of pairs of adjoining data elements, each pair of adjoining data elements of the result packed data to correspond to a different pair of adjoining data elements of the source packed data, the adjoining data elements in each pair of adjoining data elements of the result packed data to have been swapped in position relative to the adjoining data elements in each corresponding pair of adjoining data elements of the source packed data; wherein the decode unit is to decode the instruction that is to indicate a source packed data operation mask, comprising a plurality of mask elements; wherein the execution unit, in response to the instruction, is to store the result packed data that is to include an additional pair of adjoining data elements, which is to correspond to an additional pair of adjoining data elements of the source packed data, and which is to correspond to at least one masked-out mask element of the source packed data operation mask, and in which in which the adjoining data elements in the additional pair of the result packed data are not to have been swapped in position relative to the adjoining data elements in the corresponding additional pair of adjoining data elements; characterized in that each mask element is to comprise a single mask element that is to correspond to both data elements of a respective pair of adjoining data elements of the result packed data. a plurality of registers (110, 114) that are operative to store packed data; a decode unit operative to decode an adjoining data element pairwise swap instruction, the adjoining data element pairwise swap instruction to indicate a source packed data that is to include a plurality of pairs of adjoining data elements, and to indicate a destination storage location; and an execution unit coupled with the plurality of packed data registers (110, 114) and the decode unit, the execution unit operative, in response to the adjoining data element pairwise swap instruction, to store a result packed data in the destination storage location, the result packed data to include a plurality of pairs of adjoining data elements, each pair of adjoining data elements of the result packed data to correspond to a different pair of adjoining data elements of the source packed data, the adjoining data elements in each pair of adjoining data elements of the result packed data to have been swapped in position relative to the adjoining data elements in each corresponding pair of adjoining data elements of the source packed data; wherein the decode unit is to decode the instruction that is to indicate a source packed data operation mask, comprising a plurality of mask elements; wherein the execution unit, in response to the instruction, is to store the result packed data that is to include an additional pair of adjoining data elements, which is to correspond to an additional pair of adjoining data elements of the source packed data, and which is to correspond to at least one masked-out mask element of the source packed data operation mask, and in which in which the adjoining data elements in the additional pair of the result packed data are not to have been swapped in position relative to the adjoining data elements in the corresponding additional pair of adjoining data elements; characterized in that each mask element is to comprise a single mask element that is to correspond to both data elements of a respective pair of adjoining data elements of the result packed data.