An image display device comprising a plurality of gate buses (Gp∼G(p+1)), a plurality of source buses (Sq∼S(q+1)), transistors each of which for supplying a pixel electrode with a voltage from said source bus, a common electrode, and a corrected voltage supplying means for supplying said common electrode with a common electrode voltage (Vcom') which has been corrected by an amount (ΔVcom) of correction, wherein said corrected voltage supplying means comprising: a changing voltage generating means (3, 5) for generating a first changing voltage (Von) having changing voltage levels for setting said transistor to an on-state and a second changing voltage (Voff) having changing voltage levels for setting said transistor to an off-state, said changing voltage generating means (3, 5) operating so as to establish at least three supply modes including a first supply mode, a second supply mode and a third supply mode, said first supply mode in which said first changing voltage (Von) is supplied to a first number of ones of said plurality of gate buses (Gp∼G(p+1)) and said second changing voltage (Voff) is supplied to a second number of ones of said plurality of gate buses (Gp∼G(p+1)), said second supply mode in which said first changing voltage (Von) is supplied to a third number of ones of said plurality of gate buses (Gp∼G(p+1)) and said second changing voltage (Voff) is supplied to a fourth number of ones of said plurality of gate buses (Gp∼G(p+1)) or said first changing voltage (Von) is supplied to at least said third number of ones of said plurality of gate buses (Gp∼G(p+1)) and said second changing voltage (Voff) is not supplied to said plurality of gate buses (Gp∼G(p+1)), and said third supply mode in which said first changing voltage (Von) is supplied to a fifth number of ones of said plurality of gate buses (Gp∼G(p+1)) and said second changing voltage (Voff) is supplied to a sixth number of ones of said plurality of gate buses (Gp∼G(p+1)) or said first changing voltage (Von) is not supplied to said plurality of gate buses (Gp∼G(p+1)) and said second changing voltage (Voff) is supplied to at least said sixth number of ones of said plurality of gate buses (Gp∼G(p+1)); and a corrected voltage generating means for detecting a voltage on said common electrode each time each of said at least three modes is established, determining said amount of correction on the basis of amounts of change in said detected voltages, and supplying said common electrode with the common electrode voltage (Vcom') which has been corrected by the amount (ΔVcom) of correction. a changing voltage generating means (3, 5) for generating a first changing voltage (Von) having changing voltage levels for setting said transistor to an on-state and a second changing voltage (Voff) having changing voltage levels for setting said transistor to an off-state, said changing voltage generating means (3, 5) operating so as to establish at least three supply modes including a first supply mode, a second supply mode and a third supply mode, said first supply mode in which said first changing voltage (Von) is supplied to a first number of ones of said plurality of gate buses (Gp∼G(p+1)) and said second changing voltage (Voff) is supplied to a second number of ones of said plurality of gate buses (Gp∼G(p+1)), said second supply mode in which said first changing voltage (Von) is supplied to a third number of ones of said plurality of gate buses (Gp∼G(p+1)) and said second changing voltage (Voff) is supplied to a fourth number of ones of said plurality of gate buses (Gp∼G(p+1)) or said first changing voltage (Von) is supplied to at least said third number of ones of said plurality of gate buses (Gp∼G(p+1)) and said second changing voltage (Voff) is not supplied to said plurality of gate buses (Gp∼G(p+1)), and said third supply mode in which said first changing voltage (Von) is supplied to a fifth number of ones of said plurality of gate buses (Gp∼G(p+1)) and said second changing voltage (Voff) is supplied to a sixth number of ones of said plurality of gate buses (Gp∼G(p+1)) or said first changing voltage (Von) is not supplied to said plurality of gate buses (Gp∼G(p+1)) and said second changing voltage (Voff) is supplied to at least said sixth number of ones of said plurality of gate buses (Gp∼G(p+1)); and a corrected voltage generating means for detecting a voltage on said common electrode each time each of said at least three modes is established, determining said amount of correction on the basis of amounts of change in said detected voltages, and supplying said common electrode with the common electrode voltage (Vcom') which has been corrected by the amount (ΔVcom) of correction.