A method for wafer-level hermetic packaging of MEMS components comprising: • Providing a first substrate (2 or 50) having a MEMS component, conductive leads (6 or 46) of the MEMS component, anchors that keep some part of the MEMS component at a predefined offset from the surface of the substrate, and a sealing region that completely surrounds the MEMS component as well as the conductive leads (6 or 46), • A second substrate, which is an SOI substrate, comprising a first silicon layer, a second silicon layer, and a buried oxide layer sandwiched between the first silicon layer and second silicon layer, • Next, micromachining the second substrate so that one or more via openings are formed by masked through-etching of the second silicon layer until reaching the buried oxide layer, • Next, micromachining the second substrate so that the parts of the buried oxide layer, which are exposed through the via openings, are totally etched, • Next, micromachining the second substrate so that a sealing wall, a cavity, and a number of vertical feedthroughs are simultaneously formed by through-etching the first silicon layer until reaching the buried oxide layer, • Micromachining the second substrate so that metal pads are formed over the surfaces of the vertical feedthroughs that are exposed to the previously-formed via openings," • Bonding the sealing region of the first substrate (2 or 50) to the sealing wall of the second substrate in such a way that the MEMS component on the first substrate is encapsulated in a closed volume defined by the first substrate and the cavity of the second substrate, and simultaneously, bonding the conductive leads (6 or 46) of the first substrate to the corresponding vertical feedthroughs of the second substrate, • Providing a first substrate (2 or 50) having a MEMS component, conductive leads (6 or 46) of the MEMS component, anchors that keep some part of the MEMS component at a predefined offset from the surface of the substrate, and a sealing region that completely surrounds the MEMS component as well as the conductive leads (6 or 46), • A second substrate, which is an SOI substrate, comprising a first silicon layer, a second silicon layer, and a buried oxide layer sandwiched between the first silicon layer and second silicon layer, • Next, micromachining the second substrate so that one or more via openings are formed by masked through-etching of the second silicon layer until reaching the buried oxide layer, • Next, micromachining the second substrate so that the parts of the buried oxide layer, which are exposed through the via openings, are totally etched, • Next, micromachining the second substrate so that a sealing wall, a cavity, and a number of vertical feedthroughs are simultaneously formed by through-etching the first silicon layer until reaching the buried oxide layer, • Micromachining the second substrate so that metal pads are formed over the surfaces of the vertical feedthroughs that are exposed to the previously-formed via openings," • Bonding the sealing region of the first substrate (2 or 50) to the sealing wall of the second substrate in such a way that the MEMS component on the first substrate is encapsulated in a closed volume defined by the first substrate and the cavity of the second substrate, and simultaneously, bonding the conductive leads (6 or 46) of the first substrate to the corresponding vertical feedthroughs of the second substrate,