A method for operating a crystal oscillator of an integrated circuit, preferably a microcontroller, to generate a clock signal, said method comprising the steps of: monitoring operation and controlling oscillation amplitude of a crystal oscillator (110; 210) with a digital automatic gain control, AGC, circuit (120a, 130a; 260) coupled with the crystal oscillator (110; 210), the digital AGC circuit (120a, 130a) comprising a first loop including an oscillation detector (124; 224), wherein the oscillation detector (124; 224) comprises a counter receiving the clock signal from the crystal oscillator (110; 210) and counting a number of frequency cycles from the crystal oscillator, and setting an oscillation detection latch (122; 222) when the number of frequency cycles reaches a certain number of counts; and a second loop including an oscillation amplitude detector (134; 234) receiving an input signal of the crystal oscillator (110; 210) and controlling an up/down counter (126; 226); increasing gain of the crystal oscillator (110; 210) by overriding control of the up/down counter (126; 226) of the second loop through the oscillation detection latch (122; 222) to force the up/down counter (126; 226) to count up until oscillation therefrom is detected with the first loop, whereupon said first loop stops overriding control of the up/down counter (126; 226), and maintaining the oscillation at an amplitude between a high reference value (Vref_H) and a low reference value (Vref_L) with the second loop by controlling said up/down counter (126; 226) through said oscillation amplitude detector (134; 234); wherein a count value of the up/down counter (126; 226) controls a programmable current source (112;226) biasing a transconductance amplifier within the crystal oscillator. monitoring operation and controlling oscillation amplitude of a crystal oscillator (110; 210) with a digital automatic gain control, AGC, circuit (120a, 130a; 260) coupled with the crystal oscillator (110; 210), the digital AGC circuit (120a, 130a) comprising a first loop including an oscillation detector (124; 224), wherein the oscillation detector (124; 224) comprises a counter receiving the clock signal from the crystal oscillator (110; 210) and counting a number of frequency cycles from the crystal oscillator, and setting an oscillation detection latch (122; 222) when the number of frequency cycles reaches a certain number of counts; and a second loop including an oscillation amplitude detector (134; 234) receiving an input signal of the crystal oscillator (110; 210) and controlling an up/down counter (126; 226); increasing gain of the crystal oscillator (110; 210) by overriding control of the up/down counter (126; 226) of the second loop through the oscillation detection latch (122; 222) to force the up/down counter (126; 226) to count up until oscillation therefrom is detected with the first loop, whereupon said first loop stops overriding control of the up/down counter (126; 226), and maintaining the oscillation at an amplitude between a high reference value (Vref_H) and a low reference value (Vref_L) with the second loop by controlling said up/down counter (126; 226) through said oscillation amplitude detector (134; 234); wherein a count value of the up/down counter (126; 226) controls a programmable current source (112;226) biasing a transconductance amplifier within the crystal oscillator.