A switching control circuit for a DC-DC convertor comprising: a first drive circuit to generate a drive signal for a driving switching element which flows current through an inductor of the DC-DC convertor used for voltage conversion, the drive signal which drives the driving switching element to be in an on state and an off state; and a second drive circuit to generate a drive signal for a rectifying switching element to rectify current of the inductor during a period in which the driving switching element is turned off, wherein the first drive circuit is configured to output the drive signal in which the transition time from a high level to a low level is longer than the transition time from the low level to the high level, and to generated the drive signal such that a transition time of the drive signal in which the driving switching element shifts from the off state to the on state becomes longer than a transition time of the drive signal in which the driving switching element shifts from the on state to the off state, characterized in that the second drive circuit is configured to output the drive signal in which the transition time from a low level to a high level is longer than the transition time from the high level to the low level, and to generated the drive signal such that a transition time of the drive signal in which the rectifying switching element shifts from an off state to an on state becomes longer than a transition time of the drive signal in which the rectifying switching element shifts from the on state to the off state, and the first and second drive circuits (DRV1, DRV2) are composed of CMOS inverters, respectively, each of which includes a P-channel field-effect transistor and an N-channel field-effect transistor, the CMOS inverter as the first drive circuit being formed such that a current driving force of the P-channel field-effect transistor is larger than a current driving force of the N-channel field-effect transistor, and the CMOS inverter as the second drive circuit being formed such that a current driving force of the N-channel field-effect transistor is larger than a current driving force of the P-channel field-effect transistor. a first drive circuit to generate a drive signal for a driving switching element which flows current through an inductor of the DC-DC convertor used for voltage conversion, the drive signal which drives the driving switching element to be in an on state and an off state; and a second drive circuit to generate a drive signal for a rectifying switching element to rectify current of the inductor during a period in which the driving switching element is turned off, wherein the first drive circuit is configured to output the drive signal in which the transition time from a high level to a low level is longer than the transition time from the low level to the high level, and to generated the drive signal such that a transition time of the drive signal in which the driving switching element shifts from the off state to the on state becomes longer than a transition time of the drive signal in which the driving switching element shifts from the on state to the off state, characterized in that the second drive circuit is configured to output the drive signal in which the transition time from a low level to a high level is longer than the transition time from the high level to the low level, and to generated the drive signal such that a transition time of the drive signal in which the rectifying switching element shifts from an off state to an on state becomes longer than a transition time of the drive signal in which the rectifying switching element shifts from the on state to the off state, and the first and second drive circuits (DRV1, DRV2) are composed of CMOS inverters, respectively, each of which includes a P-channel field-effect transistor and an N-channel field-effect transistor, the CMOS inverter as the first drive circuit being formed such that a current driving force of the P-channel field-effect transistor is larger than a current driving force of the N-channel field-effect transistor, and the CMOS inverter as the second drive circuit being formed such that a current driving force of the N-channel field-effect transistor is larger than a current driving force of the P-channel field-effect transistor.