A method for forming a nonvolatile memory device using a semiconductor substrate, comprising: forming a charge storage layer overlying the semiconductor substrate; forming a layer of gate material overlying the charge storage layer to form a control gate electrode; forming a protective layer (18, 20) overlying the layer of gate material; forming first sidewall spacers on opposite sides of the control gate electrode and the protective layer; forming a select gate electrode adjacent to and electrically isolated from the control gate electrode by a corresponding one of the first sidewall spacers; implanting dopants into the semiconductor substrate adjacent the control gate electrode and the select gate electrode after forming the select gate electrode, the dopants forming a source (30, 43) and a drain (31, 36) in the semiconductor substrate on opposing sides of the control gate electrode and the select gate electrode, the protective layer preventing the dopants from penetrating into the control gate electrode; characterized in that the method comprises the steps of removing the protective layer (18, 20) overlying the layer of gate material so as to expose respective inner sidewalls of the first sidewall spacers; forming second sidewall spacers on the layer of gate material and on the respective inner sidewalls of the first sidewall spacers; and forming silicide regions (46, 44, 42, 48) in a top portion of the select gate electrode, of the layer of gate material, of the source and of the drain, the silicide regions (46, 44, 42, 48) forming electrical contacts to the select gate electrode, the control gate electrode, the source (30, 34) and the drain (31, 36). forming a charge storage layer overlying the semiconductor substrate; forming a layer of gate material overlying the charge storage layer to form a control gate electrode; forming a protective layer (18, 20) overlying the layer of gate material; forming first sidewall spacers on opposite sides of the control gate electrode and the protective layer; forming a select gate electrode adjacent to and electrically isolated from the control gate electrode by a corresponding one of the first sidewall spacers; implanting dopants into the semiconductor substrate adjacent the control gate electrode and the select gate electrode after forming the select gate electrode, the dopants forming a source (30, 43) and a drain (31, 36) in the semiconductor substrate on opposing sides of the control gate electrode and the select gate electrode, the protective layer preventing the dopants from penetrating into the control gate electrode; characterized in that the method comprises the steps of removing the protective layer (18, 20) overlying the layer of gate material so as to expose respective inner sidewalls of the first sidewall spacers; forming second sidewall spacers on the layer of gate material and on the respective inner sidewalls of the first sidewall spacers; and forming silicide regions (46, 44, 42, 48) in a top portion of the select gate electrode, of the layer of gate material, of the source and of the drain, the silicide regions (46, 44, 42, 48) forming electrical contacts to the select gate electrode, the control gate electrode, the source (30, 34) and the drain (31, 36).