A method comprising: performing, with one or more processors, a hardware-based atomic read-modify-write operation to maintain the state of a pipe, the hardware-based atomic read-modify-write operation modifying in a single memory transaction pipe state parameters that are indicative of a state of a pipe, the pipe corresponding to a first-in-first-out, FIFO,-organized data buffer for supporting inter-task communication, wherein the pipe state parameters comprise: a parameter that identifies how many packets are currently stored in the pipe; a parameter that identifies a packet entry that stores a starting packet for the pipe; a parameter that identifies how many uncommitted reservations are currently pending for placement into the pipe; and a parameter that identifies how many packet entries are currently reserved in the pipe for reading or writing; wherein performing, with the one or more processors, the hardware-based atomic read-modify-write operation comprises performing a non-interruptible set of operations, the non-interruptible set of operations comprising: an operation that reads values that correspond to the pipe state parameters from a memory subsystem, wherein the operation that reads values that correspond to the pipe state parameters from a memory subsystem comprises an operation that reads and returns data for three of the pipe state parameters in three consecutive registers within a quad register group of registers in the single memory transaction, the quad register group of registers comprising four registers; an operation that generates modified values for the pipe state parameters; and an operation that writes the modified values for the pipe state parameters to the memory subsystem as part of a single cache transaction and/or memory transaction. a parameter that identifies how many packets are currently stored in the pipe; a parameter that identifies a packet entry that stores a starting packet for the pipe; a parameter that identifies how many uncommitted reservations are currently pending for placement into the pipe; and a parameter that identifies how many packet entries are currently reserved in the pipe for reading or writing; wherein performing, with the one or more processors, the hardware-based atomic read-modify-write operation comprises performing a non-interruptible set of operations, the non-interruptible set of operations comprising: an operation that reads values that correspond to the pipe state parameters from a memory subsystem, wherein the operation that reads values that correspond to the pipe state parameters from a memory subsystem comprises an operation that reads and returns data for three of the pipe state parameters in three consecutive registers within a quad register group of registers in the single memory transaction, the quad register group of registers comprising four registers; an operation that generates modified values for the pipe state parameters; and an operation that writes the modified values for the pipe state parameters to the memory subsystem as part of a single cache transaction and/or memory transaction. an operation that reads values that correspond to the pipe state parameters from a memory subsystem, wherein the operation that reads values that correspond to the pipe state parameters from a memory subsystem comprises an operation that reads and returns data for three of the pipe state parameters in three consecutive registers within a quad register group of registers in the single memory transaction, the quad register group of registers comprising four registers; an operation that generates modified values for the pipe state parameters; and an operation that writes the modified values for the pipe state parameters to the memory subsystem as part of a single cache transaction and/or memory transaction.