A semiconductor apparatus containing a low potential reference circuit region and a high potential reference circuit region between which signals are transmitted, the semiconductor apparatus comprising: a high withstand voltage separating region, which is arranged between the low and high potential reference circuit regions (1, 2) so as to surround the high potential reference circuit region and being surrounded by the low potential reference circuit region, thereby separating the low and high potential reference circuit regions (1, 2), an outer wall trench and an inner wall trench filled with insulating material, respectively, wherein the inner wall trench is arranged between the high potential reference circuit region and the high withstand voltage separating region so as to surround the high potential reference circuit region and separate said high potential reference circuit region from the high withstand voltage separating region, and wherein the outer wall trench is arranged between the high withstand voltage separating region and the low potential reference circuit region so as to surround the high withstand voltage separating region and separated said high withstand voltage separating region from the low potential reference circuit region; the semiconductor apparatus further comprising: a relay semiconductor device (5, 6), formed in the high withstand voltage separating region, for transmitting a signal from one of the low and high potential reference circuit regions (1, 2) to the other of them; and an insulating partition arranged between the relay semiconductor device (5, 6) and one of the low and high potential reference circuit regions (1, 2) that is at the output one of the relay semiconductor device (5, 6), the insulating partition being filled with insulating material in a trench, wherein input wiring (5s, 6s) and output wiring (5d, 6d) of the relay semiconductor device (5,6) are wired to an input one and an output one of the low and high potential reference circuit regions (1, 2) bridging over the insulating partition. a high withstand voltage separating region, which is arranged between the low and high potential reference circuit regions (1, 2) so as to surround the high potential reference circuit region and being surrounded by the low potential reference circuit region, thereby separating the low and high potential reference circuit regions (1, 2), an outer wall trench and an inner wall trench filled with insulating material, respectively, wherein the inner wall trench is arranged between the high potential reference circuit region and the high withstand voltage separating region so as to surround the high potential reference circuit region and separate said high potential reference circuit region from the high withstand voltage separating region, and wherein the outer wall trench is arranged between the high withstand voltage separating region and the low potential reference circuit region so as to surround the high withstand voltage separating region and separated said high withstand voltage separating region from the low potential reference circuit region; a relay semiconductor device (5, 6), formed in the high withstand voltage separating region, for transmitting a signal from one of the low and high potential reference circuit regions (1, 2) to the other of them; and an insulating partition arranged between the relay semiconductor device (5, 6) and one of the low and high potential reference circuit regions (1, 2) that is at the output one of the relay semiconductor device (5, 6), the insulating partition being filled with insulating material in a trench, wherein input wiring (5s, 6s) and output wiring (5d, 6d) of the relay semiconductor device (5,6) are wired to an input one and an output one of the low and high potential reference circuit regions (1, 2) bridging over the insulating partition.