A transceiver comprising: a reception, Rx, radio frequency, RF, part configured to process a received signal; a transmission, Tx, RF part configured to process a transmitted signal; and a phase lock loop, PLL (230, 500), configured to provide a reception frequency to the reception RF part and provide a transmission frequency to the transmission RF part, wherein the PLL (230, 500) is controlled according to whether the reception RF part or the transmission RF part is on, wherein the PLL (230, 500) comprises a reception voltage controlled oscillator, VCO Rx, configured to generate the reception frequency; and a transmission VCO, VCO Tx, configured to generate the transmission frequency, wherein the PLL (230, 500) further comprises a single common control circuit connected to the VCO Rx and the VCO Tx, wherein the single common control circuit comprises a main charge pump, CP, configured to pump a predetermined amount of charges corresponding to a pulse width detected by a phase frequency detector, PFD, and a loop filter, LF, configured to vary a control voltage according to the predetermined amount of charges for the VCO Rx or the VCO Tx, wherein the PLL (230, 500) further comprises: a mismatch compensation device configured to independently control a magnitude of a source current applied to the main CP and a magnitude of a sink current applied to the main CP to compensate for a current mismatch generated in the main CP, wherein the mismatch compensation device comprises, a first tuning device configured to control a sink current of an auxiliary CP according to a result detected from a sensing capacitor and perform discrete tuning with respect to the current mismatch generated in the main CP by; and a second tuning device comprising a mismatch current mirror configured to compensate for the current mismatch based on a result of the discrete tuning, wherein the PLL further comprises a switch configured to interrupt the connection between said control voltage and said loop filter which is open during a coarse compensation performed by the first tuning device and closed during a fine compensation performed by the second tuning device. a reception, Rx, radio frequency, RF, part configured to process a received signal; a transmission, Tx, RF part configured to process a transmitted signal; and a phase lock loop, PLL (230, 500), configured to provide a reception frequency to the reception RF part and provide a transmission frequency to the transmission RF part, a mismatch compensation device configured to independently control a magnitude of a source current applied to the main CP and a magnitude of a sink current applied to the main CP to compensate for a current mismatch generated in the main CP, wherein the mismatch compensation device comprises, a first tuning device configured to control a sink current of an auxiliary CP according to a result detected from a sensing capacitor and perform discrete tuning with respect to the current mismatch generated in the main CP by; and a second tuning device comprising a mismatch current mirror configured to compensate for the current mismatch based on a result of the discrete tuning, wherein the PLL further comprises a switch configured to interrupt the connection between said control voltage and said loop filter which is open during a coarse compensation performed by the first tuning device and closed during a fine compensation performed by the second tuning device.