An apparatus for controlling a cache memory that stores therein data transferred from a main storing unit, the apparatus comprising: a computing processing unit arranged to execute a computing process using data; a queue unit that is provided on an input portion of the cache memory that inputs data from the main storing unit, and arranged to temporarily retain data of the main storing unit when the data requested by the computing processing unit is transferred from the main storing unit to the cache memory; a connecting line that is provided only around the cache memory to connect the input portion of the cache memory and an output portion of the cache memory that outputs data to the computing processing unit, and to bypass the cache memory; a control unit arranged to transfer data from the input portion to the output portion of the cache memory through the connecting line when the data requested by the computing processing unit is not stored in the cache memory and the requested data is transferred from the main storing unit to the cache memory; a transferring unit arranged to transfer data transferred by the control unit to the output portion of the cache memory, to the computing processing unit; and a pipeline processing unit for pipeline-processing instructions concerning transferring of data, the apparatus being characterized in that the control unit causes data to be output from the queue unit to be transferred to the output portion of the cache memory through the connecting line, and the pipeline processing unit makes, in both of an execution of a MOVE-IN instruction for transferring data from the main storing unit to the cache memory and a READ instruction for reading data from the cache memory, a number of cycles from when the MOVE-IN instruction is input to when data is transferred to the output portion of the cache memory through the connecting line, and a number of cycles from when the READ instruction is input to when data is actually output from the cache memory to the output portion of the cache memory, coincident. a computing processing unit arranged to execute a computing process using data; a queue unit that is provided on an input portion of the cache memory that inputs data from the main storing unit, and arranged to temporarily retain data of the main storing unit when the data requested by the computing processing unit is transferred from the main storing unit to the cache memory; a connecting line that is provided only around the cache memory to connect the input portion of the cache memory and an output portion of the cache memory that outputs data to the computing processing unit, and to bypass the cache memory; a control unit arranged to transfer data from the input portion to the output portion of the cache memory through the connecting line when the data requested by the computing processing unit is not stored in the cache memory and the requested data is transferred from the main storing unit to the cache memory; a transferring unit arranged to transfer data transferred by the control unit to the output portion of the cache memory, to the computing processing unit; and a pipeline processing unit for pipeline-processing instructions concerning transferring of data, the apparatus being characterized in that the control unit causes data to be output from the queue unit to be transferred to the output portion of the cache memory through the connecting line, and the pipeline processing unit makes, in both of an execution of a MOVE-IN instruction for transferring data from the main storing unit to the cache memory and a READ instruction for reading data from the cache memory, a number of cycles from when the MOVE-IN instruction is input to when data is transferred to the output portion of the cache memory through the connecting line, and a number of cycles from when the READ instruction is input to when data is actually output from the cache memory to the output portion of the cache memory, coincident.