A method of facilitating memory accesses in a computing environment by executing an instruction, responsive to fetching the instruction from a location determined by an absolute address of a page of memory, the method comprising the steps of: obtaining a first address to be used in a memory access by the instruction, said first address being an address of data and indirectly usable in the memory access, the data comprising an operand; determining whether address translation is to be omitted for the first address, wherein address translation includes at least one of a traversal of one or more data structures to locate therein a translated address for the first address or having the translated address in a translation cache that includes one or more translated addresses, by inquiring into whether the instruction is marked with a translation omission mark indicating that it is likely the instruction and the data are within a same unit of memory, and in response to the inquiring indicating that the translation omission mark is present, checking whether the operand to be accessed by the instruction is in the same unit of memory as the instruction, the checking comprising comparing a portion of an instruction address of the instruction with a portion of the first address of the operand, wherein responsive to the two compared portions being equal, the instruction and the operand are determined to be in the same unit of memory and therefore, address translation is to be omitted; in response to determining that address translation is to be omitted, generating, based on an absolute address of the instruction, a second address for the operand directly usable in the memory access, said second address corresponding to the first address and being unequal to the first address; and deciding whether access checking is to be omitted for the data to be accessed using the generated second address, wherein the deciding comprises inquiring into whether the instruction to access the data has present in the instruction an access check mark indicating that the access checking can be omitted, wherein access checking is omitted, in response to the inquiring indicating the access check mark is present in the instruction. obtaining a first address to be used in a memory access by the instruction, said first address being an address of data and indirectly usable in the memory access, the data comprising an operand; determining whether address translation is to be omitted for the first address, wherein address translation includes at least one of a traversal of one or more data structures to locate therein a translated address for the first address or having the translated address in a translation cache that includes one or more translated addresses, by inquiring into whether the instruction is marked with a translation omission mark indicating that it is likely the instruction and the data are within a same unit of memory, and in response to the inquiring indicating that the translation omission mark is present, checking whether the operand to be accessed by the instruction is in the same unit of memory as the instruction, the checking comprising comparing a portion of an instruction address of the instruction with a portion of the first address of the operand, wherein responsive to the two compared portions being equal, the instruction and the operand are determined to be in the same unit of memory and therefore, address translation is to be omitted; in response to determining that address translation is to be omitted, generating, based on an absolute address of the instruction, a second address for the operand directly usable in the memory access, said second address corresponding to the first address and being unequal to the first address; and deciding whether access checking is to be omitted for the data to be accessed using the generated second address, wherein the deciding comprises inquiring into whether the instruction to access the data has present in the instruction an access check mark indicating that the access checking can be omitted, wherein access checking is omitted, in response to the inquiring indicating the access check mark is present in the instruction.