A method for operating a shared bit line string architecture in a non-volatile storage system, comprising: determining that a memory cell is associated with a first string of a pair of strings, the pair of strings includes the first string and a second string, the first string includes a first select transistor with a first threshold voltage, the second string includes a second select transistor with a second threshold voltage different from the first threshold voltage, the first select transistor and the second select transistor are connected to a drain-side select line; setting a transistor into the conducting state, a first source/drain junction of the transistor being connected to the first string via the first select transistor and a second source/drain junction of the transistor being connected to the second string via the second select transistor; and performing an operation on the memory cell; the method characterised in that it further comprises: preparing the pair of strings for programming prior to setting the transistor into a conducting state, the preparing of the pair of strings for programming includes programming the transistor to a third threshold voltage, programming the first select transistor to the first threshold voltage, and programming the second select transistor to the second threshold voltage; and setting the drain-side select line to a voltage that is greater than the first threshold voltage and less than the second threshold voltage prior to the performing an operation on the memory cell. determining that a memory cell is associated with a first string of a pair of strings, the pair of strings includes the first string and a second string, the first string includes a first select transistor with a first threshold voltage, the second string includes a second select transistor with a second threshold voltage different from the first threshold voltage, the first select transistor and the second select transistor are connected to a drain-side select line; setting a transistor into the conducting state, a first source/drain junction of the transistor being connected to the first string via the first select transistor and a second source/drain junction of the transistor being connected to the second string via the second select transistor; and performing an operation on the memory cell; the method characterised in that it further comprises: preparing the pair of strings for programming prior to setting the transistor into a conducting state, the preparing of the pair of strings for programming includes programming the transistor to a third threshold voltage, programming the first select transistor to the first threshold voltage, and programming the second select transistor to the second threshold voltage; and setting the drain-side select line to a voltage that is greater than the first threshold voltage and less than the second threshold voltage prior to the performing an operation on the memory cell. preparing the pair of strings for programming prior to setting the transistor into a conducting state, the preparing of the pair of strings for programming includes programming the transistor to a third threshold voltage, programming the first select transistor to the first threshold voltage, and programming the second select transistor to the second threshold voltage; and setting the drain-side select line to a voltage that is greater than the first threshold voltage and less than the second threshold voltage prior to the performing an operation on the memory cell.