A method of controlling power delivered to a load by an AC/DC power converter including power factor correction and having a switched-mode power supply (SMPS) that includes a control switch, switchable between an ON and an OFF state and only conducting during said ON state, for controlling a drive current delivered to the load, the AC/DC power converter receiving a mains alternating-current voltage as an input, the mains AC voltage having a mains voltage cycle of an absolute voltage value varying in a cyclic manner over a cycle period having a first half-cycle period of increasing from a zero to a maximum followed by a second half-cycle period of decreasing from the maximum to a zero, the method comprising: receiving the mains AC voltage; rectifying the mains AC voltage to produce a direct-current voltage; producing an output voltage from the DC voltage; delivering the output voltage and the drive current to the load, the output voltage and drive current controlled by the control switch in the SMPS; generating a sequence of current control pulses within a timing window within each cycle period, each current control pulse causing the control switch to have said ON state, and each current control pulse having a respective duration characterized by at least one of (a) the timing window occurs once during the cycle period, the sequence of current control pulses is only generated within the timing window, and the middle point of the timing window occurs within the second half-cycle period, and (b) the window includes the entire cycle period and the T on of an nth current control pulse in the sequence of current control pulses within a cycle period is of a longer duration than the T on of a (n-1)th current control pulse in the sequence of current control pulses, wherein the nth current control pulse is generated after the (n-1)th current control pulse; such that a sum of the T on of all current control pulses within the second half-cycle period that is larger than a sum of the T on of all current control pulses within the first half-cycle period. receiving the mains AC voltage; rectifying the mains AC voltage to produce a direct-current voltage; producing an output voltage from the DC voltage; delivering the output voltage and the drive current to the load, the output voltage and drive current controlled by the control switch in the SMPS; delivering the output voltage and the drive current to the load, the output voltage and drive current controlled by the control switch in the SMPS; generating a sequence of current control pulses within a timing window within each cycle period, each current control pulse causing the control switch to have said ON state, and each current control pulse having a respective duration characterized by at least one of (a) the timing window occurs once during the cycle period, the sequence of current control pulses is only generated within the timing window, and the middle point of the timing window occurs within the second half-cycle period, and (b) the window includes the entire cycle period and the T on of an nth current control pulse in the sequence of current control pulses within a cycle period is of a longer duration than the T on of a (n-1)th current control pulse in the sequence of current control pulses, wherein the nth current control pulse is generated after the (n-1)th current control pulse; such that a sum of the T on of all current control pulses within the second half-cycle period that is larger than a sum of the T on of all current control pulses within the first half-cycle period. (a) the timing window occurs once during the cycle period, the sequence of current control pulses is only generated within the timing window, and the middle point of the timing window occurs within the second half-cycle period, and (b) the window includes the entire cycle period and the T on of an nth current control pulse in the sequence of current control pulses within a cycle period is of a longer duration than the T on of a (n-1)th current control pulse in the sequence of current control pulses,