A radiation imaging apparatus comprising: an imaging unit in which a plurality of pixels are arranged to form a plurality of rows and a plurality of columns, with each pixel including a conversion element (S mn) for converting radiation into charges and a transistor (T mn) having a gate, a source, and a drain with one of the source and the drain being connected to the conversion element and the other of the source and the drain being connected to a signal line; a driving unit configured to apply one of a conducting voltage for setting the transistor in a conductive state and a non-conducting voltage for setting the transistor in a non-conductive state, to the gate of the transistor; and a control unit configured to control said driving unit, wherein said control unit is configured to control said driving unit to perform a first operation of resetting each of the plurality of pixels by sequentially performing, for the plurality of rows, application of the conducting voltage to the gates of the transistors on at least one of the plurality of rows, to stop application of the conducting voltage in the first operation in response to irradiation of the radiation, to perform a second operation of accumulating electrical signals corresponding to the charges by performing, for the plurality of rows, application of the non-conducting voltage to the gate of the transistor in response to an end of application of the conducting voltage in the first operation, and to perform a third operation of reading out pixel signals corresponding to the amounts of accumulated charges by sequentially performing, for the plurality of rows, application of the conducting voltage to the gates of the transistors on at least one of the plurality of rows in response to an end of the second operation, characterized in that said control unit is configured to control said driving unit to make a time required for the first operation shorter than a time required for the third operation, and to make a time during which the conducting voltage is applied to each of the gates of the transistors in the first operation shorter than a time during which the conducting voltage is applied to each of the gates of the transistors in the third operation. an imaging unit in which a plurality of pixels are arranged to form a plurality of rows and a plurality of columns, with each pixel including a conversion element (S mn) for converting radiation into charges and a transistor (T mn) having a gate, a source, and a drain with one of the source and the drain being connected to the conversion element and the other of the source and the drain being connected to a signal line; a driving unit configured to apply one of a conducting voltage for setting the transistor in a conductive state and a non-conducting voltage for setting the transistor in a non-conductive state, to the gate of the transistor; and a control unit configured to control said driving unit, wherein said control unit is configured to control said driving unit to perform a first operation of resetting each of the plurality of pixels by sequentially performing, for the plurality of rows, application of the conducting voltage to the gates of the transistors on at least one of the plurality of rows, to stop application of the conducting voltage in the first operation in response to irradiation of the radiation, to perform a second operation of accumulating electrical signals corresponding to the charges by performing, for the plurality of rows, application of the non-conducting voltage to the gate of the transistor in response to an end of application of the conducting voltage in the first operation, and to perform a third operation of reading out pixel signals corresponding to the amounts of accumulated charges by sequentially performing, for the plurality of rows, application of the conducting voltage to the gates of the transistors on at least one of the plurality of rows in response to an end of the second operation, characterized in that said control unit is configured to control said driving unit to make a time required for the first operation shorter than a time required for the third operation, and to make a time during which the conducting voltage is applied to each of the gates of the transistors in the first operation shorter than a time during which the conducting voltage is applied to each of the gates of the transistors in the third operation.