A semiconductor processing device, comprising: a first chamber portion; and a second chamber portion movable relative to the first chamber portion between an open position and a closed position, wherein when the second chamber portion is in the closed position relative to the first chamber portion, a micro chamber is formed between the first chamber portion and the second chamber portion, one or more stacked semiconductor wafers can be accommodated in the micro chamber, and when the second chamber portion is in the open position relative to the first chamber portion, the semiconductor wafer can be transferred into or out of the micro chamber, wherein the first chamber portion comprises a first channel formed on an internal surface of the first chamber portion facing the micro chamber, and the second chamber portion comprises a second channel formed on an internal surface of the second chamber portion facing the micro chamber, wherein when the second chamber portion is in the closed position relative to the first chamber portion and the micro chamber accommodates the semiconductor wafer, the first channel and the second channel are connected and together form an edge micro-processing space, and an outer edge of the semiconductor wafer accommodated in the micro chamber extends into the edge micro-processing space, which is connected to outside via an edge processing through-hole, fluid flows in or out of the edge micro-processing space through the edge processing through-hole said second chamber portion comprises a recess formed on said internal surface of said second chamber portion facing said micro chamber, characterized in that, when said second chamber portion is in said closed position relative to said first chamber portion and said semiconductor wafer is housed in said micro chamber, said second side surface of said semiconductor wafer covers a top of said recess to form an internal micro-processing space located inside said outer edge micro-processing space, said semiconductor wafer serving as a barrier helping to close said outer edge micro-processing space.. a first chamber portion; and a second chamber portion movable relative to the first chamber portion between an open position and a closed position, wherein when the second chamber portion is in the closed position relative to the first chamber portion, a micro chamber is formed between the first chamber portion and the second chamber portion, one or more stacked semiconductor wafers can be accommodated in the micro chamber, and when the second chamber portion is in the open position relative to the first chamber portion, the semiconductor wafer can be transferred into or out of the micro chamber, wherein the first chamber portion comprises a first channel formed on an internal surface of the first chamber portion facing the micro chamber, and the second chamber portion comprises a second channel formed on an internal surface of the second chamber portion facing the micro chamber, wherein when the second chamber portion is in the closed position relative to the first chamber portion and the micro chamber accommodates the semiconductor wafer, the first channel and the second channel are connected and together form an edge micro-processing space, and an outer edge of the semiconductor wafer accommodated in the micro chamber extends into the edge micro-processing space, which is connected to outside via an edge processing through-hole, fluid flows in or out of the edge micro-processing space through the edge processing through-hole said second chamber portion comprises a recess formed on said internal surface of said second chamber portion facing said micro chamber, characterized in that, when said second chamber portion is in said closed position relative to said first chamber portion and said semiconductor wafer is housed in said micro chamber, said second side surface of said semiconductor wafer covers a top of said recess to form an internal micro-processing space located inside said outer edge micro-processing space, said semiconductor wafer serving as a barrier helping to close said outer edge micro-processing space..