An RF amplifier comprising: an input, an output, a parallel arrangement of a first branch and a second branch, each branch comprising a bipolar transistor (T1a', T1b') in a degenerative emitter configuration having a base coupled to the input by an AC coupling capacitor (C1a', C1b'), a collector coupled to a common collector node, and an emitter degeneration impedance (Z e a', Z e b') arranged between an emitter of the bipolar transistor (T1a', T1b') and a common rail; and a resonant circuit comprising a series arrangement of an inductance and capacitance coupled between the input and the common rail, wherein the common collector node is coupled to the output, the base of the bipolar transistor (T1a') of the first branch is biased at a first bias voltage and the base of the bipolar transistor of the second branch is biased at a bias voltage offset from the first bias voltage, and wherein the dimensions of the bipolar transistors (T1a', T1b') of the first and second branches (202a, 202b) and the values of the emitter degeneration impedances (Z e a, Z e b) are selected such that, in operation, a IM3 distortion current output by the bipolar transistor (T1a') of the first branch is in antiphase to a IM3 distortion current output by the bipolar transistor (T1b') of the second branch, wherein each branch (202a, 202b) comprises a respective bias circuit coupled to the base of the respective bipolar transistor (T1a', T1b'), the bias circuit comprising a NPN bipolar bias transistor (Tbias), a first resistance arranged between a supply voltage rail (Vsupply) and a collector of the bias transistor (Tbias), a second resistance arranged between the collector and a base of the bias transistor (Tbias) and a bias capacitance (Cbias) arranged between the base and a ground rail, the ground rail connected to an emitter of the bias transistor (Tbias). an input, an output, a parallel arrangement of a first branch and a second branch, each branch comprising a bipolar transistor (T1a', T1b') in a degenerative emitter configuration having a base coupled to the input by an AC coupling capacitor (C1a', C1b'), a collector coupled to a common collector node, and an emitter degeneration impedance (Z e a', Z e b') arranged between an emitter of the bipolar transistor (T1a', T1b') and a common rail; and a resonant circuit comprising a series arrangement of an inductance and capacitance coupled between the input and the common rail, wherein the common collector node is coupled to the output, the base of the bipolar transistor (T1a') of the first branch is biased at a first bias voltage and the base of the bipolar transistor of the second branch is biased at a bias voltage offset from the first bias voltage, and wherein the dimensions of the bipolar transistors (T1a', T1b') of the first and second branches (202a, 202b) and the values of the emitter degeneration impedances (Z e a, Z e b) are selected such that, in operation, a IM3 distortion current output by the bipolar transistor (T1a') of the first branch is in antiphase to a IM3 distortion current output by the bipolar transistor (T1b') of the second branch, wherein each branch (202a, 202b) comprises a respective bias circuit coupled to the base of the respective bipolar transistor (T1a', T1b'), the bias circuit comprising a NPN bipolar bias transistor (Tbias), a first resistance arranged between a supply voltage rail (Vsupply) and a collector of the bias transistor (Tbias), a second resistance arranged between the collector and a base of the bias transistor (Tbias) and a bias capacitance (Cbias) arranged between the base and a ground rail, the ground rail connected to an emitter of the bias transistor (Tbias).