A silicon carbide power device, wherein the silicon carbide power device is a vertical power MOSFET or an IGBT, comprising a silicon carbide wafer having a first main side and a second main side opposite to the first main side, the silicon carbide wafer comprising: a first channel region of a first conductivity type; a first source region of a second conductivity type different from the first conductivity type, wherein the first source region is arranged on a first lateral side of the first channel region in a first lateral direction parallel to the first main side; a drift layer of the second conductivity type, a first portion of the drift layer being arranged on a second lateral side of the first channel region, wherein the second lateral side is opposite to the first lateral side, and a second portion of the drift layer extending from the first portion towards the second main side; a first base layer of the first conductivity type separating the first source region from the drift layer; a second channel region of the first conductivity type, which is arranged on the second lateral side of the first channel region and which is laterally separated from the first channel region by the first portion of the drift layer; a second source region of the second conductivity type, wherein the second source region and the first portion of the drift layer are arranged on opposite lateral sides of the second channel region; and a second base layer of the first conductivity type separating the second source region from the drift layer, the silicon carbide power device further comprising a gate insulation layer arranged to extend on the first main side to overlap the first channel region, and the second channel region, wherein the gate insulation layer is directly on the first channel region and on the second channel region; a conductive gate layer directly on the gate insulation layer, so that the gate layer is separated from the first channel region and from the second channel region by the gate insulation layer; a first stressor arranged in the silicon carbide wafer at the first main side; and a second stressor arranged in the silicon carbide wafer at the first main side, characterized in that the first channel region, the first portion of the drift layer and the second channel region are laterally arranged between the first stressor and the second stressor in a second lateral direction parallel to the first main side and perpendicular to the first lateral direction, such that a stress is introduced by the first stressor and the second stressor in the first channel region and in the second channel region. a first channel region of a first conductivity type; a first source region of a second conductivity type different from the first conductivity type, wherein the first source region is arranged on a first lateral side of the first channel region in a first lateral direction parallel to the first main side; a drift layer of the second conductivity type, a first portion of the drift layer being arranged on a second lateral side of the first channel region, wherein the second lateral side is opposite to the first lateral side, and a second portion of the drift layer extending from the first portion towards the second main side; a first base layer of the first conductivity type separating the first source region from the drift layer; a second channel region of the first conductivity type, which is arranged on the second lateral side of the first channel region and which is laterally separated from the first channel region by the first portion of the drift layer; a second source region of the second conductivity type, wherein the second source region and the first portion of the drift layer are arranged on opposite lateral sides of the second channel region; and a second base layer of the first conductivity type separating the second source region from the drift layer, the silicon carbide power device further comprising a gate insulation layer arranged to extend on the first main side to overlap the first channel region, and the second channel region, wherein the gate insulation layer is directly on the first channel region and on the second channel region; a conductive gate layer directly on the gate insulation layer, so that the gate layer is separated from the first channel region and from the second channel region by the gate insulation layer; a first stressor arranged in the silicon carbide wafer at the first main side; and a second stressor arranged in the silicon carbide wafer at the first main side, characterized in that the first channel region, the first portion of the drift layer and the second channel region are laterally arranged between the first stressor and the second stressor in a second lateral direction parallel to the first main side and perpendicular to the first lateral direction, such that a stress is introduced by the first stressor and the second stressor in the first channel region and in the second channel region.