A method of programming and verifying a NAND Flash memory device which includes a plurality of memory cells and a plurality of word lines, the plurality of word lines (WL 1... WL N) being grouped in P word line subsets (SUB 1... SUB P), wherein each word line subset (SUB 1... SUB P) includes n adjacent word lines with n being a positive integer and n < N, N being an integer larger than 1, the method comprising a sequence of programming the word lines, comprising: sequentially programming a first word line subset (SUB i) including the steps of performing a first coarse programming on first memory cells among the plurality of memory cells, which are controlled by a plurality of consecutive first word lines of the first word line subset (SUB i), determining whether the first memory cells pass a coarse verification according to a first coarse verify current, and performing a first fine programming on the first memory cells after the first memory cells pass the first coarse verification; sequentially programming a second word line subset (SUB i+1) including the steps of performing a second coarse programming on second memory cells among the plurality of memory cells, which are controlled by a plurality of consecutive second word lines of a second word line subset (SUB i+1), determining whether the second memory cells pass a second coarse verification according to a second coarse verify current smaller than the first coarse verify current, and performing a second fine programming on the second memory cells after the second memory cells pass the second coarse verification; sequentially programming each further word line subset (SUB i+x) of the P word line subsets (SUB 1... SUB P) according to the same procedure until the word lines in the P-th word line subset are sequentially programmed, the value of each coarse verify current being adjusted according to the sequence of programming the word lines such that the coarse verify current (Isense i+1) associated with a word line subset (SUB i+1) programmed at a later time is set to a smaller value than the coarse verify current (Isense i) associated with a word line subset (SUB i) which has been programmed at an earlier time (I SENSE1 > I SENSEi+1 >... > I SENSEi+x...>I SENSEP). (SUB i) including the steps of performing a first coarse programming on first memory cells among the plurality of memory cells, which are controlled by a plurality of consecutive first word lines of the first word line subset (SUB i), determining whether the first memory cells pass a coarse verification according to a first coarse verify current, and performing a first fine programming on the first memory cells after the first memory cells pass the first coarse verification; sequentially programming a second word line subset (SUB i+1) including the steps of performing a second coarse programming on second memory cells among the plurality of memory cells, which are controlled by a plurality of consecutive second word lines of a second word line subset (SUB i+1), determining whether the second memory cells pass a second coarse verification according to a second coarse verify current smaller than the first coarse verify current, and performing a second fine programming on the second memory cells after the second memory cells pass the second coarse verification; sequentially programming each further word line subset (SUB i+x) of the P word line subsets (SUB 1... SUB P) according to the same procedure until the word lines in the P-th word line subset are sequentially programmed, the value of each coarse verify current being adjusted according to the sequence of programming the word lines such that the coarse verify current (Isense i+1) associated with a word line subset (SUB i+1) programmed at a later time is set to a smaller value than the coarse verify current (Isense i) associated with a word line subset (SUB i) which has been programmed at an earlier time (I SENSE1 > I SENSEi+1 >... > I SENSEi+x...>I SENSEP).