A method of reducing power consumption in a processing apparatus (10 to 70) including a memory, said memory supporting a STAND-BY mode and an OPERATING mode, the method including the steps of: - controlling the clock period of the processing apparatus to switch said processing apparatus (10 to 70) to a SLOW operating mode wherein the clock period of said memory during said SLOW operating mode is longer then the time required to recover said memory from said STAND-BY mode plus the time to execute a read command in said memory, - controlling (40, 50) the status of said memory during said SLOW operating mode by: a) maintaining said memory in said STAND-BY mode when no memory read/write commands are to be executed, and b) if any read commands are required to be executed, switching said memory from said STAND-BY mode to said OPERATING mode only for the time required to perform said memory read commands and returning said memory to said STAND-BY mode after said read commands have been performed, characterized in that said memory is configured to set a ready signal indicating that said memory is ready to be accessed and a readbusy signal when a reading operation is in course, wherein the method includes controlling the memory entry/recovery operations, using an asynchronous read access protocol by: - switching said memory from said STAND-BY mode to said OPERATING mode, - masking the clock signal to said memory until said ready signal indicates that said memory has recovered from said STAND-BY mode, - switching said memory from said OPERATING mode to said STAND-BY mode when said readbusy signal indicates the conclusion of the read access. - controlling the clock period of the processing apparatus to switch said processing apparatus (10 to 70) to a SLOW operating mode wherein the clock period of said memory during said SLOW operating mode is longer then the time required to recover said memory from said STAND-BY mode plus the time to execute a read command in said memory, - controlling (40, 50) the status of said memory during said SLOW operating mode by: a) maintaining said memory in said STAND-BY mode when no memory read/write commands are to be executed, and b) if any read commands are required to be executed, switching said memory from said STAND-BY mode to said OPERATING mode only for the time required to perform said memory read commands and returning said memory to said STAND-BY mode after said read commands have been performed, characterized in that said memory is configured to set a ready signal indicating that said memory is ready to be accessed and a readbusy signal when a reading operation is in course, wherein the method includes controlling the memory entry/recovery operations, using an asynchronous read access protocol by: - switching said memory from said STAND-BY mode to said OPERATING mode, - masking the clock signal to said memory until said ready signal indicates that said memory has recovered from said STAND-BY mode, - switching said memory from said OPERATING mode to said STAND-BY mode when said readbusy signal indicates the conclusion of the read access. a) maintaining said memory in said STAND-BY mode when no memory read/write commands are to be executed, and b) if any read commands are required to be executed, switching said memory from said STAND-BY mode to said OPERATING mode only for the time required to perform said memory read commands and returning said memory to said STAND-BY mode after said read commands have been performed, characterized in that said memory is configured to set a ready signal indicating that said memory is ready to be accessed and a readbusy signal when a reading operation is in course, wherein the method includes controlling the memory entry/recovery operations, using an asynchronous read access protocol by: - switching said memory from said STAND-BY mode to said OPERATING mode, - masking the clock signal to said memory until said ready signal indicates that said memory has recovered from said STAND-BY mode, - switching said memory from said OPERATING mode to said STAND-BY mode when said readbusy signal indicates the conclusion of the read access. - switching said memory from said STAND-BY mode to said OPERATING mode, - masking the clock signal to said memory until said ready signal indicates that said memory has recovered from said STAND-BY mode, - switching said memory from said OPERATING mode to said STAND-BY mode when said readbusy signal indicates the conclusion of the read access.