A chipset, implemented in a server node, one of Node1 to NodeM, of a server system, comprising a northbridge and a southbridge and an embedded management controller, eMC, wherein the embedded management controller collects inner-node information of the server node for server system management, wherein the embedded management controller, eMC, is coupled to a baseboard management controller, BMC, and the baseboard management controller, BMC, is outside the server node and communicates with a remote console through a network; characerized in that: before transferring the inner-node information to the baseboard management controller, BMC, the embedded management controller, eMC, asserts an interrupt status and thereby the baseboard management controller, BMC, differentiates the server node showing the interrupt status from other server nodes also coupled to the baseboard management controller, BMC; the embedded management controller further comprises a memory interface controller, and the memory interface controller is controlled to access a non-volatile memory that is shared with a system firmware of the server node containing the chipset; the non-volatile memory is further allocated to provide sections of write areas (604 to 610) for different server nodes including the sever node containing the chipset and the other server nodes also coupled to the baseboard management controller, BMC; the embedded management controller asserts a signal to the next embedded management controller in a sequence of embedded management controllers, thereby causing the embedded management controllers of the different server nodes to boot up one by one; and after the embedded management controllers of the different server nodes boot up, chipsets of the different server nodes boot up one by one under the control of the embedded management controllers. an embedded management controller, eMC, wherein the embedded management controller collects inner-node information of the server node for server system management, wherein the embedded management controller, eMC, is coupled to a baseboard management controller, BMC, and the baseboard management controller, BMC, is outside the server node and communicates with a remote console through a network; characerized in that: before transferring the inner-node information to the baseboard management controller, BMC, the embedded management controller, eMC, asserts an interrupt status and thereby the baseboard management controller, BMC, differentiates the server node showing the interrupt status from other server nodes also coupled to the baseboard management controller, BMC; the embedded management controller further comprises a memory interface controller, and the memory interface controller is controlled to access a non-volatile memory that is shared with a system firmware of the server node containing the chipset; the non-volatile memory is further allocated to provide sections of write areas (604 to 610) for different server nodes including the sever node containing the chipset and the other server nodes also coupled to the baseboard management controller, BMC; the embedded management controller asserts a signal to the next embedded management controller in a sequence of embedded management controllers, thereby causing the embedded management controllers of the different server nodes to boot up one by one; and after the embedded management controllers of the different server nodes boot up, chipsets of the different server nodes boot up one by one under the control of the embedded management controllers. before transferring the inner-node information to the baseboard management controller, BMC, the embedded management controller, eMC, asserts an interrupt status and thereby the baseboard management controller, BMC, differentiates the server node showing the interrupt status from other server nodes also coupled to the baseboard management controller, BMC; the embedded management controller further comprises a memory interface controller, and the memory interface controller is controlled to access a non-volatile memory that is shared with a system firmware of the server node containing the chipset; the non-volatile memory is further allocated to provide sections of write areas (604 to 610) for different server nodes including the sever node containing the chipset and the other server nodes also coupled to the baseboard management controller, BMC; the embedded management controller asserts a signal to the next embedded management controller in a sequence of embedded management controllers, thereby causing the embedded management controllers of the different server nodes to boot up one by one; and after the embedded management controllers of the different server nodes boot up, chipsets of the different server nodes boot up one by one under the control of the embedded management controllers.