A storage system, wherein the storage system is a storage system that has a write once read many (Write Once Read Many, WORM) function, and comprises: a storage device, configured to store data; and a controller, comprising: a real-time clock, configured to provide system time for the storage system; a reference clock, configured to verify the system time of the storage system and provided with an external access interface, wherein the reference clock is controlled by a board management controller, BMC, through the external access interface with which the reference clock is provided, the reference clock cannot be modified when the system is running; and a processor, configured to: receive a data operation request sent by an application server, wherein the data operation request is used to change the data stored in the storage device; acquire a time difference between the real-time clock and the reference clock; determine whether the time difference is greater than an accumulated time precision error of the reference clock; and if the time difference is greater than the accumulated time precision error, refuse to execute the data operation request; wherein the BMC is configured to read a value of a time register of the reference clock to obtain time of the reference clock; the processor is specifically configured to: read a value of a time register of the real-time clock to obtain time of the real-time clock; obtain the time of the reference clock through a communication channel between the BMC and a southbridge chip; and obtain the time difference according to the time of the real-time clock and the time of the reference clock. a storage device, configured to store data; and a controller, comprising: a real-time clock, configured to provide system time for the storage system; a reference clock, configured to verify the system time of the storage system and provided with an external access interface, wherein the reference clock is controlled by a board management controller, BMC, through the external access interface with which the reference clock is provided, the reference clock cannot be modified when the system is running; and a processor, configured to: receive a data operation request sent by an application server, wherein the data operation request is used to change the data stored in the storage device; acquire a time difference between the real-time clock and the reference clock; determine whether the time difference is greater than an accumulated time precision error of the reference clock; and if the time difference is greater than the accumulated time precision error, refuse to execute the data operation request; wherein the BMC is configured to read a value of a time register of the reference clock to obtain time of the reference clock; the processor is specifically configured to: read a value of a time register of the real-time clock to obtain time of the real-time clock; obtain the time of the reference clock through a communication channel between the BMC and a southbridge chip; and obtain the time difference according to the time of the real-time clock and the time of the reference clock. a real-time clock, configured to provide system time for the storage system; a reference clock, configured to verify the system time of the storage system and provided with an external access interface, wherein the reference clock is controlled by a board management controller, BMC, through the external access interface with which the reference clock is provided, the reference clock cannot be modified when the system is running; and a processor, configured to: receive a data operation request sent by an application server, wherein the data operation request is used to change the data stored in the storage device; acquire a time difference between the real-time clock and the reference clock; determine whether the time difference is greater than an accumulated time precision error of the reference clock; and if the time difference is greater than the accumulated time precision error, refuse to execute the data operation request; wherein the BMC is configured to read a value of a time register of the reference clock to obtain time of the reference clock; the processor is specifically configured to: read a value of a time register of the real-time clock to obtain time of the real-time clock; obtain the time of the reference clock through a communication channel between the BMC and a southbridge chip; and obtain the time difference according to the time of the real-time clock and the time of the reference clock. read a value of a time register of the real-time clock to obtain time of the real-time clock; obtain the time of the reference clock through a communication channel between the BMC and a southbridge chip; and obtain the time difference according to the time of the real-time clock and the time of the reference clock.