A first semiconductor integrated circuit of a processing apparatus, the first semiconductor integrated circuit comprising: a communication circuit, a control circuit, connected with a system bus; the communication circuit configured to: generate a second boot code by encrypting a first boot code, wherein the first boot code comprises: a third boot code to be used by a second semiconductor integrated circuit of the processing apparatus to perform a boot process, and a fourth boot code to be used by a third semiconductor integrated circuit of the processing apparatus to perform a boot process, the fourth boot code to be encrypted by the second semiconductor integrated circuit and transmitted to the third semiconductor integrated circuit from the second semiconductor integrated circuit, transmit, based on first route information indicating a delivery route of the second boot code, first data including the second boot code and the first route information to the second semiconductor integrated circuit via a first network, and receive, from the second semiconductor integrated circuit, an acknowledgement signal indicating that receipt of the first data is completed; receive, from the third semiconductor integrated circuit, an acknowledgement signal indicating that receipt of the first data is completed; and the control circuit configured to be connected to the communication circuit via the system bus, and cause, when the communication circuit receives the acknowledgement signal, the communication circuit to transmit, to the second semiconductor integrated circuit and the third semiconductor integrated circuit via the first network, a boot instruction signal instructing the second semiconductor integrated circuit and the third semiconductor integrated circuit to perform a boot process based on the first boot code. a communication circuit, a control circuit, connected with a system bus; the communication circuit configured to: generate a second boot code by encrypting a first boot code, wherein the first boot code comprises: a third boot code to be used by a second semiconductor integrated circuit of the processing apparatus to perform a boot process, and a fourth boot code to be used by a third semiconductor integrated circuit of the processing apparatus to perform a boot process, the fourth boot code to be encrypted by the second semiconductor integrated circuit and transmitted to the third semiconductor integrated circuit from the second semiconductor integrated circuit, transmit, based on first route information indicating a delivery route of the second boot code, first data including the second boot code and the first route information to the second semiconductor integrated circuit via a first network, and receive, from the second semiconductor integrated circuit, an acknowledgement signal indicating that receipt of the first data is completed; receive, from the third semiconductor integrated circuit, an acknowledgement signal indicating that receipt of the first data is completed; and generate a second boot code by encrypting a first boot code, wherein the first boot code comprises: a third boot code to be used by a second semiconductor integrated circuit of the processing apparatus to perform a boot process, and a fourth boot code to be used by a third semiconductor integrated circuit of the processing apparatus to perform a boot process, the fourth boot code to be encrypted by the second semiconductor integrated circuit and transmitted to the third semiconductor integrated circuit from the second semiconductor integrated circuit, a third boot code to be used by a second semiconductor integrated circuit of the processing apparatus to perform a boot process, and a fourth boot code to be used by a third semiconductor integrated circuit of the processing apparatus to perform a boot process, the fourth boot code to be encrypted by the second semiconductor integrated circuit and transmitted to the third semiconductor integrated circuit from the second semiconductor integrated circuit, transmit, based on first route information indicating a delivery route of the second boot code, first data including the second boot code and the first route information to the second semiconductor integrated circuit via a first network, and receive, from the second semiconductor integrated circuit, an acknowledgement signal indicating that receipt of the first data is completed; receive, from the third semiconductor integrated circuit, an acknowledgement signal indicating that receipt of the first data is completed; and the control circuit configured to be connected to the communication circuit via the system bus, and cause, when the communication circuit receives the acknowledgement signal, the communication circuit to transmit, to the second semiconductor integrated circuit and the third semiconductor integrated circuit via the first network, a boot instruction signal instructing the second semiconductor integrated circuit and the third semiconductor integrated circuit to perform a boot process based on the first boot code.