A converter circuit for reducing a nominal capacitor voltage, the converter circuit comprising: - an input node (TI 1), which is configured to receive an input voltage (V G); - a first output node (TO 1) and a second output node (TO 2), which are configured to respectively supply a first output voltage (V O1) and a second output voltage (V O2) to respectively a first load (R L1) and a second load (R L2) wherein the first load (R L1) is connected between the input node (T I1) and the first output node (TO 1); - a first inductor which is coupled between the first output node (TO 1) and - a first selection node (SN 1) and - a second inductor which is coupled between the second output node (TO 2) and a second selection node (SN 2) with respectively - a first switch (S 1) which is configured to connect the first selection node (SN 1) to either the second output node (TO 2) or ground (G 1) and - a second switch (S 2) which is configured to connect the second selection node (SN 2) to either the first output node (TO 1) or the input voltage node (V G); and - a first capacitor (C 1), which is coupled to the first load so that the input voltage is divided between the first capacitor (C 1) and the first load (R L1) and which is configured to be charged up to a voltage corresponding to a differential voltage between the input voltage (V G) and the first output voltage (V O1); - a second capacitor (C 2), which is coupled to the second load so that the input voltage is divided between the second capacitor (C 2) and the second load (R L2) and which is configured to be charged up to a voltage corresponding to a differential voltage between the input voltage (V G) and the second output voltage (V O2); wherein the first capacitor (C 1) is coupled between the first load (R L1) and ground (G 1); and wherein the second capacitor (C 2) is coupled between the second output node (TO 2) and the input node (TI 1) configured to receive the input voltage (V G). - an input node (TI 1), which is configured to receive an input voltage (V G); - a first output node (TO 1) and a second output node (TO 2), which are configured to respectively supply a first output voltage (V O1) and a second output voltage (V O2) to respectively a first load (R L1) and a second load (R L2) wherein the first load (R L1) is connected between the input node (T I1) and the first output node (TO 1); - a first inductor which is coupled between the first output node (TO 1) and - a first selection node (SN 1) and - a second inductor which is coupled between the second output node (TO 2) and a second selection node (SN 2) with respectively - a first switch (S 1) which is configured to connect the first selection node (SN 1) to either the second output node (TO 2) or ground (G 1) and - a second switch (S 2) which is configured to connect the second selection node (SN 2) to either the first output node (TO 1) or the input voltage node (V G); and - a first capacitor (C 1), which is coupled to the first load so that the input voltage is divided between the first capacitor (C 1) and the first load (R L1) and which is configured to be charged up to a voltage corresponding to a differential voltage between the input voltage (V G) and the first output voltage (V O1); - a second capacitor (C 2), which is coupled to the second load so that the input voltage is divided between the second capacitor (C 2) and the second load (R L2) and which is configured to be charged up to a voltage corresponding to a differential voltage between the input voltage (V G) and the second output voltage (V O2);