A method of manufacturing an insulated gate bipolar transistor, comprising: providing a substrate, forming a field oxide layer on a front side of the substrate, photoetching and etching the field oxide layer by using a terminal guard ring (21, 22, 23) photomask, and forming a terminal guard ring by implanting P-type ions to the substrate under the etched area; photoetching and etching the field oxide layer of an active region area by using an active region photomask, and depositing polysilicon on the substrate where the field oxide layer being etched, forming a protecting layer on the deposited polysilicon; and forming a polysilicon gate by photoetching and etching surplus polysilicon and the protecting layer by using a polysilicon photomask; photoetching and etching the polysilicon gate by using a P well photomask having an opening, implanting N-type ions to the substrate under the etched polysilicon gate between the remaining polysilicon gate, and forming a carrier enhanced region after performing a driving-in process; photoetching the carrier enhanced region by using the P well photomask and implanting P-type ions to the carrier enhanced region, and forming a P-body region after performing a driving-in process; self-alignedly implanting N-type ions to the P-body region by using the polysilicon gate, and forming an N-type heavily doped region after performing a driving-in process; forming a spacer at both sides of the polysilicon gate, then forming a dishing area by etching the N-type heavily doped region, wherein an inwardly sunken depth of the dishing area with respect to the substrate at both sides is 0.15 micron and then implanting P-type ions to the N-type heavily doped region, and forming a P-type heavily doped region after performing a driving-in process; implanting and doping polysilicon to the polysilicon gate after removing the protecting layer; and forming an interlayer dielectric covering the polysilicon gate and the spacer, performing a front metalized process of the insulated gate bipolar transistor, performing backgrinding, implanting of P-type ions and an annealing process, and performing a backside metalized process of the insulated gate bipolar transistor, wherein the N-type carrier enhanced region is disposed in the substrate of the active region, the P-body region is disposed in the carrier enhanced region, the N-type heavily doped region is disposed in the P-body region, the P-type heavily doped region is disposed in the N-type heavily doped region. providing a substrate, forming a field oxide layer on a front side of the substrate, photoetching and etching the field oxide layer by using a terminal guard ring (21, 22, 23) photomask, and forming a terminal guard ring by implanting P-type ions to the substrate under the etched area; photoetching and etching the field oxide layer of an active region area by using an active region photomask, and depositing polysilicon on the substrate where the field oxide layer being etched, forming a protecting layer on the deposited polysilicon; and forming a polysilicon gate by photoetching and etching surplus polysilicon and the protecting layer by using a polysilicon photomask; photoetching and etching the polysilicon gate by using a P well photomask having an opening, implanting N-type ions to the substrate under the etched polysilicon gate between the remaining polysilicon gate, and forming a carrier enhanced region after performing a driving-in process; photoetching the carrier enhanced region by using the P well photomask and implanting P-type ions to the carrier enhanced region, and forming a P-body region after performing a driving-in process; self-alignedly implanting N-type ions to the P-body region by using the polysilicon gate, and forming an N-type heavily doped region after performing a driving-in process; forming a spacer at both sides of the polysilicon gate, then forming a dishing area by etching the N-type heavily doped region, wherein an inwardly sunken depth of the dishing area with respect to the substrate at both sides is 0.15 micron and then implanting P-type ions to the N-type heavily doped region, and forming a P-type heavily doped region after performing a driving-in process; implanting and doping polysilicon to the polysilicon gate after removing the protecting layer; and forming an interlayer dielectric covering the polysilicon gate and the spacer, performing a front metalized process of the insulated gate bipolar transistor, performing backgrinding, implanting of P-type ions and an annealing process, and performing a backside metalized process of the insulated gate bipolar transistor, wherein the N-type carrier enhanced region is disposed in the substrate of the active region, the P-body region is disposed in the carrier enhanced region, the N-type heavily doped region is disposed in the P-body region, the P-type heavily doped region is disposed in the N-type heavily doped region.