An apparatus comprising: a digital loop filter, a frequency tracking loop; a summing node, a first oscillator to generate a first output having a first frequency, the first oscillator comprising a first array of capacitors and a second array of capacitors, the first array of capacitors comprising a first switch configured to add or subtract capacitors in the first array of capacitors, and the second array comprising a second switch configured to add or subtract capacitors in the second array of capacitors; a transformer coupled to the first oscillator; and a second oscillator coupled to the transformer, wherein the second oscillator is to generate a second output with a second frequency which is a harmonic of the first frequency, wherein the second frequency is higher than the first frequency, the second oscillator comprising a third array of capacitors and a fourth array of capacitors, the third array of capacitors comprising a third switch configured to add or subtract capacitors in the third array of capacitors, and the fourth array of capacitors comprising a fourth switch configured to add or subtract capacitors in the fourth array of capacitors, wherein the digital loop filter is configured to provide a first tuning code as a first oscillator coarse tuning code to the first array of capacitors and to the summing node, and a second tuning code as a first oscillator fine tuning code to the second array of capacitors; wherein the frequency tracking loop is configured to measure a frequency mismatch between the first and the second output and to tune the third and fourth arrays of capacitors to reduce the frequency error, wherein tuning the fourth array of capacitors comprises providing a fourth tuning code as a second oscillator fine tuning code to the fourth array of capacitors; wherein tuning the third array of capacitors comprises providing a third tuning code to the summing node, and wherein the summing node is configured to combine the first tuning code and the third tuning code and to provide the resulting tuning code as a second oscillator coarse tuning code to the third array of capacitors. a digital loop filter, a frequency tracking loop; a summing node, a first oscillator to generate a first output having a first frequency, the first oscillator comprising a first array of capacitors and a second array of capacitors, the first array of capacitors comprising a first switch configured to add or subtract capacitors in the first array of capacitors, and the second array comprising a second switch configured to add or subtract capacitors in the second array of capacitors; a transformer coupled to the first oscillator; and a second oscillator coupled to the transformer, wherein the second oscillator is to generate a second output with a second frequency which is a harmonic of the first frequency, wherein the second frequency is higher than the first frequency, the second oscillator comprising a third array of capacitors and a fourth array of capacitors, the third array of capacitors comprising a third switch configured to add or subtract capacitors in the third array of capacitors, and the fourth array of capacitors comprising a fourth switch configured to add or subtract capacitors in the fourth array of capacitors, wherein the digital loop filter is configured to provide a first tuning code as a first oscillator coarse tuning code to the first array of capacitors and to the summing node, and a second tuning code as a first oscillator fine tuning code to the second array of capacitors; wherein the frequency tracking loop is configured to measure a frequency mismatch between the first and the second output and to tune the third and fourth arrays of capacitors to reduce the frequency error, wherein tuning the fourth array of capacitors comprises providing a fourth tuning code as a second oscillator fine tuning code to the fourth array of capacitors; wherein tuning the third array of capacitors comprises providing a third tuning code to the summing node, and wherein the summing node is configured to combine the first tuning code and the third tuning code and to provide the resulting tuning code as a second oscillator coarse tuning code to the third array of capacitors.