An amplifier circuit comprising: a first transistor having a control terminal, a first terminal, and a second terminal, the control terminal configured to receive an input signal; a first cascode transistor having a control terminal, a first terminal configured to provide an output signal, and a second terminal, wherein the second terminal of the cascode transistor is coupled to the first terminal of the first transistor; an inductor having a first terminal coupled to the first terminal of the first cascode transistor and a second terminal coupled to a modulated power supply terminal; a first bias circuit comprising: a first resistor having a first terminal directly coupled to the modulated power supply terminal and a second terminal coupled to a first node; a second resistor having a first terminal coupled to the first node and a second terminal coupled to a reference voltage; and a first capacitor having a first terminal directly coupled to the modulated power supply terminal and a second terminal coupled to the first node; the amplifier circuit further comprising: a second cascode transistor having a control terminal, a first terminal, and a second terminal, wherein the first terminal of the second cascode transistor is coupled to the second terminal of the first cascode transistor, and wherein the second terminal of the second cascode transistor is coupled to the first terminal of the first transistor; a second bias circuit comprising: a third resistor having a first terminal directly coupled to the modulated power supply terminal and a second terminal coupled to a second node; a fourth resistor having a first terminal coupled to the second node and a second terminal coupled to the reference voltage; and a second capacitor having a first terminal directly coupled to the modulated power supply terminal and a second terminal coupled to the second node, and wherein the first node is coupled to the control terminal of the first cascode transistor, wherein the second node is coupled to the control terminal of the second cascode transistor, and wherein the modulated power supply terminal is configured to provide a time varying power supply signal corresponding to the input signal; and wherein the inductor is configured to isolate the first terminal of the first cascode transistor from the time varying power supply signal on the second terminal of the inductor, and configured to isolate the first bias circuit from the output signal. a first transistor having a control terminal, a first terminal, and a second terminal, the control terminal configured to receive an input signal; a first cascode transistor having a control terminal, a first terminal configured to provide an output signal, and a second terminal, wherein the second terminal of the cascode transistor is coupled to the first terminal of the first transistor; an inductor having a first terminal coupled to the first terminal of the first cascode transistor and a second terminal coupled to a modulated power supply terminal; a first resistor having a first terminal directly coupled to the modulated power supply terminal and a second terminal coupled to a first node; a second resistor having a first terminal coupled to the first node and a second terminal coupled to a reference voltage; and a first capacitor having a first terminal directly coupled to the modulated power supply terminal and a second terminal coupled to the first node; a third resistor having a first terminal directly coupled to the modulated power supply terminal and a second terminal coupled to a second node; a fourth resistor having a first terminal coupled to the second node and a second terminal coupled to the reference voltage; and a second capacitor having a first terminal directly coupled to the modulated power supply terminal and a second terminal coupled to the second node, and wherein the first node is coupled to the control terminal of the first cascode transistor, wherein the second node is coupled to the control terminal of the second cascode transistor, and wherein the modulated power supply terminal is configured to provide a time varying power supply signal corresponding to the input signal; and wherein the inductor is configured to isolate the first terminal of the first cascode transistor from the time varying power supply signal on the second terminal of the inductor, and configured to isolate the first bias circuit from the output signal.