A memory device, comprising: a plurality of non-volatile memory cells each comprising a first gate; and a controller configured to program one non-volatile memory cell of the plurality of non-volatile memory cells by: programming the one non-volatile memory cell to an initial program state that corresponds to meeting or exceeding a target threshold voltage for the first gate of the one non-volatile memory cell, wherein the target threshold voltage corresponds to a target read current, reading the one non-volatile memory cell in a first read operation using a read voltage applied to the first gate of the one non-volatile memory cell that is less than the target threshold voltage to generate a first read current, and subjecting the one non-volatile memory cell to additional programming in response to determining that the first read current is greater than the target read current; reading the one non-volatile memory cell in a second read operation, in response to determining that the first read current is not greater than the target read current in the first read operation, using a read voltage applied to the first gate of the one non-volatile memory cell that is less than the target threshold voltage to generate a second read current, and subjecting the one non-volatile memory cell to additional programming in response to determining that the second read current is greater than the target read current. a plurality of non-volatile memory cells each comprising a first gate; and a controller configured to program one non-volatile memory cell of the plurality of non-volatile memory cells by: programming the one non-volatile memory cell to an initial program state that corresponds to meeting or exceeding a target threshold voltage for the first gate of the one non-volatile memory cell, wherein the target threshold voltage corresponds to a target read current, reading the one non-volatile memory cell in a first read operation using a read voltage applied to the first gate of the one non-volatile memory cell that is less than the target threshold voltage to generate a first read current, and subjecting the one non-volatile memory cell to additional programming in response to determining that the first read current is greater than the target read current; reading the one non-volatile memory cell in a second read operation, in response to determining that the first read current is not greater than the target read current in the first read operation, using a read voltage applied to the first gate of the one non-volatile memory cell that is less than the target threshold voltage to generate a second read current, and subjecting the one non-volatile memory cell to additional programming in response to determining that the second read current is greater than the target read current. programming the one non-volatile memory cell to an initial program state that corresponds to meeting or exceeding a target threshold voltage for the first gate of the one non-volatile memory cell, wherein the target threshold voltage corresponds to a target read current, reading the one non-volatile memory cell in a first read operation using a read voltage applied to the first gate of the one non-volatile memory cell that is less than the target threshold voltage to generate a first read current, and subjecting the one non-volatile memory cell to additional programming in response to determining that the first read current is greater than the target read current; reading the one non-volatile memory cell in a second read operation, in response to determining that the first read current is not greater than the target read current in the first read operation, using a read voltage applied to the first gate of the one non-volatile memory cell that is less than the target threshold voltage to generate a second read current, and subjecting the one non-volatile memory cell to additional programming in response to determining that the second read current is greater than the target read current.