A distributed power amplifier arranged to operate over a bandwidth B, the distributed power amplifier comprising an input transmission line comprising a plurality of transmission line sections (Li1-Li4) connected in series, an output transmission line comprising a plurality of transmission line sections (Lo1-Lo4) connected in series, a power splitter, an active matching circuit (207, 900a, 900b) and a plurality of amplifiers (A1-A3), and having an input side, with an input terminal arranged to receive an input signal and connected to the input transmission line, and an output side with an output terminal adapted to deliver an output signal and connected to the output transmission line, the distributed power amplifier arranged so that the input signal is successively coupled from the input transmission line to the output transmission line through the plurality of amplifiers (A1-A3), each amplifier being connected between a point between a pair of consecutive transmission line sections of the input transmission line and a respective point between a pair of consecutive transmission line sections of the output transmission line, both transmission lines having two ends, wherein the power splitter is connected to the input terminal, thus being arranged to divide the input signal in a first path to the input transmission line and in a second path to an input of the active matching circuit (207, 900a, 900b), the active matching circuit having an output connected to the output transmission line, the other end of the output transmission line being connected to the output terminal, characterized in that the active matching circuit (207, 900a, 900b) comprises a first active matching circuit OR a second active matching circuit; - the first matching circuit comprising a transistor having a gate terminal, a drain terminal and a source terminal and comprising an input load (Z S) and an output load (Z L), wherein ∘ the second path of the input signal is connected to the input of the active matching circuit, ∘ the input of the active matching circuit is connected to the gate terminal of the transistor via the input load (Z S), ∘ the drain terminal is connected to the output of the active matching circuit via the output load (Z L), ∘ the output of the active matching circuit is connected to the opposite output transmission line end, ∘ the source terminal of the transistor is connected to ground, and - the second matching circuit comprising a first matching impedance (Z 1), an amplifier arrangement (Ak), a second matching impedance (Z 2) and a circuit arrangement (Ap) connected in series in the order mentioned, each component having two ends, the first matching impedance being further connected at a free end to the input of the active matching circuit and the circuit arrangement (Ap) being further connected at a free end to the output of the active matching circuit, thus achieving an improved Power Added Efficiency, PAE, performance and increased power output over the bandwidth B. - the first matching circuit comprising a transistor having a gate terminal, a drain terminal and a source terminal and comprising an input load (Z S) and an output load (Z L), wherein ∘ the second path of the input signal is connected to the input of the active matching circuit, ∘ the input of the active matching circuit is connected to the gate terminal of the transistor via the input load (Z S), ∘ the drain terminal is connected to the output of the active matching circuit via the output load (Z L), ∘ the output of the active matching circuit is connected to the opposite output transmission line end, ∘ the source terminal of the transistor is connected to ground, and ∘ the second path of the input signal is connected to the input of the active matching circuit, ∘ the input of the active matching circuit is connected to the gate terminal of the transistor via the input load (Z S), ∘ the drain terminal is connected to the output of the active matching circuit via the output load (Z L), ∘ the output of the active matching circuit is connected to the opposite output transmission line end, ∘ the source terminal of the transistor is connected to ground, and - the second matching circuit comprising a first matching impedance (Z 1), an amplifier arrangement (Ak), a second matching impedance (Z 2) and a circuit arrangement (Ap) connected in series in the order mentioned, each component having two ends, the first matching impedance being further connected at a free end to the input of the active matching circuit and the circuit arrangement (Ap) being further connected at a free end to the output of the active matching circuit,