A signal mixer for mixing a plurality of signals comprising: a first adder for adding a first signal sample to a second signal sample to obtain a first intermediate result; a multiplier for multiplying the first signal sample with the second signal sample to obtain a second intermediate result; a second adder having a first input for receiving the second intermediate result and a second input for receiving the first intermediate result to obtain a third intermediate result that is zero or has a sign comprising one of a group consisting of a first sign and a second sign; characterized in that signal mixer further comprises: a third adder having a first input for receiving the first intermediate result and a second input for receiving the second intermediate result to provide a fourth intermediate result that is zero or has a sign comprising one of a group consisting of the first sign and the second sign; a first step function circuit for generating a fifth intermediate result by discarding the third intermediate result if the third intermediate result is less than zero and providing the fifth intermediate result based on the third intermediate result if the third intermediate result is greater than zero; a second step function for generating a sixth intermediate result by discarding the fourth intermediate result if the fourth intermediate result is less than zero and providing the sixth intermediate result based on the fourth intermediate result if the fourth intermediate result is greater than zero, wherein the first input of the second adder is an adding input, the second input of the second adder is a negating input, the first input of the third adder is a negating input, and the second input of the third adder is a negating input; and a first circuit for providing an output signal sample based on combining the fifth and sixth intermediate results by subtracting the sixth intermediate result from the fifth intermediate result to generate an output signal sample. a first adder for adding a first signal sample to a second signal sample to obtain a first intermediate result; a multiplier for multiplying the first signal sample with the second signal sample to obtain a second intermediate result; a second adder having a first input for receiving the second intermediate result and a second input for receiving the first intermediate result to obtain a third intermediate result that is zero or has a sign comprising one of a group consisting of a first sign and a second sign; a third adder having a first input for receiving the first intermediate result and a second input for receiving the second intermediate result to provide a fourth intermediate result that is zero or has a sign comprising one of a group consisting of the first sign and the second sign; a first step function circuit for generating a fifth intermediate result by discarding the third intermediate result if the third intermediate result is less than zero and providing the fifth intermediate result based on the third intermediate result if the third intermediate result is greater than zero; a second step function for generating a sixth intermediate result by discarding the fourth intermediate result if the fourth intermediate result is less than zero and providing the sixth intermediate result based on the fourth intermediate result if the fourth intermediate result is greater than zero, wherein the first input of the second adder is an adding input, the second input of the second adder is a negating input, the first input of the third adder is a negating input, and the second input of the third adder is a negating input; and a first circuit for providing an output signal sample based on combining the fifth and sixth intermediate results by subtracting the sixth intermediate result from the fifth intermediate result to generate an output signal sample.