A semiconductor device, comprising: (a) a semiconductor chip having a first main surface provided with a source electrode of a power MOSFET and a second main surface provided with a drain electrode of the power MOSFET; (b) a drift region (11n, 12n) of a first conductivity type provided in substantially the entire first main surface of the semiconductor chip; (c) a substantially rectangular active cell region provided substantially at a middle portion of the first main surface, peripheral side regions provided outside the active cell region along individual sides of the active cell region, and peripheral corner regions provided outside individual corner portions of the active cell region; (d) a first super-junction structure having a first orientation and provided in substantially the entire surface of the active cell region and in the drift region (11 n, 12n); (e) second and third super-junction structures (18,19) each having a second orientation orthogonal to that of the first super-junction structure provided in the drift region of each of the peripheral side regions on both sides of the active cell region in a direction of the first orientation of the first super-junction structure; (f) fourth and fifth super-junction structures (21,22) each having an orientation substantially the same as that of the first super-junction structure and provided in the drift region of each of the peripheral side regions on both sides of the active cell region in a direction orthogonal to the first orientation of the first super junction structure; (g) a main junction region of a second conductivity type which is an outer end portion of the active cell region and provided in a surface of the drift region (11n, 12n) so as to surround the active cell region; (h) a ring region of the first conductivity type provided in the surface of the drift region (11n, 12n) and outside the main junction region so as to surround the active cell region along an inner end of a column circular region (49pa, 49pb, 49pc) of the second conductivity type, which column circular region (49pa, 49pb, 49pc) being part of the second to fifth super-junction structures (18,19, 21,22) is provided in the surface of the drift region and outside of the main junction region so as to surround the active cell region and which is proximate to the ring region of the first conductivity type; and (i) a resin molded body covering substantially the entire first main surface of the semiconductor chip and (j) a surface resurf region of the second conductivity type provided in the surface of the drift region (11n,12n) so as to be coupled to an outer end of the main junction region and surround the main junction region; wherein the impurity concentration of the ring region of the first conductivity type is higher than the impurity concentration of the column regions of the first conductivity type of the super-junction structures (18,19, 21,22) in the drift region (11 n, 12n), and the depth of the ring region is of the same order as the surface resurf region. (a) a semiconductor chip having a first main surface provided with a source electrode of a power MOSFET and a second main surface provided with a drain electrode of the power MOSFET; (b) a drift region (11n, 12n) of a first conductivity type provided in substantially the entire first main surface of the semiconductor chip; (c) a substantially rectangular active cell region provided substantially at a middle portion of the first main surface, peripheral side regions provided outside the active cell region along individual sides of the active cell region, and peripheral corner regions provided outside individual corner portions of the active cell region; (d) a first super-junction structure having a first orientation and provided in substantially the entire surface of the active cell region and in the drift region (11 n, 12n); (e) second and third super-junction structures (18,19) each having a second orientation orthogonal to that of the first super-junction structure provided in the drift region of each of the peripheral side regions on both sides of the active cell region in a direction of the first orientation of the first super-junction structure; (f) fourth and fifth super-junction structures (21,22) each having an orientation substantially the same as that of the first super-junction structure and provided in the drift region of each of the peripheral side regions on both sides of the active cell region in a direction orthogonal to the first orientation of the first super junction structure; (g) a main junction region of a second conductivity type which is an outer end portion of the active cell region and provided in a surface of the drift region (11n, 12n) so as to surround the active cell region; (h) a ring region of the first conductivity type provided in the surface of the drift region (11n, 12n) and outside the main junction region so as to surround the active cell region along an inner end of a column circular region (49pa, 49pb, 49pc) of the second conductivity type, which column circular region (49pa, 49pb, 49pc) being part of the second to fifth super-junction structures (18,19, 21,22) is provided in the surface of the drift region and outside of the main junction region so as to surround the active cell region and which is proximate to the ring region of the first conductivity type; and (i) a resin molded body covering substantially the entire first main surface of the semiconductor chip and (j) a surface resurf region of the second conductivity type provided in the surface of the drift region (11n,12n) so as to be coupled to an outer end of the main junction region and surround the main junction region;