A memory controller comprising: a memory interface; and a logic circuitry component coupled with the memory interface, wherein the logic circuitry component is configured to: program one or more NAND cells of a multi-level NAND memory array via the memory interface with a first set of data in a first pass; determine a first temperature of the multi-level NAND memory array in association with the first pass; determine a second temperature of the multi-level NAND memory array; determine a temperature difference between the second temperature and the first temperature; and perform one or more operations based at least in part on a result of the determination of the temperature difference, characterized by the one or more operations include one or more of: program the one or more NAND cells with a second set of data in a second pass, in response to the temperature difference being less than or equal to a predefined threshold value; and send a flag indicating that the temperature difference exceeded the predefined threshold value to a host controller, to facilitate an external data read of the one or more NAND cells, data correction associated with the one or more NAND cells, or recovery of data encoded by the one or more NAND cells, in response to the temperature difference being greater than the predefined threshold value. a memory interface; and a logic circuitry component coupled with the memory interface, wherein the logic circuitry component is configured to: program one or more NAND cells of a multi-level NAND memory array via the memory interface with a first set of data in a first pass; determine a first temperature of the multi-level NAND memory array in association with the first pass; determine a second temperature of the multi-level NAND memory array; determine a temperature difference between the second temperature and the first temperature; and perform one or more operations based at least in part on a result of the determination of the temperature difference, characterized by the one or more operations include one or more of: program the one or more NAND cells with a second set of data in a second pass, in response to the temperature difference being less than or equal to a predefined threshold value; and send a flag indicating that the temperature difference exceeded the predefined threshold value to a host controller, to facilitate an external data read of the one or more NAND cells, data correction associated with the one or more NAND cells, or recovery of data encoded by the one or more NAND cells, in response to the temperature difference being greater than the predefined threshold value. program one or more NAND cells of a multi-level NAND memory array via the memory interface with a first set of data in a first pass; determine a first temperature of the multi-level NAND memory array in association with the first pass; determine a second temperature of the multi-level NAND memory array; determine a temperature difference between the second temperature and the first temperature; and perform one or more operations based at least in part on a result of the determination of the temperature difference, characterized by the one or more operations include one or more of: program the one or more NAND cells with a second set of data in a second pass, in response to the temperature difference being less than or equal to a predefined threshold value; and send a flag indicating that the temperature difference exceeded the predefined threshold value to a host controller, to facilitate an external data read of the one or more NAND cells, data correction associated with the one or more NAND cells, or recovery of data encoded by the one or more NAND cells, in response to the temperature difference being greater than the predefined threshold value.