A method for testing a device under test, the method comprising: analyzing application software to be tested, wherein the application software is deployable to execute on first hardware resources of a multiprocessor array, wherein the device under test comprises the MPA executing the application software, and wherein the MPA includes a plurality of processing elements, a plurality of memories, and an interconnection network communicatively coupling the plurality of processing elements and the plurality of memories; creating test program code which is executable to configure hardware resources on the MPA to provide a copy of at least a subset of first data generated in the application software for analysis purposes; and executing the application software on the first hardware resources of the MPA and concurrently executing the test program code on a second, different set of hardware resources of the MPA to probe high-bandwidth data flows in the DUT, wherein the second set of hardware resources are not used to execute the application software; wherein the test program code generates the copy of at least a subset of the first data in response to a send statement executed by the application software and wherein the first data is provided from first circuitry in the first hardware resources in response to the send statement using a first communications pathway through the IN of the MPA in response to input data; and wherein probing the high-bandwidth data flows includes providing, based on an auxiliary send statement, the at least a subset of the first data from the first circuitry to a pin at an edge of the MPA via a second communications pathway through the IN of the MPA that is unused by the application software, and wherein the copy of at least a subset of the first data is useable for analyzing the DUT. analyzing application software to be tested, wherein the application software is deployable to execute on first hardware resources of a multiprocessor array, wherein the device under test comprises the MPA executing the application software, and wherein the MPA includes a plurality of processing elements, a plurality of memories, and an interconnection network communicatively coupling the plurality of processing elements and the plurality of memories; creating test program code which is executable to configure hardware resources on the MPA to provide a copy of at least a subset of first data generated in the application software for analysis purposes; and executing the application software on the first hardware resources of the MPA and concurrently executing the test program code on a second, different set of hardware resources of the MPA to probe high-bandwidth data flows in the DUT, wherein the second set of hardware resources are not used to execute the application software; wherein the test program code generates the copy of at least a subset of the first data in response to a send statement executed by the application software and wherein the first data is provided from first circuitry in the first hardware resources in response to the send statement using a first communications pathway through the IN of the MPA in response to input data; and wherein probing the high-bandwidth data flows includes providing, based on an auxiliary send statement, the at least a subset of the first data from the first circuitry to a pin at an edge of the MPA via a second communications pathway through the IN of the MPA that is unused by the application software, and wherein the copy of at least a subset of the first data is useable for analyzing the DUT.