A radiofrequency, `RF', amplifier package, comprising: an input terminal; an output terminal; a substrate; a first DC blocking capacitor having a first terminal and a grounded second terminal; a semiconductor die mounted on the substrate and comprising: a semiconductor substrate; an RF power field-effect transistor, `FET', integrated on said semiconductor substrate, the RF power FET having an output capacitance (Cds) and being configured to operate within an operational frequency range; a gate bondbar connected to the input terminal directly or via an input impedance matching stage using a plurality of gate bondwires; a first drain bondbar connected to the output terminal directly or via an output impedance matching stage using a plurality of drain bondwires; a second drain bondbar arranged in between the gate bondbar and the first drain bondbar; a plurality of first bondwires connecting the second drain bondbar to the first terminal of the first DC blocking capacitor; wherein the RF power FET comprises: a plurality of gate fingers that are electrically connected to the gate bondbar and that each extend from the gate bondbar towards the first drain bondbar and underneath the second drain bondbar; a first set of drain fingers that each extend in an area between the second drain bondbar and the first drain bondbar, characterized in that the RF power FET further comprises a second set of drain fingers that each extend in an area between the second drain bondbar and the gate bondbar, wherein each of the plurality of gate fingers is operatively coupled with a respective drain finger of the first and second set of drain fingers; wherein the drain fingers of the first set of drain fingers are arranged in line with respective drain fingers of the second set of drain fingers for forming respective pairs of aligned drain fingers, and wherein the gate fingers are operatively coupled with respective pairs of aligned drain fingers. an input terminal; an output terminal; a substrate; a first DC blocking capacitor having a first terminal and a grounded second terminal; a semiconductor die mounted on the substrate and comprising: a semiconductor substrate; an RF power field-effect transistor, `FET', integrated on said semiconductor substrate, the RF power FET having an output capacitance (Cds) and being configured to operate within an operational frequency range; a gate bondbar connected to the input terminal directly or via an input impedance matching stage using a plurality of gate bondwires; a first drain bondbar connected to the output terminal directly or via an output impedance matching stage using a plurality of drain bondwires; a second drain bondbar arranged in between the gate bondbar and the first drain bondbar; a plurality of first bondwires connecting the second drain bondbar to the first terminal of the first DC blocking capacitor; a semiconductor substrate; an RF power field-effect transistor, `FET', integrated on said semiconductor substrate, the RF power FET having an output capacitance (Cds) and being configured to operate within an operational frequency range; a gate bondbar connected to the input terminal directly or via an input impedance matching stage using a plurality of gate bondwires; a first drain bondbar connected to the output terminal directly or via an output impedance matching stage using a plurality of drain bondwires; a second drain bondbar arranged in between the gate bondbar and the first drain bondbar; a plurality of first bondwires connecting the second drain bondbar to the first terminal of the first DC blocking capacitor; wherein the RF power FET comprises: a plurality of gate fingers that are electrically connected to the gate bondbar and that each extend from the gate bondbar towards the first drain bondbar and underneath the second drain bondbar; a first set of drain fingers that each extend in an area between the second drain bondbar and the first drain bondbar, a plurality of gate fingers that are electrically connected to the gate bondbar and that each extend from the gate bondbar towards the first drain bondbar and underneath the second drain bondbar; a first set of drain fingers that each extend in an area between the second drain bondbar and the first drain bondbar, characterized in that the RF power FET further comprises a second set of drain fingers that each extend in an area between the second drain bondbar and the gate bondbar, wherein each of the plurality of gate fingers is operatively coupled with a respective drain finger of the first and second set of drain fingers; wherein the drain fingers of the first set of drain fingers are arranged in line with respective drain fingers of the second set of drain fingers for forming respective pairs of aligned drain fingers, and wherein the gate fingers are operatively coupled with respective pairs of aligned drain fingers.