A power converter comprising: - a modular multilevel converter in which a plurality of cells are connected in series via output terminals of each cell, each cell in addition having at least one pair of switching elements connected in series, and a capacitor connected in parallel to end terminals of the at least one pair of switching elements; - a plurality of bypass circuits each corresponding to a corresponding cell of the plurality of the cells; and - a controller that controls each of the plurality of bypass circuits based on whether a failure occurs in the corresponding cell; wherein - each of the plurality of bypass circuits is connected between the output terminals of the corresponding cell; characterized in that the controller is further configured to control each bypass circuit when its corresponding cell is in normal operation i.e. when said failure is not detected, in synchronization with a switching operation of said corresponding cell in said normal operation, so that: the bypass circuit is opened, when the at least one pair of switching elements of said corresponding cell is in a first state in which an output voltage across the output terminals of said corresponding cell is the voltage of the capacitor of said corresponding cell, and the bypass circuit is closed when the at least one pair of switching elements of said corresponding cell is in a second state in which an output voltage across the output terminals of said corresponding cell is not the voltage of the capacitor of said corresponding cell. - a modular multilevel converter in which a plurality of cells are connected in series via output terminals of each cell, each cell in addition having at least one pair of switching elements connected in series, and a capacitor connected in parallel to end terminals of the at least one pair of switching elements; - a plurality of bypass circuits each corresponding to a corresponding cell of the plurality of the cells; and - a controller that controls each of the plurality of bypass circuits based on whether a failure occurs in the corresponding cell; wherein - each of the plurality of bypass circuits is connected between the output terminals of the corresponding cell; characterized in that the controller is further configured to control each bypass circuit when its corresponding cell is in normal operation i.e. when said failure is not detected, in synchronization with a switching operation of said corresponding cell in said normal operation, so that: the bypass circuit is opened, when the at least one pair of switching elements of said corresponding cell is in a first state in which an output voltage across the output terminals of said corresponding cell is the voltage of the capacitor of said corresponding cell, and the bypass circuit is closed when the at least one pair of switching elements of said corresponding cell is in a second state in which an output voltage across the output terminals of said corresponding cell is not the voltage of the capacitor of said corresponding cell. characterized in that the controller is further configured to control each bypass circuit when its corresponding cell is in normal operation i.e. when said failure is not detected, in synchronization with a switching operation of said corresponding cell in said normal operation, so that: the bypass circuit is opened, when the at least one pair of switching elements of said corresponding cell is in a first state in which an output voltage across the output terminals of said corresponding cell is the voltage of the capacitor of said corresponding cell, and the bypass circuit is closed when the at least one pair of switching elements of said corresponding cell is in a second state in which an output voltage across the output terminals of said corresponding cell is not the voltage of the capacitor of said corresponding cell.