A method for bonding and interconnecting a first IC device arranged on a first substrate to a second IC device arranged on a second substrate, wherein each IC device comprises a dielectric bonding layer (5a,5b) at its outer surface, and wherein each IC device further comprises one or more metal contact structures (4a, 4b,17), wherein the method comprises the steps of: • producing at least one cavity in the outer surface of the first IC device, the cavity traversing at least the dielectric bonding layer of the first IC device, and thereafter: • aligning the first substrate with respect to the second substrate, and forming a substrate assembly by direct bonding between the bonding layers (5a,5b), so that in the substrate assembly the cavity formed in the first IC device overlaps a contact structure (4b,17) of the second IC device, and thereafter: • after bonding, optionally thinning the first substrate and thereafter: • etching a Through Substrate Via opening in the first substrate, the TSV opening overlapping the cavity, • forming an aggregate opening comprising the TSV opening and the cavity, thereby exposing at least part of the contact structure (4b,17) of the second IC device, • after the formation of an isolation liner on at least part of the sidewalls of the aggregate opening, producing a metal interconnection plug in the aggregate opening, that contacts the contact structure (4b,17) of the second IC device, and forms at least part of an interconnection path between the contact structure of the second IC device and a contact structure of the first IC device. • producing at least one cavity in the outer surface of the first IC device, the cavity traversing at least the dielectric bonding layer of the first IC device, and thereafter: • aligning the first substrate with respect to the second substrate, and forming a substrate assembly by direct bonding between the bonding layers (5a,5b), so that in the substrate assembly the cavity formed in the first IC device overlaps a contact structure (4b,17) of the second IC device, and thereafter: • after bonding, optionally thinning the first substrate and thereafter: • etching a Through Substrate Via opening in the first substrate, the TSV opening overlapping the cavity, • forming an aggregate opening comprising the TSV opening and the cavity, thereby exposing at least part of the contact structure (4b,17) of the second IC device, • after the formation of an isolation liner on at least part of the sidewalls of the aggregate opening, producing a metal interconnection plug in the aggregate opening, that contacts the contact structure (4b,17) of the second IC device, and forms at least part of an interconnection path between the contact structure of the second IC device and a contact structure of the first IC device. • aligning the first substrate with respect to the second substrate, and forming a substrate assembly by direct bonding between the bonding layers (5a,5b), so that in the substrate assembly the cavity formed in the first IC device overlaps a contact structure (4b,17) of the second IC device, and thereafter: • after bonding, optionally thinning the first substrate and thereafter: • etching a Through Substrate Via opening in the first substrate, the TSV opening overlapping the cavity, • forming an aggregate opening comprising the TSV opening and the cavity, thereby exposing at least part of the contact structure (4b,17) of the second IC device, • after the formation of an isolation liner on at least part of the sidewalls of the aggregate opening, producing a metal interconnection plug in the aggregate opening, that contacts the contact structure (4b,17) of the second IC device, and forms at least part of an interconnection path between the contact structure of the second IC device and a contact structure of the first IC device. • after bonding, optionally thinning the first substrate and thereafter: • etching a Through Substrate Via opening in the first substrate, the TSV opening overlapping the cavity, • forming an aggregate opening comprising the TSV opening and the cavity, thereby exposing at least part of the contact structure (4b,17) of the second IC device, • after the formation of an isolation liner on at least part of the sidewalls of the aggregate opening, producing a metal interconnection plug in the aggregate opening, that contacts the contact structure (4b,17) of the second IC device, and forms at least part of an interconnection path between the contact structure of the second IC device and a contact structure of the first IC device. • etching a Through Substrate Via opening in the first substrate, the TSV opening overlapping the cavity, • forming an aggregate opening comprising the TSV opening and the cavity, thereby exposing at least part of the contact structure (4b,17) of the second IC device, • after the formation of an isolation liner on at least part of the sidewalls of the aggregate opening, producing a metal interconnection plug in the aggregate opening, that contacts the contact structure (4b,17) of the second IC device, and forms at least part of an interconnection path between the contact structure of the second IC device and a contact structure of the first IC device.