An output circuit, configured to output communication signals to an external device in a communication mode and configured to supply a load current to the external device in a serial input/output mode, the output circuit comprising: a first transistor which is of the PNP type, the first transistor being capable of outputting a collector current as the communication signals in the communication mode and of supplying a collector current as the load current in the serial input/output mode, wherein the first transistor comprises a base terminal, an emitter terminal and a collector terminal; a first current source, which is, in the communication mode, configured to change a base current of the first transistor based on an input control signal, wherein, in response to the output circuit outputting a high level signal, the first current source is configured to provide a sink current (Isink) to reduce the base current of the first transistor in order to turn on the first transistor, and wherein, in response to the output circuit outputting a low level signal, the first current source is configured to stop providing the sink current (Isink) in order to turn off the first transistor, the first current source, in the serial input/output mode, being further configured to reduce the base current to a predetermined current value after the first transistor is turned on and before the first transistor is turned off, the first transistor outputting the collector current as the load current, wherein the first current source is coupled between the base terminal of the first transistor and a reference potential line; a second current source that is configured to supply a constant current to the base of the first transistor when the first transistor is turned off; a second transistor that is connected to a signal line outputting the communication signals and a reference potential line, and which is configured to be turned on when the first transistor is turned off, and a diode having an anode and a cathode which are respectively coupled to the signal line and a drain of the second transistor, wherein, by turning on the second transistor when the first transistor is turned off, an interline parasitic capacity between the signal line and the reference potential line is discharged, so that the time for discharging the collector current in the first transistor is accelerated. a first transistor which is of the PNP type, the first transistor being capable of outputting a collector current as the communication signals in the communication mode and of supplying a collector current as the load current in the serial input/output mode, wherein the first transistor comprises a base terminal, an emitter terminal and a collector terminal; a first current source, which is, in the communication mode, configured to change a base current of the first transistor based on an input control signal, wherein, in response to the output circuit outputting a high level signal, the first current source is configured to provide a sink current (Isink) to reduce the base current of the first transistor in order to turn on the first transistor, and wherein, in response to the output circuit outputting a low level signal, the first current source is configured to stop providing the sink current (Isink) in order to turn off the first transistor, the first current source, in the serial input/output mode, being further configured to reduce the base current to a predetermined current value after the first transistor is turned on and before the first transistor is turned off, the first transistor outputting the collector current as the load current, wherein the first current source is coupled between the base terminal of the first transistor and a reference potential line; a second current source that is configured to supply a constant current to the base of the first transistor when the first transistor is turned off; a second transistor that is connected to a signal line outputting the communication signals and a reference potential line, and which is configured to be turned on when the first transistor is turned off, and a diode having an anode and a cathode which are respectively coupled to the signal line and a drain of the second transistor, wherein, by turning on the second transistor when the first transistor is turned off, an interline parasitic capacity between the signal line and the reference potential line is discharged, so that the time for discharging the collector current in the first transistor is accelerated.