An amplification stage comprising: a differential amplifier configured to receive a differential input signal and comprising transistors (402, 406; 404, 408), the transistors (402, 406; 404, 408) comprising: first and second p-channel metal-oxide semiconductor, PMOS, transistors (402, 404), and first and second n-channel metal-oxide semiconductor, NMOS, transistors (406, 408), wherein a drain of the first NMOS transistor is connected to a drain of the first PMOS transistor, and a drain of the second NMOS transistor is connected to a drain of the second PMOS transistor, wherein the drains of the first and second NMOS transistors (406, 408) comprise a differential output of the amplification stage, and wherein gates of the first and second NMOS transistors (406, 408) comprise a differential input of the amplification stage to receive the differential input signal; first cross-coupled NMOS transistors (412, 414) connected with their drains with sources of the first and second NMOS transistors (406, 408) of the differential amplifier and connected with their sources with a second voltage rail; a first impedance connected with the drains of the first cross-coupled NMOS transistors (412, 414); second cross-coupled PMOS transistors (504, 506) connected with their sources with a first voltage rail (Vdd) and connected with their drains with sources of the first and second PMOS transistors (402, 404) of the differential amplifier; and a second impedance connected with the drains of the second cross-coupled PMOS transistors (504, 506). a differential amplifier configured to receive a differential input signal and comprising transistors (402, 406; 404, 408), the transistors (402, 406; 404, 408) comprising: first and second p-channel metal-oxide semiconductor, PMOS, transistors (402, 404), and first and second n-channel metal-oxide semiconductor, NMOS, transistors (406, 408), wherein a drain of the first NMOS transistor is connected to a drain of the first PMOS transistor, and a drain of the second NMOS transistor is connected to a drain of the second PMOS transistor, wherein the drains of the first and second NMOS transistors (406, 408) comprise a differential output of the amplification stage, and wherein gates of the first and second NMOS transistors (406, 408) comprise a differential input of the amplification stage to receive the differential input signal; first and second p-channel metal-oxide semiconductor, PMOS, transistors (402, 404), and first and second n-channel metal-oxide semiconductor, NMOS, transistors (406, 408), wherein a drain of the first NMOS transistor is connected to a drain of the first PMOS transistor, and a drain of the second NMOS transistor is connected to a drain of the second PMOS transistor, wherein the drains of the first and second NMOS transistors (406, 408) comprise a differential output of the amplification stage, and wherein gates of the first and second NMOS transistors (406, 408) comprise a differential input of the amplification stage to receive the differential input signal; first cross-coupled NMOS transistors (412, 414) connected with their drains with sources of the first and second NMOS transistors (406, 408) of the differential amplifier and connected with their sources with a second voltage rail; a first impedance connected with the drains of the first cross-coupled NMOS transistors (412, 414); second cross-coupled PMOS transistors (504, 506) connected with their sources with a first voltage rail (Vdd) and connected with their drains with sources of the first and second PMOS transistors (402, 404) of the differential amplifier; and a second impedance connected with the drains of the second cross-coupled PMOS transistors (504, 506).