A semiconductor device comprising: a first structure comprising a substrate, circuit elements on the substrate, and lower interconnections on the circuit elements; and a second structure on the first structure, wherein the second structure comprises: a source structure having a first region, CR, and a second region, ER; gate electrodes provided on the source structure and spaced apart from each other, extending in a first direction parallel to an upper surface of the substrate, and comprising pad regions forming a step structure on the second region; separation patterns, SP, passing through the gate electrodes and extending in the first direction; first vertical structures, VS1, provided between the separation patterns on the first region and extending through the gate electrodes; and second vertical structures, VS2, provided between the separation patterns, on the second region and extending through the pad regions of the gate electrodes, and wherein the second vertical structures comprise support structures and contact structures, CS1, provided between the support structures, characterised in that the second vertical structures and the first vertical structures have a common lattice arrangement; wherein the contact structures are electrically connected to each other in one group and are commonly connected to a first gate electrode among the gate electrodes to provide one gate contact plug, CMC, wherein the one gate contact plug comprises a contact extension, CL, that extends between the contact structures constituting the one group, wherein the first gate electrode comprises a contact pad region, 130RP, having an increased thickness, and wherein the contact extension is directly connected to the contact pad region of the first gate electrode. a first structure comprising a substrate, circuit elements on the substrate, and lower interconnections on the circuit elements; and a second structure on the first structure, wherein the second structure comprises: a source structure having a first region, CR, and a second region, ER; gate electrodes provided on the source structure and spaced apart from each other, extending in a first direction parallel to an upper surface of the substrate, and comprising pad regions forming a step structure on the second region; separation patterns, SP, passing through the gate electrodes and extending in the first direction; first vertical structures, VS1, provided between the separation patterns on the first region and extending through the gate electrodes; and second vertical structures, VS2, provided between the separation patterns, on the second region and extending through the pad regions of the gate electrodes, and a source structure having a first region, CR, and a second region, ER; gate electrodes provided on the source structure and spaced apart from each other, extending in a first direction parallel to an upper surface of the substrate, and comprising pad regions forming a step structure on the second region; separation patterns, SP, passing through the gate electrodes and extending in the first direction; first vertical structures, VS1, provided between the separation patterns on the first region and extending through the gate electrodes; and second vertical structures, VS2, provided between the separation patterns, on the second region and extending through the pad regions of the gate electrodes, and wherein the second vertical structures comprise support structures and contact structures, CS1, provided between the support structures, characterised in that the second vertical structures and the first vertical structures have a common lattice arrangement; wherein the contact structures are electrically connected to each other in one group and are commonly connected to a first gate electrode among the gate electrodes to provide one gate contact plug, CMC, wherein the one gate contact plug comprises a contact extension, CL, that extends between the contact structures constituting the one group, wherein the first gate electrode comprises a contact pad region, 130RP, having an increased thickness, and wherein the contact extension is directly connected to the contact pad region of the first gate electrode.