A memory comprising: a first plurality (202, 502) of memory elements comprising a first row group (204, 504), each of the first plurality of memory elements having a first terminal, a second terminal, and a third terminal; a second plurality (212, 512) of memory elements comprising a second row group (214, 514), each of the second plurality of memory elements having a fourth terminal (251, 551), a fifth terminal (238, 538), and a sixth terminal (234, 534), wherein the first row group (204, 504) and the second row group (214, 514) are in the same memory array (200, 500); a first plurality of M bit lines (241-248, 541-548), each configured to be coupled to one of the first terminals (250, 550) and one of the fourth terminals (251, 551); a first local source line (239, 539) coupled to the second terminals (238, 538), wherein the first local source line (239, 539) is (i) connected only to the memory elements comprised in the first row group (204, 504) and (ii) not accessible to circuitry outside the memory array; a second local source line coupled to the fifth terminals (238,538), wherein the second local source line is (i) connected only to the memory elements comprised in the second row group (214, 514) and (ii) not accessible to circuitry outside the memory array; a first word line (236, 536) coupled to the third terminals (234, 534); a second word line (237, 537) coupled to the sixth terminals (234, 534); and circuitry coupled to the first and second word lines (236,536, 237,537) and configured to select one of the first and second row groups (204, 504; 214, 514), and coupled to the first plurality of M bit lines; characterized in that the circuitry is further configured to apply a current of magnitude N/M-1 through the memory elements in the selected row group coupled to M-1 of the first plurality of M bit lines and the local source line associated with the selected row group, which is returned as a current of magnitude N through the remaining memory element in the selected row group which is coupled to remaining bit line and the local source line which is associated with the selected row group, wherein the current of magnitude N changes a state of the memory element in the selected row group, and the current of magnitude N/M-1 does not change the state of the memory elements coupled to the remaining M-1 bit lines. a first plurality (202, 502) of memory elements comprising a first row group (204, 504), each of the first plurality of memory elements having a first terminal, a second terminal, and a third terminal; a second plurality (212, 512) of memory elements comprising a second row group (214, 514), each of the second plurality of memory elements having a fourth terminal (251, 551), a fifth terminal (238, 538), and a sixth terminal (234, 534), wherein the first row group (204, 504) and the second row group (214, 514) are in the same memory array (200, 500); a first plurality of M bit lines (241-248, 541-548), each configured to be coupled to one of the first terminals (250, 550) and one of the fourth terminals (251, 551); a first local source line (239, 539) coupled to the second terminals (238, 538), wherein the first local source line (239, 539) is (i) connected only to the memory elements comprised in the first row group (204, 504) and (ii) not accessible to circuitry outside the memory array; a second local source line coupled to the fifth terminals (238,538), wherein the second local source line is (i) connected only to the memory elements comprised in the second row group (214, 514) and (ii) not accessible to circuitry outside the memory array; a first word line (236, 536) coupled to the third terminals (234, 534); a second word line (237, 537) coupled to the sixth terminals (234, 534); and circuitry coupled to the first and second word lines (236,536, 237,537) and configured to select one of the first and second row groups (204, 504; 214, 514), and coupled to the first plurality of M bit lines; characterized in that the circuitry is further configured to apply a current of magnitude N/M-1 through the memory elements in the selected row group coupled to M-1 of the first plurality of M bit lines and the local source line associated with the selected row group, which is returned as a current of magnitude N through the remaining memory element in the selected row group which is coupled to remaining bit line and the local source line which is associated with the selected row group,