A source driver for use in a TFT-LCD, comprising: a data register for registering multiple display data, the multiple display data corresponding to a plurality of pixel units in a row of pixel units of the TFT-LCD; a data latch for latching the multiple display data in the data register; a digital-to-analog converter for converting the multiple display data latched in the data latch into corresponding multiple gray-scale voltages; and an output buffer, comprising a plurality of buffer units, for outputting the multiple gray-scale voltages via output ends of the plurality of buffer units, the output ends comprising odd output ends and even output ends; characterized in further comprising: a data difference determination circuit for determining, upon updating an n-th row of display data as latched in the data latch, whether at least one or more of respective differences between multiple display data in an (n+1)-th row as registered in the data register and multiple display data in the n-th row as latched in the data latch is larger than a first predetermined threshold, wherein a first loading pulse and a second loading pulse are provided to the data latch and the output buffer only upon a determination that the at least one or more of the respective differences is larger than the first predetermined threshold, wherein the data latch has a first terminal for receiving the first loading pulse and a second terminal for receiving the second loading pulse, the data latch being configured to latch the multiple display data in the data register in response to a first edge of the first loading pulse from a first level to a second level and a first edge of the second loading pulse from a first level to a second level, wherein the output buffer is configured to start to output gray-scale voltages of the odd output ends to corresponding TFT sources in response to a second edge of the first loading pulse from the second level to the first level, which second edge of the first loading pulse immediately follows the first edge of the first loading pulse, and wherein the output buffer is further configured to start to output gray-scale voltages of the even output ends to corresponding TFT sources in response to a second edge of the second loading pulse from the second level to the first level, which second edge of the second loading pulse immediately follows the first edge of the second loading pulse, at least the second edge of the first loading pulse being not synchronous with the second edge of the second loading pulse. a data register for registering multiple display data, the multiple display data corresponding to a plurality of pixel units in a row of pixel units of the TFT-LCD; a data latch for latching the multiple display data in the data register; a digital-to-analog converter for converting the multiple display data latched in the data latch into corresponding multiple gray-scale voltages; and an output buffer, comprising a plurality of buffer units, for outputting the multiple gray-scale voltages via output ends of the plurality of buffer units, the output ends comprising odd output ends and even output ends; characterized in further comprising: a data difference determination circuit for determining, upon updating an n-th row of display data as latched in the data latch, whether at least one or more of respective differences between multiple display data in an (n+1)-th row as registered in the data register and multiple display data in the n-th row as latched in the data latch is larger than a first predetermined threshold, wherein a first loading pulse and a second loading pulse are provided to the data latch and the output buffer only upon a determination that the at least one or more of the respective differences is larger than the first predetermined threshold, wherein the data latch has a first terminal for receiving the first loading pulse and a second terminal for receiving the second loading pulse, the data latch being configured to latch the multiple display data in the data register in response to a first edge of the first loading pulse from a first level to a second level and a first edge of the second loading pulse from a first level to a second level, wherein the output buffer is configured to start to output gray-scale voltages of the odd output ends to corresponding TFT sources in response to a second edge of the first loading pulse from the second level to the first level, which second edge of the first loading pulse immediately follows the first edge of the first loading pulse, and wherein the output buffer is further configured to start to output gray-scale voltages of the even output ends to corresponding TFT sources in response to a second edge of the second loading pulse from the second level to the first level, which second edge of the second loading pulse immediately follows the first edge of the second loading pulse, at least the second edge of the first loading pulse being not synchronous with the second edge of the second loading pulse. a data difference determination circuit for determining, upon updating an n-th row of display data as latched in the data latch, whether at least one or more of respective differences between multiple display data in an (n+1)-th row as registered in the data register and multiple display data in the n-th row as latched in the data latch is larger than a first predetermined threshold, wherein a first loading pulse and a second loading pulse are provided to the data latch and the output buffer only upon a determination that the at least one or more of the respective differences is larger than the first predetermined threshold,