A vision module in an image signal processor comprising: an interface circuit configured to receive an image; a front-end circuit portion configured to: receive the image via the interface circuit and generate a current luminance image (450A, 450B) based on the received image, and generate an updated luminance image (454A, 454B), which is a resized version of the current luminance image (450A, 405B); and a back-end circuit portion coupled to an output of the front-end circuit portion, the back-end circuit portion comprising a resizer circuit (418A, 418B) and a computer vision circuit (420, 422, 428) performing resizing operations and computer vision operations in parallel, wherein: the resizer circuit (418A, 418B) is configured to generate a scaled luminance image (456A, 458A) which is a resized version of the updated luminance image (454A, 458B) during a first time period, the computer vision circuit (420, 422, 428) is configured to perform a computer vision operation on the updated luminance image (454A, 454B) in parallel with generating of the scaled luminance image during the first time period, the resizer circuit (418A, 418B) is further configured to generate an updated scaled luminance image (456B, 458B) by resizing the scaled luminance image (456A, 458A) during a second time period subsequent to the first time period, and the computer vision circuit (420, 422, 428) is further configured to perform the computer vision operation on the scaled luminance image (456A, 458A) in parallel with generating of the updated scaled luminance image (456B, 458B) by the resizer circuit (418A, 418B) during the second time period. an interface circuit configured to receive an image; a front-end circuit portion configured to: receive the image via the interface circuit and generate a current luminance image (450A, 450B) based on the received image, and generate an updated luminance image (454A, 454B), which is a resized version of the current luminance image (450A, 405B); and a back-end circuit portion coupled to an output of the front-end circuit portion, the back-end circuit portion comprising a resizer circuit (418A, 418B) and a computer vision circuit (420, 422, 428) performing resizing operations and computer vision operations in parallel, wherein: the resizer circuit (418A, 418B) is configured to generate a scaled luminance image (456A, 458A) which is a resized version of the updated luminance image (454A, 458B) during a first time period, the computer vision circuit (420, 422, 428) is configured to perform a computer vision operation on the updated luminance image (454A, 454B) in parallel with generating of the scaled luminance image during the first time period, the resizer circuit (418A, 418B) is further configured to generate an updated scaled luminance image (456B, 458B) by resizing the scaled luminance image (456A, 458A) during a second time period subsequent to the first time period, and the computer vision circuit (420, 422, 428) is further configured to perform the computer vision operation on the scaled luminance image (456A, 458A) in parallel with generating of the updated scaled luminance image (456B, 458B) by the resizer circuit (418A, 418B) during the second time period. receive the image via the interface circuit and generate a current luminance image (450A, 450B) based on the received image, and generate an updated luminance image (454A, 454B), which is a resized version of the current luminance image (450A, 405B); and a back-end circuit portion coupled to an output of the front-end circuit portion, the back-end circuit portion comprising a resizer circuit (418A, 418B) and a computer vision circuit (420, 422, 428) performing resizing operations and computer vision operations in parallel, wherein: the resizer circuit (418A, 418B) is configured to generate a scaled luminance image (456A, 458A) which is a resized version of the updated luminance image (454A, 458B) during a first time period, the computer vision circuit (420, 422, 428) is configured to perform a computer vision operation on the updated luminance image (454A, 454B) in parallel with generating of the scaled luminance image during the first time period, the resizer circuit (418A, 418B) is further configured to generate an updated scaled luminance image (456B, 458B) by resizing the scaled luminance image (456A, 458A) during a second time period subsequent to the first time period, and the computer vision circuit (420, 422, 428) is further configured to perform the computer vision operation on the scaled luminance image (456A, 458A) in parallel with generating of the updated scaled luminance image (456B, 458B) by the resizer circuit (418A, 418B) during the second time period. the resizer circuit (418A, 418B) is configured to generate a scaled luminance image (456A, 458A) which is a resized version of the updated luminance image (454A, 458B) during a first time period, the computer vision circuit (420, 422, 428) is configured to perform a computer vision operation on the updated luminance image (454A, 454B) in parallel with generating of the scaled luminance image during the first time period, the resizer circuit (418A, 418B) is further configured to generate an updated scaled luminance image (456B, 458B) by resizing the scaled luminance image (456A, 458A) during a second time period subsequent to the first time period, and the computer vision circuit (420, 422, 428) is further configured to perform the computer vision operation on the scaled luminance image (456A, 458A) in parallel with generating of the updated scaled luminance image (456B, 458B) by the resizer circuit (418A, 418B) during the second time period.