A method of generating an implementation of a circuit design on a programmable integrated circuit, the circuit design having a critical portion and a non-critical portion, wherein the programmable integrated circuit comprises: a configuration memory including a plurality of memory cells of a first type and a plurality of memory cells of a second type; programmable interconnect resources coupled to the configuration memory, wherein a first subset of the programmable interconnect resources are programmable by a subset of the configuration memory cells of the first type, and a second subset of the programmable interconnect resources are programmable by a subset of the configuration memory cells of the second type; programmable logic resources coupled to the configuration memory, wherein a first subset of the programmable logic resources are programmable by a subset of the configuration memory cells of the first type, and a second subset of the programmable logic resources are programmable by a subset of the configuration memory cells of the second type; wherein the first type of configuration memory cells have greater immunity to single event upsets than the second type of configuration memory cells; the method comprising: on a programmed processor, performing operations of: inputting the circuit design; generating initial data for implementing the circuit design by synthesizing the circuit design; determining the critical portion and the non-critical portion of the circuit design; generating second data for programming configuration memory cells of the programmable integrated circuit to implement the circuit design by mapping, placing and routing the circuit design; wherein a first subset of the second data is assigned to program configuration memory cells of the first type to implement a voting circuit for the critical portion of the circuit design on the first subset of programmable logic resources and the first subset of programmable interconnect resources of the programmable integrated circuit; wherein a second subset of the second data is assigned to program configuration memory cells of the second type to implement the critical portion as a triple modular redundant circuit and the non-critical portion of the circuit design on the second subset of programmable logic resources and the second subset of programmable interconnect resources of the programmable integrated circuit; storing the second data in an electronically readable storage medium. a configuration memory including a plurality of memory cells of a first type and a plurality of memory cells of a second type; programmable interconnect resources coupled to the configuration memory, wherein a first subset of the programmable interconnect resources are programmable by a subset of the configuration memory cells of the first type, and a second subset of the programmable interconnect resources are programmable by a subset of the configuration memory cells of the second type; programmable logic resources coupled to the configuration memory, wherein a first subset of the programmable logic resources are programmable by a subset of the configuration memory cells of the first type, and a second subset of the programmable logic resources are programmable by a subset of the configuration memory cells of the second type; wherein the first type of configuration memory cells have greater immunity to single event upsets than the second type of configuration memory cells; inputting the circuit design; generating initial data for implementing the circuit design by synthesizing the circuit design; determining the critical portion and the non-critical portion of the circuit design; generating second data for programming configuration memory cells of the programmable integrated circuit to implement the circuit design by mapping, placing and routing the circuit design; wherein a first subset of the second data is assigned to program configuration memory cells of the first type to implement a voting circuit for the critical portion of the circuit design on the first subset of programmable logic resources and the first subset of programmable interconnect resources of the programmable integrated circuit; wherein a second subset of the second data is assigned to program configuration memory cells of the second type to implement the critical portion as a triple modular redundant circuit and the non-critical portion of the circuit design on the second subset of programmable logic resources and the second subset of programmable interconnect resources of the programmable integrated circuit; storing the second data in an electronically readable storage medium.