An electronic protection circuit for interrupting a current flowing through a power circuit (2, 3), the electronic protection circuit comprising: a trip switch structured to open to interrupt the current flowing through the power circuit (2, 3) and to close to permit the current to flow through the power circuit (2, 3); a current sensing circuit including a first resistor, a second resistor, and a first switch, and being structured to sense when a magnitude of the current flowing through the power circuit (2, 3) is greater than a predetermined magnitude and, in response thereto, to close the first switch; a trip circuit structured to control the trip switch to open in response to the current sensing circuit sensing that the magnitude of the current flowing through the power circuit (2, 3) is greater than the predetermined magnitude and to control the trip switch to close when the current sensing circuit does not sense that the magnitude of the current flowing through the power circuit (2, 3) is greater than the predetermined magnitude; and a processor having a routine, the routine being structured to monitor a characteristic of the trip circuit and, when the monitored characteristic meets a predetermined criteria, to enter an override mode, wherein, in the override mode, the routine of the processor is structured to output a first signal to the trip circuit which controls the trip circuit to control the trip switch to open and remain open regardless of the magnitude of the current flowing through the power circuit (2, 3); wherein the current sensing circuit is structured to output a second signal to the trip circuit in response to sensing that the magnitude of the current flowing through the power circuit (2, 3) is greater than the predetermined magnitude; wherein the trip circuit includes a second switch and a third switch; wherein the second switch is structured to receive the second signal from the current sensing circuit and to close in response to receiving the second signal; wherein the third switch is structured to open when the second switch closes; wherein, when the third switch is open, the trip circuit is configured to control the trip switch to open; wherein the third switch is electrically coupled to the processor; and wherein the routine of the processor is structured to cause the processor to output the first signal to the third switch to open when in the override mode. a trip switch structured to open to interrupt the current flowing through the power circuit (2, 3) and to close to permit the current to flow through the power circuit (2, 3); a current sensing circuit including a first resistor, a second resistor, and a first switch, and being structured to sense when a magnitude of the current flowing through the power circuit (2, 3) is greater than a predetermined magnitude and, in response thereto, to close the first switch; a trip circuit structured to control the trip switch to open in response to the current sensing circuit sensing that the magnitude of the current flowing through the power circuit (2, 3) is greater than the predetermined magnitude and to control the trip switch to close when the current sensing circuit does not sense that the magnitude of the current flowing through the power circuit (2, 3) is greater than the predetermined magnitude; and a processor having a routine, the routine being structured to monitor a characteristic of the trip circuit and, when the monitored characteristic meets a predetermined criteria, to enter an override mode, wherein, in the override mode, the routine of the processor is structured to output a first signal to the trip circuit which controls the trip circuit to control the trip switch to open and remain open regardless of the magnitude of the current flowing through the power circuit (2, 3); wherein the current sensing circuit is structured to output a second signal to the trip circuit in response to sensing that the magnitude of the current flowing through the power circuit (2, 3) is greater than the predetermined magnitude; wherein the trip circuit includes a second switch and a third switch; wherein the second switch is structured to receive the second signal from the current sensing circuit and to close in response to receiving the second signal; wherein the third switch is structured to open when the second switch closes; wherein, when the third switch is open, the trip circuit is configured to control the trip switch to open; wherein the third switch is electrically coupled to the processor; and wherein the routine of the processor is structured to cause the processor to output the first signal to the third switch to open when in the override mode.