A semiconductor storage device, comprising: a controller package having a BGA (Ball Grid Array) terminal on a bottom surface thereof; and one or a plurality of memory packages each including a plurality of semiconductor storage elements and mounted on the controller package; wherein: the controller package includes: a bottom substrate having the BGA terminal on a bottom surface thereof; a top substrate at a top surface of the controller package; a power supply IC (Integrated Circuit), mounted on the bottom substrate, for supplying a plurality of power supplies; and a controller mounted on the bottom substrate and operable by the plurality of power supplies supplied from the power supply IC, the controller providing an interface with an external system via the BGA terminal and controlling a read operation from the semiconductor storage elements and a write operation to the semiconductor storage elements; wherein a memory terminal pattern for mounting the one or plurality of memory packages thereon is formed on the top surface of the top substrate and the memory terminal pattern includes a plurality of electrodes for mounting the memory package, the memory terminal pattern being connected to the controller; and the one or plurality of memory packages are mounted on, and electrically connected to, the memory terminal pattern. a controller package having a BGA (Ball Grid Array) terminal on a bottom surface thereof; and one or a plurality of memory packages each including a plurality of semiconductor storage elements and mounted on the controller package; wherein: the controller package includes: a bottom substrate having the BGA terminal on a bottom surface thereof; a top substrate at a top surface of the controller package; a power supply IC (Integrated Circuit), mounted on the bottom substrate, for supplying a plurality of power supplies; and a controller mounted on the bottom substrate and operable by the plurality of power supplies supplied from the power supply IC, the controller providing an interface with an external system via the BGA terminal and controlling a read operation from the semiconductor storage elements and a write operation to the semiconductor storage elements; wherein a memory terminal pattern for mounting the one or plurality of memory packages thereon is formed on the top surface of the top substrate and the memory terminal pattern includes a plurality of electrodes for mounting the memory package, the memory terminal pattern being connected to the controller; and the one or plurality of memory packages are mounted on, and electrically connected to, the memory terminal pattern. the controller package includes: a bottom substrate having the BGA terminal on a bottom surface thereof; a top substrate at a top surface of the controller package; a power supply IC (Integrated Circuit), mounted on the bottom substrate, for supplying a plurality of power supplies; and a controller mounted on the bottom substrate and operable by the plurality of power supplies supplied from the power supply IC, the controller providing an interface with an external system via the BGA terminal and controlling a read operation from the semiconductor storage elements and a write operation to the semiconductor storage elements; wherein a memory terminal pattern for mounting the one or plurality of memory packages thereon is formed on the top surface of the top substrate and the memory terminal pattern includes a plurality of electrodes for mounting the memory package, the memory terminal pattern being connected to the controller; and a bottom substrate having the BGA terminal on a bottom surface thereof; a top substrate at a top surface of the controller package; a power supply IC (Integrated Circuit), mounted on the bottom substrate, for supplying a plurality of power supplies; and a controller mounted on the bottom substrate and operable by the plurality of power supplies supplied from the power supply IC, the controller providing an interface with an external system via the BGA terminal and controlling a read operation from the semiconductor storage elements and a write operation to the semiconductor storage elements; wherein a memory terminal pattern for mounting the one or plurality of memory packages thereon is formed on the top surface of the top substrate and the memory terminal pattern includes a plurality of electrodes for mounting the memory package, the memory terminal pattern being connected to the controller; and the one or plurality of memory packages are mounted on, and electrically connected to, the memory terminal pattern.