A low distortion transconductance amplifier circuit, comprising: an input stage configured to generate an input current (I IN) at an input node, the input stage comprising an input voltage source coupled to a reference resistor (R REF), an output stage having a grounded load (R L); and a transconductance amplifier including: a virtual ground input stage including: an operational amplifier, in a negative feedback configuration, having a first input coupled to the input node and a second input coupled to ground, the operational amplifier, in the negative feedback configuration, being configured to provide a virtual ground at the input node by forcing a differential voltage between the first input and the second input to substantially zero; and a first transistor and a second transistor arranged with the first transistor as a Darlington pair, a base terminal of the first transistor being coupled to an output of the operational amplifier to be driven by the operational amplifier, and an emitter of the second transistor being coupled to the input node; a bias current source coupled to the Darlington pair and the operational amplifier at the input node; and a pair of current mirrors (108a, 108b), each current mirror coupling the virtual ground input stage to the output stage at an output node for supplying an output current (I OUT) to the grounded load (R L), wherein the Darlington pair connects the operational amplifier to the pair of current mirrors (108a, 108b), wherein the bias current source is arranged to deliver a bias current (I b), which is drawn from a first current mirror of the pair of current mirrors (108a, 108b), to the input node. an input stage configured to generate an input current (I IN) at an input node, the input stage comprising an input voltage source coupled to a reference resistor (R REF), an output stage having a grounded load (R L); and a transconductance amplifier including: a virtual ground input stage including: an operational amplifier, in a negative feedback configuration, having a first input coupled to the input node and a second input coupled to ground, the operational amplifier, in the negative feedback configuration, being configured to provide a virtual ground at the input node by forcing a differential voltage between the first input and the second input to substantially zero; and a first transistor and a second transistor arranged with the first transistor as a Darlington pair, a base terminal of the first transistor being coupled to an output of the operational amplifier to be driven by the operational amplifier, and an emitter of the second transistor being coupled to the input node; a bias current source coupled to the Darlington pair and the operational amplifier at the input node; and a pair of current mirrors (108a, 108b), each current mirror coupling the virtual ground input stage to the output stage at an output node for supplying an output current (I OUT) to the grounded load (R L), wherein the Darlington pair connects the operational amplifier to the pair of current mirrors (108a, 108b), a virtual ground input stage including: an operational amplifier, in a negative feedback configuration, having a first input coupled to the input node and a second input coupled to ground, the operational amplifier, in the negative feedback configuration, being configured to provide a virtual ground at the input node by forcing a differential voltage between the first input and the second input to substantially zero; and a first transistor and a second transistor arranged with the first transistor as a Darlington pair, a base terminal of the first transistor being coupled to an output of the operational amplifier to be driven by the operational amplifier, and an emitter of the second transistor being coupled to the input node; an operational amplifier, in a negative feedback configuration, having a first input coupled to the input node and a second input coupled to ground, the operational amplifier, in the negative feedback configuration, being configured to provide a virtual ground at the input node by forcing a differential voltage between the first input and the second input to substantially zero; and a first transistor and a second transistor arranged with the first transistor as a Darlington pair, a base terminal of the first transistor being coupled to an output of the operational amplifier to be driven by the operational amplifier, and an emitter of the second transistor being coupled to the input node; a bias current source coupled to the Darlington pair and the operational amplifier at the input node; and a pair of current mirrors (108a, 108b), each current mirror coupling the virtual ground input stage to the output stage at an output node for supplying an output current (I OUT) to the grounded load (R L), wherein the Darlington pair connects the operational amplifier to the pair of current mirrors (108a, 108b), wherein the bias current source is arranged to deliver a bias current (I b), which is drawn from a first current mirror of the pair of current mirrors (108a, 108b), to the input node.