An active equalizer circuit comprising: a plurality of switching transistors (Q 1 ~Q 12) coupled respectively to battery cells in a series battery pack (B 1 ∼B 12) on a one-to-one basis, and configured to control on/off of a charging/discharging circuit for the respective battery cells; a driving transformer (T 2) comprising a first primary winding and a plurality of first secondary windings, with each of the first secondary windings being coupled to a control terminal of a corresponding switching transistor (Q 1 ~Q 12) on a one-to-one basis through a driving circuit; a multi-port converter comprising an equalizing transformer (T 1) and a bridge converter, wherein the equalizing transformer (T 1) comprises a second primary winding and a plurality of second secondary windings, output terminals of the bridge converter are coupled respectively to the first primary winding and the second primary windings, and each of the second secondary windings is coupled to a corresponding plurality of battery cells in the series battery pack (B 1 ~B 12); characterized in that it further comprises a buck converter having input terminals coupled to output terminals of the series battery pack (B 1 ∼B 12) and output terminals coupled to input terminals of the bridge converter; a microcontroller configured to output a first control signal to the buck converter, to make the buck converter transform an output voltage of the series battery pack (B 1 ~B 12) and output the transformed output voltage to the bridge converter, and configured to output a second control signal to the bridge converter, to control an operation state of the bridge converter, and wherein the bridge converter comprises a first capacitor (C b2), a second capacitor (C h1), a third capacitor (C h2) and two field effect transistors (Q h1, Q h2), wherein the first capacitor is coupled across the output terminals of the buck converter at the input terminals of the bridge converter, the second capacitor and the third capacitor are connected in series across the terminals of the first capacitor, and the two field effect transistors (Qh1, Qh2) are connected in series across the terminals of the first capacitor, wherein the node between the two field effect transistors (Qh1, Qh2) and the node between the second and third capacitors (Ch1, Ch2) form the output terminals of the bridge converter. a plurality of switching transistors (Q 1 ~Q 12) coupled respectively to battery cells in a series battery pack (B 1 ∼B 12) on a one-to-one basis, and configured to control on/off of a charging/discharging circuit for the respective battery cells; a driving transformer (T 2) comprising a first primary winding and a plurality of first secondary windings, with each of the first secondary windings being coupled to a control terminal of a corresponding switching transistor (Q 1 ~Q 12) on a one-to-one basis through a driving circuit; a multi-port converter comprising an equalizing transformer (T 1) and a bridge converter, wherein the equalizing transformer (T 1) comprises a second primary winding and a plurality of second secondary windings, output terminals of the bridge converter are coupled respectively to the first primary winding and the second primary windings, and each of the second secondary windings is coupled to a corresponding plurality of battery cells in the series battery pack (B 1 ~B 12); characterized in that it further comprises a buck converter having input terminals coupled to output terminals of the series battery pack (B 1 ∼B 12) and output terminals coupled to input terminals of the bridge converter; a microcontroller configured to output a first control signal to the buck converter, to make the buck converter transform an output voltage of the series battery pack (B 1 ~B 12) and output the transformed output voltage to the bridge converter, and configured to output a second control signal to the bridge converter, to control an operation state of the bridge converter, and wherein the bridge converter comprises a first capacitor (C b2), a second capacitor (C h1), a third capacitor (C h2) and two field effect transistors (Q h1, Q h2), wherein the first capacitor is coupled across the output terminals of the buck converter at the input terminals of the bridge converter, the second capacitor and the third capacitor are connected in series across the terminals of the first capacitor, and the two field effect transistors (Qh1, Qh2) are connected in series across the terminals of the first capacitor, wherein the node between the two field effect transistors (Qh1, Qh2) and the node between the second and third capacitors (Ch1, Ch2) form the output terminals of the bridge converter.