Abstract:
The present invention provides a wafer packing. The wafer packing includes a box, at least two sponges, at least two hollow support pads, and a plurality of wafers. The sponges are put on a bottom and under a lid of the box, the hollow support pads are put between sponges, and each wafer is put between adjacent hollow support pads touching a non-complete wafer area of each wafer.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     1. Field of the Invention  
         [0002]     The invention relates to wafer packing, and more particularly, to wafer packing that avoids wafer pollution and saves space.  
         [0003]     2. Description of the Prior Art  
         [0004]     The manufacturing of semiconductor wafers includes many complex processes. Processes for forming transistors or other devices on semiconductor wafers and processes for packaging wafers are usually undertaken by different manufacturers, or performed in different factories. When a wafer manufacturer ships the wafers to a packager, the wafers are stored in cartons or wafer transfer apparatuses, for delivery to the packager.  
         [0005]     Please refer to  FIG. 1  that is schematic diagram of wafer packing according to prior art. A wafer packing  10  includes a cassette  12  for depositing a plurality of wafers  14 , and utilizes a interleaf  16  between adjacent wafers  14  for separating the wafers  14 . The function of the interleaf  16  is to prevent damage to the wafers  14  from other wafers  14  touching them, rubbing, shaking, and crashing during shipment. Furthermore, the prior art uses a plurality of sponges  18  put on a bottom  20  and under a lid  22  of the cassette  12 , for protecting the wafers  14  from touching the cassette  12 . Generally, first, the sponge  18  is set on the bottom  22  of the cassette  12 , and then the interleafs  16  and the wafers  14  are alternately stacked onto the sponge  18 . Another interleaf  16  is put on each wafer  14  and another wafer  14  is put on each interleaf  16 . When the cassette  12  has about ten of the wafers  14 , another interleaf  16  and sponge  18  are put on the top wafer  14  and then the cover  22  is affixed on the sponge  18 , meaning a batch of wafers are securely loaded into the packing  10 . Finally, a quantity of wafer packing  10  is stored in a carton of one of various sizes. However, the interleaf  16  directly contacts a surface of the wafer  14 , so the surface of the wafer  14  may become polluted and scraped. Therefore, another method of wafer packing has been developed.  
         [0006]     Please refer to  FIG. 2  that is schematic diagram of wafer packing according to another prior art. As shown in  FIG. 2 , U.S. Pat. No. 6,581,264 issued to Ohori et al. discloses a wafer packing of a front opening shipping box (FOSB). The FOSB wafer packing  30  comprises a cassette  32  having a plurality of support grooves  36 , and each support groove  36  forms a groove (not shown) to hold a wafer. The wafers  34  are put in the grove for separating and fixing each wafer  36  in place. The cassette  32  also comprises many additional structures that are not illustrated. As above-mentioned, in order to avoid interleafs polluting wafers, the FOSB wafer packing  30  was developed, but utilizing FOSB wafer packing  30  to pack 12 inch wafers for shipment is disadvantageous to costs. Due to the structure of the support grooves  36  and the cassette  32 , a volume of a batch of wafer packing  30  is very huge, and the number of wafer packings  30  in a carton is decreased so that the shipping cost is increased. Therefore, for solving problems with pollution and volume, a factory developed another form of wafer packing.  
         [0007]     Please refer to  FIG. 3  that is schematic diagram of wafer packing  50  according to another prior art. As shown in  FIG. 3 , US Patent Application Publication 2004/0149623 discloses a wafer packing  50 . The wafer packing  50  includes a cassette  52 , and a sponge  58 , wafers  54 , and pads  56  for separating wafers  54  and are put into the cassette  52  in a manner similar to that used putting the wafers  14  and the interleafs  16  into the cassette  12  in  FIG. 1 . Moreover, the structure of the pad  56  includes a top surface  60 , a first recessed portion  62 , and a second recessed portion  64 . When the wafer  54  is put on the first recessed portion  62  of the pad  62 , the top surface  60  and the first recessed portion  62  form a ladder-like structure for fixing the wafer and preventing the wafer  54  from sliding. The second recessed portion  64  is for depositing solders  66  or other devices of the wafer  54 . The depth of the second recessed portion  64  is greater than or equal to the height of the solders  66  of the wafer  54 . Although the solder  66  or others devices of the wafer  54  are detached from the pad  56 , a top surface of the wafers  54  still touches the pad  56 . In addition, the pad  56  needs the ladder structure of the top surface  60  and the first recessed portion  62  to fix the wafers  54  in place, and needs the second recessed portion  64  to deposit the solders  66  of the wafer  54 . If the wafer  54  is not fixed to the first recessed portion  62  and the second recessed portion  64 , the wafer  54  may break. Therefore, this prior art wafer packing  50  utilizes the pad  56  to prevent damage to the solders  66  of a bottom of the wafers  54  and others devices, but the first recessed portion  62  of the pad  56  might lock the wafers  54  while the wafers  54  is took out.  
       SUMMARY OF THE INVENTION  
       [0008]     It is therefore a primary objective of the claimed invention to provide a wafer packing to solve the above-mentioned problems.  
         [0009]     According to the claimed invention, the present invention provides a wafer packing. The wafer packing includes a box, at least two sponges, at least two hollow support pads, and a plurality of wafers. The sponges are deposited on a bottom and under a lid of the box, the hollow support pads are deposited on and between the sponges, and each wafer is deposited on and between two adjacent hollow support pads that contact a non-complete wafer area of each wafer edge.  
         [0010]     The present invention utilizes hollow support pads inserted between each wafer in the wafer packing, in order to separate stacked wafers. The present invention can avoid the pollution and scraping of the wafers from the wafers touching with interleafs, and decreases the volume of wafer packing, reducing shipping costs. Furthermore, the present invention can prevent the damage from shaking of the wafers during shipment.  
         [0011]     These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0012]      FIG. 1  to  FIG. 3  are schematic diagrams of a wafer packing according to prior art.  
         [0013]      FIG. 4  is a schematic diagram of a wafer packing according to the present invention.  
         [0014]      FIG. 5  to  FIG. 10  are schematic diagram of the hollow support pad according present invention.  
     
    
     DETAILED DESCRIPTION  
       [0015]     Please refer to  FIG. 4  that is a schematic diagram of a wafer packing  70  according to the present invention. The wafer packing  70  includes a cassette  72 , at least two sponges  78 , and a plurality of hollow support pads  76  for depositing a plurality of wafers  74 . First, at least one of the sponges  78  is put on a bottom of the cassette  72 , and at least one hollow support pad  76  and a wafer  74  are alternately put on the sponges  78 . Other hollow support pads  76  and other wafers  74  are continuously and repeatedly stacked in alternation on the bottom wafer  74  until the cassette is filled with  25  wafers  74 , although this quantity is not limiting as other quantities are equally possible. Then, a lid  82  of the cassette  72  covers and completes the batch of wafer packing  70 . A quantity of wafer packings  70  is stored in a carton (not shown) for shipment. In addition, the hollow support pads  76  touch a non-complete wafer area of the wafers  74 , so the complete wafer area of the wafers  74  cannot be polluted and/or scrapped by touching the hollow support pads  76 .  
         [0016]     Also, please refer to  FIG. 5  through  FIG. 10 , which are schematic diagrams of the hollow support pad  76  according present invention. The hollow support pads  76  can be many structures, such as a rounded pad like an O-ring, a C-shape pad, near rounded pad, and at least two arc pads. As shown in  FIG. 5  to  FIG. 7 , the hollow support pad  76  is rounded pad, and an internal periphery ( FIG. 5 ) or external periphery ( FIG. 6 ) of the rounded hollow support pad  76  can be toothlike in shape, can have two toothlike peripheries ( FIG. 7 ), or two smooth peripheries. As shown in  FIG. 8 , the hollow support pad  76  can be a C-shape pad with an angle  94  of the C-shape hollow support pad  76  greater than 180 degrees. The shape of the support pad should supports the wafer uniformly, but the structure of the support pad is not limited to the above-mentioned shape.  
         [0017]     The materials of the hollow support pads  76  can be plastic, an electrical conductor, or magnetic materials, having a width ((external diameter of the pad—internal diameter of the pad) divided by 2) greater than 3 mm, and a thickness greater than 1 mm. Besides, as shown in  FIG. 9  and  FIG. 10 , the hollow support pad  76  can be two or three pieces of arc magnetic materials. It can be noted that the hollow support pad  76  can be a mixture of the above-mentioned structures, but the above-mentioned structures do not limit the shape of the hollow support pad  76 . On the other hand, the hollow support pad  76  can be a rounded or tube-like pad, but the rounded pad has at least one raised portion touching the non-complete wafer area of the wafer  74 .  
         [0018]     The present invention utilizes the hollow support pads  76  to separate wafers  74 . The complete wafer area of wafers  74  does not touch the hollow support pads  76 , so the surface of the wafers  74  does not get polluted and scraped by touching the hollow support pads  76 . Moreover, the present invention wafer packing  70  stacks the wafers  74 , and uses the cassette  72  to fix and prevent movement of the wafers  74 , so the diameter of the hollow support pads  76  is the same size as the wafers  74 . Therefore, we can use the original cassette  72 , without a need to change the width or height of the cassette. The present invention can effectively decrease the volume of wafer packing  70  by holding more wafers  74  in a single cassette while not decreasing the quantity of wafer packings  70  in a carton, and therefore decreases shipping costs.  
         [0019]     To sum up, when related to the wafer packing of prior art, the present invention utilizes hollow support pads in the wafer packing and can be applied to ship  12 ″ wafers and thin wafers. Not only can the present invention avoid the polluting and scraping of the wafer from the wafer touching an interleaf, but it also decreases the volume problem of the FOSB wafer packing when the hollow support pads separate the wafers. In addition, the pads of prior art cannot solve the volume, pollution, and abrasion problems at which the present invention is directed. The present invention can eliminate the above-mentioned problems, and further decrease shipping costs.  
         [0020]     Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.