Abstract:
An oscillator and frequency divider provide a plurality of different frequency signals in response to any indication of vehicle abnormality. A plurality of switches indicate vehicle status such as a door, ignition and the like. A gate circuit having a plurality of gates passes one of said frequency signals at any one time in response to the particular vehicle abnormality indicated by a control circuit responsive to the switches. An alarm signal is generated having a frequency that is a function of the signal passed through the gate circuit.

Description:
BACKGROUND OF THE INVENTION 
     This invention relates to a warning signal generating device for a vehicle, which generates a warning signal to warn the user or operator of negligence in using a seat belt, negligence in removing a key, negligence in turning off a vehicle light, or an excessively high vehicle speed. 
     In general, a vehicle has a variety of warning signal generating devices, in which different mechanical sound generating elements are used for generating different warning sounds. Therefore, in the conventional devices, the warning sounds may have unsatisfactory tones. Furthermore, the conventional devices need a special timer circuit for controlling the warning sound generating time. Thus, the conventional devices are high in manufacturing cost and are liable to become bulky. 
     SUMMARY OF THE INVENTION 
     Accordingly, an object of this invention is to eliminate the above-described difficulties accompanying a conventional warning signal generating device, and more specifically to provide a warning signal generating device which is simple in construction and is operated electrically. 
     In order to achieve the foregoing object, in this invention, a plurality of different waveform signals are obtained from an oscillation frequency division circuit, and the waveform signals are combined with control signals provided respectively for different objects to be controlled in a gate circuit, so that one and the same alarm unit is caused to generate different warning signals, e.g. different in frequency of occurrence, and the warning signal generating condition of the alarm unit is stopped or changed by a timer signal which is produced by the oscillation frequency division circuit in a predetermined period of time. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     Embodiments of this invention will be described with reference to the accompanying drawings, in which: 
     FIG. 1 is a circuit diagram showing one example of a warning signal generating device for a vehicle according to this invention; 
     FIG. 2 is a waveform diagram for a description of the operation of the circuit in FIG. 1; 
     FIG. 3 is a circuit diagram showing another example of the gate circuit in FIG. 1; 
     FIG. 4 is a circuit diagram showing another example of the oscillation frequency division circuit in FIG. 1 and a further example of the gate circuit in FIG. 1; and 
     FIG. 5 is a circuit diagram showing another example of the warning signal generating device according to the invention. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     FIG. 1 shows one embodiment of the invention for preventing negligence in buckling a seat belt and negligence in removing an engine key. A warning signal generating device 1 for a vehicle according to this embodiment comprises: an ignition switch 2, a door switch 3, a negligence preventing switch 4, a detecting means 5, a control circuit 6, an oscillation frequency division circuit 7, a gate circuit 8 and an alarm unit 9. 
     The ignition switch 2 is turned on when the vehicle engine key is turned on. An input terminal 11 of a circuit unit 10 is connected to the ignition switch 2, which is connected through an electric source 16 to ground at 15. The door switch 3 is to detect whether a vehicle door is open or not. The door switch 3 is closed when the door is open. The door switch 3 is connected between an input terminal 13 of the circuit unit 10 and ground 15. The negligence preventing switch 4 is to detect the status of a vehicle component, such as the insertion of an engine key. The switch 4 is, for instance, a key switch 4, which is closed when the engine key is inserted. The switch 4 is connected between an input terminal 12 of the circuit unit 10 and the positive terminal of the electric source 16. The detecting means 5 is seat belt switch 5 1  which, under the condition that the ignition switch 2 is turned on, detects the fact that a seat belt is not buckled, or that the user has forgotten to wear the seat belt. The seat belt switch 5 1  is turned on when the user does not wear the seat belt. The switch 5 1  is connected between the input terminal 11 and an input terminal 14. 
     When, under the condition that the ignition switch 2 is turned on, the detecting means 5 (or the seat belt switch 5 1 ) detects the fact that the object to be detected is in an abnormal state, the control circuit 6 provides a first control signal S 1 . When the door switch 3 detects the fact that the door is open and the key switch 4 1  detects that fact that the user has forgotten to remove the engine key, the control circuit 6 provides a second control signal S 2 . 
     In the control circuit 6, one terminal of a resistor 16 is connected to the input terminal 12, and the other terminal of the resistor 17 is connected to the cathode of a Zener diode 18 for constant voltage, the anode of which is connected to ground 15. The cathode of the Zener diode 18 is connected to the emitter of a PNP type switching transistor 19 the collector of which is connected through a resistor 25a to ground 15. The cathode of the Zener diode 18 is further connected through a resistor 25 to the collector of an NPN type switching transistor 20, the emitter of which is grounded. 
     The base of the transistor 19 is connected through a resistor 21 and backward through a diode 24a to the input terminal 11. The connecting point between the resistor 21 and the diode 24a is connected through a resistor 22 and a diode 24b to the input terminal 13. The base of the transistor 20 is connected through a resistor 23 to the input terminal 14. The aforementioned first and second control signals S 1  and S 2  are provided at the collectors of the transistors 19 and 20, respectively. 
     The oscillation frequency division circuit 7 produces first and second waveform signals f 1  and f 2  from different frequency division stages and generates a timer signal S 3  in a predetermined period of time. In the circuit 7, a frequency division circuit 26, which is of a well known type, is connected to the cathode of the Zener diode 18. An oscillator 27 and a waveform composing circuit 28, also of a well known type, are connected to the input and output of the frequency division circuit 26, respectively. The oscillation frequency division circuit 7 further comprises a NAND gate 29 for setting a delay time, an EXCLUSIVE OR gate 30 for resetting, an inverter 31 and an AND gate 32. The NAND gate 29 receives an output from the last output stage in the frequency division circuit 26 and a signal from a part of the gate circuit 8 (described later), and the output of the NAND gate 29 is applied to the AND gate 32. The two input terminals of the EXCUSIVE OR gate 30 are connected to the collectors of the aforementioned transistors 19 and 20. The output of the EXCLUSIVE OR gate 30 is connected to the reset terminal of the frequency division circuit 26, and is connected through the inverter 31 and the AND gate 32 to the oscillator 27. 
     In response to the aforementioned time signal S 3 , the gate circuit 8 supplies a first drive signal S 4  obtained by combining the first control signal S 1  and the first waveform signal f 1 , or a second drive signal S 5  obtained by combining the second control signal S 2  and the second waveform signal f 2 , for the predetermined delay time. The gate circuit 8 comprises AND gates 33, 34 and 35, a NOR gate 36 and an OR gate 37 in combination. The NOR gate and the AND gate 33 are each connected to the collectors of the transistors 19 and 20. The output of the NOR gate 36 is connected to one input terminal of the NAND gate 29 in the oscillation frequency division circuit 7 and to one input terminal of the AND gate 34. The output of the AND gate 33 is connected to one input terminal of the AND gate 35. The AND gates 34 and 35 receive the first and second waveform signals f 1  and f 2 , respectively, from the output terminals of the waveform combining circuit 28, and output the first and second drive signals S 4  and S 5 , respectively, which are applied through the OR gate 37 to the alarm unit 9. The alarm unit 9 is a sound generating element such as a piezo-electric element, which generates different warning sounds A in accordance with the first and second drive signals S 4  and S 5 . 
     The operation of the warning signal generating device will be described with reference to a time chart in FIG. 2. 
     When the vehicle&#39;s key is inserted and the vehicle is operated under the condition that the seat belt is not fastened to the user (or operator), then the ignition switch 2, the key switch 4 1  and the seat belt switch 5 1  are all closed, and power necessary for the operation of the frequency division circuit 26 is supplied from the electric source 16. Under this condition, a high voltage is applied through the ignition switch 2 to the base of the transistor 19, so that the latter 19 is rendered non-conductive (off). Furthermore, a high voltage is applied through the ignition switch 2 and the seat belt switch 5 1  to the base of the transistor 20, so that the latter 20 is rendered conductive (on). As a result, the collector outputs of the transistors 19 and 20 are at a low logical level (hereinafter referred to merely as an &#34;L&#34; level); that is, the otuputs of the control circuit 6 are at the &#34;L&#34; level. The two &#34;L&#34; level outputs are applied as the first control signals S 1  to the gate circuit 8. The EXCLUSIVE OR circuit 30 in the oscillation frequency division circuit 7, receiving the two &#34;L&#34; level outputs, outputs an &#34;L&#34; level signal, which is converted into a signal at a high logical level (hereinafter referred to merely as an &#34;H&#34; level) by the inverter 31. The &#34;H&#34; level signal is applied to one input terminal of the AND gate 32. 
     An &#34;L&#34; level signal at the last stage output of the frequency division circuit 26 and the &#34;H&#34; level output of the NOR gate 36 are applied to the NAND gate 29, and therefore the latter 29 provides an &#34;H&#34; level output which is applied to the other input terminal of the AND gate 32. Thus, the AND gate 32 provides an &#34;H&#34; level output to start oscillation. That is, the oscillator 27 and the frequency division circuit 26 start their operation, and accordingly the waveform combining circuit 28 continuously outputs the first and second waveform signals f 1  and f 2 . On the other hand, the NOR gate 36 in the gate circuit 8, receiving the low level first control signals S 1 , outputs an &#34;H&#34; level signal which is applied to the AND gate 34. Thus, when three inputs to the AND gate 34 are at the &#34;H&#34; level, the AND gate 34 outputs the first drive signal S 4 , which is applied through the OR gate 37 to the alarm unit 9. In this case, the alarm unit 9 generates a warning sound A in accordance with the frequency of the first waveform signal f 1 . 
     If the user subsequently wears the seat belt, the seat belt switch 5 1  is turned off and the collector output of the transistor 20 is raised to the &#34;H&#34; level, and accordingly the &#34;L&#34; level output from gate 30 due to the two &#34;L&#34; level first control signals S 1  disappears, whereupon the operation of the oscillator 27 is stopped and the warning sound A from the alarm unit 9 is also stopped as indicated by the broken line in FIG. 2. At the same time, the oscillation frequency division circuit 26 is reset by the &#34;H&#34; level signal from the EXCLUSIVE OR gate 30. 
     If the user does not wear the seat belt although the warning sound is being generated, the warning sound is nevertheless stopped after a predetermined delay time. That is, when a predetermined delay time T O  passes while the &#34;L&#34; level first control signal S 1  is still being provided, the frequency division circuit 26 eventually provides an &#34;H&#34; level frequency division output at its last stage output, which is applied to the NAND gate 29. This &#34;H&#34; level output provided at the last stage output, and the &#34;H&#34; level output of the NOR gate 36, are both received by the NAND gate 29, and the latter 29 then applies an &#34;L&#34; level time signal S 3  to one input terminal of the AND gate 32. Even though the &#34;H&#34; level output of the inverter 31 is still applied to the other input terminal of the AND gate 32, and &#34;L&#34; level timer signal S 3  is supplied to the oscillator 27. Consequently, the oscillation of the oscillator 27 is suspended, so that the generation of the warning sound A is stopped. Since the &#34;L&#34; level output of the NAND gate 29 is applied to one input terminal of the AND gate 34, the warning sound A is positively stopped. The delay time T O  can be changed as desired by changing the frequency division stage in the frequency division circuit 26 from which the other input to the gate 29 is taken. 
     In the case when the user leaves the vehicles by opening the door with the key left in the ignition but turned off, the door switch 3 and the key switch 4 1  are closed. In this case, since a base current flows through the resistors 21 and 22, the diode 24b and the door switch, the transistor 19 is rendered conductive. Since the ignition switch 2 is turned off, the other transistor 20 is in an &#34;off&#34; state. Therefore, the transistors 19 and 20 output &#34;H&#34; level signals, that is, the &#34;H&#34; level second control signals S 2  are provided. Both of these second control signals S 2  are applied to the EXCLUSIVE OR circuit 30, and therefore an &#34;L&#34; level output is provided by the latter 30. Accordingly, the oscillator 27 is started by the &#34;H&#34; level signal. On the other hand, the second control signals S 2  are applied to the AND gate 33, and therefore the latter 33 supplies an &#34;H&#34; level output to one input terminal of the AND gate 35. Thus, the AND gate 35, receiving the second waveform signal f 2  and the &#34;H&#34; level output of the AND gate 33, applies the second drive signal S 5  to the alarm unit 9. Therefore, the alarm unit 9 generates a second warning sound A in accordance with the frequency of the second waveform signal f 2 , which is different in frequency from the above-described first warning sound A. This new warning sound A is continuously generated until the key switch 4 1  is turned off, i.e., until the engine key is removed. 
     In other cases, i.e. with no detected abnormality, the control circuit 6 provides an &#34;H&#34; level output and an &#34;L&#34; level output. Therefore, the AND gates 34 and 35 in the gate circuit 8 are not opened, and the EXCLUSIVE OR gate 30 applies an &#34;H&#34; level signal to the frequency division circuit 26 to reset the latter 26. The &#34;H&#34; level signal of the EXCLUSIVE OR gate 30 is also converted into an &#34;L&#34; level signal by the inverter 31, which is applied to the oscillator 27 to stop the latter 27. 
     The alarm sound A produced in response to the signals f 1  and f 2  may very in any number of ways. For example, the sound may be of constant tone with the duty cycle varying between the different signals so that signal f 1  would produce beeps of approximately 50% duty cycle while signal f 2  would produce pairs of short beeps. If the alarm is visual, the flashing frequency could be varied in the same manner. Alternatively, a different tone may be produced in response to the different signals f 1  and f 2 . For purposes of the above and following descriptions, it will be assumed that only the duty cycle and periodicity of the visual or audio alarm is varied, i.e. in the case of an audio alarm the tone is always the same but the frequency and duration of the tone bursts is varied. However, it should be emphasized that this is by way of example only and the invention is not limited thereto. 
     FIG. 3 shows another example of the timer signal S 3  generating means. In the circuit shown in FIG. 3, the timer signal S 3  is provided by a counter circuit 38. The counter circuit 38 starts counting in response to the output of the NOR gate 36 in the gate circuit 8, to count a waveform signal f k  from a waveform combining circuit 28. When the count value of the counter circuit 38 reaches a predetermined value, the counter circuit 38 produces an &#34;H&#34; level timer signal S 3 . The timer signal S 3  is applied through an OR gate 40 to a frequency division circuit 26 to reset the latter 26. The timer signal S 3  is further applied through an inverter 39 and an AND gate 32 to the oscillator 27, that is, an &#34;L&#34; level signal is applied to stop the latter 27. Since the count value of the counter circuit 38 can be set as desired, the time instant of generation of the timer signal S 3 , i.e., the delay time T O  can be selected as desired. 
     Another embodiment of the invention is shown in FIG. 4. In this embodiment, the warning sound A is generated for the time interval which elapses from the time instant when the negligence of wearing the seat belt is detected until a predetermined delay time T O  passes, and thereafter a new and different warning sound A is intermittently generated. That is, initially, the alarm unit 9 generates the warning sound A at the frequency of a first waveform signal f 1  provided through an AND gate 34. After the lapse of the delay time T O , an AND gate 41 in an oscillation frequency division circuit 7, receiving the last stage output of a frequency division circuit 26 and the &#34;H&#34; level output of a NOR gate 36, applies an &#34;H&#34; level timer signal S 3  to a latch circuit 41a which then supplies the timer signal S 3  to one input terminal of an AND gate 42 in a gate circuit 8. In this case, since the &#34;H&#34; level signals are applied to all of the input terminals of a 3-input AND gate 42, the latter 42 introduces a waveform signal f n  from the waveform combining circuit 28 to the alarm unit 9. Therefore, after the delay time T O , the alarm unit 9 generates a warning sound A intermittently at the frequency of the broken line in FIG. 2. Since the timer signal S 3 , after being converted into an &#34;L&#34; level signal by an inverter 43, is applied to an AND gate 34, the output of the first waveform signal f 1  is positively stopped under this condition. The latch circuit will be cleared when the seat belt is buckled by an &#34;H&#34; level signal from inverter 41b. If preferred, the latch circuit could be connected instead between the inverter 43 and AND gate 34 so that the gate 34 would be held disabled but the gate 42 would only be intermittently enabled by the signal S 3 . 
     Another embodiment of the invention is as shown in FIG. 5. In the warning signal generating device 1, a speed warning sound and a sound for warning of negligence in turning off a light on the vehicle are generated. A negligence preventing switch 4, which is a light switch 4 2  in this case, is connected between an input terminal 11 and the positive terminal of an electric source 16. An illuminating light 44 is connected between an input terminal of the light switch 4 2  and ground. A detecting means 5, which is a speed sensor in this case, is connected to an input terminal 13. 
     In a control circuit 6 of the warning signal generating device 1, a series circuit of a diode 45, a resistor 46 and a Zener diode 47 for constant voltage is connected between an input terminal 12 and ground. The cathode of the Zener diode 47 is connected through a resistor 48 to the collector of an NPN type transistor 50 the emitter of which is grounded. The cathode of the Zener diode 47 is further connected through a resistor 49 to the collector of an NPN type transistor 51 the emitter of which is grounded at 15. The bases of these transistors 50 and 51 are connected through resistors 56 and 57 to input terminals 12 and 13, respectively. The input terminal 11 is connected to the emitter of a transistor 52, the collector of which is connected through a diode 54 to the cathode of the diode 45. The base of the transistor 52 is connected through a resistor 53 and a diode 55 to an input terminal 14. 
     In this embodiment, an oscillation frequency division circuit 7 and a gate circuit 8 are essentially similar to those in FIG. 1 except that one input terminal of the NAND gate 29 for setting a delay time T O  is connected to the output of the AND gate 33 instead of the output of the NOR gate 36. 
     The operation of the device thus organized will now be described. 
     When the vehicle is in operation, the ignition switch 2 is closed, and therefore power is supplied to the frequency division circuit 26 and a base current is supplied to the transistor 50 to render the latter 50 conductive (on). When, under this condition, the vehicle travellng speed reaches a predetermined value, the speed sensor 5 2  provides an &#34;H&#34; level output which is applied to the transistor 51 to render the latter conductive (on). Thus, &#34;L&#34; level signals, i.e. first control signals S 1 , are provided at the collectors of the transistors 50 and 51. Therefore, similarly as in the embodiment of FIG. 1, the alarm unit 9 continuously generates a warning sound A at the frequency of the first waveform signal f 1 . 
     If the operator opens the door and leaves the vehicle, with the light 44 remaining on, then the light switch 4 2  and the door switch 3 are closed. Therefore, a base current is applied to the transistor 52, and power is supplied to the frequency division circuit 26 by the electric source 16, although the ignition switch 2 is opened in this case. Under this condition, both the transistors 50 and 51 are in &#34;off&#34; states, and therefore the control circuit 6 provides &#34;H&#34; level signals, i.e. second control signals S 2 , which are applied to the AND gate 33. Thus, the &#34;H&#34; level signals are applied to all of the input terminals of the AND gate 35. Therefore, the second waveform signal f 2  is introduced, as the second drive signal S 5 , to the alarm unit 9, to drive the latter 9 at the frequency f 2 . Since the &#34;H&#34; level output of the AND gate 33 is applied to one input terminal of the AND gate 29, similarly as in the above-described embodiment, the warning sound is automatically stopped after the predetermined delay time T O . 
     In this embodiment, the warning sound is generated for a predetermined period of time to warn the operator of negligence in turning off the light; however, the device may be modified such that, in the case also where the vehicle speed reaches the predetermined value, the warning sound is generated for only a predetermined period of time. This can be readily achieved by applying the output of the NOR gate 29 to the AND gate 34. The alarm unit 9 may be a light emitting element instead of the sound generating element, or may be constituted by both a light emitting element and a sound generating element. 
     The control circuit 6, the oscillation frequency division circuit 7 and the gate circuit, have been disclosed by way of example only, and can be formed by other logical circuits if they perform the required functions. 
     The invention will provide the following excellent advantages: 
     Since the oscillation frequency division circuit is made up of the oscillator, the frequency division circuit and the waveform combining circuit, the output waveform signal frequencies can be selected as desired and are stable, and therefore the alarm sounds are also stable. These waveform signals can also be utilized for other additional devices. This is advantageous in the case where additional circuits are provided. I.e., since the waveform combining circuit produces several kinds of waveform signals from the frequency division output, one and the same unit can effectively produce different frequency warning signals for different warning conditions. 
     Since the circuit units, especially the oscillation frequency division circuit and the gate circuit, can be provided on one chip of integrated circuits, the warning signal generating device can be made small in size and can be manufactured at low cost. Since the oscillation frequency division circuit produces various signals on the time axis, timing control wherein the warning signal is produced for a predetermined period of time and is then stopped, or wherein the warning signal is changed after it is generated for a certain period of time, can be readily achieved by modifying the logical circuits. 
     In the case where the warning items are arranged in the order of priority, the warning signals may be produced in the order of priority by utilizing the outputs on the time axis of the frequency division circuit as outputs in time division mode.