Abstract:
A method for fabricating a semiconductor package is disclosed, which includes the steps of: providing a carrier having a release layer and an adhesive layer sequentially formed thereon; disposing a plurality of semiconductor chips on the adhesive layer; forming an encapsulant on the adhesive layer for encapsulating the semiconductor chips; disposing a substrate on the encapsulant; exposing the release layer to light through the carrier so as to remove the release layer and the carrier; and then removing the adhesive layer, thereby effectively preventing the semiconductor chips from being exposed to light so as to avoid any photo damage to the semiconductor chips.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to methods for fabricating semiconductor packages, and, more particularly, to a method for fabricating a semiconductor package that protects semiconductor chips from being damaged by light. 
         [0003]    2. Description of Related Art 
         [0004]    Currently, there are various types of semiconductor packages available in the market by various manufacturers. As semiconductor chips tend to become miniaturized nowadays, semiconductor processing technologies are required to be continuously improved so as to facilitate fabrication of lighter, thinner, shorter, and smaller electronic products. 
         [0005]      FIGS. 1A to 1E  are schematic cross-sectional views illustrating a method for fabricating a semiconductor package as disclosed by U.S. Pat. No. 7,202,107. 
         [0006]    Referring to  FIG. 1A , a carrier  10  is provided and an adhesive layer  11  made of a thermal release tape, for example, is formed on the carrier  10 . 
         [0007]    Referring to  FIG. 1B , a plurality of semiconductor chips  12  are attached to the adhesive layer  11 . 
         [0008]    Referring to  FIG. 1C , an encapsulant  13  is formed on the adhesive layer  11  by molding for encapsulating the semiconductor chips  12 . 
         [0009]    Referring to  FIG. 1D , the carrier  10  and the adhesive layer  11  are removed by heating. 
         [0010]    Referring to  FIG. 1E , a circuit layer  14  is formed on a lower surface of the encapsulant  13  and electrically connected to the semiconductor chips  12 . 
         [0011]    However, a position deviation easily occurs to the semiconductor chips due to expansion of the thermal release tape when being heated and impact of the mold flow during the molding process. As such, when a redistribution layer is formed subsequently, the redistribution layer cannot be aligned with and electrically connected to the semiconductor chips, thereby lowering the product reliability. Further, the use of the thermal release tape incurs a high fabrication cost. 
         [0012]    Therefore, how to overcome the above-described disadvantages has become urgent. 
       SUMMARY OF THE INVENTION 
       [0013]    In view of the above-described drawbacks, the present invention provides a method for fabricating a semiconductor package, which comprises the steps of: providing a carrier having a release layer and an adhesive layer sequentially formed thereon; disposing a plurality of semiconductor chips on the adhesive layer; forming an encapsulant on the adhesive layer for encapsulating the semiconductor chips; and exposing the release layer to light through the carrier so as to remove the release layer and the carrier. 
         [0014]    In an embodiment, the method further comprises forming a metal layer between the release layer and the adhesive layer. 
         [0015]    After removing the release layer, the above-described method can further comprise removing the metal layer. 
         [0016]    The metal layer can be 1 μm thick. 
         [0017]    The above-described method can further comprise removing the adhesive layer. The metal layer and the adhesive layer can be removed by etching or a chemical method. The etching can be plasma etching or chemical etching. 
         [0018]    In an embodiment, the method can further comprise, prior to exposing the release layer to light through the carrier, disposing a substrate on the encapsulant in a manner that the encapsulant is laminated therebetween. 
         [0019]    In the above-described method, the adhesive layer can have a plurality of metal particles dispersed therein. 
         [0020]    In the above-described method, the carrier can be made of glass. 
         [0021]    In the above-described method, the substrate can be made of glass or silicon. 
         [0022]    In the above-described method, the release layer can be made of amorphous silicon, parylene or α-SiO 2 . 
         [0023]    In the above-described method, the light can be laser light. 
         [0024]    The above-described method can further comprise removing the substrate. 
         [0025]    The above-described method can further comprise forming on the encapsulant a redistribution layer that is electrically connected to the semiconductor chips. 
         [0026]    In the above-described method, the metal particles can be silicon oxide balls coated with metal. 
         [0027]    In the above-described method, the laser light can have a wavelength of 532 nm. 
         [0028]    In the above-described method, the adhesive layer can have a core copper layer and an adhesive film formed on two opposite surfaces of the core copper layer. 
         [0029]    Therefore, by emitting light on the release layer to damage the release layer, the release layer and the carrier can be easily removed. Further, the metal layer, the adhesive layer having the metal particles dispersed therein or the adhesive layer having the core copper layer can be used to prevent the semiconductor chips and the encapsulant from being exposed to light so as to avoid any damage to the semiconductor chips and the encapsulant, thereby facilitating subsequent processes and increasing the product yield. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0030]      FIGS. 1A to 1E  are schematic cross-sectional views illustrating a method for fabricating a semiconductor package according to the prior art; 
           [0031]      FIGS. 2A to 2H  are schematic cross-sectional views illustrating a method for fabricating a semiconductor package according to a first embodiment of the present invention; 
           [0032]      FIG. 3  is a schematic cross-sectional view illustrating a method for fabricating a semiconductor package according to a second embodiment of the present invention; 
           [0033]      FIG. 4  is a schematic cross-sectional view illustrating a method for fabricating a semiconductor package according to a third embodiment of the present invention; 
           [0034]      FIG. 5  is a schematic cross-sectional view illustrating a method for fabricating a semiconductor package according to a fourth embodiment of the present invention; and 
           [0035]      FIG. 6  is a schematic cross-sectional view illustrating a method for fabricating a semiconductor package according to a fifth embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
       [0036]    The following illustrative embodiments are provided to illustrate the disclosure of the present invention, these and other advantages and effects can be apparent to those in the art after reading this specification. 
         [0037]    It should be noted that all the drawings are not intended to limit the present invention. Various modifications and variations can be made without departing from the spirit of the present invention. Further, terms such as “upper”, “on”, “first”, “second” etc. are merely for illustrative purposes and should not be construed to limit the scope of the present invention. 
       First Embodiment 
       [0038]      FIGS. 2A to 2H  are schematic cross-sectional views illustrating a method for fabricating a semiconductor package according to a first embodiment of the present invention. 
         [0039]    Referring to  FIG. 2A , a carrier  20  is provided. The carrier  20  has a release layer  21  formed thereon. The carrier  20  can be made of glass. The release layer  21  can be made of amorphous silicon, parylene or α-SiO 2 . The release layer  21  can be formed through a chemical vapor deposition (CVD) process. 
         [0040]    Referring to  FIG. 2B , a metal layer  22  is formed on the release layer  21  through PECVD (Plasma Enhance Chemical Vapor Deposition), CVD, PVD (Physical Vapor Deposition) or electroless plating. In the present embodiment, the metal layer  22  is 1 μm thick. The metal layer  22  can be made of any metal. 
         [0041]    In an alternative embodiment, the metal layer  22  can be omitted. 
         [0042]    Referring to  FIG. 2C , an adhesive layer  23  is formed on the metal layer  22 . 
         [0043]    Referring to  FIG. 2D , a plurality of semiconductor chips  24  are disposed on the adhesive layer  23  so as to be fixed by the adhesive layer  23  at certain positions. Each of the semiconductor chips  24  has a plurality of conductive pads and is disposed on the adhesive layer  23  with the conductive pads attached to the adhesive layer  23 . The carrier can have a plurality of alignment marks to facilitate positioning the semiconductor chips  24  on the adhesive layer  23 . 
         [0044]    Referring to  FIG. 2E , a molding process such as compression molding is performed to form an encapsulant  25  on the adhesive layer  23  so as to encapsulate the semiconductor chips  24 . As such, the semiconductor chips  24  are protected by the encapsulant  25  from being contaminated, oxidized or damaged by external environment. Then, a curing process is performed to cure the encapsulant. 
         [0045]    Referring to  FIG. 2F , a substrate  26  is disposed on the encapsulant  25  in a manner that the encapsulant  25  is laminated therebetween. The substrate  26  can be made of glass or silicon. 
         [0046]    Referring to  FIG. 20 , light a such as laser light is emitted through the carrier  20  towards the release layer  21 . Particularly, a portion of the light a passes through the release layer  21 . But the metal layer  22  prevents the adhesive layer  23 , the semiconductor chips  24 , and the encapsulant  25  from being exposed to the light and reflects a portion of the light a. In addition, the thickness of the metal layer  22  can be changed according to the power of the light a. 
         [0047]    Referring to  FIG. 2H , since the release layer  21  is exposed to and damaged by the light a, the release layer  21  and the carrier  20  can be easily removed. Then, the metal layer  22  and the adhesive layer  23  can be removed by etching, such as plasma etching or chemical etching, or a chemical method. Thereafter, the substrate  26  can be removed (if required) and a redistribution layer (not shown) can be formed on the encapsulant  25  and electrically connected to the semiconductor chips  24 . 
       Second Embodiment 
       [0048]      FIG. 3  is a cross-sectional view illustrating a method for fabricating a semiconductor package according to a second embodiment of the present invention. 
         [0049]    The present embodiment is similar to the first embodiment. A main difference of the present embodiment from the first embodiment is that the present embodiment dispenses with the metal layer  22  and instead forms an adhesive layer  23 ′ having a plurality of metal particles dispersed therein. The metal particles can prevent the light a from passing through the adhesive layer  23 ′. 
       Third Embodiment 
       [0050]      FIG. 4  is a cross-sectional view illustrating a method for fabricating a semiconductor package according to a third embodiment of the present invention. 
         [0051]    The present embodiment is similar to the second embodiment. The present embodiment differs from the second embodiment in that the metal particles  30  are silicon oxide balls  30   a  coated with metal  30   b . The metal particles  30  can prevent the light a from passing through the adhesive layer  23 ′. 
       Fourth Embodiment 
       [0052]      FIG. 5  is a cross-sectional view illustrating a method for fabricating a semiconductor package according to a fourth embodiment of the present invention. 
         [0053]    The present embodiment is similar to the second embodiment. The present embodiment differs from the second embodiment in that the adhesive layer  43  (such as a copper adhesive tape) has a core copper layer  431  and an adhesive film  432  formed on two opposite surfaces of the core copper layer  431 . The core copper layer  431  can prevent light a from passing through the adhesive layer  43 . 
       Fifth Embodiment 
       [0054]      FIG. 6  is a cross-sectional view illustrating a method for fabricating a semiconductor package according to a fifth embodiment of the present invention. 
         [0055]    The present embodiment is similar to the second embodiment. A main difference of the present embodiment from the second embodiment is that the release layer  51  is made of α-SiO 2  and formed through a CVD process and the light a is laser light with a wavelength at 532 nm. As such, when irradiated by the light a, the release layer  51  evaporates so as to be removed along with the carrier  20 . 
         [0056]    In addition, the metal particles in the adhesive layer  23  can be dispensed with. Instead, by adjusting the power of the light a, the release layer  51  can be damaged by the light a so as to be removed while the semiconductor chips  24  are not affected by the light a. 
         [0057]    Therefore, by emitting light on the release layer to damage the release layer, the release layer and the carrier can be easily removed. Further, the metal layer, the adhesive layer having the metal particles dispersed therein or the adhesive layer having the core copper layer can be used to prevent the semiconductor chips and the encapsulant from being exposed to the light so as to avoid any damage to the semiconductor chips and the encapsulant, thereby facilitating subsequent processes and increasing the product yield. 
         [0058]    The above-described descriptions of the detailed embodiments are only to illustrate the preferred implementation according to the present invention, and it is not to limit the scope of the present invention. Accordingly, all modifications and variations completed by those with ordinary skill in the art should fall within the scope of present invention defined by the appended claims.