Abstract:
A method and device providing multiple CPU configuration of a computer system are disclosed. A motherboard supporting the device is also provided. When a module with a first CPU is not connected to the motherboard via an expansion connector, a second CPU is connected with the system logic unit, and the expansion connector is disconnected from the system logic unit. When the module is connected to the expansion connector, the second CPU is disconnected from the system logic unit, and the system logic unit is electrically connected with the expansion connector.

Description:
BACKGROUND  
       [0001]     The invention relates to a computer system with multiple CPU configurations, and more particularly, to methods and apparatuses providing multiple CPU configurations to a computer system.  
         [0002]      FIG. 1A  is a block diagram of a conventional computer motherboard. The motherboard comprises a CPU area  11  and a system core logic area  12 . The CPU area  11  comprises a CPU  111  and a CPU control circuit  112  controlling the power supply and thermal solution for the CPU. The CPU area  11  connects to the system core logic area  12  via bus  121 .  
         [0003]     The system core logic area  12  comprises a system chipset  120 , a system memory  132  coupled thereto via system memory bus  122 , a system input/output controller  133  coupled thereto via system input/output bus  123  and a system control circuit  134  coupled thereto via system control bus  124 .  
         [0004]     Single or multiple system memory buses  122  on the motherboard connect to one or more memory devices such as a SDRAM bus and a DDR SDRAM bus. A Dual Channel system memory bus utilizes two independent memory controllers for improved system performance.  
         [0005]     The system input/output controller  133  controls interfaces with external devices. One or more system input/output buses each connect to one or more system input/output devices and may be a PCI bus and/or an ISA bus. Input/output connectors  135  connected to different interface buses  125  respectively connect to external devices/cables thereby.  
         [0006]     System control circuit  134  contains circuits controlling the power and thermal solutions for the computer system.  
         [0007]      FIG. 1B  is another block diagram of a computer motherboard. The motherboard comprises a CPU area  11  and a system core logic area  12 . The difference between this system and that shown in  FIG. 1A  is system memory  113  connecting to the CPU  111  instead of the system core logic chipset  120 , allowing the CPU to directly access system memory for high speed computing without accessing system logic chipset  120 . All other devices access system memory through system logic chipset  120 , which directs the requests to CPU  111 .  
         [0008]     Conventional motherboards comprise core logic chipsets and CPU configurations that cannot be changed. Installation of a CPU not compatible with the initial CPU socket requires replacement of motherboard, and possibly related devices, representing considerable inconvenience and cost.  
       SUMMARY  
       [0009]     A method and device providing multiple CPU configuration of a computer system are disclosed. A motherboard supporting the device is also provided. When a module with a first CPU is not connected to the motherboard via an expansion connector, a second CPU is connected with the system logic unit, and the expansion connector is disconnected from the system logic unit. When the module is connected to the expansion connector, the second CPU is disconnected from the system logic unit, and the system logic unit is electrically connected with the expansion connector.  
         [0010]     Additional features and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The features and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the appended claims.  
         [0011]     It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed. 
     
    
     DESCRIPTION OF THE DRAWINGS  
       [0012]     The accompanying drawings, incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the description, serve to explain the features, advantages, and principles of the invention.  
         [0013]      FIGS. 1A and 1B  are block diagrams of conventional computer systems.  
         [0014]      FIG. 2  is a block diagram of a motherboard according to an embodiment of the invention.  
         [0015]      FIG. 3  is a block diagram of a module applied with the motherboard of  FIG. 2 .  
         [0016]      FIG. 4  is a block diagram of a motherboard according to another embodiment of the invention.  
         [0017]      FIG. 5  is a block diagram of a module applied with the motherboard of  FIG. 4 . 
     
    
     DETAILED DESCRIPTION  
       [0018]     The invention is adaptive to change the CPU configuration in a computer system. Various core logic chipsets support more than one type of CPU. Bus signals between the system core logic chipset and an initial CPU, switched to connect with another upgraded CPU, allow an existing motherboard to accommodate different types of CPUs. A module is provided to carry the second CPU for upgrading. An expansion connector on the motherboard connects the module. When the module connects to the expansion connector, the core logic chipset is disconnected from the initial CPU interface, and electrically connected to the expansion connector, to communicate with the upgraded CPU carried by the module. A bus switching device selectively switches the connection to the core logic chipset between the initial CPU interface and the expansion connector.  
         [0019]     The system memory may connect to the CPU rather than the core logic chipset. The module must comprise system memory devices if the upgraded CPU on the module controls the memory interface.  
         [0020]     The bus switching device can be a set of jumpers set to connect the system core logic chipset to the initial CPU or to the expansion connector, or a bus switching IC chip receiving a control signal generated in the motherboard, which sets the signal to a first state to control the bus switching IC to connect the core logic chipset with the initial CPU when the expansion connector is empty, and a second state to control the bus switching IC to connect the core logic chipset with the expansion connector when the expansion connector connects to the module. The bus switching device disconnects the unused device and its related bus routing from the active bus, improving the signal integrity by preventing the loading and signal reflection caused by the unused device and the is bus routing.  
         [0021]      FIG. 2  is a block diagram of a motherboard according to an embodiment of the invention. The motherboard comprises a CPU area  21 , a system logic area  22 , a bus switching device  23  and an expansion connector  24 .  
         [0022]     CPU area  21  comprises a CPU  211 , assembled initial or connecting to the motherboard through an initial CPU socket. The CPU area  21  further comprises other devices connect directly to the second CPU  211  but the system logic area  22 . For example, if CPU  211  connects directly to a system memory, the CPU area  21  comprises system memory (not shown). The CPU area  21  further comprises control circuits (not shown) controlling the power supply and thermal solutions of the CPU area  21 .  
         [0023]     System logic area  22  connects to bus switching device  23  via bus  221 . The bus switching device  23  connects to CPU area  21  via bus  2211  and the expansion connector  24  via the bus  2212 . The bus switching device  23  electrically connects the signals of the bus  221  to the signals of bus  2211  if the expansion connector  24  is not connected to any device. The system logic area  22  connects to the second CPU area  21  and forms a complete system structure that boots and computes normally.  
         [0024]      FIG. 3  shows a block diagram of a module applicable with the motherboard of  FIG. 2 . The module  31  comprises a CPU area  310  and a signal connector  312  connecting with the expansion connector  24 . CPU  311  can be assembled initial or connect to the CPU area  310  through an initial CPU socket. The module  31  further comprises other devices which connect directly to the first CPU  311 . For example, if the first CPU  311  connects directly to the system memory, the module  31  comprises system memory (not shown).  
         [0025]     The bus switching device  23  electrically connects the signals of the bus  221  with the signals of the bus  2212  if the expansion connector  24  is connected to the module  31 . The system logic area  22  connects to the first CPU area  310  and forms a complete system structure that boots and computes normally.  
         [0026]      FIG. 4  is a block diagram of a motherboard according to another embodiment of the invention. The motherboard comprises a CPU area  41 , a system logic area  42 , a bus switching device  44  and an expansion connector  43 .  
         [0027]     The CPU area  41  comprises a CPU  411  (AMD Athelon-64 754 pin), assembled initial or connecting to the motherboard through an initial CPU socket.  
         [0028]     Because the AMD Athelon-64 754 pin CPU comprises a single channel DDR SDRAM interface, the CPU area  41  further comprises two DDR SDRAM sockets  412  to connect system memory devices. The CPU area  41  further comprises CPU control circuits  413  controlling the power supply and thermal solutions for the second CPU area  41 .  
         [0029]     The system logic area  42  comprises the system core logic unit  420  (SIS 760 Northbridge and SIS964 Southbridge system core logic chipset). The system logic area  42  further comprises all other devices not directly connected to the CPU area  41 .  
         [0030]     The system logic area  42  connects to the bus switching device  43  via the bus  421 . The bus switching device  44  connects to the CPU area  41  via the bus  4211  and to the expansion connector  43  via the bus  4212 . The bus switching device  44  electrically connects the signals of the bus  421  with the signals of the bus  4211  if the expansion connector  43  is not connected to any device. The system logic area  42  connects to the CPU area  41  and forms a complete system structure that boots and computes normally.  
         [0031]      FIG. 5  is a block diagram of a module applicable with the motherboard of t  FIG. 4 . The module  51  comprises a CPU  511  (AMD Athelon-64 939 pin CPU) and a signal connector  516  connecting with the expansion connector  43 , assembled initial or connecting to the module through an initial CPU socket.  
         [0032]     The module  51  further comprises other devices directly connected to the CPU but not the system logic area  42 . Because the AMD Athelon-64 939 pin CPU comprises dual channel DDR SDRAM interfaces, the module  51  further comprises four DDR SDRAM sockets ( 5121 ,  5122 ) to connect system memory devices. The module  51  further comprises CPU control circuits  53  controlling power supply and thermal solutions of the module  51 .  
         [0033]     The bus switching device  44  electrically connects the signals of the bus  421  with the signals of the bus  4212  if the expansion connector  43  is connected to the module  51 . The system logic area  42  connects to the module  51  and forms a complete system structure that could be boot up and compute normally.  
         [0034]     The invention enables replacement of CPUs in a computer system, reducing cost and inconvenience.  
         [0035]     While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. Those who are skilled in this technology can still make various alterations and modifications without departing from the scope and spirit of this invention. Therefore, the scope of the present invention shall be defined and protected by the following claims and their equivalents.