Abstract:
This invention relates to a digital communication bus between electronic modules (S 1,  Sn), composed of at least one pair of data transmission lines ( 2 A,  2 B) and terminating by line terminators (TA, TB), and characterized by the fact that it comprises, for example in the two line terminators (TA, TB), components (R 6,  R 7,  R 3,  R 4 ) imposing transmission with polarization and inverting the polarization whenever one or both line terminators are missing, or are not connected to the bus, or the bus is open.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     This invention relates to a digital communication bus for connecting electronic modules. 
     2. Discussion of the Background 
     Automation functions (racks, modules and various couplers) can be placed in different locations if a bus B is used to connect the various automation stations such as S 1 , S 2 , Sn, as shown in FIG.  1 . This bus consists of transmission pairs and is terminated at both ends by identical line terminators TA and TB. This layout makes it impossible to detect a bus continuity fault. 
     Patent EP 0 517 609 describes a serial bus capable of connecting this type of automation module. 
     SUMMARY OF THE INVENTION 
     The purpose of this invention is to provide a bus capable of detecting a bus continuity fault, for example a connection fault in one of the two line terminators. If there is no fault, the line used for this detection can be used for digital communications. 
     The bus according to the invention is composed of at least one pair of data transmission lines and terminates with line terminators and is characterized essentially by the fact that it comprises components, for example in the two line terminators, imposing transmission with polarization and inverting the polarization whenever at least one of the line terminators is missing, or is not connected to the bus, or the bus is open. 
     According to one characteristic, the bus comprises two resistances in each module, associated with a transmission pair and capable of polarizing this pair, one of these resistances being connected to a first line in the said pair, the other resistance being connected to the second line. 
     According to another characteristic, the bus comprises a dividing bridge at each end, the mid-point of this bridge being connected to one line, and the second line being connected to a resistance at the first line terminator end, the first line being connected to a resistance at the second line terminator end, the bridges being inverted at one end compared with the other. 
     According to another characteristic, at each end the bus includes a doubly dividing bridge with three resistances, the first line being connected at the first line terminator end to a capacitor connected to one of the two mid-points of the bridge, the second line being connected at the second line terminator end to a capacitor connected to one of the two mid-points of the bridge. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     We will now describe the invention in more detail with reference to embodiments given as examples and shown on the attached drawings in which: 
     FIG. 1 is a diagram showing the architecture composed of electronic modules connected through a bus according to the invention, 
     FIG. 2 is a diagram of the bus line terminator according to the invention; 
     FIG. 3 is a diagram of the first embodiment of the bus according to the invention; 
     FIG. 4 is a diagram showing the bus in FIG. 3 in which two line terminators are missing; 
     FIG. 5 is a diagram of a second embodiment of the bus according to the invention; 
     FIG. 6 is a diagram of the bus in FIG. 5, in which the line terminator TA is missing; 
     FIG. 7 is a diagram of the bus in FIG. 5 in which the line terminator TB is missing; 
     FIG. 8 is an embodiment of the bus providing impedance matching for high frequencies. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 1 shows several electronic modules S 1 , S 2 , . . . Sn, designed to exchange digital data in real time, for example variables and/or digital messages, through a serial type bus B. These modules may be couplers or programmable logic controller racks or PC type stations. 
     Bus B consists of several transmission pairs, of which one pair  3 A- 3 B outputs a DC voltage (+5 V). One pair  2 A- 2 B arbitrates in accordance with patent EP 517 609 mentioned above. This pair is in accordance with the RS 485 standard. 
     The bus pairs are embedded between modules such as S 1  and S 2  in a cable  4 . Inside each module such as S 1 , S 2 , . . . , the pairs end in two connectors CA-CB for this module. These connectors are used to connect the interconnection cables  4  between the modules or line terminators described below. 
     The two ends of the network terminate in line terminators TA and TB that are fitted on the two connectors CB of the two network end modules S 1  and Sn. 
     The line terminator TA (FIG. 2) is composed of a box fitted with a connector and containing a card with electronic components. 
     A voltage polarization is necessary on line  2 A- 2 B. It gives one of the two logical states of the differential pair (1) whereas the other state (0) is imposed by one or several module transmitters. 
     In the embodiment shown in FIGS. 3 and 4, each module comprises a resistance R 6  installed between line  2 A and the 0V (line  3 B), and a resistance R 7  mounted between the 5V (line  3 A) and line  2 B. These resistances are high (for example 20 KΩ and 22 kΩ). Each line terminator has a dividing bridge R 3 -R 4  connected to the terminals of the power supply pair  3 A- 3 B. The mid-point of bridge R 3 -R 4  in terminator TA is connected to the first line  2 A. The mid-point of bridge R 4 -R 3  in terminator TB is connected to the second line  2 B. 
     A missing connection or a connection fault in at least one of the two line terminators TA and TB is detected by means of the two resistances R 6  and R 7 . 
     In the embodiment shown in FIGS. 5 to  7 , each line terminator has a dividing bridge R 3 -R 4  connected to the terminals of the power supply pair  3 A- 3 B. The mid-point of bridge R 3 -R 4  in terminator TA is connected to the first line  2 A. The mid-point of bridge R 4 -R 3  in terminator TB is connected to the second line  2 B. Terminator TA comprises a resistance R 5  connected to the second line  2 B and to the power supply line  3 A (+5 V). Terminator TB comprises a resistance R 5  connected to the first line  2 A and the power supply line  3 B (0 V). 
     As a guide, the values of the resistances could be 150 Ω for R 3 , and 350 Ω Ohm for R 4 . Resistances R 5  and R 5 ′ are high (for example between 2.5 and 3 kΩ). 
     Line terminators TA and TB are both connected to the bus, to polarize the pair  2 A- 2 B. If only one of the two line terminators is connected, the inverse polarization is applied to this pair and the fault is then detected by the modules. 
     In the embodiment shown in FIG. 8, each line terminator TA or TB comprises a doubly dividing bridge with three resistances R 1 , R 2 , R 0 . The second line  2 B is connected in the line terminator TA to a capacitor C 1  connected to the mid-point of the bridge resistances R 0 -R 2 , and in the line terminator TB to the mid-point of resistance R 2 -R 0 . The first line  2 A is connected in the line terminator TA to the mid-point of resistance R 1 -R 2 , and in line terminator TB to a capacitor C′ 1  connected to the mid-point of the bridge resistance R 1 -R 2 . 
     The circuit gives the polarization voltage of pair  2 A- 2 B (starting from a DC voltage of +5 V) and provides a differential impedance close to the value (120 Ω) necessary to match the pair (which has a characteristic impedance equal to this nominal value). 
     We will now describe the operation of the bus. 
     Firstly refer to FIGS. 3,  5  and  8 , in which the two line terminators TA and TB are in position. 
     If the power supply voltage is 5 V, the voltage on line  2 A is close to 3.5 V and the voltage on line  2 B is close to 1.5 V. Therefore, the voltage difference is close to +2 V. The logical state is 1 and arbitration operates normally. 
     When line terminator TB only is connected (FIG.  6 ), the voltage on line  2 A is 0V and the voltage on line  2 B is 1.5 V. Therefore, the voltage difference is −1.5 V. The logical state is 0 and the modules detect the fault. Operation of arbitration may then be blocked. 
     When line terminator TA only is connected (FIG.  7 ), the voltage on line  2 A is close to 3.5 V whereas the voltage on line  2 B is close to −5 V. Therefore the voltage difference is close to −1.5 V. The logical state is 0 and the modules detect the fault. Operation of arbitration may then be blocked. 
     At low impedance, the circuit only polarizes one of the two conductors in each line terminator, whereas the impedance of the second conductor is increased towards one of the two power supply voltages. This increase becomes insignificant as soon as bus continuity is established and the low impedance of the second line terminator is imposed remotely. 
     When neither of the line terminators TA or TB is connected (FIG.  4 ), the voltage on line  2 A is 0 V and the voltage on line  2 B is 5 V. Therefore, the voltage difference is −5 V. The logical state is 0 and the modules detect the fault. Operation or arbitration may then be blocked. 
     In the embodiment shown in FIG. 8, impedance matching is done for high frequencies. This solution is suitable for long buses and fast fronts. The solution shown in FIGS. 5 to  7  is more suitable for short buses which are not too fast. 
     Obviously, without going outside the scope of the invention, it would be possible to imagine alternatives and improvements to detail, and even consider the use of equivalent means. 
     Thus line A could be replaced by a power supply specific to each module.