Abstract:
Variable gain amplifiers and methods having a logarithmic gain control function are disclosed. The variable gain amplifiers have a first inverse hyperbolic tangent stage having a current input responsive to a gain control signal, a second inverse hyperbolic tangent stage responsive to the output of the first hyperbolic tangent stage, and a Gilbert cell providing an amplifier output responsive to an amplifier input with a gain responsive to the output of the second inverse hyperbolic stage. The inverse hyperbolic gain response is altered to closely approximate the desired logarithmic characteristic by including a circuit responsive to the gain control signal to provide a current input to the first inverse hyperbolic stage which is nonlinear with respect to the gain control signal.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to the field of variable gain amplifiers. 
     2. Prior Art 
     Amplifiers having a gain control capability are commonly used in wireless cell phone and other analog circuit applications. In the cell phone case, a signal is received on an antenna, with the strength of the received signal varying to a very large degree as the cell phone moves with respect to the base station (transmitted signal). A simple fixed gain receiver would amplify the variation to provide a widely varying signal to the analog-to-digital conversion circuitry within the cell phone that converts the signal to a digital signal for further processing. Such a wide variation in signal strength would result in an unacceptable error when converted to digital form by the analog-to-digital converter circuitry. 
     To avoid these problems, a variable gain amplifier is used to adjust the gain in the path of the received signal so that the full available range of the analog-to-digital converter circuitry may be used. In such applications, it is desired to provide a variable gain receive path amplification that produces a logarithmic characteristic in the gain path with a gain control signal such that the decibels of gain is linearly related to the gain control signal VAGC controlling the amplifier stage(s). 
     BRIEF SUMMARY OF THE INVENTION 
     Variable gain amplifiers and methods having a logarithmic gain control function are disclosed. The variable gain amplifiers have a first inverse hyperbolic tangent stage having a current input responsive to a gain control signal, a second inverse hyperbolic tangent stage responsive to the output of the first hyperbolic tangent stage, and a Gilbert cell providing an amplifier output responsive to an amplifier input with a gain responsive to the output of the second inverse hyperbolic stage. The inverse hyperbolic gain response is altered to closely approximate the desired logarithmic characteristic by including a circuit responsive to the gain control signal to provide a current input to the first inverse hyperbolic stage which is nonlinear with respect to the gain control signal. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a circuit diagram of a preferred embodiment of the present invention. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring to FIG. 1, a circuit diagram for an embodiment of the present invention may be seen. The circuit shown has a portion identified as the linearizer and a second portion identified as the gain control, with the amplifier itself providing a differential output OUT_P, OUT_N, responsive to a differential input IN_P, IN_N and the gain control signal VAGC. The embodiment shown is suitable for amplification of RF signals, though may be used for amplification of other signals as desired. 
     In the circuit shown, the voltage VCS is derived in a conventional manner to establish a constant current through transistor Q 13  and resistor R 11 , as well as through transistor Q 11  and resistor R 9 , and transistor Q 12  and resistor R 10 . The current through transistor Q 13  and resistor R 11  is mirrored by transistor Q 6  and resistor R 4  to transistor Q 9  and resistor R 2 . Resistor R 3  has the same resistance as resistors R 2  and R 4 , though resistor R 5 , having a relatively low resistance, results in a current flow through resistors R 3  and R 5  and transistor Q 8 , which is somewhat less than the current mirrored to transistor Q 9 . Transistor Q 5 , resistor R 21  and diode D 5  act as a beta helper for transistors Q 6 , Q 8  and Q 9  to provide the base currents thereto. In addition, diode D 5  acts as a clamp, assuring turn off of transistors Q 8  and Q 9  when the voltage VCS goes to zero volts. 
     Similarly, the voltage VCSX 3  is derived to produce a constant current in transistor Q 20  and resistor R 26 , and transistor Q 19  and resistor R 25 . Also, an input current ISET through transistor Q 15  and resistor R 23  is mirrored to transistor Q 21  and resistor R 34 , thereby establishing the tail current for transistors Q 17  and Q 18 . Transistor Q 16 , resistor R 24  and diode D 6  act as a beta helper for transistor Q 21  to provide the base currents thereto. Also, diode D 6  acts as a clamp, assuring transistor Q 21  shuts off when ISET is at zero current. 
     In the circuit of FIG. 1, capacitors C 1  and C 2  are for noise reduction purposes. Capacitors C 3  and C 4  are for suppressing the RF signal across the current sources of transistor Q 20  and resistor R 26 , and transistor Q 19  and resistor R 25 . 
     In operation, the gain control voltage VAGC will range from approximately one VBE above ground to approximately 2.5 volts. At the low end of the range, transistors Q 14  and Q 7  will not significantly conduct, and accordingly, transistor Q 10  will also be substantially off. Consequently, the current through transistor Q 8  will all pass through transistor Q 1 , establishing the voltage on the base of transistor Q 3  at one VBE above the voltage VCS. Similarly, the current through transistor Q 9  will pass through transistor Q 2 , establishing the voltage on the base of transistor Q 4  at one VBE above the voltage VCS. (Diode D 1  is not sufficiently forward biased during normal operation to be conducting.) However, because the current through transistor Q 8  is slightly less than the current through transistor Q 9 , the VBE of transistor Q 1  will be slightly less than that of transistor Q 2 , so that transistor Q 4  will be slightly more conducting than transistor Q 3 . The small differential voltage on the bases of transistors Q 3  and Q 4  results in a corresponding differential voltage on the emitters of transistors Q 3  and Q 4 , providing a current in proportion thereto through resistor R 1 . Since the collector currents in transistors Q 11  and Q 12  are equal, the current through resistor R 1  must be provided by a differential current through diodes D 3  and D 4 , diode D 4  conducting an amount of current greater than diode D 3  equal to twice the current through resistor R 1 . Consequently, the differential output of the linearizer will be slightly biased by the presence of resistor R 4  so that a minimum value of the differential control CONTROL_P, CONTROL_N is provided to the amplifier. The common mode voltage of the differential control CONTROL_P, CONTROL_N is set by resistor R 19  and diodes D 3  and D 4 , the current there through being equal to the sum of the current of current sources Q 11  and R 9 , and Q 12  and R 10 , and thus independent of the gain control voltage VAGC. Also, diodes D 3  and D 4  could be realized as diode connected transistors, both diodes and diode connected transistors being included within the meaning of the word diode as used herein and in the claims to follow. 
     As the gain control voltage VAGC is increased, commanding greater gain of the amplifier, transistor Q 14  will begin to turn on, with the current through transistor Q 14  being mirrored to transistor Q 10  and resistor R 9 . If resistor R 13 , an optional resistor, is present, there will also be a component of current through resistors R 13  and R 12  and transistors Q 14  and Q 7 . As the gain control voltage VAGC continues to increase, the voltage drop across resistor R 13 , if present, will reach the forward conduction diode voltage drop of diode D 2 . If resistor R 13  is not present, the voltage drop across resistor R 6  will reach the forward conduction voltage drop of diode D 2 , in either case providing a more steeply increasing current through resistor R 12  with further increasing gain control voltage VAGC. Accordingly, for the minimum value of voltage VAGC, the current through transistor Q 10  will be substantially zero. With initially increasing values of VAGC, there will be an approximately proportional increase in current through transistor Q 10 , and with increasing values of VAGC in the upper portion of the VAGC range, the current through transistor Q 10  will increase at a greater rate because of the conduction through diode D 2  also contributing to the current flow through transistors Q 14  and Q 7 . 
     The current through transistor Q 10  diminishes the current through transistor Q 1 , by providing an alternate path for the current through transistor Q 8 , thereby further raising the voltage on the base of transistor Q 4 , thereby lowering the voltage on the emitter of transistor Q 3  with respect to the emitter of transistor Q 4 , increasing the current flow through resistor R 1  to further increase the current flow through diode D 4  and further decrease the current flow through diode D 3 , increasing the differential voltage CONTROL_P, CONTROL_N on the output of the linearizer. 
     The differential input IN_P, IN_N is applied to the bases of transistors Q 17  and Q 18 . The common mode voltage for the differential input, as well as the input impedance thereof, is set by currents through resistors R 30  and R 27  and resistors R 32  and R 31  by current sources Q 20  and R 26  and Q 19  and R 25 , respectively. The differential input IN_P, IN_N determines the division of the tail current through transistors Q 21  and R 34  between transistors Q 17  and Q 18 . When the differential input is zero, the tail current will divide equally between transistors Q 17  and Q 18 . For a positive differential input, transistor Q 17  will conduct a larger portion of the tail current and transistor Q 28  a smaller portion of the tail current, and for a negative differential input, transistor Q 17  will conduct a smaller portion of the tail current and transistor Q 28  a larger portion of the tail current. Assuming for the moment that the gain control voltage VAGC is at its lower limit, the voltage on CONTROL_P will be slightly higher than the voltage on CONTROL_N. Thus, transistors Q 24  and Q 23  will be conducting slightly more than transistors Q 22  and Q 25 . However, transistors Q 22  through Q 25  are all the same size. Consequently, since the current through resistor R 33  is equal to the sum of the currents through transistors Q 22  and Q 23 , and the current through resistor R 22  is equal to the sum of the currents through transistors Q 24  and Q 25 , the currents through resistors R 22  and R 33  will be equal, so that the differential output OUT_P, OUT_N will be zero. 
     With a positive differential signal input IN_P, IN_N, a larger fraction of the tail current through transistors Q 21  and R 34  will flow through transistor Q 17  and less through transistor Q 18 . The division of current between transistors Q 23  and Q 25  will be the same as the division of current between transistors Q 24  and Q 22 . However the larger current through transistor Q 17  under these conditions, will cause a larger increase in the current in transistor Q 24  than in transistor Q 23  and a larger decrease in current through transistor Q 22  than in transistor Q 25 . Consequently, the increase in current through transistor Q 24  will more than offset the decrease in current through transistor Q 25 , increasing the current through resistor R 22  to reduce the voltage on the output terminal OUT_N. Similarly, the decrease in current through transistor Q 22  will be more than the increase in current through transistor Q 23 , thereby decreasing the total current through resistor R 33  to increase the output on output terminal OUT_P. For higher differential inputs IN_P, IN_N, more of the tail current for transistors Q 17  and Q 18  will be steered through transistor Q 17  and less through transistor Q 18 , increasing the differential output OUT_P, OUT_N accordingly. 
     For higher values of the gain control voltage VAGC, the differential voltage CONTROL_P, CONTROL_N will increase, as previously described. This steers a greater fraction of the current through transistor Q 17  through transistor Q 24  and less through transistor Q 22 , and a greater fraction of the current through transistor Q 17  through transistor Q 23  and less through transistor Q 25 , having the net effect of increasing the gain of the amplifier. 
     Having now described the detailed operation of the circuit of FIG. 1, the general characteristics thereof will now be apparent. Transistors Q 22 , Q 24 , Q 23 , Q 25 , Q 17 , Q 18 , Q 20 , Q 19 , Q 15 , Q 16  and Q 21  and the other circuit elements associated with those transistors form a Gilbert cell having a characteristic hyperbolic tangent function non-linearity. However, transistors Q 1 , and Q 2  provide an inverse hyperbolic tangent stage and diodes D 3  and D 4  provide another inverse hyperbolic tangent stage, leaving a net single inverse hyperbolic tangent function for gain versus the AGC signal VAGC. This net inverse hyperbolic tangent function coarsely approaches the desired logarithmic gain control function, which is forced to closely approach the desired logarithmic gain control function by the shaping effect of diode D 2  and resistor R 12  and the circuitry associated therewith (and resistor R 13 , if the same is included). Finally, of course, the gain control circuit is biased to operate in a single quadrant by resistor R 5  and the circuitry associated therewith, resistor R 5  assuring that the current through transistor Q 1  is less than the current through transistor Q 2 , even with transistor Q 10  turned off. 
     In the embodiment shown, if the gain control voltage VAGC was applied to the circuit so as to provide a differential voltage on the bases of transistors Q 3  and Q 4  proportional to the gain control voltage, the current through resistor R 1  and the direction thereof would be linearly dependent on the gain control voltage VAGC. That current would provide a differential voltage drop across diodes D 3  and D 4  having the characteristic of an inverse hyperbolic function, so that that differential voltage drop applied to the bases of transistors Q 24  and Q 22 , and transistors Q 23  and Q 25 , would result in a division of current between each of those transistor pairs, linearly proportional to the gain control voltage. However, the differential voltage on the bases of transistors Q 3  and Q 4  is not linearly proportional to the gain control voltage VAGC, but rather, neglecting diode D 2  for the moment, is dependent upon the differential base emitter voltages of transistors Q 1  and Q 2  having a current which is approximately proportional to the gain control voltage, thereby providing a further inverse hyperbolic tangent function on the gain in response to the automatic gain control voltage VAGC. Diode D 2  and the circuitry associated therewith makes the differential current in transistors Q 1  and Q 2  non-linearly related to the gain control voltage VAGC in a manner to alter the gain control characteristics to achieve more precise matching of the desired logarithmic gain control characteristic. Thus, the circuit includes a first inverse hyperbolic stage having a current input responsive to a gain control signal, a second inverse hyperbolic stage responsive to the output of the first hyperbolic stage, and a Gilbert cell providing an amplifier output responsive to an amplifier input, with a gain responsive to the output of the second inverse hyperbolic stage. The matching of the gain control with the desired logarithmic gain control function is improved by providing a current input to the first inverse hyperbolic stage which is non-linear with respect to the gain control signal. 
     While a specific embodiment of the present invention has been disclosed and described herein, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.