Abstract:
A method for designing a completely passive bias compensation circuit to stabilize the gain of multiple pixel avalanche photo detector devices. The method includes determining circuitry design and component values to achieve a desired precision of gain stability. The method can be used with any temperature sensitive device with a nominally linear coefficient of voltage dependent parameter that must be stabilized. The circuitry design includes a negative temperature coefficient resistor in thermal contact with the photomultiplier device to provide a varying resistance and a second fixed resistor to form a voltage divider that can be chosen to set the desired slope and intercept for the characteristic with a specific voltage source value. The addition of a third resistor to the divider network provides a solution set for a set of SiPM devices that requires only a single stabilized voltage source value.

Description:
This application claims priority to provisional U.S. Application No. 61/719,378, filed Oct. 27, 2012, the contents of which are incorporated herein by reference in their entirety. 
    
    
     The United States government may have certain rights to this invention under Management and Operating Contract No. DE-AC05-060R23177 from Department of Energy. 
    
    
     FIELD OF THE INVENTION 
     This invention relates to photo detector devices and specifically to a method for designing a completely passive bias compensation circuit to stabilize the gain of the multiple pixel avalanche photo detector devices commonly called MPPC (multi-pixel photon counters) or SiPM (silicon photomultipliers) over a range of temperatures. 
     BACKGROUND OF THE INVENTION 
     The multiple pixel avalanche photo detector device commonly called MPPC or SiPM device is a relative newcomer to the field of radiation detection instrumentation but is being increasingly employed as a photo-detection element in critical systems where the gain stabilization is important. 
     The SiPM exhibits a temperature dependence of gain that is very nearly linear with temperature. Because photodetector gain impacts the ability to perform spectrometric measurements, and influences the timing and energy precision of threshold discrimination circuits—both techniques important in nuclear measurements and particularly in quantitative studies—it is often essential to stabilize the gain of the device with respect to temperature. 
     Previous approaches to stabilization have included active temperature measurement and control via either varying the applied biasing voltage, by control of a variable gain stage following the signal output of the SiPM, or by means of a look up table that corrects for gain variation after digitization. Where power consumption and cost are not a major concern these approaches are often the appropriate method. If the cost, size or power consumption of the gain stabilization scheme is important, as it is in large arrays of these devices, a low power and small area approach is highly desirable and in some cases can be the only practical approach. 
     SUMMARY OF THE INVENTION 
     This invention describes a method for designing a completely passive bias compensation circuit to stabilize the gain of the multiple pixel avalanche photo detector devices commonly called MPPC or SiPM over a range of temperatures. This description includes circuitry design and the approach to determining component values to achieve a desired precision of gain stability. This method is particularly applicable where other approaches to circuitry for temperature sensitive bias control are no longer feasible. Specifically, the method described here involves no active circuitry and is suitable for large arrays where the provision of independent bias supplies for every device is impractical. 
     The basic concept is that of a temperature dependent voltage divider, with both temperature varying and nominally invariant resistances adjusting the bias voltage to the detector element. The approach can be used with any temperature sensitive detector (or other) device with a nominally linear temperature coefficient of voltage that must be stabilized. Other temperature ranges are accommodated with limitations imposed by the temperature sensitive element characteristics. Devices with non-linear temperature coefficients can be stabilized using the basis of this technique with attention to the selection of temperature sensitive element characteristics. 
     A negative temperature coefficient resistor in thermal contact with the SiPM device provides a varying resistance related to the device temperature. Where the temperature characteristic of many thermistors is nonlinear the existing and well-known practice of placing an additional resistor in parallel will mitigate that nonlinearity over some limited range. 
     When that linearized thermistor is made part of a voltage divider, the voltage at the divider output will vary in proportion to the temperature in a nearly linear way over a range of temperatures. Because the gain of the avalanche photodiode cells is a linear function of the applied voltage, and if the voltage divider is constructed so that the slope of this voltage divider change is opposite to the slope of the change of gain in proportion to device temperature, the gain of the avalanche photodiode device can be stabilized to remain constant over a temperature range. 
     For a single device both slope compensation and the desired gain intercept can be set by specifying a single resistor and then specifying the input voltage to the voltage divider. This simple technique is useful when applied to a single device, but the cost rises when multiple devices (which often possess different characteristics) must be compensated and gain matched. 
     The problem becomes more challenging when large numbers of devices must have bias solutions that match both slope and intercept. Resistor specification is not difficult, but the impracticality of a large number of precisely controlled independent supply voltages (V Supply ) is a large impact. The additional circuitry described here provides a practical solution for large array that must be gain matched and temperature compensated, without requiring a large number of different supply voltages. 
     OBJECTS AND ADVANTAGES 
     The novel feature of this invention is the method of calculation and analysis that allows design of a three-resistor temperature sensitive voltage divider bias compensation circuit that provides for a reasonably and arbitrarily small set of supply voltages to be used to achieve gain compensation and matching of both slope and intercept of the compensation to within errors of the component tolerances chosen. 
     The SiPM device is a relative newcomer to the field of radiation detection instrumentation but is being increasingly employed as a photo-detection element in critical systems where the gain stabilization is important. As prices for the SiPM continue to fall they will be more and more attractive for use in larger arrays where packing density and power consumption become important. 
     An example is the Gluex Barrel Calorimeter (BCAL), which is being installed at the Jefferson National Accelerator Facility in Newport News, Va. and will be used to map the spectrum of gluconic excitations of light mesons. The BCAL detector employs 3840 SiPM devices which must remain gain stable to provide excellent energy and timing resolution, and a low threshold of detection, while operating in high magnetic fields necessary to completely contain the electromagnetic showers resulting from the conversion of photons. The V OP  for those SiPM devices is based on the device breakdown voltage (Vbr), and typically ranges over 2.0 V (220% of the Vop-Vbr value). Making use of the three-resistor bias compensation scheme described herein the BCAL will maintain all 3840 SiPM devices within 5% of calibrated gain value over temperature while using only a minimum of different input voltages. 
     The BCAL bias compensation system of the present invention is designed for acceptable operation at temperatures 15 degrees higher—nominally room temperature—to facilitate offline testing without requiring cooling the entire assembly. The three-resistor bias compensation technique employed for the BCAL will allow operation at any temperature between room temperature and the expected operating temperature without modification. Operation at other temperatures outside of this range can also be accomplished with an adjustment of the V Supply  voltages. 
     Medical imaging systems are also taking advantage of the small size and high density of the SiPM. Medical imaging applications include CT and PET imagers as well as single isotope SPECT and multiple isotope SPECT imaging. In each of these applications the stability of gain may be a requirement to achieve approval for diagnostic use. 
    
    
     
       DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a schematic of a two resistor voltage divider bias supply with linearized thermistor element. 
         FIG. 2  is a schematic of a three resistor voltage divider bias supply with linearized thermistor element. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     With reference to the “two resistor” voltage divider bias network in  FIG. 1 , which depicts a first embodiment according to the present invention, the two resistor voltage divider includes a voltage supply  20 , a linearized thermistor  22  consisting of a thermistor  24  in parallel with a linearizing resistor  26 , and a divider resistor  28 . To realize appropriate temperature compensation the divider resistor  28 , linearized thermistor  22  and bias supply  20  must satisfy two relationships: 
     (1) V OP  at Operating Temperature T 
               V   OP     =         R   2     ⁡     [       V   SUPPLY     -       I   LEAK     ⁡     [         R   Lin     ⁢     R     T   0       ⁢     ⅇ       B   0     ⁡     (       1   T     -     1     T   0         )               R   Lin     +       R     T   0       ⁢     ⅇ       B   0     ⁡     (       1   T     -     1     T   0         )               ]         ]           R   2     +         R   Lin     ⁢     R     T   0       ⁢     ⅇ       B   0     ⁡     (       1   T     -     1     T   0         )               R   Lin     +       R     T   0       ⁢     ⅇ       B   0     ⁡     (       1   T     -     1     T   0         )                         
and
 
(2) Temperature Coefficient of Voltage (TCV) of the Linearized Thermistor Evaluated at Operating Temperature T
 
             TCV   =           B   0     ⁢     R     T   0     2     ⁢     R   Lin     ⁢     ⅇ     2   ⁢           ⁢       B   0     ⁡     (       1   T     -     1     T   0         )                   T   2     ⁡     [       R   Lin     +       R     T   0       ⁢     ⅇ       B   0     ⁡     (       1   T     -     1     T   0         )             ]       2       -         B   0     ⁢     R     T   0       ⁢     R   Lin     ⁢     ⅇ       B   0     ⁡     (       1   T     -     1     T   0         )               T   2     ⁡     [       R   Lin     +       R     T   0       ⁢     ⅇ       B   0     ⁡     (       1   T     -     1     T   0         )             ]                 
Where
 
TCV=Temperature Coefficient of Voltage (V/K)
 
T=Temperature for circuit operation (K)
 
V SUPPLY =Bias supply voltage (V)
 
I Leak =Device leakage current (A)
 
R Lin =Resistance of linearizing resistor, placed in parallel with the thermistor (Ω)
 
R 2 =Resistance of divider resistor (Ω)
 
T 0 =Thermistor reference temperature (K)
 
     The operating temperature T is not necessarily in the center of the operating range. This temperature can be any temperature within the range, and is often selected as the most likely temperature. 
     With the two conditions of operating voltage and voltage coefficient of temperature satisfied, the temperature compensation voltage divider will provide the proper bias voltage at temperature and will then vary the applied bias as the temperature varies with a slope that is equal to the slope of the gain change in temperature. In this way the circuit will maintain the gain at the selected value. 
     Operating Groups of Detector Devices from a Single VSupply Source 
     Whereas the TCG is nearly invariant between devices of a particular manufacture, the operating voltage (V OP ) of each SiPM varies over several hundred percent of the control range. It is necessary to provide a stabilized voltage value to each individual circuit. This can be impractical for any large array with a large number of SiPM devices. 
     Referring to  FIG. 2 , which depicts a second and preferred embodiment according to the present invention, the method described here allows the use of a three-resistor voltage divider to achieve correct slope and intercept for a range of device operating voltages while requiring only a single input voltage for the bias voltage divider for a large number (group) of circuits. The approach here is then to gather devices with similar characteristics and operate each group from a common V Supply  voltage, thus minimizing the number of supplies necessary. 
     The addition of the third “source” resistor  30  having source resistance R S  provides an offset to allow operation of the two-resistor voltage divider with a wider range of input voltages. This is the design element that allows the use of a much smaller subset of supply voltage values shared within a group of detector devices where a two-resistor voltage divider would require many times more distinct values to achieve both slope and intercept for the same number of detector devices. 
     For this case with a third resistor the output voltage condition becomes: 
                     V   OP     =         R   2     ⁡     [       V   SUPPLY     -       I   LEAK     ⁡     [       [         R   Lin     ⁢     R     T   0       ⁢     ⅇ       B   0     ⁡     (       1   T     -     1     T   0         )               R   Lin     +       R     T   0       ⁢     ⅇ       B   0     ⁡     (       1   T     -     1     T   0         )               ]     +     R   s       ]         ]           R   S     +     R   2     +         R   Lin     ⁢     R     T   0       ⁢     ⅇ       B   0     ⁡     (       1   T     -     1     T   0         )               R   Lin     +       R     T   0       ⁢     ⅇ       B   0     ⁡     (       1   T     -     1     T   0         )                           (   3   )               
and the TCV condition that must be met becomes:
 
     
       
         
           
             
               
                 
                   
                     TCV 
                     = 
                     
                       
                         - 
                         
                           
                             
                               
                                 
                                   
                                     R 
                                     2 
                                   
                                   ⁡ 
                                   
                                     [ 
                                     
                                       
                                         V 
                                         SUPPLY 
                                       
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                                         ⁡ 
                                         
                                           [ 
                                           
                                             
                                               
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                                               ⁢ 
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                   ⁢ 
                   Where 
                   ⁢ 
                   
                     
 
                   
                   ⁢ 
                   
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                     = 
                     
                       
                         R 
                         
                           T 
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                       ⁢ 
                       
                         ⅇ 
                         
                           
                             B 
                             0 
                           
                           ( 
                           
                             
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                   ( 
                   4 
                   ) 
                 
               
             
           
         
       
     
     With the addition of this source resistance R S  a solution set can now be found for a group of SiPM devices that requires only a single stabilized voltage source value. 
     Summary of Method for Passively Compensating for Temperature Gain 
     The method for passively compensating for temperature coefficient of gain in a system including a plurality of multiple pixel avalanche photo detector devices, described hereinabove, results in a typically unique set of exact value resistors (R S  and R 2 ) for every SiPM device operating voltage (V OP ) within a manufacturing lot. In practice some error may be tolerated so that similar devices (that is, SiPM devices with similar V OP  characteristics) may have identical resistor solutions. 
     A variation of the method is applicable which presumes a small subset of fixed input voltage values which can then reduce the number of trimming resistors required. The number of devices in a group that can be supplied by a single V Supply  depends on the variation of V OP  and the overall number of devices to be powered. Larger groups or those with larger variations will result in reduced performance in matching TCV. 
     To further minimize costs, the well-known technique of employing binary weighted trim resistors is also assumed that allows a set of resistors (chosen from standard value sets) to be assembled identically for each SiPM device in large set, and then jumpers selected to adjust the total resistance values as required to meet the Vop for each individual device. This approach minimizes cost of fabrication and assembly at the cost of a simple calibration step at final assembly. 
     These two techniques (input voltages and resistor trimming) can be applied in different measures (weights) depending on the restrictions of the application and the desired errors allowable for gain stabilization. 
     The method of calculation and analysis that allows design of a three-resistor temperature sensitive voltage divider bias compensation circuit that provides for a reasonably and arbitrarily small set of supply voltages to be used to achieve gain compensation and matching of both slope and intercept of the compensation to within errors of the component tolerances chosen includes the following steps: 
     1. Determine the Temperature Coefficient of Gain (TCG) for the devices 
     2. Either directly, or from the TCG and the Gain/Voltage relationship for the devices, determine the Temperature Coefficient of Voltage (TCV) that will compensate the TCG. 
     3. Select an Input Voltage greater than the highest Vop for all devices. How much greater is determined by the divider current which is generally a function of the thermistor characteristic. Initial iterations may be required to discover a suitable selection.
 
4. Select a thermistor with characteristics R T0  (often R at 25° C.), T 0  (often 25° C.) and B 0  (Thermistor Beta characteristic at range of temperatures of interest).
 
5. Select a linearizing resistor R Lin  that minimizes nonlinearity of the parallel combination at the operating temperature T so that a best choice tradeoff is made over desired range of temperatures. This selection process may be approached in a variety of ways. Minimizing a set of weighted errors across the operating temperature range is often sufficient.
 
6. Using the equation below, determine current I 0  through the linearized thermistor combination that will result in the desired TCV at the temperature of interest T 0 . Note that this current would also include the device leakage current if it is significant with respect to the total current.
 
                       I   0     =       -     TCV   desired         [           B   0     ⁢     R     T   0       ⁢   U           T   2     ⁡     [       R   Lin     +   U     ]       2       -         B   0     ⁢     R   Lin     ⁢   U         T   2     ⁡     [       R   Lin     +   U     ]           ]         ⁢     
     ⁢   where   ⁢     
     ⁢     U   =       R     T   0       ⁢     e       B   0     ⁡     (       1   T     -     1     T   0         )             ⁢     
     ⁢     T   =     Temperature   ⁢           ⁢   for   ⁢           ⁢   circuit   ⁢           ⁢     operation   ⁡     (   K   )                   (   5   )               
7. Determine the exact value of R 2  that will result in the correct Vop at the temperature of interest from thermistor current I 0  found in step 6 above. Because the current in the linearized thermistor would also include leakage current that does not pass through R 2  the leakage current is subtracted here.
 
                     R   2     =       V   OP         I   0     -     I   Leak                 (   6   )               
8. Determine the exact value for R S  that will result in the sum of voltage drops across R S , the linearized thermistor and R 2  to equal the supply voltage V Supply .
 
                     R   S     =           V   Supply     -     V   OP         I   0       -         R   Lin     ⁢     R     T   0       ⁢     e       B   0     ⁡     (       1   T     -     1     T   0         )               R   Lin     +       R     T   0       ⁢     e       B   0     ⁡     (       1   T     -     1     T   0         )                         (   7   )               
9. Select approximate values for R 2  and for R S  from available resistors, or construct resistor combination to more closely approximate the exact values.
 
10. Repeat steps 7 through 9 for each different device V OP . Groups of devices with similar V OP  may share the same V Supply  in step 8.
 
     Note that granularity of available resistor values, the value tolerances and their temperature coefficients will limit the precision to which the ideal resistance values for R 2  and R S  can be practically achieved. Additional resistors used in a trimming scheme will improve the precision but eventually the tolerance and temperature coefficient of the resistor values may dominate beyond trimming the 0.1% level. Estimates of the impacts of component values on circuit performance may be estimated using the following equations. 
     Sensitivity (V/Ω) of Vop to Variation in R 2  is Given by: 
                         ⅆ   V       ⅆ     R   2         =           V   supply     -       I   Leak     ⁡     [         R   Lin     ⁢   U         R   Lin     +   U       ]             R   2     +     [         R   Lin     ⁢   U         R   Lin     +   U       ]         -         R   2     ⁡     [       V   Supply     -       I   Leak     ⁡     [         R   Lin     ⁢   U         R   Lin     +   U       ]         ]           [       R   2     +     [         R   Lin     ⁢   U         R   Lin     +   U       ]       ]     2           ⁢     
     ⁢   where   ⁢     
     ⁢     U   =       R     T   0       ⁢     e       B   0     ⁡     (       1   T     -     1     T   0         )                     (   8   )               
Sensitivity (V/Ω) of Vop to Variation in R S  is Given by:
 
     
       
         
           
             
               
                 
                   
                     
                       
                         ⅆ 
                         V 
                       
                       
                         ⅆ 
                         
                           R 
                           S 
                         
                       
                     
                     = 
                     
                       
                         
                           
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                           ⁢ 
                           
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                           2 
                         
                       
                     
                   
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                   ⁢ 
                   where 
                   ⁢ 
                   
                     
 
                   
                   ⁢ 
                   
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                     = 
                     
                       
                         R 
                         
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                       ⁢ 
                       
                         e 
                         
                           
                             B 
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                             ( 
                             
                               
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                   ( 
                   9 
                   ) 
                 
               
             
           
         
       
     
     Sensitivity to the temperature coefficient of resistance for divider resistors (exclusive of the thermistor) can be mitigated by maintaining the temperature of the non-thermistor divider components stabilized to within a few degrees C. 
     Sensitivity to the change in device dark current (leakage) can be important in some applications, particularly where radiation damage can alter the dark rate. 
     To minimize the effect of changes in dark current on the set point voltage, the initial step of choosing the thermistor should include consideration not only of this additional current but also its change. Selecting a smaller value for the thermistor will increase the divider current (and divider dissipated power) but will make the impact of dark current and its changes much smaller. 
     Although the description above contains various specific descriptions, materials, and dimensions, these should not be construed as limiting the scope of the invention but as merely providing illustrations of some of the presently preferred embodiments of this invention. Thus the scope of the invention should be determined by the appended claims and their legal equivalents, rather than by the examples given.