Abstract:
A method of driving a plasma display device wherein one frame is divided into a plurality of sub-fields each including a reset period, an address period, and a sustain period, and a gray level is expressed by a combination of weight values of luminances of the sub-fields. The method includes changing a number of the sub-fields in one frame based on a cumulative operating time of the plasma display device; and changing a width, and/or a slope, and/or a number of a reset pulse supplied to a plasma display panel of the plasma display device in the reset period, and/or a scan pulse supplied to the plasma display panel in the address period, and/or a sustain pulse supplied to the plasma display panel in the sustain period when the number of the sub-fields in one frame is changed.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application claims the benefit of Korean Patent Application No. 2006-117889 filed on Nov. 27, 2006, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. 
       BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    An aspect of the invention relates to a plasma display device and a driving method thereof, and more particularly to a plasma display device and a driving thereof that can generate a stable electric discharge and compensate for a reduction in luminance. 
         [0004]    2. Description of the Related Art 
         [0005]    Generally, a plasma display device is a display device using a plasma display panel (hereafter referred to as a “PDP”) for displaying text or an image using a plasma generated by a gas discharge. 
         [0006]    The PDP is driven by dividing one frame into a plurality of sub-fields each having a respective weight value. A state of a discharge cell is initialized during a reset period in each of the sub-fields, light emitting cells and non-light emitting cells are selected during an address period in each of the sub-fields, and a sustain discharge is performed in light emitting cells during a sustain period in each of the sub-fields to actually display an image. Further, a gray level is displayed by a combination of weight values of luminances of the sub-fields emitted from the light emitting cells. 
         [0007]    When the PDP has been operated for a long time, a protective layer, a phosphor, and the like inside the PDP deteriorate. Accordingly, the PDP suffers from a problem wherein a discharge characteristic, especially a luminance, is reduced in a PDP that has been operated for a long time compared to a PDP that has been operated for a short time. 
       SUMMARY OF THE INVENTION 
       [0008]    Accordingly, an aspect of the invention is to provide a plasma display device and a driving method thereof that can generate a stable discharge and compensate for a reduction in luminance. 
         [0009]    According to an aspect of the invention, in a method of driving a plasma display device, one frame is divided into a plurality of sub-fields each including a reset period, an address period, and a sustain period, and a gray level is expressed by a combination of weight values of luminances of the sub-fields. The method includes changing a number of the sub-fields in one frame based on a cumulative operating time of the plasma display device; and changing a width, and/or a slope, and/or a number of a reset pulse supplied to a plasma display panel of the plasma display device in the reset period, and/or a scan pulse supplied to the plasma display panel in the address period, and/or a sustain pulse supplied to the plasma display panel in the sustain period when the number of the sub-fields in one frame is changed. 
         [0010]    The changing of a number of the sub-fields in one frame may include checking whether the cumulative operating time of the plasma display device has exceeded a critical time; and reducing the number of the sub-fields in one frame when the cumulative operating time has exceeded the critical time to a number of sub-fields that is less than the number of the sub-fields in one frame when the cumulative operating time has not exceeded the critical time. 
         [0011]    The changing of a width, and/or a slope, and/or a number may include changing a width, and/or a slope, and/or a number of the reset pulse supplied to the plasma display panel in the reset period in each of the reduced number of sub-fields. 
         [0012]    The changing of a width, and/or a slope, and/or a number may include changing a width of the scan pulse supplied to the plasma display panel in the address period in each of the reduced number of sub-fields. 
         [0013]    The changing of a width, and/or a slope, and/or a number may include changing a width, and/or a slope, and or a number of the sustain pulse supplied to the plasma display panel in the sustain period in each of the reduced number of sub-fields. 
         [0014]    According to another aspect of the invention, a plasma display device includes a plasma display panel; a controller to divide one frame into a plurality of sub-fields each including a reset period, an address period, and a sustain period; and a driver to supply a reset pulse to the plasma display panel in the reset period, a scan pulse to the plasma display panel in the address period, and a sustain pulse to the plasma display panel in the sustain period. The controller changes a number of the sub-fields in one frame based on a cumulative operating time of the plasma display device, and changes a width, and/or a slope, and/or a number of the reset pulse, and/or the scan pulse, and/or the sustain pulse when the number of the sub-fields in one frame is reduced. 
         [0015]    The controller may include a time checker to check whether the cumulative operating time of the plasma display device has exceeded a critical time; and a sub-field generator to reduce the number of the sub-fields in one frame when the cumulative operating time has exceeded the critical time to a number of sub-fields that is less than the number of sub-fields in one frame when the cumulative operating time has not exceeded the critical time. 
         [0016]    The controller may further include a reset pulse controller to change a width, and/or a slope, and/or a number of the reset pulse supplied to the plasma display panel in the reset period in each of the reduced number of sub-fields. 
         [0017]    The controller may further include a scan pulse controller to change a width of the scan pulse supplied to the plasma display panel in the address period in each of the reduced number of sub-fields. 
         [0018]    The controller may further include a sustain number generator to change a number of the sustain pulse supplied to the plasma display panel in the sustain period in each of the reduced number of sub-fields. 
         [0019]    The controller may further include a sustain number generator to determine a number of the sustain pulse to be supplied to the plasma display panel in each of the sub-fields; and a sustain pulse controller to change a width and/or a slope of the sustain pulse supplied to the plasma display panel in each of the reduced number of sub-fields. 
         [0020]    According to another aspect of the invention, a method of driving a plasma display device that includes a plasma display panel includes dividing one frame into a plurality of sub-fields; changing a number of the sub-fields in one frame based on a cumulative operating time of the plasma display device; and changing a parameter of a pulse supplied to the plasma display panel in each of the changed number of sub-fields. 
         [0021]    Additional aspects and/or advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0022]    The above and other aspects and advantages of the invention will be more apparent from the following description of embodiments of the invention, taken in conjunction with the accompanying drawings of which: 
           [0023]      FIG. 1  is a block diagram of a plasma display device according to a first aspect of the invention; 
           [0024]      FIG. 2  is a block diagram of a controller shown in  FIG. 1  according to the first aspect of the invention; 
           [0025]      FIG. 3  is a diagram of sub-fields of respective frames that are reduced in number after the plasma display device shown in  FIG. 1  according to the first aspect of the invention has been operated for a long time; 
           [0026]      FIGS. 4   a  and  4   b  are waveform diagrams of a reset pulse supplied in a reset period of respective sub-fields shown in  FIG. 3  according to the first aspect of the invention; 
           [0027]      FIG. 5  is a block diagram of a controller of a plasma display device according to a second aspect of the invention; 
           [0028]      FIG. 6  is a waveform diagram of a scan pulse supplied in an address period of respective sub-fields of the plasma display device according to the second aspect of the invention; 
           [0029]      FIG. 7  is a block diagram of a controller of a plasma display device according to a third aspect of the invention; 
           [0030]      FIG. 8  is a waveform diagram of a sustain pulse supplied in a sustain period of respective sub-fields of the plasma display device according to the third aspect of the invention; 
           [0031]      FIG. 9  is a block diagram of a controller of a plasma display device according to a fourth aspect of the invention; 
           [0032]      FIG. 10  is a diagram showing total reset periods, total address periods, total sustain periods, and total idle periods in respective frames of the plasma display device according to the fourth aspect of the invention; and 
           [0033]      FIG. 11  is a waveform diagram of a sustain pulse supplied in a sustain period of respective sub-fields of the plasma display device according to the fourth aspect of the invention. 
       
    
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS 
       [0034]    Reference will now be made in detail to embodiments of the invention, examples of which are shown in the accompanying drawings, wherein like reference numerals refer to like elements throughout. The embodiments are described below by referring to the figures. 
         [0035]      FIG. 1  is a block diagram of a plasma display device according to a first aspect of the invention. 
         [0036]    Referring to  FIG. 1 , the plasma display device includes a plasma display panel (PDP or panel)  110  displaying an image, an address driver  104  supplying data to address electrodes (A 1  to Am) of the PDP  110 , a scan driver  106  driving scan electrodes (Y 1  to Yn) of the PDP  110 , a sustain driver  108  driving sustain electrodes (X 1  to Xn) of the PDP  110 , and a controller  102  controlling the drivers  104 ,  106 , and  108 . 
         [0037]    The PDP  110  displays an image using a plurality of discharge cells (C) arranged in a matrix. The discharge cells (C) are at intersections of the address electrodes (A 1  to Am) extending in the column direction, the scan electrodes (Y 1  to Yn) extending in the row direction, and the sustain electrodes (X 1  to Xn) extending in the row direction and forming pairs with the scan electrodes (Y 1  to Yn). The address electrodes (A 1  to Am) cross the scan electrodes (Y 1  to Yn) and the sustain electrodes (X 1  to Xn). 
         [0038]    The address driver  104  supplies a data signal to select discharge cells to be displayed to the address electrodes (A) in response to an address control signal outputted from the controller  102 . 
         [0039]    The scan driver  106  applies driving voltages to the scan electrodes (Y 1  to Yn) in response to a scan control signal outputted from the controller  102 . 
         [0040]    The sustain driver  108  applies driving voltages to the sustain electrodes (X 1  to Xn) in response to a sustain control signal outputted from the controller  102 . 
         [0041]    The controller  102  divides one frame into a plurality of sub-fields each including a reset period, an address period, and a sustain period. Further, the controller  102  receives a vertical/horizontal synchronizing signal (not shown) and then generates the address control signal, the scan control signal, and the sustain control signal to control the drivers  104 ,  106 , and  108 . The control signals are supplied to the drivers  104 ,  106 , and  108  so that the controller  102  controls the drivers  104 ,  106 , and  108 . 
         [0042]      FIG. 2  is a block diagram of the controller  102  shown in  FIG. 1  according to the first aspect of the invention. 
         [0043]    The controller  102  of the plasma display device shown in  FIG. 2  includes a gamma corrector  112 , an error diffuser  114 , a sub-field generator  116 , a memory controller  118 , a time checker  120 , a reset pulse controller  122 , and a scan controller  124 . 
         [0044]    The gamma corrector  112  processes an inputted image data (R, G and B) having a reverse nonlinear input/output characteristic to be image data (R, G and B) having a linear input/output characteristic. 
         [0045]    The error diffuser  114  error-diffuses some bits of the image data (R, G and B), gamma-corrected by the gamma corrector  112 , to adjacent discharge cells. The operation of the error diffuser  114  is known to those of ordinary skill in the art, and accordingly it will not be described in detail here. 
         [0046]    The time checker  120  measures and accumulates a cumulative operating time of the plasma display device. The cumulative operating time may be measured by sensing a point of time when a power-on signal is supplied to a power supply (not shown), or a point of time when a sustain voltage is supplied to a driver of the PDP  110  or to the PDP  110 , or by various other methods. 
         [0047]    The time checker  120  supplies a deterioration sensing signal (DSC) to the sub-field generator  116  and the reset pulse controller  122  when the cumulative operating time accumulated from a first time the plasma display device was operated after being manufactured to the present time exceeds a critical time. In this case, the critical time, which is a time when a protection layer or a phosphor inside the PDP  110  begins to deteriorate, thereby causing a discharge characteristic of the PDP  110  to begin to deteriorate, may be determined by testing a pre-production sample of the plasma display device. 
         [0048]    The sub-field generator  116  generates a number of sub-fields corresponding to a gray level of image data outputted from the error diffuser  114 , and generates sub-field data corresponding to the number of sub-fields. Further, the sub-field generator  116  reduces the number of sub-fields corresponding to the gray level of the image data outputted from the error diffuser  114  in response to the DSC, and then generates sub-field data corresponding to the reduced number of sub-fields. For example, as shown in  FIG. 3 , the sub-field generator  116  generates 11 sub-fields (SF 1  to SF 11 ) before the DSC is inputted to the sub-field generator  116  from the time checker  120 , and generates 10 sub-fields (SF 1  to SF 10 ) after the DSC is inputted to the sub-field generator  116  from the time checker  120  as a result of the plasma display device having been operated for a long time. In this case, it is necessary to reduce the number of sub-fields in a range in which there is no difference in gray level expression. 
         [0049]    The memory controller  118  rearranges sub-field data generated from the sub-field generator  116  into address data for driving the PDP  110  and supplies the address data to the address driver  104 . Specifically, the memory controller  118  stores the address data according to a plurality of sub-fields included in one frame in a frame memory (not shown), and supplies the address data, corresponding to all discharge cells according to the respective sub-fields, read from the frame memory to the address driver  104 . 
         [0050]    The reset pulse controller  122  controls a reset pulse supplied in each of the reduced number of sub-fields in response to the deterioration sensing signal (DSC). The operation of the reset controller  122  will be explained in detail with reference to  FIGS. 4   a  and  4   b.    
         [0051]    As shown in  FIG. 4   a , the reset pulse controller  122  increases a number of reset pulses supplied in a reset period (PR) in each of the reduced number of sub-fields. 
         [0052]    In other words, when the panel  110  has been operated for a short time, the reset period (PR) in sub-fields is divided into a rising period and a falling period. On the other hand, when the panel  110  has been operated for a long time, the reset period (PR) in each of the reduced number of sub-fields is divided into two rising periods and two falling periods. In the rising period of the reset period (PR), a reset pulse followed by a voltage that gradually increases from Vs to Vset is supplied to a scan electrode (Y) while a sustain electrode (X) is maintained at a reference voltage (which is 0V in  FIG. 4   a ). In the falling period of the reset period (PR), a reset pulse followed by a voltage that gradually decreases from Vs to Vnf is supplied to a scan electrode (Y) while a voltage Ve is applied to the sustain electrode (X). 
         [0053]    Thus, the number of reset pulses supplied in the reset periods (PR) of the panel  110  that has been operated for a long time is larger than the number of reset pulses supplied in the reset periods (PR) of the panel  110  that has been operated for a short time. When a relatively larger number of reset pulses are applied to the panel  110  that has been operated for a long time, in other words, to the panel  110  that has an unstable internal characteristic, as compared to the panel  110  that has been operated for a short time, a wall charge large enough to smoothly perform an address operation in a discharge cell will be generated as a result of generating a reset discharge at least two times in each of the reset periods (PR). However, it is understood that more than two reset pulses can be applied in each of the reset periods (PR) to the panel  110  that has been operated for a long time in other aspects of the invention. 
         [0054]    As shown in  FIG. 4   b , the reset pulse controller  122  controls a rising slope of a reset pulse increasing from Vs to Vset and/or a falling slope of the reset pulse decreasing from Vs to Vnf. In other words, the rising and falling slopes of the reset pulse supplied in the reset period (PR) of the panel that has been operated for a long time are more gradual, i.e., less steep, than the reset pulse supplied in the reset period (PR) of the panel that has been operated for a short time. The reset pulse having the rising and falling slopes that are relatively less steep is supplied to the panel that has been operated for a long time, in other words to the panel that has an unstable internal characteristic, as compared to the panel that has been operated for a short time. Accordingly, a driving margin of the reset discharge is improved by relatively increasing a probability that a reset discharge will occur. However, it is understood that two or more reset pulses having the rising and falling slopes that are relatively less steep can be applied in each of the reset periods (PR) to the panel  110  that has been operated for a long time in other aspects of the invention. 
         [0055]    The scan controller  124  generates a control signal corresponding to the number and/or the slopes of the reset pulses controlled by the reset pulse controller  122 , and supplies the control signal to the scan driver  106  which generates the reset pulses in accordance with the control signal. 
         [0056]      FIG. 5  is a block diagram of a controller of a plasma display device according to a second aspect of the invention. 
         [0057]    The controller  102  of the plasma display device shown in  FIG. 5  has the same configuration as the controller  102  shown in  FIG. 2  according to the first aspect of the invention, except that the controller  102  in  FIG. 5  includes a scan pulse controller  134  instead of the reset pulse controller  122  shown in  FIG. 2 . Accordingly, only the scan pulse controller  134  will be described in detail here. 
         [0058]    The scan pulse controller  134  controls a width of a scan pulse supplied in each of the reduced number of sub-fields in response to the deterioration sensing signal (DSC). The operation of the scan pulse controller will be explained in detail with reference to  FIG. 6 . 
         [0059]    As shown in  FIG. 6 , the scan pulse controller  134  increases a width of a scan pulse supplied in an address period (PA) in each of the reduced number of sub-fields. In the address period (PA) for selecting a discharge cell to be turned on, a scan pulse having a voltage VscL and an address pulse having a voltage Va are respectively applied to a selected scan electrode (Y) and an address electrode (A) while a sustain electrode (X) is maintained at a voltage Ve. In this case, the address pulse has a width corresponding to the width of the scan pulse. That is, when the width of the scan pulse is increased by the scan pulse controller  134 , the width of the address pulse is further increased to correspond to the width of the scan pulse. Further, the unselected scan electrodes (Y) (not shown) are biased at a voltage VscH higher than the voltage VscL, and a reference voltage is applied to the address electrodes (A) corresponding to discharge cells that are to be turned off (not shown). An address discharge is generated in a discharge cell to be turned on located at the intersection of the address electrode (A) to which the voltage Va is applied and the scan electrode (Y) to which the voltage VscL is applied. 
         [0060]    In other words, a width (W 2 ) of the scan pulse supplied to the panel  110  that has been operated for a long time is larger than a width (W 1 ) of the scan pulse supplied to the panel  110  that has been operated for a short time. When a scan pulse having a relatively increased width is supplied to the panel  110  that has been operated for a long time, in other words, to the panel  110  that has an unstable internal characteristic, as compared to the panel  110  that has been operated for a short time, a probability of generating an address discharge relatively increases, thereby making it possible to generate a stable address discharge. 
         [0061]    The scan controller  124  generates a control signal corresponding to the width of the scan pulse controlled by the scan pulse controller  134 , and supplies the control signal to the scan driver  106  which generates the scan pulse in accordance with the control signal. 
         [0062]      FIG. 7  is a block diagram of a controller of a plasma display device according to a third aspect of the invention. 
         [0063]    The controller  102  of the plasma display device shown in  FIG. 7  has the same configuration as the controller  102  shown in  FIG. 2  according to the first aspect of the invention, except that the controller  102  shown in  FIG. 7  includes an automatic power controller (APC)  126 , a sustain number generator  128 , a sustain pulse controller  130 , and a sustain controller  132  instead of the reset pulse controller  122  shown in  FIG. 2 . Accordingly, only the APC  126 , the sustain number generator  128 , the sustain pulse controller  130 , and the sustain controller  132  will be described in detail here. 
         [0064]    The APC  126  detects a load factor of a displayed frame using image data outputted from the error diffuser  114 , and calculates an APC level according to the detected load factor. The operation of the APC  126  is known to those of ordinary skill in the art, and accordingly it will not be described in detail here. 
         [0065]    The sustain number generator  128  determines a number of sustain pulses to be supplied in each of the sub-fields based on the APC level calculated by the APC  126 . 
         [0066]    The sustain pulse controller  130  controls a width of a rising period, and/or a width of a maintaining period, and/or a width of a falling period of the sustain pulses supplied in each of the reduced number of sub-fields in response to the deterioration sensing signal (DSC). The operation of the sustain pulse controller  130  will be explained in detail with reference to  FIG. 8 . 
         [0067]    As shown in  FIG. 8 , the sustain pulse controller  130  increases a width of a sustain pulse having a voltage Vs that is alternately supplied to a scan electrode (Y) and sustain electrode (X) in a sustain period (PS) of the reduced number of sub-fields. In other words, the width of the sustain pulse supplied to the panel  110  that has been operated for a long time is larger than the width of the sustain pulse supplied to the panel  110  that has been operated for a short time. When a sustain pulse having a relatively increased width is supplied to the panel  110  that has been operated for a long time, in other words, to the panel  110  that has an unstable internal characteristic, as compared to the panel  110  that has been operated for a short time, a probability of generating a sustain discharge relatively increases, thereby making it possible to generate a stable sustain discharge. If the width of the rising period of the sustain pulse is increased, a slope of a rising portion of the sustain pulse will be decreased. If the width of the falling period of the sustain pulse is increased, a slope of a falling portion of the sustain pulse will be decreased. 
         [0068]    The scan controller  124  and the sustain controller  132  generate control signals corresponding to the width of the sustain pulse controlled by the sustain pulse controller  130 , and supply the control signals to the scan driver  106  and the sustain driver  108  which generate the sustain pulse in accordance with the control signals. 
         [0069]      FIG. 9  is a block diagram of a controller of a plasma display device according to a fourth aspect of the invention. 
         [0070]    The controller  102  of the plasma display device shown in  FIG. 9  has the same configuration as the controller  102  shown in  FIG. 2  according to the first aspect of the invention, except that the controller  102  shown in  FIG. 9  includes an automatic power controller (APC)  126 , a sustain number generator  128 , and a sustain controller  312  instead of the reset pulse controller  122  shown in  FIG. 2 . Accordingly, only the APC  126 , the sustain number generator  128 , and the sustain controller  132  will be described in detail here. 
         [0071]    The APC  126  detects a load factor of a displayed frame using image data outputted from the error diffuser  114 , and calculates an APC level according to the detected load factor. The operation of the APC  126  is known to those of ordinary skill in the art, and accordingly it will not be described in detail here. 
         [0072]    The sustain number generator  128  determines a number of sustain pulses to be supplied in each of the sub-fields based on the APC level calculated by the APC  126 , and controls the number of sustain pulses supplied in each of the reduced number of sub-fields in response to the deterioration sensing signal (DSC). The operation of the sustain number generator  128  will be explained in detail with reference to  FIGS. 10 and 11 . 
         [0073]    As shown in  FIG. 10 , when the panel  110  has been operated for a long time, the number of the sub-fields in one frame is decreased by the sub-field generator  116  in response to the DSC, so that a total number of reset periods, a total number of address periods, a total number of sustain periods, and a total number of idle periods in one frame are lower than in the panel  110  that has been operated for a short time. The extra time that is obtained by reducing the total number of reset periods, the total number of address periods, and the total number of idle periods in one frame by reducing the number of sub-fields in one frame is allocated to the sustain periods in the reduced number of sub-fields, preferably in proportion to the original time lengths of the sustain periods. Accordingly, when the panel  110  has been operated for a long time, the total time allocated to the sustain periods in one frame is longer than when the panel  110  has been operated for a short time, and the sustain periods in the reduced number of frames are relatively longer than corresponding sustain periods in the original number of sub-fields. 
         [0074]    Accordingly, when the panel  110  has been operated for a long time, the number of sustain pulses supplied in a sustain period (PS) which is relatively lengthened increases as shown in  FIG. 11  as compared to the panel  110  that has been operated for a short time. In other words, the number of sustain pulses supplied to the panel  110  that has been operated for a long time is higher than the number of sustain pulses supplied to the panel  110  that has been operated for a short time. When a relatively larger number of sustain pulses are supplied to the panel  110  that has been operated for a long time, in other words, to the panel  110  that has an unstable internal characteristic, as compared to the panel  110  that has been operated for a short time, as a result of allocating the extra time obtained by reducing the number of sub-fields in one frame to the sustain periods in the reduced number of sub-fields, the luminance of the panel  110  that has been operated for a long time is improved. 
         [0075]    The scan controller  124  and the sustain controller  132  generate control signals corresponding to the number of the sustain pulses controlled by the sustain number generator  128 , and supply the control signals to the scan driver  106  and the sustain driver  108  which generate the sustain pulses in accordance with the control signals. 
         [0076]    As described above, a plasma display device according to aspects of the invention produces the following and/or other effects. When a plasma display panel has been operated for a long time, a number of sub-fields in one frame is reduced, and a reset pulse, and/or a scan pulse, and/or a sustain pulse is/are controlled in the reduced number of sub-fields, so that a reset discharge, and/or an address discharge, and/or a sustain discharge is/are stabilized or/and a luminance is improved. 
         [0077]    Although several embodiments of the invention have been shown and described, it would be appreciated by those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the claims and their equivalents.