Abstract:
In a receiving apparatus comprising a quadrature mixer ( 5 ) for mixing a radio-frequency signal with a local oscillator signal to in-phase (I) and quadrature (Q) signal components at an intermediate frequency, a polyphase filter ( 9 ) for band pass filtering the IQ signal components, and an analog-to-digital converter ( 13 ) for converting the IQ signal components into digital form, and in which receiving apparatus adjacent channel interference may occur due to IQ signal component mismatching in the quadrature mixer ( 5 ), there is provided an adjacent channel rejection device connected between the quadrature mixer ( 5 ) and the polyphase filter ( 9 ). The device comprises an analog compensation circuit ( 33   a   ; 33   b   ; 33   a - b ) for compensating for the IQ signal component mismatching.

Description:
PRIORITY  
         [0001]    This application claims priority to Swedish application no. 0301824-9 filed Jun. 24, 2003.  
         TECHNICAL FIELD OF THE INVENTION  
         [0002]    The present invention relates to receiving apparatuses, such as e.g. radio receivers, using an IF (intermediate frequency) architecture with a polyphase filter, in which adjacent channel interference due to IQ (in-phase and quadrature) signal mismatch occurs. More specifically the invention relates to an adjacent channel rejection device, a receiving apparatus and a method of operating a receiving apparatus.  
         DESCRIPTION OF RELATED ART AND BACKGROUND OF THE INVENTION  
         [0003]    Low-IF architectures have a number of advantages for low cost radio receivers, most notably the absence of an external filter component and insensitivity to DC offsets in the receiver chain.  
           [0004]    A prior art example low-IF receiver structure is pictured in FIG. 1. A radio signal is initially received by an antenna  1 , and a low noise amplifier (LNA)  3  provides initial amplification of the received signal. A quadrature mixer  5  then mixes the signal with the output of a local oscillator  7  into in-phase I and quadrature Q components with the frequency reduced so that the wanted signal is centered around the low-IF frequency. The signal is then filtered through a polyphase filter  9 , which has a band pass frequency response centered around the wanted signal to allow only the wanted signal to pass trough. Following amplification by a programmable gain amplifier (PGA) stage  11 , the signal is by means of an analog-to-digital converter  13  converted to digital form for demodulation.  
           [0005]    An ideal frequency plan of the low-IF receiver structure is shown in FIG. 2 a . The frequency F c  of the local oscillator  7  of the receiver is tuned to the frequency of the wanted signal  21  minus the low-IF frequency. The lower adjacent channel  23  is typically at a negative frequency after having been mixed in the quadrature mixer  5  as indicated in FIG. 2 a . The polyphase filter  9 , whose band pass frequency response is shown by the dashed curve  25 , allows the wanted channel to pass through.  
           [0006]    However, in practice, a number of effects interfere with the desired operation. The input signals from the local oscillator  7  to the mixer should ideally be sine and cosine signals, i.e. be sinusoids with a 90° phase difference. However, in practice there will be a slight phase error between the two signals. Additionally, there may be an amplitude error between the in-phase and quadrature signals caused by differences in gain between the two paths. The net result of these imperfections is that energy from negative frequencies, i.e. frequencies below the carrier frequency, are reflected or mirrored to appear as images at an equal positive frequency, as shown at  27  in FIG. 2 b.    
           [0007]    This reflection phenomenon is a severe problem in situations where the adjacent channel image is found within the pass band of the wanted signal, since it is not attenuated by the polyphase filter and thus appears as interference. Since, for example, in a WLAN 802.11 g receiver the adjacent channel signal can be up to 35 dB stronger than the wanted channel signal, this effect can be a limiting factor.  
           [0008]    The effect of the phase and amplitude error can be well modeled as a linear transformation on the signal I, Q, as follows excluding the polyphase filter:  
               (           I   ′               Q   ′           )     =       K        (           cos                 φ           sin                 φ             0         1   +   Δ           )            (         I           Q         )               (   1   )                               
 
           [0009]    where I′, Q′ are the distorted signal, φ is the phase error, Δ is the relative amplitude error, and K is a constant.  
           [0010]    A straightforward way to eliminate the mismatch is to perform the inverse operation on the signal, using digital multiplication and summation operations:  
               (         I           Q         )     =       K       (     1   +   Δ     )        cos                 φ            (           1   +   Δ             -   sin                   φ             0         cos                 φ           )          (           I   ′               Q   ′           )               (   2   )                               
 
           [0011]    A further small gain scaling or permitted gain error gives a simplified result:  
               (         I           Q         )     =         K   ′          (           1   +   α         β           0       1         )            (           I   ′               Q   ′           )               (   3   )                               
 
           [0012]    where K′=K/(1+Δ), 1+α=(1+Δ)/cos φ, and β=−sin φ/cos φ.  
           [0013]    There are a number of other manners to represent the error and the resulting compensation equation. However, they all have a similar effect.  
         SUMMARY OF THE INVENTION  
         [0014]    A problem with the above solution of carrying out digital operations to compensate for the mismatch includes the effect of the polyphase filter in the signal path, which imply that the inverse of the transfer function of the filter must also be calculated by the digital IQ compensation circuit. This is not feasible, since the filter has a null outside the pass band.  
           [0015]    A more intuitive explanation is that the IQ compensation circuit takes a portion of the adjacent channel signal and calculates a negative version of the image, canceling the image generated by the receiver. If the adjacent channel has been filtered away, it is no longer possible to use it to compensate the generated image.  
           [0016]    From the point of view of the receiver, it is only possible to compensate for errors in gain that occur after the polyphase filter, i.e. mismatch in gain between the I and Q paths of the PGA stages. However, this is of limited interest in a low-IF receiver: by this stage, the adjacent channel has been removed and cannot create any further image signal in the wanted channel. The critical issue is, therefore, the IQ mismatch that occurs before the polyphase filter.  
           [0017]    Accordingly, it is an object of the present invention to provide an adjacent channel rejection device, a receiver apparatus, and a method of operating a receiver apparatus, which are capable of rejecting adjacent channel interference, which occurs due to IQ mismatching in the quadrature mixer, i.e. before the polyphase filter.  
           [0018]    Still a further object of the present invention is to provide such device, apparatus, and method, which are accurate, precise, efficient, simple, and of low cost.  
           [0019]    These objects among others can be attained, for example, by an adjacent channel rejection device for a receiving apparatus, which receiving apparatus comprises a quadrature mixer for mixing an analog radio-frequency signal on a desired channel with a local oscillator signal to in-phase and quadrature signal components at an intermediate frequency, a polyphase filter for band pass filtering the in-phase and quadrature signal components, and an analog-to-digital converter for converting the in-phase and quadrature signal components into digital form, and in which adjacent channel interference may occur due to in-phase and quadrature signal component mismatching in the quadrature mixer, comprising an input for receiving the in-phase and quadrature signal components at the intermediate frequency before being band pass filtered by the polyphase filter, an analog compensation circuit device for compensating for the in-phase and quadrature signal component mismatching in the quadrature mixer, and an output for outputting towards the polyphase filter in-phase and quadrature signal components, after having compensated for the in-phase and quadrature signal component mismatching.  
           [0020]    The analog compensation circuit device can be provided for compensating one of the in-phase and quadrature signal components relative the other one of the in-phase and quadrature signal components. The analog compensation circuit device can be provided for implementing the compensation equation: 
             I=K ′((1+α) I′+βQ ′) 
           [0021]    where I is the compensated in-phase signal component, I′ and Q′ are the distorted in-phase and quadrature signal components due to the in-phase and quadrature signal component mismatching, and K′, α and β are related to the amplitude and phase errors as introduced by the in-phase and quadrature signal component mismatching. The analog compensation circuit device can be provided for compensating both the in-phase and quadrature signal components. The analog compensation circuit device can be provided for implementing essentially the compensation equation  
           (         I           Q         )     =       K       (     1   +   Δ     )        cos                 φ            (           1   +   Δ             -   sin                   φ             0         cos                 φ           )          (           I   ′               Q   ′           )         ,                         
 
           [0022]    where I and Q are the compensated in-phase and quadrature signal components, I′ and Q′ are the distorted in-phase and quadrature signal components due to the in-phase and quadrature signal component mismatching, K is a constant, and Δ and φ are the amplitude and phase errors as introduced by the in-phase and quadrature signal component mismatching. The analog compensation circuit device may comprise control inputs, via which the circuit device is controlled by digital signals. The analog compensation circuit device can be based on at least one operation amplifier with differential outputs in a summing configuration, wherein the analog compensation circuit device has two differential inputs operating as virtual ground current sinks, and the operation amplifier operates as a current-to-voltage converter.  
           [0023]    These objects can also be achieved by a receiving apparatus comprising a quadrature mixer for mixing an analog radio-frequency signal on a desired channel with a local oscillator signal to in-phase and quadrature signal components at an intermediate frequency, a polyphase filter for band pass filtering the in-phase and quadrature signal components, and an analog-to-digital converter for converting the in-phase and quadrature signal components into digital form, and in which receiving apparatus adjacent channel interference may occur due to in-phase and quadrature signal component mismatching in the quadrature mixer, wherein the receiving apparatus comprises an adjacent channel rejection device including an input for receiving the in-phase and quadrature signal components at the intermediate frequency before being band pass filtered by the polyphase filter, an analog compensation circuit for compensating for the in-phase and quadrature signal component mismatching in the quadrature mixer, and an output for outputting towards the polyphase filter the in-phase and quadrature signal components, after having compensated for the in-phase and quadrature signal component mismatching.  
           [0024]    The analog compensation circuit device can be provided for compensating one of the in-phase and quadrature signal components relative the other one of the in-phase and quadrature signal components. The analog compensation circuit device can be provided for implementing the compensation equation 
             I=K′( 1+α) I′+βQ ′) 
           [0025]    where I is the compensated in-phase signal component, I′ and Q′ are the distorted in-phase and quadrature signal components due to the in-phase and quadrature signal component mismatching, and K′, α and β are related to the amplitude and phase errors as introduced by the in-phase and quadrature signal component mismatching.  
           [0026]    These objects can furthermore be achieved by a method of operating a receiver apparatus comprising a quadrature mixer, in which adjacent channel interference may occur due to in-phase and quadrature signal component mismatching, comprising the steps of:  
           [0027]    mixing an analog radio-frequency signal on a desired channel with a local oscillator signal to in-phase and quadrature signal components at an intermediate frequency in the quadrature mixer,  
           [0028]    compensating for the in-phase and quadrature signal component mismatching in the quadrature mixer by an analog compensation circuit,  
           [0029]    band pass filtering the in-phase and quadrature signal components by a polyphase filter after having compensated for the in-phase and quadrature signal component mismatching, and  
           [0030]    converting the in-phase and quadrature signal components into digital form.  
           [0031]    By means of providing analog compensation circuits for compensating for the IQ mismatching in the quadrature mixer and connecting them between the quadrature mixer and the polyphase filter, the in-phase and quadrature signal component mismatching before the polyphase filter can be compensated for in a simple and effective manner.  
           [0032]    The operations performed using analog circuits are typically those performed by a digital IQ compensation unit: scaling and summation.  
           [0033]    Preferably, the analog compensation circuits are controlled by digital signals, whose values are established by a calibration procedure.  
           [0034]    Still preferably, the analog compensation circuits may either compensate both the in-phase and quadrature signal components, or the circuits may be simplified so that they modify either one of the in-phase and quadrature signal components at the expense of introducing a slight overall gain change. Such gain error can, however, easily be compensated for elsewhere in the receiver structure.  
           [0035]    Further characteristics of the invention and advantages thereof will be evident from the detailed description of preferred embodiments of the present invention given hereinafter and the accompanying FIGS. 1-4, which are only given by way of illustration, and thus are not limitative of the present invention. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0036]    [0036]FIG. 1 illustrates a prior art example low-IF receiver structure.  
         [0037]    [0037]FIG. 2 a  shows an ideal frequency plan of the low-IF receiver structure of FIG. 1.  
         [0038]    [0038]FIG. 2 b  shows a frequency plan of the low-IF receiver structure of FIG. 1 illustrating adjacent channel interference.  
         [0039]    [0039]FIG. 3 illustrates a low-IF receiver structure according to a preferred embodiment of the present invention.  
         [0040]    [0040]FIGS. 4 a - b  illustrate an adjacent channel rejection device according to a preferred embodiment of the invention. 
     
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS  
       [0041]    In FIG. 3 is illustrated a low-IF receiver structure according to a preferred embodiment of the present invention. The receiver comprises like the prior art structure of FIG. 1 an antenna  1  for receiving a radio signal, a low noise amplifier (LNA)  3  for initial amplification of the received radio signal, a local oscillator  7  for generating sine and cosine signals, a quadrature mixer  5  for mixing the amplified radio signal with the output of the local oscillator  7  into in-phase I and quadrature Q signal components at a low-IF frequency, a polyphase filter  9  having a band pass frequency response to allow only the wanted signal to pass through, a programmable gain amplifier (PGA) stage  11  for further amplification of the signal, and an analog-to-digital converter  13  for converting the signal to digital form for demodulation.  
         [0042]    According to the present invention, an analog network  31  is placed between the outputs of the quadrature mixer  5  and the inputs of the polyphase filter  9 , the purpose of which is to perform a linear combination of the in-phase I and quadrature Q signal components in order to compensate for IQ mismatch introduced up to the quadrature mixer  5 . This network  31  is preferably controlled by digital signals, whose values are established by a calibration procedure, e.g. in the factory.  
         [0043]    Such a network  31  may comprise circuits  33   a ,  33   b  for compensating both the I and Q signal components, or may comprise either circuit  33   a  or  33   b  for modifying either one the I or Q signal at the expense of introducing a slight overall gain change, which, however, can be compensated for by a change in the common gain elsewhere in the circuit.  
         [0044]    A further amplification stage (not illustrated) may be provided before or after the inventive analog network  31 .  
         [0045]    An exemplary embodiment of such kind of circuit  33   a  for compensating the I signal is shown in FIGS. 4 a - b , which implements the compensation equation of Eq. (3). This is based around an operational amplifier  41 , with differential outputs, in a standard summing configuration. The two differential inputs act as virtual ground current sinks, and the operation amplifier  41  itself acts as a current-to-voltage converter.  
         [0046]    In FIG. 4 a , I p ′ and I n ′ denote the distorted differential in-phase signal component, Q p ′ and Q n ′ denote the distorted differential quadrature signal component, I P  and I n  denote the differential in-phase signal component as compensated for the phase and amplitude errors relative the quadrature signal component, and  43  denote a cross-over switch at the quadrature signal input.  
         [0047]    In Eq. (3), the desired output is given by: 
           I=K ′(1+α) I′+βQ ′)  (4) 
         [0048]    where −α 1 &lt;α&lt;α 2 , α 1 ,α 2 &lt;&lt;1, and −β 1 &lt;β&lt;β 2 , β 1 , β 2 &lt;&lt;1.  
         [0049]    On the I′ input, each input current to the summing junction is made up of two components: a resistor R i1 , which is fixed, and an R- 2 R ladder, in FIG. 4 a  denoted by R i2 .  
         [0050]    An R- 2 R ladder, an exemplary embodiment of which is shown in FIG. 4 b , is a standard means of steering an amount of current proportional to a digital control signal into a current sink, while maintaining a constant input resistance. The R- 2 R ladder may comprise an arbitrary number of stages as being indicated in FIG. 4 b  by the dashed lines. Only the two most significant bits MSB and MSB- and the two least significant bits LSB, LSB+1 of the digital control signal are illustrated. Switches are preferably implemented using transistors in an appropriate configuration.  
         [0051]    With m stages in the R- 2 R ladder, the partial output of the operation amplifier  41  due to this current source is given by:  
             I   =       (         R   f       R   i1       +       AR   f         2   m          R   i2           )          I   ′               (   5   )                               
 
         [0052]    where R f  is a feedback resistance and A is an integer control input A such that 0&lt;A&lt;2 m . If no gain error is to result, the component values should be set up such that:  
                 R   f       R   i1       =       K   ′          (     1   -     α   1       )               (   6   )             and                               R   f       R   i1       +         (       2   m     -   1     )          R   f           2   m          R   i2           =       K   ′          (     1   +     α   2       )               (   7   )                               
 
         [0053]    For the Q input, the desired response is a small positive or negative gain. The change in sign can be accomplished through the cross-over switch  43  that under digital control can reverse the positive and negative differential inputs. The signals then each passes through an initial resistance R q1 , which scales the signal to the desired range, before passing through another R- 2 R ladder, in FIG. 4 a  denoted by R q2 , which routes a digitally controlled portion of the input current to the summing junction. This gives a partial response from the Q′ input according to:  
             I   =       (       BR   f         2   n          (       R   q1     +     R   q2       )         )          Q   ′               (   8   )                               
 
         [0054]    where the n-bit integer control input B is such that 0&lt;B&lt;2 n . Again, the component values should be selected such that:  
                   (       2   n     -   1     )          R   f           2   n          (       R   q1     +     R   q2       )         =       K   ′          max        (       β   1     ,     β   2       )                 (   9   )                               
 
         [0055]    The overall output of the operation amplifier  41  is therefore given by:  
             I   =         (         R   f       R   i1       +       AR   f         2   m          R   i2           )          I   ′       +       (       BR   f         2   n          (       R   q1     +     R   q2       )         )          Q   ′                 (   10   )                               
 
         [0056]    The use of analog circuit-based compensation prior to the polyphase filter has the advantage that it is possible to greatly improve the adjacent channel image rejection. The practical limit depends on the number of bits, and hence resistors/switches, provided in the various control elements, as well as the matching between the different components and non-ideal response of the amplifier.  
         [0057]    The exemplary embodiment circuit given in FIGS. 4 a - b  is primarily for illustration purposes only. In a practical system, the choice of circuit used will depend on the process technology involved, bandwidth of various signals and the overall design style. The inventive aspect is the use of digitally controlled analog compensation prior to the filter.  
         [0058]    This technique need not be solely restricted to low-IF receiver systems. In any heterodyne system, there is some frequency whose image lies in the wanted IF band, and this technique may be used to improve image rejection where the inherent rejection of the input stages are insufficient.