Abstract:
In an alternating current electric power system of the type subject to rapid load voltage regulation as a result of variations in reactive load current, reactive load current compensation is provided by fixed capacitors and inductors in parallel with the load, the inductors being in series with static switches which are phase controlled to continuously maintain the net reactive compensating current substantially equal and opposite to the reactive component of load current. Compensation control determines firing time of the static switches in accordance with the magnitude of reactive load current. Regulating means additionally controls firing time to maintain line current and line to neutral voltage at a selected line location substantially in phase coincidence. The regulating means is provided with means for enhancing the stability of the system under no load or light load conditions. In a preferred embodiment, regulation stability is enhanced through the application of a small real or, in phase current signal whenever the real or in phase component of actual line current at the selected line location is less than a predetermined level which is desirable for stable regulation of the power system.

Description:
BACKGROUND OF THE INVENTION 
     The present invention relates to control of compensating impedance connected to supply leading or lagging reactive current to an electric power system for stabilization of voltage, and particularly to a control system in which regulation stability is enhanced under no load or light load conditions. 
     It is known that electric power systems which supply highly erratic reactive loads, e.g., electric arc furnaces, are typically characterized by poor voltage regulation. Consequently, these systems often exhibit an undesirable flicker. One system suggested to alleviate this condition is disclosed in U.S. Pat. No. 3,936,727, issued to Kelley et al, on Feb. 3, 1976, which is hereby incorporated by reference in the present application. The Kelley et al patent is assigned to the assignee of the present application. 
     The Kelley et al system is generally illustrated in FIGS. 1 &amp; 2. Briefly, the system includes the use of two control loops: one open compensating control loop; and one closed regulating or supervisory control loop. The compensating control loop senses the reactive load current component and attempts to negate the same by providing the appropriate compensating reactive current component through networks designated CR and IR. The regulating or supervisory control loop employs a current angle sensor 70 to sense the power factor or phase angle at a selected line location which is typically located at a critical area of the line at which good voltage regulation is desired. In the case of a typical arc furnace load, good voltage regulation would involve less than about 1/4% modulation of the magnitude of the 60 cycle voltage waveform. After sensing the magnitude of the phase angle at the critical line area, the supervisory control loop produces an output signal which is representative in magnitude of the phase angle as a function of time, as shown in FIG. 2c. This output signal (FIG. 2c) is dynamically compensated for stability of the supervisory regulating loop under normal gain conditions by the stabilizing circuit 85 of FIG. 1 and then acts through a path common with the compensating loop involving the IR and CR networks of FIG. 1 so as to ensure that the system remains properly compensated over a long time period. 
     Generally, the system shown in FIGS. 1 and 2, and more completely described in the Kelley et al patent, satisfactorily minimizes the problem presented by the erratic reactive load. However, under conditions of no load or light load, i.e., arc furnace turned off, the regulating system, or loop tends to become unstable. This tendency toward instability under no load or light load conditions is due to the fact that, under these conditions, a slight excess of, or deficiency of, inductive current is measured by the current angle sensor 70 as a phase angle of either -90° or +90°. Under these conditions, where zero phase angle regulation is desired at the critical line area, the supervisory control loop produces output signals representative of ± 90° phase angle conditions and directs the IR and CR networks of FIG. 1 to produce the appropriate compensating current. This results in a situation in which the phase angle to be regulated will swing through zero very rapidly with only a small adjustment of the compensating current. For example, when the supervisory control loop output signal indicates that the phase angle is + 90°, a small increase in inductive compensating current causes the phase angle to rapidly swing through zero, resulting in a phase angle of -90°. This oscillating process continues so as to make zero phase angle regulation difficult to achieve. Further, this rapid variation may itself cause disturbances which result in poor voltage regulation. The undesirable situation in which a relatively small adjustment of compensating current causes a relatively large variation of phase angle at the critical line area can be conveniently referred to as one in which the regulating control loop exhibits excessively high gain. 
     An object of this invention is to develop a power system in which satisfactory voltage regulation is provided under no load, light load, and highly erratic reactance load conditions. 
     Another object of this invention is to develop such a power system which allows for stable regulation at other than zero phase angle. 
     SUMMARY OF THE INVENTION 
     A system is provided in which power factor, or current phase angle, is controlled in a regulating system involving the compensation of reactive current drawn by a load through the use of a reactive converter which can deliver leading or lagging current. The system includes a supervisory or regulating control loop with means for deriving first and second signals respectively representative of the line current and line to neutral voltage at a critical area in the system at which good voltage regulation is desired. The supervisory control loop further includes means including a current angle sensor for sensing the magnitude of the phase angle between the first and second signals and directing an output signal therefrom to the reactive converter so as to regulate the phase angle. The supervisory control loop further includes means for adding a signal representing an in phase component of line current to the first signal and directing the combination thereof to the current angle sensor whenever the real or in phase component of line current is less than a predetermined level. The predetermined level is defined as the minimum real line current component necessary for stable regulating loop operation. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a highly schematic circuit diagram, partially in block form, of an electric power system including reactive current control means and phase controlled static switching means for a prior art electric power system, as shown in U.S. Pat. No. 3,936,727. 
     FIGS. 2(a), (b) and (c) are graphical representation of certain electrical characteristics which illustrate the mode of operation of the current angle sensor shown in the prior art electric power system of FIG. 1. 
     FIG. 3 is a highly schematic simplified block diagram showing a portion of the electric power system of FIG. 1, and including therein the stabilizing means of the present invention. 
     FIG. 4 is a schematic block diagram showin an exemplary stabilizing network useful in the power system of the present invention. 
     FIGS. 5a-n depict waveforms associated with the exemplary network shown in FIG. 4. 
     FIGS. 6 and 7 are graphical representations, as in FIG. 2, showing the operation of the power system of the prior art under no load or light load conditions. 
     FIG. 8 is a graphical representation showing the line current phase angle (θ) as a function of the compensating current (I c ) for several different load current values (I L ). In this Fig: I L  = I R  - JIx; and θ = tan  -1  (I c  - I x  /I R ). 
     DETAILED DESCRIPTION OF THE INVENTION 
     Referring initially to FIGS. 1 and 3, the present invention will be generally described. FIG. 1 depicts the power system disclosed in previously mentioned U.S. Pat. No. 3,936,727 while FIG. 3 shows a portion thereof which in accordance with the present invention, further includes means in simplified block diagram form for increasing the stability of the power system under varying load conditions. 
     As shown in FIG. 3, each line current output signal I 1 , I 2 , I 3  is respectively derived from current transformers (not shown in FIG. 3) and lines 15, 16 and 17 of FIG. 1 and is respectively passed through separate light load or no load stabilizing networks A, B and C which form part of the regulating loop. The outputs of the stabilizing networks are then directed into a current angle sensor 70. Each of the separate stabilizing networks A, B and C performs the function of adding a signal representative of a small in phase or real component of line current to the actual line current output signals I 1 , I 2 , I 3  whenever the real or in phase component of the line current is less than a predetermined level. In the present invention, the magnitude of the added signal is of a value such that the sum, i.e., I 1  + added signal, is substantially equal to, or greater than, the minimum signal necessary for stable power system operation, i.e., stable regulating loop operation. The predetermined level is defined as the minimum real line current component necessary for stable regulating loop operation. It is to be noted that, for purposes of clarity, only one current angle sensor 70 with three outputs is shown in FIG. 3. In practice, for a three phase system, three such current angle sensors would be provided, each having a single output. 
     A single exemplary network A suitable for use in the system of the present invention is shown in more detail in FIG. 4. It is to be understood that the other networks (B, C) are substantially the same. Each network includes the following: a first summation device 100; a zero cross detector 102; a pulse amplifier 104; a gate 106; sampling, storing, resetting means 108; a rectifier 110; a second summation and bias device 112; an on-off gate 114; a variable gain signal amplifier 116; and a third summation device 118. It is to be noted that each of the network elements hereinbefore mentioned are conventional and do not by themselves form any part of this invention. 
     The function of network A will now be described more particularly with reference to FIG. 4 and the signal waveforms illustrated in FIGS. 5a-5n. In this description, although only the condition of a single phase (line 15 of FIG. 1) and the operation of network A will be discussed, it is to be understood that the discussion is also applicable to the other two phases (lines 16 and 17) and the corresponding networks (B, C). 
     Referring now to FIG. 4, the summation device 100 receives as its inputs voltage signals V&#39; 3B  and V&#39; 2B  which are representative of line to neutral voltages at the critical bus and are derived from the Critical Bus Voltage Protector 60 of FIGS. 1 &amp; 3. As shown in FIG. 4, input V&#39; 3B  is inverted and then inputs V&#39; 2B  and -V&#39; 3B  are summed. The summed signal V&#39; 2B  - V&#39; 3B , or simply V 23 , is then directed to the zero cross detector 102. The zero cross detector 102 produces an output signal which is in the form of a short duration pulse when V 23  crosses through zero magnitude. The pulse amplifier 104 receives the output signal of the zero cross detector 102, when present, and increases its magnitude so as to simplify signal processing. The gate 106 receives the output signal of the pulse amplifier 104 and actuates component 108. Component 108 samples and stores the rectified current signal I 1  from component 110 at the appropriate instant which corresponds to the previously mentioned zero crossing of V 23 . Note that, as shown in FIG. 5a, in conventional three phase power systems, the zero crossing of V 2  = V 3  or V 23  corresponds in time to the maximum position of V 1 . Therefore, the gated signals (FIG. 5b) from the zero cross detector 102 of FIG. 4 correspond in time to the maximum V 1  value. More importantly, it is known that the reactive component of a current (I 1 ) is zero at 90° after zero crossing of the voltage signal (V 1 ) associated therewith (at maximum voltage value). Therefore, a measurement of the current I 1  at this point in time is a measurement of the real component only of the current I 1 . For example, as shown in FIGS. 5b through 5e, a measurement of the current I 1  at this point in time reveals a real or in phase component of the current I 1  which, for purposes of illustration, lags the voltage V 1  by 75°). 
     More particularly, a branch of current signal I 1  is rectified by rectifier 110 of FIG. 4 resulting in the signal waveform shown in FIG. 5d. Another branch of current signal I 1  is directed to summation device 118. The real component of the rectified current signal I 1  at the instant determined previously by gate 106 is sampled and stored by component 108 of FIG. 4, resulting in a signal waveform (FIG. 5e) which is unidirectional and proportional to the real component of current I 1 . The magnitude of this signal waveform (FIG. 5e) remains constant until it is reset by the component 108. Resetting occurs upon the next sampling event which is initiated by gate 106. The magnitude of the sampled and stored signal which is proportional to the real component of current I 1  is then compared with a value provided by the adjustable bias 112 of FIG. 4 (see waveforms of FIGS. 5e, 5f, 5g). The adjustable bias 112 produces a signal value which is unidirectional and constant. Whenever the bias signal value at component 112 is greater than the magnitude of the real component signal of the sampled and stored real component of current I 1 , as shown in FIG. 5g, gate 114 is actuated. This causes an additional in phase current signal I 1sig  (FIG. 5h) to be directed into summation device 118. The additional in phase signal I 1sig  is combined with the actual current signal I 1  by the summation device 118 of FIG. 4, and the combination directed to the current angle sensor 70. The additional current signal I 1sig  of FIG. 5h is derived through the gain adjustment of component 116 from the projected line to neutral voltage V&#39; 1B . The additional current signal I 1sig  is proportional to, and in phase with, the voltage signal V&#39; 1B  or simply V 1 , which is directed through the gain amplifier 116 (see waveforms of FIGS. 5i, 5j). Note that FIGS. 5h and 5j depict the same additional current signal I 1sig  . The process in which I 1sig  and I 1  are combined by the summation device 118 of FIG. 4 is shown in FIGS. 5j-5l for a second illustrative case in whic the current I 1  lags the voltage V&#39; 1B  or simply V 1 , by 90°. 
     The current angle sensor 70 receives the combined signal (I 1  + I 1sig ) and then develops an output signal which is directed to the reactive converter. Note that the additional process provided by summation device 118 of FIG. 4 and shown in FIGS. 5j-5m for the second illustrative case results in a situation in which the resultant signal (I 1sig  + I 1 ) received by the current angle sensor 70 causes the current angle sensor to measure a current phase angle much smaller than the actual 90°. Note also, in connection with FIGS. 5m, 5n, that the waveforms of FIGS. 5m, 5n are provided in a manner similar to the waveforms of FIGS. 2b, 2c. 
     Referring now to FIGS. 6 and 7, the present invention can be more completely appreciated. FIGS. 6 and 7 are similar to FIG. 2 but show the prior art operation of the current angle sensor 70 under no load or light load conditions. As mentioned earlier, under these conditions, the current angle sensor 70 produces an output which results in a situation in which the regulated phase angle swings rapidly back and forth through zero to +90° (FIG. 6) and to -90° (FIG. 7). However, in the present invention, under the same conditions, i.e., the second illustrative case, the added signal I 1sig  functions to cause the current angle sensor to measure an angle, and produce an output therefrom, which corresponds to a value much smaller than the actual 90°. This can be observed by comparing the magnitude of the output of the current angle sensor 70 under no load conditions in the prior art system (FIGS. 6 and 7) with the corresponding output in the system of the present invention (FIG. 5n). The lowered magnitude of the current angle sensor output under the same no load conditions in the present invention dampens the oscillations which would otherwise occur between +90° and -90°. 
     Thus, in the present invention, a real or in phase current signal I sig  is added to the actual line current signal I which is employed with the current angle sensor of previously mentioned U.S. Pat. No. 3,936,727. Adding the signal I sig  at no load or very light load load conditions causes the apparent phase angle, as viewed from the output of the current angle sensor 70, to respond smoothly to an adjustment of the inductive current (compensating current I c ) from the reactive converter. In the present invention, the gain of the regulating loop is limited to an adjustable (gain) limit, and the region of this gain lowering is adjustable by the bias value(s) chosen. This technique is particularly useful in three phase power systems. In such a case, each of the remaining line current signals I 2 , I 3  at the critical area can be modified as hereinbefore described. In this connection, as mentioned earlier, such as system will typically include tree current angle sensors and the associated circuitry described more completely in previously mentioned U.S. Pat. No. 3,936,727. 
     To obtain a preferred control system for a particular application, it may be helpful to refer to FIG. 8 and to set forth several guidelines. FIG. 8 is a graph which shows the line current phase angle (θ) at the critical bus as a function of the compensating current (I c ) from the reactive converter for several different load currents (I L ). The graph includes the case of no real load current (I R  = 0) as well as various real load current values with one unit of -90° lag load current (I x ). In FIG. 8, the loop gain of the supervisory regulating loop is proportional to the slope of the characteristic (Δθ/ΔI c ). It can be observed that, under zero or near zero real current (I R ) conditions, a HIGH LOOP GAIN condition undesirably causes the phase angle (θ) to swing through zero very rapidly with only a small adjustment of the compensator current (I c ) from the reactive converter. That is, under these conditions, the gain of the supervisory control loop approaches infinity. As the real component (I R  ) of load current (I L ) is made less than about 10% of the rated compensator current (I c ), the loop gain [(Δθ/ΔI c )] increases rapidly. Thus, in a preferred control system, to engender stability and involve suitable dynamic response of the regulating system, the regulating or supervisory loop gain is reduced by adding a signal representative of the appropriate in phase current, as previously described, whenever the real component (I R ) of load current (I L ) is less than about 10% of the rated compensator current (I c ). 
     Adjustment of the bias value of FIG. 4 to obtain the situation where the appropriate signal is added whenever the real component (I R ) of load current is less than about 10% of the rated compensator current (I c ) can be achieved as follows: Scaling associated with signal I 1 , the mechanism of the rectifier 110 and the sampling, storing resetting means 108 of FIG. 4 define the relative magnitude of I 1  rectified real. By a similar scaling, rectifying, sampling, storing, resetting process for the determination of the reactive component of compensator current (I c ), a relative magnitude of rated compensator current (I c ) rectified reactive is determined. The bias is then set at 10% of this value so as to actuate the previously described regulating loop stabilizing mechanism for load conditions involving less than 10% real relative current. 
     Although the power system of the present invention has been hereinbefore illustrated with a particular light load or no load stabilizing network(s), other means may be substituted therefor. One such technique is to provide means which continuously adds an in phase current signal to the current angle sensor while the power system is energized. This rather crude approach will engender stability at no load or light load conditions at zero phae angle regulation. However, this technique will engender error in the phase angle measurements and regulation at other than zero phase angle regulation even when the supervisory regulating loop would otherwise be stable. This error in phase angle regulation at other than zero phase angle regulation is present in the previously described preferred regulating system only when the system would otherwise be unstable. The advantage of the preferred system over the more crude approach can be appreciated by noting that, in a typical application including an arc furnace, conditions are such that the regulating loop, if not corrected, will tend to be unstable about 5% to 10% of its operating time. Thus, in the preferred system, there is a trade off of non-zero phase angle regulation capability for stability only during 5% to 10% of operating time. 
     Also, although the light load or no load stabilizing means of the present invention has been described with regard to a particular power regulation system, i.e., the system disclosed in U.S. Pat. No. 3,936,727, it is also applicable to other systems. For example, it is generally applicable to power regulating systems involving the control of the current angle or power factor in the event that no-load or light real load component conditions may occur. 
     While I have illustrated a preferred embodiment of my invention by way of illustration, many modifications will occur to those skilled in the art and I therefore wish to have it understood that I intend in the appended claims to cover all such modifications as fall within the true spirit and scope of my invention.