Abstract:
An H-bridge, phase shifted resonant converter, with symmetrical switched currents is described. This includes open and short circuit protection, with phase shift operation to zero output. The proposed circuit includes an H-bridge converter, employing the use of a “loosely” coupled inductor in place of the standard series inductor(s) to reduce the peak currents. In addition, the current will be symmetrical in all of the H-bridge switching devices. Furthermore, the impedance of the “loosely” coupled inductor controls the maximum current in the H-bridge in an open, short, or under load conditions. The “loosely” coupled inductor, with the addition of a small AC load, enhances the operation of the converter near zero output. 
     The control circuit of the H-bridge converter can be modulated to completely shut off the output without the introduction of complex circuitry.

Description:
TECHNICAL FIELD AND INDUSTRIAL APPLICABILITY OF THE INVENTION 
       [0001]    This invention relates to the design of H-Bridge phase-shifted resonant converter. This present invention relates in particular to the operation of the converter in over-load, load, and no-load conditions. The invention reduces stress and potential failures of the devices in the H-Bridge phase-shifted resonant converters. 
       BACKGROUND OF THE INVENTION 
       [0002]    Most dc-to-dc converters employing H-Bridge topologies achieve the conversion of a primary dc voltage input to an output regulated dc voltage. Typically, the dc input voltage is converted to an ac voltage (or pulses) by switching devices (transistor, mosfet, insulated gate bipolar transistor or thyristor). The ac voltage is then converted to a regulated dc output voltage. By controlling the duty cycle or the frequency of the ac voltage (or pulses), the desired output voltage or output current regulation can be achieved. These methods of controlling the output are typical of all dc-to-dc converters employing H-Bridge topologies. The introductions of H-Bridge resonant circuits (phase shifted, series, parallel, parallel loaded, etc.) are used for high frequency dc-to-dc conversion. This has been integral to higher power density and efficiency improvements. 
         [0003]    H-Bridge converters of present have reduced the losses associated with switching devices (transistor, mosfet, insulated gate bipolar transistor or thyristor) during turn-on and turn-off transitions. These circuits have not shown to correct, in a “passive manner,” the limiting of peak currents in the switching devices. In addition, they do not produce symmetrical currents. These circuits are less than ideal when the converter output (pwm, phase shifted, frequency, and cycle start-stop) is modulated to partial output or near zero output conditions. 
         [0004]    However, controlling the current in the converters with an active current protection scheme does not always result in protecting the switching devices from failures. The circuits attempt to limit the rise of current in the switching devices by shutting down the drive circuitry for the interval required. All switching devices have a specified turn off time and current will continue to flow until the turn off time has been reached. The maximum rated current of a switching device can be exceeded during the specified device turn off interval (defined as the storage time and fall time of the device). In this active protection scheme, this interval is the function of the speed in which the control circuit reacts and the device turn off time. These intervals also change with of the junction temperature of the switching devices. This can exacerbate the failure of the active protection scheme. 
         [0005]    A number of patents address the advantage of H bridge resonant mode dc-dc converters, e.g. U.S. Pat. No. 4,864,479 (Steigerwald et al) issued Sep. 5, 1989, U.S. Pat. No. 5,442,540 (Hula et al.) issued Aug. 15, 1995, U.S. Pat. No. 5,438,497 (Jain et al.) issued Aug. 1, 1995. The historical problems with these power conversion topologies are that the operation of H-Bridge resonant circuits can be compromised in open or short circuit conditions. When the H-Bridge is operated without symmetrical switch currents and peak current limitations, the peak voltages and currents through the H-Bridge switches can be excessive. This often results in switch failure. H-Bridge resonant circuit improvements have contributed greatly to more efficient and cost effective solutions to dc-to dc converters. The proposed invention addresses the condition specific shortcomings described above. 
       SUMMARY OF THE INVENTION 
       [0006]    A H-Bridge resonant circuit is operated in a phase-shifted manner that allows near zero output voltage and currents. This invention proposes the use of a loosely coupled inductor and a small AC load circuit to dissipate the remaining parasitic currents from the switching devices, snubber circuits and resonant tank circuit. 
         [0007]    An object of this invention is to prevent the peak currents from exceeding the switching devices ratings. 
         [0008]    Another object of the invention is to achieve symmetrical operation of the switching devices, which is superior over past dc-to dc converters circuits. 
         [0009]    In one embodiment of the present invention, a comparator turn off circuit will shut off the pulses to the switches in the H-Bridge resonant circuit. This produces zero output voltage and currents. 
         [0010]    Furthermore, introducing a “loosely” coupled inductor controls the maximum symmetrical current in the H-bridge in open, short or under load conditions. This reduces the need for high power switching devices, and complex protection control circuits that add to the cost. 
         [0011]    The final object of this invention is to demonstrate that the introduction of a “loosely” coupled inductor reduces the AC load circuit power requirement as it balances the recycled power from the resonant tank circuit of the H-bridge. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0012]      FIG. 1  is a schematic representation of a series parallel loaded H-Bridge resonant converter. 
           [0013]      FIG. 1A-1D  illustrates the current waveforms of the resonant tank circuit of a series parallel loaded H-Bridge resonant converter under load, short and open. 
           [0014]      FIG. 2  is a schematic representation of a series H-Bridge resonant converter. 
           [0015]      FIG. 2A-2D  illustrates the current waveforms of the resonant tank circuit of a series resonant H-Bridge converter under load, short and open. 
           [0016]      FIG. 3  is a schematic representation of the proposed invention. 
           [0017]      FIG. 3A-3G  illustrates the current and voltage waveforms of the proposed H Bridge phase-shifted converter with symmetrical currents. 
           [0018]      FIG. 4  is a schematic representation of a comparator turn off circuit that controls the drive pulses to the switches of the H Bridge. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0019]    While specific embodiments of the invention have been shown and described in detail to illustrate the specific application of the principals of the invention, it will be understood that the invention may be embodied as fully described in the claims, or as otherwise understood by those skilled in the art, without departing from such principals. 
         [0020]      FIG. 1  is a circuit diagram of a parallel loaded H-Bridge resonant converter according to prior art. RL represents a load, which is equivalent to a transformer rectifier output. The converter operates at a constant switching frequency and is controlled by gate signals applied to Q 1 -Q 4 . As seen in the figure, the resonant tank circuit is comprised of L 1 , C 1 , and R 1 . “SW 1 ” represents an open or a shorted load condition across C 1 . An input DC voltage, V+ is converted to an output voltage Vr and output current Ir, which in turn is applied to RL. 
         [0021]      FIG. 1A  is the current IL through RL under normal load conditions, with SW 1  closed. The current is at normal amplitude within the design limits. 
         [0022]      FIG. 1B  is the current IL through L 1 , C 1 , and RL during an abnormal condition shown with SW 1  closed across C 1  and RL. The current is at the normal amplitude within the design limits. This is the typical operation of a parallel resonant converter with a short across load RL. The converter will operate safely with and output short near resonance. 
         [0023]      FIG. 1C  and  FIG. 1D  is the current IL through RL during abnormal conditions with SW 1  opened. The current will keep climbing as shown in  FIG. 1C  if there is no external control to limit it. 
         [0024]      FIG. 1D  is a representation of an over current control using external control circuits. The equation that explains the condition is IL=2VinZo/πr. The term Zo is the AC resistance after SW 1  is opened to with a normal load. The normal load current, IL=20 amp. To illustrate, if Vin=320V, Zo=250 ohm, and R=2 ohm, the current IL=127 amps. This over current would destroy the resonant components L 1 , C 1  and the switches Q 1 -Q 4 . An over current control circuit cannot reduce this potential catastrophic over current through the components. Circuit design such as this must use higher rated, more costly components to prevent component failures. 
         [0025]      FIG. 2  is a circuit diagram of an H-Bridge series resonant converter according to prior art. RL represents a load, which is equivalent to a transformer rectifier output. The converter operates at a constant switching frequency and is controlled by gate signals applied to Q 1 -Q 4 . As seen in the figure, the resonant tank circuit is comprised of L 1 , C 1 , and R 1 . SW 1  represents a short or open in series with RL. When SW 1  is closed, this represents a normal output condition. When SW 1  is opened, this represents an opened output load condition. When SHORT is applied across SW 1  and RL, this represents a shorted output condition. An input DC voltage, V+, is converted to an output voltage, Vr, and output current, Ir that in turn is applied to RL. 
         [0026]      FIG. 2A  illustrates the current IL through RL during normal output load conditions with SW 1  closed. The current is at of normal amplitude and within the design limits. 
         [0027]      FIG. 2B  is the current IL through L 1 , C 1 , and RL during an abnormal condition, with an open SW 1 . The current is at zero amplitude and within the design limits. This is the typical operation of a series resonance converter with an open output load RL. The converter will operate safely with the output open near resonance. 
         [0028]      FIG. 2C  and  FIG. 2D  illustrate the current IL through RL during abnormal conditions with SHORT across SW 1  and RL. The current will keep climbing as shown in  FIG. 2C  if there is no external control to limit it. 
         [0029]      FIG. 2D  illustrates an over current control using external control circuits. The equation that explains the condition is IL=2Vin/πr. In a normal output load, the current IL=20 amp. The SHORT is applied across SW 1  and RL to illustrate a shorted output load. For instance, if Vin=320V, and R=2 ohm the current IL=102 amp. This over current would destroy the resonant components L 1 , C 1  and the switches Q 1 -Q 4 . Again, an over current control circuit cannot reduce this potential catastrophic over current through the components. Again this circuit design must use higher rated, more costly components to prevent component failures. 
         [0030]      FIG. 3  illustrates a phase shifted H bridge resonant converter with symmetrical currents in which the input is driven by a dc source voltage Vin. Input capacitor  31  reduces the ripple voltage of input voltage Vin. Input capacitor  31  supplies the energy to switching devices S 1 , S 2 , S 3 , and S 4  (IGBT&#39;s shown with internal freewheeling diode). Energy returned from switching devices S 1 , S 2 , S 3 , S 4  is stored in capacitor  31  during turn off intervals S 1 , S 2 , S 3 , and S 4  form a bridge converter input. The series combination of S 1  and S 2  is connected in parallel across capacitor  31  and the series combination of switching devices S 3  and S 4 . 
         [0031]    In  FIG. 3  the snubber network across S 1 , is comprised of capacitor  9 , diode  5 , and resistor  10 . The snubber network across S 2  is comprised of capacitor  11 , diode  6 , and resistor  12 . The snubber network across S 3  is comprised of capacitor  14 , diode  7 , and resistor  13 . The snubber network across S 4  is comprised of capacitor  16 , diode  8 , and resistor  15 . These components form the turn off loss circuit, and partial AC bleed for S 1 -S 4  switches. Capacitors  17  and capacitor  18  are the high frequency AC coupling capacitors for the resonant tank circuit comprised of coupled inductor  32  in series with transformer  21 , resonant capacitors  22  and  23 . Capacitor  19  and resistor  20  across coupled inductor  16  form the main AC bleeder network. The output consists of Transformer  21 , diodes  24 ,  25 ,  26 ,  27 , inductor  28 , capacitor  29 , and load  30  (resistive load). 
         [0032]    In  FIG. 3 , the DC output voltage is controlled by a fixed frequency by phase shifting of the two half bridge legs. The four switching devices S 1 -S 4  have considerable lower current rating than employed in other switching converters. The switches depicted in  FIG. 3  are IGBT&#39;s (insulated bipolar transistors) with a freewheeling diode or they could be replaced with FET (field effect transistor) with an accompanying freewheeling diode. Therefore, the circuit in  FIG. 3  is more amendable to integration, which is desirable for higher power density. 
         [0033]      FIG. 3A  illustrates the current waveform during a full load, normal operation. This is the combined current from the junction of the loosely coupled inductor  32 , in series with transformer  21  and the capacitors  22  and  23 . The current in is sinusoidal and at full output power. 
         [0034]      FIG. 3B  illustrates the full output current waveforms in the coupled inductor branches. The currents are equal and symmetrical. The two half bridges (S 1 , S 2  legs and S 3 , S 4  legs) are in phase during full output power. 
         [0035]    Referring to  FIG. 3 , the operational interval sequence is as follows. The operation begins when switches S 1  and S 3  are gated on and are conducting, thus supplying the full dc input voltage through capacitors  17  and  18 , inductor  32  to transformer  21  and charges capacitors  22  and  23 . The current through the transformer  21  is driven positive. The snubber caps  11  and  16  are charged to the dc input voltage during this first interval. At the end of this interval, switch S 1  is turned off and switch S 3  is still on. When S 1  opens, capacitor  9  is charged to the voltage Vin through diode  5 . S 3  continues driving current through the loosely coupled inductor  32 , capacitor  17 , towards ground through the anti-parallel diode of switch S 2 , which in turn, discharges capacitor  11  through resistor  12 . The voltage across switch S 2  is now zero. 
         [0036]    The second interval proceeds when switch S 2  turns on. S 3  turns off, and capacitor  14  is charged to the voltage Vin through diode  7 . S 2  continues driving current through the loosely coupled inductor  32 , capacitor  18 , towards ground through the anti-parallel diode of switch S 4 , which in turn, discharges capacitor  16  through resistor  15 . The voltage across switch S 4  is now zero. 
         [0037]    The third interval proceeds when switch S 4  is turned on, with switch S 2  still on, which discharges capacitors  22 ,  23  through transformer  21 , inductor  32 , and capacitors  17 ,  18 . The current through transformer  21  is driven negative from the stored charge of capacitors  22 ,  23 , through loosely coupled inductor  32 , capacitors  17 ,  18 . At the end of this interval, switch S 2  is turned off and switch S 4  is still on. The loosely coupled inductor  32  starts to drive current towards the DC buss Vin, through capacitor  17 , the anti-parallel diode of switch S 1 , and discharges capacitor  9  through resistor  10 . The voltage across switch S 1  is now zero. 
         [0038]    In the fourth interval, S 1  turns on. The loosely coupled inductor  32  starts to drive current towards the DC buss Vin, through capacitor  18 , the anti-parallel diode of switch S 3 , and discharges capacitor  14  through resistor  13 . Interval  1  now repeats. This completes the sequence. The resulting current waveform through transformer  21  is shown in  FIG. 3A . Branch currents through inductor  32  are shown in  FIG. 3B . The above intervals describe the proposed phase shifted H bridge resonant converter with the loosely coupled inductor  32 . 
         [0039]    The loosely coupled inductor  32  balances the current through the two branches S 1 , S 2  and S 3 , S 4  during full output conditions. The resulting current through the two branches is shown in  FIG. 3B  and is equals one half of the total current through transformer  21 . The total current is shown in  FIG. 3A . 
         [0040]      FIG. 3C  illustrates the converter current through transformer  21 , when driven into over load, as in a near short condition of resistor  30 . The current waveform illustrates that the overload does not exceed 125% of the normal load current. The operating frequency and chosen impedances of the loosely coupled inductor  32  and capacitors  22 , and  23 , are designed to prevent current overload from exceeding this value. 
         [0041]      FIG. 3D  illustrates the converter current waveform through the loosely coupled inductor  32  in branch S 1 , S 2  or S 3 , S 4  and transformer  21 . The current can never exceed the value of V lm =2πFLIm. This states that the voltage across the loosely coupled inductor  32  in branch S 1 , S 2 , or S 3 , S 4 , is equal to the frequency times the current applied to the inductor. 
         [0042]    Furthermore, the Q of the circuit is relatively flat, which results in lack of harmonics near resonance that cause the current to rise at an uncontrollably rate. The impedance of the circuit is based on Q=2π L/2Ri and Zo=√2L/C. Ri represents the impedance of transformer  21 , and all the output components on the secondary side. When shorted to zero, there would be no Q and only the inductor current through the loosely coupled inductor  32 . The current waveform would be triangular and conform to equation E=Ldi/dt. Hence, this demonstrates the converter currents through branches S 1 , S 2 , or S 3 , S 4  would not exceed the desired maximum current. 
         [0043]    In an open output load, impedance of transformer  21  becomes a high resistance (Ri). There is only a small current through the loosely coupled inductor  32 . The current through loosely coupled inductor  32  would be triangular and Ri becomes a large resistance (Q=2π L/2Ri). The resulting Q of the circuit approaches zero. The resulting currents through branches S 1 , S 2 , or S 3 , S 4 , and capacitors  21 ,  23  would be reduced below the desired maximum current of the design. 
         [0044]    Thus, this converter is inherently short and open circuit protected by the impedances of the resonant circuits. 
         [0045]      FIG. 3F  illustrates the currents through the loosely coupled inductor  32  in branch S 1 , S 2 , and branch S 3 , S 4  with output control at 50% load. The currents are symmetrical to each other. This condition occurs because of the loose coupling of the inductor, which helps balance, these branch currents. 
         [0046]      FIG. 3G  illustrates the currents through the loosely coupled inductor  32  in branch S 1 , S 2 , and branch S 3 , S 4  with output control to zero, under no load. The loosely coupled inductor  32 , and AC bleeder components (capacitor  19  and resistor  20 ) balance the no load current equally in both branches. This nulls the branch current to a small value. 
         [0047]      FIG. 4  illustrates a partial control scheme typically used to in phase-shifted converters. The control circuit can turn the remainder of the current to the transformer completely off, if desired. The addition of Comparator U 9  will turn off Q 5 , which in turn, terminates the pulses to the output. The comparator level is adjusted at a voltage less than the slope of the ramp of the error amplifier. This method assures that the phase-shift to minimum output will occur before the output pulses are terminated. An error amplifier section is typically connected to the PWM (pulse width modulator). This control scheme is designed to work from a Dc range of −0.3 Vdc to +5Vdc. 
         [0048]    The loosely coupled inductor  32  in  FIG. 3  is of unique construction. The design is crucial for the performance of this converter. The core is of Nickel-Zinc Ferrite material and has a C Core shape. There are two coils with one coil on each leg of the C Core. The turns on each leg of the coils must be equal. The coils are attached in series, the center point of which becomes the point of attachment to the transformer. The end attachment points are connected to capacitors  17  and  18 . The open ends of the C Core must be closed with Nickel-Zinc Ferrite material with a gap. The inductance, core gap, and current requirements are established for the design. The loosely coupled inductor  32  is connected as described above with the output conditions set at no load and zero output (phase-shifted to zero without the comparator circuit mentioned above). Measurements are taken of the branch currents in the proposed circuit. The placement of the coils on the C core is adjusted manually, up or down, to establish the minimum output current and balanced branch currents. The coil placement on the core is thus established. 
         [0049]    Therefore, when the loosely coupled inductor is designed correctly, under a no load and zero output condition, the resulting output voltage and current will approach zero. The currents through the branches S 1 , S 2 , and S 3 , S 4  will be equal and balanced. 
         [0050]    A secondary function of capacitors  17  and  18  is to isolate the DC from the output of the two half bridges mentioned above, allowing the transformer to be replaced with a resistive load. This allows the proposed circuit to be used for other applications other than power supplies such as induction heating.