Abstract:
The present invention provides a method and apparatus for design of low loss, size restricted high frequency circuits. In a preferred embodiment, an electronic device includes: a first circuit layer located above the main circuit board comprising a first stripline passive circuit; and a second circuit layer located above the first circuit, the second layer comprising a second stripline circuit. The two stripline circuits can be separately coupled to leads, or coupled to each other and other leads using vias through the ground layer(s) separating each stripline. The stacked stripline elements can be used together with other circuits, and the stacked circuit board can be conveniently joined together with other assemblies, e.g., by surface mounting to a main board. The utility of this topology can be extended by the use of n-circuit embodiment or embedding in a multilayered main circuit board.

Description:
FIELD OF THE INVENTION 
     The present invention is directed to radio frequency or microwave communications systems or subsystems that require integration of multiple passive circuits in limited spaces. 
     BACKGROUND OF THE INVENTION 
     Passive elements are used in all manner of electronic circuits. A wide variety of implementations are known for implementing passive circuits, including lumped element and distributed element designs. In certain applications microstrip and stripline designs have also been employed. For example, a stripline is a printed signal path disposed between two ground planes in a printed circuit board. Many single-element stripline circuits are known and used in the industry (e.g., as implemented by the Anaren Xinger couplers), and disclosures have been made about extending a single element stripline into two layers (see, e.g., U.S. Pat. No. 5,929,729 to Swarup (where coupling was an objective), and U.S. Pat. No. 5,359,304 to Fujiki. 
     In certain high frequency applications, prior approaches towards designing passive elements have proved unsatisfactory. For example, lumped-element harmonic filters tend to result in poor manufacturing yield, and board-to-board performance variation is typical, requiring expensive hand-tuning. On the other hand, distributed element designs are not typically used where there is limited board space and the possibility of re-entrant bands (e.g., passbands repeated at harmonic frequency, to suppress out-of-band rejection). If the application has to be low loss, the design constraints become even more difficult. For example, where the radio-frequency (RF) is above 1 GHz, many applications will require limiting the radiation of unintended signals (spurs, harmonics, etc) to maximize frequency spectrum reutilization. Such requirements drive the need for passive circuits like low pass filters that provide the lowest possible insertion loss and maximum out-of-band rejection. The conventional lumped-element elliptic low pass filters are very difficult to implement at frequencies above 1 GHz due to small component values and extreme sensitivity to component tolerance. Stripline circuits would not be considered by a typical designer, since the physical dimensions of distributed elements at frequencies below 2 GHz are prohibitively large. This rules out the use of distributed element filters when more than one filter has to be implemented in a constrained board space. 
     There remains, therefore, a need for a better approach to circuit design for multiple high frequency (i.e., greater than 1 GHz), low loss passive elements for use in constrained-size applications. Just such an approach is now possible by the invention described in more detail in connection with the following embodiment. 
     SUMMARY OF THE INVENTION 
     The present invention provides such a method and apparatus for design of low loss, size restricted high frequency circuits. In a preferred 2-circuit embodiment, an electronic device includes: a first circuit layer comprising a first stripline passive circuit located between a top and a bottom ground layer; and a second circuit layer located above the first circuit, the second layer comprising a second stripline circuit between a top and a bottom ground layer; the bottom ground layer is shared with the first circuit. The two stripline circuits can be separately coupled to leads, or coupled to each other and other leads using vias through the ground layer(s) separating each stripline. The stacked stripline elements can be used together with other circuits, and the stacked circuit board can be conveniently joined together with other assemblies, e.g., by surface mounting to a main board. An N-circuit implementation extends this 2-circuit embodiment over more circuit layers. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       While the invention is defined by the appended claims, as an aid to understanding it, together with certain of its objectives and advantages, the following detailed description and drawings are provided of an illustrative, presently preferred embodiment thereof, of which: 
         FIG. 1  is a cross-sectional illustration of a 2-circuit implementation of a stacked stripline circuit electronic device according to first embodiment of the present invention shown mounted to a main circuit board. 
         FIG. 2  is a bottom view of the embodiment of  FIG. 1  as viewed from plane A-A. 
         FIG. 3  is an illustration of an N-circuit stacked stripline implementation of multiple stripline circuits integrated into a single package. 
         FIG. 4  is an illustration of an alternate implementation of the present invention where a stacked stripline circuit is an integral part of a main circuit board which has multiple layers. 
     
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     In a preferred embodiment of the invention, a system is provided for high frequency passive elements, where plural passive elements are formed in stripline topology stacked vertically in relation to each other. This arrangement permits implementation of multiple high frequency, low loss circuits in a small footprint. 
       FIG. 1 , and  FIG. 2  together illustrate a two-layer stacked stripline circuit package  100  for use according to a first embodiment of the invention. The circuit package  100  includes a main circuit board  110  to which is mounted a stacked stripline circuit assembly  120  as shown in  FIG. 1 . In this embodiment, assembly  120  includes a pair of layers; a first circuit layer  130  and a second circuit layer  140 . Each circuit layer  130 ,  140  includes a respective stripline circuit  132 ,  142  for performing a unique function such as filtering a signal. 
     As  FIG. 1  shows, first circuit layer  130  is preferably a first stripline circuit  132  sandwiched between ground planes  133  and  134 . The stripline circuit  132  is isolated from the ground planes  133  and  134  by dielectric substrates  135  and  136 , respectively. The first stripline circuit  132  is connected to the circuit on the main board  110  by signal via lines  131   a  and  131   b . Signal via line  131   a  is connected to a signal trace  113   a  disposed on dielectric layer  135  adjacent ground layer  133  as shown in  FIGS. 1 and 2  to serve as a signal launch point for carrying signals to first stripline circuit layer  130 . Signal via line  131   b  connects first stripline circuit  132  to a signal trace  113   b  ( FIG. 2 ) disposed on dielectric layer  135  adjacent ground layer  133  to carry signals from first stripline circuit layer  130  to a signal trace  113   b . Similarly, the second circuit layer  140  comprises a second stripline circuit  142  sandwiched between dielectric substrate layers  145  and  146 , and ground layers  134  and  144 . The second stripline circuit  142  of second circuit layer  140  is connected to a signal trace on the main board  110  by via connections  141   a  and  141   b  [(See  FIG. 2 )]. Signal via line  141   a  is connected to a signal trace  114   a  disposed on dielectric layer  135  adjacent ground layer  133  as shown in  FIGS. 1 and 2  to serve as a signal launch point for carrying signals to second stripline circuit layer  140 . Signal via line  141   b  connects second stripline circuit  142  to signal trace  114   b  (See  FIG. 2 ) disposed on dielectric layer  135  adjacent ground layer  133  as shown in  FIGS. 1 and 2  to serve as a signal launch point for carrying signals to second stripline circuit layer  140 . Ground plane  133  is connected to the main board  110  by solder connections  107  as shown in  FIG. 1 . As  FIGS. 1 and 2  show, ground planes  133 ,  134  and  144  are connected to one another by ground vias  111 . Main circuit board  110  also has ground vias  111  as shown. The stripline topology provides power handling capability better than microstrip and built-in shielding. 
       FIG. 2  shows a bottom view of the stacked stripline assembly  120  (looking up from the main board  110 , i.e., as indicted by line A-A in  FIG. 1 ). This view shows the locations of the via connections  111 ,  131  and  141  in the interior of the element  133 . 
     In a 2-circuit embodiment of a stacked stripline circuit assembly  120  in accordance with the invention we implement two elliptic low pass filters in stripline structure in a single package, again with one filter “stacked” on top of the other. In this embodiment, stripline circuit layer  130  comprises the first elliptic low pass filter and stripline circuit layer  140  comprises the second elliptic low pass filter, each having different cut-off frequency. 
     By implementing two distributed-element filters as stacked stripline circuit layers  130  and  140 , respectively, it is possible to have both filters in the space normally required for one filter. The ground plane  134  between the two filters, an integral part of stripline circuit assembly  120 , provides isolation between the two filters formed by stripline circuit layers  130  and  140 . This also eliminates the need to provide external shielding which would add additional parts to the end-assembly. In addition, the use of a distributed element filter allows for more repeatable performance compared to lumped-element filters. 
     The distributed element filters formed by stripline circuit layers  130  and  140  are synthesized from the lumped-element circuit model using available filter element value tables. To optimize the performance of the filters, electromagnetic simulation is used to tune the dimensions of prototype filters. The filter using multiple cascaded hairpin resonators provides a very sharp cutoff frequency response with low insertion loss. Furthermore, to increase the rejection-band bandwidth, additional attenuation poles are added to the filter. The filters are evaluated by building a few prototypes and ascertaining that the measurement is in agreement with the simulation. This embodiment realizes a wide stop-band analogous to the ideal lumped element version. The measurement shows that the second filter (on circuit layer  130 ) had typically 30 dB up to 14 GHz and 25 dB out-of-band rejections up to 18 GHz. The cut-off frequency of the second filter is 2 GHz. The circuit can be designed as a separate board that can be surface-mounted to the main board  110 . 
     This embodiment may be used to replace two different elliptic low pass filters used in an RF (radio frequency) transmitter, particularly where very limited board space is available. The lumped-element version may comprise twenty (20) different inductors and capacitors. The performances of the lumped-element version could vary substantially due to component value tolerances. Tin shields might also be required to mitigate the performance degradation caused by coupling between elements and the two filters. One integrated component in accordance with the above embodiment with dual function; may thus replace twenty (20) pick-and-place components with one and eliminate the need for separate RF shielding. 
     The utility of this embodiment is not limited to two circuits or filters. More than two passive circuits realizable in stripline structure can be integrated in a single package, such as shown in  FIG. 3 .  FIG. 3  shows a cross sectional view of an N-layer implementation wherein a stacked stripline circuit assembly  120  is attached to the main board  110  with a solder connection  107 . As an example, additional filters  150  can be added to the 2-circuit embodiment by simply stacking more filters. As  FIG. 3  shows, N-layer assembly  120  includes a first circuit layer, namely circuit  130  connected to the main board  110  and shows a second circuit layer, namely circuit  140  stacked above circuit  130 . As indicated by the broken lines formed by a series of stacked boxes in  FIG. 3 , this N-layer stripline circuit assembly  120  further comprises one or more stripline circuits stacked successively atop one another, the topmost layer of N-layer assembly  120  is referred to as “Circuit N” which is designated in  FIG. 3  by reference numeral  150 . Other passive circuits such as couplers, power splitters, or delay lines can be implemented in one of the layers. Some active circuits can also be implemented, such as phase shifters, attenuators, and switches, etc. The active elements can be installed in pockets in the inner layers or, preferably, on the top layer with via connection to other layers. These can be implemented as a single integrated circuit (IC), or part of a series of smaller ICs, (e.g., subsequently surface mounted or otherwise joined to a main board of a component or electronics device). Further, it may also be implemented as part of a multilayer circuit board, such as illustrated by  FIG. 4 . This embodiment may be used when the circuit implemented in  FIG. 1 ,  2  or  3  will not require subsequent changes. By doing so, a soldering step can be eliminated and an extra main circuit board space can be freed for use by other circuits. 
       FIG. 4  shows an embedded implementation of an N-layer stacked stripline circuit as part of an N-layer board  211 . An embedded stacked stripline circuit  220  comprises a first circuit  230  (Circuit  1 ), a second circuit  240  (Circuit  2 ), up to an Nth circuit  250  (Circuit N) with a top layer  271 . Other main board circuits  270  are spread among the layers. 
     Of course, one skilled in the art will appreciate how a variety of alternatives are possible for the individual elements, and their arrangement, described above, while still falling within the scope of the invention. Thus, while it is important to note that the present invention has been described in the context of an implementation for plural stripline filters, those of ordinary skill in the art will appreciate that the present invention applies equally regardless of the particular type of passive element actually used in implementing the desired circuit. Further, while this has been found particularly useful for circuits in the 1-2 GHz range, and more generally in the 1-4 GHz range, it should have equal application to all high frequency (i.e., greater or equal to 1 GHz) integrated circuits depending on the desired application and other design considerations. 
     In conclusion, the above description has been presented for purposes of illustration and description of an embodiment of the invention, but is not intended to be exhaustive or limited to the form disclosed. This embodiment was chosen and described in order to explain the principles of the invention, show its practical application, and to enable those of ordinary skill in the art to understand how to make and use the invention. Many modifications and variations will be apparent to those of ordinary skill in the art. Thus, it should be understood that the invention is not limited to the embodiments described above, but should be interpreted within the full spirit and scope of the appended claims.