Abstract:
Parasitic feed-through capacitance effects in a resonator circuit are reduced by separating the resonator signal from the feed-through capacitance signal and then detecting the resonator signal with comparator circuitry. In specific embodiments, the separation of the resonator signal from the feed-through capacitance signal is effected by serial integrator and differentiator circuitry or by trans-impedance amplifier circuitry. The comparator circuitry can include control/delay circuitry for enabling the comparator at a correct time when feed-through capacitance signal has dissipated. The invention can be implemented using microelectromechanical sensors (MEMS) in a strain gauge function.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application claims priority to U.S. Provisional Patent Application No. 60/643,063, filed on Jan. 10, 2005, which is incorporated herein by reference for all purposes. 
     
    
     FEDERAL RESEARCH STATEMENT 
       [0002]    The U.S. government has rights in the disclosed invention pursuant to grants to The University of California. DAAD 19-02-1-0198 Army Research Office 
     
    
     BACKGROUND OF INVENTION 
       [0003]    This invention relates generally to electronic resonator circuits in which a resonating device is used in an oscillator circuit, and more particularly the invention is directed to reducing deleterious effects of feed-through capacitance of the resonator. 
         [0004]    Westra et al., “Resonance-mode Selection and Crosstalk Elimination Using Resonator-Synchronized Relaxation Oscillators”, ESSCIRC, 1998 discusses the problems of using resonators in oscillator circuitry, particularly the presence of multiple resonance modes in the resonators and large capacitive crosstalk due to resonator feed-through capacitance. A proposed solution is the use of resonator-synchronized relaxation oscillators in which the selectivity of the oscillator is used as a course selection mechanism for the desired mode, which crosstalk is overcome by exploiting the time-discreet character of the oscillator with a square wave drive. This can be modeled as a parallel combination of the intrinsic resonator and a high-pass filter. The high-pass filter causes quick delay of the output due to the bypass capacitance. 
         [0005]    The present invention is directed to circuitry which can implement the concept proposed by Westra et al. 
       SUMMARY OF INVENTION 
       [0006]    In accordance with the invention, parasitic feed-through capacitance effects are reduced in a resonator circuit by separating the resonator signal from feed-through capacitance signal and then detecting the resonator signal with comparator circuitry. A square wave output of the comparator is then feed back to the input of the resonator to form an oscillator circuit. 
         [0007]    More particularly, in specific embodiments, the separation of the resonator signal from the feed-through capacitance signal is effected by serial integrator and differentiator circuitry or by trans-impedance amplifier circuitry. The comparator circuitry can include control/delay circuitry for enabling the comparator at a correct time period. The invention can be implemented by using microelectromechanical servers (MEMS) in a strain gauge function. 
         [0008]    The invention and object and features thereof will be more readily apparent from the following detailed description and appended claims when taken with the drawings. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0009]      FIG. 1  is a schematic of a resonator synchronized relaxation oscillator. 
           [0010]      FIG. 2  illustrates voltage waveforms in the circuitry of  FIG. 1  as illustrates separation of resonator and feed-through capacitive signals. 
           [0011]      FIG. 3  is a schematic of oscillator circuitry in accordance with one embodiment of the invention. 
           [0012]      FIG. 4  is a schematic of oscillator circuitry in accordance with another embodiment of the invention. 
           [0013]      FIG. 5  is a schematic of integrator and differentiator circuitry in the comparator of  FIG. 4 . 
           [0014]      FIG. 6  illustrates voltage detection in the circuits of  FIGS. 3 and 4 . 
           [0015]      FIG. 7  is a schematic of oscillator circuitry in accordance with another embodiment of the invention. 
           [0016]      FIG. 8  illustrates signal separation in the circuit of  FIG. 7 . 
       
    
    
     DETAILED DESCRIPTION 
       [0017]      FIG. 1  is a schematic of a resonator oscillator circuit with separation of capacitor feed-through signal from the desired output signal from the resonator such as proposed by Westra et al., supra. The resonator  10  is driven by a square wave drive, and resonator current and current from the parallel feed-through capacitor  12  are passed to a high pass filter  14  having a pass function, H(ω). The sense voltage is then returned to the input of the resonator to form an oscillator. 
         [0018]      FIG. 2  illustrates voltage waveforms in the circuit of  FIG. 1 . The output of the circuit due to the feed-through capacitor must decay quickly in time compared to the output due to the resonator. The high pass filter waits until the output due to the pass-through capacitance is insignificant when compared to the resonator output. At this time, the output due to the resonator can be detected. The voltage from the pass-through capacitance, V cft , must decay to insignificant value in a time less than a half period of the oscillation frequency, or T 0 /2=½f 0 . 
         [0019]    However, the resonator oscillator as proposed by Westra et al. is difficult to realize in actual practice. In accordance with the invention, resonator circuits which can separate the signals are more practical. 
         [0020]      FIG. 3  is a schematic of one embodiment of the invention in which the resonator and source of crosstalk shown generally at  20  provide output signals to a trans-impedance amplifier circuitry  22  for signal separation. The separated resonator voltage, V sense , from trans-impedance amplifier  22  is then passed to comparator circuitry including high gain circuitry  24  and a voltage limiter  26 . The comparator circuitry then provides a square wave output, V drive , which is fed back to the input of the resonator  20  to form an oscillator. Here separation is obtained using the trans-impedance amplifier, and the comparator detects the resonator signal. 
         [0021]      FIG. 4  is a schematic of another embodiment of the invention in which the output of the resonator and feed-through capacitor shown generally at  20  is applied to an integrator circuitry  28  with the integrated output then applied to differentiator circuitry  30 . The output of differentiator circuitry  30  is then applied to the comparator circuitry comprising high gain circuitry  24  and voltage limiter  26 . Again, the comparator circuitry provides a square wave output, V drive , which is fed back to the input of the resonator to form an oscillator. 
         [0022]      FIG. 5  is a schematic of integrator and differentiator circuitry of the block diagram of  FIG. 4 . Integrator  28  comprises a differential amplifier  32  with capacitive and resistive feedback, and the output of differential amplifier  32  passes through a resistive capacitive circuit to an input of a second differential amplifier  34  having resistive feedback. Differential amplifier  32 , with its associated feedback, functions as the integrator  28 , and differential amplifier  34 , with its resistive feedback, comprises the differentiator  30 . The output of the differentiator is then passed through the comparator circuitry and back to the input of the resonator as described above. 
         [0023]      FIG. 6  illustrates signal detection for the circuit of  FIGS. 3 and 4 . The square wave drive voltage, V drive , is shown at the top and Vresonator and V cft , are shown alone with V sense . Again, V cft  must decay in less than a half time period of the resonator frequency for signal separation. Detection of the resonator voltage at this point can be done by a voltage comparator. Waiting for V cft  to decay is effectively accomplished by having a high gain voltage comparator. This ensures the output of the comparator, Vcomp is at the negative supply voltage or positive supply voltage when V sense  is a little smaller or larger than 0. 
         [0024]      FIG. 7  is a schematic of another embodiment of the invention in which the comparator circuitry  38  is controlled by a control/delay circuitry  40 . The output of the resonator and parallel feed-through capacitance is again applied to trans-impedance amplifier circuitry  22  of  FIG. 3  or the integrator and differentiator circuitry of  FIG. 4 . Comparator circuitry  38  receives the voltage and detects the resonator frequency with comparator circuitry  38  being enabled by the control/delay circuitry  40  at the correct time when the feed-through capacitance signal has decayed. 
         [0025]      FIG. 8  illustrates the square wave drive with the topology separation circuitry and delay for effecting separation in the circuitry of  FIG. 7 . Comparator enable signal occurs when the feed-through capacitance signal has decayed and the comparator output, Vcomp, corresponds to the resonator voltage. Use of the comparator enable allows the decay time of V cft  to be much greater than T 0 /2, hence larger values of C ft  can be accommodated when compared with the circuits of  FIGS. 3 and 4 . Here the period of the comparator output, Vcomp, is an integer multiple of T 0 /2. This multiple is 2·cell (Delay/T 0 /2). With this embodiment, the waiting time is not limited to T 0 /2 as it is in the circuits of  FIGS. 3 and 4 . Further, the delay can be designed to track decay time of V cft , thereby reducing effects of temperature and power supply variation. The point of detection is at the zero crossing of V sense  when V cft  is much smaller than Vresonator. Thus, V sense  will be approximately the value of Vresonator. Waiting for V cft  to decay is effectively accomplished by having a high gain voltage comparator detect a valid zero crossing. A delay is then used to disable the comparator until V cft  has decayed sufficiently thus allowing the comparator to detect the next valid zero crossing. 
         [0026]    While the invention has been described with reference to specific embodiments, the description is illustrative of the invention and is not to be construed as limiting the invention. Various modifications and applications may occur to those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.