Abstract:
A method and circuit for clamping a voltage across a switching element in a forward converter circuit to a value equal to or less than the DC bus voltage. The disclosed circuit and method achieves voltage clamping in a circuit configuration in which two series connected direct current (DC) bus capacitors are connected in parallel with a switching element to be clamped. Clamping is further achieved by selecting capacitor values to be sufficiently large so as to maintain a constant voltage throughout each switching cycle of the switching element. The capacitors serve a second function in that they recover energy stored in the windings of an isolation transformer which would otherwise be dissipated in a conventional circuit design.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a circuit configuration for use with a switched power supply of the forward converter type. 
     2. Description of the Related Art 
     “Attention has been focused on the input current total harmonic distortion (THD) due to the increased use of nonlinear loads that tend to degrade AC line quality. THD standards, such as the IEC-1000-3-2 promulgated by the international Electrochemical Commission, have been adopted. Due to requirements associated with cost effectiveness, there are numerous references in the prior art directed to single power stage AC-DC converters which employ such nonlinear loads. The power supply used with these converters usually requires multiple output DC voltages and fast output regulation. In addition, a high frequency power transformer is used to step up/down the output DC voltage. The transformer presents several drawbacks. First, a higher voltage stress occurs across the power switch due to the transformer volts-second reset. Second, the leakage inductance of the transformer, usually causes a voltage spike across the power switch when it turns off. To minimize or reduce the voltage spike, a snubber circuit, such as a R-C-D snubber, is sometimes used to absorb this voltage spike. This is not an optimum solution, however, in that the leakage energy of the transformer is dissipated in the snubber circuit making the circuit inefficient.” 
     One prior art single power stage AC-DC forward converter is shown in FIG. 1, where L k  is the leakage inductance of the transformer T, D s , is the body diode and C ds  is an internal capacitance of switch S. The inductor L in  is a boost inductor and is used to shape the input current waveform to achieve a high power factor with low input current harmonics. Winding N 3 , coupled with windings N 1  and N 2 , is used to reset the transformer T. 
     FIGS. 2 a  - 2   b  illustrate typical switching waveforms associated with the circuit of FIG.  1 . The voltage on DC bus capacitor C dc , i.e., V dc , is considered to be constant over successive switching cycles as a consequence of the large capacitance value selected for C dc  in comparison with the switching period. During the time switch S is on, time (t 1 -t 2 ), voltage V dc  is applied to primary winding N 1  and leakage inductor L k . Therefore, the voltage V dc  on capacitor C dc  is discharged to the load R o  via transformer coupling N 1 -N 2 . The difference between the reflected voltage across winding N 2  and the voltage across the load R o , i.e., V o , is applied to the choke inductor L f  as V lf  for the period (t 1 -t 2 ). As a result, an increased current produced in L f  is delivered to the output load R o . Also, during time interval (t 1 -t 2 ), a circuit path is formed from the AC voltage source V in , through inductor L in , diode D 5 , switch S and back to ground. Energy is stored in inductor L in  during this time. 
     Considering the time during which switch S is off, i.e., (t 2 -t 4 ). Diode D 5  is nonconducting. The current through L in  therefore flows through diode D 4  charging capacitor C dc . It is noted, however, this charging current is inconsequential given the large capacitance value of C dc  and the relatively short charging interval. A magnetizing current in winding N 1 , which previously traveled through switch S during the time switch S was on, is now transferred (magnetically coupled) to winding N 3  causing diode D 1  to transition to a conducting state. A voltage developed across winding N 3  by virtue of the coupled magnetizing current ser-cs as additional charging source for capacitor C dc . During this time interval (t 2 -t 4 ), the winding current in N 3  is effectively reset. A negative voltage which is developed across N 2  in the secondary winding causes diode D 2  to become nonconducting. As such, energy stored in L f  during the time (t 1 -t 2 ) is released through the load R o  for the time (t 2 -t 4 ). 
     A drawback associated with the circuit of FIG. 1 is that at time t 2 , the point at which switch S turns off, the energy which was stored in leakage inductor L during the time (t 1 -t 2 ), i.e., the time switch S was ON, is released to charge internal switch capacitor C ds  thereby generating an undesirable voltage spike as shown in FIG. 2 b . After the leakage energy is released, the voltage across switch S is equal to the sum of the DC bus voltage plus the tranformers reset voltage. A negative consequence of the higher voltage across switch S is that a higher rated switch S is required, especially for a higher input line voltage, e.g., 277 AC. An associated drawback of using higher voltage rated switches is their increased cost. 
     A number of circuit topologies have been proposed in the prior art to eliminate the large overvoltages which occur across switching devices at turn off. One method for minimizing the large overvoltages is the use of an R-C-D snubber network. In general, the function of a snubber circuit is to reduce the electrical stresses placed on a device during switching by a power electronics converter to levels that are within the electrical ratings of the device. In the present case, a snubber network is employed to limit voltages applied to a switch during turn-off transients. 
     FIG. 3 illustrates the prior art circuit of FIG. 1 with the addition of an R-C-D snubber network. While the snubber network minimizes or reduces the occurrence of voltage spikes, it does so at the expense of reducing the conversion efficiency of the circuit. In addition, snubbers introduce additional complexity and cost to the basic converter circuit. As such, it is a non-optimal solution. 
     Thus, it is desirable to provide a converter design that limits the maximum voltage stress on the power switch and recycles the leakage energy of the transformer such that the circuits efficiency is enhanced. 
     SUMMARY OF THE INVENTION 
     According to the invention, a single power stage AC/DC forward converter with power switch voltage clamping function includes: a switch S; L k1  and L k2  representing leakage inductances associated with the primary windings of transformer T, two series clamping and recovery capacitors C d1  and C d2 ; a transformer T including primary windings N 1  and N 2  having the same number of turns; a boost inductor L in ; a filter L f ; a diode D connected in parallel with the switch S and in series with C d1  and C d2 . 
     In one embodiment, the DC bus capacitors C d1 , and C d2 , are connected directly to the leakage inductors L k1 and L k2 , respectively. In this embodiment, during intervals between conduction by switch S, the capacitors recover leakage energy from the leakage inductors L k1 , and L k2 , and during intervals of conduction by switch S, the recovered leakage energy stored in capacitors C d1  and C d2 , is provided to the load via transformer T. 
     A main advantage provided by the circuit of the present invention is the prevention or substantial elimination of voltage spikes which would otherwise occur at each switch transition to the OFF state. Voltage spikes are eliminated in two ways: (1) by configuring the DC bus capacitors C d1 , and C d2  to be in parallel with the switch S and, (2) by selecting the capacitance values of capacitors C d1  and C d2  to be sufficiently large to clamp the voltage across switch S to a value equal to the DC bus voltage. 
     A further advantage of the circuit of the present invention is that by recovering the leakage energy in each switching cycle, as opposed to dissipating it in accordance with prior art approaches, the overall circuit efficiency (i.e., power out/power in) is enhanced. An additional advantage of capturing the leakage current is that the voltage rating of switch S is significantly reduced thereby reducing its cost. 
     Accordingly, it is an object of the invention to provide an AC/DC forward converter in which the voltage across the main switch S is clamped to the DC bus voltage, thereby preventing the occurrence of undesirable voltage spikes. 
     It is another object of the invention to provide an AC/DC forward converter in which the leakage energy of the transformer is substantially recovered to improve circuit efficiency. 
     It is yet another object of the invention to meet the objectives stated above with a converter in which a minimum number of components are used to reduce costs. 
     Still other objects and advantages of the invention, will, in part, be obvious and will, in part, be apparent from the specification. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The foregoing features of the present invention will become more readily apparent and may be understood by referring to the following detailed description of an illustrative embodiment of the present invention, taken in conjunction with the accompanying drawings, where: 
     FIG. 1 is a circuit diagram illustrating an LCD backlighting converter circuit of the prior art; 
     FIGS. 2 a  - 2   b  illustrate representative waveforms present in the circuit of FIG. 1; 
     FIG.3 is a circuit diagram illustrating an LCD backlighting inverter circuit of the prior art including a R-C-D snubber network; 
     “FIG.4 is a circuit diagram illustrating an LCD backlighting inverter circuit in accordance with a first embodiment of the present invention; 
     FIGS. 5 a  - 5   e  illustrate representative waveforms present in the circuit of FIG. 4; 
     FIG. 6 is a circuit diagram illustrating an LCD backlighting inverter circuit in accordance with a second embodiment of the present invention; and 
     FIG. 7 is a circuit diagram illustrating an LCD backlighting inverter circuit in accordance with a third embodiment of the present invention.” 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     An AC/DC forward converter circuit is provided which eliminates or significantly reduces voltage spikes which occur across the circuit switching element during turn-off at each switching cycle. Additionally, the converter circuit of the present invention is more power efficient than converter circuits of the prior art in that inductor leakage energy is recovered during intervals between conduction by the switching element. 
     “One embodiment of the AC/DC forward converter circuit  10  of the present invention is shown schematically in FIG.  4 . The converter circuit  10  preferably comprises a full-wave rectifier bridge  15  having rectifier input terminals  22   a ,  22   b  and rectifier output terminals  24   a ,  24   b . Input terminals  22   a ,  22   b  are adapted to be connected across a household-type source of AC energizing potential (90-264V AC, 60 Hz). The output of the full-wave bridge rectifier  15  is coupled to boost inductor L in . Boost inductor L in , is connected at junction  44  with switch S which may be a power MOSFET or other such well-known semiconductor switch as would be appreciated by those skilled in the art. Switch S includes internal body diode D s , and internal junction capacitance C ds . In parallel with switch S is DC bus capacitor C d1 , diode D and DC bus capacitor C ds . serially connected between junctions  44  and  46 . Switch S, bus capacitor C d2  and primary winding N 1  are connected together at junction  44 . Transformer T includes two primary windings, N 1  and N 2 , both of a predetermined and substantially equal inductance and a secondary winding N 3 . Also in series with windings N 1  and N 2  are shown two leakage inductors L k1  and L k2  associated with windings N 1  and N 2 , respectively.” 
     In the secondary circuit, generally indicated as reference numeral  60 , the transformer secondary winding N 3  is connected in series with diode D 01 , and filter L f  and in parallel with diode D 02 , capacitor C 0 , and load R b . Load R b  can be, but is not limited to another power supply, or another device fluorescent lamp of the cold cathode type. The light from load R b  may be used to illuminate a liquid crystal display (LCD) of a computer (not shown). 
     The operation of circuit  10  will now be described. When switch S turns on at time t 1 , the rectified AC input voltage V in  which is continuously applied to terminal  24   a , is conducted through a path defined by boost inductor L in , switch S and back to terminal  24   b . It is assumed that voltages V d1  and V d2 , associated with capacitors C d1  and C d2 ,respectively, are constant voltages as a result of the large capacitance values selected for C d1  and C d2 . Further, capacitor C d1  is preferably selected to be equal to C d2 . As such, voltage V d1  is substantially equal to voltage V d2 . Further, the winding in N 1  is preferably selected to be equal to the winding in N 2 . In this case, the winding voltage and polarity across the primary windings N 1  and N 2  are substantially equal. 
     Operation of the embodiment of FIG. 4 is explained hereunder in conjunction with FIGS. 5 a-e  which illustrate certain of the waveforms present in circuit  10 . During the time when switch S is on (t 1 -t 3 ) (see FIG. 5 a ), voltage V d1 , on bus capacitor C d1 , discharges through a circuit path defined by voltage source V d1 , leakage inductor L k1 , primary winding N 1 , switch S and back to ground. In this first circuit path, a voltage is developed across primary winding N 1 . This voltage is coupled to the load circuit  60 , as will be described below. Also, during this time, i.e., (t 1 -t 3 ), voltage V d2  on bus capacitor C d2  discharges through a path defined by voltage source V d2 , switch S, primary winding N 2 , and leakage inductor L k2  In this second circuit path, a voltage is developed across primary winding N 2 . 
     “The voltage developed across primary winding N 1  in the first circuit path is magnetically coupled to the secondary winding N 3  of transformer T. A voltage difference between the magnetically coupled voltage across secondary winding N 3 , i.e., and the output voltage, V o , across the load R b , is applied as an additional voltage V lf  across inductor L f , which is delivered as additional power to the load R b .” 
     From the point at which switch S turns off at time instant t 3 , the leakage energy stored in leakage inductors L k1 , and L k2  during the time (t 1 -t 2 ), is transferred to the respective DC bus capacitors C d2  and C d1 . The transfer of leakage energy is represented by leakage (i.e., magnetizing) currents I k1  and I k2 , as shown in FIG. 5 b . Referring to FIG. 4, leakage current I k1  flows from L k1 , through Ni to charge bus capacitor C d2  and leakage current I k2  flows from L k2  through diode D to charge bus capacitor C d1 . Also, at the point at which switch S turns off at time instant t 3 , the transformer is being reset. That is, voltage V d1  is applied across winding N 2  and voltage V d2  is applied across winding N 1 . Also, the boost inductor current I lin , charges the two DC bus capacitors C d1 , and C d2  until time instant t 5 , when it decreases to zero (See FIG. 5 d ). 
     As shown in FIG. 5 e , at time instant t 3 , the voltage across switch S, i.e., V ds , is clamped to a value equal to the sum of voltages V d1  and V d2  across capacitors C d1  and C d2 , respectively. The clamped voltage across switch S remains in effect until the magnetizing current decreases to zero at time instant t 6  (See FIG. 5 c ). After the transformer T is reset, diode D becomes nonconducting, and the voltage across the power switch S is the maximum value of V d1  and V in until time instant t 7 , when the power switch turns on again. 
     It should be appreciated that voltage spikes are eliminated or substantially reduced across switch S as a consequence of the voltage across switch S,V ds , being clamped to the sum of (V d1 +V d2 ) at turn off. 
     For the single power stage converter with PFC function, as illustrated in FIG. 4, a general drawback exists concerning the power balance between the input and the output power. Because only one active power switch is used in the single stage converter, the switch will only have two control quantities, that is, duty-cycle and switching frequency. One way to balance the input and output power and to fix the DC bus voltage is by controlling the output power with via the duty-cycle and controlling the input power with the switching frequency. 
     A second solution for balancing input and output power is to insert an indirect control quantity. FIG. 6 illustrates a circuit which utilizes such a solution. In FIG. 6, circuit components corresponding to the components of FIG. 4 are denoted by the same symbols. The configuration shown in FIG. 6 differs from that of FIG. 4 only in that the input inductor L in , and forward filter inductor L f  can be a loose coupling. In this manner, the DC bus voltage will reflect into the output loop to regulate the output power indirectly. One benefit of this approach is that a portion of the input power will be directly delivered to the output thereby helping to increase the efficiency of the converter. 
     In FIG. 6, circuit components corresponding to the components of FIG.  4  and FIG. 6 are denoted by the same symbols. The configuration shown in FIG. 7 differs from that of FIGS. 4 and 6 only in that an extra winding N 4  is used which can directly transfer energy to the output without processing by the switch. As a result, conversion efficiency is further improved. 
     While the invention has been illustrated with respect to several specific embodiments thereof, these embodiments should be considered as illustrative rather than limiting. Various modifications and additions may be made and will be apparent to those skilled in the art.