Abstract:
An apparatus and method for providing a reference voltage which provides a signal indicating when the reference voltage has reached a desired stable condition. This signal is obtained by comparing two test voltages which are interrelated and also related to the condition of the reference voltage.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a circuit for providing a reference signal that can be used in conjunction with a circuit for signal processing, and that provides a way for the reference generating circuit to monitor itself to determine when the reference voltage is stable. 
     2. Description of Related Art 
     Bandgap based voltage and current generation circuits have been widely used to provide bias currents and reference voltages for analog and mixed signal integrated circuits. The circuits that receive bias currents and reference voltages often perform important signal processing functions and make decisions that can affect the overall operation of an integrated circuit. It is extremely important that the decisions not be affected by undesired fluctuation in the bias current or reference voltage. At the start-up of a semiconductor chip, the circuits that receive and rely upon the bias current or reference voltage can reach operable states before the bias current or reference voltage reaches it steady-state value. If this occurs at a point in time when the value of the bias current or reference voltage is unstable and at a small fraction of its steady-state values, the decisions made by the circuits that depend upon the bias current or reference voltage may be unpredictable. In order to prevent the unpredictable decisions from corrupting the chip function, the circuit that generates the bias current or reference voltage should output a signal indicating that the bias current or reference voltage has reached a condition necessary for proper operation of the chip. 
     One example of a prior art approach to providing a bandgap based reference voltage is disclose in U.S. Pat. No. 5,610,506, VOLTAGE REFERENCE CIRCUIT, (Issued Mar. 11, 1997). The &#39;506 patent proposes a circuit that indicates that the voltage generated by the bandgap circuit is not valid and this information is used to enable or disable the other circuits of the chip. 
     The approach taken in the &#39;506 patent concentrates on determining whether or not the supply voltage has reached a predetermined value. The focus of trying to determine whether or not the supply voltage has reached a specific value does not address the issue that arises as integrated circuits are powered by battery cells where the supply voltage cannot be assumed to be a fixed or certain value. Also, in order to maximize the operation of chips, circuits should be allowed to operate over as wide a range of power supply voltage as is possible. Thus, there is a need for generating a signal that indicates the proper operation of a bandgap circuit as soon as the generated voltage or current is stable enough to provide a bias current or reference voltage. 
     SUMMARY OF THE INVENTION 
     The method and apparatus of the invention provide a circuit that generates a reference voltage. The circuit also provides nodes that produce test voltages. These test voltages are interrelated and also relate to the state of the reference voltage. By comparing the test voltages, the circuit is able to make a determination as to when the reference voltage has reached a ready state. An important feature of the invention is that the test voltages are derived from the same circuit that generates the reference voltage. Thus, the determination that the reference voltage is suitable for use is made as quickly as possible, because the voltages being compared are part of the reference voltage circuit itself and are not derived from some other source. 
    
    
     BRIEF DESCRIPTION OF DRAWINGS 
     FIG. 1 is a circuit diagram illustrating an embodiment of the invention. 
     FIG. 2A is a diagram showing the voltage of different nodes of the circuit diagram shown in FIG. 1, as the circuit progresses from start-up to steady-state. 
     FIG. 2B is a diagram showing the voltage and current for different nodes and branches of the circuit shown in FIG.  1 . 
     FIG. 3 is a circuit diagram illustrating an alternate embodiment of the invention. 
    
    
     DETAILED DESCRIPTION 
     FIG. 1 is a detailed circuit diagram showing an embodiment of the present invention. The node Vbg in the FIG. 1 circuit provides an output voltage that can be used as a reference voltage for analog and mixed signal integrated circuits. 
     As shown in FIG. 1, MOSFETs M 275  and M 278  are configured to act as a current mirror wherein the output current from the drain of each of these devices is the same. Similarly, devices M 278  and M 279  are also coupled to act as a current mirror, so the current output from the drain of M 279  will be the same as the current output from the drains of devices M 275  and M 278 . In this current mirror configuration, the gates of each of the three MOSFETs are connected and the gate and drain of MOSFET M 278  are also connected. While the devices shown in this configuration are P-channel device MOSFETs, one skilled in the art would recognize that other solid state devices could be used to serve the current mirror function. 
     MOSFETs M 274 , M 276  and M 277  are not necessary for the operation of the FIG. 1 circuit, but including these solid state devices in the circuitry improves the overall operation of the circuit. While the devices M 274 , M 276  and M 277  are shown as MOSFETs, other solid state devices could also be used. 
     Devices M 282  and M 283  are N-channel device MOSFETs that provide the function of ensuring that the voltages V y  and V first     —     up  are equal. This is achieved because each of these devices is the same size, the gates are connected together, the devices are in saturation, and the devices have the same current Io flowing from their source terminals. 
     The drain of device M 274  is connected to a series of resistors designated as R 2  in the FIG. 1 circuit. The combined resistance of these resistors is equal to 10 times the resistance of resistor R 1 . Resistance R 2  is then connected to the emitter of the diode-connected bipolar transistor Q 273 . 
     The source of the MOSFET M 282  is connected to resistor R 1  which in turn is connected to the emitter of the diode-connected PNP bipolar device Q 272 . The source of MOSFET M 283  is connected to the emitter of another diode-connected PNP bipolar device Q 271 . 
     The emitter area of the Q 272  transistor is 10 times the emitter area of the  271  transistor. 
     Because, for the FIG. 1 circuit, the current flowing through devices Q 272  and  271  is equal, it can be determined that V Y −V Z =Vtln10. This is derived from the fact that V Y  and V first     —     up  are equal to each other and therefore V first     —     up −V Z =V Y −V Z . This relationship, in conjunction with known principles of bipolar devices, such as V eb =V t *ln(Io/Is) allows one to establish V Y −V Z =Vtln10. 
     The voltage V bg  is generated by sourcing current Io into device Q 273  and resistance R 2 . FIGS. 2A-B show how the FIG. 1 circuit behaves as a function of the supply voltage V DD . Over most of the range of V DD , the following relationship is seen V first     —     up −V x =Vtln 10. The only time this is not true is when current Io is zero. Also, we can see that V bg =V x  until V DD  reaches some point above 0 volts. This is true because V bg =V X +Io*R 2  and, where V DD  is very small current Io will be very small. 
     Thus, as the bandgap circuit shown in FIG. 1 starts to come into full operation, V bg  increases toward its steady-state point while V x  remains Vtln10 below V first     —     up . At a point somewhere between V bg  and V X , we can denote a node V first     —     down  the behavior of which is seen in FIG. 2A-B. 
     As shown in FIG. 1, V first     —     down is positioned above node V x  such that its voltage will be higher than V X  and less that V bg  where Io equals some value greater than zero. The behavior of the voltage at node V first     —     down  of FIG. 1 is shown in FIGS. 2A-B as a function of V DD . From these plots, we can see that when V first     —     down  equals V first     —     up , the bandgap voltage V bg  is near its final point and the bias current Io, is near its final value. Thus, by comparing V first     —     up  and V first     —     down , we can generate a signal V ready  indicating the bandgap circuit is ready or very close to its final stage. 
     The voltage difference being compared here is V first     —     up −V first     —     up  V first     —     down  which is very controlled and predictable. Also note that any attempt to improve the bandgap circuit itself will also result in the accuracy of the V first     —     up −V first     —     down . 
     While the above discussion focuses on the situation where the current Io through each of the branches is the same, one skilled in the art would realize that similar results could be obtained by using varying sizes of solid state devices, wherein the current flowing through each of the branches would be proportional to each other, but not necessarily equal. 
     FIG. 3 shows the FIG. 1 circuit including the generation of signal V ready . Note that the comparator in FIG. 3 is being biased by current I bias  which is independent of the bandgap circuit. This ensures that the comparator is operable long before the bandgap circuit is operating to produce a stable reference. The I bias  current as shown in FIG. 3 is derived directly from V DD . The circuit operates such that there will be enough current derived through the resistor R 304  to bias the comparator long before the V first     —     down  is equal to or greater than the V first     —     up . The comparator receives the voltage V first     —     up  at its noninverting input, and the voltage V first     —     down  at its inverting input. When the comparator senses that V first     —     down  is equal to or greater than V first     —     up , it will output an active low signal V ready  enabling the operation of decision making circuitry at the chip. Thus, the decision making circuitry will be enabled as soon as the test voltages of the reference generator circuit indicate that the reference voltage is stable, but not before. 
     While the method- and apparatus of the present invention have been described in terms of its presently preferred and alternate embodiments, those skilled in the art will recognize that the present invention may be practiced with modification and alteration within the spirit and scope of the appended claims. The specifications and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense. Further, even though only certain embodiments have been described in detail, those having ordinary skill in the art will certainly understand that many modifications are possible without departing from the teachings thereof. All such modifications are intended to be encompassed within the following claims.