Abstract:
A solid-state (IC) regulated voltage supply compensated for effects of changes in temperature comprising first and second transistors operated at different current densities. Associated circuitry develops a voltage proportional to the ΔV BE  of the two transistors and having a positive temperature coefficient. This voltage is connected in series with the V BE  voltage of one of the two transistors, having a negative temperature coefficient, to produce a resultant voltage with nearly zero temperature coefficient. A feedback circuit responsive to current flow through the two transistors automatically adjusts the base voltages to maintain a predetermined ratio of current density for the two transistors. Other embodiments provide higher-level DC outputs and compensation for base current flow.

Description:
.Iadd.This is a continuation of U.S. Pat. application Ser. No. 799,760 filed May 23, 1977, which is a Reissue application of U.S. Pat. No. 3,887,638 dated June 3, 1975. .Iaddend. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     This invention relates to regulated DC voltage supplies. More particularly, this invention relates to solid-state (IC) regulators capable of maintaining a substantially constant DC output voltage in the face of temperature variations. 
     2. Description of the Prior Art 
     Conventional prior-art regulated voltage supplies commonly have included an internal reference source and an error amplifier arranged to compare the reference voltage with a pre-set fraction of the regulated DC output voltage. The output of the error amplifier is directed to a control element, such as a controllable impedance or the like, arranged to adjust the output DC voltage so as to maintain the two compared voltages equal. Fluctuations in the DC output voltage are thereby reduced. 
     In transistorized voltage-regulator circuits, the reference source typically has been a Zener diode. However, as is known in the art, Zener diodes have certain inherent characteristics which undesirably restrict the capability of a voltage regulator. An alternative type of solid-state regulator has been developed which does not use a Zener diode reference, relying instead on certain temperature-dependent characteristics of the base-to-emitter voltage (V BE ) of a transistor. 
     U.S. Pat. No. 3,617,859 discloses a circuit of the latter type which includes a diode-connected transistor operated at one current density, and a second transistor operated at a different current density. These two transistors are interconnected with associated circuitry so as to develop a voltage proportional to the difference in the respective base-to-emitter voltages (ΔV BE ). This difference voltage has a positive temperature-coefficient (TC), and is connected in series with the V BE  voltage of a third transistor, having a negative TC, to produce a composite resultant voltage which serves as the output of the regulator. Since the temperature coefficients of the two individual voltages are of opposite sign, the output voltage can be made relatively insensitive to temperature variations by proper choice of certain parameters. 
     Although such regulators based on the V BE  characteristic of transistors have significant advantages, the circuit arrangements proposed and used heretofore suffer from serious limitations. It is a principal object of the present invention to provide a solid-state voltage regulator which avoids or significantly minimizes such limitations of prior art regulators. 
     SUMMARY OF THE INVENTION 
     In an exemplary embodiment of the present invention, to be described in detail hereinbelow, there is provided a two-transistor voltage-regulator circuit wherein the ratio of current densities of the two transistors is automatically controlled to a predetermined value (different from unity) by a negative feedback arrangement. A voltage corresponding to the ΔV BE  of the two transistors is developed, having a positive TC, and this voltage is connected in series with the V BE  voltage of one of the two transistors, having a negative TC. The circuit parameters are selected so that the resultant combined voltage has a very low temperature coefficient. The regulator of this invention provides important advantages over previous regulators, as will be outlined hereinbelow in describing specific embodiments of the invention. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a circuit diagram of one embodiment of the present invention; 
     FIG. 2 is a circuit diagram of a modified arrangement to provide higher regulated output voltages; 
     FIG. 3 shows a further circuit arrangement modified to reduce base current effects; and 
     FIG. 4 is a circuit diagram of a voltage reference source including means to establish bias levels and to provide current limiting. 
    
    
     DESCRIPTION OF PREFERRED EMBODIMENTS 
     Referring now to FIG. 1, there is shown a circuit diagram representing basic components and interconnections of a regulated voltage source in accordance with the present invention. The circuit includes a pair of transistors Q 1  and Q 2  which are supplied with operating voltages by positive and negative voltage lines 10 and 12. The emitter of the left-hand transistor Q 2  is coupled through two series-connected resistors R 2  and R 1  to the negative voltage line 12, and the emitter of the other transistor Q 1  is connected to the common junction 18 between the two resistors. 
     The invention proceeds on the concept of (1) developing a first voltage, having a positive temperature coefficient (TC), (2) combining that voltage serially with a second voltage having a negative TC, and (3) relating the two temperature coefficients in a complementary sense such that the resultant composite voltage has a very low TC, approximately zero. To develop the positive TC voltage, the two transistors Q 1  and Q 2  are controllably operated at markedly different current densities (i.e., referring to density of current flowing through the emitters), and a voltage is produced proportional to the difference in the two transistor base-to-emitter voltages, referred to as ΔV BE . 
     In the specific embodiment disclosed herein, transistor Q 2  is operated at a smaller current density than the other transistor Q 1 . Such difference in current densities can be produced (1) by using identical transistors operating at unequal currents, (2) by using transistors having unequal emitter areas operating at equal currents, or (3) by some combination of the latter two arrangements. Simply by way of example, in the described embodiment the emitter areas of the transistors Q 1  and Q 2  are specified as A and nA respectively, with n being greater than one, and the currents through the two transistors are equal. 
     The transistor currents are forced to be equal by a negative feedback arrangement comprising current-sensing means in the form of equal-resistance load resistors R L1  and R L2  in the collector circuits of transistors Q 1  and Q 2 . These load resistors develop voltages which are proportional to the respective collector currents, and which are directed by leads 24, 26 to the input terminals of a high-gain operational amplifier 28. The output of this amplifier is connected to a common base line of the two transistors Q 1  and Q 2 , and also to an output terminal 30 presenting the DC output voltage of the regulator. The amplifier 28 drives the common base line until the voltage drops across the load resistors R L1  and R L2  are equal, thereby forcing the transistor collector currents to be equal. By using well matched transistors Q 1  and Q 2 , the emitter currents also will be equal. 
     Since the bases of transistors Q 1  and Q 2  are connected together, the difference voltage Δ VBE  will appear across emitter resistor R 2 , and the current through that resistor thus will be directly proportional to ΔV BE . The series connected resistor R 1  also carries this emitter current, and additionally carries the emitter current of the second transistor Q 1 . Since the latter emitter current is directly proportional to the first emitter current (actually equal, in this particular example), it will be evident that the total current through resistor R 1 , and hence the voltage across that resistor, also will be directly proportional to ΔV BE . 
     It has previously been established that, for two transistors operating at different current densities, the difference in base-to-emitter voltage is given by: 
     
         ΔV.sub.BE =kT/q ln J.sub.1 /J.sub.2 
    
     where T is absolute temperature, k is Boltzman&#39;s constant, q is the charge of an electron, and J 1  /J 2  is the ratio of the transistor current densities. Accordingly, the voltage developed across resistor R 1  is independent of absolute emitter current, and is a linear function of absolute temperature with a positive temperature coefficient. 
     As is evident from the circuit lay-out, the voltage across resistor R 1  is in series with the V BE  voltage of transistor Q 1  and the resultant composite voltage constitutes the DC output voltage on terminal 30. Since V BE  has a negative temperature coefficient, changes in that voltage with temperature tend to complement the positive TC changes in the voltage across resistor R 1 . 
     To approach zero TC, the output voltage at the regulator terminal 30, with respect to the negative voltage line 12, should be set approximately to the value of the energy band-gap voltage (V GO ), extrapolated to 0°. For silicon, this extrapolated voltage is 1.205V. A slightly higher voltage produces superior results. It can be shown mathematically, based on certain reasonable assumptions, that for zero TC the output voltage should be set at: 
     
         V.sub.OUT =V.sub.GO +(m-1)kTo/q 
    
     where m≅1.5 and To is the nominal operating temperature. 
     This voltage V OUT  can be adjusted to the desired value by proper selection of resistor R 1 , such that the resistive voltage drop complements the V BE  of Q 1  to optimize the total (sum) voltage for zero TC. 
     When the DC output voltage (V OUT ) at terminal 30 drops below the pre-established optimal level, the ratio of collector currents I 2  /I 1  is larger than the ratio of load resistors R L1  /R L2  (i.e., larger than one), so that the input to amplifier 28 is positive. This causes the amplifier output to increase, so as to return the voltage V OUT  back up to the optimal level. If the DC output rises above optimal, the feedback action of amplifier 28 will have the opposite effect. Thus the voltage-control circuit continuously holds the DC output voltage at the proper level to provide a very low overall temperature coefficient, close to zero. 
     In some applications, DC output voltages higher than the energy band-gap voltage may be required. FIG. 2 shows an arrangement for that purpose. The basic operation of this circuit is similar to that of FIG. 1, and like reference numerals are used throughout for corresponding elements. However, FIG. 2 differs in that the output of amplifier 28 is connected to a voltage-dividing network comprising two series-connected resistors hR 3  and R 3 . The common junction terminal 32 of these resistors provides a voltage which is a predetermined fraction of V OUT , and this voltage is directed to the commonly connected bases of transistor Q 1  and Q 2 . 
     As before, the amplifier 28 drives the transistor bases until their collector currents are equal. By proper selection of circuit parameters, the reference voltage (V REF ) at this stable point can be set to be optimum for achieving zero TC. The output voltage (V OUT ) then will be some predetermined multiple of V REF , specifically (h+1)·V REF . 
     This arrangement of FIG. 2 provides a quite accurate result. It is degraded only a small amount due to the base current of the transistors. This base current is relatively low, and in any event the positive TC of the transistor beta tends to act with the positive TC of the emitter current to stabilize the base current and reduce any drift. 
     Where further reduction of such small drift effects may be desirable, a controlled beta PNP may be used to reflect the base current from a pair matched to Q 1  and Q 2  and connected in cascode with them into the base of Q 1  and Q 2 . Alternatively, the base of transistors Q 1  and Q 2  can be connected together through a resistor R 4 , as illustrated in FIG. 3. Here, the voltage across resistor R 2  is no longer ΔV BE , since the bases are no longer at the same voltage. However, it can be shown that this arrangement may, with matched betas, produce the basic regulation of the FIG. 2 embodiment, but with reduced drift due to base current, providing R 4  is selected such that: 
     
         R.sub.4 =hR.sub.3 /h+1×R.sub.2 /R.sub.1 
    
     To take into account the possible effects of base spreading resistance of the two transistors, further analysis indicates that the base-connecting resistor R 4  should be selected such that: 
     
         R.sub.4 =R.sub.b1 C.sub.1 (1 +1/C.sub.2 (C.sub.1 +1))-R.sub.b2 
    
     where R b1  and R b2  are the base spreading resistances of transistors Q 1  and Q 2  ; C 1  =I e1  /I e2  (emitter currents of Q 1  and Q 2 ); and C 2  =R 1  /R 2   
     The above-derived expression for R 4  also indicates that the use of a base-connecting resistor may be helpful in the basic circuit configuration of FIG. 1. For R 4  to be zero, R b2  must be larger than R b1  ; typically, however, Q 2  is the larger transistor with a very low base resistance, and design considerations thus suggest that the base resistance of Q 1  should be minimized. It may be possible to correct for the effect with a pinched base resistor in series with the large transistor. 
     Voltage-regulated supplies in accordance with the present invention have a number of important and beneficial features. Foremost, such voltage supplies provide a highly stable output voltage in the face of changing ambient temperature. Only two matched active elements are required, rather than three as in the above-identified U.S. Pat. No. 3,617,859. Advantageously, the reference voltage in the disclosed circuits appears in the control loop at a point with a high impedance, so that it can readily be driven. Moreover, the reference voltage may be multiplied as desired to produce output voltages higher than the band-gap voltage, by means of a single control loop, and without stacking junctions. In the FIG. 2 configuration, the reference voltage can first be adjusted to minimize temperature coefficient, and then the output voltage can separately be adjusted to a predetermined voltage without affecting the temperature coefficient. The basic circuit is convenient to trim by adjusting a single resistor (R 1 ). Finite beta and beta drift does not result in uncorrectable errors; only beta matching is required. 
     Referring now to FIG. 4, there is shown a voltage reference source including transistors Q 1  and Q 2  used to establish the reference voltage in the manner generally as described hereinabove. In this circuit, these transistors are driven so that they will operate at equal collector currents. Neglecting R23, for the moment, the bases of these transistors are driven from the circuit output by the voltage divider consisting of R31 and R24. The output current is provided by Darlington-connected transistors Q 4  and Q 7 , which draw operating current from the input voltage terminal. The base of Q 4  is driven by a bias current from Q 18 . 
     The circuit output voltage is controlled by adjusting the base voltage of Q 4 , so that Q 4  and Q 7  form a voltage follower. A voltage drop provided by Q 3  approximately matches the V BE  of Q 4 , with R27 and Q 15  providing a voltage drop matching other circuit voltages. The base voltage of Q 4  is controlled by the emitter follower Q 12  which is driven by Q 1  and Q 14 . 
     In operation the collector current of Q 2  drives the base of Q 11  negative. Acting as an emitter follower, Q 11  turns on Q 13  and drives it until its collector current approximately equals the collector current of Q 2 . The base of Q 13  connects to Q 14 , a matching transistor. Since R25 and R26 are also matched, the collector current of Q 14  will approximately equal that of Q 13  and hence of Q 2 . If the collector current of Q 2  exceeds the collector current of Q 1 , Q 14  will drive the base of Q 12  positive. Alternatively, if the collector current of Q 1  exceeds the collector current of Q 2 , it will also exceed that of Q 14  and will, therefore, drive the base of Q 12  negative. The circuit output voltage will follow the base voltage at Q 12  as previously explained. 
     The emitter area of Q 2  is eight times larger than that of Q 1 . When the voltage at the base of Q 1  and Q 2  is low, the current through R21 and R22 is low. The resulting voltage drop across R22 will be low, and the base-emitter voltages of Q 1  and Q 2  will be nearly equal. As a result of the area ratio mismatch the emitter current in Q 2  will be nearly eight times the current in Q 1 . This current mismatch will cause Q 14  to drive the base of Q 12 , and, thereby, the output - positive. 
     If the base voltage applied to Q 1  and Q 2  is made larger, the current through R21 and R22 will also be larger. At a sufficiently high base voltage the voltage drop across R22 will limit the current in Q 2 , and it will drop below the current in Q 1 . The excess collector current in Q 1  will drive the base of Q 12  negative, and with it the circuit output. 
     Between these two extremes of base voltage there will be a voltage at which the collector currents of Q 1  and Q 2  are equal. At this voltage the current in Q 14  will balance the current in Q 1  and the base of Q 12  will be held at a voltage which maintains the circuit output and the Q 1  - Q 2  base voltage constant. Changes in output loading or other disturbances which tend to change the output voltage will change the voltage on the bases of Q 1  and Q 2 . This will disturb their collector current balance so as to drive Q 12  to restore the output voltage. This control loop forcing the collector currents of Q 1   and Q 2  to be equal satisfies the condition, previously described, to hold constant C 1  =1. 
     With the collector currents of Q 1  and Q 2  forced to be equal, the voltage drop across R22 will be (kT/q) ln J 1  /J 2  =(kT/Q) ln 8. The current in R21 will be just twice that in R22 so that the voltage across R21 will be proportional to the drop across R22. Therefore, the voltage at the base of Q 1  which results in the balance condition is the sum of the V BE  of Q 1  and the temperature-dependent voltage on R21. This voltage is set (by selecting the ratio of R21 and R22) so that this voltage is just above the bandgap voltage and satisfies the conditions previously outlined for zero temperature coefficient. 
     The stabilized base voltage of Q 1  is a fraction of the circuit output voltage determined by R31 and R24. The output voltage is, therefore, a temperature stable multiple of the bandgap voltage determined by the resistor ratio. The interbase resistor R23 corrects for the offset and drift due to base current flow in R31. It also corrects for the base spreading resistance of Q 1 , as previously noted. 
     The voltage divider R28 and R29 is connected across the circuit output voltage. It is selected to have a Thevenin equivalent output voltage which differs from the circuit output voltage by the bandgap voltage. The equivalent resistance at the divider output is set at twice the resistance of R21. Transistor Q 5  is designed to match Q 1 . As a result of the equivalent voltage and resistance applied across its base and emitter, its emitter and collector currents will be approximately equal to those of Q 1 . This current drives the common base of Q 16  and Q 17 , a matched transistor pair. The matched emitter resistors, R32 and R33, force the emitter currents of Q 16  and Q 17  to be equal and raise the output impedance of Q 16 . This current mirror &#34;reflects&#34; the collector current of Q 5  down through Q 3 , R27 and Q 15 . A small fraction of this current drives the base of Q 4  which in turn drives Q 7  and also supplies the current for Q 13  and Q 14 . Since the current in the Q 5 , Q 17 , Q 16  and Q 3  path approximates the current in Q 2 , it is approximately half the current in Q 13  and Q 14  combined. This combined current is the majority of the emitter current in Q 4 . By making the emitter area of Q 4  twice that of Q 3 , the current densities and hence the base-emitter voltages of Q 3  and Q 4  are made nearly equal. Therefore, the voltage at the top of R27 approximately equals the voltage applied to R25 and R26. The currents in R25, R26 and R27 are approximately equal so that the voltage drops across them are approximately equal. Similarly, Q 15  is sized so that its emitter current density approximates that of Q 13  and Q 14 . In this way the base voltage of Q 15  is made nearly equal to the base voltage of Q 13  and Q 14 . This equality is translated through the base-emitter voltage of the matched transistors Q 11  and Q 12  to the collectors of Q 2  and Q 1  . This keeps the collector voltages of these transistors approximately equal at all temperatures and bias conditions. This minimizes problems resulting from different base width modulation in Q 1  and Q 2  which might result from unbalanced collector voltage. 
     The bias voltage stabilization also keeps the free collector voltage of Q 15  nearly equal to the base voltage. This helps to insure an equal split of the current in the forced beta transistor Q 15  (beta=1). This current split ensures equal emitter currents in Q 11  and Q 12 , thereby minimizing errors due to differences between their base currents. 
     The circuit as described so far would have a stable &#34;off&#34; state. The epitaxial layer FET portion of Q 5  eliminates this possibility. The FET provides a small starting current that turns on the circuit when voltage is applied. Although it diverts some of the current from R28, it has only a small effect on the current delivered to Q 17 . This total current is determined largely by the voltage drop across the equivalent R28, R29 resistance. The slight change in Q 5  V BE  which results from the diverted current is a small fraction of the total voltage applied to R28 and R29. 
     The frequency stability of the output control loop is established by C36. This capacitance rolls off the open-loop gain to unity below the frequency at which excess phase shift in the PNP&#39;s might cause instability. 
     Output overload protection is provided by Q 6  and R30. The output current flows through R30 and produces a small voltage drop across it. In the event of overload, this voltage will rise and drive Q 6  on. As Q 6  comes on it will divert the drive current from the base of Q 4  into the load. As a result, the output current is limited to that necessary to drive Q 6  on by way of R30. 
     The overall circuit consists of a current input amplifier which operated the control loop stabilizing the reference voltage. The amplifier input circuit, Q 13  and Q 14 , is bootstrapped to the regulated output. This bootstrap connection minimizes the effects of power supply voltage variation on the amplifier which improves the overall supply voltage rejection of the circuit. 
     Although several preferred embodiments of the invention have been described hereinabove in detail, it is desired to emphasize that such details have been disclosed for the purpose of illustrating the nature of the invention, and should not be considered as necessarily limiting of the invention which can be expressed in many modified forms to meet particular requirements.