Abstract:
An anti-lock braking system includes a speed sensor and a central processing unit (“CPU”). The speed sensor includes a motion sensor, an integral processing unit (“IPU”), and a housing which surrounds the motion sensor and the IPU. The motion sensor produces an analog signal as a function of a movement of an object, and the IPU converts the analog signal to a digital signal within the speed sensor. The IPU of the speed sensor transmits the digital signal to the CPU as a function of the analog signal received from the motion sensor. The CPU achieves an anti-lock braking action of the object as a function of the digital signal received from the IPU of the speed sensor.

Description:
CROSS-REFERENCE TO RELATED APPLICATION  
       [0001]    This application is a Continuation-in-Part application of U.S. patent application Ser. No. 09/635,185 filed on Aug. 8, 2001 and entitled “Digital Anti-Lock Speed Sensor. 
     
    
     
       FIELD OF THE INVENTION  
         [0002]    The present invention relates to an anti-lock wheel speed sensor for an electrically controlled anti-lock braking systems. More specifically, an anti-lock wheel speed sensor includes an integral processing unit which converts an analog wheel speed signal into a digital wheel speed signal.  
         BACKGROUND OF THE INVENTION  
         [0003]    The present invention relates to mechanisms for electrically controlled braking systems (“EBS”). It finds particular application in conjunction with an anti-lock braking system (“ABS”) and will be described with particular reference thereto. It will be appreciated, however, that the invention is also amenable to other like applications.  
           [0004]    Vehicles equipped with a conventional EBS or ABS typically include a central processing unit (“CPU”) that is electrically connected to wheel speed sensors, which are located on each wheel of the vehicle. During a time while the vehicle is braking, the wheel speed sensors measure a rotational motion of the respective wheels. More specifically, each sensor is fixed relative to a tone-wheel, which is located on an axle of the respective wheel. Ferro-magnetic protrusions extend from each of the tone-wheels. The protrusions pass by the respective sensors as each of the wheels and, consequently, the tone-wheels rotate. The frequency at which the protrusions pass each of the sensors is a function of the rotational speed of the respective wheel. Each sensor generates an analog signal having frequency and amplitude components that are both functions of the frequency at which the protrusions pass the sensor. More specifically, both the frequency and the amplitude of the analog signal increases/decreases in proportion to the rotational speed of a wheel.  
           [0005]    Each of the analog signals is continuously transmitted from the respective sensors to the CPU. The CPU generates digital data in accordance with the incoming analog signal. Then, the CPU determines the rotational speed of each of the wheels based upon the digital data. An average speed of the vehicle is calculated as a function of the rotational speed of each of the wheels. To determine if any of the wheels is slipping, the CPU compares the rotational speed of each of the wheels with the average speed of the vehicle. More specifically, if a deceleration of a wheel is outside a predetermined range, it is determined that wheel is slipping. The CPU then modulates the brakes in any of the wheels that is slipping until the speed of the respective wheel is within the predetermined tolerance of the average speed of the vehicle. This process is repeated continuously while the vehicle is braking.  
           [0006]    The analog signals transmitted between the sensors and the CPU are susceptible to noise (e.g., electromagnetic interference), especially when the vehicle is traveling at relatively low speeds. Attempts to reduce this noise have involved electrically connecting the sensors to the CPU using twisted-pair wires and/or shielded cables. Furthermore, signal conditioning circuits and/or filters, etc. have been incorporated into the CPU for “cleaning-up” the incoming signals before generating the corresponding digital data. While these techniques have improved the performance of ABS&#39;s at low speeds, they also require relatively more complex and expensive components and result in increased manufacturing costs. Furthermore, these conventional ABS&#39;s are only capable of reliably deciphering analog signals generated when the vehicle is moving at speeds of about four (4) miles per hour (“mph”) or greater.  
           [0007]    U.S. Pat. Nos. 5,406,485 and 5,352,938 disclose conventional analog to digital signal conversion circuits for ABS. The analog signal is transmitted from the wheel speed sensors to the signal conversion circuits. Due to the degradation of the analog signal which occurs between the wheel speed sensors and the circuits, conventional signal conversion circuits must process the analog wheel speed signal through amplifier and comparator circuits prior to converting the analog signal into a digital signal.  
           [0008]    It would be advantageous to avoid signal degradation by mounting a signal conversion circuit within a wheel speed sensor. However, conventional signal conversion circuits utilize components which have a maximum temperature rating of only about 150 degrees centigrade. During operation the temperature of the brakes may be as high as 180 degrees centigrade. Since the wheel speed sensors are installed in close proximity to the brakes, they are heated by the brakes. Conventional circuits must be mounted at a location which is separate from the brakes, because they do not have sufficient heat resistance to be mounted within wheel speed sensors.  
           [0009]    It would therefore be desirable to provide a wheel speed sensor which converts an analog wheel speed signal into a digital wheel speed signal within the wheel speed sensor. It would also be desirable to provide a wheel speed sensor which transmits a digital wheel speed signal to the CPU, provides a reliable signal at vehicle speeds less than about four (4) mph, provides a reliable signal at high temperatures, and reduces manufacturing costs by utilizing less complicated and less expensive components.  
         SUMMARY OF THE INVENTION  
         [0010]    An anti-lock braking system includes a speed sensor and a CPU. The speed sensor includes a motion sensor, an integral processing unit (“IPU”), and a housing which surrounds the motion sensor and the IPU. The motion sensor produces an analog signal as a function of a movement of an object, and the IPU converts the analog signal to a digital signal within the speed sensor. The IPU of the speed sensor transmits the digital signal to the CPU as a function of the analog signal received from the motion sensor. The CPU achieves an anti-lock braking action of the object as a function of the digital signal received from the IPU of the speed sensor.  
           [0011]    In accordance with one aspect of the invention, the anti-lock braking system includes: a CPU; and a speed sensor which is composed of a motion sensor, an IPU, and a housing which surrounds the motion sensor and the IPU. The motion sensor produces an analog signal as a function of a movement of an object. The IPU electrically communicates with the CPU and the motion sensor The IPU transmits a digital signal to the CPU as a function of the analog signal received from the motion sensor. The CPU achieves an anti-lock braking action of the object as a function of the digital signal received from the IPU. The IPU includes: first and second inputs electrically communicating with the motion sensor; first and second outputs electrically communicating with the CPU; and a plurality of primary switching means set as a function of the analog signal received by the electrical inputs from the motion sensor. Current passes through the plurality of the primary switching means if the analog signal inputs receive from the motion sensor is one of less than and equal to a predetermined amplitude, thereby creating a logical high at the outputs.  
           [0012]    In accordance with a further aspect of the invention, the IPU includes a charge control device. Current passes through the additional switching means as a function of the analog signal received from the motion sensor A power capacitor is one of charged and discharged as a function of whether current is passing through the additional switching means. The power capacitor supplies power to the IPU when discharging.  
           [0013]    In accordance with a still further aspect of the invention, the IPU includes a second capacitor and a diode. The second capacitor and the diode are electrically connected in parallel between the inputs and act to clip negative signal inputs from the inputs.  
           [0014]    In accordance with another aspect of the invention, the IPU includes a resistive means. One of the primary switching means and the resistive means is electrically connected in series, and then the series connected components are connected in parallel with the inputs to provide compensation for temperature changes.  
           [0015]    In accordance with another aspect of the invention, the primary switching means, the additional switching means, the power capacitor, the second capacitor, the diode, and the resistive means are included on a single circuit chip.  
           [0016]    In accordance with still another aspect of the invention, the object is a wheel.  
           [0017]    In accordance with another aspect of the invention, the motion sensor is a magnetic pick-up coil.  
           [0018]    In accordance with another aspect of the invention, a plurality of resistive means provide a testing mechanism for at least one of the IPU and the motion sensor.  
           [0019]    In accordance with another aspect of the invention, a plurality of additional motion sensors and additional IPU&#39;s transmit signals to the CPU corresponding to movements of a plurality of additional respective objects. The CPU transmits independent braking signals to activate respective braking devices corresponding to the objects for achieving respective anti-lock braking actions.  
           [0020]    In accordance with another aspect of the invention the IPU is composed of components which function in a high temperature environment which is greater than or equal to 180 degrees centigrade.  
           [0021]    In accordance with another aspect of the invention the other ones of the primary switching means are electrically connected in parallel between the outputs.  
           [0022]    In accordance with a further aspect of the invention a resistor is electrically connected between the outputs. The primary switching means are electrically connected in parallel between the outputs, and one of the primary switching means, a diode, and another on of the primary switching means are electrically connected in series.  
           [0023]    One advantage of the present invention is that it provides a wheel speed sensor which includes a motion sensor and an IPU that converts an analog wheel speed signal into a digital wheel speed signal, and signal conversion occurs within the wheel speed sensor. Another advantage of the present invention is that the wheel speed sensor transmits a digital wheel speed signal to the CPU, provides a reliable signal at vehicle speeds less than about four (4) mph, provides a reliable signal at high temperatures, and reduces manufacturing costs by utilizing less complicated and less expensive components.  
           [0024]    Still further advantages of the present invention will become apparent to those of ordinary skill in the art upon reading and understanding the following detailed description of the preferred embodiments. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0025]    The invention may take form in various components and arrangements of components, and in various steps and arrangements of steps. The drawings are only for purposes of illustrating a preferred embodiment and are not to be construed as limiting the invention.  
         [0026]    The invention will be described in greater detail with reference to the following detailed description of the preferred embodiments of the invention along with the accompanying drawings, wherein:  
         [0027]    [0027]FIG. 1 illustrates a bottom view of a vehicle including an anti-lock braking system according to the present invention,  
         [0028]    [0028]FIG. 2 illustrates an electrical schematic of a circuit which includes the CPU and the IPU;  
         [0029]    [0029]FIG. 3 illustrates a physical layout of the IPU of the present invention illustrated in FIG. 2;  
         [0030]    [0030]FIG. 4 illustrates a second embodiment of the present invention;  
         [0031]    [0031]FIG. 5 illustrates a wheel speed sensor which includes a motion sensor and an IPU which converts an analog wheel speed signal into a digital wheel speed signal; and  
         [0032]    [0032]FIG. 6 is a cross-sectional view of the wheel speed sensor of FIG. 5. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0033]    [0033]FIG. 1 illustrates a bottom view of a vehicle  10  including four (4) wheels  12   a ,  12   b ,  12   c , and  12   d  ( 12 ) and an EBS or ABS. The system preferably includes a CPU  14  and wheel speed sensors  16   a ,  16   b ,  16   c , and  16   d  ( 16 ) The number of wheel speed sensors  16  is preferably equal to the number of wheels (i.e., four(4) in the illustrated embodiment). The wheel speed sensors  16   a ,  16   b ,  16   c ,  16   d  receive analog signals and output digital signals to the CPU  14  via respective electrically conductive connectors  24   a ,  24   b ,  24   c , and  24   d  ( 24 ). The CPU  14  controls respective braking devices  26   a ,  26   b ,  26   c , and  26   d  ( 26 ) via electrically conductive connectors  28   a ,  28   b ,  28   c , and  28   d  ( 28 ) to achieve an anti-lock braking action.  
         [0034]    [0034]FIGS. 5 and 6 illustrate a wheel speed sensor  16  in accordance with a preferred embodiment of the invention. The wheel speed sensor  16  includes an integral processing unit (“IPU”)  18 , a motion sensor  20 , a conductive connector  24 , a bobbin overmold  102 , an encapsulating material  104 , a housing overmold  106 , and a housing  108 . The a bobbin overmold  102  supports the IPU  18 . The working components, the IPU  18  and the motion sensor  20 , are protected by the encapsulating material  104 , the housing overmold  106 , and the housing  108 . The motion sensor  20  is preferably a magnetic pickup coil such as a variable reluctance coil which further includes a magnet  19  and a bobbin  21 . The motion sensor  20  is utilized for monitoring a rotational speed of each of the respective wheels  12 .  
         [0035]    [0035]FIG. 2 illustrates an electrical schematic of a circuit  50  including the CPU  14  and the IPU  18   a . Although the circuit  50  shown in FIG. 2 includes IPU  18   a , it is to be understood that each of the other IPUs  18   b ,  18   c ,  18   d  includes a similar circuit. FIG. 3 illustrates a physical layout of the IPU  18   a  of the present invention illustrated in FIG. 2.  
         [0036]    With reference to FIGS. 2 and 3, an output of the IPU  18   a  is electrically connected to the CPU via first and second output terminals  52   a   1  and  52   a   2 , which are electrically connected to the conductive connectors  24   a   1  and  24   a   2 . First and second input terminals  54   a   1  and  54   a   2  of the circuit  50  are electrically connected to a respective one of the motion sensors  20 . The second input terminal  54   a   2  is electrically connected to a ground  56 . When a respective wheel  12  moves, an analog electrical pulse is created in its respective motion sensor  20 . Each time Ferro-magnetic teeth (not shown) on the respective wheel  12  of the vehicle pass the motion sensor  20 , the analog electrical pulse is sent to the input terminals  54   a   1  and  54   a   2 . The rate at which the Ferro-magnetic teeth pass the motion sensor  20  is proportional to the rotational speed of the wheel. A voltage and amplitude of the analog electrical pulse on the input terminals  54   a   1  and  54   a   2  corresponds to the rate at which the Ferro-magnetic teeth pass the motion sensor  20 .  
         [0037]    The operation of the circuit  50  shown on FIG. 2 is described as follows. When an analog signal larger than a predetermined amplitude is created on the input terminals  54   a   1  and  54   a   2 , first and second primary transistors Q 1 , Q 2  are switched to an “on” state. Consequently, current from a power source  60  in the CPU  14  flows through first and second resistors R 1 , R 2  via a resistor R P  in the CPU  14 . As will be described in more detail below, the current flows through the circuit  50  via a charging transistor Q C  and a charging resistor R C .  
         [0038]    Once the second transistor Q 2  turns on, current flows through third and fourth resistors R 3 , R 4 . As a result, a base input  64  to a third primary transistor Q 3  is set to a logical low and the third transistor Q 3  turns on. When the third transistor Q 3  turns on, current flows through fifth and sixth resistors R 5 , R 6 , respectively, thereby providing a logical high signal to a base input  66  of a fourth primary transistor Q 4 . Therefore, the fourth transistor Q 4  turns on. When the fourth transistor Q 4  turns on, current flows through a seventh resistor R 7  and a logical low appears at a point  70  of the circuit  50 . Therefore, a logical low signal is output to the CPU  14  when the Ferro-magnetic teeth on the wheel of the vehicle pass by the motion sensor  20 .  
         [0039]    When a signal less than or equal to the predetermined amplitude is created on the input terminals  54   a   1  and  54   a   2 , the first and second transistors Q 1 , Q 2  are switched to an “off” state. Consequently, no current flows through the first and second resistors R 1 , R 2 . When the second transistor Q 2  turns off, the base input  64  to the third transistor Q 3  is electrically connected to the power source  60  via the third and fourth resistors R 3 , R 4 , the charging resistor R C , and the charging transistor Q C . Therefore, because the base input to the third transistor Q 3  is a logical high, the third transistor Q 3  turns off. When the third transistor Q 3  turns off, substantially no current flows through the fifth and sixth resistors R 5 , R 6 , and, consequently, the base input  66  to the fourth transistor Q 4  turns low. Therefore, the fourth transistor Q 4  turns off. When the fourth transistor Q 4  turns off, a logical high appears at the point  70  of the circuit  50 . Therefore, a logical high signal is output to the CPU  14  when the Ferro-magnetic teeth on the wheel of the vehicle are not passing the motion sensor  20 .  
         [0040]    A first capacitor C 1  acts as a power capacitor for the circuit  50 . The first capacitor C 1  is charged as a function of the state of the charging transistor Q C , which functions as a charge control device, and the electrical power at the point  70  in the circuit  50 . More specifically, when the charging transistor Q C  is on and a logical high signal is present at the point  70 , the first capacitor C 1  is charged, via the charging transistor Q C , by the electrical power at the point  70 . On the other hand, when the charging transistor Q C  is off and a logical low signal is present at the point  70 , the first capacitor C 1  supplies power to the circuit  50 . The power supplied to the circuit  50  via the first capacitor C 1  keeps power supplied to the circuit  50  during a time while very little power is present at the point  70 . Any significant discharge of the first capacitor C 1  is minimized because the charging transistor Q C  is off.  
         [0041]    As discussed above, when the point  70  is a logical high, the Ferro-magnetic teeth on the wheel are not passing the motion sensor  20  and, therefore, a signal less than or equal to the predetermined amplitude is present on the input terminals  54   a   1  and  54   a   2 . Because a base input  72  to the charging transistor Q C  is electrically connected to the input terminals  54   a   1  and  54   a   2 , a logical low signal is supplied to the base  72  of the charging transistor Q C . Consequently, the charging transistor Q C  turns on, thereby allowing the power at the point  70  of the circuit  50  to charge the first capacitor C 1 .  
         [0042]    When the point  70  is a logical low, the Ferro-magnetic teeth on the wheel are passing the motion sensor  20  and, therefore, a signal greater than the predetermined amplitude is present on the input terminals  54   a   1  and  54   a   2 . Consequently, a logical high signal is supplied to the base  72  of the charging transistor Q C , causing the charging transistor Q C  to turn off. As pointed out above, the fourth transistor Q 4  is on at a time when a logical low signal is present at the point  70 . Therefore, because the charging transistor Q C  is off, the first capacitor C 1  is substantially prevented from being discharged via the fourth transistor Q 4 .  
         [0043]    A second capacitor C 2  and a diode D 1  are electrically connected in parallel between the first and second input terminals  54   a   1  and  54   a   2 , respectively. The second capacitor C 2  and the diode D 1  act to clip any negative signal input from the input terminals  54   a   1  and  54   a   2 .  
         [0044]    The first transistor Q 1  and first resistor R 1  act to compensate for temperature changes and provide better tracking for the circuit  50 .  
         [0045]    The seventh resistor R 7  and the resistor R P , provide a mechanism for testing the circuit  50 . More specifically, the resistors R 7 , R P  allow the CPU  14  to sense when a fault condition is present in any one of the wheel speed sensors  16  (e.g., if a motion sensor  20  is not electrically connected to the CPU  14  or the IPU  18 ), if a short-circuit exists to the ground  56 , or if a short-circuit exists to the power source  60 , etc.  
         [0046]    In a normal state of operation (e.g, when the power source is +5 Volts), the CPU  14  is electrically connected to the point  70 . If no open-circuit is present, the voltage that exists at the point  70  is about: 
           V   1 −( l*R   p ), 
         [0047]    where V 1  represents the voltage (e.g., about +5 Volts) of the power source  60  and I represents the current through the resistor R P . While the voltage at the point  70  is still a logical high, the voltage is measurably below V 1 . If, on the other hand, an open-circuit exists, the voltage that exists at the point  70  is about V 1  (e g, +5 Volts) and will not be measurably below V 1 .  
         [0048]    Similarly, when the IPU  18   a  is outputting a logical low signal to the point  70 , the fourth transistor Q 4  is turned on. Although the point  70  is electrically connected to the ground if the fourth transistor Q 4  is on, the seventh resistor R 7  and the saturation voltage of the fourth transistor Q 4  cause the voltage at the point  70  to be above the reference voltage of the ground (e.g., 0 Volts). For example, the seventh resistor R 7  and the saturation voltage of the fourth transistor Q 4  cause the voltage at the point  70  to be about +0.5 Volts when the fourth transistor Q 4  is on. If the voltage at the point  70  is considerably less than about +0.5 Volts (e.g., &lt;˜0.25 Volts), it may be concluded that there is a problem with the sensor and/or sensor connections (e.g., a short-circuit to the ground  56  exists).  
         [0049]    The CPU  14  receives the signals from the IPU  18   a  and determines, according to conventional methods, whether the corresponding wheel is slipping. If the wheel is slipping, the CPU  14  applies the braking device  26   a  to produce an anti-lock braking effect. In this manner, the CPU  14  dynamically controls the braking device  26   a  as a function of the logical signals output from the IPU  18   a  Although the preferred embodiment merely illustrates transmitting anti-locking braking signals from the CPU  14  to one of the braking devices  26   a , it is to be understood that the CPU  14  controls each of the braking devices  26  independently of each other.  
         [0050]    The digital wheel speed signals transmitted between the wheel speed sensor  16  and the CPU  14  are conditioned at the source (i.e., the wheel speed sensor  16  and, therefore, are relatively less susceptible to electromagnetic noise interference than analog signals. Therefore, the anti-lock braking system of the present invention may operate even when the vehicle is traveling at lower speeds (e.g., less than about four (4) mph)  
         [0051]    [0051]FIG. 3 is a physical layout of the IPU  18   a  in accordance with a preferred embodiment of the invention. As highlighted in FIG. 3, all five (5) of the transistors Q 1 , Q 2 , Q 3 , Q 4 , Q C  illustrated in FIG. 2 are preferably included on a single integrated circuit chip  80   a . In the preferred embodiment, the integrated circuit chip  80  is a CA3096AE. However, other integrated circuit chips are also contemplated. The IPU  18   a  is preferably composed of high temperature components which have an operating temperature rating of 180 degrees centigrade or more.  
         [0052]    [0052]FIG. 4 illustrates a second embodiment of the present invention. For ease of understanding this embodiment of the present invention, like components are designated by like numerals with a primed (′) suffix and new components are designated by new numerals.  
         [0053]    In the embodiment shown in FIG. 4, the first capacitor C 1 ′ is charged by the electrical power at the point  70 ′ via a diode  100  which acts as the charge control device. More specifically, when a logical high signal is present at the point  70 ′, the first capacitor C 1 ′ is charged, via the diode  100 , by the electrical power at the point  70 ′. On the other hand, when a logical low signal is present at the point  70 ′, the first capacitor C 1 ′ supplies power to the circuit  50 ′. The power discharged by the first capacitor C 1 ′ keeps power supplied to the circuit  50 ′ during a time while very little power is present at the point  70 ′ of the circuit. Any significant discharge of the first capacitor C 1 ′ is minimized by the diode  100 . Resistors R 8  and R 7 ′ control the amount of current flowing through the third transistor Q 3 ′. This allows the active sensing embodied to be accomplished via only two (2) wires (i.e., a ground wire  24   a   2 ′ and  52   a   2 ′ and a positive supply wire  24   a   1 ′ and  52   a   1 ′) with the signal from the IPU  18   a ′ back to the CPU  14 ′ modulated on the positive supply wire  24   a   1 ′ and  52   a   1 ′.  
         [0054]    It is contemplated in alternate embodiments to reduce the value of the first capacitor C 1 , which would give more options on the choice of other components for higher-temperature applications.  
         [0055]    It is also contemplated in alternate embodiments to include an additional resistor (e.g., about 100 kS) electrically connected between the first and second output terminals  52   a   1 ′ and  52   a   2 ′. Such an additional resistor will help maintain a higher bias current through the resistor R p ′ to achieve less than about 5 Volts between the electrically conductive connectors  24   a   1 ′ and  24   a   2 ′.  
         [0056]    An advantage of the present invention is that the circuit structure of the IPU is simplified compared with conventional ABS wheel speed data circuits that process analog signals through amplifiers and comparator circuits prior to generate digital signals. In contrast to conventional circuits, the simplified circuit of the present invention allows the use of circuit components that have sufficient heat resistance to be physically integrate within the wheel speed sensor, which is subject to temperatures in excess of 180° C.  
         [0057]    The invention has been described with reference to the preferred embodiment. Obviously, modifications and alterations will occur to others upon reading and understanding the preceding detailed description. It is intended that the invention be construed as including all such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.