Abstract:
POTS splitter design which incorporates a low-pass filter which improves the voice-band return loss characteristics without sacrificing performance with regard to the voice-band insertion loss or the ADSL-band attenuation distortion. This is accomplished by replacing the inductor of the conventional POTS splitter low-pass circuit with a parallel-connected inductor and resistor.

Description:
BACKGROUND 
   The present invention generally relates to improved telecommunications systems and in particular to an improved digital/POTS telecommunications system. Still more particularly, the present invention relates to an improved digital/POTS splitter design. 
   The basic functions and requirements for POTS Splitter are well defined in TIE1.4/98-007R5, Annex E, which is hereby incorporated by reference. The POTS splitter is used to split “Plain Old Telephone System” (POTS) voiceband signals from Asymmetric Digital Subscriber Line (ADSL) signals traveling over the same telephone line. 
   In conventional systems, the POTS splitter is designed as a LC low-pass filter. With regard to ADSL signals, a low-pass filter provides protection from the high-frequency transients and impedance effects that occur during POTS operation, e.g., ringing transients, ring trip transients, and off-hook transients and impedance changes. With regard to POTS voice band service, the low-pass filter provides protection from ADSL signals which may impact through non-linear or other effects remote devices, e.g., handset, fax, voice band modem, etc., and central office operation. 
   TIE1.4/98-007R5, Annex E specifies acceptable ranges for insertion loss in the voice band, return loss in the voice band, and attenuation distortion in the ADSL band, among other requirements. These requirements make the common POTS splitter design, which incorporates a differential pair of conventional LC low-pass filter circuits, less than ideal for this purpose. Because the inductor used in a conventional LC low-pass filter circuit is frequency independent in the voice range, it is very hard to meet each of the requirements above at same time. It would therefore be desirable to provide an improved low-pass filter circuit for a POTS splitter which optimizes the TIE1.4 requirements. 
   SUMMARY OF THE INVENTION 
   The POTS splitter design of the preferred embodiment incorporates a low-pass filter which improves the voice-band loss characteristics without sacrificing performance with regard to the voice-band insertion loss or the ADSL-band attenuation distortion. This is accomplished by replacing the inductor of the conventional POTS splitter low-pass circuit with a parallel-connected inductor and resistor. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  depicts a basic RL inductor circuit in accordance with a preferred embodiment of the present invention; 
       FIG. 2  depicts a differential-mode RL inductor pair in accordance with a preferred embodiment of the present invention; 
       FIG. 3  depicts a central-office POTS splitter employing a low-pass filter circuit in accordance with a preferred embodiment of the present invention; and 
       FIG. 4  is depicts a remote-end POTS splitter employing a low-pass filter circuit in accordance with a preferred embodiment of the present invention. 
   

   DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
   With reference now to the figures, and in particular with reference to  FIG. 1 , there is provided an improved low-pass filter circuit for a POTS splitter, which uses a parallel-connected resistor R and inductor L. 
   This invention is used to get lower inductive impedance at high frequency (3 KHz–4 KHz), so a better return loss is obtained without interfering with other performance characteristics. 
     FIG. 1  shows the basic structure of this invention. The total impedance of this device is (Equation 1): 
         z     (   w   )       =       jwRL     R   +   jwL       =             jwR   2     ⁢   L     +       w   2     ⁢     L   2     ⁢   R           R   2     +     (     wl   2     )         =       R   ⁢           ⁢     1     1   +       (   wl   )     2           +     jwL   ⁢           ⁢     1     1   +       (     wL   R     )     2                       
The imaginary part if the impedance is (Equation 2): 
         Im   ⁡     (     z     (   m   )       )       =     wl   ⁢     1     1   +       (     wL   R     )     2                 
   As the frequency goes high, 
         (     wL   R     )     2       
 
goes high, and the inductance of this device, 
         L   ⁢     1     1   +       (     wl   R     )     2           ,       
 
goes low due to the addition of the resistor.
 
     FIG. 2  shows a POTS splitter device, in accordance with the preferred embodiment, which incorporates a low-pass filter with the improved inductor circuit described above. In the POTS splitter, transformers are used as differential mode inductors. In  FIG. 2 , the transformer TX 1  is shown with each inductive coil connected in parallel with a respective resistor R 1  and R 2 . The impedance of each side of transformer TX 1  is described by Equations 1 and 2, above; the transformation from  FIG. 1  to  FIG. 2  is:
   R 1= R 2= R/ 2   L 1= L 2= L/ 4 
where L 1  and L 2  are the inductance of each transformer winding. Of course, this is merely exemplary; according to different requirements for the central office and remote end POTS splitters, the value of R and L may change in different designs.
 
     FIGS. 3 and 4 , respectively, show POTS splitter designs, using frequency-sensitive inductance devices in accordance with the preferred embodiment, of a central office POTS splitter and a remote end POTS splitter. In these figures, the frequency sensitive device consists of L 3 , R 2 , and R 3 . The low-pass filter is therefore comprised of L 3 , R 2 , R 3 , and C 4  in  FIG. 3 , and L 3 , R 2 , R 3 , and C 3  in  FIG. 4 . Other parts of the circuit will be understood by those of skill in the art as a conventional POTS splitter circuit. 
   For purposes of this discussion, the conventional circuit comprised by L 1  and C 2  in  FIG. 3 , and by L 1  and C 1  in  FIG. 4 , will be refereed to as “stage 1” of each of these figures. Similarly, the conventional circuit comprised by L 2 , C 5 , C 6 , and C 3  in  FIG. 3 , and by L 2 , C 5 , C 6 , and C 2  in  FIG. 4 , will be referred to as “stage 2” of each of these figures. Finally, “stage 3” will reference the frequency-sensitive circuit of the preferred embodiment, which comprises L 3 , R 2 , R 3 , and C 4  in  FIG. 3 , and by L 3 , R 2 , R 3 , and C 3  in  FIG. 4 . 
   It will then be clear that, in  FIGS. 3 and 4 , nodes A and B form the inputs to stage  1 , and nodes C and D are both the outputs of stage  1  and the inputs of stage  2 . Nodes E and F are both the outputs of stage  2  and the inputs of stage  3 , and nodes G and H are the outputs of stage  3 . 
   In normal operation, a combined voice-band and ADSL signal is received by the splitter circuits at inputs L 1 T and L 1 R of  FIG. 3 , and inputs LT and LR of  FIG. 4 . The ADSL signal is output at outputs D 1 T and D 1 R of  FIG. 3 , and outputs DT and DR of  FIG. 4 . The ADSL signal is filtered from the voiceband signal, and the voiceband signal is output at outputs V 1 T and V 1 R of  FIG. 3 , and outputs VT and VR of  FIG. 4 . 
   According to the preferred embodiment, the values of the components of  FIG. 3  are as follows: 
   
     
       
             
             
             
           
         
             
                 
                 
             
           
           
             
                 
               L1 
               20 mH (±8%) 
             
             
                 
               L2, L3 
               12 mH (±8%) 
             
             
                 
               C11, C12 
               120 nF 400 V (±10%) 
             
             
                 
               C2 
               10 nF 400 V (±5%) 
             
             
                 
               C3 
               10 nF 400 V (±5%) 
             
             
                 
               C4 
               47 nF 400 V (±5%) 
             
             
                 
               C5, C6 
               4.7 nF 400 V (±5%) 
             
             
                 
               R2, R3 
               200 
             
             
                 
                 
             
           
        
       
     
   
   Also according to the preferred embodiment, the values of the components of  FIG. 4  are as follows: 
   
     
       
             
             
             
           
         
             
                 
                 
             
           
           
             
                 
               L1 
               20 mH (±8%) 
             
             
                 
               L2, L3 
               12 mH (±8%) 
             
             
                 
               C1 
               33 nF 400 V (±5%) 
             
             
                 
               C2 
               22 nF 400 V (±5%) 
             
             
                 
               C3 
               47 nF 400 V (±5%) 
             
             
                 
               C4 
               0.47 nF 400 V (±5%) 
             
             
                 
               C5, C6 
               4.7 nF 400 V (±5%) 
             
             
                 
               R1 
               33.1K 1% .25 W 
             
             
                 
               R2, R3 
               100 10% .25 W 
             
             
                 
                 
             
           
        
       
     
   
   Of course, while the component values of the preferred embodiment are shown above, those of skill in the art will recognize that these values can be varied according to specific system requirements. In particular, in  FIG. 3  and  FIG. 4 , the preferred frequency sensitive device that consists of L 3 , R 2 , and R 3 , from stage  3 , can be used to replace other conventional transformer/filter circuits, e.g., the C 5 , C 6 , L 2  circuit of stage  2 . This means that a frequency-sensitive circuit as in stage  3  may also appear as the first or second stage. 
   Further, the position of the frequency-sensitive inductive device within the POTS splitter will vary the overall performance characteristics of the splitter. For example, in  FIG. 4  above, the stage  3  circuit can be switched with the stage  2  circuit, so that their order is reversed, according to the requirements of the system in which the system is to be installed. 
   The preferred embodiment, by incorporating this frequency-sensitive inductive device, will simultaneously minimize the magnitude of ripple in the high frequency band (3 K–4 KHz) and maximize the return loss at high frequency band (3 K–4 KHz), without negatively affecting, to any substantial degree, the attenuation distortion of the ADSL band. 
   While the invention has been particularly shown and described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.