Abstract:
A printed circuit board includes an insulating layer, a copper layer formed on the insulating layer and a reinforcing layer formed on the copper layer at opposite sides of the given portion. The copper layer includes a plurality of electrical traces at a given portion thereof. A thickness of the reinforcing layer increases in a direction away from the given portion. A method for manufacturing the printed circuit board is also provided in this disclosure.

Description:
BACKGROUND 
       [0001]    1. Technical Field 
         [0002]    The present disclosure generally relates to printed circuit boards (PCBs), particularly relates to a PCB having a reinforcing layer formed on a peripheral portion thereof and a method for manufacturing the same. 
         [0003]    2. Discussion of Related Art 
         [0004]    PCBs are important components in various electronic devices. To meet miniaturization requirements of electronic devices, PCBs become thinner and thinner. However, warping easily occurs in thin PCBs due to internal stress present therein, particularly in peripheral portions of the PCBs, which finally may cause registration errors during a manufacturing process of the PCBs, or an assembling process of PCB with other electronic elements. Generally, the degree of warping increases with the distance to the center of the PCB. 
         [0005]    What is needed, therefore, is a PCB and a method for manufacturing the same to overcome the above-described problems. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0006]    Many aspects of the embodiments can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of embodiments. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the different views. 
           [0007]      FIG. 1  is an isometric view of a PCB according to a first embodiment. 
           [0008]      FIG. 2  is a cross-section view of the PCB along line II-II. 
           [0009]      FIG. 3  is an isometric view of a CCL including an insulating layer and a copper layer according to a first embodiment. 
           [0010]      FIG. 4  is similar to  FIG. 3 , but also including a plurality of electrical traces and connecting pads. 
           [0011]      FIG. 5  is similar to  FIG. 4 , but showing a step of applying a photoresist layer to cover the copper layer. 
           [0012]      FIG. 6  is similar to  FIG. 5 , but showing a step of exposing the photoresist layer. 
           [0013]      FIG. 7  is similar to  FIG. 6 , but showing a portion of the copper layer exposed. 
           [0014]      FIG. 8  is similar to  FIG. 7 , but showing a step of a first layer formed on the copper layer. 
           [0015]      FIG. 9  is similar to  FIG. 8 , but showing a PCB having the first layer. 
           [0016]      FIG. 10  is an isometric view of a PCB according to a second embodiment. 
           [0017]      FIG. 11  is an isometric view of a PCB according to a third embodiment. 
       
    
    
     DETAILED DESCRIPTION OF EMBODIMENTS 
       [0018]    Referring to  FIGS. 1 and 2 , a square shaped PCB  10  provided in a first embodiment includes an insulating layer  12 , a copper layer  11  and a reinforcing layer  102  disposed on the cooper layer  11 . In the illustrated embodiment, the insulating layer  12  and the copper layer  11  cooperate to form a copper clad laminate (CCL). The reinforcing layer  102  is configured for counteracting and compensating internal stress present in the CCL which may otherwise cause warping deformation of the CCL. Due to the reinforcing layer  102 , flatness of the CCL could readily be maintained. 
         [0019]    The insulating layer  12  can be comprised of polyimide, polyethylene terephtalate, polytetrafluorethylene, polyaminde, polymethylmethacrylate, polycarbonate, polyamide polyethylene-terephthalate copolymer, glass fiber/resin compound, or other material. In the illustrated embodiment, the insulating layer  12  is made of polyimide, and has a first side surface  104  and an opposite second side surface  105 . The PCB  10  includes a central portion  101  and a peripheral portion  102  surrounding the central portion  101 . The central portion  101  includes a plurality of electrical traces  1111  and connecting pads  1112  electrically connected thereto. The copper layer  11  forms on the insulating layer  12  and surrounding the central portion  101 . The reinforcing layer  106  is disposed on the copper layer  11 , including a first layer  1122 , a second layer  1123 , and a third layer  1124 , which are stacked in the described order with side surface thereof aligned with each other. Thicknesses of the three layers  1122 ,  1123 , and  1124  are substantially the same. Widths of the three layers  1122 ,  1123 ,  1124  in a direction along line II-II gradually decrease in the described order. In other words, a thickness of the reinforcing layer  106  increases in a direction from the center of the PCB  10  to a periphery thereof. It is understood that the greater the thickness of the reinforcing layer  106 , the more difficult for the PCB  10  to warp. Thus, degree of warping of the PCB is decreased. Besides, a thicker reinforcing layer  106  will provide greater weight to act against warping of the PCB  10 . 
         [0020]    Alternatively, the number of layers of the reinforcing layer can be other than three, but not less than two. The thickness of each of the first, second, third layers  1122 ,  1123 , and  1124  is different from the others. 
         [0021]    A method for fabricating the PCB  10  is described in detail as follows. 
         [0022]    Referring to  FIG. 3 , a copper clad laminate (CCL)  100 , including an insulating layer  12  and a copper layer  107  thereon is provided. The copper layer  107  is configured for forming electrical traces and connecting pads. The copper layer  107  has a top surface  103 , and includes a central portion  101  and a peripheral portion  102 . In addition, the CCL  100  can also include two copper layers  107  respectively disposed on two opposite surfaces of the insulating layer  12 . 
         [0023]    Referring to  FIGS. 3 and 4 , a plurality of electrical traces  1111  and connecting pads  1112  are formed in the central portion  101  of the copper layer  107  using a typical method including any one or more of exposing, developing and etching processes, while the remaining portion of the copper layer  107  is defined as the copper layer  11  (shown in  FIG.1 ). 
         [0024]    Referring to  FIGS. 4 and 5 , a photoresist layer  13  is applied onto the top surface  103  of the CCL  100  to cover the electrical traces  1111 , the connecting pads  1112 , and the copper layer  11 . The photoresist layer  13  is comprised of positive photoresist capable of decomposing under light irradiation. In addition, the photoresist layer  13  can also be negative photoresist, which is capable of being polymerized under light irradiation. 
         [0025]    Referring to  FIGS. 2 and 6 , the photoresist layer  13  is exposed using a photomask  14  defining two through openings  140 . Thereafter, referring to  FIGS. 6  and  7 , a portion (not shown) of the photoresist layer  13  decomposes, thereby exposing a corresponding portion  11   a  of the copper layer  11 , and forming a remaining portion  13   a  on the copper layer  11 . 
         [0026]    Referring to  FIGS. 7 and 8 , a first layer  1122  is formed on the portion  11   a  using a typical electro-less plating process or an electro-plating process. Referring to  FIGS. 8 and 9 , the remaining portion  13   a  of the photoresist layer  13  is removed thereby exposing the electrical traces  1111 . The second and third layers  1123 ,  1124  can be formed using a method similar to that of the first layer  1122 . In addition, the reinforcing layer  106  and the peripheral portion  102  of the CCL  10  can be removed. 
         [0027]    Referring to  FIG. 10 , a second PCB  20  is provided in a second embodiment, differing from the PCB  10  in that the unwanted peripheral portion  212  is single layer structured and the greatest thickness thereof is substantially equal to that of the electrical traces  211 . The reinforcing layer  212  is obtained using a method comprising forming a metal layer (not shown) on the peripheral portion using an electro-less plating process or an electro-plating process and a series of known developing and etching processes after forming the electrical traces  211 . 
         [0028]    Referring to  FIG. 11 , a third PCB  30  is provided in a third embodiment, differing from the PCB  10  in that the thickness of the reinforcing layer  312  linearly increases with increasing distance to the center of the PCB  30 . In this embodiment the cross-section of the reinforcing layer  312  is right-triangle shaped. The reinforcing layer  312  is obtained using a method comprising forming a metal layer (not shown) on the peripheral portion using an electro-less plating process or an electro-plating process and a surface grinding process or other method after forming the electrical traces  311 . Alternatively, the reinforcing layer  312  can be some other shape in cross-section to increase or decrease the weight thereof as needed. 
         [0029]    Furthermore, it is understood that when the PCB  30  is a rectangle shaped, the PCB  30  more easily warps in a direction parallel to a lengthwise direction thereof. Accordingly, a thickness of the reinforcing layer  312  should gradually increase in a direction away from the central portion and the direction should be substantially parallel with the lengthwise direction of the PCB  30 . 
         [0030]    While certain embodiments have been described and exemplified above, various other embodiments will be apparent to those skilled in the art from the foregoing disclosure. The present disclosure is not limited to the particular embodiments described and exemplified but is capable of considerable variation and modification without departure from the scope of the appended claims.