Abstract:
A class AB folded-cascode amplifier having improved gain-bandwidth product, comprises a differential input circuit including a differential transistor pair coupled to a source of tail current and responsive to a differential input signal for conducting a first current, a cascode circuit coupled to the differential input circuit for supplying a second current thereto, and a class AB output stage. A compensation circuit is configured for feeding back mutually complementary compensation signals from an output node to the differential input circuit.

Description:
TECHNICAL FIELD 
   The disclosed subject matter is directed generally to the field of amplifiers, and more particularly to class AB folded-cascode amplifier topologies. 
   BACKGROUND 
   The folded-cascode amplifier is a widely used topology in analog circuits. Its advantage over other amplifier types is in better gain-bandwidth performance as a result of reduced Miller capacitance and in increased input common-mode range that normally includes one of the supply rails. A class AB type amplifier, used in moderately high power applications, is characterized in that each half conducts through more than a half cycle but less than a full cycle, and normally is implemented by a push-pull output transistor pair. 
   Shown in  FIG. 1  is a circuit diagram of a class AB folded-cascode amplifier circuit  10  of a type known in the prior art, which comprises an input differential pair circuit  12 , a cascode circuit  14  that includes cascode transistors M 13 , M 14  and a load circuit comprising current mirror  16 , and a class AB output stage  18  powered from supply lines V+, V−. Input circuit  12  is a differential transistor amplifier in the form of a differential input transistor pair M 11 , M 12  having their gates receiving the input signal at v INP  and v INM  to be amplified, their drains connected to current sources I 2 , I 3  and their sources connected commonly to a source of tail current I 1 . Cascode transistors M 13 , M 14 , connected to the input transistor pair M 11 , M 12  and current sources I 2 , I 3 , and which function as current buffers, are gate biased into saturation by a gate voltage V B1  produced by a source of bias voltage, not shown. 
   Coupled to cascode transistors M 13 , M 14  and comprising the load  16  of the input differential pair circuit  12 , is a wide swing cascode current mirror  16  that consists of transistors M 15 -M 18 , configured as shown with an interconnection between the gate of M 15  and drain of M 17 . The current mirror  16  alternatively could be configured as other than as a wide-swing cascode type shown by interconnecting the gate and drain only of M 15 . 
   Class AB output stage  18  comprises complementary driver transistors M 2 P, M 2 N, serially connected as shown, with common node at v OUT  driving load R L , C L . The driver transistors M 2 P, M 2 N are controlled by a conventional class AB control circuit  19 . A Miller compensation network comprising capacitors C C1 , C C2  and R N1 , R N2  between the drains and gates of M 2 P, M 2 N, is implemented in conventional form in the class AB topology described. 
   In the simple Miller compensation arrangement, the amplifier is stabilized through RC compensation networks which split the first and second poles of the uncompensated amplifier further apart compared to nominal. However, a problem that arises with simple Miller compensation is in the feedforward path from node A and node B to the output node. Because in this configuration the noninverting signal can pass to the output node, degradation in the frequency response of the amplifier occurs. And although provision of nulling resistors R N1  and R N2  in the feedforward paths reduces the magnitude of the feedforward signal, the problem is only mitigated to a limited extent. As the size of the nulling resistors is increased, the introduced LHP zero moves closer to the crossover frequency, degrading gain margin. 
   Cascode compensation to improve the gain-bandwidth product of amplifiers by blocking the feedforward signal with a current buffer in the compensation path has been practiced, using an explicit (added) current buffer (see Ahuja, An Improved Frequency Compensation Technique for CMOS Operational Amplifiers, IEEE Journal of Solid State Circuits, Vol. SC-18, No 6, December 1983, pp 629-622) or embedded (existing) cascode transistor in the input stage  12  for Class A amplifiers (see Ribner and Copeland, IEEE Journal of Solid State Circuits, Vol. SC-19, No 6, December 1984, pp 919-925). Compensation of fully differential operational amplifiers is also presented and analyzed by Hurst et al., IEEE Transactions on Circuits and Systems—1: Regulator Papers, Vol. 51, No. 2, February 2004, pp. 275-285) and Yao et al., Fast-settling CMOS Two-stage Operational Transconductance Amplifiers and Their Systematic Design, IEEE International Symposium on Circuits and Systems, Vol. 2, pp. II-839-11-842), all incorporated herein by reference. These approaches, however, are not applicable to class AB amplifiers. It would be desirable to provide a class AB folded-cascode amplifier topology having improved gain-bandwidth performance. 
   SUMMARY OF THE DISCLOSURE 
   A class AB folded-cascode amplifier having improved gain-bandwidth product, comprises a differential input circuit including a differential transistor pair coupled to a source of tail current and responsive to a differential input signal for conducting a first current, a cascode circuit that may include a cascode current mirror coupled to the differential input circuit for supplying a second current thereto, and a class AB output stage. A compensation circuit coupled between the output stage and differential input circuit is configured for coupling mutually complementary compensation signals from the output stage to the differential input circuit. In accord with one embodiment, a signal is fed back without signal inversion from an output node to one side of the differential input circuit, and also with signal inversion which may be produced by another current mirror, from the output stage to the complementary side. In another embodiment, the output signal is fed back without inversion from the output node to each side of the differential input circuit. 
   Additional advantages of the present subject matter will become readily apparent to those skilled in this art from the following detailed description, wherein only the preferred embodiment of the invention is shown and described, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the described subject matter is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  is a circuit diagram of a class AB folded-cascode amplifier having conventional Miller compensation, in accord with the prior art. 
       FIG. 2  shows a circuit diagram of a class AB folded-cascode amplifier, improved with embedded compensation in accord with one embodiment taught herein. 
       FIG. 3  shows a circuit diagram of a class AB folded-cascode amplifier, improved with embedded compensation in accord with another embodiment 
   

   DETAILED DESCRIPTION OF THE EMBODIMENTS 
   Referring to  FIG. 2 , class AB folded-cascode amplifier  20 , other than in the manner by which it is compensated, is of topology that is the same as that of amplifier  10 ,  FIG. 1 , that is, one which comprises an input differential pair circuit  12 , a cascode circuit  14  which includes transistors M 13 , M 14  and a load circuit that includes current mirror  16 , and a class AB output stage  18  and a control circuit  19 , interconnected as shown (dotted blocks omitted for clarity of drawing). Whereas compensation of amplifier  10  is carried out in  FIG. 1  by feedback between output node v OUT  (or drains) and the gates of output transistors M 2 P, M 2 N as described previously, in accord with the current teachings, amplifier  20  of  FIG. 2  implements novel feedback from the output node v OUT  to differential input circuit  12  to carry out stable compensation of a class AB folded-cascode amplifier. 
   Some further background information now will be helpful. In an uncompensated amplifier, which has the topology of amplifier  10  in  FIG. 1  but without components C C1 , C C2  and R N1 , R N2 , compensation can theoretically be achieved by connecting a capacitor from the output node at v OUT  to node D at the source of transistor M 14  on one side of the differential input stage  12 , resulting in a negative feedback to control the signal at the gate of output pair NMOS transistor M 2 N. However, the PMOS transistor M 2 P of the output pair cannot be compensated in the same way, that is, a capacitor cannot be connected from the output node to node C at the source of transistor M 13  on the opposite side of the differential input stage  12 . This is because, as the signals at nodes C and D are mutually complementary (180 degrees out of phase), this type of compensation connection would result in an destabilizing positive feedback in relation to output transistor M 2 P. However, in accord with  FIG. 2 , amplifier  20  implements cascode compensation for PMOS transistor M 2 P by inverting the feedback signal from the output node to be fed back to node C, so as to control the signal at the gate of output transistor M 2 P. 
   More specifically, signal compensation in amplifier  20  is implemented with symmetric embedded cascode compensation, that is, by a first feedback path which comprises a capacitor C C2  coupled between the output node and node D at the source of transistor M 14  of the input differential circuit  12 , as before. However, capacitor C C1  is coupled to node C through an inversion circuit  22 , in the form of a current mirror in the exemplary embodiment shown. 
   The input to current mirror  22  is a signal of two components: a DC or quiescent component produced by current source  14 , and an AC component capacitively coupled from the output node. Only the AC component is coupled from the current mirror  22  to node C through an additional coupling capacitor C C3  and resistor R T  to ground. 
   Hence, because there is no positive feedback component, the topology described in accord with  FIG. 2  achieves compensation of a class AB folded cascode amplifier without encountering instability that would otherwise arise by capacitive feedback directly from the output node to the complementary sides of the differential input circuit  12 . 
   Although current mirror circuit  22  is implemented in the described embodiment for signal inversion of the feedback signal in relation to output transistor M 2 N, inversion can be implemented by other types of inversion circuitry. 
   Whereas compensation carried out in the manner shown in  FIG. 2  is effective, it requires the addition of an inversion circuit, that is, current mirror  22  in the example described, so that the current mirror  22  is in addition to, and external with respect to, cascode mirror  16 . Another embodiment of compensation which implements inversion without the addition of inversion circuitry to the uncompensated amplifier is shown in  FIG. 3 . Referring to that figure, asymmetric embedded cascode compensation of amplifier  30  is realized by recognizing that the signal at node E in current mirror is in antiphase (1800 out of phase) with the signal at node C and in phase with the signal at node D. By connecting compensation capacitor C C1  from the output node to node E, cascode compensation is implemented for the PMOS output transistor M 2 P. As in the embodiment of  FIG. 2 , capacitor C C2  is coupled between the output node and node D, directly, without signal inversion. The Table below shows gain-bandwidth product performance for three simulated amplifiers having compensation in accord with conventional Miller compensation and two disclosed embodiments, respectively. It is apparent from the Table that symmetric and asymmetric embedded cascode compensation, in accord with the teachings herein, produce considerably improved gain-bandwidth compared to simple Miller compensation in a class AB folded cascode amplifier of the type described. 
   
     
       
             
             
             
           
             
             
             
             
             
           
             
             
             
             
             
           
         
             
                 
               TABLE I 
             
           
           
             
                 
                 
             
             
                 
               LOAD 
               LOAD 
             
             
                 
               CONDITION: 
               CONDITION: 
             
             
                 
               C L  = 100 pF, 
               C L  = 500 pF, 
             
             
                 
               R L  = 100 kΩ 
               R L  = 100 kΩ 
             
           
        
         
             
                 
               GBW 
                 
               GBW 
                 
             
             
               COMPENSATION SCHEMES 
               (kHz) 
               φM(°) 
               (kHz) 
               φM(°) 
             
             
                 
             
           
        
         
             
               SIMPLE MILLER COMPENSATION 
               339 
               60 
               204 
               31 
             
             
               (SMC) 
             
             
               EMBODIMENT 1: SYMMETRIC 
               556 
               61 
               354 
               30 
             
             
               EMBEDDED CASCODE 
             
             
               COMPENSATION (SECC) 
             
             
               EMBODIMENT 2: ASYMMETRIC 
               538 
               61 
               428 
               31 
             
             
               EMBEDDED CASCODE 
             
             
               COMPENSATION (ASECC) 
             
             
                 
             
           
        
       
     
   
   In this disclosure there are shown and described only preferred embodiments of the invention and but a few examples of its versatility. It is to be understood that the invention is capable of use in various other combinations and environments and is capable of changes or modifications within the scope of the inventive concept as expressed herein. For example, the current disclosure has particular applicability to integrated operation amplifiers, although not limited thereto.