Abstract:
Data stored in an electronic memory is accessed by search electronics which permit identification and access to a selected memory location in response to a serial search character input. As each search character is input to the system, a search is made through the memory file to determine whether one or more stored data words within the memory include, at any location within the data word, a series of characters in the exact sequence of the previously input search characters. If plural stored data words include the search character sequence, the search character input process is continued until only one storage location within the memory includes the exact character sequence which has been input. The matching data word from memory is then accessed. Because the input search character sequence is compared with memory data words to determine whether an identical sequence exists anywhere within any word, information from the memory file can be accessed without fully specifying the file name and without necessarily specifying the beginning characters of the file name. This permits a substantial increase in both accessing speed and accessing convenience in the system. This file accessing system has been found to be particularly well suited to telephone directory searching and automatic telephone dialing equipment.

Description:
BACKGROUND OF THE INVENTION 
     As the cost of electronic digital storage media has steadily declined, the use of such storage media for storing data, such as directories and the like, has rapidly expanded. Typically such memories include a plurality of data listings, each stored with a corresponding data address. Individual data listings are commonly accessed from the data memory by inputting a complete listing of the pertinent address which is then used to access the data portion of the listing from the data file. 
     While the address portion of such listings is commonly an arbitrary number designation, used for retrieval purposes only, it has been suggested in the past, as in U.S. Pat. No. 26,919, for example, that a portion of the data may, itself, be used to provide access to the stored data. Such accessing is particularly well adapted, for example, to directory use, such as might be provided by a telephone information bureau. In such cases, the memory stores the name of a telephone owner and the appropriate telephone number, the telephone owner&#39;s name being utilized as the access element to search the data file. In such systems, alphabetic characters are input at a keyboard and compared with the telephone owners&#39; names, typically stored alphabetically in the directory listing. When a match occurs, a group of telephone numbers is output to a display panel. 
     Because these systems do not utilize arbitrary addresses to access the stored data locations, as is common with many computer memories, they simply provide a directory of names and numbers where the directory data itself is searched to select a matching group. Such systems, in the past, have typically required that one entire portion of the stored data element be input at the keyboard for comparison. Thus, in a telephone directory system, the prior art would normally require that the full name of the telephone owner be input to the system for comparison with the name field of the memory to determine whether a match exists. 
     Even in systems of the prior art which did not require input of the entire name field, prior equipment required that the initial characters input at the keyboard match the initial characters in the stored name field. For example, in the telephone directory embodiment of such devices, it is necessary to input the letters in proper sequence of the telephone owner&#39;s last name, followed by his first name, exactly as stored in the telephone directory memory file, in order to determine whether a match exists. 
     Because of these difficulties associated with the prior art, the use of this type of directory searching system has been limited to uses, such as that described in U.S. Pat. No. 26,919, which provide an output, as to a CRT screen, of plural listings from the directory, from which an operator can select a specific directory listing. Thus, in such prior art systems, as keystroke data is entered, it is compared with file listings and, with sufficient keystroke data, a substantial block of data is output for manual searching. 
     Such systems, therefore, do not permit a unique selection to be made from the memory, do not permit selection of a unique entry based upon characters which may occur anywhere within the desired listing in the memory, and do not permit the connection of such a system to an automatic telephone dialer, since no unique number is selected. 
     SUMMARY OF THE INVENTION 
     The present invention alleviates these problems inherent in the prior art by providing a memory searching system which will permit access to a unique memory item in response to input data specifying a portion of the desired unique directory listing, in proper sequential order, anywhere within the listed word. 
     Furthermore, the present invention provides a search of the stored memory listings after each search character is input to the system, to determine whether sufficient data has been entered to uniquely specify a stored data listing. This permits the user to access a unique data item from the memory by specifying a series of data characters which uniquely match a series anywhere within the stored data listing. At the same time, the system speeds access to the file, since the system provides access to the unique listing as soon as sufficient data has been entered to uniquely identify one data listing from all other listings within the memory. 
     In the preferred embodiment of this invention, telephone dialing information is stored in an electronic memory, each memory listing including a name field and a telephone number field. The system provides a keyboard, at which a user can enter keyboard data specifying, in sequence, characters within the name field. As the keystroke characters are entered, they are placed sequentially, in order, in a keyboard shift register. After each such character is entered, the sequence of characters in the keyboard shift register is compared with the name field from each of the data listings in the directory. This search is accomplished by shifting the name fields from the memory, sequentially, through a second shift register. As this latter data is shifted from the memory into the second shift register, a comparison is made between a plurality of memory data characters, equal in number to the previously entered data, to determine whether a match exists. Since the entire listing from the electronic memory is shifted, one character at a time, through the second shift register, after each keystroke entry, the system will sense a match of data if the keyboard entered sequence of characters appears anywhere within any of the stored name fields. Thus, for example, if one of the name fields stores the name &#34;Jones, Robert W.&#34;, and the operator initially enters the letter &#34;O&#34; on the keyboard, a match will be sensed with this listing, because the letter O exists within the name field. 
     After each keystroke character entry, the entire name field listing from the electronic memory is circulated to the second shift register to determine whether matches exists. Logic circuits responsive to the comparison testing circuits determine whether 0, 1, or a plurality of the name fields within the electronic memory provide a match. If plural name fields provide a match, the operator is required to enter additional keystroke data. In the example given above, the operator may next enter the letter &#34;B&#34; on the keyboard, so that the letters OB appear in proper order in the keyboard shift register. The entire name field from the memory is again circulated, character by character, through the second shift register. When the listing for &#34;Jones, Robert W.&#34; is shifted through the memory register to the right location, a match will be sensed by the system. If, after the entire name field from the memory has been circulated through the second shift register, the system electronics indicate that there is only one match, the data listing for Jones, Robert W. is accessed. This accessing may take the form of outputting the data field listing, that is, the telephone number of &#34;Jones, Robert W.&#34;, to an automatic telephone dialing circuit. 
     The system therefore speeds access to the memory file, since the user is only required to put in a sufficient number of characters to uniquely identify a specific memory listing. In addition, the system is more convenient to use than prior systems, since the operator need not enter the data at the beginning of the name field, but need only enter data which appears in proper sequence anywhere within the name field of the desired listing. 
     If keystroke data is entered, which provides no matches with memory data, the operator is notified that an error has been made in the entry. That is, that the specified data does not exist anywhere within the file. 
     The system also provides a solution for a unique problem in such listings, which can be understood through the following example. If two name fields within the listing provide the names &#34;NY&#34;, and &#34;SONY&#34;, and the first of these listings is desired by the operator, it will be apparent that by entering the keystroke data &#34;NY&#34;, the operator will not have uniquely identified this listing, since the comparison electronics will show that two data listings match the keystroke data. The preferred embodiment system permits the operator, after entering the data &#34;NY&#34;, to enter keystroke data specifying the fact that this is the entire name field listing for the desired data field. The electronics of the system will then search the name fields within the memory to eliminate those which include additional listing characters, thus providing the listing &#34;NY&#34; as the unique matching listing, so that this selected data may be output. 
    
    
     DESCRIPTION OF THE DRAWINGS 
     These, and other advantages of the present invention are best understood through reference to the drawings, in which: 
     FIG. 1 shows a perspective view of an exemplary telephone dialing system, constructed in accordance with the present invention, and connected to a standard telephone; 
     FIG. 2 is a schematic diagram of the memory and search electronics utilized for directory searching in the present invention; 
     FIG. 3 shows a representative memory field within the memory of FIG. 2; and 
     FIG. 4 shows a block diagram of a circuit which may be utilized to implement the present invention utilizing a programmed microcomputer. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring initially to FIG. 1, the preferred embodiment of the present invention is incorporated within a telephone dialing system 10 which may be used to store plural telephone numbers and to access these stored numbers in accordance with the invention through the entering of plural keystroke data on a keyboard 12. The system provides an output alpha-numeric display 14 to provide the operator with an indication of the selected listing and permits automatic dialing of the telephone 16 in accordance with the selected listing. The keyboard 12 includes plural control keys 18, alpha-input keys 20, and numeric-input keys 22. 
     Referring now to FIG. 2, the electronic logic circuits, utilized for implementing the directory search system of FIG. 1, will be described. 
     The keyboard 12 is connected to an electronic memory 24 by means of a write circuit 26. The write circuit 26 is a standard prior art computer element and is utilized to permit the operator, by entering keystroke data at the keyboard 12, to place names and telephone numbers or other directory listing data in the memory 12. In the exemplary embodiment, memory 24 is 4k×6 binary bits in size. 
     The write circuit 26 enters data from the keyboard 12 into the memory 24 in accordance with the data field of FIG. 3. Each data field, as would be provided by the keyboard 12 and write circuit 26 for each directory listing, includes a Beginning-Of-Name character 28, identifying the beginning of a data field. This character is followed sequentially by a name field 30, which may include from 1 to 62 alpha characters. In order to provide maximum utilization of the memory 24, the data field 30 is of variable length, depending upon the name of the telephone owner entered at the keyboard 12. The name field 30 is followed by an End-Of-Name character 32, to separate the name field from a data field 34, the latter providing the telephone number of the telephone owner, specified in the field 30. The data field 34 is followed by an additional Beginning-Of-Name character 36, and an additional name field 30, such fields following sequentially within the memory 24 to include all of the listings within the memory. At the end of the listed data, and, specifically, following the final data field 34, an End-Of-Memory character 38 is provided. This End-Of-Memory character 38 is placed at the end of the entered data listings, regardless of the portion of the memory 24 which has been filled. It will be understood, therefore, that the write circuit 26 will move the End-Of-Memory character 38 whenever additional data fields are entered on the keyboard 12. 
     The circuit of FIG. 2 is utilized to shift the data fields, as shown in FIG. 3, sequentially from the memory 24 for comparison with input keystroke data, in order to access the name field 30 and data field 34, which matches entered keystroke data. 
     In addition to the connection to the write circuit 26, the keyboard 12 is connected to a shift register 40, only a portion of which is shown. The shift register 40 includes character shift locations 40a, 40b, 40c, etc., to provide, in the preferred embodiment, 64 shift locations. Each shift location 40a through 40f, etc., provides 6 binary shift register locations, as required to store a single alpha-numeric character. Thus, the shift register 40 is 6 binary bits wide, and 64 bits long. 
     Data within the shift register 40 is shifted one location to the left on receipt of each pulse signal from a line 42, labeled &#34;accept character, shift keyboard register&#34;. Thus, when shifted by a pulse on line 42, the character previously stored in character shift location 40a will be shifted to character shift location 40b; that previously stored in location 40b will be shifted to location 40c; etc. 
     A similar shift register 44, 6 binary bits wide and 64 bits long, to provide shifting storage for 64 alpha-numeric characters, is connected to the memory 24. The memory 24 is addressed utilizing an address counter 46 providing a 12-bit address signal to the memory. The address counter 46 is therefore utilized to shift individual data characters, and thus entire data fields, in sequence, from the memory 24 into the shift register 44, beginning at a first character shift location 44a and, successively, to locations 44b, 44c, 44d, etc. Data is shifted one increment to the left, from character shift location to character shift location, within the shift register 44, each time a pulse appears on a shift line 48. 
     A comparator 50 is connected to the shift register 40 and the shift register 44. This comparator includes plural exclusive NOR gates 50a, 50b, 50c, etc., each connected by six lines to a character shift location in register 40 and likewise in register 44. Thus, the exclusive NOR gate 50a is connected to the character shift locations 40a and 44a, the exclusive NOR gate 50b to locations 40b and 44b, etc. 
     The output of the exclusive NOR gate 50a is low, unless the character stored within the character shift location 40a is identical to the character stored within the character shift location 44a. If these characters are identical, the output of the exclusive NOR gate 50a goes high, producing a high signal on a line 52a. Likewise, the output signals on lines 52b, 52c, etc., from exclusive NOR gates 50b, 50c, etc., will be high if the characters stored in the corresponding pair of character shift locations 40b, 44b; 40c, 44c; etc., are identical. 
     Each exclusive NOR gate 50 provides one input to a series-cascade-connected set of AND gates 54a, 54b, 54c, etc. Because the inputs to the AND gate 54a are provided by the output of exclusive NOR gates 50a and 50b, the output of the AND gate 54a on line 56a will be high only if both exclusive NOR gates 50a and 50b provide high output signals, that is, only if the character stored in character shift location 40a is identical to the character stored in location 44a, and the character stored in location 40b is identical to the character stored in location 44b. The output line 56a is connected as one input to the AND gate 54b, the other input being provided by the exclusive NOR gate 50c. Thus, the output line 56b will be high only if the characters stored in locations 40a, 40b, and 40c are identical to the characters stored in locations 44a, 44b, and 44c, respectively. 
     Thus, each of the AND gates 54a, b, c, etc., will provide a high output signal on the lines 56a, 56b, 56c, etc., only if the pairs of characters stored in all of the preceding character locations in the registers 40 and 44 are identical. In other words, the output of the exclusive NOR gate 50a on line 52a is high if the first characters in the registers 40 and 44 are identical. The output of the first AND gate on line 56a will be high only if the first two characters in these registers 40, 44 are identical. Similarly, the output on line 56b will be high only if the first three characters in the registers 40 and 44 are identical. The sequence continues, there being provided a total of 64 register locations in the register 40, 64 register locations in the register 44, 64 exclusive NOR gates 50a, and 63 AND gates 54 to complete the comparison circuitry. 
     The outputs of each of the AND gates 54, as well as the first exclusive NOR gate 50a, are connected to a data selector 58, which includes 64 input lines labeled sequentially 1, 2, 3, etc. This data selector 58 selects one of the input lines 52a, 56a, 56b, etc., for connection to an output line 60, in accordance with an address supplied by a window counter 62. The data selector 58 is thus a multiplexer which selects one channel from the 64 input channels in accordance with the output count of the counter 62, and connects this selected input channel to the output line 60. 
     From the description which has been provided thus far, it will be seen that, if the window counter 62 outputs the number 1, the data selector 58 will connect the line 52a to the line 60, so that the line 60 will be high if, and only if, the contents of the first character shift locations 40a and 44a are identical. If the window counter outputs the number 2, the signal on line 60 will be high if the first two characters match (40b, 40a; 44b, 44a). Likewise, the window counter outputs the number 64, the first 64 character locations must match in order to provide a high signal on line 60. From this description, it can be seen that, with keyboard data placed in the shift register 40 and memory data placed in the shift register 44, the window counter 62 will determine, by its output count, the number of characters provided by these two sources which will be compared to provide the output signal from line 60. This will be referred to as the comparison window, the window length always equalling the output count from the window counter 62. 
     The output line 60 is connected to a pair of flip-flops 62,64 connected as a 2-bit binary counter. After this counter has been cleared by a signal on line 66, the output signal on a line 68 from the flip-flop 62 will be high, indicating a count of zero. After a first pulse, or high output signal has appeared on the line 60, the flip-flop 62 will be set, providing a high signal on line 70, and resetting the flip-flop 64. This reset condition of the flip-flop 64 provides a high signal on a line 72 which combines with the signal on line 70 in an AND gate 74 to provide a high signal on a line 76 indicating a count of one. The next successive signal on the line 60 will reset the flip-flop 62 and set the flip-flop 64 to provide a high signal on a line 78, indicating that two pulses have appeared on line 60. 
     It will become apparent as the description proceeds that the number of pulses present on the line 60, after a clear signal on line 66, is indicative of the number of data fields in the memory 24 which match the characters which have been input at the keyboard 12. Thus, a signal from the line 68 indicates that none of the data fields in memory matches that keystroke data. A latch 80 is set by a signal on a line 94 after the entire memory 24 has been searched, and thus provides, at that time, a sustained output signal on a line 82 labeled &#34;not found&#34; which provides an &#34;error&#34; message on the display 14 (FIG. 1). A signal on the line 76 will be latched in the latch 80, in response to a signal on line 94, to provide a sustained output signal on a latch output line 84 indicating that, on completion of the search, one and only one data field in the memory 24 matches the keystroke data thus far input at the keyboard 12. Similarly, a sustained output signal from the latch 80 on a line 86 at the completion of the search indicates that more than one data field in the memory 24 matches the previously entered keystroke data, so that additional keystroke data is needed to uniquely match only one data field in the memory 24. 
     A special character detector 88 is connected to the first character shift location 44a of the shift register 44, in parallel with the input to the exclusive NOR gate 50a. This special character detector 88 compares each character placed in the character shift location 44a to determine whether it is a Beginning-Of-Name character 28, an End-Of-Name character 32, or an End-Of-Memory character 38 (FIG. 3). This detector 88 provides a high output signal on one of three lines, 90, 92, or 94, if the character at location 44a matches one of these special characters. 
     The Beginning-Of-Name output line 90 is connected to reset a flip-flop 96, while the End-Of-Name output line 92 from the detector 88 is connected to set the flip-flop 96. This flip-flop 96 is utilized to skip over data in the memory 24 which is not utilized for search purposes, specifically the data field 34. Thus, referring briefly to FIG. 3 and FIG. 2, in combination, the flip-flop 96 is set as soon as an End-Of-Name character 32 is shifted out of the memory 24, and is reset after a data field 34 has been shifted out of the memory 24 and a Beginning-Of-Name character has appeared at the character shift location 44a. This procedure, as will be seen through the description below, permits the comparison routine of the present system to skip over the data field 34, by shifting this data from the memory and ignoring it for comparison purposes. 
     Returning again to FIG. 2, when the flip-flop 96 is set, a skip signal is provided on output line 98. 
     This skip signal on line 98 is supplied by an OR gate 100 to one input of an AND gate 102, the other input being provided by a clock 104, which provides periodic output pulses. So long as the line 98 is high, periodic pulse outputs will appear on output line 106 of the AND gate 102 to simultaneously provide pulse signals to the increment input 108 of the address counter 46 and to the shift input line 48 of the register 44. The clock pulses 104 thus shift data from the memory 24 into the shift register 44, and shift the data from character location to character location (44a, b, c, etc.), until a Beginning-Of-Name character signal appears on line 90, resetting the flip-flop 96 and interrupting the series of clock pulses by providing a low signal from the OR gate 100 to one input of the AND gate 102. 
     Signals from the clock 104 are also permitted to increment the address counter 46 and shift the register 44 whenever the line 60 provides a low output signal, indicating that, for the current name field and character position in the register 44, a match does not exist. This is accomplished by providing an inverter 110 connected to the output line 60 from the data selector 58, the output of the inverter 110 being connected to the remaining input of the OR gate 100. Thus, when a match does not exist between the compared data in the shift registers 40 and 42, as controlled by the window counter 62, the inverter 110 will provide an output signal for a long enough period of time to permit one clock pulse to be applied from the clock 104 through the AND gate 102 to the address counter 46 and shift register 44. 
     An initial clear signal is provided by the control button 18 on the keyboard 10 (FIG. 1) to provide a signal on a line 110 which clears the logic elements within the system at the beginning of a memory search. Thus, the clear signal 110 is provided through an OR gate 112 to clear the address counter 46. This clear signal 110 is also connected to a clear keyboard line 114 which clears the keyboard register 40, with the exception of the first character shift location 40a. The signal on line 114 additionally enables a Beginning-Of-Name character writer 116, which writes a Beginning-Of-Name character in the first character location 40a of the register 40, while the remaining locations in the shift register 40 are simultaneously cleared. 
     The initial clear signal on the line 110 also provides an input at 118 to clear the window counter 62 and, through an OR gate 120, a signal to the clear input 66 of the flip-flops 62 and 64. In addition, the clear signal on line 110 is provided at the clear input 122 of the shift register 44 to clear all of the character shift locations within this register. 
     Thus, when the search process is begun, the window counter 62 has been reset, so that it selects the first input line 52a for connection to the output line 60. A Beginning-Of-Name character, as indicated previously, has been placed in the character shift location 40a by the writing circuit 116 in response to the initial clear signal 110. Because this Beginning-Of-Name character does not match the cleared location 44a, so that the signal on line 60 is low, providing a high output signal from the inverter 110, a clock pulse propagates from the clock 104 to increment the address counter 46 and the shift register 44 to shift the first character of the first memory data field from the memory 24 into the shift register 44 and, specifically, into character shift location 44a. As can be seen from FIG. 3, it is expected that this first character will be a Beginning-Of-Name character 28. 
     The operator now strikes a key of the keyboard 12 to input the first alphabetic character to be used in the search process. In the example given at the beginning of this description, this first character might be, for example, the letter O. This letter is read from the keyboard and shifted into the first memory position 40a, while the beginning of name character originally placed in the character shift location 40a by the writing circuit 116 is simultaneously shifted to character location 40b. At the same time, the first character following the Beginning-Of-Name character will be shifted into character shift location 44a of the register 44 and the beginning of name character, originally placed in location 44a, will be shifted to location 44b. 
     The length of word, selected by the window counter 62, at this time is one, the output count from the counter 62 equalling one, so that the Beginning-Of-Name characters are ignored for comparison purposes. Thus, only the characters in locations 44a and 40a are compared. 
     At this point, a comparison occurs between locations 40a and 44a in the exclusive NOR gate 50a, to provide a high or low signal through the data selector 58 to the line 60. If these characters match exactly, the high signal on line 60 will set the flip-flop 62, incrementing the match counter 62, 64, so that the output is now one. 
     The next pulse signal from the clock 104 through the gate 102 will shift the next character out of the memory 24 into the shift register 44, shifting the data previously placed in the memory to successive character shift locations. The window counter 62 still requires that only the first locations within the registers 40 and 44 be compared, as data is shifted successively from the memory 24. Data continues to be shifted from the memory 24, and after each shift, the data selector 58 provides an output signal indicating a match or the lack of a match. 
     As soon as a second match occurs, indicating that a second data field within the memory includes a character which matches the character in character shift location 44a, the match counter 62,64 will provide a two-output count, generating a signal on line 78. 
     When the end of the memory is reached, as indicated by a signal on line 94, the latch 80 will be set, and will provide a signal on line 86 if more than one memory field matches the keystroke data. When this occurs, the output from the latch 80 on line 84 is low, so that an AND gate 126 will provide a low output signal. This signal, when inverted by an inverter 128, will combine with the signal from line 86 through OR gate 122 to enable an AND gate 124, which in turn provides a high signal on a line 130. 
     This signal on line 130 will shift the keyboard register 40 and enable the keyboard 12 so that the operator may input an additional keystroke character. Thus, the count of two reached at the latch 80 indicates that more than one word within the memory 24 included the single letter which had been stored in register location 40a, and thus additional keystroke data is required to uniquely locate a data field within the memory. 
     In accordance with this need, the window counter 62 is incremented by the signal on the line 130, and the address counter 46 is cleared by this same signal so that the search for data fields, including two characters in proper sequence matching the two characters which will now be present in the register 40, may begin. 
     It will be understood from this description that the memory 24 is completely searched. If during the search, two matching words are located, the window counter 62 is incremented, additional keystroke data is placed in the register 40, and the search of the memory 24 is repeated, beginning at the beginning of that memory 24. 
     With the window counter 62 incremented and an additional character in the shift register 40, the data in the memory will now be shifted through the shift register 44, character-by-character, to determine how many data fields include a pair of sequential characters matching the pair of characters in the character locations 40a and 40b. Each time that this comparison is made, if the signal on line 60 shows no match, that is, the characters are not identical, this signal will be inverted by the inverter 110 to force the clock 104 to continue circulating data from the memory 24 until a match occurs. 
     During the shifting process from the memory 24, whenever a data field is reached, the End-Of-Name character will be shifted into the character shift location 44a and will provide an output signal on line 92. This signal will force the clock signals 104 to continuously shift data from the memory 24 until a Beginning-Of-Name character appears at the character shift location 44a to reset the flip-flop 96. This process allows the data fields to be skipped, so that no comparison is made of this data which would otherwise waste circuit operations and time. 
     If, when the end of the memory 24 is reached, the match counter 62,64 equals zero, this means that there was no match at all, which provides an output signal on line 82 indicating that there is an error by the operator and that the operator should initialize the system and begin again. 
     If the match counter equals one when the end of the memory has been reached, this is an indication that there is one and only one unique match between the memory data fields 24 and the keyboard data entered into the register 40. The one output line 84 will be latched under these circumstances. In addition, since the search is complete, there will not be a match signal on the line 60, thus the output of the AND gate 126 will be low and the output of the inverter 128 will be high. Additionally, the latched output on line 84 will provide an input to the AND gate 124 which will zero the address counter 46 and require an additional search through the memory. 
     It will be understood that this additional search is required, since a complete pass through the memory 24 is required to determine that there is one, and only one matching data set within the memory. The second pass, after this unique match is located, is required to locate the memory field within the memory 24, which provides this unique match. 
     Under these circumstances, the clock 104 continues to shift data from the memory 24, the window counter size remaining the same, and the data in the shift register 40 remaining the same. As soon as the match is again located, the signal on line 60 will combine within the AND gate 126 with the latched one signal on the line 84 to provide a high output signal from this AND gate 126 to a line 132 indicating success of the search procedure. 
     It may be desirable, in some circumstances, to specify, at the time of data input at the keyboard 12, that an exact and complete match of the stored data is being sought. Thus, in the example previously mentioned, if the names &#34;Sony&#34; and &#34;NY&#34; were stored in the name fields 30 in two locations of the memory 24, and it were desired to locate the name field &#34;NY&#34;, the circuit as thus far described would not provide a unique output for that combination. 
     The system, however, provides means for indicating that an exact match is specified. This is accomplished by inputting the characters &#34;NY&#34; into the keyboard 12, and then inputting an End-Of-Name character at the keyboard 12. It will be recalled that, as described earlier, the Beginning-Of-Name character was placed from the character writer 116 as the first character into the register 40. This character always precedes the window counter by one count, so that, under normal circumstances, it is always just ahead of the window which is being examined. 
     When an End-Of-Name character is input from the keyboard 12, an End-Of-Name detector 134 provides a signal on a line 136 which increments the window counter 62 by one count. This will force the comparison window to, in effect, &#34;catch up&#34; with the Beginning-Of-Name character in the register 40, so that the search sequence will search for data in the memory 24 which provides a Beginning-Of-Name character, followed by the characters &#34;NY&#34;, followed by an End-Of-Name character, or, an exact match of the complete name, as input at the keyboard. Needless to say, the memory data specifying &#34;Sony&#34; will not match this character bounded word, and the system will provide a latched output on the line 84 for the &#34;NY&#34; characters, as required. 
     In an exemplary embodiment of this circuit, the shift registers 40, 44 may comprise integrated circuit part number 74164, the exclusive NOR gates 50 may comprise part 74136, the flip-flops 62 and 64 may be part numbers 74174, and the latch 80 may be part number 74175. The counters 62 and 46 may comprise part numbers 74163 and the special character detector may be made up of exclusive NOR gates which would comprise part numbers 74136. This part may also be used for the End-Of-Name detector. 
     The memory may be constructed from part numbers 2114 and the OR gates may be parts 7432, while AND gates may be parts 7408. 
     When a signal appears on line 132, indicating that a unique matching set of characters has been found, and that these characters are located in the register 44, this signal 132 may be utilized to notify the operator, as by visual display 14 (FIG. 1), that the search is complete. In addition, as shown in FIG. 2, this signal may provide an enable signal to a telephone dialer 140 to permit this dialer to dial the telephone 16 (FIG. 1). Such dialers are well known in the art. In this circuit, the dialer would include an output line 138, permitting the dialer 140 to apply pulse signals to the line 106 to shift the remaining portion of the data field from the memory 124 into the shift register 44 and to shift the data in the shift register 44 simultaneously. A line 142 connects the dialer 140 to the register 44 so that this data, shifting in the register 44, will be accessed by the dialer 140 in sequence. The dialer 140 will then sense an End-Of-Name character 32 and will utilize the data field 34 following this End-Of-Name character 32 to provide an output signal on a line 144 to dial the telephone 16. 
     While the preferred embodiments of the present invention are described in reference to a telephone dialing system, it should be understood that the memory accessing system may be useful for a wide variety of application. The essential characteristics of the invention are the ability to search a memory after successive characters are entered for search purposes, so that a unique match may be located as soon as sufficient characters are input to identify such a match. In addition, the system provides the advantage of shifting data from the memory, character by character, and thus placing each character sequence within a given memory field in a comparison window so that a unique match may be provided, regardless of the location, of the matching characters within the memory field. 
     While this embodiment provides a hard wired implementation of the invention, this invention may also be implemented utilizing a microcomputer circuit arranged as shown in FIG. 4. 
     A microprocessor 201, which may be, for example, a Z-80 microprocessor chip, is connected to a Random Access Memory 203, such as a 4816 integrated circuit chip, used to store the memory data of FIG. 3. The operations of the microprocessor 201 are controlled by a program stored in a Read-Only Memory 205, which may be, for example, a 2716 integrated circuit chip. The microprocessor 201 is connected to an input/output controller 207, such as a 2855 chip, which is, in turn, connected to the keyboard 12 (FIG. 1) and plural display drivers 209, such as UDN6118 integrated circuit chips. The drivers 209 are used to drive the display 14 (FIG. 1) which may be, for example, commercially available Part No. FIP16A5R. 
     The input/output controller 207 additionally connects to the telephone dialer circuit 140, which is, in turn, connected through a standard telephone interface 211 to the tip and ring lines of the telephone circuit. Additionally, a speaker 213 may be used to audibly reproduce the dialing tones for the convenience of the operator. 
     It will be understood by those skilled in the art that the computer arrangement of FIG. 4 is well known and typical of general purpose application arrangements for microprocessors. 
     The computer program used in the Read-Only Memory within the microcomputer chip in this implementation is as follows: ##SPC1## 
     It will be seen that the circuit, as described above, permits keystroke data to be entered, character by character, at the keyboard 12. As each character is entered, the entire data file in the memory 24 is searched to determine whether the unique match exists. When a sufficient number of characters have been entered at the keyboard 12, a unique match will provide an output signal which will cause the address counter to circulate the memory 24 to place the uniquely matching data into the shift register 44. The signal on the line 132 may then be utilized to enable an automatic telephone dialing circuit 134. Such circuits exist in the prior art and be made to respond to the memory data within the shift register 44, as shown by the line 136. The dialing circuit 134 will provide signals on output line 138 to shift the register 44, shifting the data into a register within the dialing circuit 134 so that, beginning with the End-Of-Name character 32 (FIG. 3), the data field 34 may be used to provide dialing signals for the telephone 16 (FIG. 1). This portion of the circuit is well known in the prior art and does not incorporate a unique part of the present invention.