Abstract:
A photosensing device with a photovoltage sensing mechanism, a graphene layer and a semiconductor layer. The graphene layer is sandwiched between the semiconductor layer and a substrate. The photovoltage sensing mechanism senses the photovoltage created by light impinging on the graphene-semiconductor heterojunction. The strength of the photovoltage is used to indicate the level of illumination of the impinging light.

Description:
FIELD 
       [0001]    Embodiments of the present disclosure relate to semiconductor devices, and particularly to a photodetector semiconductor device. 
       BACKGROUND 
       [0002]    Bipolar phototransistors can operate in either three-terminal configuration or two-terminal configuration. When operating in three-terminal configuration, the current gain of the phototransistor is high but the dark current is large since a large steady-state bias current may exist in the device, which increases steady-state power consumption and requires techniques for extracting photo-current out of the total current (dark current plus photo-current). On the other hand, when operating in two-terminal configuration, the base is floating. Therefore, the dark current is extremely low, but the current gain is not as high as that of three-terminal configuration. Therefore there is room for improvement in the art. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0003]    Implementations of the present technology will now be described, by way of example only, with reference to the attached figures. 
           [0004]      FIG. 1  is a top plan view of a photodetector structure having a bipolar phototransistor with body strapped base in accordance with a first embodiment of the present disclosure. 
           [0005]      FIG. 2  is a cross-sectional view taken along line A-A of  FIG. 1 . 
           [0006]      FIGS. 3A and 3B  are schematic diagrams of a bipolar phototransistor with body strapped base showing metallic material and doping connection as the strap. 
           [0007]      FIG. 4  is a graph of photocurrents of the phototransistor with and without the body-strapped base under illuminance. 
           [0008]      FIG. 5  is a graph showing spectral photo-responsivities of normal silicon-germanium (SiGe) BiCMOS heterojunction bipolar phototransistor (HPT) and the SiGe BiCMOS HPT with body-strapped base. 
           [0009]      FIG. 6  is a graph showing spectral responsivities of the SiGe BiMOS HPT with body-strapped base, the collector current of normal HPT, and the substrate current of normal HPT. 
           [0010]      FIG. 7  shows a cross-sectional diagram of a CMOS phototransistor with body-strapped base utilizing metal connections in accordance with one embodiment of the disclosure. 
           [0011]      FIGS. 8A and 8B  are circuit diagrams of the SiGe CMOS HPT with body-strapped base by utilizing metal wire and doping connections in a CMOS process. 
           [0012]      FIG. 9  shows a top view of the SiGe BiCMOS HPT with body-strapped base by utilizing extended base in accordance with one embodiment of the disclosure. 
           [0013]      FIG. 10  is a top plan view of the CMOS PT with NMOS FET devices and body-strapped base by utilizing metal connections in accordance with one embodiment of the disclosure. 
           [0014]      FIG. 11  is a cross-sectional diagram taken along line B-B of  FIG. 10 . 
           [0015]      FIG. 12  is a top plan view of the CMOS PT with NMOS FET devices and body-strapped base of an embodiment of the disclosure. 
           [0016]      FIG. 13  is a cross-sectional diagram taken along line C-C of  FIG. 12 . 
           [0017]      FIG. 14  shows a schematic diagram of an image sensor utilizing a phototransistor in accordance with one embodiment of the disclosure. 
           [0018]      FIG. 15  shows a schematic block diagram of a module using the phototransistor in accordance with an embodiment of the present disclosure. 
           [0019]      FIG. 16  shows a block diagram of a system using the phototransistor in accordance with an embodiment of the present disclosure. 
           [0020]      FIG. 17  illustrates a flowchart of one embodiment of fabricating a photodetector comprising a phototransistor. 
           [0021]      FIG. 18  illustrates a flowchart of one embodiment of fabricating a photodetector comprising a phototransistor. 
       
    
    
     DETAILED DESCRIPTION 
       [0022]    The present disclosure, including the accompanying drawings, is illustrated by way of examples and not by way of limitation. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean “at least one.” 
         [0023]      FIG. 1  shows a top plan view of a first embodiment of photodetector comprising a phototransistor  1  in accordance with the disclosure. The phototransistor  1  is a layered structure having the standard silicon-germanium (SiGe) heterojunction bipolar transistor (HBT). As shown in  FIG. 1 , the phototransistor  1  comprises a substrate region  3  (or can be referred to as substrate  3 ), a collector region  20  (or collector  20 ), a base region  25  (or base  25 ), and an emitter region  12  (or emitter  12 ). The device shown in  FIG. 1  is a 60 μm×60 μm square form. As is apparent, the emitter region  12  covers only a small portion of the device area. 
         [0024]      FIG. 2  depicts a cross-sectional view of the phototransistor  1  depicted in  FIG. 1  along line A-A of  FIG. 1 . Like-numbered elements described above also refer to the same elements depicted in  FIG. 2 . As shown in  FIG. 2 , phototransistor  1  includes semiconductor substrate region  3 . The semiconductor substrate  3  is of p-type conductivity. Included in the substrate region  3  is a buried layer  22 . The buried layer  22  is of n-type conductivity. Disposed adjacent to the buried layer  22  is an epitaxial region N-epi that is of n-type conductivity. The buried layer  22  contains a higher doping concentration, for example 1019/cm3-1021/cm3, than that of the epitaxial region N-epi. Disposed adjacent to the N-epi region are collector regions  20 . The collector regions  20  are of n-type conductivity and contain a higher doping level than that of the N-epi region. 
         [0025]    A semiconductor layer of p-type conductivity overlies the N-epi region and forms the base region  25  of the phototransistor  1  of  FIG. 2 . A plurality of field oxides FOX  13  are disposed between the collector region  20  and the base region  25 . 
         [0026]    As shown in  FIG. 2 , doping regions  15  are formed in the substrate of the phototransistor  1 . Field oxides FOX  14  are formed separating and abutting the doping regions  15  and the collector regions  20 . An emitter region  12  made of polysilicon is partially formed over the base region  25 . This avoids the light power degradation by the polysilicon. The emitter region  12  is of n-type conductivity and of higher doping concentration than the N-epi region. A plurality of metal contacts  10  are disposed on the doping regions  15 , the collector regions  20 , the base region  25 , and the emitter region  12 . The doping regions  15  are electrically connected to the base region  25  using metal interconnects  5  connected to the metal contacts  10 . 
         [0027]    Schematic views of the phototransistor  1  are shown in  FIGS. 3A and 3B . As can be seen in these figures, the phototransistor  1  is a bipolar transistor having a base terminal  50 , a collector terminal  55 , an emitter terminal  60 , and a p-substrate terminal. In  FIG. 3A , one aspect is shown whereby the p-substrate terminal is tied or strapped or electrically connected to the base terminal  50  by metal-wire connection  70 . In  FIG. 3B , another aspect is shown whereby the p-substrate terminal is tied or strapped or electrically connected to the base terminal  50  using high doping semiconductor connection  80 . 
         [0028]      FIG. 4  shows the characteristics of phototransistor  1  of photocurrent against illuminance under the illumination of a white light source. Under a small bias voltage (VCE=1.2 V), the normal SiGe HPT without body-strapped base already shows remarkable collector output current. For a wide dynamic range (120 dB) of input light illuminance, the output current shows a relatively linear behavior. In particular, when the illuminance is as low as 0.01 lux, the output current from the 60 μm×60 μm phototransistor  1  device is still as high as 1.7 nA, which corresponds to a current density of 47.2 μA/cm2. The measured dark current of the device is only 1.7 pA (i.e. 0.0472 μA/cm2 in current density). The signal-to-noise ratio of the normal SiGe HPT is approximately 60 dB at 0.01 lux illuminance. 
         [0029]    For the SiGe HPT with body-strapped base, similar linear characteristic is observed as shown in  FIG. 4 . Note that the current has been enlarged by two orders of magnitude, compared with that of the normal SiGe HPT without body-strapping. The current value reaches 0.2 μA at 0.01 lux. This proves the effectiveness of this disclosure. More importantly, the dark current of the device remains very small, only 18 pA (0.5 μA/cm2 in current density) at VCE=1.2 V. The sensitivity of the HPT with body-strapped base can be very high and the signal-to-noise ratio is improved to 80 dB from 60 dB at 0.01 lux illuminance. 
         [0030]    As shown in  FIG. 5 , the measured spectral photo-responsivity of the normal SiGe HPT under VCE=1.2 V has a peak value around 3.7 A/W for collector current (IC) and the spectral peak lies around λ=630 nm. The parasitic N+ buried layer/p-sub junction under the HPT is an additional photo-detecting junction and it contributes to the collector current (IC). Although this additional photocurrent is not amplified by the HBT, its magnitude can be significant when the wavelength of the incident light is long, because the depletion region of the junction is wide and the substrate is thick. Therefore, the magnitude of collector current (IC) is usually larger than that of emitter current (IE) when the HPT is illuminated by long-wavelength light. As can be seen in  FIG. 5 , the two curves for IC and IE coincide more or less in the shorter wavelength region but separate significantly in the longer wavelength region. Apparently, collector current (IC) is larger than emitter current (IE) in  FIG. 5 . Because long-wavelength light generates more holes in the substrate than short-wavelength light does, it can be expected that the spectral response of the SiGe HPT with body-strapped base should have a peak at a longer wavelength.  FIG. 5  shows that the responsivity of HPT has been enhanced by the body-strapping. The peak responsivity reaches a value about 75 A/W. 
         [0031]    As shown in  FIG. 6 , the spectral photo-responsivity is compared with the ones in  FIG. 5 . It is clear that the spectral peak of the HPT substrate current (hole current) lies at a longer wavelength than the spectral peak position of the HPT collector current, and it coincides with the location of the spectral peak of the HPT with body-strapped base. That is, the substrate carriers provide a self-bias to the HPT and induce more output current. 
         [0032]      FIG. 7  contains a cross-sectional view of one embodiment of a photodetector comprising a phototransistor  2  of the present disclosure. The process of fabricating the phototransistor  2  is the standard CMOS process. The phototransistor  2  is a lateral NPN bipolar junction transistor constructed by emitter region  122 , a base region  250 , and a collector region  200 . The phototransistor  2  is disposed in a p-well  222 . The p-substrate region  30  is isolated from the p-well  222  by a deep n-well  220 .  FIG. 7  shows base terminal  85  which has been electrically connected to the substrate terminal, collector terminal  95 , and emitter terminal  90 . 
         [0033]    Schematic views of the phototransistor  2  are shown in  FIGS. 8A and 8B . In  FIG. 8A , one aspect is shown whereby the p-substrate terminal is electrically connected to the base terminal  85  using metal-wire connection  92 . As is apparent, the deep n-well  220  isolates the p-substrate  30  from the phototransistor  2  and no internal electrical connection is between the base  85  and the p-substrate terminal. In  FIG. 8B , another aspect is shown whereby the p-substrate terminal is electrically connected to the base terminal  85  using high doping semiconductor connection  80 . 
         [0034]      FIG. 9  is a top plan view of one embodiment of a photodetector comprising a phototransistor  4  of the present disclosure. The substrate terminal (not shown) is directly electrically connected to the base region  118 . As shown in  FIG. 9 , the ends of the base region  118  overlaps or extends over the collector region  110  and is directly electrically connected to the substrate using high-concentration doping. The high-concentration doping region is directly physically connecting the base region  118  without any metal contacts or wires. The emitter regions  101 , the emitter contacts  105  and the collector contacts  115  are also shown in  FIG. 9 . 
         [0035]      FIGS. 10 and 11  show one embodiment of a photodetector comprising a phototransistor  6  of the present disclosure.  FIG. 10  shows a top plan view of the phototransistor  6 .  FIG. 11  shows a cross-sectional view taken along line B-B of  FIG. 10 . This embodiment is similar to the embodiment as shown in  FIG. 7 , however, instead of field oxides, the collector regions  127  and the emitter regions  125  are separated by NMOS FETs  130 . The drains/sources regions of the NMOS FET serve as the collector regions  127  and the emitter regions  125 . The NMOS FETs  130  are fabricated with a minimum channel length rule in standard semiconductor process to reduce the distance between the collector region  127  and the emitter region  125  of the phototransistor  6 . The substrate region  30  is electrically connected to the base region  250  using metal interconnects  50 . Gate  126  of NMOS FET  130  is shown in  FIG. 11  and it is floating when the phototransistor  6  is operated as a two-terminal device. Base regions  250  are separated from emitter regions  125  by field oxide FOX. 
         [0036]      FIGS. 12 and 13  show one embodiment of a photodetector comprising a phototransistor  7  of the present disclosure.  FIG. 12  shows a top plan view of the phototransistor  7 .  FIG. 13  shows a cross-sectional view taken along line C-C of  FIG. 12 . This embodiment is similar to the embodiment as shown in  FIGS. 10 and 11 ; however, the base region  123  is directly connected to the substrate region  30  through the isolation region deep n-well  220  by high-concentration doping. 
         [0037]    In one embodiment of the present disclosure, the photodetector comprising a phototransistor may be implemented as a pixel in an image sensor as shown in  FIG. 14 .  FIG. 14  is a simplified view of an image sensor pixel  51  having the phototransistor of the present disclosure. Incident light is captured by the phototransistor  11  and an electrical signal in the form of electrical charges is present in the floating node DR of the image sensor pixel  51 . The transistor M 1  is used to reset any charges accumulated in the floating node DR to a reference level. The gate of transistor M 1  is connected to a reset line RSL. A source follower amplifier M 2  is used to buffer the output of the image sensor pixel  51 . A select transistor M 3  passes the output signal Vout. The gate of the select transistor M 3  is connected to a word line WDL. 
         [0038]    In one embodiment of the present disclosure, as shown in  FIG. 15 , an image sensor module  300  comprising a plurality of phototransistors may be implemented in a plurality of image sensor pixels  51  as an array comprising rows and columns. In an alternative embodiment, the array may comprise of one row and multiple columns or one column and multiple rows. The image sensor array  301 , shown in  FIG. 15 , is connected to row decoders  310 , column decoders  302 , multiplexers  315 , analog-to-digital converters (ADC)  316  to extract the electrical signal (information) from each image sensor pixel. In a further embodiment, as shown in  FIG. 16 , the image sensor module  300  is part of a system  400  where the extracted electrical signal from each image sensor pixel is processed and/or displayed on a display screen  401  and/or stored in a storage unit  402  of the system  400 . 
         [0039]      FIG. 17  illustrates a flowchart of one embodiment of a method of fabricating a photodetector comprising a phototransistor. Depending on the embodiment, additional steps in  FIG. 17  may be added, others removed, and the ordering of the steps may be changed. 
         [0040]    In step S 01 , a p-type substrate is provided. 
         [0041]    In step S 02 , an n-type buried region is formed on the substrate. 
         [0042]    In step S 03 , an n-type epitaxial region is formed on the buried region. 
         [0043]    In step S 04 , a p-type base is formed on the epitaxial region. 
         [0044]    In step S 05 , an emitter region is formed covering a portion of the base. 
         [0045]    In step S 06 , the base is electrically connected to the substrate. 
         [0046]      FIG. 18  illustrates a flowchart of one embodiment of a method of fabricating a photodetector comprising a phototransistor. Depending on the embodiment, additional steps in  FIG. 18  may be added, others removed, and the ordering of the steps may be changed. 
         [0047]    In step S 10 , a p-type substrate is provided. 
         [0048]    In step S 11 , an n-well is formed on the substrate. 
         [0049]    In step S 12 , a p-well is formed on the n-well. 
         [0050]    In step S 13 , the p-well is selectively doped to form a collector and a plurality of emitters. 
         [0051]    In steps S 14 , forming n-channel metal oxide semiconductor field effect transistors on the p-well. 
         [0052]    In step S 15 , electrically connecting the p-well to the substrate. 
         [0053]    The described embodiments are merely possible examples of implementations, set forth for a clear understanding of the principles of the present disclosure. Many variations and modifications may be made without departing substantially from the spirit and principles of the present disclosure. All such modifications and variations are intended to be comprised herein within the scope of this disclosure and the described inventive embodiments, and the present disclosure is protected by the following claims.