Abstract:
A MOS trench structure integrated with a semiconductor device for enhancing the breakdown characteristics of the semiconductor device, comprises a semiconductor substrate, a plurality of parallel trenches formed in the semiconductor substrate, a peripheral trench formed in the semiconductor substrate and spaced from and at least partially surrounding the parallel trenches, a dielectric material lining the trenches, and a conductive material substantially filling the dielectric-lined trenches.

Description:
BACKGROUND OF THE INVENTION 
     The present invention relates in general to semiconductor devices. More specifically, the present invention relates to trench structures, which can be used to enhance the performance of semiconductor devices. 
     There exist a variety of semiconductor devices commonly used in power applications. One such device is the Schottky barrier. A Schottky barrier comprises a metal-semiconductor interface, which functions as rectifier for controlling current transport. 
     A figure of merit, which is used to measure the blocking capability of a Schottky barrier rectifier is its breakdown voltage. A breakdown voltage in this context refers to the maximum reverse voltage, which can be supported across the device, while still being able to provide a blocking function. Breakdown in a Schottky barrier rectifier is normally an “avalanche” type breakdown, which is predominantly attributable to a phenomenon known as “impact ionization”. 
     FIG. 1 shows a cross section of a basic Schottky barrier rectifier  10 . A first metal layer  100  is formed on a semiconductor layer  102 . Typically, the semiconductor layer  102  is comprised of an epitaxial layer  104 , which lends itself as a drift region, and a more heavily doped substrate  106 . Heavily doped substrate  106  and a second metal layer  108  provide an ohmic contact for the device. 
     Applying a reverse bias voltage VREV across the Schottky barrier rectifier  10  creates a depletion region  110 , across which a majority of the applied voltage is dropped. As the reverse voltage is increased, electric fields in the depletion region  110  become greater. These increasing electric fields cause the charge carriers to accelerate and, if sufficiently accelerated, can cause the creation of electron-hole pairs by collision with dopant atoms. The more carriers that are generated, the more carriers having sufficient energy to cause impact ionization there become. Hence, impact ionization is a snowball effect, whereby a cascade of electron-hole pairs are created by a succession and multiplication of collisions. A point is eventually reached where the rate of impact ionization is so great that the device cannot support any further reverse bias applied across it. This voltage limit is commonly referred to in the art as the “avalanche breakdown voltage”. 
     The basic Schottky barrier rectifier  10  shown in FIG. 1 is limited by its reverse blocking capability, since electric fields tend to converge at the edges of the metal layer  100 . Because of this, techniques for terminating the Schottky barrier rectifier have been sought. Two commonly used techniques, which reduce the edge effects are a local oxidation of silicon (LOCOS) structure and the diffused field ring structure described in “Modern Power Devices” by B. J. Baglia, 1987, Reprinted Edition, pp. 437-438. These two approaches are shown here in FIGS. 2 and 3. Each of these prior art techniques has the effect of reducing electric field crowding at the metal edges and, consequently, a higher breakdown voltage is achieved. 
     A technique proposed to achieve even better reverse blocking capabilities in a Schottky barrier rectifier is described in Wilamowski, B. M., “Schottky Diodes with High Breakdown Voltages,”  Solid State Electron.,  26, 491-493 (1983). A cross section of the structure proposed in this article, referred to as a Junction Barrier Controlled Schottky Rectifier (i.e. “JBS rectifier”), is shown here in FIG. 4. A series of p-type regions  400  are formed in and at the surface of the drift region  402  of the device. These p-type regions  400  act as screens to lower the electric field near the surface. Since electric fields at the surface are what determine the breakdown voltage of the device, introduction of the p-regions  400  results in a higher breakdown voltage. 
     An undesirable characteristic of the JBS rectifier relates to the p-n junctions, which are formed between the p regions  400  and the drift region  402 . For silicon devices having a high reverse breakdown voltage, a forward bias exceeding 0.7 volts is required before a reasonable forward conduction current of the Schottky barrier can be realized. Unfortunately, voltages higher than 0.7 volts have the effect of turning on the p-n junctions. When on, minority carriers are introduced, which slow the switching speed of the device. A reduction in switching speed is undesirable, particularly if the Schottky barrier rectifier is to be used in switching applications such as, for example, switch-mode power supplies. 
     To overcome the forward bias limitations associated with the JBS rectifier, an alternative device structure has been proposed, which utilizes a series of parallel metal oxide semiconductor (MOS) trenches in replace of the p-type regions. This MOS Barrier Schottky Rectifier (i.e. “MBS rectifier”) is proposed in B. J. Baliga, “New Concepts in Power Rectifiers,”  Proceedings of the Third International Workshop on the Physics of Semiconductor Devices,  November 24-28, World Scientific Publ. Singapore, 1985. A cross-section of an MBS rectifier  50  is shown in FIG.  5 A. It comprises a first metal layer  508 , over which a semiconductor layer  502  is formed. Typically, the semiconductor layer  502  is comprised of an epitaxial layer  504 , which lends itself as a drift region, and a more heavily doped substrate  506 . Heavily doped substrate  506  and first metal layer  508  provide an ohmic contact for the device. MBS rectifier  50  also includes a number of parallel trenches  512  formed in epitaxial layer  504 , each of which has an end that terminates (or “merges”) with a termination trench  514 , which includes a segment that runs essentially perpendicular to the parallel trenches  512 . Termination trench  514  and parallel trenches  512  are lined with a dielectric  516 , e.g. silicon dioxide, and are filled with a conductive material  518 , e.g. metal (as shown in FIG. SA) or doped polysilicon. A second metal layer  520  is formed over the entire surface of the structure. Note that in FIG. 5A, metal layer  520  is shown as only partially covering the surface. However, this is done so that underlying elements of the rectifier  50 , which would otherwise be covered by metal layer  520 , can be seen. The metal/semiconductor barrier of MBS rectifier  50  is formed at the junction between second metal layer  520  and upper surfaces of mesas  522  formed between parallel trenches  512 . 
     In many respects, the MBS rectifier is superior to the JBS rectifier. However, it too has limits on its reverse blocking capabilities. These limits can be illustrated by reference to FIG. 5B, which shows a top or “layout” view of the MBS rectifier in FIG.  5 A. The arrows, at the ends of mesas  522 , which point at labels “E” (“E” electric field), are present to show how under reverse bias conditions, electric fields tend to crowd toward the ends of mesas  522 . This electric field crowding phenomenon is due to faster depletion in these regions, compared to other regions in semiconductor layer  502 . Accordingly, the breakdown voltage of the MBS rectifier shown in FIG. 5A is determined and, therefore, limited by the trench structure geometry illustrated in FIG.  5 B. 
     SUMMARY OF THE INVENTION 
     Generally, a broken trench structure enhances the breakdown characteristics of semiconductor devices, according to various aspects of the present invention. For example, as explained in more detail below, a Schottky barrier rectifier, when integrated with the broken trench aspect of the present invention, shows enhanced reverse blocking capabilities, compared to that achievable in prior art structures. 
     According to a first aspect of the invention, a MOS trench structure integrated with a semiconductor device for enhancing the breakdown characteristics of the semiconductor device comprises a semiconductor substrate; a plurality of parallel trenches formed in the semiconductor substrate, each parallel trench defined by end walls, sidewalls and a bottom and each two adjacent parallel trenches separated by mesas containing the semiconductor device, said mesas having a mesa width; and a peripheral trench defined by ends, sidewalls and a bottom, said peripheral trench at least partially surrounding the parallel trenches, and said peripheral trench being spaced from the ends of the parallel trenches by a parallel trench to peripheral trench spacing; a dielectric material lining the ends, bottoms and sidewalls of the parallel and peripheral trenches; and a conductive material substantially filling the dielectric-lined trenches. 
     This aspect of the invention and others, together with a further understanding of the nature and the advantages of the inventions disclosed herein is described now in reference to the remaining portions of the specification and the attached drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a cross-sectional view of a basic Schottky barrier rectifier; 
     FIG. 2 is a cross-sectional view of a Schottky barrier rectifier having a local oxidation of silicon (LOCOS) structure for reducing edge effects; 
     FIG. 3 is a cross-sectional view of a Schottky barrier rectifier having a diffused field ring structure for reducing edge effects; 
     FIG. 4 is a cross-sectional view of a Schottky barrier rectifier having a plurality of diffusion regions, which function together as a screen to enhance the reverse blocking capabilities of the rectifier; 
     FIG. 5A is a cross-sectional, perspective view of a MOS Barrier Schottky Rectifier; 
     FIG. 5B is a layout view of the MOS Barrier Schottky Rectifier shown in FIG. 5A; 
     FIG. 6A is a cross-sectional, perspective view illustrating integration of the broken trench structure aspect of the present invention with a Schottky barrier rectifier, according to an embodiment of the present invention; 
     FIG. 6B is a layout view of the device shown in FIG. 6A; 
     FIG. 7 is a plot showing and comparing measured breakdown voltages of a number of Schottky barrier rectifiers having trench structures similar to that shown in FIGS. 6A and 6B to a number of Schottky barrier rectifiers having trench structures similar to that shown in FIGS. 5A and 5B; and 
     FIG. 8 is a cross-sectional, perspective view illustrating integration of the broken trench structure aspect of the present invention with a double-diffused radio frequency field effect transistor. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     Referring first to FIG. 6A, there is shown a semiconductor device structure  60  comprising a Schottky barrier rectifier integrated with a MOS trench structure, according to an embodiment of the present invention. Device structure  60  comprises a first metal layer  600 , over which a semiconductor layer  602  is formed. Semiconductor layer  602  may comprise a single layer of silicon or, as shown in FIG. 6A, may comprise an epitaxial layer  604  (or “drift” region) and a more heavily doped substrate  606 . Heavily doped substrate  606  and first metal layer  600  provide an ohmic contact for the device. Device structure  60  also includes a MOS trench structure comprising a plurality of parallel trenches  612  and a peripheral trench  614  formed in epitaxial layer  604 . Peripheral trench  614  has predetermined dimensions and spacings from parallel trenches  614 , the preferred of which are provided below. Peripheral trench  614  and parallel trenches  612  are lined with a dielectric  616 . These dielectric-lined trenches are filled with a conductive material (not shown in FIG. 6A) such as, for example, metal or doped polysilicon. Although not shown in FIG. 6A, a second metal layer is formed over the entire surface of the device structure. A metal/semiconductor barrier is formed at the junction between the second metal layer and upper surfaces of mesas  618 , which are formed between parallel trenches  612 . 
     A top or “layout” view of the Schottky barrier rectifier in FIG. 6A is shown in FIG.  6 B. As shown, parallel trenches  612  have widths W T , are separated by mesa widths W M , and are spaced away from peripheral trench  614  by gaps having a dimension W G . These gaps function to reduce the electrical field crowding effect observed in the prior art MBS rectifier shown in FIGS. 5A and 5B. In a preferred embodiment, W G  is approximately equal to W M /2. 
     Using the “broken trench” structure shown in FIGS. 6A and 6B results in a substantially higher breakdown voltage than that which is obtainable using the prior art trench structure shown in FIG.  5 B. FIG. 7 compares the measured breakdown voltages of a number of Schottky barrier rectifiers having a trench structure similar to that shown in FIGS. 6A and 6B to a number of Schottky barrier rectifiers having a trench structure similar to that shown in FIGS. 5A and 5B. For these exemplary samples, it is seen that the breakdown voltage is over 10 volts higher than the breakdown voltages of samples having the prior art trench structure. 
     The “broken trench” aspect of the present invention is not limited to use in Schottky barrier rectifier type devices. Indeed, the inventor of the present invention has contemplated that such a “broken trench” structure may be integrated with any other semiconductor device that would benefit from its presence. The basic concept is that comprising a series of parallel trenches and a perpendicular trench formed in a semiconductor layer. An example of an application of this aspect of the invention is shown in FIG.  8 . 
     FIG. 8 illustrates integration of such a trench structure with a double-diffused radio frequency field effect transistor (i.e. RF FET), according to another embodiment of the present invention. RF FET is a vertical device and comprises source regions  800  having a first conductivity type (e.g. n-type) formed in wells  802  having a second conductivity type (e.g. p-type); a drain  804  of the first conductivity type having a drain contact  806 ; an epitaxial layer  808  of the first conductivity type formed between wells  802  and drain  804 ; and a gate  810  overlying a gate oxide  812 . Although not shown in FIG. 8, source regions  800  are interconnected to form a single source. Operation of the RF FET itself is known in the art and, therefore, will not be discussed here. 
     Integrated with the RF FET are a series of parallel trenches  814  and a peripheral trench  816 , which form a MOS trench RE FET  80 , in accordance with another embodiment of the present invention. Peripheral and parallel trenches  816  and  814  are lined with a dielectric  818 . These dielectric-lined trenches are filled with a conductive material (not shown in FIG. 8) such as, for example, metal or doped polysilicon. Also, although not shown in FIG. 8, a conductive material is formed over the entire upper surface of the RE FET structure  80 . 
     While the above is a complete description of the preferred embodiments of the invention, various alternatives, modifications, and equivalents may be used. For example, the basic “broken trench” aspect of the present invention may be integrated with other types of semiconductor devices to enhance their breakdown characteristics. Accordingly, in no way should the broken trench aspect of the present invention, be viewed as only applying to the Schottky barrier rectifier and RF FET device examples provided herein. For this and other reasons, therefore, the above description should not be taken as limiting the scope of the invention, which is defined by the appended claims.