Abstract:
A VLSI package assembly comprising a package substrate carrying thereon an IC chip, a mother board supporting thereon the package substrate, and a connection means for providing electric connection between the substrate and the mother board. The connections means has a high durability against stresses thereby to keep its electric connection even in the face of difference in thermal expansions appearing within the package substrate and mother board.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a circuit assembly including a VLSI package in which a package substrate carries an IC chip on one major surface thereof while a plurality of connection pads are provided on the other major surface thereof in a two-dimensional format. 
     2. Description of the Related Arts 
     Recently, the degree of integration of the VLSI has been more enhanced and accordingly the number of the connection pins per one IC package substrate has been much increased. The connection pins are formed on the bottom surface of the IC package substrate in a two-dimensional manner so as to suppress the largeness of the size of the package substrate. An example of such a two-dimensional arrangement of the connection pin is the so-called “pin grid array (PGA)”. The PGA technique is so effective in enhancing the degree of integration of a VLSI since such technique can avoid the situation in which the pitch between the connection pins becomes too narrow because of the two-dimensional arrangement of the connection terminals. 
     However, there is still encountered some constructive restrictions such as restriction in the pitch length and difficulty in providing signal lines between the connection pins when the PGA package is to be mounted on a mother board i.e. a printed circuit board, because of restrictions in the mounting arrangement within the mother board. 
     Therefore, there have been developed the surface mount type PGA, the land grid array (LGA), etc. In the LGA arrangement, no pin is used, but only pads are provided for electric connections to the mother board thereby to avoid the restriction encountered in the PGA assembly. However, the LGA assembly needs connectors, which causes a substantial increase in the size of the overall assembly, and unreliable electric connections. 
     In order to solve the above-mentioned problem having occurred in the LGA arrangement, there has developed the so-called ball grid array (BGA). In the BGA assembly, a package substrate carrying an IC chip on one major surface thereof is provided on the other surface thereof with a plurality of solder bumps arranged in a two-dimensional manner. The BGA arrangement is advantageous because of its electric characteristics of low capacitance and low inductance, and is welcomed as a package of a low cost. 
     FIGS. 1A and 1B are respectively sectional and plan views showing an exemplary arrangement including a VLSI package assembly with the BGA. FIGS. 2A through 2C are sectional views each showing in an enlarged scale an electrical connection assembly provided between a package substrate and a mother board. 
     Referring now to FIG. 1A, there is shown a BGA package  50  which includes an IC chip  51  connected through a plurality of soldering bumps  52  mounted on one major surface of a package (PKG) substrate  53 . The IC chip  51  is embedded within a plastic mold  58 . On the other major surface of the PKG substrate  53  are formed a plurality of soldering bumps  55  for PKG I/O connection in such a two-dimensional format as shown in FIG.  1 B. These soldering bumps  55  interconnect the PKG I/O pads  54  formed on the PKG substrate  53  and the mother board I/O pads  57  as clearly seen from FIG.  2 A. 
     It is, in this instance, to be noted that the surfaces of the PKG I/O pads  54  and the mother board I/O pads  57  may be independently treated through a treatment process such as the normal (continuous current supplied) or flashing (intermittent current supplied) plating process with gold by the respective parts suppliers. 
     A soldering resist layer  60  covers the major surface of the PKG substrate  53  confronting the mother board  56  but other than central portions of the respective pads  54 . A soldering resist layer  61  covers the major surface of the mother board  56  confronting the PKG substrate  53  but other than the central portions of the respective pads  57 . These soldering resist layers  60  and  61  are effective for preventing the PKG I/O connection soldering bump  55  from adhering to the PKG substrate and mother board  56 . 
     FIG. 2C is a plan view of the arrangement of FIG. 2A along a line A—A appearing in FIG.  2 A. As seen from FIG. 2C, the mother board I/O pad  57  includes a soldering connection part  57   a  which is to be connected with the soldering bump  55  and an external connection part  57   b . It is now to be understood that a central portion of the soldering connection part  57   a  is exposed to the outside through an aperture  60   a  of the soldering resist  61  so that the central portion can be connected with the soldering bump  55 . 
     When it is intended to electrically connect the PKG substrate  53  and the motor board  56 , they are so positioned relative to each other that the PKG I/O pads  53  and the mother board I/O pads  57  confront each other, respectively and they are temporarily fastened to each other by an appropriate tool (not shown). Thereafter, the soldering bumps  55  are provided through a process such as reflowing process so as to provide electrical connection between the PKG I/O pads  54  and the mother board I/O pads  57 . 
     It is to be noted that the BGA package is subjected to abrupt temperature changes when the PKG substrate  53  and the mother board  56  are electrically connected to each other through the reflowing process of the soldering bumps  55 . Furthermore, the BGA package might be used within an apparatus which is subject to such abrupt temperature changes. When the BGA package is used within such apparatus being subject to abrupt temperature changes, there may arise non-uniform temperature distribution because of heat caused by operation of the BGA package. In such situation, various stresses appear within the bumps  55  because of differences in thermal expansion between the PKG package substrate  53  and the mother board  56  and therefore such a problem arises that some connecting areas or portions between the soldering bumps and the pads are peeled off. 
     On the other hand, the enhancement of the integration degree of the VLSI causes decrease in size of soldering connection part  57   a  which is shown in FIG.  2 C. Thus, the dimension of the connecting area between the soldering bump  55  and the soldering connection part  57   a  decreases. When such BGA package with such narrow connection areas at the soldering connections is used in an apparatus, such as a portable device, which is subject to shocks because of dropping, the BGA package might be subject to breakage in the electrical connections between the pads  54  and  57 . 
     As shown in more detail in FIG. 2B, it happens because of the abrupt changes in temperature and/or mechanical shocks that a gap  61  appears between the soldering bump  55  and the pad  57  thereby to destroy the electrical connection therebetween. 
     It is now apparent that there has been such a problem in a prior art package that electrical disconnection is liable to occur between the pads  54  and  57 . 
     OBJECTS AND SUMMARY OF THE INVENTION 
     Accordingly, an object of the present invention is to provide a VLSI package assembly which can surely keep the electrical connection between the PKG substrate and the mother board while the connection terminals or pads are arranged in a two-dimensional format. 
     According to the present invention, an improved VLSI package assembly is provided which comprises a PKG substrate carrying on one major surface thereof an IC chip and having a plurality of first connection pads arranged in a two-dimensional format; a mother board having a plurality of second connection pads two-dimensionally arranged on one surface thereof confronting said other surfaced of the PKG substrate; and connection elements electrically connecting between the first and second connection pads, wherein an electric connecting assembly constituted by said first and second connections pads and said connection elements includes an anti-stress structure with a high durability against stresses occurring therein. 
     According to one aspect of the present invention, one of the first and second pads has a smaller exposed area for soldering than the other in case said one is treated with an electrolytic plating process but the other is treated with a non-electrolytic plating process. With this arrangement, connection strength at the respective connection of the respective first and second connection pads with the soldering elements is kept substantially uniform. This is based on a finding that the solder can adhere to the surface of the connection pad plated with a metal such as gold through the electrolytic process more strongly than to the surface of the connection pads plated with the same metal through the non-electrolytic process. 
     According to a second aspect of the present invention, there formed a second connection pad on the major surface of the mother board confronting the major surface of the PKG substrate on which a first connection pad is formed and the second connection pad includes a resilient structure. That is, the second connection pad is not separated from the connection element even though a stress appears in the electric connection assembly because of difference in thermal expansion between the PKG substrate and the mother board since the stress is absorbed by the resilient structure. In other words, the electric connection by means of solder between the first and second connection pads is securely kept. 
     According to a third aspect of the present invention, the resilient structure is constituted by the first and second connections pads and the connection elements such as a solder piece and the second connection pad includes a resilient flat plate which is divided into two pieces. 
     According to a fourth aspect of the present invention, the resilient structure is constituted by the first and second connection pads and the connection elements and the second connection pad includes a resilient flat plate which is divided into two pieces which are apart from each other. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIGS  1 A and  1 B are respectively sectional and partial plan views for showing a prior art. 
     FIGS. 2A and 2B are sectional views each showing a single electric connection arrangement including a solder bump interconnecting I/O pads which are respectively provided on the PKG substrate and the mother board. 
     FIG. 2C is a plan view showing a single I/O pad along a line A—A appearing in FIG.  2 A. 
     FIG. 3A is a sectional view showing a first embodiment of the present invention. 
     FIG. 3B is a sectional view showing in an enlarged scale a single electric connection arrangement including a solder bump interconnecting pads respectively formed on the PKG substrate and the mother board shown in FIG.  3 A. 
     FIGS. 4A and 4B are respectively sectional and partial plan views showing a second embodiment of the present invention. 
     FIGS. 5A and 5B are respectively sectional and partial plan views showing third embodiment of the present invention. 
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
     Referring to the drawings, there will be explained in detail preferred embodiments of the present invention in the followings. 
     FIGS. 3A and 3B are sectional views of a VLSI package (BGA package) assembly of a first embodiment according to the present invention. FIG. 3A shows a sectional view of the VLSI package assembly and FIG. 3B is a sectional view showing a part of the VLSI package assembly in an enlarged scale. In this first embodiment, a BGA package  10  includes an IC chip  11  which is mounted on one major surface of a PKG substrate  13  and connected to an electric circuit carried by the substrate  13  through a plurality of solder bump  12 . The IC chip  11  is embedded within a plastic mold  18  so as to be sealed from the outside. On the other surface of the other surface of the PKG package  13  there are provided a plurality of I/O connection solder bumps  15  (connection element) in a two-dimensional format as in the BGA package  30  shown in FIG.  1 B. As seen from FIGS. 3A and 3B, the I/O connection solder bumps  15  interconnect PKG I/O connection pads (first connection terminals)  14  formed on the PKG substrate  13  and mother board I/O connection pads (second connection terminals)  17  formed on the mother board  16 . 
     It is to be understood that each of the mother board I/O pads  17  has a connection area exposed to the outside through the aperture of the solder resist  60  which is larger than the connection area of the corresponding PKG I/O connection pads  14 . In other words, each of the mother board I/O connection pads  17  is connected with the solder bump  15  through a connection area which is wider than that between each of the PKG substrate connection pads  14  and the solder bump  15 . In this arrangement, the surfaces of the respective PKG I/O connection pads  14  are already or previously treated by an electrolytic plating process with a metal such as gold. On the other hand, the surfaces of the respective mother board I/O connections pads  17  are already or previously treated by a non-electrolytic plating process with, for example, the same metal as for the pads  14 . 
     In order to define the exposed connection area of each of the PKG I/O pads  14 , a solder resist layer  19   a  is formed on the major surface of the PKG substrate  13  on which the PKG I/O pads  14  are formed. Further, a solder resist layer  19   b  is formed on the major surface of the mother board  16  on which the mother board I/O connection pads  17  are formed so as to define the exposed connection area of each of the pads  17 . It is to be understood that the solder resist layers  19   a  and  19   b  prohibit the soldering material from contacting with the surfaces of the PKG substrate  13  and mother board  16  when the solder bumps  15  are formed between the substrate  13  and the board  16 . 
     In the process for providing electrical connections between electric circuits mounted on the PKG substrate  13  and the mother board  16 , the PKG substrate  13  is positioned relative to the mother board  16  so that the PKG I/O pads  14  and mother board I/O pads  17  respectively confront each other and then the PKG substrate  13  is fixed by means of an appropriate tool (not shown) relative to the mother board  16 . Then welded soldering material is supplied through a method such as the reflowing between the pads  14  and pads  17  thereby to form the solder bumps  15  providing electric connection between the pads  14  and  17 . 
     It is now apparent from the above-mentioned first embodiment that when the first and second groups of pads  14  and  17  have been treated by different surface treatment processes such as electrolytic and non-electrolytic plating processes respectively, the exposed connection areas of the respective first and second groups of pads are different from each other in size or dimension. When, in other words, the first groups of pads  14  are treated by an electrolytic soldering process and the second group of pads  17  have been treated by a non-electrolytic soldering process, the exposed connection area of each of the pads  14  is smaller than that of the pad  17  so that the adhesion degree between the solder bumps  15  and pads  14  is similar to that between the solder bumps  15  and the pads  17  whereby the adhesion degrees of the solder bumps  15  with the pads  14  and  17  are rather uniform. Therefore, the connection assemblies between substrate  13  and board  16  is durable against possible stresses appearing around the solder bumps  15  because of the different amount of thermal expansions of the substrate  13  and board  16  or against possible shocks caused by dropping of the device including the particular VLSI assembly. 
     FIG. 4A is a sectional view of an electric connection arrangement of a BGA package assembly of a second embodiment of the present invention. FIG. 4B is a plan view of a pad  21  formed on a major surface of a mother board  16  In FIGS. 4A and 4B, the same reference numerals as in FIGS. 3A and 3B are used for designating counterparts of the assembly of FIGS. 3A and 3B appearing in FIGS. 4A and 4B. 
     This BGA package assembly  20  of the second embodiment is different from the BGA package assembly  10  of the first embodiment in shape with respect to the mother board I/O pads  21 . The former includes a deformable structure. 
     As seen from FIGS. 4A and 4B, each of the mother board I/O pads  21  of the second embodiment is made of a flat and preferably resilient metal member and includes a fixed part  21   a  and a tongue part  21   b . The fixed part  21   a  is fastened to the mother board  16  and the resilient tongue part  21   b  is preferably resiliently connected to the fixed part  21   a  at an external terminal part  21   c . The external terminal part  21   c  extends further to be integral with a circuit pattern (not shown). The tongue part  21   b  is separable from the fixed part  21   a . Thus, the mother board I/O pads  21  respectively include deformable structure. 
     In this embodiment, each of the mother board I/O pads  21  is made of a flat metallic member, which is divided into the annular outer part  21   a  and the circular tongue part  21   b . The circular tongue part  21   b  is separated or separable from the annular outer part  21   a  through a chemical method such as etching. In this instance, it is to be understood that the solder bump  15  is adhered both to the outer and the inner parts  21   a  and  21   b.    
     In the second embodiment, the mother board I/O pad  21  includes the tongue part  21   b  that is separated or separable from the fixed part  21   a , and therefore the tongue part  21   b  can absorb stress or force caused by the terminal expansions of the PKG substrate  13  and mother board  16  or dropping of the BGA package  20 . Even when the mother board I/O pad  21  is displaced relative to the PKG I/O pad  14  the electrical connection between the solder bump  15  and tongue part  21   b  can be kept because the tongue part  21   b  is peeled off from the mother board  16  and is separated from the outer part  21   a , as seen from FIG.  4 A. 
     FIG. 5A is a sectional view of a third embodiment of the electrical connection assembly including a solder bump  15  interconnecting the pad  14  formed on the PKG substrate  13  and a mother board I/O pad  31  formed on the mother board  16 . In this embodiment, the mother board I/O pad  31  is made of a flat and preferably resilient metal member and includes a fixed part  31   a , which is fixed to the mother board  16 , and a tongue part  31   b  which is separated from the fixed part by means of a slit  31   d  formed therebetween through a mechanical cutting such as the laser cutting but connected to the fixed part  31   a  only at an external connection part  31   c . The external connection part  31   c  is integral with an external circuit pattern (not shown). Therefore, the tongue part  31   b  is separated from the fixed part  31   a  only when the tongue  31   b  is subjected to a stress. 
     In this third embodiment, the tongue part  31   b  is separated from the fixed part  31   a  because of breakage of the bump  15  in case the electrical connection assembly is subjected to a stress or force because of thermal expansions of the PKG substrate  13  and the mother board  16  under abrupt changes in the environmental temperature or shocks because of dropping of the device, whereby the electrical connection within the electrical connection assembly is kept since the solder bump  15  continues to contact with at least the tongue  31   b.    
     It is now to be understood that the pad  14  on the PKG substrate  13  may be modified to have a similar structure as in the pad  21  or  31 , if desired. That is, the pad  14  may be separated or separable into an outer annular part and an inner circular part. The outer annular part is fixed to the substrate  13  while the inner circular part is separated or separable from the outer annular part. 
     In the third embodiment, the slit  31   d  is formed by the mechanical cutting such as the laser cutting so as to form the fixed part  31   a  and tongue part  31   b  and accordingly the manufacturing process is rather simpler than that for the second embodiment. 
     Furthermore, a specific treatment may be applied to the surface of the mother board  16  so that the tongue part  31   b  can be more readily peeled from the mother board  16  than the fixed part  31   a.    
     In the VLSI assembly according to the present invention, the electric connection pad is separable into two parts such as central and peripheral parts so that the central part can be separated from the peripheral part thereby to absorb stresses or forces applied to the assembly.