Abstract:
The past print data of plural heating resistance elements adjacently disposed are stored and latched in first latching circuit, the present print data is stored and latched in second latching circuit, and corresponding to the latched outputs of these first and second latching circuits, when the heating resistance elements have printed in the past and when the heating resistance elements adjacently to both sides of each heating resistance element are presently used in printing, it is controlled so as to shorten the driving time. As a result, blurring of the print due to excessive temperature rise of the heating resistance elements may be suppressed. Hence, the printing quality may be enhanced.

Description:
This is a continuation of application Ser. No. 08/376,607 filed on Jan. 26, 1995, now abandoned, which is a continuation of Ser. No. 07/902,463 filed on Jun. 19, 1992, now abandoned, which is a continuation of Ser. No. 07/491,213 filed on Mar. 9, 1990, now abandoned. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to an apparatus for driving a thermal head of a thermal printing apparatus used, for example, as a printer for a word processor or a typewriter, or in a facsimile receiver. 
     2. Description of the Prior Art 
     In selective driving of plural heating resistance elements disposed adjacently in time sequence according to the data given to each heating resistance element, when the same heating resistance element is driven for a specific time plural times continuously, blurring of printing becomes large in the latter printing dots, and the quality of printing is lowered. 
     The prior art for solving this problem is disclosed, for example, in the Japanese Laid-open Patent No. 59-150768. In this prior art, the printing data for a specified number of preceding lines are stored with regard to each heating resistance element, and when printing has been done in the past by energizing a specific heating resistance element, the subsequent driving time is shortened. 
     In such prior art, although the driving time is controlled so that the blurring of the printed dots may be smaller on the basis of the past printing data of each heating resistance element, the printing quality is not sufficient yet. 
     Besides, in such prior art, in the case of discontinuous printing, since the previous print data is stored, the stored data must be cleared by using dummy data prior to writing of next print. 
     SUMMARY OF THE INVENTION 
     It is hence a primary object of the invention to present a driving apparatus of thermal head capable of enhancing the printing quality by eliminating the blurring of the print by the heating resistance elements. 
     An embodiment of the invention presents, therefore, a driving apparatus of thermal head for selectively driving plural heating resistance elements adjacently disposed on the basis of the printing data given in the time sequence to each heating resistance element, comprising: 
     first latching means L12, L13 for latching the past print data; 
     second latching means L11 for latching the present print data; and 
     means for driving the heating resistance element in response to the latched outputs of the first and second latching means, by selecting the driving time of the heating resistance elements from preset plural driving times mutually differing in the durations, on the basis of the combination of the past print data stored in the first latching means for each heating resistance element, and the present print data stored in the second latching means for the heating resistance elements adjacent to both sides of the heating resistance element. 
     An embodiment of the invention also presents a driving device of thermal head comprising: 
     plural heating resistance elements 2 adjacently disposed in a straight linear row; 
     a print data generating source D1 for sequentially generating the print data of each heating resistance element of one row, in every time W1; 
     first latching means L11 for latching the print data for one row from the print data generating source, in first time W1 (j); 
     second latching means L12 for latching in parallel the print data stored in the first latching means L11, in second time W1 (j-1) before the first time W1 (j); 
     a circuit 6, 7 for calculating and setting the driving time in each time W1 corresponding to the print data stored in first latching cells Ai-1, Ai+1 in the first latching means L11 for the heating resistance elements Ri-1, Ri+1 adjacent to both side of the heating resistance element Ri, and the print data stored in second latching cell Bi in the second latching means L12 for the heating resistance element Ri, when the print data for energizing the heating resistance element Ri is stored in each latching cells Ai individually corresponding to the heating resistance element Ri of the first latching means L11; and 
     driving means 3, 8 for driving the heating resistance element Ri only for the calculated driving time, responding to the output of the driving time calculating and setting circuit 6, 7. 
     Preferably, the driving time calculating and setting circuit 6, 7 comprise: 
     a pulse generating circuit for generating driving control pulses CTRL1 to CTRL5 possessing each pulse width of plural types for each time W1; 
     a selecting switch 7 for selecting the driving control pulses from the pulse generating circuit, leading out and giving to the driving means 3, 8; and 
     an arithmetic circuit 6 for determining the switching state of the selecting switch 7, in response to the print data of the first latching cells Ai-1, Ai+1 and the second latching cell Bi. 
     Further preferably, there is also third latching means L13 for storing in parallel the print data stored in the second latching means L12 in third time W1 (j-2) before the second time W1 (j-1); and 
     the driving time calculating and setting circuit 6, 7 calculate and set the driving time, in response to the print data stored in the third latching cell Ci in the third latching means L13 for the heating resistance element Ri. 
     According to an embodiment of the invention, the past print data of each heating resistance element is stored and latched in the first latching means, the present print data is stored and latched in the second latching means, and when each heating resistance element has printed in the past in response to the latched output of these first and second latching means, and when the heating resistance elements adjacent to both sides of each heating resistance element are printed at the present, it is controlled to shorten the printing time. As a result, blurring of the print due to excessive temperature rise of the heating resistance element may be suppressed. Hence, the printing quality may be enhanced. 
     In an embodiment of the invention, therefore, when each heating resistance element has been used in printing in the past, and when adjacent heating resistance elements are used in printing, it is controlled to shorten the driving time, and hence blurring of the print due to excessive temperature rise of the heating resistance element may be prevented, so that the printing quality may be enhanced. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     These and other objects of embodiment of the invention, as well as the features and advantages thereof, will be better understood and appreciated from the following detailed description taken in conjunction with the drawings, in which: 
     FIG. 1 is a block diagram of one of the embodiments of the invention; 
     FIGS. 2(1)-2(3) and FIGS. 3(1)-3(3) are diagrams for explaining the operation of shift register S1 and latching circuits L11 to L13; 
     FIGS. 4(1)-4(5) are waveform diagrams of a control signal which is led out from control output terminals CTL1 to CTL5 of a processing device 5; 
     FIG. 5 is a drawing showing a part of each latching cell of latching circuits L11 to L13; and 
     FIGS. 6(1)-6(16) are drawings showing a latching cell for explaining the operation of an arithmetic circuit 6. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring now to the drawings, a preferred embodiment of the invention is described in detail below. 
     FIG. 1 is a block diagram of an embodiment of the invention. Adjacently to a thermal head 1, there are plural heating resistance elements 2 disposed in a straight linear form. At one end of the heating resistance elements 2, being commonly connected, a potential of one polarity +Vc of a direct-current power supply is applied. At the other end of each heating resistance element 2 (collectively expressed by reference numeral 2, and individually identified as R1, Ri, etc.), a driving circuit 3 is connected individually. 
     This driving circuit 3 sets the other end of the heating resistance element 2 at ground potential or high impedance. A controlling means 4 is connected to the driving circuit 3. This controlling means 4 controls the driving time in which the driving circuit 3 sets the other end of the heating resistance element 2 at the ground potential. This driving time is determined, as described later, on the basis of the past print data of each heating resistance element 2 (the print data stored in the first latching means) and the present print data of the heating resistance elements 2 adjacent to both sides (the print data stored in the second latching means). 
     A processing device 5 is realized by a microcomputer or the like, and from its data output terminal D1 to the shift registers S1, S2, . . . of integrated circuits IC1, IC2, . . . , the data is led out in bit series synchronously with the clock signal CLOCK. The clock signal CLOCK of the processing device 5 has the waveform as shown in FIG. 2 (1), and it causes to lead out the data in bit sequence from the data output terminal D1 synchronously with each clock signal CLOCK, and a total of n pieces of print data C1 to Cn are transferred to the shift register S1 in time W1 (j-2)  FIG. 2 (2)!. 
     At time t1  FIG. 2 (3)!, when a latched output is delivered from the latched output terminal LATCH of the processing device 5, the latch actions are sequentially effected at three latching circuits L11, L12, L13  FIG. 3 (1)!. That is, the latching circuit L11 latches the print data C1 to Cn of the shift register S1, and the latching circuit L12 latches the print data D1 to Dn stored in the latching circuit L11. The other latching circuit L13 latches the print data E1 to En latched in the latching circuit L12. 
     Consequently, from the data output terminal D1, the print data B1 to Bn are transferred to the shift register S1 in time W1 (j-1). At time t2, when the latched output is delivered, in each one of latching circuits L11 to L13, the latching action is effected as shown in FIG. 3 (2). Similarly, at time t3, the latch action is effected as shown in FIG. 3 (3). 
     That is, at time t3, as shown in FIG. 3 (3), the present (j) print data A1 to An are stored in the latching circuit L11, while in the latching circuit L12, the previous (j-1) print data B1 to B2 are stored, and the second previous (j-2) print data C1 to Cn are latched in the latching circuit L13. Thus, in each line of the heating resistance elements 2 of the thermal head 1, the latch action is effected in time sequence as indicated by reference codes j, j-1, j-2. 
     The arithmetic circuit 6 in the controlling means 4 for one heating resistance element R1 is provided with data Ai, Bi, Ci stored in the latching circuits L11, L12, L13 corresponding to the heating resistance element Ri, and is also provided with data Ai-1 and Ai+1 stored in the latching circuit L11 for the heating resistance elements Ri-1, Ri+1 adjacent to both ends of the heating resistance element Ri. In the subsequent explanation, each latching cell of the latching circuits L11 to L13 may be expressed by the same reference number as the print data. 
     The arithmetic circuit 6 determines the switching mode of the selecting switch 7 on the basis of the signals from these latching cells Ai, Ai-1, Ai+1, Bi, Ci. From output terminals CTL1 to CTL5 of the processing device 5, signals of drive control pulses expressing the driving times shown in FIG. 4 (1) to FIG. 4 (5) are generated at the end of latching drive after data transfer. One of the control signals CTL1 to CTL5 selected by the selecting switch 7 is given to the driving circuit 3 by way of the comparating circuit 8. 
     The comparating circuit 8 is made to conduct when the latching cell Ai of the latching circuit L11 is at H level to be printed and also when the output signal STROBE of the processing device 5 is at H level to be printed, and accordingly the driving circuit 3 electrically energizes the other end of Ri to set at the ground potential only for the duration predetermined by the control signal, selected by the selecting switch 7. 
     The arithmetic circuit 6 gives a selecting signal for selecting the drive control pulse possessing each driving time from the output terminals CTL1 to CTL5 to the selecting switch 7 according to FIG. 6 and Table 1, on the basis of the data of latching cells Ai-1, Ai+1 adjacent to both ends of the latching cell Ai corresponding to the latching circuit L11 in which the present (j) print data corresponding to the heating resistance elements Ri to be driven is latched, the data of the latching cell Bi corresponding to the latching circuit L12 in which the previous (j-1) print data is stored, and the data of the latching cell Ci of the latching circuit L13 in which the second previous (j-2) print data is stored. 
     FIG. 6 (1) to FIG. 6 (16) represent the latching cells shown in FIG. 5, and the latching cell Ai latching the present data corresponding to the heating resistance element Ri is to be printed, and hence it is at H level, and this latching cell Ai is indicated by shaded area, the latched data, at H level to be printed, of the latching cells Ai-1, Ai+1, Bi, Ci used in selection of driving time is indicated by dark area, while the white area shows that the data to be present is not present, at level L, and in particular the data latched in the latching cells Bi-1, Bi+1 , Ci-1, Ci+1 are not used in the operation in the arithmetic circuit 6. 
     
                       TABLE 1______________________________________  Latched    Adjacent  data       dot data     Drive control pulseFIG. 6 Ci    Bi     Ai  Ai - 1 Ai + 1                                FIG. 4______________________________________  *     *      0   *      *     OFF (zero)(1)    0     0      1   0      0     (1)(2)    0     0      1   0      1     (2)(3)    0     0      1   1      0     (2)(4)    0     0      1   1      1     (3)(5)    0     1      1   0      0     (2)(6)    0     1      1   0      1     (3)(7)    0     1      1   1      0     (3)(8)    0     1      1   1      1     (4)(9)    1     0      1   0      0     (1)(10)   1     0      1   0      1     (2)(11)   1     0      1   1      0     (2)(12)   1     0      1   1      1     (3)(13)   1     1      1   0      0     (3)(14)   1     1      1   0      1     (4)(15)   1     1      1   1      0     (4)(16)   1     1      1   1      1     (5)______________________________________ 
    
     Thus, when printed in the past, that is, when the past print data Bi or Ci corresponding to the heating resistance element Ri is at H level, it is controlled so as to shorten the driving time. Or when the adjacently disposed heating resistance elements Ri-1, Ri+1 are printed, that is, when the latching cells Ai-1, Ai+1 of the latching circuit L11 storing the present print data is at H level, it is controlled to shorten the driving time, and the heating resistance element Ri is driven accordingly. 
     On the other hand, when the heating resistance element Ri is not printed, that is, the latching cell Ai corresponding to the latching circuit L11 is at L level, the comparating circuit 8 is cut off, and the heating resistance element Ri remains de-energized. 
     The final latching cell An of the latching circuit L11 corresponds to the heating resistance element Rn, and the data from the latching cell An-1 adjacent thereto and the cell Ala for printing adjacent dots comprised in the latching circuit L21 of the integrated circuit IC2 next to the integrated circuit IC1 are given to the controlling means corresponding to the latching cell An. 
     To determine the driving time of the resistance Rn+1 corresponding to the latching cell Aln in the latching circuit L21 of the integrated circuit IC2, the data of the latching cell An in the latching circuit L11 of the integrated circuit IC1, the data of the latching cell Aln of the latching circuit L21, and the data of the latching cell Bln of the latching circuit L22 and the latching cell Cln of the latching circuit L23 are used, same as in the foregoing case of heating resistance element Ri. 
     In this embodiment, only the previous (j-1) data B1 and second previous (j-2) data C1 corresponding to the heating resistance element R1 are used, but (a) further past data may be used, (b) only the previous data B1 may be used, (c) only adjacent data out of the past data, for example, Bi-1, Bi-1, or Ci-1, Ci+1 may be used, (d) A1-2, Al+2 may be used, for example, or (e) the driving time may be adjusted and controlled at higher precision. Besides, after printing of one pattern, when a pulse is fed from CLEAR terminal of the processing device 5, the latched contents of the latching circuits L11, L12, L13 are cleared, so that the next print pattern may be written clearly. 
     The invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description and all changes which come within the meaning and the range of equivalency of the claims are therefore intended to be embraced therein.