Abstract:
A vestigial-sideband (VSB) signal is down-converted to generate a VSB signal including a carrier frequency offset from zero frequency by an amount greater than the bandwidth of the VSB signal. The carrier of this final I-F signal has a carrier offset from zero-frequency, which carrier offset exceeds the highest modulating frequency of the VSB signal and is adjusted to a prescribed carrier offset value. The down-converted VSB signal is digitized to generate a digital multiplicand signal for a digital multiplier circuit. The digital multiplier circuit is supplied a digital multiplier signal descriptive of a system function composed of a constant term and a second harmonic of the carrier frequency offset from zero frequency. Digital product signal from the digital multiplier circuit is descriptive of a double-sideband amplitude-modulation final I-F signal in the digital regime, which DSB AM final I-F signal is subsequently detected to generate a baseband demodulation result.

Description:
The invention relates to radio receivers for receiving vestigial-sideband signals, which radio receivers are used in digital television sets, for example. 
     BACKGROUND OF THE INVENTION 
     Digital communications frequently employ vestigial-sideband (VSB) signals in which the passband response is reduced at carrier frequency. Excluding from consideration a pilot carrier added to the VSB suppressed-carrier-AM digital television (DTV) signals transmitted in accordance with the 1995 standard for digital television broadcasting established by the Advanced Television Standards Committee (ATSC), the radio-frequency spectrum of the VSB DTV signals exhibits 3 dB roll-off at a carrier frequency 310 khz from the lower frequency bound of the six-megahertz-wide television channels. A problem with VSB signals with roll-off through carrier frequency is that the asymmetry of the modulation sidebands introduces jitter into carrier tracking that is done using variants of the well-known Costas loop. In some digital communications systems the transmitter employs filtering to eliminate modulation sideband energy in the vicinity of the carrier frequency. The ATSC standard does not specifically provide for eliminating modulation sideband energy near the carrier frequency. Instead, a pilot carrier of substantial strength is inserted into the VSB suppressed-carrier-AM DTV signals to reduce the carrier jitter caused by modulation sideband energy near the carrier frequency. 
     The transient response of synchronous demodulation of VSB signals is notoriously dependent on the roll-off of frequency response through the carrier region in the final I-F signal being synchronously demodulated. 
     A type of radio receiver design that is employed in digital television sets employs a six-megahertz-wide final intermediate-frequency signal that is offset from zero frequency by no more than a few megaHertz. This VSB final I-F signal is digitized, converted to a complex digital final I-F signal, and then synchrodyned to baseband using a digital complex multiplier. The digital complex multiplier multiplies the complex digital final I-F signal by a complex digital carrier to recover in-phase and quadrature-phase baseband results of the synchrodyne carried out in the digital regime. The in-phase baseband results are used as symbol code input by the symbol decoder of the DTV receiver. The quadrature-phase baseband results are lowpass filtered, and the lowpass filter response is used to control the frequency and phase of local oscillations used in the down conversion to final I-F signal, implementing a procedure known as bandpass tracking. This type of receiver is more fully described in U.S. Pat. No. 5,479,449 issued 26 Dec. 1996 to C. B. Patel and A. L. R. Limberg, entitled “DIGITAL VSB DETECTOR WITH BANDPASS PHASE TRACKER, AS FOR INCLUSION IN AN HDTV RECEIVER”, and assigned to Samsung Electronics Co., Ltd. U.S. Pat. No. 5,479,449 describes the carrier of the final I-F signal being below an upper sideband that is synchronously detected in the digital regime to recover baseband symbol code. Such final I-F signal is the result of a downconversion in which a very-high-frequency (VHF) intermediate-frequency signal is heterodyned with local oscillations of a VHF frequency below the VHF I-F signal frequency band. A final I-F signal with the carrier of above a lower sideband is the result of a downconversion in which a very-high-frequency (VHF) intermediate-frequency signal is heterodyned with local oscillations of a VHF frequency above the VHF I-F signal frequency band. This is described in U.S. Pat. No. 5,659,372 issued 19 Aug. 1997 to C. B. Patel and A. L. R. Limberg, entitled “DIGITAL TV DETECTOR RESPONDING TO FINAL-IF SIGNAL WITH VESTIGIAL SIDEBAND BELOW FULL SIDEBAND IN FREQUENCY”, and assigned to Samsung Electronics Co., Ltd. U.S. Pat. No. 5,659,372 describes the final I-F signal with the carrier above a lower sideband being synchrodyned to baseband in the digital regime to recover baseband symbol code. 
     This application incorporates by reference U.S.P.T.O. publication 2003-0224725-A1 published 4 Dec. 2003. The text and drawing of this publication corresponds to the text and drawing of U.S. patent application Ser. No. 09/440,469 titled “DIGITAL TELEVISION RECEIVER CONVERTING VESTIGIAL-SIDEBAND SIGNALS TO DOUBLE-SIDEBAND AM SIGNALS BEFORE DEMODULATION”, filed for A. L. R. Limberg 15 Nov. 1999 and assigned to Samsung Electronics Co., Ltd. U.S.P.T.O. publication 2003-0224725-A1 describes a VSB signal being downconverted to a double-sideband amplitude-modulation final I-F signal that is subsequently detected to generate a baseband demodulation result. The carrier of the final intermediate-frequency signal has a carrier offset from zero-frequency, which carrier offset exceeds the highest modulating frequency of the VSB signal and is adjusted to a prescribed carrier offset value. 
     The downconversion to the DSB AM I-F signal is accomplished in certain embodiments of the invention described in U.S.P.T.O. publication 2003-0224725-A1 by heterodyning the VSB signal with a heterodyning signal essentially consisting of first and second frequency components. The first frequency component of the heterodyning signal is lower in frequency than the carrier of the VSB signal by an amount equal to the carrier offset value prescribed for the final I-F signal. The second frequency component of the heterodyning signal is higher in frequency than the carrier of the VSB signal by an amount equal to the carrier offset value prescribed for the final I-F signal. In preferred ones of these embodiments of the invention described in U.S.P.T.O. publication 2003-0224725-A1, the heterodyning signal is generated by a balanced modulator providing suppressed-carrier amplitude-modulation of oscillations supplied from a controlled local oscillator. The modulation of these local oscillations by the balanced modulator is in response to a modulating signal of a frequency equal to the carrier offset value prescribed for the final I-F signal. There is automatic frequency and phase control (AFPC) of the local oscillations that the controlled local oscillator supplies. The AFPC is responsive to the departure of the carrier of the final I-F signal from its prescribed value of offset from zero frequency. The DSB AM final I-F signal is demodulated using an in-phase synchronous detector for recovering baseband symbol code and a quadrature-phase synchronous detector for developing AFPC signal for the controlled local oscillator. 
     The downconversion to the DSB AM I-F signal is accomplished in other embodiments of the invention described in U.S.P.T.O. publication 2003-0224725-A1 by downconverting the VSB signal conventionally, to generate a VSB signal including a carrier frequency offset from zero frequency by an amount greater than the bandwidth of the VSB signal. The downconverted VSB signal is digitized. Then, the digitized downconverted VSB signal is multiplied by a second harmonic of the carrier to generate another VSB signal, and the two digitized VSB signals are added together to complete generation of the DSB AM signal in the digital regime. 
     SUMMARY OF THE INVENTION 
     In the invention disclosed herein, the downconversion to the DSB AM I-F signal is accomplished by downconverting the VSB signal conventionally, to generate a VSB signal including a carrier frequency offset from zero frequency by an amount greater than the bandwidth of the VSB signal; and the downconverted VSB signal is digitized. In the invention disclosed herein the digitized downconverted VSB signal is a digital multiplicand signal which a digital multiplier circuit multiplies by a digital multiplier signal to generate a digital product signal descriptive of the DSB AM signal in the digital regime. This digital multiplier signal describes a system function composed of a constant term and a second harmonic of the carrier frequency offset from zero frequency. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     FIG. 1 is a block schematic diagram of apparatus for demodulating a vestigial-sideband amplitude-modulation signal, which apparatus down-converts a VSB AM signal to generate a DSB AM signal and is described in U.S.P.T.O. publication 2003-0224725-A1. 
     FIG. 2 is a block schematic diagram of apparatus for demodulating a VSB signal with a digital complex multiplier after the VSB signal is converted to DSB AM signals by a complex down-conversion, which apparatus is also described in U.S.P.T.O. publication 2003-0224725-A1. 
     FIG. 3 is a block schematic diagram of apparatus for demodulating a VSB AM signal in accordance with an invention first disclosed herein, which apparatus down-converts a VSB AM signal to generate a DSB AM signal and phase-splits the DSB AM signal as applied to a complex multiplier for demodulation by synchrodyne to baseband. 
     FIG. 4 is a block schematic diagram of a modification of the FIG. 3 apparatus for demodulating a VSB AM signal, which modified apparatus embodies an invention first disclosed herein. 
     FIG. 5 is a schematic diagram of apparatus for demodulating a VSB signal with a digital complex multiplier after the VSB signal is converted to DSB AM signals by a complex down-conversion in accordance with an invention first disclosed herein. 
     FIG. 6 is a block schematic diagram of a modification of the FIG. 5 apparatus for demodulating a VSB AM signal, which modified apparatus embodies an invention first disclosed herein. 
     FIG. 7 is a schematic diagram of apparatus for demodulating a VSB signal with a digital complex multiplier after the VSB signal is phase-split and converted to DSB AM signals in accordance with an invention first disclosed herein. 
     FIG. 8 is a block schematic diagram of a modification of the FIG. 7 apparatus for demodulating a VSB AM signal, which modified apparatus embodies an invention first disclosed herein. 
     FIGS. 9A,  9 B,  9 C and  9 D are frequency spectrum plots against the same frequency abscissa showing a first way of converting a VSB AM signal to a DSB AM signal and then demodulating it to recover baseband signal. 
     FIGS. 10A,  10 B,  10 C and  10 D are frequency spectrum plots against the same frequency abscissa showing a second way of converting a VSB AM signal to a DSB AM signal and then demodulating it to recover baseband signal, which second way of converting a VSB AM signal to a DSB AM signal and then demodulating it is preferred over the first way illustrated in FIGS. 9A,  9 B,  9 C and  9 D. 
    
    
     DETAILED DESCRIPTION 
     FIG. 1 shows a portion of a VSB radio signal receiver including receiver front-end circuitry  5  for converting a received vestigial-sideband signal to an amplified vestigial-sideband signal in a penultimate intermediate-frequency band. This penultimate I-F band is preferably in the very-high-frequency (VHF) portion of the spectrum, extending from 41 to 47 megahertz, by way of example. In such case, the front-end circuitry  5  includes the customary gain-controlled VHF intermediate-frequency amplifier chain, which amplifier chain supplies VSB amplified VHF I-F signal to a mixer  10  for downconversion to a final I-F signal. A voltage-controlled oscillator (VCO)  11  is designed for operation as a controlled local oscillator with automatic frequency and phase control of its oscillations at a very high frequency f H . The VCO  11  supplies its oscillations to the mixer  10  for multiplying the VSB amplified VHF I-F signal; and the resulting product output signal from the mixer  10  is lowpass filtered by a lowpass filter  13  to separate a VSB final I-F signal with carrier frequency f f  from its image in the VHF band. (That is, the lowpass filter  13  operates as a final-intermediate-frequency-band selection filter, which in some designs might be replaced by a bandpass filter.) The lowpass filter  13  response R 13  is digitized by an analog-to-digital converter  17 . 
     The resulting digitized VSB final I-F signal is applied as a first of its two summand input signals to a digital adder  026  and is applied as a multiplicand input signal to a digital multiplier  027 . The sum output signal supplied by the adder  26  is a DSB AM signal generated by combining two VSB signals received as summand input signals, one VSB signal providing the lower sideband of that DSB AM signal, and the other VSB signal providing the upper sideband of that DSB AM signal. The lowpass filter  13  response is one of the two summand input signals of the adder  26 . The other summand input signal of the adder  26  is the product output signal of a digital multiplier  027 , which modulates a suppressed carrier frequency 2f f  in accordance with the lowpass filter  13  response. More specifically, the digital multiplier  027  multiplies a multiplicand input signal, as supplied from a read-only memory  28  storing a 2 cos 2ω F  t look-up table, by the lowpass filter  13  response applied to the digital multiplier  027  as a multiplier input signal. The DSB AM signal that the adder  026  generates as its sum output signal is supplied to a digital phase-splitter  014  that converts the real signal to a complex signal having real and imaginary components supplied to a digital complex multiplier  015  as a complex multiplicand signal. The complex multiplier  015  synchrodynes this complex multiplicand signal with a digitized final I-F carrier signal supplied to the complex multiplier  015  as a complex multiplier signal. 
     The real and imaginary components of this complex multiplier signal are respectively supplied from a read-only memory  20  storing a cos ω F  t look-up table and from a read-only memory  21  storing a sin ω F  t look-up table. The ROMs  20 ,  21  and  28  are addressed from a common address counter  200  counting at the sample rate used by the digital complex multiplier  015 . The cos ω F  t and sin ω F  t look-up tables stored in the ROMs  20  and  21  are delayed respective to the 2 cos 2ω F  t look-up table stored in the ROM  28 , to compensate for the latent delays of the digital multiplier  027 , the digital adder  026 , the phase-splitter  014  and the digital complex multiplier  015 . 
     The resulting complex product supplied from the complex multiplier  015  has an in-phase baseband component, I. The in-phase baseband component I is a demodulation result descriptive of the modulating signal used in generating the transmitted VSB signal currently being received. A decimation filter  29  reduces the sampling rate of the in-phase baseband component I to Nyquist rate and suppresses in its output response those frequency components of system response above 2ω F  in frequency. 
     The complex product supplied from the complex multiplier  015  also has a quadrature-phase baseband component, Q. The quadrature-phase baseband component Q is supplied to a digital-to-analog converter  19  to generate analog input signal applied to an analog lowpass filter  16 . The response of the lowpass filter  16  is applied to the VCO  11  as an automatic frequency and phase control (AFPC) signal. 
     In the FIG. 1 downconversion circuitry, the response R 10  from the mixer  10  will be an ensemble of terms each of a form per the following equation (1), presuming the VCO  11  to be of the form cos ω H  t.                R   10     =       0.5        cos        (       ω   H     -     ω   V       )          t     +     0.5        cos        (       ω   H     +     ω   V       )          t               (   1   )                                
     The lowpass filter  13  suppresses the high frequency terms in its response R 13  to the mixer  10  response R 10 , to generate an ensemble of terms each per the following equation (2).                R   13     =     0.5                   cos        (       ω   H     -     ω   V       )          t             (   2   )                                
     The digital multiplier  027  modulates a suppressed 2 cos 2 ω F  t carrier by the lowpass filter  13  response R 13 , as those system function are expressed in digitized form, to generate a digital multiplier  027  system response R 027  that is an ensemble of terms each per the following equation (3).                R   027     =       0.5                   cos        (       2        ω   F       +     ω   H     -     ω   V       )          t     +     0.5                   cos        (       2        ω   F       -     ω   H     +     ω   V       )          t               (   3   )                                
     The digital adder  26  sums digitized R 13  and R 0   27  to generate a sum output signal R 026  as a system response composed of an ensemble of terms each per the following equation (4).                           R   026     =              R   13     +     R   027                   =              0.5                   cos        (       ω   H     -     ω   V       )          t     +                            0.5                   cos        (       2        ω   F       -     ω   H     -     ω   V       )          t     +     0.5        cos        (       2        ω   F       -     ω   H     +     ω   V       )          t                       (   4   )                                
     The phase-splitter  014  repeats the adder  026  response R 0   26  as its real response Re 014 , an ensemble of terms each per the following equation (5), and generates its imaginary response Im 014 , an ensemble of corresponding terms each per the following equation (6).                           Re   014     =              0.5                   cos        (       ω   H     -     ω   V       )          t     +                            0.5                   cos        (       2        ω   F       +     ω   H     -     ω   V       )          t     +     0.5        cos        (       2        ω   F       -     ω   H     +     ω   V       )          t                       (   5   )                       Im   014     =              0.5      k                   sin        (       ω   H     -     ω   V       )          t     +                            0.5                   sin        (       2        ω   F       +     ω   H     -     ω   V       )          t     +     0.5                   sin        (       2        ω   F       -     ω   H     +     ω   V       )          t                     (   6   )                                
     The following equations (7) describe the quadrature-phase response Q of the digital complex multiplier  015 .                         Q   =                Re   014        sin                   ω   F        t     -       Im   014        cos                   ω   F        t                   =              0.5                   cos        (       ω   H     -     ω   V       )          t   *   sin                   ω   F        t     +                            0.5                   cos        (       2                   ω   F       +     ω   H     -     ω   V       )          t   *   sin                   ω   F        t     +                            0.5                   cos        (       2                   ω   F       -     ω   H     +     ω   V       )          t   *   sin                   ω   F        t     -                            0.5                   sin        (       ω   H     -     ω   V       )          t   *   cos                   ω   F        t     -                            0.5                   sin        (       2                   ω   F       +     ω   H     -     ω   V       )          t   *   cos                   ω   F        t     -                          0.5                   sin        (       2                   ω   F       -     ω   H     +     ω   V       )          t   *   cos                   ω   F        t                 =              0.5        [         cos        (       ω   H     -     ω   V       )          t   *   sin                   ω   F        t     -     sin        (       ω   H     -     ω   V       )        t   *   cos                   ω   F        t       ]       +                          0.5   [         cos        (       2                   ω   F       +     ω   H     -     ω   V       )          t   *   sin                   ω   F        t     -                                sin        (       2                   ω     F                    +     ω   H     -     ω   V       )          t   *   cos                   ω   F        t     ]     +                        0.5   [         cos        (       2                   ω   F       -     ω   H     +     ω   V       )          t   *   sin                   ω   F        t     -                              sin        (       2                   ω   F       -     ω   H     +     ω   V       )          t   *   cos                   ω   F        t     ]               =                +   0.5                     sin        (       ω   F     -     ω   H     +     ω   V       )          t     +                            0.5                 sin        (       ω   F     +     ω   H     -     ω   V       )        t     +                          0.5                 sin        (       ω   F     -     ω   H     +     ω   V       )        t                 =                sin        (       ω   F     -     ω   H     +     ω   V       )          t     +     0.5                 sin        (       ω   F     +     ω   H     -     ω   V       )        t                       (   7   )                                
     Presuming (ω H −ω V ) to be approximately ω F , the lowpass filter  16  suppresses the higher frequency cos 0.5 sin (ω F +ω H −ω V )t component of the Q signal, to generate a response R 16  that within the AFPC bandwidth is an ensemble of terms each per the following equation (8).                R   16     =       sin        (       ω   F     -     ω   H     +     ω   V       )          t             (   8   )                                
     R 16  is an AFPC signal that will adjust ω H  so that (ω H −ω V ) equals ω F  to reduce error signal substantially to zero. 
     The following equations (9) describe the in-phase response I of the digital complex multiplier  015 .                         I   =                Re   014        cos                   ω   F        t     +       Im   014        sin                   ω   F        t                   =                +   0.5                     cos        (       ω   H     -     ω   V       )          t   *   cos                   ω   F        t     +                            0.5                   cos        (       2                   ω   F       +     ω   H     -     ω   V       )          t   *   cos                   ω   F        t     +                            0.5                   cos        (       2                   ω   F       -     ω   H     +     ω   V       )          t   *   cos                   ω   F        t     +                            0.5                   sin        (       ω   H     -     ω   V       )          t   *   sin                   ω   F        t     +                            0.5                   sin        (       2                   ω   F       +     ω   H     -     ω   V       )          t   *   sin                   ω   F        t     +                          0.5                   sin        (       2                   ω   F       -     ω   H     +     ω   V       )          t   *   sin                   ω   F        t                 =              +     0.5        [         cos        (       ω   H     -     ω   V       )          t   *   cos                   ω   F        t     +       sin        (       ω   H     -     ω   V       )          t   *   sin                   ω   F        t       ]         +                          0.5   [         cos        (       2                   ω   F       +     ω   H     -     ω   V       )          t   *   cos                   ω   F        t     +                                sin        (       2                   ω     F                    +     ω   H     -     ω   V       )          t   *   sin                   ω   F        t     ]     +                        0.5   [         cos        (       2                   ω   F       -     ω   H     +     ω   V       )          t   *   cos                   ω   F        t     +                              sin        (       2                   ω   F       -     ω   H     +     ω   V       )          t   *   sin                   ω   F        t     ]               =                +   0.5                     cos        (       ω   F     -     ω   H     +     ω   V       )          t     +                            0.5                   cos        (       ω   F     +     ω   H     -     ω   V       )          t     +                          0.5                   cos        (       ω   F     -     ω   H     +     ω   V       )          t                 =                cos        (       ω   F     -     ω   H     +     ω   V       )          t     +     0.5                   cos        (       ω   F     +     ω   H     -     ω   V       )          t                       (   9   )                                
     Suppose that (ω V −ω H ) exhibits variation of higher frequency than the AFPC time constant. Each component of the ensemble descriptive of these variations is assumed to have a (ω H −ω V ) value of (ω F +ω M ). When the AFPC loop is phase-locked, the in-phase response I of the complex multiplier  015  will be an ensemble of the following component I responses, as determined by substituting(ω F +ω M ) for(ω H −ω V ) in equation (9).                         I   =                cos        (     -     ω   M       )          t     +     0.5        cos        (       2        ω   F       +     ω   M       )          t                   =              cos                   ω   M        t     +     0.5        cos        (       2        ω   F       +     ω   M       )          t                       (   10   )                                
     The rate-reduction filter  29  with 2ω F  output sample rate receives this in-phase response I and aliases the sideband of the cos 2ω F t carrier to baseband to augment the baseband signal. 
     FIG. 2 shows a modification of the FIG. 1 portion of a VSB radio signal receiver that uses a complex mixer instead of the mixer  10  for downconverting VSB VHF I-F signal to VSB final I-F signal. This avoids the need for the phase-splitter  014  before the digital complex multiplier  015  used for demodulation. The complex mixer comprises component mixers  100  and  101  having their respective output signals filtered by lowpass filters  130  and  131 , respectively. The responses of the lowpass filters  130  and  131  are digitized by analog-to-digital converters  170  and  171 , respectively. The digitized lowpass filter  130  response supplied from the ADC  170  is applied as the first of two summand input signals to a digital adder  0260 . The other summand input signal of the adder  0260  is the product output signal of a digital multiplier  0270 . The digital multiplier  0270  multiplies a multiplicand input signal supplied from the ROM  28 , which multiplicand input signal describes a 2 cos 2ω f t system function, by the digitized lowpass filter  130  response as multiplier input signal. The sum output signal that the adder  0260  generates includes DSB AM of a ω F  carrier and is supplied to the digital complex multiplier  015  as a real component of final I-F input signal. The digitized lowpass filter  131  response supplied from the ADC  171  is applied as the first of two summand input signals to a digital adder  0261 . The other summand input signal of the adder  0261  is the product output signal of a digital multiplier  0271 . The digital multiplier  0271  multiplies a multiplicand input signal supplied from the ROM  28 , which multiplicand input signal describes a 2 cos 2ω f t system function, by the digitized lowpass filter  131  response as multiplier input signal. The sum output signal that the adder  0261  generates includes DSB AM of a ω F  carrier and is supplied to the digital complex multiplier  015  as an imaginary component of final I-F input signal. 
     The mixers  100  and  101  receive similar VSB amplified VHF I-F signals as respective multiplicand input signals to be downconverted, which VSB signals can be supplied from the customary gain-controlled VHF I-F amplifier chain. The FIG. 1 VCO  11  supplying cos ω H  t real or in-phase local oscillations is replaced in FIG. 2 by a VCO  011  supplying sin ω H  t imaginary or quadrature-phase local oscillations, as well as supplying cos ω H  t real or in-phase local oscillations. The cos ω H  t in-phase local oscillations from the VCO  011  are applied as multiplier input signal to the component mixer  100 . The operation of the mixer  100 , the lowpass filter  130 , the ADC  170 , the adder  0260  and the multiplier  0270  in the portion of a VSB signal receiver shown in FIG. 2 corresponds with the operation of the mixer  10 , the lowpass filter  13 , the ADC  17 , the adder  26  and the multiplier  27  in the portion of a VSB signal receiver shown in FIG.  2 . So, in accordance with equation (4) the sum output signal R 0260  from the adder  0260  is an ensemble of terms each per the following equation (11).                           R   0260     =              R   130     +     R   0270                   =              0.5        cos        (       ω   H     -     ω   V       )          t     +                            0.5        cos        (       2        ω   F       +     ω   H     -     ω   V       )          t     +     0.5        cos        (       2        ω   F       -     ω   H     +     ω   V       )          t                       (   11   )                                
     The sin ω H  t in-phase local oscillations from the VCO  011  are applied as multiplier input signal to the component mixer  101 . The response R 101  from the mixer  101  will be an ensemble of terms each of the following form, presuming the VCO  111  to be of the form cos ω H  t.                R   101     =       0.5        sin        (       ω   H     -     ω   V       )          t     +     0.5        sin        (       ω   H     +     ω   V       )          t               (   12   )                                
     The lowpass filter  131  suppresses the high frequency terms in its response R 131  to the mixer  101  response R 101 , to generate an ensemble of terms each per the following equation (13).                R   131     =     0.5        sin        (       ω   H     -     ω   V       )          t             (   13   )                                
     The digital multiplier  0271  modulates a suppressed 2 cos 2ω F  t carrier by the lowpass filter  131  response R 131  to generate in its response R 0271  an ensemble of terms each per the following equation (14).                R   0271     =       0.5        sin        (       2        ω   F       +     ω   H     -     ω   V       )          t     +     0.5        sin        (       2        ω   F       -     ω   H     +     ω   V       )          t               (   14   )                                
     The adder  0261  sums R 131  and R 0271  to generate a sum output signal R 0261  which is an ensemble of terms each per the following equation (15).                           R   0261     =              R   131     +     R   0271                   =              0.5        sin        (       ω   H     -     ω   V       )          t     +                            0.5        sin        (       2        ω   H       -     ω   H     -     ω   V       )          t     +     0.5        sin        (       2        ω   F       -     ω   H     +     ω   V       )          t                       (   15   )                                
     The adder  0260  response R 0260  in equation (13) and the adder  0261  response R 0261  in equation (15) respectively correspond to the real response Re 014  of the phase-splitter  014  per equation (5) and to the imaginary response Im 014  of the phase-splitter  014  per equation (6). 
     FIG. 3 shows modifications made in accordance with the invention to the FIG. 1 portion of a VSB radio signal receiver. In FIG. 3 the digital adder  026  is deleted from the receiver, and the digital multiplier  027  is connected to apply its product output signal directly to the phase-splitter  014  as input signal thereto. FIG. 3 also shows the ROM  28 , which stores the look-up table for a 2 cos 2ω f t system function applied to the digital multiplier  027  as multiplicand input signal, being replaced with a read-only memory  028 , which stores a look-up table for a 1+2 cos 2ω f t system function applied to the digital multiplier  027  as multiplicand input signal. 
     FIG. 4 shows modifications made in accordance with the invention to the FIG. 1 portion of a VSB radio signal receiver. These modifications are alternative to the FIG. 3 modification of the FIG. 1 portion of a VSB radio signal receiver, but are more easily explained as modifications to the FIG. 3 portion of a VSB radio signal receiver. In certain embodiments of the FIG. 3 portion of a VSB radio signal receiver, the digital multiplier  027  can be constructed in read-only memory. FIG. 4 shows the ROM  028  and the digital multiplier  027  constructed in ROM being replaced by a single read-only memory  70  for converting digitized VSB final I-F signal from the ADC  17  to digitized DSB AM final I-F signal supplied as input signal to the phase-splitter  014 . The ROM  70  receives sample count from the address counter  200  as part of its input address and receives digitized VSB final I-F signal from the ADC  17  as the restt of its input address. 
     FIG. 5 shows modifications made in accordance with the invention to the FIG. 2 portion of a VSB radio signal receiver. In FIG. 5 the digital adders  0260  and  0261  are deleted from the receiver. FIG. 5 also shows the ROM  28 , which stores the look-up table for a 2 cos 2ω f t system function applied to the digital multipliers  0270  and  0271  as multiplicand input signals, being replaced with the read-only memory  028 , which stores a look-up table for a 1+2 cos 2ω f t system function applied to the digital digital multipliers  0270  and  0271  as multiplicand input signals. The digital multiplier  0270  is connected in FIG. 5 to apply its product output signal directly to the digital complex multiplier  015  as the real component of its complex multiplicand input signal. The digital multiplier  0271  is connected in FIG. 5 to apply its product output signal directly to the digital complex multiplier  015  as the imaginary component of its complex multiplicand input signal. 
     FIG. 6 shows modifications made in accordance with the invention to the FIG. 2 portion of a VSB radio signal receiver. These modifications are alternative to the FIG. 5 modification of the FIG. 2 portion of a VSB radio signal receiver, but are more easily explained as modifications to the FIG. 5 portion of a VSB radio signal receiver. In certain embodiments of the FIG. 5 portion of a VSB radio signal receiver, the digital multipliers  0270  and  0271  can be constructed in read-only memory. 
     FIG. 6 shows the ROM  028  and the digital multiplier  0270  constructed in ROM being replaced by a single read-only memory  700  for converting digitized VSB final I-F signal from the ADC  170  to digitized DSB AM final I-F signal supplied to the digital complex multiplier  015  as the real component of its complex multiplicand input signal. The ROM  700  receives sample count from the address counter  200  as part of its input address and receives digitized VSB final I-F signal from the ADC  170  as the rest of its input address. 
     FIG. 6 further shows the ROM  028  and the digital multiplier  0271  constructed in ROM being replaced by a single read-only memory  710  for converting digitized VSB final I-F signal from the ADC  171  to digitized DSB AM final I-F signal supplied to the digital complex multiplier  015  as the imaginary component of its complex multiplicand input signal. The ROM  710  receives sample count from the address counter  200  as part of its input address and receives digitized VSB final I-F signal from the ADC  171  as the rest of its input address. 
     FIG. 7 shows a variant of the FIG. 5 apparatus in which the digitized real VSB final I-F signal and the digitized imaginary VSB final I-F signal supplied as digital multiplicand signals for the digital multipliers  0270  and  0271 , respectively, are not generated by complex downconversion. The controlled oscillator  011  supplying both in-phase and quadrature-phase controlled oscillations, the component mixers  100  and  101  composing a complex mixer, the lowpass filters  130  and  131 , and the analog-to-digital converters  170  and  171  are not included in the FIG. 7 apparatus. The FIG. 7 apparatus includes the controlled oscillator  11  controlled oscillations in a single phasing, the mixer  10 , the lowpass filter  130 , and the single analog-to-digital converter  17  connected much as in the apparatuses of FIGS. 1,  3  and  4 . The digitized VSB signal from the ADC  17  is utilized differently in the FIG. 7 apparatus, however, the ADC  17  being connected to apply its output signal to a phase-splitter  18  as input signal thereto. The phase-splitter  18  responds to the digitized VSB signal from the ADC  17  to supply digitized real VSB final I-F signal and connects to the digital multiplier  0270  to apply the digitized real VSB final I-F signal to the digital multiplier  0270  as its digital multiplicand input signal. The phase-splitter  18  also responds to the digitized VSB signal from the ADC  17  to supply digitized imaginary VSB final I-F signal and connects to the digital multiplier  0271  to apply the digitized imaginary VSB final I-F signal to the digital multiplier  0271  as its digital multiplicand input signal. 
     The phase-splitter  18  needs to maintain quadrature phase relationship between the digitized real VSB final I-F signal and the digitized imaginary VSB final I-F signal over a six-megahertz bandwidth. Since the phase-splitter  18  needs to maintain quadrature phase relationship between its output signals over only the six-megahertz bandwidth associated with the VSB final I-F signal, it is easier to design than the phase-splitter  014  in the apparatuses of FIGS. 3 and 4, which needs to maintain quadrature phase relationship between its output signals over the twelve-megahertz bandwidth associated with a DSB AM final I-F signal. Maintaining the quadrature phase relationship between the output signals of a phase-splitter is especially difficult as the output signals approach zero frequency. Choosing the nominal frequency of the controlled oscillations from the oscillator  11  such that the mixer  10  supplies a normal-spectrum VSB final I-F signal with its principal sideband above the carrier in frequency makes the phase-splitter  18  even easier to design than the phase-splitter  014  since its input signal is more remote from zero frequency. Furthermore, the range of frequencies over which quadrature phase relationship of output signals must be maintained is in relative frequency terms less than a 2:1 range for the phase-splitter  18 , but is considerably larger for the phase-splitter  014  supposing the final I-F carrier frequency is between six and twelve megahertz. The simpler design for the phase-splitter  18  justifies having to use two digital multipliers  0270  and  0271  in the FIG. 7 apparatus as compared to the single digital multiplier  027  in the FIG. 3 apparatus. 
     FIG. 8 shows modifications made in accordance with the invention to the FIG. 2 portion of a VSB radio signal receiver. These modifications are alternative to the FIG. 7 modification of the FIG. 2 portion of a VSB radio signal receiver, but are more easily explained as modifications to the FIG. 7 portion of a VSB radio signal receiver. In certain embodiments of the FIG. 7 portion of a VSB radio signal receiver, the digital multipliers  0270  and  0271  can be constructed in read-only memory. 
     FIG. 8 shows the ROM  028  and the digital multiplier  0270  constructed in ROM being replaced by a single read-only memory  700  for converting digitized real VSB final I-F signal from the phase-splitter  18  to digitized real DSB AM final I-F signal supplied to the digital complex multiplier  015  as the real component of its complex multiplicand input signal. The ROM  700  receives sample count from the address counter  200  as part of its input address and receives digitized real VSB final I-F signal from the phase-splitter  18  as the rest of its input address. 
     FIG. 8 further shows the ROM  028  and the digital multiplier  0271  constructed in ROM being replaced by a single read-only memory  710  for converting digitized imaginary VSB final I-F signal from the phase-splitter  18  to digitized imaginary DSB AM final I-F signal supplied to the digital complex multiplier  015  as the imaginary component of its complex multiplicand input signal. The ROM  710  receives sample count from the address counter  200  as part of its input address and receives digitized imaginary VSB final I-F signal from the phase-splitter  18  as the rest of its input address. 
     FIGS. 9A,  9 B,  9 C and  9 D are frequency spectrum plots against the same frequency abscissa showing a first way of downconverting a VSB AM signal to a DSB AM signal and then demodulating it to recover baseband signal. In this first way of conducting the downconversion the frequency of the controlled oscillator  14  is such that final I-F signal before its conversion to a DSB AM signal is a reverse-spectrum signal  80  as shown in FIG.  9 A. This reverse-spectrum signal  80 , which will be used as the lower sideband of the DSB AM signal, results from the mixing procedure in the mixer  10  of FIGS. 1,  3  and  4 . Such reverse-spectrum signals also result from the mixing procedures in the mixers  101  and  101  of FIGS. 2,  5  and  6 . 
     FIG. 9B shows the result of multiplicatively mixing the FIG. 9A reverse-spectrum signal  80  with a carrier at frequency 2f F , twice the final I-F frequency f F . A normal-spectrum signal  81  with carrier frequency f F  is generated as the difference of the FIG. 9A reverse-spectrum signal  80  from the carrier frequency 2f F  with which it is multiplicatively mixed. A reverse-spectrum signal  82  with carrier frequency 3f F  is generated as the sum of the FIG. 9A reverse-spectrum signal  80  with the carrier frequency 2f F  with which it is multiplicatively mixed. 
     FIG. 9C shows the result of combining the frequency spectra of FIGS. 9A and 9B to generate a DSB AM signal  83  formed from the merger of the reverse-spectrum signal  80  with the normal-spectrum signal  81 . The reverse-spectrum signal  82  accompanies the DSB AM signal  83  in FIG.  9 C. The DSB AM signal  83  extends upward in frequency towards frequency 2f F . The reverse-spectrum signal  82  extends downward in frequency towards frequency 2f F , which tends to make the reverse-spectrum signal  82  somewhat difficult to separate from the DSB AM signal  83  by frequency-selective filtering. 
     FIG. 9D shows the result of multiplicatively mixing the FIG. 9C signal with a carrier at the final I-F frequency f F  in a synchrodyning procedure used to recover a baseband spectrum signal  84 . The baseband spectrum signal  84  is accompanied by a reverse-spectrum signal  85  resulting from the downconversion of the reverse-spectrum signal  82  per FIG. 9C in the synchrodyning procedure used to recover the baseband spectrum signal  84 . The baseband spectrum signal  84  extends upward in frequency towards frequency f F . The reverse-spectrum signal  85  extends downward in frequency towards frequency f F , which tends to make the reverse-spectrum signal  85  somewhat difficult to separate from the baseband spectrum signal  84  by frequency-selective filtering. 
     FIGS. 10A,  10 B,  10 C and  10 D are frequency spectrum plots against the same frequency abscissa showing a second way of downconverting a VSB AM signal to a DSB AM signal and then demodulating it to recover baseband signal. In this second way of conducting the downconversion the frequency of the controlled oscillator  14  is such that final I-F signal before its conversion to a DSB AM signal is a normal-spectrum signal  90  as shown in FIG.  10 A. This normal-spectrum signal  90 , which will be used as the upper sideband of the DSB AM signal, results from the mixing procedure in the mixer  10  of FIGS. 1,  3  and  4 . Such normal-spectrum signals also result from the mixing procedures in the mixers  101  and  101  of FIGS. 2,  5  and  6 . 
     FIG. 10B shows the result of multiplicatively mixing the FIG. 10A normal-spectrum signal  90  with a carrier at frequency 2f F , twice the final I-F frequency f F . A reverse-spectrum signal  91  with carrier frequency f F  is generated as the difference of the FIG. 9A normal-spectrum signal  90  from the carrier frequency 2f F  with which it is multiplicatively mixed. A normal-spectrum signal  92  with carrier frequency 3f F  is generated as the sum of the FIG. 10A normal-spectrum signal  90  with the carrier frequency 2f F  with which it is multiplicatively mixed. 
     FIG. 10C shows the result of combining the frequency spectra of FIGS. 10A and 10B to generate a DSB AM signal  93  formed from the merger of the normal-spectrum signal  90  with the reverse-spectrum signal  91 . The normal-spectrum signal  92  accompanies the DSB AM signal  93  in FIG.  10 C. The DSB AM signal  93  extends upward in frequency towards frequency 2f F . The normal-spectrum signal  92  extends upward in frequency from a frequency slightly below the frequency 3f F , which makes separating the DSB AM signal  93  from the normal-spectrum signal  92  by frequency-selective filtering easier than separating the DSB AM signal  83  from the reverse-spectrum signal  82  in FIG.  9 C. 
     FIG. 10D shows the result of multiplicatively mixing the FIG. 10C signal with a carrier at the final I-F frequency f F  in a synchrodyning procedure used to recover a baseband spectrum signal  94 . The baseband spectrum signal  94  is accompanied by a normal-spectrum signal  95  resulting from the downconversion of the normal-spectrum signal  92  per FIG. 9C in the synchrodyning procedure used to recover the baseband spectrum signal  94 . The baseband spectrum signal  94  extends upward in frequency towards frequency f F . The normal-spectrum signal  95  extends upward in frequency from a frequency slightly below the frequency 3f F , which tends to make makes separating the baseband spectrum signal  94  from the normal-spectrum signal  95  by frequency-selective filtering easier than separating the baseband spectrum signal  84  from the reverse-spectrum signal  85  in FIG.  9 D. 
     The apparatuses shown in FIGS. 3-8 can each be succeeded by adaptive filtering designed to perform baseband equalization and echo-suppression. In alternative embodiments of the invention, the apparatuses of FIGS. 3,  4 ,  7  and  8  are modified to interpose after the ADC  17  adaptive filtering for implementing passband equalization and echo-suppression. In other embodiments of the invention, the apparatuses of FIGS. 5 and 6 are modified modified to interpose after the ADCs  170  and  171  adaptive filtering for implementing complex passband equalization and echo-suppression. The analog lowpass filter  16  must have very narrowband width and must be carefully designed to avoid excess phase shift in the loop that generates automatic frequency and phase control signal as the lowpass filter  16  response. This is because the latent delay of the adaptive filtering contributes to phase shift in the loop. 
     While the invention has been described in the particular context of DTV receivers, it should be appreciated that the invention is useful, as well, for the reception of VSB radio signals used in other types of communications.