Abstract:
System and method for validating UPC (Universal Product Code) or TRI-BAR indicia on packaging or the like and which includes means for finding the start and end codes of the indicia, means for checking the tolerances of the black-white band pairs of the indicia, etc., in order to control the storage and use of information obtained from the indicia.

Description:
BACKGROUND OF THE DISCLOSURE 
     This invention relates to a system for validating UPC (Universal Product Code) or TRI-BAR coded indicia used on packaging or the like to identify products and provide information concerning said products. 
     It is well known that systems have been developed to scan the above mentioned indicia and such systems have found acceptance in the supermarket industry. 
     Such UPC indicia is currently scanned by a device at the check-out stations in a supermarket or the like and the information detected from the indicia is fed to a computer which then generates the price to be charged to the customer for each item. 
     In addition to UPC indicia detection systems, a TRI-BAR indicia scanning system has also been developed (see U.S. Pat. No. 3,891,831). TRI-BAR coded indicia as shown in U.S. Pat. No. 3,891,831 is primarily intended for use where the indicia is applied by the retailer rather than the manufacturer of the goods since UPC codes are somewhat difficult to apply to goods. 
     Inasmuch as those supermarkets which utilize TRI-BAR indicia on some packaging will also be utilizing UPC indicia on other packaging, any checkout reading and decoding system must be capable of accurately detecting both types of indicia and validating that either one or the other type of indicia has been detected. 
     In particular, for the proper control of data into the computer from the respective indicia, a validator system was needed to locate the start code of either the UPC or TRI-BAR indicia, check the tolerances of the black-white band pairs of the indicia with respect to the type of start code detected, check the end stop codes as appropriate to the type of start code detected and also signal a storage system to store the data representing the indicia being read in the event it is determined that the data is valid. The present validator system provides such a system for accomplishing the aforementioned functions. 
    
    
     BRIEF DESCRIPTION OF DRAWING 
     FIG. 1 illustrates a typical UPC coded label; 
     FIG. 2 illustrates the front of type of a TRI-BAR code for applying to a label; and 
     FIG. 3 is a block diagram illustrating the preferred embodiment of the invention. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     The scanner 10 (FIG. 3) provides video information related to the number of black and white bars of the indicia (UPC or TRI-BAR) (see FIGS. 1 and 2) on the packaging for the goods e.g., a grocery product. Suitable scanners are shown in U.S. Pat. No. 3,891,831 and commonly assigned U.S. patent application Ser. No. 581,151 filed May 27, 1975. 
     The video information is provided to a ratio generator e.g., of the type shown in FIG. 4 of U.S. Pat. No. 3,891,831 to generate output signals equal to ratios 3/2, 2/3 and 1 which represent the ratio of black-white band pairs to white-black band pairs of the start code. See the aforementioned patent for an explanation of how this is accomplished. Since the generation of said ratio signals is in the prior art no further explanation will be provided. 
     If TRI-BAR indicia is present and it is scanned from left to right then the ratio of black-white band pair to white-black band pair is equal to 3/2. If a TRI-BAR indicia is present and it is scanned from right to left then the ratio of black-white band pair and white-black band pair equals 2/3. A band pair is defined in the art as one black bar (B) plus one white bar (blank) (W) no matter the width of each bar. If UPC indicia is present than the ratio of band pairs is equal to 1. 
     The presence of a signal indicating any of the ratios is present sets data type flip/flops (F/F) 14, 15 or 16 when start F/F 20 is set in order to establish the type of tests to be made in validating the indicia. Only one of the F/F 14, 15, or 16 are set to a one &#34;1&#34; at any time. 
     If TBL is set to a &#34;one&#34; this indicates that TRI-BAR indicia has been scanned from the left to the right and TRI-BAR is present. If TBR is set to a &#34;one&#34; this indicates that TRI-BAR indicia has been scanned from the right to the left and TRI-BAR is present. UPC indicates that UPC indicia has been detected no matter which direction it has been scanned. 
     Start F/F 20 is set through &#34;OR&#34; gate 17 by any of the ratio signals going high. The video signal from the scanner is also fed into a conventional digitizer 11 (level comparator) which provides substantially digitized rectangular wave pulses, a logical &#34;1&#34; (+5V) when the input to it is above a certain level and logical &#34;0&#34; (OV) when the input to it is below a predetermined level. 
     The digitized signal is then fed into a differentiator or pulse generator 13 (see U.S. Pat. No. 3,891,831) which provided W/B and B/W transition signals. The W/B transition signals are fed to reset a conventional triangular ramp generator 18 (e.g., using National Semiconductor (NS) 318 according to NS application notes) to generate a voltage representative of the time between W/B transitions. The signal from generator 18 is sampled at the peak of the ramp and held by a conventional sample and hold circuit 19. 
     The signal from 19 is then sampled at the time &#34;start&#34; F/F 20 is set by sample and hold circuit 21 and held throughout the presence of indicia (UPC or TRI-BAR). 
     The output from sample and hold circuit 21 is then used to generate a window to check all subsequent black-white band pairs. One check is to determine if the band pair width is equal to approximately 2 modules since each UPC black-white band pair is supposed to ideally equal two modules (in time). 
     In order to accomplish the foregoing the output from sample and hold 21 is fed to amplifiers 22 and 23 which are set at gains 2.8 and 1.5 respectively in order to establish a window representing a time tolerance permissible about a band pair. If the signal from the ramp generator 18 after passing through amplifier 27 is within tolerance the output from comparator 26 is high. If it is out of tolerance the output goes low. 
     F/F 43 coupled to comparator 26 is clocked on W/B transistions and is set if the comparator output is true i.e., high. The device for accomplishing the comparison is a dual voltage comparator 26 such as National Semiconductor LM 711 connected as shown in the text LINEAR INTEGRATED CIRCUITS by National Semiconductor Corporation © 1973, Chap. 3, page 39. 
     The signals compared after &#34;start&#34; represent (data) of the UPC or TRI-BAR indicia and are provided from the output of generator 18. The signal from generator 18 is fed into a variable gain amplifier 27 which is set for a gain of 2 when input control signal TBL is low. The signal from amplifier 27 is then fed into comparator comparator 26 and compared to see if it is within the window limits. 
     The &#34;start&#34; signal also sets a counter 30. One output A0 of counter 30 starts out high and goes low at the 14th B/W transition. Another output A1 which goes high only on the 14th B/W transition and returns to low before the 15th B/W transition. Output A2 is also provided which goes high on the 20th B/W transition and goes low before the 21st B/W transition. 
     A further output is provided which goes high on 29th B/W to clear &#34;start&#34; F/F 20. The &#34;start&#34; signal is also fed to a data buffer to indicate the position of &#34;start&#34; of presumably valid data. Data from the indicia is at all times being fed into a conventional buffer register 32. 
     Amplifier 27 changes gain from 2 to 3 if TBL is high since if TRI-BAR is scanned left, the &#34;start&#34; signal is 3 mods of if one starts scanning within UPC a &#34;start&#34; signal could be 3 mods and thus produce a TBL which will allow checking of band pairs for the rest of the label. The amplifier 27 may be constructed to change its gain by changing the amount of feedback resistance and may be conveniently accomplished by those skilled in the art using a parellel network of resistance in the feedback loop of a conventional operational amplifier with a controlled FET switch in one of the resistance paths controlled by TBL. 
     The input signal from sample and hold circuit 21 is also fed into amplifiers 24 and 25 which are preset at gains 9.2 and 1.5 respectively to determine if each ban width pair is within the established tolerance. The test is made to determine if the sequentially detected band pairs are spaced to far apart or to close in time from one another. If so, this is an indication that the data being detected could not be part of indicia that was indicated as being present by the initial &#34;start&#34; signal. 
     The comparator 28 for accomplishing same is the same type as comparator 26 and provides a low output signal (identified as BTOL) only when the check indicates the band pairs are out of tolerance. Otherwise, the output signal from comparator 28 is high indicating that no out of tolerance signals have been detected. 
     If the BTOL signal does appear a F/F 29 which is clocked by W/B transition signals is set and resets &#34;start&#34; F/F 20. 
     If a 2 Mod signal is present from F/F 43 when the output ratio = 1 signal is also present, the next B/W transition sets F/F 41 and if on the next W/B transition another 2 Mod signal appears, F/F 45 is set and start counter 46. Counter 46 counts B/W transitions and on the thirteenth count sets F/F 47. The above indicates that a two module B/W with ratio = 1 followed by a single white bar has been detected. 
     The setting of F/F 47 is one of the conditions necessary for one type of indicia valid signal to be provided if the indicia is UPC because there must be at least thirteen transitions after the five center guard bars (W,B,W,B,W) of the UPC indicia if the data is to be valid and represents the last half of UPC indicia. 
     The output from &#34;AND&#34; gate 50 indicates that 1/2 of UPC indicia is correct and should be stored and is derived if signals count &#34;13 &#34;, 2 Mod and ratio &#34;1&#34; are present. 
     In the event that no BTOL signal is provided to clear &#34;start&#34; F/F 20, on the 14th B/W transition (signal A1) and in the presence of a 2 Mod and ratio = 1 signals appearing, a F/F 61 is set and stays set if the next band pair causes a 2 Mod signal to be provided. This indicates that the data is valid, i.e., the first half of UPC has been encountered. On the other hand, if no 2 Mod signal appears on the next W/B transition, then F/F 61 is reset indicating no valid data. 
     F/F 61 is reset by the 2 Mod signal being inverted by inverter 62 which is &#34;ANDED&#34; with signal A1 in &#34;AND&#34; gate 63 which is still present because the counter 30 continues to provide such signal. 
     Thus the indicia valid signal from F/F 61 is fed to &#34;OR&#34; gate 51. If at this time no valid indicia signal has appeared on the 20th B/W transition (represented by output A2 from counter 30), F/F 75 is set by either of signals generated via &#34;AND&#34; gate 65 and 66 which respectively check ratio 2/3 and TBR and ratio 3/2 and TBL through &#34;OR&#34; gate 67. 
     F/F being set at A2 time indicates that valid TRI-BAR data is present. On the 29th B/W transition (A3 signal from counter 30) sets F/F 29 and thus causes F/F 20 to be cleared. 
     When &#34;start&#34; F/F 20 is cleared, the indicia valid signal is checked. If the indicia valid signal is true (High) one shot 72 gives an indicia valid pulse to cause the temporary storage 31 (buffer register) to dump data into a computer storage element 32 e.g., core memory. Counters 30, 46 and F/F 47, 61 and 75 are reset when &#34;start&#34; from F/F 20 goes low. 
     It should be understood that ratio detector 12 is continuously looking for the required ratios and will restart the sequence upon detection of a required ratio.