Abstract:
A power supply 10 providing a DC output voltage comprises a voltage input circuit 11, a charge buildup and transfer circuit 14, a switch including SCR3 for selectively interconnecting the input circuit 11 and the charge buildup and transfer circuit 14, a trigger circuit including a unijunction transistor gating circuit 16 for triggering the SCR3, and a sensing circuit 22 including a current reference 26 for sensing the current output to the load 38 and comparing the output to current reference 26 while providing a comparison signal to the trigger circuit 16 so as to modify the triggering of SCR3 and thus the interconnection of the voltage input circuit 11 and the current buildup and transfer circuit 14.

Description:
FIELD OF THE INVENTION 
     The present invention relates to power supplies and more particularly, to a power supply for producing a precise constant output irrespective of variations in the AC input voltage provided thereto and irrespective of changes in the load. 
     BACKGROUND OF THE INVENTION 
     A number of power supply arrangements are presently commercially available to provide a precise output irrespective of the variations in AC input voltage and changes in the load. As disclosed in U.S. Pat. No. 3,414,798 issued to Jorgen L. Nielsen on Dec. 3, 1968, one type of power supply is a switching device for selectively turning on and off the input voltage. In this power supply the input voltage is provided to rectifying and filtering networks which develop the desired output voltages. A feedback control loop samples the output of the power supply and provides the sampled voltage output to a comparison circuit which compares the sampled output with a reference voltage. A control signal is developed by the comparison circuit which is used to operate the switching device to switch on and off the input voltage at a rate to make the output voltage constant. 
     The prior art power supplies, however, have disadvantages in that generally it is more difficult to sample voltage output as voltage and make comparison thereof than to sample voltage outputs as current and make comparison thereof. Further such prior art devices provide no compensating signal to the reference source to compensate for the error signal. Also there is generally no consideration given to synchronizing the timing of switching on the input voltage at the same point in the cycle thereof in order to provide a precise voltage output. 
     SUMMARY OF THE INVENTION 
     The present invention is directed to overcoming the disadvantages of the prior art. 
     A preferred embodiment of the power supply of the invention includes a voltage input means for providing input voltage, charge buildup and transfer means for building up and transferring output to a load, trigger means for triggering the interconnection of the voltage input means and the charge buildup and transfer means, and sensing means for sensing the output to a load and comparing the output to a reference and providing a signal based on this comparison to the trigger means so as to modify the triggering of the interconnection of the voltage input means and the charge buildup and transfer means. 
    
    
     BRIEF DESCRIPTION OF THE FIGURES 
     FIG. 1 is an embodiment of the power supply of the invention. 
     FIG. 2 is a graph showing the charging cycle of the voltage buildup and transfer means of the invention. 
     FIG. 3 shows a simplified representation of the sensing circuit of the invention. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     With reference to the figures, and in particular to FIG. 1, an embodiment of the Power Supply 10 of the invention is depicted which can be used, for example, to power a microprocessor requiring a steady 5-volt DC input. Power supply 10 includes the following subcomponents: high voltage input circuit 11 comprising AC power input circuitry 12 and charge buildup and transfer circuitry 14, triggering circuit 16 including opto-coupler 18, output filter and load circuitry 20, and sensing circuit 22 including protection circuit 24. 
     In a preferred embodiment, the individual components are identified and valued as follows: 
     CAPACITORS 
     C 1  : 1050 microfarads; 330 WVDC, electrolytic 
     C 2  : 0.0022 microfarad; 600 WVDC 
     C 3  : 0.015 microfarad; 50 WVDC 
     C 4  : 0.057 microfarad; 1600 WVDC 
     C 5  : 0.33 microfarad; 100 WVDC 
     C 6  : 0.33 microfarad; 100 WVDC 
     C 7  : 6200 microfarads; 16 VDC; Mallory VPR622V016L3C 
     C 8  : 6200 microfarads; 16 VDC; Mallory VPR622V016L3C 
     C 9  : two C 8  capacitors in parallel 
     RESISTORS 
     R 1  : 200 ohm, 5 watt 
     R 2  : 30 ohm, 1/8 watt 
     R 3  : 15 K-ohm, 1/8 watt 
     R 4  : 1 K-ohm, 1/8 watt 
     R 5  : 470 K-ohm, 1/8 watt 
     R 6  : 47 ohm, 1/2 watt 
     R 7  : 12 K-ohm, 5 watt 
     R 8  : 70 ohm, 1/8 watt 
     R 9  : 470 ohm, 1/8 watt 
     R 10  : 100 ohm, 1/8 watt 
     R 11  : 40 ohm, 1/8 watt 
     R 12  : 0.5 ohm, 14 watt 
     R 13  : 0.05 ohm, 5 watt 
     R 14  : 1.3 ohm, 2 watt 
     R 15  : 1.3 ohm, 2 watt 
     R 16  : 0.001 ohm, short segment of 18 gauge wire 
     R 17  : 500 ohm, 1/4 watt potentiometer 
     R 18  : 1000 ohm potentiometer, 1/8 watt 
     R 19  : 25 K-ohm potentiometer adjusted to 6.8 K-ohm, 1/8 watt 
     R 20  : 120 ohm, 1/8 watt 
     R 21  : 470 ohm, 1/8 watt 
     INDUCTORS 
     L 5  : Toroidal Permalloy (molybdenum) powder core, about 0.4 microhenrys 
     L 6  : Toroidal Permalloy (molybdenum) powder core, about 0.2 microhenrys 
     TRANSFORMER 
     Toroidal powder core 
     Core: Arnold Engineering A123068-2 
     L 1  : 36 turns, #16 wire; closely wound in 2 layers of 18 turns each 
     L 2  : 171 turns, #16 wire; uniformly wound around the core in 2 layers 
     L 3  : 5 turns, #10 wire; closely wound in one layer, located opposite L 1   
     L 4  : 5 turns, #16 wire; 3 coils connected in parallel, covering approximately one-third the core circumference opposite L 1   
     ZENER DIODES 
     Z 1  : 6.2 volt Zener, 1 watt 
     Z 2  : 5.1 volt Zener, 1 watt 
     Z 3  : 13 volt Zener, 1 watt 
     DIODES 
     D 1  : IN914 
     D 2  : SK9000 (RCA) 
     D 3  : IN914 
     D 4  : IN914 
     D 5  : VARO:VSK231 
     D 6  : VARO:VSK231 
     D 7  : IN914 
     D 8  : IN914 
     D 9  : IN914 
     D 10  : IN914 
     SILICONE CONTROLLED RECTIFIERS (THYRISTORS) 
     SCR 1  : SK3627 
     SCR 2  : MCR 3918-6 
     SCR 3  : SK3042 
     UNIJUNCTION TRANSISTORS 
     UJT1: ECG 6409 (Sylvania) 
     UJT2: ECG 6409 (Sylvania) 
     Opto-couplers 18: ECG3040 
     NFET 26: Radio Shack Cat. No. 276-1734, adjustable current source 
     T 1  : Darlington transistor NPN, Radio Shack Cat. No. 276-2060 
     HIGH VOLTAGE INPUT CIRCUIT 
     The high voltage input circuit 11 includes a full wave rectifier bridge 30 which includes four diodes such as diode 32. The rectifier bridge 30 rectifies a 120 V AC line. Rectifier 30 is provided in parallel with a capacitor C 1 . Capacitor C 1  becomes a DC source of unregulated voltage V C1  (about 150 volts DC). The high voltage input circuit 11 further includes a transformer coil L 1  which is connected in series with capacitor C 1  and which communicates through a thyristor SCR 3  to the main charging capacitor C 4 . The other terminal of C 4  is connected to the ground end of capacitor C 1 . The charge buildup and transfer circuit 14 include capacitor C 4  and transformer coil L 2  which define a tank circuit 34 that transfers power to transformer coils L 3  and L 4  as will be explained below. 
     Initially the voltage V C4  across capacitor C 4  is zero. At time zero the SCR 3  is triggered by a current pulse from trigger circuit 16 through the gate G. The line connecting transformer coil L 1  to capacitor C 4  is now closed. The current charging capacitor C 4  through transformer coil L 1  builds up sinusoidally in time until V C4  peaks (at about 300 V). At this time the current reverses with capacitor C 4  now trying to charge capacitor C 1 . This reverse current flows for a short time until thyristor SCR 3  stops conducting. Capacitor C 4  is now isolated from capacitor C 1  and transformer coil L 1 . 
     Capacitor C 4  starts discharging through transformer coil L 2 . In fact, capacitor C 4  starts discharging through transformer coil L 2  even during the charging of capacitor C 4 , but because transformer coil L 2  is much larger than transformer coil L 1 , the current through coil L 2  is smaller, therefore allowing the voltage V C4  of capacitor C 4  to remain higher than V C1  across capacitor C 1  for a long enough period to allow thyristor SCR 3  to turn off. During the charging and the discharging of capacitor C 4 , whenever the biasing permits, diode D 5  will conduct current to the filtering and load circuits 20. 
     Eventually, due to the tank circuit 34 formed by capacitor C 4  and coil L 2 , the voltage V C4  across capacitor C 4  will go negative up to a voltage that permits diode D 6  to conduct current to the filtering and load circuits 20. The thyristor SCR 3  remains turned off. 
     The tank circuit 34 can continue to oscillate, transferring decreasing amounts of energy alternatively through diodes D 5  and D 6 . The currents through diodes D 5  and D 6  and the voltage across coils L 3  and L 4  are averaged out by the inductors L 5  and L 6  and capacitors C 7 , C 8  and C 9  which comprise the output filter 36 of filter and load circuitry 20. 
     It is to be understood that protection is provided by snubbers comprised of resistor R 1  and capacitor C 2 , and also resistor R 14  and capacitor C 5 , and also resistor R 15  and capacitor C 6 . 
     THE TRIGGERING CIRCUIT 
     The triggering circuit 16 is provided in order to trigger the charging of capacitor C 4  by coil L 1  to maintain a constant voltage across the load. The trigger circuit 16 receives an input from the sensing circuit 22 which is proportional to the difference between the desired reference voltage V ref  and the voltage provided to the load as measured by a current comparison. This input is in the form of a current which is directly proportional to the size of the voltage difference which is provided to the light emitting diode 40 of opto-coupler 18. This current controls the timing of the triggering of thyristor SCR 3 . 
     The basic elements of the triggering circuit include opto-coupler 18, unijunction transistor UJT 2 , capacitor C 3 , Zener diode Z 3 , diode D 2 , thyristor SCR 3  and resistors R 7 , R 8  and R 9 . Opto-coupler 18, resistor R 7  and diode D 2  provide communication between capacitor C 1  and base 2 of transistor UJT 2 . Base 1 of transistor UJT 2  is communicated to the gate G of thyristor SCR 3  through resistor R 8  and with ground through resistors R 8  and R 9  and capacitor C 4 . The series combination of resistor R 5  and capacitor C 3  is provided in a parallel arrangement with Zener diode Z 3 . This parallel arrangement is communicated between capacitor C 1  with other elements such as thyristor SCR 1  and resistors R 3 , R 4  which will be discussed below, and ground. 
     The interconnection between resistor R 5  and capacitor C 3  communicates with the emitter E 2  of transistor UJT 2 . Transistor UJT 2  is constructed such that when the voltage applied to emitter E 2  rises to a certain ratio (intrinsic ratio) of the voltage applied to base 2, the resistance between emitter and base 1 of transistor UJT 2  become very small, allowing capacitor C 3  to discharge across transistor UJT 2 . The greater the current from the sensing circuit 22 passing through opto-coupler 18, the higher the voltage at base 2 of transistor UJT 2 , and the larger capacitor C 3  must charge before the intrinsic ratio is reached. 
     Assume the voltage across capacitor C 4  (V C4 ) is higher than the voltage across the series combination of coil L 1  and C 1  (V L1 ), the voltage across the triggering circuit 16 is essentially zero because diode D 2  is reverse biased, and capacitor C 3  is completely discharged. In FIG. 1, capacitor C 4  communicates with diode D 2  through zener diodes Z 1 , Z 2 , Z 3  and resistor R 7 . Thus as V C4  decreases with respect to V L1 , eventually diode D 2  is forward biased, and current starts charging up capacitor C 3  and immediately sets the voltage across Zener diode Z 3  to a maximum voltage V Z3 . Given sufficient time, the voltage across C 3  (V C3 ) will rise to V Z3 . When capacitor C 3  has a voltage high enough, emitter E 2  of transistor UJT 2  will conduct and discharge capacitor C 3  through the gate G of thyristor SCR 3  triggering the charging of capacitor C 4 . As thyristor SCR 3  conducts, the voltage across the triggering circuit 16 and the voltage across Zener diode Z 3  (V Z3 ) again drops essentially to substantially zero. This fact resets the transistor UJT 2  very fast for the next triggering and allows resistor R 5  to be small for a fast charging of capacitor C 3 . Resistor R 5  can be much smaller than would be possible if V Z3  is set constant. 
     The object of regulation is to maintain a constant voltage V L  across the load 38. When the load demands more energy (for instance the load resistance is lowered), the triggering of thyristor SCR 3  must occur more frequently (running at a higher frequency), and/or the voltage V C4  must be charged to a higher value. 
     In this power supply 10, a single control modulates both frequency and charged voltage V C4 . Since both frequency and voltage are controlled, the frequency need not change very much from full load to almost zero load. In fact the frequency need only change from about 30 KHz to 15 KHz. 
     FIG. 2 shows the thyristor SCR 3  initially being triggered at time t=0 and how the voltage V C4  (measured with reference V=0 volts at the ground end of capacitor C 1 ) varies with time. The energy transferred to the load during the charging of capacitor C 4  has been neglected. 
     The next triggering of thyristor SCR 3  can occur any time from t=T 0  (when V C4  reaches a minimum) to t=T 1  (when V C4  reaches a second maximum V C4med  in the free oscillation zone or when V C4  =V C1 , whichever comes first). The maximum charged voltage of capacitor C 4 , V C4max , depends on where the triggering occurs. If V C4t  is the algebraic value of V C4  at triggering time, then: 
     
         V.sub.C4max ≃2V.sub.C1 -V.sub.C4t 
    
     The energy transferred per cycle is thus: 
     
         1/2C.sub.4 (V.sup.2.sub.C4max -V.sup.2.sub.C4t)=2C.sub.4 V.sub.Cl (V.sub.C1 -V.sub.C4t) 
    
     Maximum power occurs at V C4t  =-V C4min  and zero power occurs and V C4t  =+V C1 . 
     The time T S  where the charging of capacitor C 3  of the triggering circuit 16 begins is always synchronized with the V C4  waveform because V C3  remains zero from the last triggering up to T S  (where V C4  begins to be lower than V C1 ). The charging of C 3   also follows a fixed pattern in time because resistor R 5  and capacitor C 3  and the voltage V Z3  at Zener diode Z 3  are constants during this charging. The timing for the next triggering is done by varying the base 2 voltage of transistor UJT 2  which depends on how much current is fed to it from transistor 42 of opto-coupler 18. 
     The amount of current flowing through the diode 40 of the opto-coupler 18 comes from the sensing circuit 22 (discussed below). The larger the current, the longer it takes capacitor C 3  to build up a charge which is equal to the intrinsic ratio times the voltage at base 2 of transistor UJT 2  and the larger the interval before thyristor SCR 3  is triggered, and thus (FIG. 2) the lower the power output to output filter and load circuit 20. Thus in this embodiment the rate of charging of capacitor C 3  is a constant and the voltage at base 2 of transistor UJT 2  is varied with time, depending on the signal from the sensing circuit 22. A diode D 1  is used to assure that V base2  of transistor UJT 2  never goes below V Z3  where improper triggering of thyristor SCR 3  may occur (i.e., insufficient voltage to turn on thyristor SCR 3 ). 
     Expanding on the above triggering circuit 16 in FIG. 1, series resistors R 3  and R 4  are provided in parallel with thyristor SCR 1 , with the gate of thyristor SCR 1  communicating with the interconnection between resistors R 3  and R 4 . This parallel arrangement between resistors R 3 , R 4  and thyristor SCR 1  communicates capacitor C 1  with resistor R 5  and capacitor C 3  via diode D 2 , resistor R 7  and Zener diodes Z 1 , Z 2 . 
     At start up, when the input capacitor C 1  is charging up, the rate of increase of V C1  is slow, of the order of the AC line frequency times the line voltage. The first discharge of capacitor C 3  through the emitter of transistor UJT 2  will occur at low voltage if R 5  is too small (as is desirable for other than start-up). This will not trigger thyristor SCR 3 , therefore the transistor UJT 2  may not reset. 
     At start-up there must be a large resistor R 3  in series with resistor R 5  to slow down the charging of capacitor C 3 , allowing time for the voltage at the base B 2  of the transistor UJT 2  to grow large enough for the triggering of thyristor SCR 3 . But resistor R 3  must drop out during normal operation. This is achieved with thyristor SCR 1 . 
     After the first discharge, the thyristor SCR 1  will be turned on at the next charging of capacitor C 3  because the current through resistor R 3  is then large enough to turn on thyristor SCR 1 , thus bypassing resistor R 3 . Since the turn-off time of thyristor SCR 1  is chosen to be large, SCR 1  is essentially on all the time after the first shooting of capacitor C 3 . 
     A unijunction transistor UJT 1  is also provided with base 2 thereof communicating with the series interconnection between Zener diode Z 1  and Z 2  and base 1 connecting with resistor R 2 . The emitter E 1  of transistor UJT 1  communicates with the series interconnection between resistors R 5  and capacitor C 3  and thus with the emitter E 2  of transistor UJT 2 . 
     In practice, thyristor SCR 3  may not turn off when it is triggered at V C4  too close to V C1  (FIG. 2). Therefore capacitor C 3  has to be discharged by some means when the voltage V base2  of transistor UJT 2  imposes a triggering time where V C4t  is too close to V C1  (around V c4med  in FIG. 2). 
     The value of resistor R 7  is chosen such that thyristor SCR 3  cannot be turn-on when V C4t  is near V C1 . At a low value for V C1  -V C4 , the current through resistor R 7  is primarily channeled into the transistor UJT 2  because V Z1  +V Z2  +V Z3  is higher than the base 2 voltage of UJT 2  (the impedances of the Zener diodes Z 1 , Z 2  and Z 3  are at this point very large). Resistor R 7  allows only enough current to maintain V base2  of transistor UJT 2  high, preventing the discharge of capacitor C 3  to thyristor SCR 3 . The V base2  of transistor UJT 1 , on the other hand, is deprived of current and fully conducts as the emitter voltage is greater than the intrinsic ratio times the voltage at base 2, discharging capacitor C 3  into resistor R 2 . 
     It is to be understood that over current protection for thyristor SCR 3  is provided by thyristor SCR 2  and resistors R 10 , R 11 , R 12 , R 13  and diodes D 3 , D 4 . As shown in FIG. 1, resistors R 12 , R 13  are provided in tank circuit 34 with thyristor SCR 2  and resistor R 10 , R 4  and diodes D 3 , D 4  connected between tank circuit 34 and capacitor C 1 . 
     It is also to be understood that unwanted voltage fluctuations that can degrade the operation of opto-coupler 18 can be bypassed by connecting the base of its transistor 42 to the interconnection between capacitor C 3  and Zener diode Z 3  (i.e. ground end of C 3 ) by a series combination of a resistor (larger than 0.5 megaohm) and a capacitor (less than 150 picofarad). Some opto-couplers are less sensitive to these voltage fluctuations than others and may not need the bypassing connection described above. 
     THE SENSING CIRCUIT 
     The sensing circuit 22 provides a current to opto-coupler 18 that is proportional to the difference between the desired or reference voltage V ref  across the load and the actual voltage across the load V L  as measured by a current comparison discussed below. The sensing circuit 22 is principally comprised of resistors R 16 , R 17 , R 18  and R 19 , transistor or FET 26 and a current amplification device T 1  comprised of transistor pair 28. Resistor R 16  is provided in communication with the load 38 so as to sense the current through load 38 returning to the power supply 10. Potentiometer or Resistor R 18  is provided in parallel with resistor 16 and thus sees the same voltage as does resistor R 16 . The gate of transistor FET 26 is connected to resistor R 18  with the source connected to potentiometer or resistor R 17  which is connected to one end of resistor R 18 . The source of transistor FET 26 is connected to potentiometer or resistor R 19  and the base of the first transistor 44 in current amplification device T 1 . The other terminal of resistor R 19  communicates with the positive terminal to which the load 38 is connected. Device T 1  is comprised of two transistors 44, 46, the collectors of which communicate with the diode 40 of opto-coupler 18, and the emitter of the first transistor 44 communicates with the base of the second transistor 46. The emitter of the second transistor 46 communicates with the negative terminal (ground) to which the load 38 is connected. 
     A simplified representation of the sensing circuit 22 is depicted in FIG. 3. If the V BE  of current amplification device T 1  can be considered constant, then: 
     
         i.sub.in =(V.sub.L -V.sub.BE)/R.sub.19, 
    
     a linear function of V L   
     Since i out  is constant, the difference Δi can be set to be proportional to (V L  =V constant ) where V constant  is some reference point adjustable by the value of i out  : 
     
         Δi=i.sub.in -i.sub.out 
    
     thus: ##EQU1## where: 
     
         V.sub.BE +i.sub.out R.sub.19 =V.sub.reference. 
    
     After amplification of Δi, the current through the diode 40 of the opto-coupler 18 is roughly proportional to the deviation of V L  from V reference . The signal from diode 40 creates a current through the transistor 42 of the opto-coupler 18 that is roughly proportional to Δi. This current is fed to the interbase resistance (through base 2) of transistor UJT 2 , creating an almost proportional V base2  of transistor UJT 2 . This V base2 , in turn, determines when the next triggering of thyristor SCR 3  and will occur as explained above. 
     One way to improve the regulation is to vary the reference current (i out ) by an amount that is proportional to the load to offset the necessary Δi that is needed for regulation. It is convenient to use Δi itself as information on the load to change i out , but this is unstable feedback. Therefore, an independent source of information on the load must be used to change i out  as the load changes. 
     This is where the resistance R 16  comes into play. R 16  essentially senses the current returning from the load 38 to the power supply. The voltage drop across R 16  is proportional to the load power demand (since V L  is constant). Now, the use of current reference (instead of the traditional voltage reference) by means of a field effect transistor provide a method of adding more current to the reference i out  proportionally to the load as shown in FIG. 1. In FIG. 1, resistor R 18  is a potentiometer that biases the right amount of voltage from R 16  to the gate of transistor FET 26 to exactly offset the Δi used for regulation. The Δi is still there, but it is on top of a higher reference i out  such that the resulting V L  remains unchanged and thus is not load dependent as this load changes. 
     The remaining portion of sensing circuit 22 includes diodes D 7 , D 8 , D 9  and D 10  along with resistors R 20  and R 21 . These components protect the power supply, should the user improperly connect lines 50 and 52. 
     Because physical location of the load 38 and connections thereto varies with use, the sensing lines 50, 52 connecting diode D 9  and resistor R 19  to the load 38 cannot be permanently connected. Therefore user mistakes may occur, such as: (a) the user may forget to connect them to the load, or (b) the connections may be loose, or (c) the connecting lines may be broken, or (d) the connections may be to the wrong polarities. In these cases the power supply and the load must be protected from overvoltage because the power supply may run at maximum power if the sensing circuit is not connected properly. 
     Protection is thus provided for by R 20 , R 21 , D 7 , D 8 , D 9  and D 10  as follows. 
     If the positive line 52 is not connected to resistor R 19 , then sensing circuit 22 will sense the output voltage at capacitor C 9  instead, through resistor R 20 , which is connected to capacitor C 9  by line 54. The regulation is then for V C9 . 
     If the negative line 50 is not connected to diode D 9 , then the current through the opto-coupler 18 will return to the ground of capacitor C 9  through diodes D 7  and D 8  and line 56. Regulation is now for V L  with the ground shifted by approximately one forward voltage of a diode. That is, V L  is not held constant at V reference  but at approximately V reference  +V Fdiode . 
     If the polarities of the lines 50, 52 are reversed, then diode D 9  will block or isolate the positive line 52, and diode D 10  will return the current through the diode 40 of the opto-coupler 18 to the negative line 50. Since this current is now fairly large, the output power will be very small, depressing V L  to a low voltage. 
     Diode D 9  serves an additional purpose. That is, for increasing the drain voltage of transistor FET 26 so that it can operate properly. To maintain diode D 9  at a constant voltage drop, resistor R 21  is used to feed a large current through it. 
     Further in this sensing circuit 22, potentiometer R 17  is used for the adjusting of V L  (and thus also i out ) in the range of from 4 volts to 8 volts. 
     It is to be understood that power source 10 can be made programmable to provide a programmable voltage output by replacing the constant current sink by a programmable current sink. The power supply can additionally be made to have a constant current output by replacing resistor R 19  by a constant current source such as a field effect transistor. 
     It also can be appreciated that low voltage rated SCRs can be used for higher input voltage if the voltage is divided and several charge buildup and transfer circuits, such as circuit 14, are provided in parallel across each portion of the divided input. 
     INDUSTRIAL APPLICABILITY 
     The operation of the power supply 10 of the invention is as follows. A fully rectified voltage signal is provided to transformer coil L 1 . The voltage thereacross is transferred to capacitor C 4  of tank circuit 34 when thyristor SCR 3  is turned on by the trigger circuit 16. When this occurs, the charge is built up across capacitor C 4 , and that power is transferred through transformer coil L 2  to transformer coils L 3  and L 4  and therefrom to load 38. Sensing circuit 22 senses the output to the load 38 and provides a signal through opto-coupler 18 to the trigger circuit 16 in order to control the timing of the opening of thyristor SCR 3 . 
     Other aspects and objects of the invention can be obtained from a review of the claims and the figures appended hereto.