Abstract:
Radio frequency/millimeter wave integrated circuits (RF/MMICs) that employ a resonance mechanism between an input stage and a transistor are disclosed. The circuits contain an input stage, a transistor; and a transformer connected between either a gate or a base of the transistor and a voltage supply of the input stage. The methods disclosed maximize either a collector current or a drain current of a transistor by placing a transformer between the transistor and a voltage source.

Description:
CROSS REFERENCE TO RELATED APPLICATION 
       [0001]    This application claims the benefit of U.S. provisional patent application Ser. No. 60/705,861, filed Aug. 4, 2005 for a “Resonant Types of Common-Source/Common-Emitter Structure for High Gain Amplification” by Daquan Huang and Mau-Chung F. Chang, the disclosure of which is incorporated herein by reference in its entirety. 
     
    
     STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT 
       [0002]    The present invention was made with support from the U.S. Government under Grant number N66001-04-1-8934 awarded by the U.S. Navy. The United States Government has certain rights in the invention. 
     
    
     FIELD 
       [0003]    The present invention relates to amplification circuits. More particularly, the present invention relates to radio frequency/millimeter wave integrated circuits (RF/MMICs) that employ a resonance mechanism between an input stage and a transistor. 
       BACKGROUND 
       [0004]    Higher gain has always been desirable in amplification circuits, especially in radio frequency/millimeter wave integrated circuits (RF/MMICs). 
         [0005]    In conventional radio frequency and millimeter wave circuit input stage designs, inductors are used such that they cancel the parasitic capacitances and match the input impedance to that of the signal source, aiming either to maximize the available power gain or to minimize the noise figure. However, in many analog and mixed-signal circuit designs, voltage gain is the only concern. Therefore, impedance matching is not the optimal design strategy. 
         [0006]    To overcome this deficiency, the present disclosure presents a new design that employs a resonance mechanism to maximize a voltage gain. 
       SUMMARY 
       [0007]    According to the present disclosure, amplification circuits are disclosed. 
         [0008]    According to a first embodiment disclosed herein, a circuit is disclosed, comprising: an input stage; a transistor; and a transformer connected between a gate of the transistor and a voltage supply of the input stage. 
         [0009]    According to a second embodiment disclosed herein, a circuit is disclosed, comprising: an input stage; a transistor; and a transformer disposed between a base of the transistor and a voltage supply of the input stage. 
         [0010]    According to a third embodiment disclosed herein, a method for maximizing a drain current of a transistor is disclosed, comprising: selecting a transistor; selecting a transformer; and connecting the transformer between a gate of the transistor and a voltage source. 
         [0011]    According to a fourth embodiment disclosed herein, a method for maximizing a collector current of a transistor is disclosed, comprising: selecting a transistor; selecting a transformer; connecting the transformer between a base of the transistor and a voltage source. 
     
    
     
       BRIEF DESCRIPTION OF THE FIGS. 
         [0012]      FIG. 1  depicts a series resonant common-source circuit as known in the Prior Art; 
           [0013]      FIG. 2  depicts a parallel resonant common-source circuit as known in the Prior Art; 
           [0014]      FIG. 3  depicts an electrically equivalent circuit of  FIG. 1 ; 
           [0015]      FIG. 4  depicts an electrically equivalent circuit of  FIG. 2 ; 
           [0016]      FIG. 5  depicts an embodiment of a series resonant common-source circuit according to the present disclosure; 
           [0017]      FIG. 6  depicts an embodiment of a parallel resonant common-source circuit according to the present disclosure; 
           [0018]      FIGS. 7   a - c  depict other embodiments of a series resonant common-source circuit according to the present disclosure; 
           [0019]      FIGS. 8   a - c  depict other embodiments of a parallel resonant common-source circuit according to the present disclosure; 
           [0020]      FIG. 9  depicts an embodiment of a parallel resonant common-emitter circuit according to the present disclosure; 
           [0021]      FIG. 10  depicts an embodiment of a series resonant common-emitter circuit according to the present disclosure; 
           [0022]      FIGS. 11   a - c  depicts other embodiments of a parallel resonant common-emitter circuit according to the present disclosure; and 
           [0023]      FIGS. 12   a - c  depicts other embodiments of a series resonant common-emitter circuit according to the present disclosure. 
       
    
    
       [0024]    In the following description, like reference numbers are used to identify like elements. Furthermore, the drawings are intended to illustrate major features of exemplary embodiments in a diagrammatic manner. The drawings are not intended to depict every feature of every implementation nor relative dimensions of the depicted elements, and are not drawn to scale. 
       DETAILED DESCRIPTION  
       [0025]    According to prior art shown in  FIGS. 1 and 2 , MOS transistors  10  in common-source circuits  20  and  30  convert the input voltage V gs  into the drain current I D , wherein I D  for NMOS transistor is 
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         [0000]    I D  for PMOS transistor is 
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         [0000]    μ n  is the mobility of electrons; μ P  is the mobility of holes; C ox  is the gate oxide capacitance per unit area; W and L are the width and length of the gate; V th  is the threshold voltage; ω O  is resonant angular frequency determined by 
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         [0000]    I s  is the inverse saturation current; and V T  is the threshold voltage. As known in the art, increasing V gs  increases the output current I D  that determines the output voltage by V out =I D Z O , where Z o  is the output impedance of the circuit. Therefore, maximizing V gs  maximizes the voltage gain. 
         [0026]    The series resonant input circuit  40  and the parallel resonant input circuit  50  shown in  FIGS. 3 and 4  are electrically equivalent to common-source circuits  20  and  30 , respectively. As can be seen in  FIGS. 3 and 4 , capacitors  60  represent the transistor gate capacitance of the transistors  10  in common-source circuits  20  and  30 . 
         [0027]    In the series resonant input circuit  40 , driven by voltage source V S , as shown in  FIG. 3 , the voltage (V L  or V C ) on the reactance elements (the inductor  55  and the capacitor  60 ) is Q times higher than the input voltage V in , where Q is the quality factor (Q-factor) defined by Q=ω 0 L/r=1/rω 0 C; 
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         [0000]    V L =jQV in ; V C =jQV in  and variables L, C and r are the series inductance of the inductor  55 , capacitance of the capacitor  60  and the parasitic resistance  65  respectively. Therefore, the input voltage V in  is amplified by Q times when it is applied to the series resonant input circuit  40 . However, the input voltage V in  may further be amplified by providing a smaller signal source impedance in the series resonant input circuit  40  as discussed below. 
         [0028]    In the parallel resonant input circuit  50 , driven by a current source I S  as shown in  FIG. 4 , the current (I L  or I C ) of the reactance elements (the inductor  55  and the capacitor  60 ) is Q times larger than the input current I in , where Q=R/ω 0 L=Rω 0 C; 
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         [0000]    IL L=jQV   in ; I C =jQV in  and variables L, C and R are the parallel inductance of the inductor  55 , capacitance of the capacitor  60  and the parasitic resistance  65 . Therefore, I L  is Q times larger than the input current I in . 
         [0029]    In one exemplary embodiment, the present disclosure amplifies the input voltage V in  of the common-source circuit  20  by employing a resonance mechanism like a transformer  70 , for example, to reduce the signal source impedance Z S  by 1/N 2  in the common-source circuit  20 , as shown in  FIG. 5 . By reducing the signal source impedance Z S  using the transformer  70 , a higher Q-factor, Q=ω 0 L/real(Z S IN 2 )=1/real(Z 2 IN 2 )ω 0 C, is obtained. 
         [0030]    In another exemplary embodiment, the present disclosure amplifies the transistor  10 &#39;s input voltage V gs  of the common-source circuit  30  by employing a resonance mechanism like a transformer  80 , for example, with the primary to secondary coil turn ratio N 1 :N 2 &gt;1 in the common-source circuit  30 , as shown in  FIG. 6 . 
         [0031]    In another exemplary embodiment, a variable capacitor device  90  like, for example, a varactor, disposed between the transformer  70  and the transistor  10  may be used to adjust the resonant frequency of the common-source circuit  20 , as shown in  FIG. 7   a . The resonant frequency may be determined by 
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         [0000]    where C includes capacitance of variable capacitor device  90  and inductor/transformer parasitic capacitance. 
         [0032]    Similarly, a variable capacitor device  91  like, for example, a varactor, disposed between the transformer  70  and V in  may be used to adjust the resonant frequency of the common-source circuit  20 , as shown in  FIG. 7   b.    
         [0033]    Also, variable capacitor device  92 , disposed between the transformer  70  and V in , together with a variable capacitor devices  93 , disposed between the transformer  70  and the transistor  10  may also be used to adjust the resonant frequency of the common-source circuit  20 , as shown in  FIG. 7   c.    
         [0034]    In another exemplary embodiment, a variable capacitor device  95  like, for example, a varactor, disposed between the transformer  80  and the input voltage V in , may be used to adjust the resonant frequency of the common-source circuit  30 , as shown in  FIG. 8   a.    
         [0035]    Similarly, a variable capacitor device  96  like, for example, a varactor, disposed between the transformer  80  and the transistor  10  may be used to adjust the resonant frequency of the common-source circuit  30 , as shown in  FIG. 8   b.    
         [0036]    Also, variable capacitor device  97 , disposed between the transformer  80  and V in , together with a variable capacitor devices  98 , disposed between the transformer  80  and the transistor  10  may also be used to adjust the resonant frequency of the common-source circuit  30 , as shown in  FIG. 8   c.    
         [0037]    In another exemplary embodiment, teachings of the present disclosure may be applied to common-emitter circuit  140  using bipolar technology as shown in  FIGS. 9 and 10 . 
         [0038]    A bipolar transistor  110  in the common-emitter circuit  140  converts the input voltage V be  into the collector current I C , wherein 
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         [0000]    As known in the art, increasing V be  increases the output current I C  that in turn yields higher voltage gain. Therefore, employing a resonance mechanism like a transformer  100 , for example, with the primary to secondary coil turn ratio N 1 :N 2 &gt;1 in the common-emitter circuit  140 , as shown in  FIG. 9  amplifies the transistor  110 &#39;s input voltage V be  of the common-emitter circuit  140 . 
         [0039]    Similarly, employing a resonance mechanism like a transformer  165 , for example, in the common-emitter circuit  160 , as shown in  FIG. 10  also amplifies the transistor  110 &#39;s input voltage V bc  of the common-emitter circuit  160 . 
         [0040]    In another exemplary embodiment, a variable capacitor device  101  like, for example, a varactor, disposed between the transformer  100  and the input voltage V in  may be used to adjust the resonant frequency of the common-emitter circuit  140 , as shown in  FIG. 10   a.    
         [0041]    Similarly, a variable capacitor device  102  like, for example, a varactor, disposed between the transformer  100  and the transistor  110  may be used to adjust the resonant frequency of the common-emitter circuit  140 , as shown in  FIG. 10   b.    
         [0042]    Also, variable capacitor device  103 , disposed between the transformer  100  and V in , together with a variable capacitor devices  104 , disposed between the transformer  100  and the transistor  110  may also be used to adjust the resonant frequency of the common-emitter circuit  140 , as shown in  FIG. 10   c.    
         [0043]    In another exemplary embodiment, a variable capacitor device  180  like, for example, a varactor, disposed between the transformer  165  and the transistor  110  may be used to adjust the resonant frequency of the common-emitter circuit  160 , as shown in  FIG. 11   a.    
         [0044]    Similarly, a variable capacitor device  181  like, for example, a varactor, disposed between the transformer  165  and V in , may be used to adjust the resonant frequency of the common-emitter circuit  160 , as shown in  FIG. 11   b.    
         [0045]    Also, variable capacitor device  182 , disposed between the transformer  165  and V in , together with a variable capacitor devices  183 , disposed between the transformer  165  and the transistor  110  may also be used to adjust the resonant frequency of the common-emitter circuit  160 , as shown in  FIG. 11   c.    
         [0046]    The foregoing detailed description of exemplary and preferred embodiments is presented for purposes of illustration and disclosure in accordance with the requirements of the law. It is not intended to be exhaustive nor to limit the invention to the precise form(s) described, but only to enable others skilled in the art to understand how the invention may be suited for a particular use or implementation. The possibility of modifications and variations will be apparent to practitioners skilled in the art. No limitation is intended by the description of exemplary embodiments which may have included tolerances, feature dimensions, specific operating conditions, engineering specifications, or the like, and which may vary between implementations or with changes to the state of the art, and no limitation should be implied therefrom. Applicant has made this disclosure with respect to the current state of the art, but also contemplates advancements and that adaptations in the future may take into consideration of those advancements, namely in accordance with the then current state of the art. It is intended that the scope of the invention be defined by the Claims as written and equivalents as applicable. Reference to a claim element in the singular is not intended to mean “one and only one” unless explicitly so stated. Moreover, no element, component, nor method or process step in this disclosure is intended to be dedicated to the public regardless of whether the element, component, or step is explicitly recited in the claims. No claim element herein is to be construed under the provisions of 35 U.S.C. Sec. 112, sixth paragraph, unless the element is expressly recited using the phrase “means for . . . ” and no method or process step herein is to be construed under those provisions unless the step, or steps, are expressly recited using the phrase “step(s) for . . . ”