Abstract:
A method and apparatus is disclosed for determining the velocity of a document over a fixed distance of travel. Sensing means are provided for generating signals which are used in determining the value of the time the document requires to move over the fixed distance. Using terms of a Taylor series expansion of the velocity equation, a value of the velocity is determined utilizing digital elements requiring only multiplication and addition operations. The elements include a digital multiplier and accumulator together with a plurality of storage devices which utilize the value of the time together with a plurality of predetermined constants to determine and output the value of the velocity to a display which displays the velocity in numerical form.

Description:
BACKGROUND OF THE INVENTION 
     This invention relates to a method and apparatus for measuring and displaying in numerical form the speed of a moving member. In high speed document sorters or similar devices wherein documents are transported at high speeds past a reading member such as a magnetic transducer and where data is read from each document for use in sorting the document, it is desirable to know the speed of the document to insure that the document will move past the reading member at a speed which will allow the reading member to provide a valid read operation. Normally the velocity of the document must fall within a predetermined range of velocity values in order that the reading member will produce a valid read operation. One method of measuring the speed of a document over a given distance is to set up two photo-sensors at a fixed distance (d) apart adjacent the path of movement of the document. When the object is sensed by the first sensor a digital oscillator is started and when the object reaches the second sensor the oscillator is stopped. The number of pulses (n) produced by the oscillator during this time is counted. The time taken for the object to travel the fixed distance between the two sensors is given by the equation: 
     
         t =  n ×(1/f ) 
    
     where f = frequency of the oscillator. Since the fixed distance (d) between the two sensors is known, the speed (v) of the document is given by the equation 
     
         v = (d/n) × f. 
    
     To obtain a high accuracy of measurement in measuring the time (t), the oscillator frequency must be made very large and therefore the number of pulses measured must be very large. In utilizing digital processing equipment to determine this speed, a large memory would be required to store the number of pulses in addition to requiring a large capacity for performing the division of df/n digitally, the operation being relatively slow due to the number of divisional operations required. It is therefore an object of this invention to provide a method and apparatus for measuring the speed of a document utilizing digital apparatus. It is another object of this invention to provide a method and apparatus for measuring the speed of a document wherein digital multiplication rather than digital division circuitry is utilized. It is a further object of this invention to provide a method and apparatus for measuring the speed of a document which requires minimum system hardware to implement the method resulting in lower cost of operation. 
     SUMMARY OF THE INVENTION 
     In order to carry out these objects there is provided a pair of sensing members which together with an oscillator and counter determine the time a document travels over a fixed distance between the sensing members. Utilizing a Taylor series expansion of the velocity equation distance/time about a preselected mean velocity of the document, the velocity of the document can be determined using only a multiplier, an accumulator and a plurality of storage devices. After a series of multiplication and addition operations have been performed, the accumulator outputs the value of the velocity to a numerical display unit which displays the velocity in numerical form. The multiplier and accumulator are operated in accordance with the equation: 
     
         V(t) = K.sub.5 + t [K.sub.6 + t (K.sub.7 + K.sub.4 t)] 
    
     where the constants K 4  to K 7 , inclusive, are determined and stored in the storage devices prior to the sensing of the document as it moves between the sensing members, the constants being a function of the fixed distance between the photosensors and the speed range allowable by which the reading member will provide a valid read operation. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a schematic representation of the location of document sensing devices adjacent the path of movement of a document. 
     FIG. 2 is a graphical relationship between velocity and time of movement of the document over a fixed distance. 
     FIG. 3 is a block diagram of the system utilized in determining the speed of the document in accordance with a preferred embodiment of the invention. 
     FIG. 4 is a flow diagram showing the method of the present invention performed by the system of the present invention. 
     FIG. 5 is a diagram illustrating the various timing and control signals (A)-(S) employed in operation of the present invention. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring now to FIG. 1 of the drawing, there is illustrated the location of a pair of photo-detectors 20, 22 together with associated light sources 24, 26, respectively, adjacent the path of movement of a document 28, such as a check, which detectors and light sources may be found on document sorter devices of the type that are well known in the art. As shown in FIG. 1, the photo-detectors 20, 22 are separated by a predetermined fixed distance d. The leading edge of the document 28 will intercept the photo-detectors 20 and 22 resulting in the generation of a pair of control signals which, as will be described more fully hereinafter, will control the generation of a number of clock pulses n generated by an oscillator and representing the time the document required to travel over the distance d. Since the velocity V of the document is determined by the equation: 
     
         V = d/t and t = n × (1/f) 
    
     where 
     f = frequency of the oscillator, the velocity can be determined by the equation: 
     
         V = (d/n) × f. 
    
     As illustrated in FIG. 2, the velocity of the document is represented by the curve 30 which is a function of distance and time. To approximate the curve 30 using a Taylor series expansion, the following general equation of f(x) about a given point a along the curve 30 apply: ##EQU1## where the designation &#34;!&#34; represents the factorial function of the numerical designation. Applying the above equation to FIGS. 1 and 2 
     V = speed of object in inches/sec 
     d = distance between photo-detectors 
     n = number of pulses counted 
     V m  = mid-range of speeds to be measured (inches/sec) 
     f = oscillator frequency in H z  or cps 
     t m  = mid-range of time to be measured (seconds) 
     n m  = count n at V m   
     and using the standard equation 
     
         V = (d × f)/n and t = n/f 
    
     resulting in V = d/t 
     and substituting f(x) = V(t) 
     x = t 
     a = t m  = (n m  /f) 
     Equation (1) becomes: ##EQU2## Equation 2 represents the first four terms of the Taylor series expansion. If more accuracy is required in the determination of the value of the velocity, more terms may be added 
     letting K 1  = V(t m ) = d/t m  ##EQU3## where V is the function V(t) and V 1 , V 2 , V 3  are the successive derivatives of the function V(twhere t is evaluated at t m . These terms were developed using the general equation ##EQU4## where t = t m   
     n = n th  derivative. 
     Equation 3 represents the derivative of the function V(t), n times and then evaluating the result for t = t m  where t m  is a preselected mean value taken between the value of time which define the allowable range of velocity of the document to insure a valid read operation by the magnetic read head associated with the sorting apparatus. Thus, it is obvious that the constants K 1  - K 4 , inclusive, can be determined prior to the operation of the sorting apparatus. 
     Substituting the constants K 1  -K 4 , inclusive, as defined above, Equation 2 becomes 
     
         V(t) = K.sub.1 + (t-t.sub.m)K.sub.2 + (t-t.sub.m).sup.2 K.sub.3 + (t-t.sub.m).sup.3 K.sub.4 =  K.sub.1 + K.sub.2 t- K.sub.2 t.sub.m + K.sub.3 t.sup.2 - K.sub.3 (2t) (t.sub.m) + K.sub.3 t.sub.m.sup.2 + K.sub.4 t.sup.3 -K.sub.4 (3t.sup.2) (t.sub.m) + K.sub.4 (3t.sub.m.sup.2) (t) -K.sub.4 (t.sub.m).sup.3 = (K.sub.1 - t.sub.m K.sub.2 + K.sub.3 t.sup.2 m -K.sub.4 t.sup.3 m) + (K.sub.2- 2K.sub.3 t.sub.m + 3K.sub.4 t.sub.m.sup.2)t + (K.sub.3 - 3K.sub.4 t.sub.m)t.sup.2 + k.sub.4 t.sup.3 [Equation 4] 
    
     letting 
     K 5  = (K 1  -K 2  t m  + K 3  t m   3  - K 4  t m   3 ) 
     K 6  = (K 2  - 2 K 3  t m  + 3K 4  t m   2 ) 
     K 7  = (K 3  - 3 K 4  t m ) 
     Equation (4) becomes 
     
         V(t) = K.sub.5 + K.sub.6 t + K.sub.7 t.sup.2 + K.sub.4 t.sup.3 = K.sub.5 + t [K.sub.6 + t(K.sub.7 + K.sub.4 t)]                      [Equation 5] 
    
     From Equation (5) it can be seen that the velocity of the document can be determined by knowing t where t = n/f and the constants K 4  -K 7 , inclusive, each of which are based on the fixed distance d and a preselected value of time taken between the allowable limits of time which define the range of allowable velocity as described previously. 
     Referring now to FIG. 3, there is shown the configuration of a system of digital devices which may be utilized in determining the speed of the document in accordance with a preferred embodiment of the invention. For purposes of the present description, the system includes a type 93406 read only memory (ROM) 32 manufactured by Texas Instruments Incorporated, in which memory are stored in binary form the constants K 4 , K 5 , K 6  and K 7  and the constant 1/frequency. In addition to the ROM memory 32, other Texas Instrument elements of the system, except where noted, include a type 9344 digital multiplier 34, an accumulator 36 which may be a combination of a type 7483 binary full adder and type 74175 Quad D-type latches, a type 9316 binary counter 38 manufactured by Fairchild Semiconductor for counting the number of clock pulses that occur between the time the document 28 (FIG. 1) moves between the sensors 20 and 22 (FIG. 1), a free running oscillator 40 for generating the clock pulses used in determining the time of travel of the document between the two sensors 20 and 22, and a second type 93406 ROM 42 for storing the timing and control signals necessary to operate the system to measure the speed of the document. Associated with the ROM&#39;s 42 and 32 are type 9316 program counters 43 and 44 which output binary addresses to access the timing signals stored in ROM 42 and the digital constants K 4  -K 7 , inclusive, and 1/f stored in ROM 32. 
     With reference to the timing diagram of FIG. 5 and the flow diagram of FIG. 4, the operation of the system disclosed in FIG. 3 will now be described. With the constants K 4 , K 5 , K 6 , and K 7  and 1/f determined in the manner described previously and stored in the ROM 32 (block 118 of FIG. 4), a system reset pulse 5(A) of FIG. 5 will be generated over line 49 (FIG. 3) by the closing of switch 68 for resetting the binary counter 38 (FIG. 3), the program counters 42, 44 and type 7474 D type flip-flops 46 and 48. Upon the leading edge of the document 28 intercepting the light beam from the light source 24 (FIG. 1), the photo-detector 20 will generate a pulse 5(C) of FIG. 5 over its output 50 (FIG. 3) through a type 7432 OR gate 52 to the set input of the flip-flop 46. An output pulse 5(D) of FIG. 5 of the flip-flop 46 when in the set condition will be transmitted over its output 54 to a type 7408 AND gate 56, thereby enabling the AND gate 56. The AND gate 56, when enabled, gates a number of pulses 5(E) derived from clock pulses 5(B) which are generated by the free running oscillator 40, the output 58 of which oscillator 40 is connected to AND gate 56, to a second type 7408 AND gate 64 and to the counter 38 which starts its count of the clock pulses 5(B) from the oscillator 40. 
     Upon the leading edge of the document 28 intercepting the light beam from the light source 26, the photo-detector 22 (FIG. 1) will generate a pulse 5(F) of FIG. 5 over its output 60 through OR gate 52 to flip-flop 46 for resetting the flip-flop 46. This action results in the output pulse 5(D) of the flip-flop 46 going low, thus disabling the AND gate 56 and the binary counter 38 from receiving any further clock pulses. At this time, the binary counter 38 will have a count equal to the number of pulses generated by the oscillator 40, which represents the time required for the document 28 to cover the fixed distance d (FIG. 1) between the photo-detectors 20 and 22. The generation of pulse 5(F) of FIG. 5 occurs at time T 1  as shown in FIG. 3. 
     The pulse 5(F) from the photo-detector 22 is also transmitted through OR gate 62 to the set input of flip-flop 48 which enables AND gate 64 to gate a system clock pulse 5(H) from the oscillator 40 to the binary counter 43 over line 66, causing the counter 43 to start counting thereby producing the binary addresses required to output from the ROM 42 the necessary timing and control signals of FIG. 5 required for the operation of the digital devices shown in FIG. 3. The setting of flip-flop 48 also generates a pulse 5(G) of FIG. 5 over line 70 which enables ROM 42 for operation. 
     The enabling of ROM 42 at this time generates the pulse 5(I) of FIG. 5 over line 72 enabling ROM 32 (FIG. 3). As described previously, ROM 32 contains all the pre-calculated constants required for the determination of the speed of the document. For example, a digital constant representing 1/f, where f is equal to the frequency of the oscillator 40, is stored at address (000) in ROM 32. Similarly, the constants K 4 , K 7 , K 6 , and K 5  are stored at addresses (001, 010, 011 and 100), respectively. The ROM 32 requires a three bit address word (if five constants are stored) from the program counter 44 for access to the required constants at the appropriate time. When reset, the output of the counter 44 is at address (000). 
     The enabling of ROM 32 at this time produces the constant 1/f which is loaded (block 120 of FIg. 4) over data bus 74 into a type 9308 latch 76 manufactured by Fairchild Semiconductor by the pulse 5(L) of FIG. 5 being transmitted over line 78 from ROM 42 to latch 76. Pulse 5(J) generated over line 80 of ROM 42 enables a number of type 7409 open collector AND gates 82 for loading the pulse (n) from counter 38 onto the data bus 74. Pulse 5(K) of FIG. 5 generated over line 86 of ROM 42 loads (block 122 of FIG. 4) this pulse count (n) into a type 9308 latch 88 (FIG. 3). The values in latch 76 and latch 88 are now multiplied (block 124 of FIG. 4) by the digital multiplier 34 under the control of pulse 5(M) generated over line 90 of ROM 42. The results of this operation is equal to t, the time taken for the document 28 to travel from photo-detector 20 to photo-detector 22. 
     At the end of the operation of the multiplier 34, the pulse 5(N) of FIG. 5 is generated over line 92 of ROM 42 and enables a number of type 7409 open collector AND gates 94 to load the value of t into the data bus 74 which, upon the generation of a second pulse 5(K) over line 86 of ROM 42, will transfer the value of t into the latch 88 (block 126 of FIG. 4). When pulse 5(K) returns to 0, the timing sequence will be at time T 2  (FIG. 5). 
     At such time T 2  (FIG. 5), the pulse 5(O) will have been generated over line 98 of ROM 42 (FIG. 3) incrementing the program counter 44 to output the address (001) to ROM 32. As described previously, the constant K 4  is stored at address (001) in ROM 32. Upon the generation of the pulse 5(I) at time T 2  over line 72, the constant K 4  will be outputted from ROM 32 onto the data bus 74. Generation of the pulse 5(L) over line 78 from ROM 42 will then load the constant K 4  into the latch 76 (block 128 of FIG. 4). Pulse 5(M) is then generated over line 90 from ROM 42 to enable the digital multiplier 34 to multiply the value of t stored in latch 88 by the K 4  constant stored in latch 76 (block 130 of FIG. 4). The pulse 5(I) will have returned to logic 0, thereby disabling ROM 32 and the program counter 44 is then incremented by a further pulse 5(O) of FIG. 5 being generated over line 98 from ROM 42 to output the next address from the counter 44 which is (010). This address will output the constant K 7  upon the enabling of ROM 32. The timing sequence of FIG. 5 will now be at time T 3 . 
     A further pulse 5(N) is generated at this time T 3  over line 92 from ROM 42, which outputs the value (t×K 4 ) from the multiplier 34 onto the data bus 74 through AND gates 94 where it is loaded into the accumulator 36 (block 132 of FIG. 4) by the generation of a pulse 5(P) over line 102 from ROM 42. The timing sequence of FIG. 5 is now at time T 4 . The enabling pulse 5(N) returns to a logic zero, thereby disabling the AND gates 94. While this is occurring, a pulse 5(I) is generated at time T 4  (FIG. 5) over line 72 from ROM 42 enabling ROM 32 which outputs the constant K 7  onto the data bus 74. The only enabling pulse generated at this time is pulse 5(P) which enables the accumulator 36 resulting in the constant K 7  being added (block 134 of FIG. 4) to the value (t×K 4 ) which was previously stored in the accumulator. The result (K 7  + t × K 4 ) remains stored in the accumulator 36. The timing sequence of FIG. 5 is now at time T 5 . 
     At 4 5 (FIG. 5), the pulse 5(R) is generated over output line 104 from ROM 42 (FIG. 3) which enables the open collector AND gates 106 to output the value (K 7  + t × K 4 ) from the accumulator 36 onto the data bus 74. At time T 5  pulse 5(L) is generated over line 78 to load the value (K 7  + t × K 4 ) into latch 76 (block 136 of FIG. 4). Pulse 5(M) is then generated over line 90 to enable the multiplier 34, which multiplies the value t stored in latch 88 by the value (K 7  + t × K 4 ) stored in latch 76, to produce the value t (K 7  + t ×  4) -- (block 138 of FIG. 4). At the same time the pulse 5(Q) of FIG. 5 is generated over line 108 from ROM 42 to clear the accumulator 36 (block 140 of FIG. 4). 
     At time T 6  (FIG. 5), pulse 5(P) is generated over line 102 of ROM 42 to load the value t (K 7  + t × K 4 ) into the accumulator 36 (block 142 of FIG. 4), while pulse 5(O) is generated over line 98 to increment the program counter 44 to output the address (011) thereby conditioning the ROM 32 to output the constant K 6  from ROM 32 during the next timing operation. 
     At time T 7  (FIG. 5), pulse 5(I) is generated over line 72 from ROM 42 to ROM 32, which outputs the value K 6  onto the data bus 74. When pulse 5(L) returns to logic zero, pulse 5(P) is t over line 102 tothe accumulator 36 to add K 6  to the value t (K 7  + t × K 4 ) which was stored in the accumulator 36 thus producing the value K 6  + t (K 7  + t × K 4 ) -- (block 144 of FIG. 4). 
     At time T 7  (FIG. 5), pulse 5(R) is generated over line 104 from ROM 42 enabling the AND gates 106 while pulse 5(L) is generated over line 78 enabling latch 76 to receive the value K 6  + t(K 7  + t × K 4 ) over the data bus 74 (block 146 of FIG. 4) from the accumulator 36. Pulse 5(Q) is now generated over line 108 from ROM 42 to clear the accumulator 36 (block 148 of FIG. 4) while pulse 5(O) is generated over line 98 to increment the program counter 44 to output the address (100) to ROM 32 which will output the value K 5  when enabled. Simultaneously, pulse 5(M) is generated over line 90 from ROM 42 thereby enabling the multiplier 34 which results in the value t [K 6  + t(K 7  + t × K 4 )] being generated at the output of the multiplier 34 (block 150 of FIG. 4).  t  t × 
     At time T 9  of FIG. 5, the pulse 5(N) is generated over line 92 from ROM 42 to enable the AND gates 94 thus storing the value t [K 6  + t (K 7  + t × K 4 )] in the accumulator 36 (block 152 of FIG. 4) on the generation of the pulse 5(P). Pulse 5(I) is now generated at time T 10  (FIG. 5) over line 72 from ROM 42 enabling ROM 32 which outputs the value K 5  onto the data bus 74. Upon generation of pulse 5(P) over line 102 from ROM 42, the value K 5  is added into the accumulator 36 (Block 154 of FIG. 4) producing the value of K 5  + k (K 6  + t (K 7  + t (K 7  + t × K 4 ). This value now stored in the accumulator 36 represents the velocity of the document 28 (FIG. 1) as it travels over the fixed distance d (FIG. 1) between the photo-detectors 20 and 22. 
     At time T 11  (FIG. 5), the pulse 5(R) is generated over line 104 from ROM 42, thereby enabling the AND gates 106 to output the value K 5  + t [K 6  + t (K 7  + t × K 4 )] from the accumulator 36. The pulse 5(S) of FIG. 5 is now generated at time T 12  (FIG. 5) over line 110 from ROM 42 which is transmitted through OR gate 62 for resetting the flip-flop 48 and thereby disabling AND gate 64, counter 43 and ROM 42, thus stopping the generation of the timing and control signals from ROM 42. The disabling of ROM 42 at time T 12  (FIG. 5) retains the pulse 5(R) at a logic one in line 104, thereby enabling the AND gates 106 for loading the digital value of the velocity, stored in the accumulator 36, onto the data bus 74 where it is transmitted to a standard binary to 7-segment decoder 112 (FIG. 3) which decodes the information for display on a 7-segment display unit 114 (block 156 of FIG. 4). The value displayed may be in feet per second or some other system of units. In any event this value indicates the velocity of the document which, as described previously, must fall within a prdetermined range for assuring a valid read operation. 
     While there has been described a form of the invention and its mode of operation, it will be apparent to those skilled in the art that changes may be made in the apparatus described without departing from the spirit and scope of the invention as set forth in the appended claims and that in some cases certain features of the invention may be used to advantage or modified without corresponding changes in other features while certain features may be substituted for or eliminated as appreciated by those skilled in the art. Thus, the method of determination the velocity of the moving member can be used with a microprocessor or other type of processing units performing in the manner described herein.