Abstract:
A method is shown to create soft transition in selected topologies by controlling and designing the magnetizing current in the main transformer to exceed the output current at a certain point in the switching cycle.

Description:
RELATED APPLICATION/CLAIM OF PRIORITY 
       [0001]    This application is related to and claims priority from U.S. provisional application Ser. No. 61/821,896, filed May 10, 2013 which provisional application is incorporated by reference herein. 
     
    
     INTRODUCTION 
       [0002]    Traditional pulse, width modulation (PWM) controlled converters have been around for a long time. They have some characteristics which are useful. The current waveforms in continuous mode versions are square and have low root mean square (RMS) content compared to resonant converters. But they have hard switching in the primary and reverse recovery problems in the secondary. Because of this there have been some modifications to them to reduce some these draw backs. Almost all of the modifications address soil switching in the primary, But very few address the reverse recovery problem in the secondary. 
       SUMMARY OF THE PRESENT INVENTION 
       [0003]    This invention addresses both problems. Even though the solution proposed increases the RMS current in all switches there are plenty of situations where this would be advantageous. When the output voltage is high most of the losses are not conduction losses but switching losses. This would be a situation where eliminating reverse recovery losses would be beneficial. As metal oxide semi-conductor field effect transistors (MOSFETs) become smaller and more efficient the usefulness of this invention would increase since the conduction losses becomes a smaller component of the overall losses. Therefore, increasing the conduction losses while reducing all switching losses is a trade-off worth making. 
         [0004]    The invention presented in this application can be applied to some popular PWM converters. The converters to which this invention can be applied to are converters with either a half bridge, full bridge, or push pull topology in the primary and in the secondary with either a current doubler, center tap, or full bridge. The only additional constraint is that the secondary must be synchronous rectified and the transformer have low leakage inductance. This invention provides a method that uses old topologies differently to accomplish the goal of soft commutation in all switches. 
         [0005]    The present invention provides several basic design and control methods for a converter, and several features which further develop these basic design and control methods. 
         [0006]    In one of its most basic aspects, the present invention provides a design and control method for a converter having a transformer and one output choke, where the converter is designed so that the magnetizing current in the transformer exceeds the current through the output choke at its lowest point so that soft transitions are obtained on all the switching elements. 
         [0007]    In another of its basic aspects the present invention provides a design and control method for a converter having a transformer and one or more output choke(s), where the converter is designed so that the magnetizing current in the transformer exceeds the current through one of the output choke(s) at its lowest point so that soft transitions are obtained on all the switching elements. 
         [0008]    In still another of its basic aspects, the present invention provides a design and control method for a converter having one or more transformer(s) and one or more output choke(s), where the converter is designed so that the resulting magnetizing current of the transformer(s) exceeds the current through one of the output choke(s) at its lowest point so that soft transitions are obtained on all the switching elements. 
         [0009]    In yet another of its basic aspects, the present invention provides a design and control method for a converter having a transformer and one output choke, at least two primary switching devices and at least two rectifying means in the secondary, where each of the primary switching devices is off when a correspondent rectifier means is on. The converter is designed so that the magnetizing current in the transformer exceeds the current through the output choke at its lowest point so that the current through one of the rectifier means becomes zero or negative and that this rectifier means is turned off prior to the turn on of a correspondent primary switching device. In a further development of this design and control method, the amount of negative current through the rectifier means and the time between turn off of the rectifier means and turn on of the correspondent primary switching device is tailored that the correspondent primary switching device turns on at zero voltage switching conditions. 
         [0010]    In yet another of its basic aspects, the present invention provides a design and control method for a converter having a transformer and one or more output choke(s), at least two primary switching devices and at least two rectifying means in the secondary, where each of the primary switching device is off when a correspondent rectifier means is on. The converter is designed so that the magnetizing current in the transformer exceeds the current through one of the output choke(s) at its lowest point so that the current through one of the rectifier means becomes zero or negative and that this rectifier means is turned off prior to the turn on of a correspondent primary switching device. In a further development of this design and control method, the amount of negative current through the rectifier means and the time between turn off of the rectifier means and turn on of the correspondent primary switching device is tailored that the correspondent primary switching device turns on at zero voltage switching conditions. 
         [0011]    In a still further basic aspect of the invention, a design and control method is provided for a converter having one or more transformer(s) and one or more output choke(s) at least two primary switching devices and at least two rectifying means in, the secondary, wherein each of the primary switching device is off when a correspondent rectifier means is on. The converter is designed so that the resulting magnetizing current in the transformer(s) exceeds the current through one of the output choke(s) at its lowest point so that the current through one of the rectifier means becomes zero or negative and that this rectifier means is turned off prior to the turn on of a correspondent primary switching device. In a further development of this design and control method, the amount of negative current through the rectifier means and the time between turn off of the rectifier means and turn on of the correspondent primary switching device is tailored that the correspondent primary switching device turns on at zero voltage switching conditions. 
         [0012]    In a further development for each of the design and control methods described above, the magnetizing current of the converter is tailored through modulation in frequency in a such way, that the claimed conditions do occur over a range of the input voltage and output loading conditions. In addition, the converter is designed as a half bridge, full bridge, push pull, the primary and center tap, current doubler or full bridge rectification in the secondary. 
         [0013]    In another further development for each of the basic design and control methods described above, the magnetizing current of the converter is tailored through modulation in frequency in a such way that the claimed conditions do occur over the full range of the input voltage and output loading conditions. 
         [0014]    In another further development for each of the basic design and control methods described above, the magnetizing current of the converter is tailored through modulation in frequency in a such way that the claimed conditions do occur over a specific range of the input voltage and output loading conditions. 
         [0015]    Since there are many combination of converters to which this invention can be applied, this application will describe with great detail how it can be applied to a half bridge with current doubler converter. In addition, an example using a half bridge with center tap will be presented briefly. From this description, the manner in which the principles of this invention can be applied to various other types of converters will be apparent to those in the art 
         [0016]    Since magnetizing current will be used for soft switching, the control must adjust the frequency of operation for different load line conditions. Control then in is an important element in this invention. Leveraging modern digital control and intelligent processing would be beneficial to this idea. 
         [0017]    These and other features of the present invention will become further apparent from the following detailed description and the accompanying drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0018]      FIG. 1  is an implementation of a half bridge converter with current doubler output, designed according the principles of the present invention; 
           [0019]      FIG. 2  shows the waveforms for the converter of  FIG. 1 . 
           [0020]      FIG. 3  shows a half bridge converter with a center tap output, and embodying the principles of the present invention; 
           [0021]      FIG. 4  shoes the waveforms for the converter of  FIG. 3 . 
       
    
    
     DETAILED DESCRIPTION 
       [0022]    As described above, the present invention provides a design and control method for a converter having a transformer and one or more output choke(s), which provides soft transitions in all switching devices in the converter. The invention is described herein in connection with several exemplary converters, and from that description the manner in which the principles of the present invention can be applied to various other converters will be apparent to those in the art. 
       Bridge Converter with Current Doubler Using Magnetizing Current Steering 
       [0023]      FIG. 1  is an implementation of a half bridge converter with current doubler output. The secondary is comprised of output inductors Lo 1  and Lo 2 , and synchronous rectifiers SR 1  and SR 2 . The synchronous rectifiers are implemented with MOSFETS. Primary half bridge is made up of switches M 1  and M 2 , and blocking capacitors C 1  and C 2 . The transformer inductance is designed so that at specific frequency and duty cycle its magnetizing current is higher than output choke current at its minimum point. The waveforms for this converter are presented in  FIG. 2 . Note since the condition that the magnetizing current be larger than the output choke minimum cumin point the output choke can also be designed to meet this target. 
         [0024]    At time t0 the converter has primary switch M 2  on, SR 2  off, SR 1  on, and M 1  off. The magnetizing current component of the transformer is flowing from M 2  source to M 2  drain (into the transformer dot on the primary), the choke current in Lo 2  is reflected back to the primary and its component flows from M 2 &#39;s drain to source. The magnetizing component at this time must be slightly larger or equal to the reflected current in Lo 2  so that there was a zero voltage switching (TVS) transition or a near ZVS transition previous to t0. The current in Lo 1  continues to be delivered to the output flowing through SR 1 , SR 1  also contains the output current of Lo 2 . As the primary switch continues to be on current is ramping up on Lo 2  and the magnetizing current decays from going into the dot to zero then reverses and starts to ramp out coming out of the dot. The current Lo 1  is ramping down. The file current in M 2  is triangular starting from zero or slightly negative and going to a peak current at time t1 where M 2  is turned off. The slope of the ramp is composed of the slope of the magnetizing current and the slope of the output choke Lo 2 . 
         [0025]    At time t1 when M 2  turns off the current in the primary charges/discharges the parasitic capacitances of M 2 , M 1 , and SR 2 . The voltage on M 2  increases while the voltage on SR 2  decreases. When the voltage on SR 2  becomes zero SR 2  is turned on This happens fairly quickly since the output current plus the magnetizing current both contribute to this voltage movement. The turn on for SR 2  could be delayed since the body diode in SR 2  automatically turns on but since normally the drop on the body diode is larger than the channel reducing this delay would reduce conduction losses during this time. When SR 2  is turned on or clamps the voltage at zero the drain voltage of M 2  is held at the same voltage as the voltage on the capacitor node between C 1  and C 2 . This is approximately ½ the input voltage. All accumulated magnetizing current that was flowing in the primary is then transferred to the secondary, In this case the magnetizing current would add to the current in SR 2  and would subtract from the current in SR 1 . Therefore, SR 2  would have a current of ILo 2 +Imag flowing from source to drain, and SR 1  would have a current of Io 1 -Imag flowing from source to drain. The current in SR 1  would be very close to zero at t1. Most of conduction losses would be in SR 2 . The current in Lo 1  continues to decay and the current in Lo 2  is at the beginning of its decay also. 
         [0026]    At time t2 the current in Lo 1  is the lowest for the cycle and is lower than the magnetizing current in the secondary winding Ls. This means that the current in SR 1  is flowing from drain to source. SR 1  is turned off at t2. The excess current flowing in SR 1  charges its capacitance and also the capacitances of M 1  and M 2 . The voltage increases in the drain of SR 1  and increases across M 2  in the primary. Therefore at time t2 the transition that started and stalled at t1 continues on, When the voltage across M 2  reaches Vin, the voltage across M 1  reaches zero and M 1  is turned on (a ZVS condition) This is at time t3. 
         [0027]    Time t3 is a repeat of to only for the opposite phase of the converter with all the switch pairs, the choke pair, and the transformer switching roles. 
         [0028]    At time t3 the converter has primary switch M 1  on, SR 1  off, SR 2  on, and M 2  off. The magnetizing current component of the transformer is flowing from M 1  source to M 1  drain (into the transformer non-dot on the primary), the choke current in Lo 1  is reflected back to the primary and its component flows from M 1 &#39;s drain to source. The magnetizing component at this time must be slightly larger or equal to the reflected current in Lo 1  so that there was a ZVS transition or a near ZVS transition previous to t3. The current in Lo 2  continues to be delivered to the output flowing through SR 2 , SR 2  also contains the output current of Lo 1 . As the primary switch continues to be on current is ramping up on Lo 1  and the magnetizing current decays from going into the dot to zero then reverses and starts to ramp out coming out of the dot. The current in Lo 2  is ramping down. The current in M 1  is triangular starting from zero or slightly negative and going to a peak current at time t 4  where M 1  is turned off The slope of the ramp is composed of the slope of the magnetizing current and the slope of the output choke Lo 1   
         [0029]    At time t4 when M 1  turns off the current in the primary charges/discharges the parasitic capacitances of M 1 , M 2 , and SR 1 . The Voltage on M 1  increases while the voltage on SR 1  decreases. When the voltage on SR 1  becomes zero SR 1  is turned on. This happens fairly quickly since the output current plus the magnetizing current both contribute to this voltage movement. The turn on for SR 1  could be delayed since the body diode in SR 1  automatically turns on but since normally the drop on the body diode is larger than the channel reducing this delay would reduce conduction losses during this time. When SR 1  is turned on or clamps the voltage at zero the source voltage of M 1  is held at the same voltage as the voltage on the capacitor node between C 1  and C 2 . This is approximately ½ the input voltage. All accumulated magnetizing current that was flowing in the primary is then transferred to the secondary, In this case the magnetizing current would add to the current in SR 1  and would subtract from the current in SR 2 . Therefore, SR 1  would have a current of ILo 1 +Imag flowing from source to drain and SR 2  would have a current of ILo 2 -Imag flowing from source to drain. The current in SR 2  would be very close to zero at t4. Most of conduction losses would be in SR 1 . The current in Lo 2  continues to decay and the current in Lo 1  is at the beginning of its decay also. 
         [0030]    At time t5 the current in Lo 2  is the lowest for the cycle and is lower than the magnetizing current in the secondary winding Ls. This means that the current in SR 2  is flowing from drain to source. SR 2  is turned off at t5. The excess current flowing in SR 2  charges its capacitance and also the capacitances of M 1  and M 2 . The voltage increases in drain of SR 2  and increases across M 1  in the primary, Therefore at time t5 the transition that started and stalled at t4 continues on. When the voltage across M 1  reaches Vin, the voltage across M 2  reaches zero and M 2  is turned on (a ZVS condition). This is at time t6. Time t6 matches the same condition as t0 and is the end of one complete cycle. 
         [0031]    In order for soil commutation described above to happen, the currents in the transformer and output chokes have to be controlled with frequency and duty cycle. A controller that choses the optimum point is essential. The controller would have to consider load, output voltage, input voltage, and the inductance values of transformer and chokes as parameters and determine the best operating point that would meet the criteria of having enough magnetizing current at time t2 or t5 to be larger than the current in Lo 2  or Lo 1  respectively. At lighter loads this would become easier but then the controller would have to trade off increasing the frequency and reducing the RMS currents or reducing the frequency and increasing the RMS currents. 
       Half Bridge Converter with Center Tap Output 
       [0032]    Shown in  FIG. 3  is a half bridge converter with a center tap output. Waveforms for this converter are shown in  FIG. 4 . This converter would operate similar to current doubler version mentioned above. The waveforms in the primary would be identical to before. 
         [0033]    The output choke in this topology operates with lower ripple current and since the output current is contained in one choke the DC current level is double of what the current doubler would be per choke. But during the freewheeling portion between t1 and t2 t4 and t5 the output current is shared between SR 1  and SR 2  so the amount of magnetizing current that would be needed to reverse the current in SR 1  or SR 2  would be half the output current. This would make it the same as the current doubler example except for the reduction in choke ripple. The ripple in the choke could become negligible at 50% duty cycle so the magnetizing inductance need would be slightly higher than ½ the output current. This would be applied across both output windings in series (both windings on the secondary must carry this current). 
         [0034]    Half bridge converters or Full bridge converters can be stacked on the primary to reduce the voltage and the secondary paralleled to create structures that are tailored to available high performance devices. The magnetizing current in each converter would then be tailored with the same controller. 
         [0035]    Thus, as seen from the foregoing description, a design and control method are provided that produce soft transitions in all switching devices in a converter. The method applies to any converter that is composed in the primary or secondary of a half bridge, full bridge, push pull (center tap), or current doubler, and in view of the foregoing description the manner in which the principles of the present invention can be applied to various converter topologies will be apparent to those in the art.