Abstract:
An RD converter is disclosed that has a first multiplier multiplying a resolver signal S 1  by an output of a SIN ROM; a second multiplier multiplying a resolver signal S 2  by an output of a COS ROM; a subtractor subtracting an output of the first multiplier from an output of the second multiplier; a synchronous detecting circuit detecting synchronously an output of the subtractor with reference to an excitation signal; a controller controlling an output angle θ′ to make an output of the synchronous detecting circuit equal to zero; a correction data part outputting a correction angle θ c  for the output angle θ′; an adder adding the output angle θ′ and the correction angle θ c ; the SIN ROM producing a sine value of a result from the adder; and the COS ROM producing a cosine value of the result.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to an RD converter that converts resolver signals output from a resolver that detects a rotational angle of a motor into a digital output angle, and an angle detecting apparatus provided with the RD converter. 
         [0003]    2. Description of the Related Art 
         [0004]    In general, a resolver has an angle error, and the angle error has to be corrected in order to achieve precise angle detection. 
         [0005]    A method of correcting the angle error of the resolver is described in Patent literature 1. According to the method described in Patent literature 1, angle error characteristics of the resolver are previously calculated based on comparison between output angles of the RD converter obtained by rotating the resolver at a constant number of revolutions and an angle data reference determined based on time measurement of the rotation of the resolver and recorded in a correction memory. The angle error characteristics are recorded in the correction memory in the form of corrected angles for the output angles of the RD converter.
   Patent literature 1: Japanese Patent Application Laid-Open No. H10-170531   
 
         [0007]    In operation, the output angle of the RD converter is input to the correction memory, the corrected angle associated with the output angle is output from the correction memory, and thus, an angle corrected for the angle error is acquired. 
         [0008]    As described above, according to the method described in Patent literature 1, the angle error of the resolver is corrected by correcting the output angle of the RD converter. However, the characteristics of the angle error of the resolver having passed through the RD converter vary depending on the number of revolutions of the resolver, and the correction method described in Patent literature 1 is not designed for the angle error that varies depending on the number of revolutions and therefore cannot correct the angle error. 
         [0009]    In addition, since the correction memory has to store the corrected angles and thus requires a high capacity. For example, when the resolution of the output angle of the RD converter is 12 bits, the correction memory has to have a memory capacity of 49152 bits (2 12 ×12 bits), because the memory has to store the corrected angle for each output angle. 
       SUMMARY OF THE INVENTION 
       [0010]    In view of such circumstances, an object of the present invention is to provide an RD converter that can precisely correct an angle error of a resolver even when the characteristics of the angle error vary depending on the number of revolutions of the resolver and can reduce the capacity of a memory used for correction compared with the conventional and to provide an angle detecting apparatus provided with the RD converter. 
         [0011]    An RD converter according to the present invention is an RD converter that converts a detection angle θ indicated by resolver signals S 1  and S 2  output from a one phase excitation/two phase output resolver into a digital output angle θ′, comprising: a first multiplier that multiplies the resolver signal S 1  by an output of a SIN ROM; a second multiplier that multiplies the resolver signal S 2  by an output of a COS ROM; a subtractor that subtracts an output of the first multiplier from an output of the second multiplier; a synchronous detecting circuit that synchronously detects an output of the subtractor with reference to an excitation signal; a controller that controls the digital output angle θ′ to make an output of the synchronous detecting circuit equal to 0 and outputs the controlled digital output angle θ′; a correction data part that receives the digital output angle θ′ and outputs a correction angle for the digital output angle θ′; an adder that adds the digital output angle θ′ and the correction angle and outputs the sum to the SIN ROM and the COS ROM; the SIN ROM that produces a sine value of the sum and outputs the sine value; and the COS ROM that produces a cosine value of the sum and outputs the cosine value. 
         [0012]    An angle detecting apparatus according to the present invention comprises: a one phase excitation/two phase output resolver; the RD converter described above; and an excitation signal generator that supplies an excitation signal to the resolver and the RD converter. 
       EFFECTS OF THE INVENTION 
       [0013]    The RD converter according to the present invention corrects the angle error of the resolver in the angle calculation loop. That is, the output angle of the RD converter and the correction angle are added to each other, and the sum angle is fed back. Thus, even when the angle error characteristics of the resolver vary depending on the number of revolutions of the resolver, the angle error can be precisely corrected. 
         [0014]    In addition, according to the present invention, unlike the conventional art, the corrected angles do not have to be recorded, and only the error (difference between the true angle and the output angle of the resolver) has to be recorded. Thus, the required memory capacity can be reduced. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0015]      FIG. 1  is a block diagram showing an exemplary basic configuration of an RD converter and an angle detecting apparatus; 
           [0016]      FIG. 2  is a block diagram showing a simplification of the configuration shown in  FIG. 1 ; 
           [0017]      FIG. 3  is a graph showing exemplary characteristics of the angle error of a resolver (the fundamental frequency component); 
           [0018]      FIG. 4A  is a characteristics view showing a relationship between a frequency and a gain in the RD converter shown in  FIG. 2 ; 
           [0019]      FIG. 4B  is a characteristics view showing a relationship between a frequency and a phase in the RD converter shown in  FIG. 2 ; 
           [0020]      FIG. 5A  is a graph showing the output angle of the RD converter having the characteristics shown in  FIG. 4  in response to input of an error-free resolver angle θ t ; 
           [0021]      FIG. 5B  is a graph showing the output angle error of the RD converter having the characteristics shown in  FIG. 4  in response to input of an error-free resolver angle θ t ; 
           [0022]      FIG. 6A  is a graph showing the output angle (angle error) of the RD converter having the characteristics shown in  FIG. 4  in response to input of an angle error θ e  at a rate of 10 rps; 
           [0023]      FIG. 6B  is a graph showing the output angle (angle error) of the RD converter having the characteristics shown in  FIG. 4  in response to input of an angle error θ e  at a rate of 1000 rps; 
           [0024]      FIG. 7A  is a graph showing the output angle error in the case where the conventional correction is performed in the RD converter having the characteristics shown in  FIG. 4  at a rate of 10 rps; 
           [0025]      FIG. 7B  is a graph showing the output angle error in the case where the conventional correction is performed in the RD converter having the characteristics shown in  FIG. 4  at a rate of 1000 rps; 
           [0026]      FIG. 8  is a block diagram showing a configuration of an RD converter according to an embodiment of the present invention; 
           [0027]      FIG. 9  is a block diagram showing a simplification of the configuration shown in  FIG. 8 ; 
           [0028]      FIG. 10  is a block diagram showing a modification of the configuration shown in the block diagram of  FIG. 9 ; 
           [0029]      FIG. 11A  is a graph showing results of angle error correction at a rate of 10 rps for the RD converter according to the present invention; 
           [0030]      FIG. 11B  is a graph showing results of angle error correction at a rate of 1000 rps for the RD converter according to the present invention; 
           [0031]      FIG. 12  is a block diagram showing a configuration of an RD converter according to another embodiment of the present invention; 
           [0032]      FIG. 13  is a diagram showing a circuit configuration of a correction data part in  FIG. 12  designed for a time divisional processing; 
           [0033]      FIG. 14  is a timing chart for the correction data part shown in FIG.  13 ; 
           [0034]      FIG. 15  is a block diagram for illustrating generation and writing of correction data; 
           [0035]      FIG. 16  is a graph showing an example of the angle error characteristics of the resolver; and 
           [0036]      FIG. 17  is a table showing an example of correction data in the case of a calculator implementation of the correction data part. 
       
    
    
     DETAILED DESCRIPTION 
       [0037]    First, an angle calculation principle of a resolver and an RD converter will be described. 
         [0038]      FIG. 1  is a diagram showing a basic configuration of an RD converter along with a resolver and an excitation signal generator. 
         [0039]    A resolver  10  is an one phase excitation/two phase output resolver, and a first resolver signal S 1  and a second resolver signal S 2  output from the resolver  10  are input to an RD converter  20 . In addition, an excitation signal is input from an excitation signal generator  30  to the resolver  10  and the RD converter  20 . Assuming that the excitation signal is sin ωt, the resolver signals S 1  and S 2  are expressed as follows. 
         [0040]    S 1 : cos θ sin ωt 
         [0041]    S 2 : sin θ sin ωt 
         [0000]    θ represents a detection angle of the resolver  10 . 
         [0042]    In this example, the RD converter  20  comprises a first multiplier  21 , a second multiplier  22 , a subtractor  23 , synchronous detecting circuit  24 , a controller  25 , a SIN ROM  26 , and a COS ROM  27 . The RD converter  20  converts the detection angle θ indicated by the resolver signals S 1  and S 2  into a digital output angle θ′ through an angle calculation loop formed by the components listed above and outputs the digital output angle θ′. 
         [0043]    The digital output angle θ′ is input to the SIN ROM  26 , and the SIN ROM  26  produces a sin θ′ which is a sine value of the digital output angle θ′ and outputs the sin θ′ to the multiplier  21 . Similarly, the COS ROM  27  produces a cos θ′ which is a cosine value of the digital output angle θ′ and outputs the cos θ′ to the multiplier  22 . 
         [0044]    The multiplier  21  multiplies the resolver signal S 1  by sin θ′, and outputs the product to the subtractor  23 . The multiplier  22  multiplies the resolver signal S 2  by cos θ′ and outputs the product to the subtractor  23 . The subtractor  23  subtracts the output of the multiplier  21  from the output of the multiplier  22  and outputs the difference to the synchronous detecting circuit  24 . The signal input from the subtractor  23  to the synchronous detecting circuit  24  is expressed as follows. 
         [0000]      sin ω t (sin θ cos θ′−cos θsin θ′)=sin ω t  sin(θ−θ′) 
         [0045]    The synchronous detecting circuit  24  synchronously detects this signal with reference to the excitation signal sin ωt input from the excitation signal generator  30  and eliminates sin ωt from the signal to output a deviation sin(θ−θ′) as a detection output to the controller  25 . The controller  25  adjusts the digital output angle θ′ to make the deviation sin(θ−θ′) equal to 0. As a result, θ equals to θ′, and the controller  25  converts the detection angle θ into the digital output angle θ′ and outputs the digital output angle θ′. As shown in  FIG. 1 , the transfer function of the controller  25  is expressed as (K/s 2 )*{(τ 1 s+1)/(τ 2 s+1)}. K, τ 1  and τ 2  are coefficients of the transfer function. s represents the Laplace operator. An asterisk * denotes multiplication. 
         [0046]    In the case where θ≈θ′, the output of the synchronous detecting circuit  24  can be simplified as follows. 
         [0000]      sin(θ−θ′)=θ−θ′ 
         [0047]    Therefore, the configuration shown in  FIG. 1  can be simplified as shown in  FIG. 2 . 
         [0048]    Next, angle error characteristics of the resolver will be described. 
         [0049]    The angle error of the resolver depends on the resolver angle.  FIG. 3  shows an example of this relationship. The angle error actually has an integral multiple frequency component of the number of revolutions of the resolver as described later with reference to  FIG. 16 . However, for simplification of explanation, only the fundamental frequency component is shown here. 
         [0050]    Assuming that an ideal resolver angle without error is θ t , and the angle error shown in  FIG. 3  is denoted by θ e . When the resolver rotates at a number of revolutions V rps, the detection angle θ of the resolver is expressed as follows. 
         [0000]      θ t =360 ×V×t  ( t:  time[s]) 
         [0000]      θ e =sin θ t    
         [0000]      θ=θ t +θ e    
         [0051]    Next, the output of an RD converter  20 ′ shown in  FIG. 2  in the case where the value θ is input to the RD converter  20 ′ will be described. 
         [0052]    The characteristics of the RD converter  20 ′ are as shown in FIGS.  4 A and  4 B in the case where coefficients of the transfer function of the controller  25  shown in  FIG. 2  are, for example, as follows. 
         [0000]        K= 2×10 6    
         [0000]      τ t =1×10 −3    
         [0000]      τ 2 =1×10 −4    
         [0053]    The response of the RD converter  20 ′ in the case where the ideal resolver angle θ t  without error is input to the RD converter  20 ′ is as follows. 
         [0054]    The RD converter  20 ′ has second-order characteristics, and therefore, if the number of revolutions V is constant, the difference between the resolver angle θ t  and the output angle θ′ becomes equal to 0 after a certain length of time.  FIGS. 5A and 5B  show the resolver angle θ t  and the response of the output angle θ′ of the RD converter  20 ′ in the case where the number of revolutions of the resolver is 1000 rps, and the angle error (θ′−θ t ) in this case. 
         [0055]    On the other hand, the response of the RD converter  20 ′ in the case where the angle error θ c  is input to the RD converter  20 ′ is as follows. 
         [0056]    The angle error θ e , which is expressed as θ e =sin θ t , periodically varies, and therefore, the output characteristics varies depending on the input frequency. When the resolver rotates at 1000 rps, the angle error θ e  is a signal of 1000 Hz. If this signal is input to the RD converter  20 ′, the amplitude is 0.3 times as high as that shown in  FIGS. 4A and 4B , and the phase is delayed by 117 degrees from that shown in  FIG. 4 .  FIGS. 6A and 6B  show responses in the cases where the number of revolutions of the resolver is 10 rps and where the number of revolutions of the resolver is 1000 rps. As can be seen from the drawings, the characteristics of the angle error output from the RD converter  20 ′ varies with the number of revolutions of the resolver. 
         [0057]    As described above, when the detection angle θ of the resolver is input to the RD converter, the output angle θ′ of the RD converter varies with the number of revolutions of the resolver because of the angle error θ e  of the resolver. 
         [0058]    The method of correcting the angle error of the resolver described in Patent literature 1, which corrects the output angle of the RD converter, cannot correct the angle error that varies with the number of revolutions of the resolver. Thus, for example, when the RD converter having the characteristics shown in  FIGS. 4A and 4B  is used, and the correction data is created based on the angle errors calculated for a low number of revolutions (10 rps, for example), an error remains when the number of revolutions of the resolver is high (1000 rps, for example) as shown in  FIGS. 7A and 7B . 
         [0059]    In the following, embodiments of the present invention will be described. 
         [0060]      FIG. 8  is a diagram showing a configuration of an RD converter according to an embodiment of the present invention along with a resolver and an excitement signal generator. The components corresponding to those in  FIG. 1  are denoted by the same reference numerals, and detailed descriptions thereof will be omitted. 
         [0061]    In this example, an RD converter  40  has a correction data part  50  in the angle calculation loop thereof, so that the angle error of the resolver  10  is corrected in the angle calculation loop. 
         [0062]    The digital output angle θ′ is input to the correction data part  50 , and the correction data part  50  outputs a correction angle θ c  for the digital output angle θ′. An adder  41  adds the correction angle θ c  to the digital output angle θ′ and outputs the sum to the SIN ROM  26  and the COS ROM  27 . The SIN ROM  26  produces a sine value of the input sum and outputs the sine value to the multiplier  21 , and the COS ROM  27  produces a cosine value of the input sum and outputs the cosine value to the multiplier  22 . 
         [0063]    As with the configuration described above with reference to  FIG. 2 , in the case where θ≈θ′, the configuration shown in  FIG. 8  can be simplified as shown in  FIG. 9  on the assumption that sin(θ−θ′)=θ−θ′. The configuration shown in the block diagram of  FIG. 9  can be further transformed into the configuration shown in  FIG. 10 . 
         [0064]    The signal ( 1 ) shown in  FIG. 10  is expressed as: 
         [0000]      θ−θ c =θ t +θ e −θ c . 
         [0065]    If the angle error θ e  is input to the correction data part  50  as correction data, θ c  equals to θ e , and thus, the signal ( 1 ) is expressed as θ t . Thus, with this configuration, the angle error θ e  of the resolver is removed from the angle input to an angle calculation loop  45 . 
         [0066]    The conventional correction method described in Patent literature 1 performs correction calculation at a stage following the RD converter (angle calculation loop) and therefore is influenced by the characteristics of the RD converter (angle calculation loop), so that the angle error characteristics varies at high numbers of revolutions, and the angle error of the resolver cannot be removed. However, the present invention removes the angle error at a stage preceding the angle calculation loop and therefore is not influenced by the characteristics of the angle calculation loop and can provide a precise result.  FIGS. 11A and 11B  show simulation results of correction according to the present invention in the cases where the number of revolutions of the resolver is 10 rps and where the number of revolutions of the resolver is 1000 rps. 
         [0067]    The correction data part  50  described above can be implemented in the two different ways as will be explained below. 
         [0068]    &lt;Table Implementation&gt; 
         [0069]    According to this implementation, the correction data part  50  has a memory (RAM or ROM), in which the angle errors θ e  of the resolver are recorded. The memory can be configured to receive an angle as an address input and outputs an angle error as data output. The correction data part  50  having the memory thus configured retrieves the angle error θ e  associated with the input digital output angle θ′ from the memory and outputs the angle error θ e  as the correction angle θ c . 
         [0070]    Assuming that the maximum value of the angle error θ e  of the resolver is 1 degree, the bit length of the correction data of an RD converter having a 12-bit resolution is 4 bits, since 
         [0000]      360 degrees/2 12 =0.0879 degrees, and 
         [0000]      1 degree/0.0879 degrees=11.4. 
         [0000]    Therefore, the correction data table requires a memory capacity of 2 12 ×4 bits=16384 bits, which is one third of the conventionally required memory capacity. 
         [0071]    &lt;Calculator Implementation&gt; 
         [0072]    According to this implementation, each correction angle θ c  is calculated from the output angle θ′ of the RD converter. 
         [0073]    Typically, the angle error of the resolver includes integral multiple frequency components of the number of revolutions of the resolver in addition to the fundamental frequency component, and the error is mainly in the shape of the first harmonic, the second harmonic and the fourth harmonic. Therefore, the correction data part that calculates the correction angle θ c  can be configured as shown in  FIG. 12 . 
         [0074]    In this example, a correction data part  50 ′ comprises a multiply-by-two amplifier  51 , a multiply-by-four amplifier  52 , adders  53   a  to  53   c,  ROMs  54   a  to  54   f,  COS ROMs  55   a  to  55   c,  multipliers  56   a  to  56   c  and adders  57   a  to  57   b.    
         [0075]    The digital output angle θ′ is input to the multiply-by-two amplifier  51 , and the multiply-by-two amplifier  51  generates an angle twice as large as θ′. Similarly, the digital output angle θ′ is also input to the multiply-by-four amplifier  52 , and the multiply-by-four amplifier  52  generates an angle four times as large as θ′. 
         [0076]    The ROMs  54   a  to  54   c  store phase data  1  to  3  about the first harmonic (fundamental frequency component) and the second harmonic and the fourth harmonic (integral multiple frequency components) of the angle error of the resolver  10 , respectively. The ROMs  54   d  to  54   f  store amplitude data  1  to  3  about the first harmonic, the second harmonic and the fourth harmonic of the angle error of the resolver  10 , respectively. 
         [0077]    Based on the amplitude and the phase stored in the ROMs  54   a  to  54   f,  the correction data part  50 ′ calculates the first harmonic, the second harmonic and the fourth harmonic cosine waves of the input digital output angle θ′ and outputs the sum of the cosine waves as the correction angle θ c . 
         [0078]    Since the correction angle θ c  is produced by calculating the first, second and fourth harmonic cosine waves of the digital output angle θ′, only six pieces of data including three pieces of amplitude data and three pieces of phase data (each having a data length of 12 bits) are required. Thus, the required memory capacity can be reduced to 72 bits (6×12 bits). 
         [0079]    The correction data part  50 ′ shown in  FIG. 12  has a possible increase of numbers of adders ( 53   a  to  53   c ), multipliers ( 56   a  to  56   c ) and COS ROMs ( 55   a  to  55   c ), causing an increase in circuit scale (number of components and circuit area). Thus, in the light of a reduction of the increase in circuit scale, the correction data part  50 ′ can perform the calculation in a time divisional manner. 
         [0080]      FIG. 13  shows a circuit configuration of a correction data part  50 ″ that performs the calculation of the correction angle θ c  in a time divisional manner.  FIG. 14  is a timing chart for the correction data part  50 ″. In  FIG. 13 , reference numeral  61  denotes a 1-bit shift register, and reference numeral  62  denotes a 2-bit shift register. Reference numerals  63   a  to  63   c  denote multiplexers, reference numerals  64   a  to  64   d  denote D flip-flops, and reference numeral  65  denotes a sequence controller. 
         [0081]    If the circuit shown in  FIG. 13  is driven according to the timings shown in  FIG. 14 , a single adder (ADD)  53 , a single COS ROM  55  and a single multiplier (MUL)  56  suffice. Thus, the increase of the circuit scale can be suppressed. 
         [0082]    Next, generation of the correction data recorded in the correction data parts  50  and  50 ′ ( 50 ″) will be described. 
         [0083]    As illustrated in  FIG. 15 , an angle sensor  70  that produces an angle reference, such as a rotary encoder, is attached to the rotary shaft of the resolver  10 , and the output of the angle sensor  70  and the digital output angle θ′ of the RD converter  40  are input to a correction data generating device  80 . Angle error data about the resolver  10  is generated by calculating the difference between the output of the angle sensor  70  and the digital output angle θ′ while the resolver  10  is rotating at a low speed (around 1 rps).  FIG. 16  shows an example of the angle error data. 
         [0084]    In the case of the correction data part  50  implemented as a table, the data shown in  FIG. 16  is used as the correction data. 
         [0085]    On the other hand, in the case of the correction data parts  50 ′ and  50 ″ implemented as a calculator shown in  FIGS. 12 and 13 , the data shown in  FIG. 16  is subjected to fast Fourier transform (FFT). FFT results data shown in the table of  FIG. 17 , and the data is used as the correction data. 
         [0086]    Once the correction data is acquired, a correction data writing device  90  writes the correction data to the correction data part  50  (or the ROMs  54   a  to  54   f  of the correction data part  50 ′ or  50 ″). 
         [0087]    In practical operation, the angle sensor  70 , the correction data generating device  80  and the correction data writing device  90  are not necessary, and the RD converter outputs the output angle θ′ corrected for the angle error of the resolver  10 . 
         [0088]    In the case where RAMs are used in the correction data part instead of the ROMs, no data is recorded at the time of power-on, and thus, the correction data writing device  90  writes the correction data to the RAMs. 
         [0089]    For the correction data, ROMs can be used in the case where the angle error characteristics of the resolver are fixed. However, RAMs are preferably used so that the correction data can be externally rewritten in the case where the angle error characteristics are variable. 
         [0090]    As described above, according to the present invention, a function that corrects the angle error of the resolver is additionally provided in the RD converter, and correction is performed in the angle calculation loop. Thus, the RD converter can precisely correct the angle error that varies depending on the number of revolutions of the resolver and output a precise angle from which the angle error is removed. 
         [0091]    In addition, the angle detecting apparatus provided with this RD converter, the resolver and the excitation signal generator can precisely detect the rotational angle of a motor.