Abstract:
A variable gain amplifier or amplification stage uses a current steering circuit to split amplifier output current between a gain path and a shunt path to control amplifier gain. One or more primary current steering circuit devices in the gain and shunt paths are inversely controlled to determine in what ratio the amplifier output current splits between the gain and shunt paths. One or more smaller, secondary current steering circuit devices connect in parallel with gain path primary circuit devices and are commonly controlled with the shunt path primary circuit devices. This arrangement insures a well-controlled minimum gain path current at a minimum amplifier gain setting. Minimum gain occurs when the gain path primary circuit devices are fully off and the shunt path primary circuit devices are fully on. In this state, the gain path secondary circuit devices are on and a small amount of amplifier output current flows through the gain path. With well-defined minimum gain path current, the amplifier stage provides stable minimum gain characteristics that can be made relatively insensitive to temperature and device variations. Further, gain control does not interfere with amplifier biasing, thus improving amplifier linearity. Gain control inputs provide the ability to vary amplifier gain between the well-defined minimum and maximum gain settings, with excellent linearity and low intermodulation distortion over the gain control range. Various configurations of the amplifier gain stage address both single-ended and differential amplifier topologies.

Description:
FIELD OF THE INVENTION 
     The present invention relates to radio frequency amplifiers and particularly relates to a variable gain radio frequency amplifier stage. 
     BACKGROUND OF THE INVENTION 
     Wireless communication systems enjoy significant popularity, finding widespread use in both developed and developing regions. Indeed, the very popularity of wireless communication systems spurs their development and advancement, driving system designers and service providers to devise ways of supporting more users within a finite radio frequency spectrum. Existing and pending wireless communications standards typically rely on frequency, code, or time-division multiplexing techniques that allow multiple portable communication device users to share the same frequencies within a given service area. Commonly, such access schemes benefit from each wireless device controlling their transmitted signal power to help minimize its interference with other active devices within a given wireless service area. 
     This power control approach presents portable device designers with significant challenges. For example, power-control techniques typically require transmit signal amplifier circuits that provide a range (often continuous) of transmit signal gain. This allows a controlling device (e.g., a cellular telephone) to transmit with a desired signal power based on adjusting the gain of one or more such transmit signal amplifier circuits. For example, as the portable device moves closer to a supporting base station, the wireless communications system may instruct, via control signaling, the portable device to reduce its transmit power. Essentially, in such wireless communications systems, active portable devices are controlled such that they transmit with the minimum necessary signal power at all times. 
     High signal fidelity requirements impose further challenges on designers of wireless communications transmitters. Many wireless communication standards impose strict adjacent channel power limitations—a measure of unwanted signal power appearing in radio channels adjacent to the selected transmit channel. Digital modulation schemes, such as those used in GSM or PCS systems, typically require phase or frequency modulation in combination with amplitude modulation. The need for envelope modulation (amplitude) imposes a requirement for linear amplification of the transmit signal. As noted, this linear amplification function must usually support variable gain, so that the linear, radio frequency signal may be gain adjusted to comply with transmit signal output power control requirements. 
     Thus, modem wireless communication devices typically must meet the dual, sometimes contradictory requirements of providing flexible transmit signal output power control, while still maintaining good amplification linearity. A number of approaches exist for meeting these design challenges, and include transistor-based amplifier gain stages using differing topologies and differing gain control techniques. Some gain control arrangements adjust the bias signal applied to the transistor amplifiers, but this can have the disadvantage of changing the operating point of the transistors involved, and thus affecting linearity, particularly at the lowest levels of gain. At such low levels of gain, the transistor amplifiers may be at their lower limit of active mode operation, and can thus become significantly nonlinear. 
     Another approach to transistor amplifier gain control involves providing a transistor amplifier having a gain path and a shunt path, with the shunt path having no signal gain. In operation, a current steering mechanism splits current between the gain and shunt paths to provide a desired amount of signal gain. Because amplifier gain is not controlled through bias changes, this approach has the significant benefit of allowing operation of the transistor amplifier(s) at constant operating point, thereby aiding amplifier linearity. A “Gilbert” cell represents such a configuration for a differential amplifier. 
     In a Gilbert cell, a differential transistor amplifier pair, each transistor amplifier sinks collector current through both a shunt path having no signal gain, and a gain path that provides signal gain. This is accomplished by placing a collector load (impedance) in the gain path but not in the shunt path. Therefore, the shunt path lacks any impedance across which an output voltage signal can be developed. Current steering circuits control the ratio of gain path and shunt path current to achieve a desired output signal gain. 
     A significant drawback of the Gilbert cell, and other amplifier topologies that employ current steering techniques to effect gain control is the inability to provide well-controlled minimum gain settings with such techniques. Theoretically, the minimum gain of such circuits is zero, with all of the transistor amplifier current flowing through the zero-gain shunt path. That is, at a given control voltage, the current steering mechanism blocks current from flowing through the gain path, diverting all amplifier current through the shunt path. However, this can result in unstable and widely varying amplifier characteristics as minimum gain is approached. 
     Accordingly, there remains a need for a radio frequency amplifier gain control technique, such that the gain-controlled amplifier exhibits well-controlled variable gain characteristics. Such characteristics include good amplifier linearity across the gain control range, low intermodulation distortion, and predictable, stable minimum gain characteristics. 
     SUMMARY OF THE INVENTION 
     The present invention provides both methods and apparatus for amplifier gain control based on a current steering arrangement that insures a well-defined minimum gain setting and good amplifier linearity over the gain control range. A transistor amplifier is configured with parallel output current paths, a gain path and a shunt path. The gain path includes an impedance element that develops an output signal voltage in response to the amplifier&#39;s time-varying output current, while the shunt path is configured to be low-impedance. A current steering circuit determines how the amplifier output current splits between the gain and shunt paths, thereby controlling amplifier gain. At least one gain path primary transistor and shunt path primary transistor are disposed in the gain and shunt paths, respectively. Preferably, these transistors operate with inverse bias control, such that as one transistor turns on, the other turns off. A secondary transistor shares a common bias control with the shunt path primary transistor, but is disposed in the gain path with the gain path primary transistor. When the gain path primary transistor is biased fully off and the shunt path primary transistor is biased fully on at minimum amplifier gain, this secondary transistor is also biased on. This insures a well-controlled minimum amount of gain path current at the minimum amplifier gain setting. 
     The current steering arrangement may be adapted to both single-ended and differential amplifier topologies and is compatible with a wide range of specific transistor amplifier circuit implementations and bias arrangements. In preferred embodiments, the current steering arrangement is connected in cascade fashion in the collector or drain current path of the transistor amplifier or amplifiers. Gain control is accomplished through steering varying amounts of the amplifier output current through a gain path and a shunt path, rather than by varying amplifier operating voltage or amplifier bias. Thus, a variable gain amplifier operating in accordance with the present invention may employ a fixed bias at an optimum operating point, thereby exhibiting excellent linearity and low intermodulation distortion across the gain control range. 
     With excellent linearity and low intermodulation distortion characteristics, an amplifier in accordance with the present invention is particularly well suited for use in radio frequency communications apparatus. Such amplifiers may be implemented in a variety of process technologies, adapted for use at both intermediate and high frequencies. Other aspects and features of the present invention will become apparent to those ordinarily skilled in the art upon review of the following description of exemplary embodiments of the invention in conjunction with the accompanying figures. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 illustrates a typical current steering arrangement for controlling amplifier gain. 
     FIG. 2 illustrates an amplifier arrangement including an exemplary embodiment of the current steering circuit of the present invention for use with single-ended amplifier configurations. 
     FIG. 3 illustrates an exemplary embodiment for the circuit of FIG.  2 . 
     FIG. 4 illustrates general power and intermodulation distortion curves for the present invention. 
     FIG. 5 illustrates exemplary gain control input buffering circuits that may be used in some embodiments of the current steering circuit of the present invention. 
     FIG. 6 illustrates an amplifier arrangement including an exemplary embodiment of the current steering circuit of the present invention for use with differential amplifier configurations. 
     FIG. 7 illustrates an alternate implementation of the differential current steering circuit depicted in FIG.  6 . 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     FIG. 1 illustrates a typical approach to effecting amplifier gain control through current steering techniques. An amplifier circuit  8  includes a radio frequency signal input  10 , an input coupling capacitor  12 , a transistor amplifier  14 , a bias circuit  16 , an operating voltage  18 , gain and shunt paths  20  and  22 , respectively, and gain control transistors  24  and  26 . The amplifier circuit  8  further includes a gain resistor  28 , gain control inputs  30  and  32 , and an RF signal output  34 . 
     In operation, RF signals applied to the RF input  10  are coupled through the input capacitor  12 , where they serve to drive the transistor amplifier  14 . With proper biasing current from the bias circuit  16 , the transistor amplifier  14  is responsive to the RF input signal, and provides an output current on its collector  14 C that represents an amplified version of the input signal. Typically, a voltage supply  18  provides power to the bias circuit and overall amplifier circuit  8 . Gain path  20  and shunt path  22  provide current steering transistors  24  and  26  with the ability to control the signal gain of the transistor amplifier  14 . 
     An external system (not shown) applies control signals to the control inputs  30  and  32  to steer more or less of the collector current of the transistor amplifier  14  through the gain path  20 , which includes the gain resistor  28 . In contrast, the shunt path typically includes no gain element, and represents zero gain (infinite loss). For the amplifier circuit  8 , minimum gain occurs when all collector current into the transistor amplifier  26  flows through the shunt path  22 , while maximum gain occurs when all of that current flows through the gain path  20 . 
     Minimum gain operation is subject to problematic operation with this existing approach. Theoretically, the minimum gain of the amplifier circuit  8  is zero. In practical implementations however, the minimum gain of the amplifier circuit  8  can be non-zero and ill-defined due to semiconductor device leakages, semiconductor process variations, and other non-ideal aspects of circuit fabrication and layout. Further, these effects can vary with both frequency and temperature. Indeed, reliably achieving and maintaining a desired minimum gain with the amplifier circuit  8  is difficult. For example, the amplifier circuit  8  may be replicated in a great many integrated circuit devices, for use in, for example, a production run of cellular telephones. During design, a nominal gain control voltage range would have been identified for minimum and maximum gain settings, as well as for intermediate gain settings between the maximum and minimum. However, due to process and fabrication variations attendant with any semiconductor fabrication process, the actual control voltages applied to control inputs  30  and  32  required for a desired minimum gain can vary substantially from device to device. Moreover, the temperature sensitivity of the amplifier circuit  8  is such that maintaining a desired minimum gain setting can be difficult. 
     FIG. 2 depicts an exemplary implementation of the present invention. As shown, the amplifier circuit  100  includes an amplifier  110 , an RF signal input  108 , a current steering circuit  120  with control inputs  122 B and  122 A, an operating voltage input  130 , gain and shunt amplifier output current paths  132  and  134 , respectively, and an amplified RF signal output  138 . Further, the gain path  132  includes a gain element  136 , while the current steering circuit includes a gain path primary circuit device  124 A, a shunt path primary circuit device  124 B, and a gain path secondary circuit device  126 . 
     With the present invention, the minimum and maximum amplifier gain may be set during the design phase based on selecting desired values for a number of well-controlled parameters, thus allowing fabrication of amplifier circuits with substantially consistent gain control performance. With the amplifier circuit  8  shown in FIG. 11 the theoretical minimum gain of zero was not achieved due to stray capacitances, non-ideal circuit layout, current leakages, and other non-ideal device effects. While the amplifier circuit  100  may not be immune to such real-world nuisances, the present invention does offer the ability to set a minimum gain path current large enough in magnitude to minimize the significance of any such effects. 
     Further, the present invention makes the real-world minimum gain of the amplifier circuit  100  dependent upon a few, well-controlled design parameters, rather than the uncertain and variable non-ideal effects that plague minimum gain operation of the amplifier circuit  8 . With the amplifier circuit  100 , the circuit devices  124 B and  126  may be designed such that the magnitude of current conducted through the secondary circuit device  126  is a desired ratio less than that conducted through the primary device  124 B for a value of control signal applied to the control input  122 B. 
     The gain element  136  is preferably an impedance element, such as an inductor or resistor, across which an output signal voltage that is proportional to the amount of amplifier current flowing through the gain path  132 . Because the shunt path  134  is preferably configured to have minimal or zero impedance, amplifier output current flowing in the shunt path  134  does not produce an output signal. The current steering circuit  120  allows an external system (not shown) to steer amplifier output current through the gain and shunt paths  132  and  134 , respectively, thereby controlling the output signal gain of the amplifier  110 . The external system implements such control by applying appropriate signals to the control inputs  122 B and  122 A. The current steering circuit devices  124 A,  124 B, and  126  may operate, for example, as voltage-controlled impedances or as current-controlled impedances. Thus, in a general sense, the current steering circuit  120  allows the external system to control the conductance of the gain path  132  and shunt path  134  to effect amplifier gain control. 
     In operation, the gain path primary circuit device  124 A and the shunt path primary circuit device  124 B allow varying levels of current flow in accordance with the applied control signals. For example, at a given control voltage on control input  122 A, the gain path primary circuit device  124 A might be fully on, fully off, or at an intermediate state. These states correspond to minimum impedance, maximum impedance, and intermediate impedances. The shunt path primary circuit device  124 B is similarly responsive to control voltages applied to the control input  122 B. Preferably, the control voltages applied to  122 A and  122 B are complementary. That is, as the gain path primary circuit device  124 A is driven to lower impedance, the shunt path primary circuit device  124 B is driven to a higher impedance, and vice-versa. 
     The gain path secondary device  126  operates similarly to the primary circuit devices  124 A and  124 B. However, while the secondary circuit device  126  is placed in the gain path  132 , its control input is commonly connected with that of the shunt path primary circuit device  124 B. In this manner, the conducting state (on, off, partially on) of the secondary circuit device  126  follows that of the shunt path primary circuit device  124 B. With this configuration, a minimum gain setting where the primary circuit device  124 A is fully off and the primary circuit device  124 B is fully on, results in a predictable, defined value of amplifier gain. This results from the secondary circuit device  126  being turned on in conjunction with the primary circuit device  124 B. At minimum amplifier gain a small amount of current flows through the gain path  132  by virtue of the secondary circuit device  126 . 
     Preferably, the secondary circuit device  126  is designed such that it passes less current than the shunt path primary circuit device  124 B for a given control voltage applied to the control input  122 A. This is desirable because, in most designs, the amount of amplifier current that must flow through the gain path  132  at minimum gain is quite small in comparison to the magnitude of intermediate and maximum gain amplifier currents that must be handled by the primary circuit device  124 A. Similarly, it is preferable that the primary circuit devices  124 A and  124 B have similar control signal-to-conduction state characteristics (e.g., control voltage response) in the interest of simplifying the control signals that must be applied to the control inputs  122 A and  122 B to achieve a desired gain for the amplifier circuit  100 . 
     Thus, the control signal or signals provided to the current steering circuit  120  via the control inputs  122 A and  122 B determine the ratio between the current flowing through the gain path  132  and that flowing through the shunt path  134 . Clearly, as the ratio of gain path current (i GAIN ) to shunt path current (i SHUNT ) increases, the signal gain of the output RF signal (RF OUT) increases with respect to the RF input signal (RF IN). Conversely, as the ratio of i GAIN  to i SHUNT  decreases, the signal gain (RF OUT to RF IN) of the amplifier circuit  100  decreases. However, unlike existing gain control schemes that use some type of current steering, the present invention ensures that a minimum amount of i GAIN  current flows when the amplifier circuit  100  is active and at or above the lowest amplifier gain settings. 
     FIG. 3 depicts an exemplary, single-ended amplifier configuration in one embodiment of the present invention. In this embodiment, the current steering circuits  124 A,  124 B, and  126  are implemented as transistors  224 A,  224 B, and  226 , respectively. The current steering circuit  120  further includes shunt and coupling capacitors  250 ,  252 , and  254 , as well as a high-frequency roll-off filter comprising a resistor  256  and capacitor  258 . An RF signal is applied to the signal input  108  and drives a transistor amplifier  110  through an input coupling capacitor  112 . An emitter degeneration impedance  114  (e.g., a resistor) provides operating voltage feedback to the transistor amplifier  110 , as is well understood by those skilled in the art. The bias circuit  118  is configured to provide a bias current sufficient to maintain the transistor amplifier  110  in a linear mode of amplification over the range of expected RF input signal amplitudes. Substantial variation exists with regard to implementing the amplifier  110 , the bias circuit  118 , and other supporting circuits, as will be readily appreciated by those skilled in the art. 
     As introduced in the discussion of FIG. 3, the values of a few, well-controlled parameters establish the minimum and maximum gains for a given implementation of the amplifier circuit  100 . In the embodiment shown in FIG. 3, the minimum and maximum gains and, hence, gain range, are set by selecting values for the gain path impedance  136  and the degeneration impedance  114 , and by selecting appropriates sizes for the transistors  224 B and  126 . For example, the size of the secondary transistor  126  may be selected in relation to the size of the primary transistor  224 B such that when both transistors are biased on at minimum amplifier gain, the current through the secondary transistor  226  is a desired ratio less than that through the primary transistor  224 B. 
     This primary-to-secondary transistor size ratio establishes the gain range for the amplifier circuit  100 . Absolute values of minimum and maximum gain for the amplifier circuit  100  are determined by the size ratio and the values of impedances  136  and  114 . To better understand this relationship, first assume that a given size ratio between the shunt path primary transistor  224 B and the gain path secondary resistor  226  is established and given values for the gain path impedance  136  and degeneration impedance  114  are chosen to provide an amplifier gain range of 0 dB to 20 dB. If the given size ratio is maintained, the designed-for gain range may be shifted to, say, 10 dB to 30 dB, simply be adjusting the gain path impedance  136 , the degeneration impedance  114 , or a combination thereof. 
     Control signals applied to control inputs  122 A and  122 B allow the external system (not shown) to effect automatic gain control (AGC) for the amplifier circuit  100 . Note that the signal applied to the control input  122 A (AGC 1 ) controls the gain path primary transistor  224 A, while the signal applied to the control input  122 B (AGC 2 ) controls both the gain path secondary transistor  226  and the shunt path primary transistor  224 B. As with the generalized embodiment of FIG. 2, the control inputs  122 A and  122 B preferably are controlled with an inverse control relationship, meaning that as the bias signal AGC 1  increases, the bias signal AGC 2  decreases and vice versa. Thus, the external system controls the gain of an output signal (RF OUT) provided on the signal output  138  by controlling the relative degree to which the gain and shunt path transistors  224 A,  226 , and  224 B, respectively, are turned on. 
     While the absolute signal levels (e.g., voltage) of AGC 1  and AGC 2  required for proper operation of the current steering circuit  120  are dependent upon the operating voltages of the overall amplifier circuit  100 , the relative values of AGC 1  and AGC 2  determine amplifier gain. For example, as the signal level of AGC 1  increases beyond a given level, the primary transistor  224 A begins turning on and conducting current through the gain path  132 . Increasing the level of AGC 1  further turns the primary transistor  224 A fully on, where it represents a minimum impedance and voltage drop in the gain path  132 . Similarly, as the signal level of AGC 2  increases beyond a given level, the primary transistor  224 B and the secondary transistor  226  begin turning on, with the primary transistor  224 B conducting current through the shunt path  134  and the secondary transistor  226  conducting current through the gain path  132 . Increasing the level of AGC 2  further turns the primary transistor  224 B and the secondary transistor  226 , eventually turning these transistors fully on, where they have a maximum conductance and minimum voltage drop. Preferably, the AGC 1  and AGC 2  control signals applied to the control inputs  122 A and  122 B are inversely controlled such that as current through the gain path  132  increases, the current through the shunt path  134  decreases, and vice versa. 
     With control of the secondary transistor  226  in the gain path tied to control of the primary transistor  224 B in the shunt path, a minimal amount of gain path current may be conducted through the gain path  132  even when the gain path primary transistor  224 A is non-conducting. For example, as the AGC 2  signal applied to the control input  122 B increases and the AGC 1  signal applied to the control input  122 A decreases, current in the gain path  132  decreases while current in the shunt path  134  increases. However, the secondary transistor  226  in the gain path  132  also begins turning on as AGC 2  increases. This action sets a minimum gain path current for a defined control voltage applied to  122 A and  122 B corresponding to a desired minimum gain for the amplifier circuit  100 . 
     The amount of current that flows through the secondary transistor  226  in comparison to that which flows through the primary transistor  224 B when both are fully turned on determines the amount of current flowing through the gain impedance  136  (shown as a resistive element) at the minimum gain setting of the amplifier circuit  100 . Thus, an integrated circuit device incorporating the amplifier circuit  100 , or at least the current steering mechanism  120 , may be fabricated with a desired size ratio between the current steering transistors  224 A,  224 B, and  226 . Individual design requirements will dictate specific size ratios, but the present invention contemplates a ratio of 32:1 for the size of the primary transistor  224 B compared to the secondary transistor  226  in at least one embodiment. With this size differential, the secondary transistor  226  conducts a finite but small amount of current through the gain impedance  136 , compared to the relatively large shunt current conducted through the shunt path  134  by the primary transistor  224 B, when both transistors  224 B and  226  are biased on. 
     Thus, maximum output signal gain for the amplifier circuit  100  occurs when the external system controls the current steering circuit  120  such that all amplifier output current is routed through the gain path, thereby developing an output signal voltage across the gain element  136 , which is available on the signal output  138 . With the configuration shown in FIG. 3, this maximum gain occurs for a given maximum signal level applied to the control input  122 A and a minimum signal level applied to the control input  122 B. As noted, the absolute levels for the AGC, and AGC 2  control signals may depend upon the operating conditions of the overall amplifier circuit  100 . Similarly, minimum output signal gain for the amplifier circuit occurs when the external system controls the current steering circuit  120  such that most of the amplifier output current is routed through the shunt path  134 . In this state, a desired minimum amount of amplifier output current flows through the gain path  132  through the secondary transistor  224 . 
     Note that the shunt and coupling capacitors  250 ,  252 , and  254  are generally needed only when using the amplifier circuit  100  to amplify higher frequency signals, such as 800 MHz and above. When operating the amplifier circuit  100  with such frequencies, parasitic capacitances and unwanted signal coupling can generate AC signals on the bases of transistors  224 A,  226 , and  224 B. In this context, the capacitor  252  serves as a low impedance shunt for the base of transistor  224 A, while the capacitor  254  serves the same purpose for transistors  224 B and  226 . Further, the capacitor  250  provides a low impedance AC connection, ideally and AC short, between the bases of  224 A and the bases of  224 B and  226 . This coupling helps insure that no differential AC control signal develops between the current steering transistor bases. 
     In similar consideration of operating at higher frequencies, some applications of the amplifier circuit  100  may benefit by including the resistor  256  and the capacitor  258  configured as a roll-off filter on the output  138  of the gain path  132 . This roll-off limits gain at very high frequencies and can improve the stability of the amplifier circuit  100 . For embodiments of the amplifier circuit  100  where more than one gain path RF output is provided, similar roll-off filters are provided for each gain path output. However, as those skilled in the art will readily appreciate, the need for and the particular configuration of AC compensation of the amplifier circuit  100  will vary with design requirements. 
     FIG. 4 provides a generalized depiction of the output power control (RF OUT) for the amplifier circuit  100 . Note that the upper curve expresses output signal power as a function of control voltage (i.e., AGC 1  and AGC 2 ). As the gain path primary transistor  224 A is increasingly turned on and the shunt path primary transistor  224 B is increasingly turned off, the output signal gain of the amplifier  110  increases. The action of the gain path secondary transistor  226  establishes the minimum amplifier gain (MIN GAIN) at the minimum control voltage (e.g., levels of AGC 1 , and AGC 2  corresponding to minimum amplifier gain). As noted, a size ratio is established between the primary path secondary transistor  226  and the shunt path primary transistor  224 B. Preferably, the gain path secondary transistor  226  conducts less current or has a lower current gain than the shunt path primary transistor  224 B for a given level of AGC 2 . This effect may be achieved, for example, by making the secondary transistor  226  smaller than the primary transistor  224 B. 
     FIG. 5 illustrates an alternate embodiment for the current steering circuit  120  of FIG. 3 that may provide more system interface convenience in certain applications. Rather than providing gain control outputs  122 A and  122 B that directly connect with the current steering transistors  224 A,  224 B, and  226 , the circuit of FIG. 5 includes a buffering and level shifting arrangement  200  on each gain control input. With this additional circuitry, a controlling system (such as a cellular phone control circuit)—not shown—is presented with a high-impedance pair of voltage control inputs, which alleviates the need to provide automatic gain control signals capable of driving transistors  224 A,  224 B, and  226 . Further, the input circuits  200  may be arranged such that the external control voltages fall within a more convenient range. For example, for a given range of input RF signal and operating voltage—as applied to the voltage input  130  of FIG.  3 —the amplifier circuit  100  may require AGC 1  and AGC 2  to vary over the range of 2.0V-2.4V with respect to signal ground. 
     This control voltage range may not be convenient for the external system. Therefore, the input circuits  200  may be configured to establish a nominal bias voltage point for the current steering transistors  224 A,  224 B, and  226 . With the configuration shown, external control circuitry may vary the AGC 1  and AGC 2  signals between more convenient ranges, for example, between 0 and 4.096 V. Of course, there are a variety of other buffer and level shifting circuit arrangements that may provide specific advantages in certain applications. 
     Further variations are contemplated for buffering and interface circuitry applied to the control inputs  122 A and  122 B. For example, such circuit could allow a single control input, instead of  122 A and  122 B, to drive the current steering circuit  120  and then internally generate the differential control signals applied to the gain and shunt path current steering circuit devices ( 124 A,  124 B, and  126 ). Of course, if other types of controlled conduction devices are used in the current steering circuit  120  to control the gain path  132  and shunt path  134  currents, the control interface circuitry  200  may be further modified. Note that interface circuit  200  could be modified such that its level shifting function is automatically tied to the value of the supply voltage applied to the supply voltage input  130 , or a parameter of the input RF signal to be amplified, such as average value of expected maximum signal amplitude. 
     FIG. 6 illustrates an exemplary differential configuration for the amplifier circuit  100 . This differential amplification circuit  100  incorporates a variation of the current steering circuit  120 . A differential RF drive signal is applied to the inputs  108 A and  108 B, and coupled through the input coupling capacitors  114 A and  114 B. Two transistor amplifiers  110 A and  110 B, with emitter degeneration impedances  114 A and  114 B, work in tandem with a common current source  116  to provide differential amplification of the differential RF input signal. Outputs  138 A and  138 B provide a differential RF output signal, which is an amplified version of the input RF signal applied to inputs  108 A and  108 B. In keeping with its differential configuration, the amplifier circuit  100  includes a gain path  132 A with a gain impedance  136 A and a shunt path  134 A for the transistor amplifier  110 A. Similarly, the amplifier circuit includes a gain path  132 B with a gain impedance  136 B and a shunt path  134 B for the transistor amplifier  110 B. The gain paths  132 A and  132 B provide the differential outputs  138 A and  138 B, respectively. 
     The current steering transistors  224 A,  224 B, and  226 , control the gain of the transistor amplifier  110 A, while the current steering transistors  224 A′,  224 B′, and  226 ′, control the gain of the transistor amplifier  110 B. Preferably, gain control signals are commonly applied such that the ratio of gain path-to-shunt path current for the transistor amplifiers  110 A and  110 B remains matched across the range of amplifier gain control. The current steering arrangement includes the gain control inputs  122 A and  122 B, and is responsive to the relative voltage applied to these inputs, as described in conjunction with FIGS. 2 and 3. When transistors  224 A and  224 A′ are turned fully off and transistors  224 B,  224 B′,  226  and  226 ′ are turned fully on the differential amplifier circuit  100  is at a minimum gain. Conversely, when transistors  224 B,  224 B′,  226 , and  226 ′ are turned fully off and transistors  224 A and  224 A′ are biased fully on the differential amplifier circuit  100  is at a maximum gain. As with other embodiments, intermediate gains may be established by adjusting the relative AGC 1  and AGC 2  voltages between those levels associated with minimum and maximum gains. 
     A variation on the differential amplifier circuit  100  appears in FIG.  7 . The amplifier circuit  100  of FIG. 7 differs from that shown in FIG. 6 in that the current steering circuit  120  includes a fully “balanced,” i.e., completely symmetrical, current steering arrangement. This balanced arrangement differs from that of FIG. 6 with the addition of secondary transistors  226 B and  226 B′ to the shunt paths  134 A and  134 B, respectively. Such a fully balanced implementation of the current steering circuit  120  can provide stability advantages in certain applications of the amplifier circuit  100 . Again, the differential amplifier circuit  100  may be thought of as two halves, with the current steering transistors  224 A,  224 B,  226 A, and  226 B, providing gain control for the transistor amplifier  110 A, and  224 A′,  224 B′,  226 A′, and  226 B′ providing gain control for the transistor amplifier  110 B. 
     In operation, the amplifier circuit  100  of FIG. 7 maintains a defined minimum current through the gain paths  132 A and  132 B at a minimum defined gain control voltage applied to inputs  122 B and  122 A by virtue of the gain path secondary transistors  226 A and  226 A′, respectively. Further, the amplifier circuit  100  maintains a defined minimum current through the shunt paths  134 A and  134 B at a maximum defined gain control voltage applied to inputs  122 A and  122 B by virtue of the shunt path secondary transistors  226 B and  226 B′ respectively. While this minimally detracts from the maximum gain achievable if all output current for the amplifier transistors  110 A and  110 B were routed through the gain paths  132 A and  132 B at maximum gain, it provides “fully balanced” current steering control. 
     As in earlier embodiments, it may be desirable to establish a first size common to all primary transistors (e.g.,  224 A,  224 B,  224 A,  224 A′, and  224 B′), and a second size common to all secondary transistors (e.g.,  226 A,  226 B,  226 A′, and  226 B′). In this manner, a desired primary-to-secondary transistor size ratio is established, and all primary transistors have similar operating behaviors, and all secondary transistors have similar operating behaviors. This similarity of response can simplify the requirements for the gain control signals applied to the control inputs  122 A and  122 B. Of course, in some applications, it may be desirable to size some or all of the gain path primary transistors (e.g.,  224 A,  224 A′) differently than some or all of the shunt path primary transistors (e.g.,  224 B, and  224 B′). This situation might arise, for example, when a need for a large amplifier gain range necessitates fabricating large shunt path primary transistors (e.g.,  224 B and  224 B′) to achieve the desired size ratio with the primary path secondary transistors (e.g.,  226 A and  226 A′). 
     The present invention allows significant variation in implementation, application, and control. For example, the amplifier circuit may be implemented in a variety of process technologies, including Silicon Germanium, Gallium Arsenide, Indium Phosphide, and more conventional Silicon processes. Further variation may be practiced with regards to the transistor amplifier topology to which the current steering circuit  120  of the present invention is applied. Those skilled in the art will readily appreciate that the present invention may be advantageously used with a range of transistor amplifier topologies or configurations. Further variations are possible with regard to the configuration of bias circuit arrangements. All such variations are considered within the scope of the present invention. 
     Further, the present invention is not limited to usage of specific types of transistor devices for either signal amplification, or for current steering gain control. By way of example, the present invention may be adapted for use to include MOSFETS, JFETS, MESFETS, BJTs, and other types of transistor devices. Indeed, the current steering arrangement may employ any device having suitable impedance characteristics for the range of frequencies at which a given amplifier circuit  100  is expected to operate. Current steering through the gain paths  132  and the shunt paths  134  requires only that some type of series device positioned within these respective paths control current flow responsive to an external control signal. Suitable current steering gain control signals include voltage mode signals as well as current mode signals. 
     The particular process technology, the topology for amplifier circuit  100 , and the type(s) of transistors used in the amplifier circuit  100 , will depend upon the application. For example, the amplifier circuit  100  may be used in the intermediate frequency (IF) sections of an RF transmitter signal chain, or may be used in the high-frequency RF sections. Gain control as afforded by the present invention is particularly advantageous for implementing RF output power control, such as that required by several radiotelephone communication standards, such as the well-known IS-95 and GSM standards. Those skilled in the art will readily appreciate the many variations on the amplifier circuit  100  that may be practiced in accordance with the current steering techniques of the present invention. 
     The foregoing illustrations depicted exemplary single-ended and differential amplifier embodiments for the amplifier circuit  100 . These illustrations included various embodiments for the current steering circuit  120  that enables the advantageous current steering techniques of the present invention. However, the foregoing illustrations and accompanying discussions should not be construed as limiting. Indeed, the present invention is limited only by the scope of the claims included herein, and the reasonable equivalents thereof.