Abstract:
A current-compensating circuit provides compensation to a reference voltage such that the current through a diode-connected MOS transistor remains constant, regardless of threshold voltage. The compensating circuit includes another MOS transistor that is connected as a voltage follower in saturation. Variations in the component of the reference voltage that are produced by the effects of process variation on this other MOS transistor act to correct the current variations that these same process variations cause in the diode-connected MOS transistor.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    This invention relates to the field of electronic circuit design, and in particular to a CMOS current generator that provides an output current that is insensitive to process parameters, specifically, insensitive to threshold voltage.  
           [0003]    2. Description of Related Art  
           [0004]    Conventional current sources are dependent upon a number of factors, including temperature, voltage, and process variations. Bandgap voltage references can provide a stable voltage, and PTAT (proportional-to-absolute-temperature) circuits can be used to compensate for current changes with temperature. Process variations generally affect the threshold voltage Vt of the fabricated transistors, and a variety of techniques have been developed for generating a current that is insensitive to the threshold voltage Vt.  
           [0005]    [0005]FIGS. 1 and 2 illustrate example circuit diagrams of conventional constant-current sources  100  and  200 , respectively. In FIG. 1, a bandgap voltage typically provides a reference voltage Vref, and a high gain operational amplifier controls the current through an NMOS transistor so as to maintain this reference voltage across a resistor R. This controlled current will be equal to Vref/R, and will be independent of Vt. As is known in the art, however, the fabrication of a resistor can result in a variance of resistance of as much as 40%. FIG. 2 illustrates a current source  200  that does not rely upon a reference voltage, per se, and is commonly referred to as a “beta multiplier referenced self-biasing current source”. The output current of the current source  200  is independent of Vt, but it is dependent upon the resistance value of a resistor R 1 , which, as noted above, is difficult to control. Often, the resistor R 1  is trimmed after fabrication to provide the desired output current, but this is generally a costly process step.  
           [0006]    U.S. Pat. No. 5,469,111, “CIRCUIT FOR GENERATING A PROCESS VARIATION INSENSITIVE REFERENCE BIAS CURRENT”, issued Nov. 21, 1995 to Kwok-F Chiu, presents a current generator wherein the Vt-independent reference current is based on the difference between two base-emitter voltages of two bipolar transistors, and does not depend upon a controlled resistance value.  
           [0007]    Japanese patent JP 1-263706, “BIAS CIRCUIT”, issued Oct. 20, 1989 to Daijiro Inami, presents a current generator wherein the Vt-independent reference current is based on maintaining a particular relationship of sizes of N-MOS transistors, and also does not depend upon a controlled resistance.  
         BRIEF SUMMARY OF THE INVENTION  
         [0008]    It is an object of this invention to provide a current source that is independent of process variations, particularly variations in threshold voltage, Vt. It is a further object of this invention to provide a Vt-independent current source that can be embodied using MOS technology.  
           [0009]    These objects and others are achieved by a current-compensating circuit that provides compensation to a reference voltage such that the current through a diode-connected MOS transistor remains constant, regardless of threshold voltage. The compensating circuit includes another MOS transistor that is connected as a voltage follower in saturation. Variations in the component of the reference voltage that are produced by the effects of process variation on this other MOS transistor act to correct the current variations that these same process variations cause in the diode-connected MOS transistor. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0010]    The invention is explained in further detail, and by way of example, with reference to the accompanying drawings wherein:  
         [0011]    [0011]FIG. 1 illustrates an example circuit diagram of a conventional current source, based on a reference voltage.  
         [0012]    [0012]FIG. 2 illustrates an example circuit diagram of a beta-multiplier referenced self-biasing current source that does not rely upon a reference voltage.  
         [0013]    [0013]FIG. 3 illustrates an example circuit diagram of a process-independent current source in accordance with this invention. 
     
    
       [0014]    Throughout the drawings, the same reference numerals indicate similar or corresponding features or functions.  
       DETAILED DESCRIPTION OF THE INVENTION  
       [0015]    [0015]FIG. 3 illustrates an example circuit diagram of a process-independent current source  300  in accordance with this invention. N 3  is a diode-connected N-MOS transistor through which the intended current I 3  passes. This current I 3  is expressed as:  
           I   3 =β 3 ( V   gs     3     −V   t ) 2 ,  (1)  
         [0016]    where I 3  is the current through the drain-source of transistor N 3 , β 3  is the intrinsic gain of the transistor N 3 , Vgs 3  is the voltage between the gain and source of the transistor N 3 , and Vt is the threshold voltage for bringing the transistor N 3  into its conduction region. As noted above, the threshold voltage Vt is predominantly determined by parameters of the process used to create the transistor, and is generally consistent among all transistors of the same type within an integrated circuit. A differential amplifier A 3  is configured to maintain Vgs 3  equal to Vref, via the transistor N 4 .  
         [0017]    The voltage Vref is provided by the operational amplifier A 2 , and is given as:  
           Vref =(1+ Ra/Rb ) Vr   2 −( Ra/Rb ) Vx,   (2)  
         [0018]    where Vx is the output of the buffer A 1 , and is given as:  
           Vx=Vr   1   −V   gs     1   .  (3)  
         [0019]    In accordance with this invention, the amplifier A 2  and transistor N 1  are configured to provide a compensation voltage for the threshold voltage Vt of transistor N 3 . The gate-to-source voltage Vgs 1  of transistor N 1  is dependent upon its threshold voltage, which is assumed to be equal to the threshold voltage of transistor N 3 .  
           V   gs     1     ={square root}{square root over (I 1 /β 1 )}+   V   t .  (4)  
         [0020]    Combining equations 2-4,  
           Vref=Vr   2 +( Ra/Rb )( Vr   2   −Vr   1   +{square root}{square root over (I 1 /β 1 )}+   V   t ).  (5)  
         [0021]    Thus, combining equations 1 and 5, the current I 3  through N 3  is given as:  
           I   3 =β 3 ( Vr   2 +( Ra/Rb )( Vr   2   −Vr   1   +{square root}{square root over (I 1 /β 1 )}   V   t )−V t ) 2 ,  
         [0022]    or,  
           I   3 =β 3 ( Vr   2 +( Ra/Rb )( Vr   2   −Vr   1   +{square root}{square root over (I 1 /β 1 )})+(   Ra/Rb− 1) V   t ) 2 .  (6)  
         [0023]    As can be seen, the amplifier A 2  effects an inversion of the sense of the threshold voltage Vt, relative to the (Vgs 3 −Vt) term in the original I 3  equation (1). Thereby, the current I 3  can be made to be independent of the process-dependent threshold voltage Vt by setting the values of the resistors Ra and Rb equal. As is known in the art, although the fabrication of a precise resistance value is difficult to control, the fabrication of substantially identical resistors is a straightforward task, requiring only that their layout artwork be substantially identical. Variations in the fabrication steps and processes will affect both resistors equivalently, thereby maintaining their equivalence.  
         [0024]    Thus, by setting Ra=Rb, the circuit source  300  provides a current I 3  that is independent of the process-dependent threshold voltage, Vt. An output current path comprising transistors N 5  and N 6 , which are configured in the same manner as transistors N 4  and N 3 , respectively, effect a current-mirroring of the current I 3 , to provide a current lout that is independent of the threshold voltage Vt. In a typical application, the load that receives this process-independent current is placed in series between transistors N 5  and N 6 .  
         [0025]    The reference voltages Vr1 and Vr2 can be adjusted to provide the desired value of I 3 . As would be evident to one of ordinary skill in the art, Vr1 should be sufficient to bring transistor N 1  into its conduction region, to provide a non-zero I 1 , whereas the voltage source for Vr2 can be any value within the proper operating range of amplifier A 2 .  
         [0026]    The foregoing merely illustrates the principles of the invention. It will thus be appreciated that those skilled in the art will be able to devise various arrangements which, although not explicitly described or shown herein, embody the principles of the invention and are thus within its spirit and scope. For example, the principles of this invention may be combined with other techniques that further reduce the output current&#39;s dependencies on other factors. As illustrated in FIG. 3, transistor N 2  is configured to provide the source of current I 1 . Replacing transistor N 2  with a PTAT (proportional-to-absolute-temperature) current source, common in the art, can provide compensation for changes in the output current caused by temperature variations. In like manner, the equations presented above are based on the generally accepted first-order approximation of the operation of semiconductor devices. Common techniques for optimizations of performance, such as the trimming of resistors to provide values and/or ratios that differ from the theoretical ‘optimum’ values or ratios may be applied as desired. These and other system configuration and optimization features will be evident to one of ordinary skill in the art in view of this disclosure, and are included within the scope of the following claims.