Abstract:
A hybrid circuit models a plurality of attributes of a communication system including a subscriber line coupled to a line interface circuit. The plurality of attributes includes subscriber line impedance, and impedance of a coupling transformer. The attributes are based on other factors, such as whether or not bridge taps exist at or near the line interface circuit on the subscriber line. The plurality of attributes are modeled by a specific arrangement of resistive and capacitive elements to substantially duplicate the collective transforming effects of the attributes on a transmission signal being sent out on the subscriber line. The transmission signal is transformed and provided to an output, where it is subtracted from a composite signal representing a combination of the actual transformed transmission signal and a receive signal. The subtraction yields an isolated receive signal, which is later processed to recover the full receive signal.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates generally to data communications, and more particularly to a circuit for matching a digital transmission on a subscriber line, where the matched transmission is used for echo-cancellation. 
     2. Description of the Related Art 
     FIG. 1 shows a communication system  10  which includes a subscriber line interface circuit  100  coupled to one end of a subscriber line  110 . The subscriber line  110  is a communication medium for carrying voice and/or data signals. One example of a subscriber line  110  is a conventional telephone line comprised of a twisted-pair of copper wires. The subscriber line  110  includes a tip line  112  and a ring line  114 . According to one configuration for which the present invention is suited, the subscriber line  110  is a two-way communication medium, whereby the tip and ring lines  112  and  114  together carry both signals being transmitted and signals being received. The transmission signals and receive signals overlap each other in both time and frequency domains on the communication medium. In effect, the communication medium carries a composite signal representing overlapping transmission and receive signals. 
     The line interface  100  includes a transmission path  122  and a receive path  124 , each of which having lines corresponding to the tip line  112  and the ring line  114 . The line interface  100  is coupled to the subscriber line  110 , typically by a coupling transformer  115 . A driver  120  drives transmission signals onto the subscriber line  110 . The driver is preferably a low-impedance driver. A pair of isolation resistors R T  and R L  are resistively matched as close as possible to an impedance Z SL  of the subscriber line at the transformer  115 . The impedance Z SL  is based on an impedance of the subscriber line Z LOOP  as it is converted through the transformer  115 , as seen through the turn ratio of the coils of the transformer  115 . Secondarily, Z SL  is also based on other attributes, such as capacitance, for example, of the transformer  115  and other potential circuit components of the line interface  100 , which are not shown in FIG.  1 . 
     Point A in FIG. 1 represents a point between the output of the driver  120  and the isolation resistors, R T  and R L . The driver  120  has a very low output impedance, approaching zero, so that transmission signals on the output of the driver  120  are not affected by signals being received. Thus, signals on the driver  120  side of isolation resistors R T  and R L  are largely, if not exclusively, transmission signals. On the subscriber line side of the terminal resistors R T  and R L , several attributes of the communication system  10  transform the transmission signals. The attributes include an impedance of the subscriber line  110  and an impedance of the coupling transformer  115  At that point, the transmission signals are also combined with, and affecting, the signals being received. Point B in FIG. 1 represents a point on the subscriber line interface circuit where transformed transmission signals are combined with receive signals. 
     As both receive and transmit signals are present on the subscriber line, and have overlapping spectral content, signals being received must be isolated from transmission signals at the receiving end, i.e. at the line interface circuit  100 . However, such a procedure is very complex, due to the difficulty of determining the signal being transmitted and its effect on the signal being received. This difficulty exists because the transmission signals are transformed from a known signal at the point where they are output from the driver  120 , to a transformed signal at the point where they reach a transformer coupled to the subscriber line  110 , influenced by a plurality of transforming attributes. Most of the transformation is related to the attributes of the communication system  10  described above. 
     Signals arriving at the line interface  100  have attenuated extensively, and thus make up a smaller relative portion of the combined signal present on the subscriber line  110 . Therefore, some line interfaces employ a device known as a hybrid circuit  130  to approximate the transformation of the transmission signals. The hybrid circuit  130  is configured to produce a simulated transformed transmission signal in order to remove any transformed transmission signals from the receive signals. 
     Operation of the line interface  100  shown in FIG. 1 occurs as follows. The hybrid circuit  130  receives a pure transmission signal from the driver, and transforms it based on approximated characteristics of the subscriber line at the line interface  100 . A transformed transmission signal, representing a transmission signal that would occur at a point where it is combined with a receive signal, is passed to a subtractor  150 . A composite signal, having both transmission signals and receive signals, is coupled and filtered by a filter  140 , to remove aliasing or interfering frequencies. At the subtractor  150 , the signal provided by the hybrid circuit  130  is subtracted from the composite signal provided by the filter  140 , to theoretically yield only a receive signal. The recovered receive signal is then passed on for digital signal processing. The anti-aliasing filter  140  is normally provided separately from the hybrid circuit  130  to ensure a receive signal does not exhibit aliasing when the digitization process occurs in the DSP. 
     Conventional hybrid circuits, therefore, generally take a “known”signal being transmitted, and approximate how that signal will change in the presence of signal-transforming attributes or characteristics of the subscriber line. An approximated transmission signal is needed so that it may be removed from a receive signal. Accordingly, a hybrid circuit should model the transforming characteristics of the subscriber line on a transmission signal as accurately as possible. Conventional hybrid circuits are limited in how well they model those transforming characteristics of a given subscriber line. 
     SUMMARY OF THE INVENTION 
     The present invention is a circuit and method for modeling a plurality of attributes of a communication system that includes a line interface coupled to a subscriber line. The plurality of attributes collectively transform a transmission signal prior, and in some cases as it is being combined with a receive signal on the subscriber line. The attributes include impedances from various sources on the subscriber line and circuits of a line interface circuit. The present invention accurately models the plurality of attributes in order to substantially duplicate the transforming effects of the attributes on a representation of a transmission signal that has not yet been transformed, and provide a transformed transmission signal for removal from the receive signal. 
     In an embodiment of the invention, a circuit includes an input for providing a representation of an outbound transmission signal that is substantially free of time and frequency overlaps with inbound receive signals from the subscriber line, and wherein transmission signal bandwidth is asymmetrical to receive signal bandwidth. The circuit further includes a modeling section connected to the input, comprising resistive and a capacitive elements which are arranged for modeling a plurality of attributes of a subscriber line environment which transform transmission signals prior to overlapping with receive signals. The modeling section is further configured to substantially duplicate a transformation on the representation of the transmission signal. An output connected to the modeling section provides the transformed representation of the transmission signal. 
     In another embodiment of the invention, a method includes the steps of coupling an outbound transmission prior to its overlap with an inbound receive signal, to provide a representation of the transmission signal, modeling a plurality of attributes of the communication system, the attributes having a collective transforming effect on outbound transmission signals prior to overlapping with receive signals, and with the modeling, transforming the representation of the outbound transmission signal. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     FIG. 1 shows a line interface for an asymmetric digital subscriber line (ADSL) to illustrate the function of a hybrid circuit. 
     FIG. 2 is a circuit schematic diagram of an improved hybrid circuit according to one preferred embodiment of the present invention. 
     FIG. 3 is a circuit schematic diagram of an improved hybrid circuit according to a second preferred embodiment of the present invention. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The present invention is an improved hybrid circuit and method of operation of the same, where a plurality of attributes of the subscriber line are modeled by an arrangement of resistors and capacitors. The arrangement models the attributes from a point where the transmission signal is provided to the subscriber line, to a point where the transmission signal is combined with a receive signal. The arrangement thus substantially duplicates the transforming effects of the attributes on a transmission signal provided on the subscriber line. The modeled attributes are then applied to a coupled transmission signal as it is being transmitted onto a full-duplex subscriber line. The hybrid circuit according to the present invention provides a transformed transmission signal which may be removed from a receive signal, to recover a clean receive signal. 
     Generally, the hybrid circuit  130  and its method of operation, according to the invention, accurately replicates a transfer function of a transmission signal between points A and C in FIG. 1, such that it matches a transfer function of the transmission signal between points A and B. 
     FIG. 2 is a circuit diagram of a hybrid circuit  200  according to an exemplary embodiment of the invention. According to FIG. 2, and with reference to the communication system  10  shown in FIG. 1, the hybrid circuit  200  is shown for a subscriber line  110  that has no bridge taps near the line interface  100 . The subscriber line illustrated in FIG. 2 includes a transmission line as a differential pair of lines Xmit P and Xmit N, where Xmit P can carry a positive signal and Xmit N can carry a negative signal of the outbound transmissions on the differential transmission line. The hybrid circuit includes an input  210  that couples an outbound transmission signal from transmission lines Xmit P and Xmit N. Input  210  includes a first line  211  and a second line  212 , corresponding to the transmission lines Xmit P and Xmit N respectively. In an alternative embodiment, however, the input  210  may be a single-ended connection to the subscriber line  110 , which may or may not be carrying a differential pair of signals. 
     Input  210  thus provides a representation of the outbound transmission signal at a point where the outbound transmission signal is substantially free of time and frequency overlaps with input receive signals from the subscriber line  208 , which overlapping exists, for example, at points labeled as Receive P and Receive N in FIG. 2. A DC reference signal REF is extracted at the input  210 , and restored later after the outbound transmission signal representation has been processed in the hybrid circuit  200 . 
     The hybrid circuit  200  further includes a modeling section  220  that is connected to the input  210  for receiving the representation of the outbound transmission signal. The modeling section  220  is configured to model and duplicate the transforming effects of attributes of the subscriber line. The modeling section  220  includes a plurality of resistive elements and a plurality of capacitive elements, specifically arranged so as to model the attributes of the subscriber line environment which transform the transmission signal as it overlaps with receive signals. 
     In an embodiment, the arrangement of resistive and capacitive elements receive the positive and negative signals of a differential pair representing the outbound transmission, and transform the transmission signal so as to represent the transformed transmission signal as it would exist when overlapped with receive signals on the subscriber line  205 . An output  230  includes a first line  231  and a second line  232 , and is coupled to the modeling section for providing the transformed representation of the transmission signal. 
     In accordance with an exemplary embodiment of the invention, the modeling section  220  of hybrid circuit  200  includes a first combination of a resistor R 6  connected in parallel with a capacitor C 3 , wherein the first combination is connected to the first input line  211 , and a second combination of a resistor R 7  connected in parallel with a capacitor C 4 , wherein the second combination is connected to the second input line  212 . The matching section  220  further includes a third combination of a resistor R 13 , a resistor R 12  and a capacitor C 7 , connected in series, wherein the resistor R 13  is connected to the first combination and the capacitor C 7  is connected to the first output line  231 , and a fourth combination of a resistor R 14 , a resistor R 11 , and a capacitor C 8 , connected in series, wherein the resistor R 14  is connected to the second combination and the capacitor C 8  is connected to the second output line  232 . 
     In the exemplary embodiment, the matching section  220  still further includes a resistor R 5  connected to a node between the first and third combination, and to a node between the second and fourth combinations, and a fifth combination of a capacitor C 5  connected in series with a resistor R 8 , wherein the capacitor C 5  is connected to a node between the resistor R 13  and the resistor R 12 , and wherein the resistor R 8  is connected to a node between the resistor R 14  and the resistor R 11 . A sixth combination in the exemplary matching section  220  has a resistor R 9  connected in series with a capacitor C 6 , wherein the resistor R 9  is connected to a node between the resistor R 12  and the capacitor C 7 , and wherein the capacitor C 6  is connected to a node between the resistor R 11  and the capacitor C 8 . Finally, the matching section  220  includes a resistor R 10  connected to a node between the capacitor C 7  and the first output line  231 , and to a node between the capacitor C 8  and the second output line  232 . 
     In a specific embodiment, the resistors R 6  and R 7  are 34 Ω resistors, resistor R 5  is a 442 Ω resistor, resistors R 13  and R 14  are 16.2 Ω resistors, and resistors R 12  and R 11  are 60.6 Ω resistors. In the specific embodiment, the resistor R 8  is a 280 Ω resistor, the resistor R 9  is a 324 Ω resistor, and the resistor R 10  is a 2.94 kΩ resistor. In the embodiment, all of the resistors are 1% tolerance resistors, but may have other values of tolerance. In accordance with the specific embodiment, capacitors C 3  and C 4  are 2.7 nF capacitors, capacitor C 5  is a 560 pF capacitor, and capacitor C 6  is a 5.6 nF capacitor. Capacitors C 7  and C 8  are 10 nF capacitors. All of the capacitors may be 5% tolerance, however other tolerances are suitable. 
     Thus, the values and tolerances of the resistive and capacitive elements illustrated in FIG. 2 are not to be limited to those described herein. On the contrary, those skilled in the art will recognize that other values and tolerances may be used for capacitors and resistors which will still fall within the scope of the present invention. Therefore, the resistors and capacitors described in the specific embodiment are provided as an example only. 
     FIG. 3 illustrates one alternative embodiment of a hybrid circuit  300  according to the present invention. Hybrid circuit  300  is adapted for a case where a subscriber line includes one or more taps to other subscriber lines near the line interface. The circuit  300  includes an input  310  having a first line  311  and a second line  312 , which are preferably arranged as a differential pair of wires, but which may be a single-ended input connection to a differential subscriber line  110  shown in FIG.  1 . The input  310  corresponds to the tip and ring lines of the subscriber line  110 . 
     The hybrid circuit  300  includes a modeling section  320  having a plurality of resistive elements and a plurality of capacitive elements, and which is configured to model subscriber line attributes as discussed above in reference to modeling section  220  of FIG.  2 . An output  330  is connected to the modeling section and may also be a differential pair of wires. The output  330  includes a first line  331  and a second line  332 . 
     In accordance with the alternative embodiment and with reference to FIG. 3, the modeling section  320  includes a first combination of a resistor R 5 , a capacitor C 3 , and a capacitor C 4 , connected in parallel, and wherein the first combination is connected to the first input line  311 , and a second combination of a resistor R 6 , a capacitor C 5 , and a capacitor C 6 , all of which are connected in parallel, and wherein the second combination is connected to the second input line  312 . The modeling section further includes a third combination of a resistor R 8  and a capacitor C 9 , connected in series, wherein the resistor R 8  is connected to the first combination and the capacitor C 9  is connected to the first output line  331 , and a fourth combination of a resistor R 9  and a capacitor C 10 , connected in series, wherein the resistor R 9  is connected to the second combination and the capacitor C 10  is connected to the second output line  332 . 
     Additionally, the modeling section  320  includes a fifth combination and a sixth combination. The fifth combination includes a capacitor C 7  and a resistor R 7  connected in series, wherein the capacitor C 7  is connected to a node between the first combination and the resistor R 8 , and wherein the resistor R 7  is connected to a node between the second combination and the resistor R 9 . The sixth combination includes a resistor R 10  and a capacitor C 8  connected in series, wherein the resistor R 10  is connected to a node between the resistor R 8  and the capacitor C 9 , and wherein the capacitor C 8  is connected to a node between the resistor R 9  and the capacitor C 10 . Finally, a resistor R 11  is connected to a node between the capacitor C 9  and the first output line  331 , and to a node between the capacitor C 10  and the second output line  332 . 
     In a specific embodiment of the alternative arrangement for the modeling section, resistors R 5  and R 6  are 97.6 Ω resistors, resistors R 8  and R 9  are 75 Ω resistors, resistor R 7  is a 121 Ω resistor, resistor R 10  is a 243 Ω resistor, and resistor R 11  is a 1.82 kΩ resistors. According to this embodiment, each of the ohmic values for the resistors have a tolerance of 1%. 
     In the specific embodiment, capacitors C 3 , C 4 , C 5 , and C 6  are 1.5 nF capacitors. Capacitors C 9  and C 10  are 8.2 nF capacitors, capacitor C 7  is a 3.9 nF capacitor, and capacitor C 8  is a 2.7 nF capacitor. In this embodiment, all capacitors are have a 5% tolerance. 
     In accordance with the invention, the specific arrangement of capacitors and resistors, and their values, shall not limit the scope of the invention. Other arrangements and values are possible, as well as tolerances, such that a hybrid circuit may still fall within the teachings of the present invention. Other embodiments, combinations and modifications of this invention will occur readily to those of ordinary skill in the art in view of these teachings. Therefore, this invention is to be limited only by the following claims, which include all such embodiments and modifications when viewed in conjunction with the above specification and accompanying drawings.