Abstract:
A lossless feedback transistor amplifier circuit is described, including an input terminal and an output terminal, for the purpose of amplifying a signal voltage. The amplifier circuit also includes an augmentation circuit, connected from the emitter to the base of a common-base amplifying transistor, which detects an error voltage at the common-base transistor emitter, amplifies and inverts the error voltage, and then applies the amplified error voltage to the base of the common-base amplifying transistor, for the purpose of reducing the emitter error voltage and thus reducing the harmonic and intermodulation distortion of the lossless feedback amplifier. According to a further embodiment, a second transistor is used for amplifying the emitter error voltage. In a further embodiment, an inverting positive feedback amplifier is used for amplifying the emitter error voltage. In a further embodiment, a transformer is used to amplify and invert the emitter error voltage. Circuits are also described for augmented complementary lossless feedback transistor amplifiers.

Description:
BACKGROUND OF THE INVENTION 
     The lossless-feedback transistor amplifier has been recognized as one of the more effective innovations in small-signal amplifier design. With its ability to deliver both low noise and high linearity response with a minimum amount of effort and cost, both being highly desirable characteristics in small-signal amplifier design, the lossless-feedback amplifier has enjoyed a wide range of applications in communications receiver and radio astronomy telescope receiver design. In a conventional lossless-feedback transistor amplifier, as shown in FIG. 1, the amplifier basically consists of a common-base amplifying transistor  105  and a feedback transformer  103 . Generally, the design concept relies on the input impedance of the transistor, seen at the emitter, as being negligible. However, the finite nonlinear input resistance seen at the emitter degrades the expected performance, and the nonlinear nature of this resistance is the primary cause of both harmonic and intermodulation (IM) distortion. Traditional design techniques reduce this nonlinear resistance by increasing the transistor bias current, which produces a limited degree of improvement but which also reduces the overall power efficiency of the amplifier, which is undesirable. It is a desirable design goal to improve the linearity of amplifiers in general without incurring an increase in power consumption. 
     SUMMARY OF THE INVENTION 
     An augmented lossless-feedback transistor amplifier circuit with improved intermodulation (IM) performance is described which includes an augmented common base transistor amplifier. The augmented common-base transistor amplifier circuit further includes an augmentation circuit which detects an error voltage at the emitter of the common-base transistor, and which then inverts and amplifies the detected error voltage as a voltage to be applied at the base of the common-base transistor, thereby reducing the error voltage at the emitter of the common-base transistor and in turn improving the linearity and IM performance of the lossless-feedback transistor amplifier circuit. In a further embodiment the augmentation is accomplished by the addition of a common-emitter amplifier circuit. In a further embodiment suitable for higher frequency and lower noise applications, a transformer is used to perform the augmentation. In a further embodiment suitable for high dynamic-range applications, a positive feedback amplifier is used to perform the augmentation. In a further embodiment also suitable for higher dynamic-range applications, a complementary pair of augmented common-base transistors is used in place of the single-ended augmented common-base transistor. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention is described in the schematics of FIGS. 1 to  6 , in which: 
     FIG. 1 schematically illustrates the existing prior art, commonly referred to as a lossless-feedback transistor amplifier; 
     FIG. 2 schematically illustrates an inverting amplifier in a lossless-feedback transistor amplifier in accordance with the present invention; 
     FIG. 3 schematically illustrates a common-emitter amplifier in a lossless-feedback transistor amplifier in accordance with the present invention; 
     FIG. 4 schematically illustrates a transformer in a lossless-feedback transistor amplifier in accordance with the present invention; 
     FIG. 5 schematically illustrates a positive-feedback amplifier in a lossless-feedback transistor amplifier in accordance with the present invention; and 
     FIG. 6 schematically illustrates the addition of a complementary pair of transformer-augmented common-base transistor amplifiers in a lossless-feedback transistor amplifier. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Designers of high dynamic-range signal amplifiers, particularly in applications involving communications receivers, are concerned with elements of system performance which include, but are not limited to, intermodulation distortion (IM), noise figure (NF), power consumption and efficiency, and environmental conditions, particularly temperature. Historically, the IM performance of high dynamic-range signal amplifiers is improved by application of feedback methods or by increasing the bias current of the active devices. The latter of these is impractical for applications where portable operation utilizing batteries for power is involved, as the increase in power consumption shortens the amount of available operation time for a given battery supply. The former of these has been addressed by application of a feedback method known as lossless feedback, wherein a transformer is used to provide feedback coupling from the input to the output, the “lossless” nature of such feedback reducing the noise figure of the amplifier to that of the active device itself. Signal amplifiers using lossless feedback have enjoyed a wide range of applications, their reputation for low noise, good gain stability over temperature, low IM products, and low power consumption being desireable characteristics. A novel method and apparatus for further improving the IM characteristics of lossless feedback transistor amplifiers is presented, which in some instances provides the improvement without an increase in the power consumption. 
     Referring to FIG. 1, a lossless feedback transistor amplifier circuit  100  is shown in its most basic form. Here, a transformer  103 , having a turns ratio of 1:N:M, provides the feedback coupling from the collector to the emitter of a transistor  104 . An input signal voltage source  101  provides an input signal  102 , having an amplitude A and a frequency f s , which is coupled through the input winding (with turns designated 1) of transformer  103  to the emitter of transistor  104 . A collector current from transistor  104  is connected to one end of the output winding of transformer  103 , which is tapped and has a first turns ratio of N and a second turns ratio M, with respect to the input winding, the opposite end of which is connected to a common point, such as ground. An output signal voltage  106  is produced at the tap on the output winding of transformer  103  across the load resistance  107  (illustrated as a fixed resistance R L  for convenience), the opposite end of which is connected to the common point, or ground. It will of course be understood that in accordance with common practice input voltage source  101  and load resistance  107  represent any convenient input and output apparatus, respectively. 
     Briefly, the collector of transistor  104  sees a load resistance R C  equal to: 
     
       
           R   C =( N+M )× R   L   (1) 
       
     
     the input resistance R I  is:                R   I     =         N   +   M   +   1       M   2       ×     R   L               (   2   )                                
     and the power gain G is: 
       G=N+M+ 1  (3) 
     These relationships are dependent upon the emitter of transistor  104  appearing as a virtual ground, which is not true except in the approximation from which these relationships are derived. Instead, the emitter of transistor  104  has an input resistance, resulting in an emitter error voltage  105 , which is approximately described by:                R   e     =       r   e     +       r   bb         h   fe     +   1                 (   4   )                                
     where r bb  is the base spreading resistance and r e  is the nonlinear incremental emitter resistance of transistor  104 , the latter of which is described by:                r   e     =         V   BE       I   E       =       V   BE         I   O     ×            q                   V   BE         k                 T                       (   5   )                                
     where I E  is the emitter current, I O  is the saturation current, and V BE  is the base-emitter voltage of transistor  104 , the last of which is equal to −V 105 . This voltage constitutes an error voltage  105  at the emitter of transistor  104 , which can be detected and used to provide a correction signal for the common-base transistor, essentially reducing the emitter error voltage and reducing the non-linearity of the lossless feedback transistor amplifier. 
     Turning now to FIG. 2, a lossless feedback transistor amplifier circuit  200  in accordance with the present invention is illustrated. Circuit  200  includes an input signal voltage source  201 , supplying an input signal voltage  202 , having an amplitude A and a frequency f S , which is coupled through an input winding (with turns designated 1) of a transformer  203  to the emitter of a transistor  204 . An augmentation circuit including a voltage amplifier  206  has an input connected to the emitter of transistor  204  and an output connected to the base of transistor  204 . The collector of transistor  204  is connected to one end of an output winding of transformer  203 , which is tapped and has a first turns ratio of N and a second turns ratio M, with respect to the input winding, the opposite end of which is connected to a common point, such as ground. An output signal voltage  208  is produced at the tap on the output winding of transformer  203  across a load resistance  209  (illustrated as a fixed resistance R L  for convenience), the opposite end of which is connected to the common point, such as ground. Augmentation amplifier  206  has an inverting voltage gain factor of −A V , producing an amplified error voltage  207 , which is coupled to the base of transistor  204 . This voltage is described as: 
     
       
           V   207   −A   V   ×V   205   (6) 
       
     
     where V 205  is the emitter error voltage  205 . The resulting base-emitter voltage V BE  of transistor  204  becomes: 
     
       
           V   BE   =V   207   −V   205   =−A   V   ×V   205   −V   205   =−V   205 ×( A   V +1)  (7) 
       
     
     Substituting EQ. 7 into EQ. 5, we find that the apparent emitter resistance r e ′ becomes approximately:                r   e   ′     =         V   205       I   E       =         V   205         I   O     ×            q                   V   205     ×     (       A   V     +   1     )         k                 T             =       V   BE         (       A   V     +   1     )     ×     I   O     ×            q                   V   BE         k                 T                         (   8   )                                
     From inspection of EQ. 8 it is obvious that the apparent emitter resistance r e ′ is greatly reduced as the voltage gain A V  of augmentation amplifier  206  is increased, and therefore the emitter error voltage is decreased, which in turn reduces the nonlinearity of lossless feedback transistor amplifier  200 . Thus, the addition of augmentation amplifier  206  has caused the emitter terminal of transistor  204  to appear as a better approximation of a virtual ground, thus achieving the necessary condition discussed earlier for linearizing lossless feedback transistor amplifier  200 . 
     In some applications, particularly those at higher frequencies, the use of augmentation amplifier  206  as shown in FIG. 2 may be impractical. Referring specifically to FIG. 3, another embodiment of an augmented lossless feedback transistor amplifier in accordance with the present invention, designated  300 , is illustrated. Circuit  300  includes an input signal voltage source  301 , supplying an input voltage  302 , which is coupled through an input winding (with turns designated 1) of a transformer  303  to the emitter of a transistor  304 . An augmentation circuit including a common-emitter transistor amplifier  306  has a base connected to the emitter of transistor  304 , an emitter connected to a common point or ground, and a collector connected to the base of transistor  304 . The collector of transistor  304  is connected to one end of an output winding of transformer  303 , which is tapped and has a first turns ratio of N and a second turns ratio M, with respect to the input winding, the opposite end of which is connected to a common point, such as ground. An output signal voltage  308  is produced at the tap on the output winding of transfromer  303  across a load resistance  309  (illustrated as a fixed resistance R L  for convenience), the opposite end of which is connected to the common point, such as ground. In this case, an apparent emitter input current I E ′ is described as:                      I   E   ′     =       I   E1     +     I   B2                   =         I   B1     ×     (       h   fe1     +   1     )       +       I   B1       h   fe2                     =       (       h   fe1     +   1   +     1     h   fe2         )     ×     I   O2     ×            q                   V   305         k                 T                         (   9   )                                
     where h fe1  is the signal current gain of transistor  304 , h fe2  is the signal current gain of transistor  306 , I O2  is the saturation current of transistor  306 , and V 305  is the emitter error voltage  305 . Substituting EQ. 9 into EQ. 5, we find that the apparent emitter resistance r e ′ becomes approximately:                r   e   ′     =         V   305       I   E   ′       =       V   305         (       h   fe1     +   1   +     1     h   fe2         )     ×     I   O2     ×            q                   V   305         k                 T                       (   10   )                                
     which is a considerable reduction in the nonlinear emitter resistance r e  ′ of the common-base transistor  304 , and thus showing that the use of common emitter transistor amplifier  306  is a suitable alternative for an augmentation circuit. 
     For applications where IM performance requires higher gain from augmenting common-emitter transistor amplifier  306 , a positive feedback transistor amplifier circuit may be used. Referring specifically to FIG. 4, another embodiment of a lossless feedback transistor amplifier circuit in accordance with the present invention, designated  400 , is illustrated. Circuit  400  includes an input signal voltage source  401 , supplying an input voltage  402 , which is coupled through an input winding (with turns designated 1) of a transformer  403  to the emitter of a transistor  404 . The collector of transistor  404  is connected to one end of an output winding of transformer  403 , which is tapped and has a first turns ratio of N and a second turns ratio M, with respect to the input winding, the opposite end of which is connected to a common point, such as ground. An output signal voltage  410  is produced at the tap on the output winding of transformer  403  across a load resistance  411  (illustrated as a fixed resistance R L  for convenience), the opposite end of which is connected to a common point, such as ground. 
     An augmentation circuit includes a positive feedback, or regenerative, transistor amplifier which further includes a transistor  406  and a transformer  407 , the base of transistor  406  connected to the emitter of transistor  404  and the collector of transistor  406  connected to the base of transistor  404 . A primary winding of transformer  407  (with turns designated 1) has one end connected to the base of transistor  406  and the opposite end connected to a common point, such as ground. A secondary winding of transformer  407  (with turns ratio of K with respect to the primary winding) is connected, in reverse phase relative to the primary, between the emitter of transistor  406  and the common or ground, producing an emitter voltage  409  at the emitter of transistor  406 . Transformer  407  provides positive feedback for transistor  406 , thereby resulting in a positive feedback, or regenerative, amplifier for augmenting transistor  404 . Those familiar with the art will recognize that the positive feedback augmenting amplifier consisting of transistor  406  and transformer  407  is one of many positive feedback, or regenerative, amplifiers that can be used for augmenting the lossless feedback transistor amplifier  400 . 
     For applications at high frequencies where the noise figure (NF) of the lossless feedback transistor amplifier is a consideration, the use of a common-emitter augmentation amplifier (e.g.  306 ) or a positive feedback augmentation amplifier (e.g.  406  and  407 ) may be impractical as such circuits may introduce additional noise, thus degrading the NF of the lossless feedback transistor amplifier. For such applications, the use of a simple transformer can give sufficient voltage gain to provide augmentation. Referring specifically to FIG. 5, another embodiment of a lossless feedback transistor amplifier circuit in accordance with the present invention, designated  500 , is illustrated. Circuit  500  includes an input signal voltage source  501 , supplying an input voltage  502 , which is coupled through an input winding (with turns designated 1) of a transformer  503  to the emitter of a transistor  504 . The collector of transistor  504  is connected to one end of an output winding of transformer  503 , which is tapped and has a first turns ratio of N and a second turns ratio M, with respect to the input winding, the opposite end of which is connected to a common point, such as ground. An output signal voltage  508  is produced at the tap on the output winding of transformer  503  across a load resistance  509  (illustrated as a fixed resistance R L  for convenience), the opposite end of which is connected to a common point, such as ground. An augmentation circuit including a transformer  506  has a primary winding (with turns designated 1) connected between the emitter of transistor  504  and a common point, such as ground. A secondary winding of transformer  506  (with turns ratio of K with respect to the primary winding) is connected, in reverse phase relative to the primary, between the base of transistor  504  and the common point or ground, producing a base voltage  507 . The base-emitter voltage V BE , being the difference between the base voltage  507  and the emitter voltage  505 , and base current I B  of transistor  504  are, respectively: 
     
       
           V   BE   =V   507   −V   505   =−K×V   505   −V   505   =−V   505 ×( K+ 1)  (11) 
       
     
     
       
         
           
             
               
                 
                   
                     I 
                     B 
                   
                   = 
                   
                     
                       I 
                       E 
                     
                     
                       h 
                       fe 
                     
                   
                 
               
               
                 
                   ( 
                   12 
                   ) 
                 
               
             
           
         
                 
         
             
         
      
     
     which makes the apparent emitter input current I E ′ equal to:                  I   E   ′     =         I   E     -       K   ×     I   E         h   fe         =       I   E     ×     (     1   -     K     h   fe         )                           where             (   13   )                 I   E     =         I   O     ×            q                   (     1   +   K     )                     V   505         k                 T           =       I   O     ×       [            q                   V   505         k                 T         ]       (     1   +   K     )                   (   14   )                                
     which allows the apparent emitter resistance r e ′ to be approximated as:                      r   e   ′     =       V   505       I   E   ′                   =       V   505         (     1   -     K     h   fe         )     ×     I   O     ×            q                   (     K   +   1     )                     V   505         k                 T                         =       V   BE         (     K   +   1     )     ×     (     1   -     K     h   fe         )     ×     I   O     ×            q                   V   BE         k                 T                           (   15   )                                
     which, compared to EQ. 4, shows that the apparent emitter resistance r e  ′ decreases dramatically as the turns ratio K of transformer  506  is increased, showing that transformer  506  does provide augmentation of common-base transistor  504 , and in turn linearizes lossless feedback transistor amplifier  500 . 
     The use of augmentation in lossless feedback transistor amplifiers is not limited to single-ended applications. A complementary pair of augmented common-base transistor amplifiers, one using an NPN transistor and the other using a PNP transistor, can be used in applications requiring high degrees of linearity. Referring specifically to FIG. 6, a lossless feedback transistor amplifier circuit  600 , in accordance with the present invention, is illustrated. Circuit  600  includes an input signal voltage source  601 , supplying an input signal voltage  602 , which is connected to one terminal of an input winding (with turns designated 1) of a transformer  603 , the other terminal of which is connected to the emitter junctions of transistors  605  and  606 , transistor  605  being of the positive or PNP polarity, and transistor  606  being of the negative or NPN polarity. The collectors of transistors  605  and  606  are connected to one end of an output winding of transformer  603 , which is tapped and has a first turns ratio of N and a second turns ratio M, with respect to the input winding, the opposite end of which is connected to a common point, such as ground. An output signal voltage  611  is produced at the tap on the output winding of transformer  603  across a load resistance  612  (illustrated as a fixed resistance R L  for convenience), the opposite end of which is connected to the common point or ground. 
     A first augmentation circuit including a transformer  604  has a primary winding (with turns designated 1) connected between the emitter of transistor  605  and a common point such as ground. A secondary winding of transformer  604  (with turns ratio of K with respect to the primary winding) is connected, in reverse phase relative to the primary, between the base of transistor  605  and the common or ground, producing a base voltage  609  at the base of transistor  605 . A second augmentation circuit including a transformer  607  has a primary winding (with turns designated 1) connected between the emitter of transistor  606  and a common point such as ground. A secondary winding of transformer  607  (also with turns ratio of K with respect to the primary winding) is connected, in reverse phase relative to the primary, between the base of transistor  606  and the common or ground, producing a base voltage  610 , similar to the base voltage  609  at the base of transistor  605 . In this embodiment, PNP transistor  605  is augmented with transformer  604 , and the complementary NPN transistor  606  is augmented with transformer  607 , reducing the emitter voltage  608 , and thereby providing a high degree of linearity without impacting the NF of the lossless feedback transistor amplifier. Those familiar with the art will recognize that this application may employ any of the augmention methods described earlier. 
     Although detailed embodiments of the invention have been described, it should be appreciated that numerous modifications, variations, and adaptations may be made without departing from the scope of the invention as described in the claims. For example, the bipolar transistors shown in the embodiments may be alternatively replaced with field effect transistors. Further, while the terminals of the bipolar transistors described in the various embodiments are referred to as the emitter, base, and collector, it will be understood that these terminals will be the source, gate, and drain, respectively, when the transistors utilized are field effect transistors or other similar types and may be referred to as input, control, and output terminals, respectively, however the titles of the various components and terminals are only intended to enhance the understanding of the disclosure and are not intended to in any way limit the type of component utilized. In addition, it should be understood that the term “common-base transistor amplifier” used throughout this disclosure refers to a general type of amplifier and should not be limited in any way to prior concepts of common-base amplifiers.