Abstract:
A specific identification information management device coupled to a feature expansion device includes: a storage unit configured to store the specific identification information of the feature expansion device; a detection unit configured to detect access to the feature expansion device; and a control unit configured to transmit the specific identification information stored in the storage unit to the source of access to the feature expansion device when the access is detected by the detection unit.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application is a continuation application of International Application JP2009/001512 filed on Mar. 31, 2009 and designated the U.S., the entire contents of which are incorporated herein by reference. 
       FIELD 
       [0002]    The embodiments discussed herein are related to a specific identification information management device for managing the specific identification information about the feature expansion device loaded into an information processing device. 
       BACKGROUND 
       [0003]    One of the functions of the operating system (OS) is to confirm the configuration information about a device for which the OS is operated. The current information about the device (current device information) is compared with the preset information about the device (preset information) to confirm whether or not a matching result is obtained. If the current device information does not the preset information, for example, there is the possibility that the device cannot be activated or the device cannot be connected to a network. The configuration about the configuration information is intended for security, and unintended device replacement (for example, a theft etc.) can be checked by confirming the configuration information. 
         [0004]    The information about a device can be a media access control (MAC) address which is the specific identification information about a network interface card (NIC) as a feature expansion device for expanding a network function. 
         [0005]      FIGS. 1 through 8  illustrate the outline of the conventional MAC address managing method. 
         [0006]    A server  101  as an information processing device includes a partition  102 , a system management device (SMD)  103 , and a back plane (BP)  104 . 
         [0007]    An OS  105  is installed on the server  101 . 
         [0008]    The partition  102  includes an I/O unit (IOU)  106 - i  (i=1, 2). 
         [0009]    The IOU  106 - i  includes an I/O controller hub (ICH)  107 - i , the NIC  108 - i - j  (j=1, 2). 
         [0010]    The ICH  107  provides an interface such as a peripheral component interconnect (PCI) bus, a universal serial bus (USB), and a local area network (LAN), etc. 
         [0011]    The NIC  108  is a feature expansion card connected to a network for performing communications, and is connected to the ICH  107 . 
         [0012]    The SMD  103  is a device for managing the server  101 , and stores partition information. The partition information includes the MAC address of the NIC  108 . 
         [0013]    The BP  104  is a circuit substrate provided with a connector for connection of the IOU  106  and the SMD  103 . The IOU  106  and the SMD  103  are connected to the BP  104  to configure the server  101 . 
         [0014]    Described below is the flow of the management of the MAC address after the power-on of the partition  102 . 
         [0015]    After the power-on of the partition  102 , the SMD  103  reads the MAC address from the NIC  108  during the power-on sequence, and stores the address in the SMD  103  ( FIG. 1 ). 
         [0016]    After the boot of the OS  105 , the MAC address is set by the preset of the OS  105 . One of the functions of the OS  105  is to confirm the configuration information intended for security. During the operation, the OS  105  accesses the NIC  108 , reads a MAC address, and confirms the configuration information ( FIG. 2 ). 
         [0017]    When a hardware error occurs during the operation, and if it is an error of a NIC, then it is common to replace the NIC while continuing the operation ( FIG. 3 ). 
         [0018]    After the power-on of newly replacing hardware, the SMD  103  reads the MAC address from the new NIC  108 - 2 - 3  to update the partition information ( FIG. 4 ). 
         [0019]    The OS  105  accesses the new NIC  108 - 2 - 3  and reads the MAC address. Then, it compares the read MAC address with the preset MAC address. Since the read MAC address does not match the preset MAC address, for example, the server may be inoperative, or data cannot be transferred to the NIC ( FIG. 5 ). 
         [0020]    When the IOU  106  becomes faulty, it can be considered that the operation continues using a dynamic reconfiguration (DR) function ( FIG. 6 ). 
         [0021]    After the power-on of the newly replacing hardware, the SMD  103  reads the MAC address from the new NICs  108 - 3 - 1  and  108 - 3 - 2  to update the partition information ( FIG. 7 ). 
         [0022]    The OS  105  accesses the new NICs  108 - 3 - 1  and  108 - 3 - 2 , and reads the MAC address. Then, it compares the read MAC address with the preset MAC address. Since the read MAC address does not match the preset MAC address, for example, the server may be inoperative, or data cannot be transferred to the NIC ( FIG. 8 ). 
         [0023]    To avoid the situation above, it is necessary to reset the MAC address for the OS when hardware is replaced. 
         [0024]    As described above, when hardware is replaced due to a fault etc., the MAC address is changed. Therefore, an error can be indicated by the confirmation of the configuration information, thereby disabling the server to be used or the network to be accessed. 
         [0025]    Thus, there has been the problem that it is necessary to reset the configuration information for the OS. 
         [0026]    Also known is the technique of setting the physical address of the communication device before the replacement as the physical address of a new communication device after replacing the communication device with a new communication device.
   [Patent Document 1] Japanese Laid-open Patent Publication No. 2007-148978   
 
       SUMMARY 
       [0028]    According to an aspect of the invention, a specific identification information management device coupled to a feature expansion device, the specific identification information management device includes: a storage unit configured to store the specific identification information of the feature expansion device; a detection unit configured to detect access to the feature expansion device; and a control unit configured to transmit the specific identification information stored in the storage unit to the source of access to the feature expansion device when the access is detected by the detection unit. 
         [0029]    The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims. 
         [0030]    It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention, as claimed. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0031]      FIG. 1  illustrates the outline of the conventional MAC address managing method; 
           [0032]      FIG. 2  illustrates the outline of the conventional MAC address managing method; 
           [0033]      FIG. 3  illustrates the outline of the conventional MAC address managing method; 
           [0034]      FIG. 4  illustrates the outline of the conventional MAC address managing method; 
           [0035]      FIG. 5  illustrates the outline of the conventional MAC address managing method; 
           [0036]      FIG. 6  illustrates the outline of the conventional MAC address managing method; 
           [0037]      FIG. 7  illustrates the outline of the conventional MAC address managing method; 
           [0038]      FIG. 8  illustrates the outline of the conventional MAC address managing method; 
           [0039]      FIG. 9  illustrates the outline of the MAC address managing method according to the first embodiment; 
           [0040]      FIG. 10  illustrates the outline of the MAC address managing method according to the first embodiment; 
           [0041]      FIG. 11  illustrates the outline of the MAC address managing method according to the first embodiment; 
           [0042]      FIG. 12  illustrates the outline of the MAC address managing method according to the first embodiment; 
           [0043]      FIG. 13  illustrates the outline of the MAC address managing method according to the first embodiment; 
           [0044]      FIG. 14  illustrates the outline of the MAC address managing method according to the first embodiment; 
           [0045]      FIG. 15  illustrates the outline of the MAC address managing method according to the first embodiment; 
           [0046]      FIG. 16  is a configuration of the server according to the first and second embodiment; 
           [0047]      FIG. 17  is a configuration of the MAC address management device according to the first embodiment; 
           [0048]      FIG. 18  is a flowchart of the operation of the system management device at power-on according to the first embodiment; 
           [0049]      FIG. 19  is a detailed flowchart of reading a MAC address; 
           [0050]      FIG. 20  is a flowchart of the system management device according to the first embodiment when a device is replaced; 
           [0051]      FIG. 21  is a flowchart of the operation of the access detection unit according to the first embodiment; 
           [0052]      FIG. 22  is a flowchart of the operation of the memory control unit according to the first embodiment; 
           [0053]      FIG. 23  is a flowchart of the operation of the memory unit according to the first embodiment; 
           [0054]      FIG. 24  is a flowchart of the operation of the bus control unit according to the first embodiment; 
           [0055]      FIG. 25  is a flowchart of the operations of the system management device and the MAC address management device when a new MAC address is used; 
           [0056]      FIG. 26A  is a flowchart of the operation of the system management device and the MAC address management device according to the first embodiment; 
           [0057]      FIG. 26B  is a flowchart of the operation of the system management device and the MAC address management device according to the first embodiment; 
           [0058]      FIG. 27A  is a flowchart of the operation of the system management device and the MAC address management device according to the second embodiment; 
           [0059]      FIG. 27B  is a flowchart of the operation of the system management device and the MAC address management device according to the second embodiment; 
           [0060]      FIG. 28  is a configuration of the server according to the third embodiment; 
           [0061]      FIG. 29  is a configuration of the server according to the fourth embodiment; and 
           [0062]      FIG. 30  illustrates the outline of the data transfer between the NIC and the OS. 
       
    
    
     DESCRIPTION OF EMBODIMENTS 
       [0063]    The embodiment of the present invention is described below with reference to the attached drawings. 
         [0064]      FIGS. 9 through 15  illustrate the outline of the MAC address managing method according to the first embodiment. 
         [0065]    A server  201  as an information processing device includes a partition  202 , a system management device (SMD)  203 , and a back plane (BP)  204 . 
         [0066]    An OS  205  is installed on the server  201 . 
         [0067]    The partition  202  includes an IOU  206 - i  (i=1, 2). 
         [0068]    The IOU  206 - i  includes an ICH  207 - i , a NIC  208 - i - j  (j=1, 2), and a MAC address management device (MMD)  209 - i . The ICH  207  provides an interface such as a PCI bus, a USB, a LAN, etc. 
         [0069]    The NIC  208  is an expansion card connected to a network for performing communications, and is connected to the ICH  207 . 
         [0070]    A MAC address management device  209  holds a MAC address, and transmits the held MAC address to the OS  105  in response to the access of the OS  205  to the NIC  208 . 
         [0071]    The system management device  203  is a device for managing the server  201 , and stored partition information. The partition information includes the MAC address of the NIC  208 . 
         [0072]    The BP  204  is a circuit substrate provided with a connector for connection of the IOU  206 , the system management device  203 , etc. The IOU  206  and the system management device  203  are connected to the BP  204 , and configure the server  201 . 
         [0073]    Described below is the procedure from the power-on. 
         [0074]    After the power-on of a partition, the system management device  203  reads the MAC address from the NIC  208  to hold the partition information during the power-on sequence as the activating sequence at power-on. Then, the system management device  203  writes the read MAC address to the MAC address management device  209  ( FIG. 9 ). 
         [0075]    After the boot of the OS  205 , a MAC address is set when the OS  205  performs the preset. During the operation, the OS  205  accesses the NIC  208  to read the MAC address, but the MAC address management device  209  detects the access and notifies the OS  105  of the MAC address held by the MAC address management device  209  ( FIG. 10 ). 
         [0076]    When a hardware error occurs during the operation, and if the error is a fault of the NIC  208 , it is common to replace the NIC while continuing the operation. In this example, it is assumed that a NIC  208 - 2 - 1  has become faulty, and is replaced with a NIC  208 - 2 - 3  ( FIG. 11 ). 
         [0077]    In response to the access from the OS  205  to the new NIC  208 - 2 - 3  for a read of the MAC address after the replacement of the faulty NIC  208 - 2 - 1 , the MAC address management device  209 - 2  notifies the OS  205  of the MAC address of the NIC  208 - 2 - 1  held in the MAC address management device  209 - 2 . Therefore, the OS is not conscious of the replacement of the NIC  208 - 2 - 1 . Accordingly, it is not necessary to reset the OS ( FIG. 12 ). 
         [0078]    When the hardware error during the operation refers to the IOU, it can be considered to continue to the operation using the DR function. In this example, it is assumed that a IOU  206 - 2  has become faulty and has been replaced with a IOU  206 - 3  ( FIG. 13 ). 
         [0079]    The IOU  206 - 3  includes a ICH  207 - 3 , NICs  208 - 3 - 1  and  208 - 3 - 2 , and a MAC address management device  209 - 3 . 
         [0080]    After the power-on of the replacing IOU  206 - 3 , the system management device  203  writes the held MAC address to the MAC address management device  209 - 3  of the IOU  206 - 3  ( FIG. 14 ). 
         [0081]    After the replacement of the faulty IOU  206 - 2 , the MAC address of the NIC  208 - 2 - 1  and  208 - 2 - 2  held in the MAC address management device  209 - 3  is notified to the OS  205  in response to the access from the OS  205  to the NICs  208 - 3 - 1  and  208 - 3 - 2 . Therefore, the OS  205  is not conscious of the replacement of the IOU  206 - 2  and the NIC  208 - 2 - 1  and  208 - 2 - 2 . Accordingly, it is not necessary to reset the OS  205  ( FIG. 15 ). 
         [0082]    As described above, it is not necessary to reset the MAC address. 
         [0083]      FIG. 16  is a configuration of the server according to the first embodiment. 
         [0084]    The server  201  includes the partition  202 , the system management device (SMD)  203 , and the back plane (BP)  204 . 
         [0085]    Furthermore, the OS  205  is installed on the server  201 . 
         [0086]    The partition  202  includes the IOU  206 - i  (i=1, 2) and a system board unit (SBU)  210 - i.    
         [0087]    The IOU  206 - i  includes the ICH  207 - i , the NIC  208 - i - j  (j=1, 2), and the MAC address management device  209 - i.    
         [0088]    The SBU  210 - i  includes a central processing unit (CPU)  211 - i , memory  212 - i - j , and a memory controller hub (MCH)  213 - i.    
         [0089]    The CPU  211  performs various processes. 
         [0090]    Memory  212  is a storage device for temporarily storing data processed by the CPU  211  etc. 
         [0091]    The MCH  213  controls the memory  212 . 
         [0092]      FIG. 17  is a detailed configuration of the MAC address management device. 
         [0093]    The MAC address management device  209  includes an access detection unit (MEM_DCT)  221 , memory control unit (MMD_MCT)  222 , memory unit (MMD_MEM)  223 , and a bus control unit (MMD_BCT)  224 . 
         [0094]    In  FIG. 17 , the arrow indicated by the solid lines illustrates the flow of data, and the arrow indicated by the dotted lines illustrates the flow of a control signal. 
         [0095]    The access detection unit  221  monitors a bus and detects the access to the NIC. 
         [0096]    The access detection unit  221  confirms the data hold state by a flag register (MAC_FLG) in the access detection unit  221 . 
         [0097]    The access detection unit  221  monitors a bus using the MAC detection data (MAC_REG) in the access detection unit  221 . 
         [0098]    The access detection unit  221  performs nothing in the MAC address non-hold state. 
         [0099]    The access detection unit  221  outputs control signals  2   a  and  2   b  to the bus control unit  224  and the memory control unit  222  in the MAC address hold state. 
         [0100]    The memory control unit  222  control a read and a write to the memory unit  223  according to the control signal. 
         [0101]    The memory control unit  222  stores an instruction  3  received from the system management device  203  in a control register (CNT_REG), and performs the following process based on the instruction contents. When the instruction contents refer to a write of a MAC address, the memory control unit  222  also receives a MAC address  11  to be written to the memory unit  223 . 
         [0102]    Instruction to Write a MAC Address 
         [0103]    When the instruction contents refer to a write of a MAC address, the memory control unit  222  transmits write data (MAC address)  4  and a write control signal  5  to the memory unit  223 . Simultaneously, the memory control unit  222  outputs an instruction  6  to set the MAC detection data (MAC_REG) and the flag register (MAC_FLG) of the access detection unit  221 . Thus, the MAC address management device  209  enters the MAC address hold state. 
         [0104]    Instruction to Clear a MAC Address 
         [0105]    When the instruction contents refer to clear of a MAC address, the memory control unit  222  outputs an instruction  6  to reset the flag register (MAC_FLG) of the access detection unit  221 . Since the MAC address management device  209  determines the hold and the non-hold states of the MAC address by the status of the flag register, the MAC address non-hold state can be set by resetting the flag register without clearing the data of the memory unit  223 . 
         [0106]    Thus, the MAC address management device  209  enters the MAC address non-hold state. 
         [0107]    In addition, when the control signal  2   b  from the access detection unit  221  indicates the enable state (access-to-NIC detected state), the memory control unit  222  transmits a read control signal  7   a  to the memory unit  223 , and simultaneously transmits a read control signal  7   b  to the bus control unit  224 . 
         [0108]    The memory unit  223  stores an MAC address, and writes and reads data (MAC address) according to a control signal. 
         [0109]    The memory unit  223  holds the write data  4  according to the write control signal  5 . 
         [0110]    The memory unit  223  transmits held data  8  to the bus control unit  224  according to the read control signal  7   a.    
         [0111]    The bus control unit  224  cuts off a bus or transmits data to the bus according to a control signal. 
         [0112]    When the control signal  2   a  refers to the disable state (normal state), the bus control unit  224  does not control the bus, but allows access  9  to pass. 
         [0113]    The bus control unit  224  cuts off the bus when the control signal  2   a  refers to the enable state (access-to-NIC detected state). 
         [0114]    When the control signal  7   b  refers to the disable state (normal state), the bus control unit  224  does not control the bus, but allows data  10  to pass. 
         [0115]    When the control signal  7   b  refers to the enable state (data read state), the bus control unit  224  transmits the held data  8  from the memory unit  223  to the bus. 
         [0116]      FIG. 18  is a flowchart of the operation of the system management device at power-on according to the first embodiment. 
         [0117]    In step S 301 , the system management device  203  reads the MAC addresses of all devices (NIC in the present embodiment) in the partition  202 . The detailed process of the MAC address reading process is described later. 
         [0118]    In step S 302 , the system management device  203  outputs to the MAC address management device  209  the read MAC address and the write instruction of the MAC address. Thus, the MAC address is set in the MAC address management device  209 . 
         [0119]    In step S 303 , the system management device  203  holds the MAC address written to the MAC address management device  209  in the system management device  203  as partition information. 
         [0120]      FIG. 19  is a detailed flowchart of the MAC address reading process (step S 301 ). 
         [0121]    The system management device  203  has a database including a device ID, a vendor ID indicating the manufacturer of the NIC, and a MAC address with their storage locations associated with one another. 
         [0122]    In step S 311 , the system management device  203  reads the configuration space of the target device (NIC) and acquires the device ID and the vendor ID of the target device. 
         [0123]    In step S 312 , the system management device  203  searches a database based on the acquired device ID and vendor ID. When the acquired device ID and vendor ID are detected from the database, control is passed to step S 313 . If they have not been detected, control is passed to step S 314 . 
         [0124]    In step S 313 , the system management device  203  can obtain the storage location of the MAC address corresponding to the acquired device ID and vendor ID from the database, and reads the MAC address from the storage location of the MAC address. 
         [0125]    In step S 314 , since the target device is a device not supported yet, the system management device  203  performs error processing. 
         [0126]    Described next is the processing of the system management device  203  at the replacement of a device. 
         [0127]      FIG. 20  is a flowchart of the system management device when a device is replaced. 
         [0128]    In step S 321 , the system management device  203  determines whether or not the MAC address held by the MAC address management device  209  is to be cleared. When it is to be cleared, control is passed to step S 322 . If it is not to be cleared, control is passed to step S 323 . 
         [0129]    In step S 322 , the system management device  203  outputs an instruction to clear the MAC address held by the MAC address management device  209  to the MAC address management device  209 . 
         [0130]    In step S 323 , it is determined whether or not a MAC address is to be set in the MAC address management device  209 . If it is to be set, control is passed to step S 324 . If not, the process terminates. 
         [0131]    In step S 324 , the system management device  203  determines whether or not an arbitrary MAC address is to be set in the MAC address management device  209 . If the arbitrary MAC address is to be set, control is passed to step S 325 . If a specific MAC address is to be set, control is passed to step S 326 . 
         [0132]    In step S 325 , the system management device  203  outputs to the MAC address management device  209  an instruction to write an arbitrary MAC address to the MAC address management device  209 . 
         [0133]    In step S 326 , the system management device  203  determines whether or not the MAC address is held in the system management device  203 . If it is held, control is passed to step S 327 . If it has not been held yet, control is passed to step S 329 . 
         [0134]    In step S 327 , the system management device  203  determines whether or not the held MAC address is to be used. If the held MAC address is to be used, control is passed to step S 328 . If it is not to be used, control is passed to step S 329 . 
         [0135]    In step S 328 , the system management device  203  outputs to the MAC address management device  209  a held MAC address and an instruction to write the MAC address. Thus, the MAC address held by the system management device  203  is stored in the MAC address management device  209 . 
         [0136]    In step S 329 , the system management device  203  reads the MAC addresses of all devices (NIC in the present embodiment) having the MAC addresses in the partition. The MAC address reading process is described above with reference to  FIG. 19 . 
         [0137]    In step S 330 , the system management device  203  outputs the read MAC address and an instruction to write the MAC address to the MAC address management device  209 . Thus, the MAC address is set in the MAC address management device  209 . 
         [0138]    In step S 331 , the system management device  203  holds the MAC address written to the MAC address management device  209  as the partition information in the system management device  203 . 
         [0139]    Described next is the process on each unit of the MAC address management device. 
         [0140]      FIG. 21  is a flowchart of the operation of the access detection unit according to the first embodiment. 
         [0141]    In step S 401 , the access detection unit  221  determines whether or not the MAC address of the target NIC is held with reference to a flag register. When the MAC address is held, control is passed to step S 402 . If the MAC address has not been held, control is returned to the start. 
         [0142]    In step S 402 , the access detection unit  221  monitors the access to the NIC using the MAC detection data (MAC_REG). When the access to the NIC is detected, control is passed to step S 403 . If it has not been detected, control is returned to the start. 
         [0143]    In step S 403 , the access detection unit  221  notifies the memory control unit  222  and the bus control unit  224  that the access to the NIC has been detected. 
         [0144]      FIG. 22  is a flowchart of the operation of the memory control unit according to the first embodiment. 
         [0145]    In step S 411 , the memory control unit  222  determines whether or not an instruction from the system management device  203  has been detected. When the instruction is detected, control is passed to step S 412 . If the instruction has not been detected, control is passed to step S 415 . 
         [0146]    In step S 412 , the memory control unit  222  determines whether the instruction from the system management device  203  refers to setting a MAC address or clearing the MAC address. When the MAC address is to be set, control is passed to step S 413 . If the setting of the MAC address is to be cleared, control is passed to step S 414 . 
         [0147]    In step S 413 , the memory control unit  222  stores an instruction received from the system management device  203  in the control register, and outputs write data and a control signal to the memory unit  223 . Furthermore, it outputs MAC detection data and an instruction to set a flag register to the access detection unit  221 . 
         [0148]    In step S 414 , the memory control unit  222  stores the instruction received from the system management device  203  in the control register, and outputs an instruction to reset the flag register to the access detection unit  221 . 
         [0149]    In step S 415 , the memory control unit  222  determines whether the control signal from the access detection unit  221  is “enable” or “disable”. If it refers to “enable”, control is passed to step S 416 . If it refers to “disable”, the process terminates. 
         [0150]    In step S 416 , the memory control unit  222  outputs a read control signal to the memory unit  223 , and outputs the read control signal to the bus control unit  224 . 
         [0151]      FIG. 23  is a flowchart of the operation of the memory unit according to the first embodiment. 
         [0152]    In step S 421 , the memory unit  223  determines whether the write control signal from the memory control unit  222  is “enable” or “disable”. If it refers to “enable”, control is passed to step S 422 . If it refers to “disable”, control is passed to step S 423 . 
         [0153]    In step S 422 , the memory unit  223  writes the write data from the memory control unit  222  to the memory unit  223 . 
         [0154]    In step S 423 , the memory unit  223  determines whether the read control signal from the memory control unit  222  is “enable” or “disable”. If it refers to “enable”, control is passed to step S 424 . If it refers to “disable”, the process terminates. 
         [0155]    In step S 424 , the memory unit  223  outputs a read data to the bus control unit  224 . 
         [0156]      FIG. 24  is a flowchart of the operation of the bus control unit according to the first embodiment. 
         [0157]    In step S 431 , the bus control unit  224  determines whether or not the access detection unit  221  has detected the access to the NIC. The determination as to the access has been detected is made by determining whether the control signal from the access detection unit  221  is “enable” or “disable”. When the access is detected, control is passed to step S 432 . If it has not been detected, control is passed to step S 433 . 
         [0158]    In step S 432 , the bus control unit  224  cuts off the access from the OS to the device (NIC). 
         [0159]    In step S 433 , the bus control unit  224  determines whether the read control signal is “enable” or “disable”. If it is “enable”, control is passed to step S 434 . If it is “disable”, control is passed to step S 435 . 
         [0160]    In step S 434 , the bus control unit  224  transmits the data (held MAC address) from the memory unit  223  to the bus. 
         [0161]    In step S 435 , the bus control unit  224  does not control the bus. 
         [0162]    Described next is the case in which a new MAC address is used after replacing the NIC. 
         [0163]    The MAC address management device  209  has the function of clearing the held MAC address. The MAC address can be cleared by the instruction from an external unit (system management device  203  etc.). When the MAC address management device  209  does not hold the MAC address, the NIC is directly accessed. Therefore, the MAC address of a new NIC is available. 
         [0164]      FIG. 25  is a flowchart of the operations of the system management device  203  and the MAC address management device when a new MAC address is used. 
         [0165]    In step S 501 , the system management device  203  outputs to the MAC address management device  209  an instruction to clear the MAC address held by the MAC address management device  209 . 
         [0166]    In step S 502 , the memory control unit  222  starts the process. 
         [0167]    In step S 503 , the memory control unit  222  determines whether or not an instruction from the system management device  203  has been detected (corresponding to step S 411 ). Since the instruction is detected, control is passed to step S 504 . 
         [0168]    In step S 504 , the memory control unit  222  determines whether the instruction from the system management device  203  refers to setting a MAC address or clearing the MAC address (corresponding to step S 412 ). Since the instruction refers to clearing the MAC address, control is passed to step S 505 . 
         [0169]    In step S 505 , the memory control unit  222  stores an instruction received from the system management device  203  in a control register, and outputs an instruction to reset a flag register to the access detection unit  221  (corresponding to step S 414 ). Thus, the MAC address management device  209  enters the MAC address non-hold state in which a MAC address is not held. 
         [0170]    In step S 506 , the process of the access detection unit  221  is started. 
         [0171]    In step S 507 , the access detection unit  221  receives the instruction in step S 505 , and resets the flag register, thereby entering the MAC address non-hold state. 
         [0172]    In step S 508 , the access detection unit  221  refers to a flag register, and determines whether or not the MAC address of the target NIC is held (corresponding to step S 401 ). As described above, the flag register has been reset, and the MAC address non-hold state has been entered. Therefore, control is passed to step S 509 . 
         [0173]    In step S 509 , the access detection unit  221  does not perform a specific process on the access from the OS to the NIC. 
         [0174]    Thus, since the MAC address management device  209  performs nothing on the access from the OS to the NIC, a MAC address is read from a new NIC. 
         [0175]    Therefore, the MAC address of a new NIC is used. 
         [0176]    In the first embodiment, an actual MAC address of the NIC is used. 
         [0177]    Described below is the flow of the process in the first embodiment from the power-on to the notification to the OS of the MAC address in the MAC address management device. 
         [0178]      FIGS. 26A and 26B  are flowcharts of the operations of the system management device and the MAC address management device according to the first embodiment. 
         [0179]    In the database, the device ID, the vendor ID, and the storage locations of the MAC address on the NIC in the partition are associated with one another and recorded. 
         [0180]    In step S 511 , the system management device  203  starts the process (corresponding to  FIGS. 19 and 20 ). 
         [0181]    In step S 512 , the system management device  203  reads the MAC addresses of all devices (NIC in the present embodiment) having the MAC addresses in the partition (corresponding to step S 301 ). 
         [0182]    In step S 513 , the system management device  203  reads the configuration space of the target device (NIC) and acquires the device ID and the vendor ID of the target device (corresponding to step S 311 ). 
         [0183]    In step S 514 , the system management device  203  searches a database based on the acquired device ID and vendor ID (corresponding to step S 312 ). Then, the corresponding device ID and vendor ID are detected, and control is passed to step S 515 . 
         [0184]    In step S 515 , the system management device  203  can obtain the storage location of the MAC address of the device corresponding to the acquired device ID and vendor ID from the database, and reads the MAC address from the storage location of the MAC address (corresponding to step S 313 ). 
         [0185]    In step S 516 , the system management device  203  outputs to the MAC address management device  209  the read MAC address and an instruction to write the MAC address. Thus, the setting of the MAC address in the MAC address management device  209  is started (corresponding to step S 302 ). 
         [0186]    In step S 517 , the memory control unit  222  starts the process (corresponding to  FIG. 23 ). 
         [0187]    In step S 518 , the memory control unit  222  determines whether or not the write instruction from the system management device  203  has been detected. Since the write instruction is issued in step S 516 , the write instruction is detected and control is passed to step S 519  (corresponding to step S 411 ). 
         [0188]    In step S 519 , the memory control unit  222  determines whether the instruction from the system management device  203  refers to setting a MAC address or clearing the MAC address. Since the instruction issued in step S 516  is to write the MAC address, the unit determines to set the address, and control is passed to step S 520  (corresponding to step S 412 ). 
         [0189]    In step S 520 , the memory control unit  222  stores an instruction received from the system management device  203  in the control register, and outputs write data and a control signal to the memory unit. Furthermore, it outputs MAC detection data and an instruction to set a flag register to the access detection unit  221  (corresponding to step S 413 ). Thus, the MAC address hold state is entered. 
         [0190]    In step S 521 , the memory unit starts the process (corresponding to  FIG. 24 ). 
         [0191]    In step S 522 , the memory unit writes the write data (MAC address) from the memory control unit  222  (corresponding to step S 422 ). 
         [0192]    In step S 523 , the access detection unit  221  starts the process (corresponding to  FIG. 22 ). 
         [0193]    In step S 524 , the MAC detection data and the flag register are set in the access detection unit  221 , and the MAC address hold state is entered. 
         [0194]    In step S 525 , the access detection unit  221  determines whether or not the MAC address of the target NIC is held with reference to a flag register. Since the hold state is entered as described above in step S 520 , control is passed to step S 526  (corresponding to step S 401 ). 
         [0195]    In step S 526 , the access detection unit  221  monitors the access to the NIC using the MAC detection data (MAC_REG). When the access to the NIC is detected, control is passed to step S 527 . If it has not been detected, control is returned to S 525  (corresponding to step S 402 ). 
         [0196]    In step S 527 , the access detection unit  221  notifies the memory control unit  222  and the bus control unit  224  that the access to the NIC has been detected (corresponding to step S 403 ). In addition, the memory control unit  222  issues a read instruction to the memory unit, and outputs a read signal to the bus control unit. 
         [0197]    In step S 528 , the bus control unit starts the process (corresponding to  FIG. 25 ). 
         [0198]    In step S 529 , the bus control unit determines whether the read control signal is “enable” or “disable”. As described above in step S 527 , since the read signal is “enable”, control is passed to step S 530  (corresponding to step S 433 ) 
         [0199]    In step S 530 , the bus control unit transmits the data (held MAC address) from the memory unit to the bus (corresponding to step S 434 ). 
         [0200]    As described above, in response to the access from the OS to the NIC, the MAC address held by the MAC address management device is reported. 
         [0201]    According to the MAC address management device in the first embodiment, when the NIC is replaced, and when the access from the OS to the new NIC is detected, the OS is notified of the MAC address in the NIC before the replacement. Therefore, an information non-matching problem does not occur during the confirmation of the configuration information. Therefore, it is not necessary to preset the OS when the NIC is replaced, thereby improving the maintainability. 
       Second Embodiment 
       [0202]    In the first embodiment, the MAC address set in the MAC address management device is an actual MAC address stored in the NIC. However, in the second embodiment, the MAC address set in the MAC address management device is a virtual MAC address. 
         [0203]    Described below is the flow of the process according to the second embodiment from the power-on to the notification to the OS of the virtual MAC address in the MAC address management device. 
         [0204]    The configuration of the server according to the second embodiment is similar to the server according to the first embodiment illustrated in  FIG. 16 . 
         [0205]      FIGS. 27A and 27B  are flowcharts of the operations of the system management device and the MAC address management device according to the second embodiment. 
         [0206]    In step S 601 , the system management device  203  starts the process. 
         [0207]    In step S 602 , the system management device  203  starts the process of acquiring the storage location of the MAC address of each device in the partition  202 . 
         [0208]    In step S 603 , the system management device  203  reads the configuration space of the target device (NIC according to the present embodiment), and acquires the device ID and vendor ID of the target device. 
         [0209]    In step S 604 , the system management device  203  searches the database using the acquired device ID and vendor ID as retrieval keys. Then, the corresponding device ID and vendor ID are retrieved, and control is passed to step S 605 . 
         [0210]    In step S 605 , the system management device  203  can obtain the storage location of the MAC address of the device corresponding to the retrieved device ID and vendor ID from the database, and sets the storage location of the MAC address in the MAC address management device  209 . It is used to detect the access to the NIC. 
         [0211]    In step S 606 , the system management device  203  outputs to the MAC address management device  209  the virtual MAC address and an instruction to write the MAC address. Thus, the virtual MAC address is set in the MAC address management device  209 . The virtual address is assigned in advance to a server, and is held by the firmware in the system management device  203 . 
         [0212]    In step S 607 , the memory control unit  222  starts the process. 
         [0213]    In step S 608 , the memory control unit  222  determines whether or not the write instruction from the system management device  203  has been detected. Since the write instruction is output in step S 606 , the write instruction is detected and control is passed to step S 609 . 
         [0214]    In step S 609 , the memory control unit  222  determines whether the instruction from the system management device  203  refers to setting a MAC address or clearing the MAC address. Since the instruction issued in step S 606  is to write the MAC address, the unit determines to set the address, and control is passed to step S 610 . 
         [0215]    In step S 610 , the memory control unit  222  stores an instruction received from the system management device  203  in the control register, and outputs write data and a control signal to the memory unit. Furthermore, it outputs MAC detection data and an instruction to set a flag register to the access detection unit  221 . Thus, the MAC address hold state is entered. 
         [0216]    In step S 611 , the memory unit starts the process. 
         [0217]    In step S 612 , the memory unit writes the write data (MAC address) from the memory control unit  222  to the memory unit. 
         [0218]    In step S 613 , the access detection unit  221  starts the process. 
         [0219]    In step S 614 , the MAC detection data and the flag register are set in the access detection unit  221 , and the MAC address hold state is entered. 
         [0220]    In step S 615 , the access detection unit  221  determines whether or not the MAC address of the target NIC is held with reference to a flag register. Since the hold state is entered as described above in step S 610 , control is passed to step S 616 . 
         [0221]    In step S 616 , the access detection unit  221  monitors the access to the NIC using the MAC detection data (MAC_REG). When the access to the NIC is detected, control is passed to step S 617 . If it has not been detected, control is returned to S 615 . 
         [0222]    In step S 617 , the access detection unit  221  notifies the memory control unit  222  and the bus control unit  224  that the access to the NIC has been detected. In addition, the memory control unit  222  issues a read instruction to the memory unit, and outputs a read signal to the bus control unit. 
         [0223]    In step S 618 , the bus control unit starts the process. 
         [0224]    In step S 619 , the bus control unit determines whether the read control signal is “enable” or “disable”. As described above in step S 617 , since the read signal is “enable”, control is passed to step S 620 . 
         [0225]    In step S 620 , the bus control unit transmits the data (held MAC address) from the memory unit to the bus. 
         [0226]    As described above, in response to the access from the OS to the NIC, the MAC address held by the MAC address management device  209  is reported. 
         [0227]    According to the MAC address management device in the second embodiment, when the NIC is replaced, and when the access from the OS to the new NIC is detected, the OS is notified of the MAC address in the NIC before the replacement. Therefore, an information non-matching problem does not occur during the confirmation of the configuration information. Therefore, it is not necessary to preset the OS when the NIC is replaced, thereby improving the maintainability. 
         [0228]    In addition, by using the MAC address allocated in advance to a server without using the intrinsic MAC address for the NIC, the MAC address can be prevented from being changed by replacing a faulty hardware. 
         [0229]    In addition, when faulty hardware is repaired and reused, the MAC address is not double used, thereby realizing easier management. 
       Third Embodiment 
       [0230]    The configuration without a system management device is described below as the third embodiment. 
         [0231]      FIG. 28  is a configuration of the server according to the third embodiment. 
         [0232]    A server  701  includes a partition  702  and a BP  704 . 
         [0233]    The partition  702  includes an IOU  706 - i  (i=1, 2) and an SBU  710 - i.    
         [0234]    The IOU  706 - i  includes an ICH  707 - i , a NIC  708 - i - k  (k=1 through 3), a MAC address management device  709 - i , and a baseboard management device (BMC)  714 - i.    
         [0235]    A baseboard management device (BMC) controls each device on a board substrate loaded into the device. In this example, it controls an ICH  707 , a NIC  708 , a MAC address management device (MMD)  709 , etc. provided for an IOU  706 . 
         [0236]    The SBU  710 - i  includes a CPU  711 - i , memory  712 - i , and an MCH  713 - i.    
         [0237]    A CPU  711  performs various processes. 
         [0238]    Memory  712  is a storage device for temporarily storing data to be processed by the CPU  711  etc. 
         [0239]    An MCH  713  controls the memory  712 . 
         [0240]    In the third embodiment, the partition information held by the system management device in the first embodiment is held by a baseboard management device  714 - 1  of an IOU  706 - 1  as a Home IOU. The Home IOU selects any IOU in the partition to determine which baseboard management device in the partition is to manage the partition, and sets it as the Home IOU. In this example, the IOU  706 - 1  is set as the Home IOU. 
         [0241]    A baseboard management device  714  includes the firmware for management of the partition  702 , and the firmware operates each MAC address management device  709 - i  in the partition  702 . That is, the baseboard management device  714  performs processes similar to those of the system management device in the first embodiment. 
         [0242]    Furthermore, as an operation to be performed when the Home IOU is replaced due to a fault, a synchronizing process is performed on the baseboard management device  714  of each IOU  706  in the partition  702 . It means that the same information is held in each baseboard management device  714 . Thus, if there is any IOU  706  loaded with the baseboard management device  714  available in the partition, the reproduction can be realized in case a plurality of units become faulty. The process for this method can be implemented in the firmware in the BMC. 
         [0243]    According to the MAC address management device in the third embodiment, when the NIC is replaced, and when the access from the OS to the new NIC is detected, the OS is notified of the MAC address in the NIC before the replacement. Therefore, an information non-matching problem does not occur during the confirmation of the configuration information. Therefore, it is not necessary to preset the OS when the NIC is replaced, thereby improving the maintainability. 
         [0244]    In addition by each IOU  706  holding the baseboard management device and performing the synchronizing process, the reproduction can be realized in case a plurality of units become faulty if any IOU  706  is available. 
       Fourth Embodiment 
       [0245]    Described below is the fourth embodiment having no system management device and no baseboard management device in the IOU. 
         [0246]      FIG. 29  is a configuration of the server according to the fourth embodiment. 
         [0247]    A server  801  includes a partition  802  and a BP  804 . 
         [0248]    The partition  802  includes an IOU  806 - i  (i=1, 2) and an SBU  810 - i.    
         [0249]    The IOU  806 - i  includes a PCIe switch  807 - i , a NIC  808 - i - k  (k=1 through 3), a MAC address management device (MMD)  809 - i.    
         [0250]    The SBU  810 - i  includes a CPU  811 - i , memory  812 - i , an ICH  813 - i , a baseboard management device (BMC)  814 - i , a MAC address management device (MMD)  815 - i , and a NIC  816 - i.    
         [0251]    In this example, a baseboard management device (BMC)  814  controls a CPU  811 , an ICH  813 , a MAC address management device (MMD)  815 , a NIC  816 , etc. 
         [0252]    The CPU  811  performs various processes. 
         [0253]    Memory  812  is a storage device for temporarily storing data processed by the CPU  811  etc. 
         [0254]    The ICH  813  controls the IOU  806 . 
         [0255]    In the fourth embodiment, the baseboard management device  814  for managing the partition  802  is located in the SBU  810 . With the configuration, since the NIC  816  is also included in the SBU  810 , the MAC address management device  815  is also loaded into the SBU  810 . 
         [0256]    In this case, a baseboard management device  814 - 1  in an SBU  810 - 1  as a Home SBU holds the partition information, thereby managing the partition  802 . That is, the baseboard management device  814 - 1  performs the process similar to the process of the system management device according to the first embodiment. The Home SBU is set in an SBU in the partition to determine which baseboard management device in the partition is to manage the partition. In this example, the SBU  810 - 1  is the Home SBU. 
         [0257]    As in the third embodiment, the firmware in the baseboard management device  814  operates each of the MAC address management devices  809  and  815 . Similarly, the synchronizing process is performed on each baseboard management device  814  in the partition  802 , thereby faulty device can be successfully replaced. 
         [0258]    According to the MAC address management device in the fourth embodiment, when the NIC is replaced, and when the access from the OS to the new NIC is detected, the OS is notified of the MAC address in the NIC before the replacement. Therefore, an information non-matching problem does not occur during the confirmation of the configuration information. Therefore, it is not necessary to preset the OS when the NIC is replaced, thereby improving the maintainability. 
         [0259]    In addition, each SBU  810  holds a baseboard management device to perform the synchronizing process, thereby successfully replacing a faulty device by realizing the reproduction by any SBU  810  available. 
         [0260]    Described below as complementary explanation is the outline of the method of accessing the NIC and transmitting data. 
         [0261]      FIG. 30  illustrates the method of accessing the NIC and transmitting data. 
         [0262]    The NIC  208 - 1 - 1  is assigned the bus number of 0x00 and the device number of 0x08, the NIC  208 - 1 - 2  is assigned the bus number of 0x00 and the device number of 0x09, the NIC  208 - 2 - 1  is assigned the bus number of 0x01 and the device number of 0x08, and the NIC  208 - 2 - 2  is assigned the bus number of 0x01 and the device number of 0x09. 
         [0263]    The access to acquire the MAC address from the OS  205  to the NIC  208 , and the communication of data to the NIC  208  for external data transmission are performed using the device path such as a bus number, a device number, etc. 
         [0264]    Upon receipt of the data including the MAC address from the OS  205 , the NIC  208  generates a packet and externally transmits it. 
         [0265]    A device path is fixed and unchanged even after the replacement of a NIC. Therefore, using the device path, a new NIC  208  can be accessed and data can be communicated with the new NIC  208  even after the replacement of the NIC. 
         [0266]    All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the invention and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions, nor does the organization of such examples in the specification relate to a showing of the superiority and inferiority of the invention. Although the embodiment(s) of the present invention has (have) been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.