Abstract:
A method for enhancing the stability associated with an individual telecommunications line interface circuit comprises measuring a phase angle between a battery voltage and an output voltage. The phase angle measurement is processed by a digital signal processor for synthesizing a comparator circuit to generate an output voltage if the phase angle is a value other than forty-five degrees (45°). The new output voltage is then applied to the line interface circuit and the phase angle is recalculated to determine if it is a closer approximation of 45°. In an alternative embodiment, a database including a plurality of output voltage and electrical parameter values is stored in the digital signal processor and indexed by measured phase angles between the battery voltage and the output voltage. If a phase angle other than 45° is measured, the measured phase angle is used to obtain a new output voltage and electrical parameters from the database. The new output voltage is generated by the digital signal processor so that the line interface circuit operates at a greater degree of stability.

Description:
TECHNICAL FIELD 
     This invention relates to line interface circuits deployed in telecommunications networks and, more particularly, to maintaining an optimum stability of such line interface circuits by manipulating phase margins. 
     BACKGROUND OF THE INVENTION 
     Line interface circuits interconnect customer premises equipment to central office switches by subscriber lines (commonly referred to as subscriber loops). For administrative purposes, a plurality of line interface circuits are grouped in an integrated services line unit (ISLU). A line interface circuit includes means for delivering current to a subscriber loop via an external power source. In modem line interface circuits, the means for delivering current to the subscriber loop is a battery feed. Voltage generated by the external power source is processed by a switching converter circuit before delivery to the battery feed circuit. The power delivered to the subscriber loop by the battery feed circuit enables a central office switch to detect the presence, and status, of customer premises equipment served by the loop. The battery feed circuit also couples audio signals transmitted by the central office switch to the customer premises equipment and vice versa. Power supplied to the switching converter circuit is processed by a transformer which produces a predetermined battery voltage (V BAT ). The predetermined battery voltage is established to provide adequate current to interconnect customer premises equipment to a central office switch and to provide high quality voice transmission to the subscriber loop. 
     It is well known that normal line interface circuit operation results in the dissipation of power due to losses associated with the internal line interface circuit components. U.S. Pat. No. 5,754,644, assigned to Lucent Technologies Inc., addresses issues associated with power losses and is incorporated by reference herein. Although the inefficient operation of an individual line interface circuit might be tolerable, the accumulation of losses (due to the large number of line interface circuits deployed in a single ISLU) significantly impacts the overall efficiency of a central office switch. 
     Therefore, it is of critical importance to telecommunications service providers to continually enhance the performance of individual line interface circuits. 
     SUMMARY OF THE INVENTION 
     It is recognized that an important determinant of the efficiency and reliability of a line interface circuit is related to the stability of a feedback control loop contained within the circuit. The need for stable line interface circuits is addressed and a technological advance is achieved in the art by synthesizing a feedback control loop (circuit) to manipulate the operating phase margin between the battery feed voltage (V BAT ) and an output voltage (V 0 ) of the line interface circuit. Synthesizing the feedback control circuit requires adjusting feedback control circuit parameters (resistance and capacitance) and an output voltage value of the circuit. 
     In one embodiment of the present invention, each line interface circuit is equipped with a phase detector for determining the phase angle between V BAT  and output voltage V 0 . The detected phase angle is delivered to a digital signal processor which uses the phase angle to determine if the feedback circuit needs to be resynthesized to adjust the phase angle between V BAT  and V 0  to approximate a maximum operational stability (a phase angle of forty-five degrees 45°). In another embodiment, a database in the digital signal processor maintains predetermined output voltage values and feedback control circuit resistance and capacitance parameters for optimizing the phase angle between V BAT  and V 0 . Advantageously, equipping the line interface circuit with a phase angle detector and ensuring that the phase margin between V BAT  and V 0  approximates 45° enables the line interface circuit to operate at optimum stability. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram of a central office switch and in which the present invention may be practiced; 
     FIG. 2 is a block diagram of a line interface circuit in which the present invention may be practiced; and 
     FIG. 3 is a flow diagram of the steps performed in the line interface circuit of FIG. 2 in accordance with the present invention. 
    
    
     DETAILED DESCRIPTION 
     FIG. 1 shows a simplified block diagram of a central office telecommunications switch  100  (hereinafter, switch  100 ). In the preferred embodiment, switch  100  is the 5ESS® switch manufactured, and sold, by Lucent Technologies Inc. Although a central office switch is shown, any system in which power is supplied to subscriber loops may be utilized. 
     Switch  100  includes three major components: administrative module  102  for providing system-wide administration, maintenance, and resource allocation; communications module  104  for serving as a distribution hub in switching voice, control information, and synchronization signals; and a plurality of switching modules (SM)  108 ,  110  and  112  for performing local switching and control functions. Communication among the elements of central office switch  100  is accomplished over network control and timing (NCT) links  113 . As required by convention, dual NCT links are shown for the interconnection of each SM to communications module  104 . 
     SMs  108 ,  110  and  112  include controllers for coordinating switching functions, memory for retaining specific subscriber line data and network elements for routing calls to, and from, individual subscriber lines. In the embodiment shown, switch module  108  comprises controller  120 , data memory  122 , and network element  124 . Similarly, switch module  110  includes controller  130 , data memory  132 , and network element  134 . Switch module  112  comprises controller  140 , data memory  142 , and network element  144 . 
     Each SM is equipped with an ISLU, also known as an access interface unit (AIU), for interconnecting each subscriber loop to the network element of the SM. Although an operational central office switch includes many ISLUs, a single ISLU is shown clarity. Particularly, ISLU  138 , comprised of a plurality of line interface circuits, is interconnected to network element  134  of switch module  110  via link  135 . Each subscriber loop served by switch  100  is interconnected to a network element via a particular line interface circuit (LIC) and ISLU. In this example, telephone  170  is interconnected to line interface circuit  171  via subscriber line  173  and telephone  180  is interconnected to line interface circuit  182  via subscriber line  183 . 
     FIG. 2 is a detailed diagram of a preferred embodiment of a line interface circuit in which the present invention may be practiced. In this embodiment, line interface circuit  200  interconnects telephone  202  to a switch module of a central office switch, such as switch  100 . The interconnection of subscriber line  203  to the central office switch enables the detection and transmission of audio signals from telephone  202  to the central office switch. In this example, telephone  202  is interconnected to line interface circuit  200  via subscriber loop  203  comprising “tip” line  203 A, and “ring” line  203 B. Both tip and ring lines have first ends terminating at telephone  202  and second ends connected to current detector  205  of battery feed circuit  206 . 
     DSP  213  translates audio signals received from telephone  202  via battery feed circuit  206  and link  207  into digital format before delivering these signals to main controller  210  over link  209 . Conversely, digital signals received from the switch module via link  219  are converted to analog format prior to delivery to battery feed circuit  206  over link  217 . Signals between main controller  210  and the switching module of the serving central office switch are exchanged over signaling link  236 . 
     DSP  213  is powered by five (5) volt power supply  214  and produces output voltage V 0 . More particularly, DSP  213  receives the loop current (I LOOP ) associated with subscriber loop  203  from battery feed circuit  206  over link  229 . Loop current (I LOOP ) is equivalent to the current in tip line  203 A, or ring line  203 B. In the preferred embodiment, the loop current is detected by current detector  205  of battery feed circuit  206  and used to generate threshold voltage V TH  and DSP  213  also includes comparator and compensation circuit  231 . 
     Comparator and compensation circuit  231  comprises capacitors C3, C4, resistors R3, R4, R5, R6 and operational amplifier A 1 . During operation, DSP  213  receives phase angle information about the phase angle between V BAT  and V 0  from phase detector circuit  238 . DSP  213  uses the phase angle information to synthesize comparator and compensation circuit  231  so that output voltage V 0  (and thus, the phase angle between V BAT  and V 0 ) may be varied. Synthesizing comparator and compensation circuit  231  involves adjusting circuit resistance and capacitance parameters dynamically. Although actual resistors and capacitors are shown in comparator and compensation circuit  231 , these elements may be represented in integrated chip form, as is known in the art. Synthesization also requires applying an appropriate threshold voltage value (as determined by DSP  213 ). More particularly, DSP  213  receives phase angle data from phase detector circuit  238  and calculates an appropriate V TH  and synthesizes comparator and compensation circuit  231  to obtain a desired V 0 . The V TH  is applied to the first input of amplifier. The output voltage V 0  and comparator and compensation circuit is varied to approximate a phase angle of 45° between V BAT  and V 0 . The new output voltage V 0  is then applied to integrated circuit (IC) controller  230  and the process is reiterated until the phase angle between V BAT  and V 0  reaches optimum stability, or approximates 45°. In the preferred embodiment, the reiterative process occurs a maximum of three (3) times. 
     In an alternative embodiment, database  227  in DSP  213  stores a table of output voltage and R3, R4, R5, R6, C3 and C4 values which correspond to measured phase angles. In other words, the phase angle between V BAT  and V 0  (as measured by phase detector  238 ) is used as an index to database  227  to obtain an appropriate voltage value V 0  to be fed to control IC  230 . A table of measured phase angles is maintained so that the output voltage and values for R3, R4, R5, R6, C3 and C4 may be automatically derived. If the measured phase angle is not within database  227 , DSP  213  can operate in default mode in which and compensation circuit  231  is resynthesized by DSP  213  to maximize stability of the circuit. 
     Switching converter unit  210  receives power (−48 volts) from external power source  228  to supply voltage to battery feed circuit  206  via links  220  and  221 . In the preferred embodiment, the switching converter circuit includes: transformer circuit  224 ; filter  222 ; switching transistor Q 1 ; IC controller  230 . In this embodiment, transformer circuit  224  is designed to provide voltages ranging from −39.5 volts to −60 volts. Diode D 1  rectifies the output of transformer circuit  224 , as is known in the art. Filter  222 , comprised of conductor L 1  and capacitor C 1 , serves to smooth the output voltage of transformer circuit  224  and to meet ripple requirements. IC controller  230  produces output voltage V op  for operating switching transistor Q 1 , as described below. The operating frequency (f T ) of IC controller  230  is supplied by DSP  213  over link  237 . 
     In accordance with the preferred embodiment of the present invention, the feedback control circuit comprises DSP  213  (including comparator and compensation circuit  231 ), phase detector circuit  238  and IC controller  230 . The loop current of subscriber loop  203  is detected by current detector  205  of battery feed circuit  206 . The detected loop current is received in digital signal processor  213  via link  229 , and is used to determine a threshold voltage value. Upon determination of the threshold voltage (V TH ) value, digital signal processor  213  uses internal processing to deliver an analog output V TH  to comparator and compensation circuit  231 . 
     As known in the art, comparator and compensation circuit  231  uses threshold voltage V TH  to produce output voltage V 0  which is extended to IC controller  230  over link  223 . IC controller  230  uses voltage V 0  to produce operating voltage V OP . The frequency of operating voltage V OP  is controlled by the resistor and capacitor values within comparator and compensation circuit  231 . Operating voltage V OP  controls the switching frequency of transistor Q 1 , and therefore determines the value of battery feed voltage V BAT . In accordance with the preferred embodiment, V BAT  from lead  235  is fed to phase detector circuit  238  via link  239  and to DSP  213  via link  241 . Output voltage V 0  is delivered to phase detector circuit  238  via links  223  and  243  and to IC controller  230  via link  223 . Phase detector circuit  238  measures the phase angle between V BAT  and V 0  and DSP  213  dynamically synthesizes the comparator circuit so that the phase angle between V BAT  and V 0  is 45° as described above. 
     FIG. 3 is a flow diagram depicting steps performed in the line interface circuit of FIG. 2 in accordance with the present invention. 
     The process begins with step  300  in which a value V BAT  is received in DSP  213 . In step  302 , DSP  213  determines an initial V 0  value using I LOOP . In step  304 , phase detector  238  detects the phase angle between V BAT  and initial V 0 . In decision step  306 , DSP  213  receives a phase angle detected between V BAT  and V 0  and determines whether the phase angle is 45° (within a predefined tolerance) If the outcome of decision step  306  is a “NO” decision, the process may proceed to step  312  in which DSP  213  synthesizes comparator circuit  231  to improve the phase angle by generating a new output voltage (V 0 ) value. Alternatively, the process may proceed to step  313  in which DSP  213  uses the phase angle measured by phase detector circuit  238  to access database  227  for generation a new output voltage value as indicated in the database. After step  312  or  313 , the process then continues to step  314  in which the new V 0  value is applied to IC controller  230 . The process then returns to decision step  304  in which the DSP determines if the phase angle between V BAT  and the new V 0  is 45°. If the outcome of decision step  304  is “NO” again, the DSP resynthesizes comparator circuit  231  to apply another output voltage value to IC controller  230 . In the preferred embodiment, DSP  231  resynthesizes the control circuit a maximum of three times before applying a final output voltage value V 0  to control IC  230  in step  312 . If the outcome of decision step  306  is a “YES” determination, the process continues to step  300  in which the new V 0  value is applied to control IC  230 . In step  312 , phase detector  238  determines the phase between V BAT  and the new output voltage, V 0 . In step  310 , control IC  230  produces operating voltage V OP  which represents the optimal level of efficiency and stability for line interface circuit  200 . 
     In alternative embodiments, DSP  213  does not synthesize comparator  231  but simply uses the phase angle detected between V BAT  and V 0  to access information in database  227 . In these embodiments, toe detected phase angle serves as an index to database  227  for obtaining an output voltage value V 0  and electrical parameters. In the database alternative, there are no iterations or synthesizing of comparator  231  to approximate a 45° angle between V BAT  and V 0 . Instead, it is assumed that the output voltage and electrical parameter values in database  227  represents a precise output needed to approximate a 45° angle between V BAT  and V 0 . 
     Although this invention has been described with respect to a preferred embodiment, those skilled in the art may devise numerous other arrangements without departing from the scope of the invention as defined in the following claims.