Abstract:
A temperature compensated sense amplifier is connected to the sense node of a memory array which is OR tied to the bit lines of the array. A PNP current mirror supplies voltage independent controlled current to the sense node. A level shifting stage is connected to the sense node to establish a threshold sensing level, and to switch on to steer the current into the amplifier stage. A compensation stage is connected to the level shifting stage and the amplifier stage to compensate for the β factors of the transistors and the resistive changes with temperature. A temperature compensated current sink is connected to the PNP current mirror to track over temperature in opposition therewith and maintain a constant current into the sense node. The level shifting stage and the amplifier stage also include temperature compensating features to provide a sensing threshold which tracks constantly over the operating temperature range.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     This invention relates to sense amplifiers, and in particular to temperature compensated sense amplifiers employes in programmable read-only memories. 
     2. Description of the Prior Art 
     In a device such as a programmable read only memory (PROM), it is necessary to provide an amplifier stage, or sense amplifier, to detect voltage changes indicative of shifts in logic levels. The threshold level of the sense amplifier is set between the high and low logic levels, and the voltage difference between the threshold and low levels defines the noise margin. To maximize the operating speed of the device, it is desirable to reduce the noise margin as much as possible, so that the signal rise time from low level to threshold level is minimized. Unfortunately, the noise margin tends to change with temperature, because the low level and the threshold level have differing tracking rates with respect to temperature. 
     Generally speaking, the threshold level will tend to converge on the low logic level at high temperatures, and will diverge from the low logic level at low temperatures. As a result of these characteristics, the device will have a slower operating speed at lower temperatures. Due to the convergence at high temperatures, the noise margin must be made sufficiently large at high temperature to ensure operation of the device. Ideally, the threshold level and the low logic level should track over temperature at the same rate, providing a constant noise margin and a constant operating speed. 
     U.S. Pat. No. 4,215,282 discloses a PROM. In this device, controlled current sources are used to compensate for threshold shifts. A current mirror with the same type of current sink is connected to the sense amplifier. This scheme requires a column clamp, or a bit line clamp connected to the sense node. It compensates only for threshold variations, while other temperature effects such as gain changes in the transistors and parasitic capacitance changes are not compensated. 
     SUMMARY OF THE INVENTION 
     The present invention generally comprises a sense amplifier for PROM devices or other array devices which provides excellent temperature compensation over the operating temperature range of the device. A salient aspect of the invention is that multiple temperature compensating components are used, so that temperature-caused changes in resistor values, β gain values, and parasitic capacitance effects are effectively neutralized. As a result, the sense amplifier of the present invention provides a virtually constant noise margin over temperature, and a faster operating speed for the PROM device. 
     The temperature compensated sense amplifier is connected to the sense node of the memory array which is OR tied to the bit lines of the array. A PNP current mirror supplies voltage-independent controlled current to the sense node. A temperature compensated sink is connected to the PNP current mirror to track over temperature in opposition therewith and maintain a constant current into the sense node. A level shifting stage is connected to the sense node to establish a threshold sensing level, and to switch on to steer the current into the amplifier stage. A compensation stage is connected to the level shifting stage and the amplifier stage to compensate both for the β factors of the transistors and the resistive changes over temperature. The level shifting stage and the amplifier stage also include temperature compensating features to provide a sensing threshold which tracks constantly over the operating temperature range of the device. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a schematic diagram of the controlled current mirror and the temperature compensated current sink connected to the sense amplifier of the present invention; 
     FIG. 2 is a schematic diagram of one embodiment of the temperature compensated sense amplifier of the present invention; 
     FIG. 3 is a schematic diagram of an alternative embodiment of the sense amplifier of the present invention; and 
     FIG. 4 is a schematic diagram of the preferred embodiment of the sense amplifier of the present invention. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     The present invention generally comprises a temperature compensated sense amplifier for detecting rapid voltage changes indicative of shifts in logic level. Although the device is described in conjunction with a PROM array, it should be appreciated that the invention may be used to sense logic level changes at the sense node of other integrated circuit devices. 
     As shown in FIG. 1, the invention includes a sense node 10 which is connected through an OR tie to the bit lines of the PROM memory array, as is known in the prior art. A PNP current mirror network is connected to the sense node 10 to provide a controlled current flow through the node to either the bit lines or to the sense amplifier. The current mirror includes transistors 11 and 12 with their bases connected together, and their emitters connected through small resistors 13 and 14, respectively, to V cc . Transistor 15, connected across transistor 11, is a vertical transistor which provides β independence for the base drive of the mirror. 
     The PNP current mirror is a lateral PNP device, and exhibits very low gain. To compensate for the low gain, the increased parasitic capacitance on the bit lines with rising temperature, and for the increased β gain of other transistors with rising temperature, a temperature compensated current sink is coupled to the PNP current mirror. The temperature compensated current sink draws increasing current at lower temperatures, and tracks the current from the current mirror in constant to slightly negative fashion. The output of transistor 11 is connected through line 16 to the collector of transistor 17. The base of transistor 17 is connected through resistor 18 to V cc , and also through the base-emitter circuit of transistor 19 to ground. The base of transistor 19 is connected to the emitter of transistor 17, and also through resistor 21 to ground. A current mirror comprising transistors 22 and 26 may be connected through resistor 24 to a fixed voltage reference, and to ground depending upon the desired tracking rate. The output of the optional current mirror is also connected to the base of transistor 19. In a preferred embodiment transistors 22 and 26 are not employed because the negative tracking coefficient of transistors 17 and 19 is sufficient to achieve the desired rates without the addition of the positive coefficient. 
     The current through line 16 is mirrored through the collector of transistor 17, and is equal to V be  of transistor 19 divided by the resistance of resistor 21. As temperature increases the V be  of transistor 19 will diminish, the resistance of resistor 21 will increase, and the current sinking through line 16 will diminish. With decreasing temperature, the V be  value increases, the resistance decreases, and the current through line 16 will increase. The net effect of this portion of the circuit is to provide a current sink with a large negative temperature coefficient which compensates for the PNP current mirror β variations over temperature. 
     The current through resistor 24 is controlled by the voltage reference source, and is mirrored through the collector of transistor 26. As temperature increases the V be  of transistor 26 decreases, causing a larger voltage drop across resistor 24 and drawing an increased current therethrough. Thus, this portion of the circuit provides a current sink with a positive temperature coefficient. This positive coefficient is slightly lower in absolute value than the negative temperature coefficient of transistors 17 and 19, resulting in a slightly negative tracking rate of the current sink network with respect to temperature. This characteristic offsets the positive β temperature characteristic of transistor 15, which provides the base drive of the PNP current mirror, and thus maintains a constant current from the PNP mirror. 
     One embodiment of the sense amplifier the present invention, shown in FIG. 2, includes a level shifter stage, a driver stage, and a current sinking compensation stage. The level shifter includes a line 31 connected from node 10 to the base of transistor 32 and to the collector of switching transistor 33. Resistor 34 is connected between the emitter of transistor 32 and the base node of transistor 33. Transistor 32 is biased to be maintained in the linear conducting mode at all times, and is provided to establish a high impedance to node 10. When node 10 rises to a predetermined threshold level, transistor 33 will switch into the conducting mode, and will steer substantially all the current from node 10 (i.e., from the PNP current mirror) into the driver section of the sense amplifier. 
     The threshold level is also temperature compensated to prevent convergence of the low logic level and the threshold level at high temperatures, a common fault in prior art devices. The base node of transistor 33 is connected through line 36 to the compensation stage, which includes a NPN current mirror 37. The mirror 37 is comprised of transistors 38 and 39 connected in typical mirror fashion and driven by a voltage reference connected through resistor 41. As the temperature increases, the value of resistor 41 increases while the V be  of transistors 38 and 39 will decrease, creating an offsetting and mutually compensating effect. The current through the mirror 37 will increase, drawing increasing current through resistor 34 and raising the voltage of the base node of transistor 32. As a result, the threshold level will increase with increasing temperature, creating the desired positive threshold compensation. 
     The driver stage includes a diode 42 which receives the input signal from switching transistor 33 and feeds the signal to the base of transistor 43. Transistor 43 is biased in the conducting mode, and is switched from linear conducting to saturated modes by the incoming signal. A transmission gate consisting of transistor 44 and resistor 46 connected to V cc  receives the amplified sense current output of transistor 43 and supplies it to an output buffer stage. The output buffer stage may comprise any high speed TTL buffer configuration known in the prior art, and is not an independent part of the present invention. 
     A significant feature of the driver stage is the provision of a feedback loop, including diode 47 connected through the base-emitter circuit of transistor 48 to the emitter node of transistor 33. The collector of transistor 48 is connected directly to V cc , while the base is connected to V cc  through resistor 49. The feedback loop provides negative feedback to the driver stage, holds transistor 51 out of saturation, and the base emitter junction of transistor 33 slightly off when node 10 goes &#34;low.&#34; 
     In the &#34;on&#34; state (sense node high), transistors 32 and 33 are conducting linearly, transistor 43 is saturated, and transistor 48 is off. In the &#34;off&#34; state (sense node low), transistors 32, 43 and 48 are conducting in the linear mode, and transistor 33 is biased off. Thus, only transistors 33 and 43 are switching, and only transistor 33 is switching fully from conducting to non-conducting. Thus, voltage swings in the amplifier stage are minimized, as are parasitic capacitance effects. The transmission gate comprised of transistor 44 and resistor 46 is provided to isolate the feedback loop from the diode stack of a typical output buffer stage, which would otherwise limit the feedback effect. The transmission gate also provides some temperature compensation, because the collector voltages of transistors 43 and 44 tend to fall with rising temperature compensating for the negative tracking of the typical output buffer. 
     Transistor 51 of the compensation stage has its base coupled to the base of transistor 38, and is connected between the base node of transistor 43 and ground. The current through transistor 51 will increase with rising temperature, and will tend to compensate for the positive temperature coefficient of the β gain of transistor 43. Thus, the circuit provides a multiplicity of temperature compensating features to establish thorough control of the sense amplifier network, and to assure a constant noise margin over the operating temperature range. 
     Because the feedback loop of the driver stage is substantially undamped, it may be subject to oscillation. Indeed, when the signal from node 10 falls very quickly, the presence of the low impedance source, transistor 48, may cause undesirable ringing in the feedback loop. To prevent this effect, the sense amplifier network may be modified as shown in FIG. 3. The circuit components having the same reference numerals as in FIG. 2, with the addition of a prime (&#39;) character, provide substantially the same functions as their counterparts described in conjunction with FIG. 2. 
     A significant feature of the embodiment of FIG. 3 is that the positions of the compensating resistor 34 and the diode 42 are interchanged, so that resistor 34a is connected in the feedback loop of the driver transistor 43&#39;, and the diode 42a is connected between the emitter of transistor 32&#39; and the base of transistor 33&#39;. The positive temperature coefficient of the resistor 34a provides the same temperature compensation for the threshold level as in the previous embodiment. In addition, the resistor 34a provides damping in the feedback loop to attenuate any oscillation in the driver stage. As a result, the voltage variations of transistors 43&#39; and 33&#39; are reduced, thereby reducing the rise time and increasing the speed of the device. 
     In addition, the base node of transistor 33&#39; is not connected to the compensation stage, but rather ballast resistor 52 to ground. Also, the compensation stage comprises a single current mirror consisting of transistors 38&#39; and 39&#39;, connected directly to the base node of the driver transistor 43&#39;. The current mirror provides the temperature compensation for the β gain temperature of transistor 43&#39;, as well as threshold compensation in conjunction with resistor 34a. A significant advantage of the embodiment of FIG. 3 is that the transistor count is reduced. 
     It should be noted that the resistors 21 (FIG. 1) and resistors 34 or 34a (FIGS. 2 and 3, respectively) may be trimmed to select the current densities through the transistors, and to alter the temperature tracking rates of the overall network for optimized performance of the device. This provides a substantial practical advantage in manufacturing the sense amplifier of the present invention. 
     The preferred embodiment of the sense amplifier of my invention, as employed in 64K programmable read only memories, is depicted in FIG. 4. The circuit shown in FIG. 4 operates in substantially the same manner as the circuit shown in FIG. 2. By removing diode 42 from the circuit shown in FIG. 2, however, the overall tracking rate of the sense amplifier is reduced. Furthermore, the addition of resistor 34a also reduces the overall tracking in the same manner as resistor 34. 
     Although several embodiments of the invention have been shown and described to illustrate particular features of the invention, these are intended for descriptive purposes only. The scope and spirit of the invention may be ascertained from the appended claims.