Abstract:
An x-ray image-generating system having an a-Si:H detector matrix is constructed so that different enlargements are possible with a small number of terminal conductors. Two groups of pixels of the detector matrix can be read out together by means of voltage pulses of different levels, respectively applied in alternation to the two pixel groups on a line conductor common to both pixel groups.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention is directed to a readout system for a solid state image converter, of the type suitable for use in an x-ray imaging system. 
     2. Description of the Prior Art 
     In x-ray image-generating systems, in practice spatial resolutions matched to the particular task at hand are required. Thus, for a general overview a low resolution is sufficient, while for sections a high resolution is often necessary. For the production of individual exposures, it is known to use films, film/foil combinations or memory foils having different resolutions. For fluoroscopy x-ray image intensifiers are used having an adjustable (selectable) enlargement and resolution. 
     From German OS 41 23 203, a radiation-sensitive solid state image transducer is known that is formed from two matrices of detector elements with different resolution. There is no information provided, however, as to how the detector elements that form pixels are driven. A solid state image transducer for x-ray imaging is specified in &#34;Circuits and Devices&#34; (IEEE) (July 1993) 38-42. Different resolutions of the detector matrix disclosed therein are not provided. In German OS 34 42 789, a two-dimensional image reader that is driven row-by-row and column-by-column is shown. Again, there is no provision for different resolutions. Finally, in European Application 0 622 851 a two-dimensional image sensor is shown in which the pixels are combined group by group. The individual groups are driven by means of signals of different polarity. 
     SUMMARY OF THE INVENTION 
     An object of the present invention is to provide an x-ray image-generating system wherein a matching of the resolution to respective imaging requirements is possible in a simple and cost-effective manner. 
     The above object is achieved in accordance with the principles of the present invention in a solid state image converter having a pixel matrix which is read out line-by-line, wherein the pixels include two groups of pixels connected to a common conductor, with voltages of different levels being produced on the common conductor so that the two groups of pixels can be selectively read out via this common conductor. 
     In the inventive x-ray image-generating system, a small number of terminal conductors is provided. As the enlargement (zoom) increases, the spatial resolution increases simultaneously, but the image sampling rates remain constant. The zone of enlargement can be centrally located. Its dimensions are easily configurable. A retarded readout possibility with full resolution is possible for the entire surface. 
    
    
     DESCRIPTION OF THE DRAWINGS 
     FIGS. 1 and 2 are respective schematic representations of an x-ray image-generating system for explanation of the inventive concept. 
     FIG. 3 shows the arrangement of pixels and conductor, given a uniform structuring of an x-ray image-generating system according to the invention. 
     FIG. 4 is a schematic diagram for an image point with two sub-pixels in the x-ray image-generating system according to FIG. 2. 
     FIG. 5 is a pulse diagram for the x-ray image-generating system according to FIG. 3. 
     FIGS. 6 and 7 respectively show two examples of the arrangement of pixels and conductors, given non-uniform structuring of an x-ray image-generating system according to the invention. 
     FIG. 8 shows an alternative circuit for a pixel of an X image-generating system according to the invention. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIGS. 1 and 2 show two examples of the result of an inventive polling (interrogation) of the a-Si:H detector matrix. FIG. 1 indicates a detector 1 formed from a continuous substrate having a conventional matrix of 2000×2000 pixels with 2000×2000 terminals, which has a central zoom surface formed by a matrix of 1000×1000 pixels. According to the invention, the total number of terminals, and thereby the outlay of allocated electronics, is reduced to 1000×1500. 
     FIG. 2 shows a detector assembled from four subsurfaces, having the conventional 4000×4000 terminal conductors, which according to the invention is reduced to 2000×3000 terminals. 
     FIG. 3 shows the inner construction of an assembled detector according to FIG. 2. The region of enlargement is set by the right surface between x+1 and vp1&#39;. Each pixel consists of a photodiode D and a readout switching diode D R , and has an additional switching diode D S . These switching diodes D S  enable the charging voltages VP1 and VP1&#39; of the photodiodes D to be set at different levels via the corresponding interconnected conductors vp1 and vp1&#39;. Thus with the voltage level of the reading voltages VP2, a respective row of pixels lying above or below a selected line conductor can be individually operated and read out via the line conductors y-1, y and y+1. This is possible almost without loss of time, as is shown in the pulse diagram of FIG. 4. 
     The region of enlargement has a read terminal for each column in order to achieve full resolution at the highest readout speed. In the edge area underneath the zoom surface, four pixels are interconnected for whole-surface readout at a constant image rate and halved resolution. This is undertaken as a group by means of addition of the read results of adjacent columns (in hardware or software) and conventional operation with only one charging and reading voltage VP1 and VP2, which can be applied only via the conductors y and the diodes D R , even without the use of the switching diode D S . In the region to the left of the zone of enlargement, the interconnection of the columns on the lower outer edge is fashioned such that the size of the zoom surfaces can be easily selected, e.g. by cutting the edge of the glass support or etching back the connection conductors. The grouped readout in this region and in the zoom field takes place, as stated above, through the use of only one charging and reading voltage VP1 and VP2. 
     FIG. 4 shows that for two pixels lying one over the other, the different charging voltages still lead only to a doubling of the breakdown voltage, not to a multiplication thereof. 
     FIG. 5 shows the pulse sequence for the zoom region. All diodes connected to the conductors vp1 via switching diodes D S  are charged to the reverse voltage of the charging voltage VP1. At the same time, the diodes connected with the conductor vp1&#39; are set to the higher voltage VP1&#39;. After the X exposure (time) window X has elapsed, all lines y are first read out with the voltages VP2&lt;VP2&#39;. Whereby only the diodes charged to the voltages VP1 are affected. The more highly charged diodes are decoupled, because the switching diodes D S  still remain blocked. At the end of this readout phase, all the diodes that have been read out are set to the reset voltage VR&gt;VP2 via the conductors vp1, in order to disconnect them in the subsequent second readout step. This second step ensues with readout voltages VP2&gt;VP1, and, by means of the higher voltage, affects the diodes that have not yet been read out. For symmetry, a voltage VR&#39;=VR on the conductors vp1&#39; concludes the readout, and a reset light irradiation prepares the matrix for a new readout cycle. The information read out in the edge area next to the zoom field is discarded (direction-dependent spatial resolution). The zoom region can be extended downwards if more lines are operated, so that a rectangular zoom field arises. 
     The lengthening of the readout time in comparison with the prior art is due only to the voltages VR and VR&#39;, which, amounting to about 100 μs together, is insignificant. 
     The use of the full surface at half resolution (grouped pixels) ensues, e.g., without the use of the conductors vp1 and vp1&#39; in the conventional mode with a charging voltage VP1, whereby the interconnection/addition of the columns in the zoom region can be accomplished by the hardware through the readout IC, or by software in a computer. 
     If the simple configurability of the surface portions from the zoom field to the overall surface is foregone, in the outer region the loss of surface area available for light collecting due to the switching diodes D S  and the reading diodes D R  (up to one) can be avoided, and, according to FIG. 6, a hardware grouping can be carried out on the detector matrix (the illustrated variant employs two reading diodes). Undivided pixels with fourfold surfaces are also feasible, if the conductors are led around externally. The loss of surface area due to the additional switching diode can be kept small if the diode in the layout is positioned on (or under) the conductors. 
     In the previously shown structures of the detector matrix, the entire panel cannot be read out slowly with full resolution, however, this is sometimes desirable. The embodiment according to FIG. 7 remedies this. The enlargement surface is constructed as previously described. 
     The readouts of the zoom region with full resolution (including rectangular shape) and of the overall image field in half resolution remain unaltered. The left edge region can be read out at a lower image frequency if two further, higher charging voltages VP1&#34; and VP1&#34;&#39; are applied together with the charging voltages VP1 and VP1&#39; via the conductors vp1&#34; and vp1&#34;&#39;. The reset voltages VR, VR&#39;, VR&#34; and VR&#34;&#39; are also to be set about twice as high (over the highest readout voltage VP2&#34;&#39;). 
     If the fourfold blocking voltage cannot be technologically achieved, the dynamic range of the detector can be reduced by the use of smaller charging voltages, until the voltage VR no longer exceeds the blocking voltage. Multiple exposures and readouts at lower light power and addition of the images in the computer can circumvent the problem, with the disadvantage of longer exposure times. 
     FIG. 8 shows a circuit with an exchanged sequence of the series connection of the diodes, by means of which the same result can be achieved, given a corresponding matching of the voltages VP1, VP2, etc. 
     Although modifications and changes may be suggested by those skilled in the art, it is the intention of the inventor to embody within the patent warranted hereon all changes and modifications as reasonably and properly come within the scope of his contribution to the art.