Abstract:
Disclosed is a picture encoding format converting apparatus, comprising: a picture decoder for decoding a picture signal from an input bitstream; a picture encoder for encoding the picture signal into an output bitstream; a main controller for controlling the amount of calculations executed by the picture encoder, on the basis of a state of the picture decoder.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    The present invention relates to a picture encoding format converting apparatus, and in particular, to a picture encoding format converting apparatus featuring a controller for controlling the whole of the apparatus by controlling the operations of an decoder and a encoder for converting a picture encoding format.  
           [0003]    2. Description of the Prior Art  
           [0004]    Conventionally, when picture information is transmitted and stored in a digital picture communicating system and a digital picture communicating service, the picture information is encoded so as to decrease the number of bits.  
           [0005]    As examples of the encoding formats for moving pictures that have been internationally standardized by ITU-T (International Telecommunication Union-Telecommunication Standardization Sector), H. 261 Recommendation (for transmission of pictures in television telephone and television conferences) and H. 263 Recommendation (for pictures transmitted over a low bit rate line such as PHS (Personal Handy-phone System)) are known.  
           [0006]    In addition, as examples of the encoding formats for moving pictures that have been internationally standardized by ISO (International Organization for Standardization), MPEG (Motion Picture Experts Group) 1—an encoding format for stored video pictures, MPEG 2—a general-purpose encoding format, and MPEG 4—a low-bit encoding format are known.  
           [0007]    Those encoding formats for compressing moving pictures are similar in that DCT (Discrete Cosine Transform), motion compensation prediction, and Huffman encoding are performed, but different in bitstreams that are actually encoded.  
           [0008]    Thus, when bitstreams that are encoded in conformity with different standards are connected each other, it is necessary to decode a picture signal from an encoded picture signal and then encode the decoded picture signal to another encoded picture signal.  
           [0009]    For example, in order to convert a bitstream in conformity with the H. 261 format to a bitstream in conformity with the H. 263 format or the MPEG 4 format, it is necessary to decode a picture signal from the former bitstream, and then, to encode the picture signal into the latter bitstream, because the latter bitstream is generated by an encoder not including a loop filter which is included in an encoder for generating the former bitstream.  
           [0010]    In addition, in order to convert a bitstream in conformity with the H. 263 format or the MPEG 4 format to a bitstream in conformity with the H. 261 format, it is necessary to decode a picture signal from the former bitstream, and then, to encode the picture signal into the latter bitstream, because the maximum range of motion vectors of the H. 263 format and the MPEG 4 format is wider than that of motion vectors of the H. 261 format, and because a motion vector of the H. 261 format has an accuracy of integers at the best.  
           [0011]    In other words, in order to convert a bitstream in conformity with a first picture encoding format to a bitstream in conformity with a second picture encoding format which is very different from the first picture encoding format, it is necessary to connect a decoder in conformity with the first picture encoding format and an encoder in conformity with the second picture encoding format, and it is necessary that the decoder decodes a picture signal from the former bitstream and the encoder encodes the picture signal into the latter bitstream.  
           [0012]    [0012]FIG. 1 shows the structure of a conventional picture encoding format converting apparatus.  
           [0013]    The picture encoding format converting apparatus shown in FIG. 1 comprises buffer  4 , decoder  5 , encoder  6 , and buffer  7 . The buffer  4  stores a bitstream that is output from an external device. The decoder  5  decodes a picture signal from a picture code which is output from the buffer  4 . The encoder  6  encodes the picture signal which is output from the decoder  5  into a picture code. The buffer  7  stores the picture code which is output from the encoder  6  and outputs the picture code to an external device. The encoder  6  supervises the occupancy rate of the buffer  7 . The occupancy rate of the buffer  7  is used for controlling the amount of the generated codes in the encoding process executed by the encoder  6 .  
           [0014]    A related art reference of the picture encoding format converting apparatus is disclosed in JPA 7-107461.  
           [0015]    In the picture encoding format converting apparatus disclosed in the above-mentioned related art reference, history information of encoding parameters such as a motion vector and a quantizing step size used in the decoding process is stored. With reference to the encoding parameters in the encoding process, a re-encoding process is performed.  
           [0016]    In JPA 7-288804, there is a disclosure that the number of quantizing bits is designated along with encoding parameters, such as a prediction mode, a motion vector, and a quantizing step size, which are obtained in the decoding process, so that a bitstream can be re-encoded into data of any amount.  
           [0017]    In JPA 8-111870, there is a disclosure that re-eocoding a bitstream is performed using a period and phase of prediction modes, motion vectors, quantizing step sizes which are obtained in a decoding process of the bitstream.  
           [0018]    In JPA 10-336672, there is a disclosure that motion vectors which are obtained when decoding is performed are stored, and encoding is performed using motion vectors which are based on the stored motion vectors, rescaled in accordance with a conversion ratio of picture size, and compensated in accordance with a conversion ration of frame rate.  
           [0019]    In each of the conventional picture encoding format converting apparatuses, a process for decoding a picture signal from a received bitstream and a process for encoding the picture signal into another bitstream are simply repeated.  
           [0020]    Thus, in each of the conventional picture encoding format converting apparatuses, even if the performance of the converting apparatus is improved, the surplus performance is not assigned to a process of improving picture quality or reducing the delay of the processes, because the decoding process and the encoding process are performed with fixed process amounts.  
           [0021]    The conventional picture encoding format converting apparatuses have the following disadvantages.  
           [0022]    A first disadvantage of the conventional picture encoding format converting apparatuses is that decoding of a picture signal from an input bitstream and encoding the picture signal into an output bitstream are simply repeated so as to convert the format of the input bitstream to the format of the output bitstream. Therefore, even if the performance of the converting apparatus is improved, the surplus performance is not allocated to a process of improving picture quality or reducing the delay of the processes.  
           [0023]    In other words, even if the performance in a unit time is superfluous, the surplus performance is not allocated to a process of improving picture quality or reducing the delay of the processes.  
           [0024]    A second disadvantage of conventional picture encoding format converting apparatuses as disclosed in JPA 7-107461, JPA 7-288804, JPA 8-111870, and JPA 10-336672 is that cooperative operation between the decoder and the encoder is not considered, though data exchange between the decoder and the encoder is considered in order to improve encoding efficiency or picture quality by reuseing encoding parameters which are obtained in decoding process, such as motion vectors, prediction modes, quantization step sizes.  
           [0025]    When such a picture encoding format converting apparatus is accomplished by a DSP (Digital Signal Processor) or software of a personal computer, it is important to adequately share a process time among the decoder and the encoder in consideration of the situation.  
           [0026]    In other words, when a picture encoding format conversion is performed in a particular unit time, the process times assigned to the decoder and the encoder should be varied in consideration of the feature of a bitstream so as to more flexibly convert the bitstream.  
           [0027]    A third disadvantage of the conventional picture encoding format converting apparatuses is that the occupancy rate and fluctuation of an input buffer for storing a bitstream which is input from an external device are not considered.  
           [0028]    If a bitstream of which encoding format is to be converted is supplied from a packet exchange network such as the Internet or ATM (Asynchronous Transfer Mode), the time when the bitstream is supplied from the packet exchange network to the input buffer tends to delay and fluctuate, because the transmission time varies depending on the congestion degree of the used line.  
           [0029]    On the other hand, if the network is a fixed line network such as ISDN (Integrated Service Digital Network) or a telephone line, because a picture code is multiplexed with an audio code, a control signal, and so forth and the multiplexed bitstream is transmitted, when the picture code is extracted from the multiplexed bitstream and stored to an input buffer, the picture code tends to delay and fluctuate.  
           [0030]    When the picture code delays and fluctuates, the occupancy rate of the input buffer varies.  
           [0031]    If the occupancy rate of the input buffer is small, then the data amount of a bitstream waiting for conversion is small. Therefore, the decoder and the encoder should wait until a sufficient amount of a bitstream is stored in the input buffer.  
           [0032]    In contrast, if the occupancy rate of the input buffer is large, then the bitstream is queued in the buffer for a long time. Therefore, the delay time in the picture encoding format converting apparatus becomes long.  
           [0033]    Because the fluctuation of the occupancy rate of the input buffer elongates the delay time of a bitstream in the picture encoding format converting apparatus, and such fluctuation causes ineffective conversion of the bitstream, the occupancy rate of the input buffer should be controlled.  
         SUMMARY OF THE INVENTION  
         [0034]    In order to overcome the aforementioned disadvantages, the present invention has been made and accordingly, has an object to provide a picture encoding format converting apparatus which controls the entire process amount and the assignment of the processes of a decoder and an encoder so as to effectively use the performance to improve picture quality and shorten the delay of the processes and, to flexibly perform an encoding format conversion.  
           [0035]    According to a first aspect of the present invention, there is provided a picture encoding format converting apparatus, comprising: a picture decoder for decoding a picture signal from an input bitstream; a picture encoder for encoding the picture signal into an output bitstream; a main controller for controlling the amount of calculations executed by the picture encoder, on the basis of a state of the picture decoder.  
           [0036]    In the picture encoding format converting apparatus as set forth in claim 1, the picture decoder may comprise a buffer for temporarily storing the input bitstream, the picture encoder may comprise a rate controller for controlling a rate of the output bitstream, and the main controller may comprise: a monitor for monitoring an occupancy rate of the buffer; and a sub-controller for controlling the amount of calculations executed by the rate controller, on the basis of the occupancy rate in order to suppress fluctuation of the occupancy rate.  
           [0037]    In the picture encoding format converting apparatus, the picture decoder may comprise a buffer for temporarily storing the input bitstream, the picture encoder may comprise a motion predictor for predicting motions in a picture represented by the picture signal, and the main controller may comprise: a monitor for monitoring an occupancy rate of the buffer; and a sub-controller for controlling the amount of calculations executed by the motion predictor, on the basis of the occupancy rate in order to suppress fluctuation of the occupancy rate.  
           [0038]    In the picture encoding format converting apparatus, the picture decoder may comprise a buffer for temporarily storing the input bitstream, the picture encoder may comprise: a rate controller for controlling a rate of the output bitstream; and a motion predictor for predicting motions in a picture represented by the picture signal, and the main controller may comprise: a monitor for monitoring an occupancy rate of the buffer; and a sub-controller for controlling the amount of calculations executed by the rate controller and/or the amount of calculations executed by the motion predictor, on the basis of the occupancy rate in order to suppress fluctuation of the occupancy rate.  
           [0039]    In the picture encoding format converting apparatus, the picture decoder may comprise a variable length decoder for decoding data of the picture signal from codes in the input bitstream, the picture encoder may comprise a rate controller for controlling a rate of the output bitstream, and the main controller may comprise: a monitor for monitoring encoding parameters decoded by the variable length decoder and for calculating the amount of calculations needed by the picture decoder; and a sub-controller for controlling the amount of calculations executed by the rate controller, on the basis of the amount of calculations needed by the picture decoder in order to keep the sum of the amount of calculations executed by the picture decoder and the amount of calculations executed by the picture encoder constant.  
           [0040]    In the picture encoding format converting apparatus, the picture decoder may comprise a variable length decoder for decoding data of the picture signal from codes in the input bitstream, the picture encoder may comprise a motion predictor for predicting motions in a picture represented by the picture signal, and the main controller may comprise: a monitor for monitoring encoding parameters decoded by the variable length decoder and for calculating the amount of calculations needed by the picture decoder; and a sub-controller for controlling the amount of calculations executed by the motion predictor, on the basis of the amount of calculations needed by the picture decoder in order to keep the sum of the amount of calculations executed by the picture decoder and the amount of calculations executed by the picture encoder constant.  
           [0041]    In the picture encoding format converting apparatus, the picture decoder may comprise a variable length decoder for decoding data of the picture signal from codes in the input bitstream, the picture encoder may comprise: a rate controller for controlling a rate of the output bitstream; and a motion predictor for predicting motions in a picture represented by the picture signal, and the main controller may comprise: a monitor for monitoring encoding parameters decoded by the variable length decoder and for calculating the amount of calculations needed by the picture decoder; and a sub-controller for controlling the amount of calculations executed by the rate controller and/or the amount of calculations executed by the motion predictor, on the basis of the amount of calculations needed by the picture decoder in order to keep the sum of the amount of calculations executed by the picture decoder and the amount of calculations executed by the picture encoder constant.  
           [0042]    In the picture encoding format converting apparatus, the picture decoder may comprises: a buffer for temporarily storing the input bitstream; and a variable length decoder for decoding data of the picture signal from codes in the input bitstream, the picture encoder may comprise a rate controller for controlling a rate of the output bitstream, and the main controller may comprise: a monitor for monitoring an occupancy rate of the buffer, for monitoring encoding parameters decoded by the variable length decoder, and for calculating the amount of calculations needed by the picture decoder; and a sub-controller for controlling the amount of calculations executed by the rate controller, on the basis of the occupancy rate and/or the amount of calculations needed by the picture decoder in order to suppress fluctuation of the occupancy rate and/or keep the sum of the amount of calculations executed by the picture decoder and the amount of calculations executed by the picture encoder constant.  
           [0043]    In the picture encoding format converting apparatus, the picture decoder may comprise: a buffer for temporarily storing the input bitstream; and a variable length decoder for decoding data of the picture signal from codes in the input bitstream, the picture encoder may comprise a motion predictor for predicting motions in a picture represented by the picture signal, and the main controller may comprise: a monitor for monitoring an occupancy rate of the buffer, for monitoring encoding parameters decoded by the variable length decoder, and for calculating the amount of calculations needed by the picture decoder; and a sub-controller for controlling the amount of calculations executed by the motion predictor, on the basis of the occupancy rate and/or the amount of calculations needed by the picture decoder in order to suppress fluctuations of the occupancy rate and/or keep the sum of the amount of calculations executed by the picture decoder and the amount of calculations executed by the picture encoder constant.  
           [0044]    In the picture encoding format converting apparatus, the picture decoder may comprise: a buffer for temporarily storing the input bitstream; and a variable length decoder for decoding data of the picture signal from codes in the input bitstream, the picture encoder may comprise: a rate controller for controlling a rate of the output bitstream; and a motion predictor for predicting motions in a picture represented by the picture signal, and the main controller may comprise: a monitor for monitoring an occupancy rate of the buffer, for monitoring encoding parameters decoded by the variable length decoder, and for calculating the amount of calculations needed by the picture decoder; and a sub-controller for controlling the amount of calculations executed by the rate controller and/or the amount of calculations executed by the motion predictor, on the basis of the occupancy rate and/or the amount of calculations needed by the picture decoder in order to suppress fluctuations of the occupancy rate and/or the sum of the amount of calculations executed by the picture decoder and the amount of calculations executed by the picture encoder constant.  
           [0045]    According to a second aspect of the present invention, there is provided an encoding format converting apparatus, comprising: a buffer for inputting encoded data and temporarily storing the encoded data; a decoder for decoding the data which has been temporarily stored in the buffer; an encoder for re-encoding the data which has been decoded by the decoder; and a controller for controlling the amount of calculations executed by the encoder in order to keep an occupancy rate of the buffer.  
           [0046]    According to a third aspect of the present invention, there is provided an encoding format converting apparatus, comprising: a decoder for decoding data; an encoder for re-encoding the data which has been decoded by the decoder; and a controller for controlling the amount of calculations executed by the encoder in order to keep the sum of the amount of calculations executed by the decoder and the amount of calculations executed by the encoder constant, on the basis of the amount of calculations needed by the encoder.  
           [0047]    These and other objects, features and advantages of the present invention will become more apparent in light of the following detailed description of a best mode embodiment thereof, as illustrated in the accompanying drawings. 
       
    
    
     BRIEF DESCRIPTION OF DRAWINGS  
       [0048]    [0048]FIG. 1 is a block diagram showing the structure of a conventional picture encoding format converting apparatus;  
         [0049]    [0049]FIG. 2 is a block diagram showing the structure of a picture encoding format converting apparatus according to a first embodiment of the present invention;  
         [0050]    [0050]FIG. 3 is a block diagram showing the structure of a picture encoding format converting apparatus according to a second embodiment of the present invention;  
         [0051]    [0051]FIG. 4 is a block diagram showing the structure of a picture encoding format converting apparatus according to a third embodiment of the present invention;  
         [0052]    [0052]FIG. 5 is a block diagram showing the structure of a picture encoding format converting apparatus according to a fourth embodiment of the present invention;  
         [0053]    [0053]FIG. 6 is a block diagram showing the structure of a picture encoding format converting apparatus according to a fifth embodiment of the present invention;  
         [0054]    [0054]FIG. 7 is a block diagram showing the structure of a picture encoding format converting apparatus according to a sixth embodiment of the present invention;  
         [0055]    [0055]FIG. 8 is a block diagram showing the structure of a picture encoding format converting apparatus according to a seventh embodiment of the present invention;  
         [0056]    [0056]FIG. 9 is a block diagram showing the structure of a picture encoding format converting apparatus according to an eighth embodiment of the present invention;  
         [0057]    [0057]FIG. 10 is a block diagram showing the structure of a picture encoding format converting apparatus according to a ninth embodiment of the present invention; and  
         [0058]    [0058]FIG. 11 is a block diagram showing the structure of a picture encoding format converting apparatus according to a tenth embodiment of the present invention. 
     
    
     DESCRIPTION OF PREFERRED EMBODIMENTS  
       [0059]    Next, with reference to the accompanying drawings, embodiments of the present invention will be explained.  
         [0060]    (First Embodiment)  
         [0061]    Next, with reference to FIG. 2, the first embodiment of the present invention will be explained.  
         [0062]    Referring to FIG. 2, the first embodiment of the present invention comprises decoding portion  1 , encoding portion  2 , and transcoder controlling portion  3 .  
         [0063]    With reference to FIG. 2, the operation of a picture encoding format converting apparatus according to the first embodiment of the present invention will be explained.  
         [0064]    The decoding portion  1  decodes a picture signal from an encoded bitstream and sends the picture signal and encoding parameters to the encoding portion  2 .  
         [0065]    The encoding parameters are, for example, a prediction mode, a motion vector, and a quantizing step size.  
         [0066]    The encoding portion  2  performs a re-encoding process using the picture signal and encoding parameters which are supplied from the decoding portion  1  and outputs a resultant bitstream.  
         [0067]    In this case, the encoding portion  2  performs the re-encoding process corresponding to encoder operation information  302  which is supplied from the transcoder controlling portion  3 .  
         [0068]    The transcoder controlling portion  3  outputs the encoder operation information  302  to the encoding portion  2  corresponding to decoder state information  301  which is supplied from the decoding portion  1 .  
         [0069]    (Second Embodiment)  
         [0070]    Next, with reference to FIG. 3, the second embodiment of the present invention will be explained in detail.  
         [0071]    Referring to FIG. 3, the second embodiment of the present invention comprises decoding portion  1 B, encoding portion  2 B, and transcoder controlling portion  3 B. The decoding portion  1 B comprises a buffer  21 B. The encoding portion  2 B comprises a rate controller  41 B. The transcoder controlling portion  3 B comprises decoder monitor  51 B, encoder controller  61 B, and decider  71 .  
         [0072]    The decoding portion  1 B further comprises VLD (Variable Length Decoder)  22 , IQ (Inverse Quantizer)  23 , IDCT (Inversely Discrete Cosine Transformer)  24 , adder  25 , frame memory  26 , and motion compensator  27 . The encoding portion  2 B further comprises subtractor  31 , a DCT (Discrete Cosine Transformer)  32 , Q (Quantizer)  33 , IQ  34 , IDCT  35 , adder  36 , frame memory  37 , a motion predictor/compensator  38 , VLC (Variable Length Coder)  39 , and buffer  40 .  
         [0073]    Next, with reference to FIG. 3, the operation of the picture encoding format converting apparatus according to the second embodiment of the present invention will be explained.  
         [0074]    First of all, the operation of the decoding portion  1 B will be explained.  
         [0075]    The buffer  21 B stores a bitstream that is supplied from an external device and outputs the stored bitstream to the VLD  22 .  
         [0076]    The VLD  22  performs an entropy decoding process such as a variable length decoding process or a run length decoding process for the bitstream which is supplied from the buffer  21 B and outputs the decoded data as quantized DCT coefficients to the IQ  23 .  
         [0077]    The VLD portion  22  also outputs encoding parameters  201  such as a motion vector and a prediction mode to the motion compensator  27 .  
         [0078]    The IQ  23  inversely quantizes the quantized DCT coefficients which are supplied from the VLD  22  and outputs the non-quantized DCT coefficients to the IDCT  24 .  
         [0079]    The IDCT  24  performs an inversely discrete cosine transform matrix calculation for the DCT coefficients which are supplied from the IQ  23  and outputs the differential picture signal to the adder  25 .  
         [0080]    The adder  25  adds the differential picture signal which is supplied from the IDCT  24  and the picture signal which is supplied from the motion compensator  27 , which will be explained later, and outputs the resultant signal to the frame memory  26  and to the subtractor  31  of the encoding portion  2 B.  
         [0081]    The frame memory portion  26  stores the picture signal which is supplied from the adder  25  for about a frame period.  
         [0082]    The motion compensator  27  performs a motion compensation process for the picture signal stored in the frame memory portion  26  on the basis of the encoding parameters  201  which are supplied from the VLD  22  and outputs the resultant picture signal to the adder  25 .  
         [0083]    In addition, the motion compensator  27  outputs encoding parameters  202  to the motion predictor/compensator  38  of the encoding portion  2 B.  
         [0084]    Next, the operation of the encoding portion  2 B will be explained.  
         [0085]    When the picture signal that is supplied from the adder  25  is a P (Predictive) picture or a B (Bidirectionally-predictive) picture, the subtractor  31  subtacts a predicted signal which is supplied from the motion predictor/compensator  38 , which will be explained later, from the picture signal which is supplied from the adder  25  and outputs the resultant signal to the DCT  32 . In contrast, when the picture signal which is supplied from the adder  25  is an I (Intra) picture, the subtractor  31  directly outputs the input picture signal to the DCT  32 .  
         [0086]    The DCT  32  performs a discrete cosine transform matrix calculation for the picture signal which is supplied from the subtractor  31  and outputs the resultant DCT coefficients to the Q  33 .  
         [0087]    The Q  33  performs a quantizing calculation for the DCT coefficients which are input from the DCT  32  and outputs the resultant quantized DCT coefficients to the VLC  39  and the IQ  34 .  
         [0088]    The quantization characteristics such as a quantization step of the Q  33  is controlled by the rate controller  41 B.  
         [0089]    The IQ  34  performs an inversely quantizing calculation for the quantized DCT coefficients which are supplied from the Q  33  and outputs the resultant DCT coefficients to the IDCT  35 .  
         [0090]    The IDCT  35  performs an inversely discrete cosine transform matrix calculation for the DCT coefficients which are supplied from the IQ  34 . When the input picture signal is of a P picture or a B picture, the IDCT  35  outputs a prediction error signal to the adder  36 . When the input picture signal is of an I picture, the IDCT portion  35  outputs an encoded picture signal to the adder  36 .  
         [0091]    When the picture signal that is output from the IDCT  35  is of a P picture or a B picture, the adder  36  adds the picture signal which is supplied from the IDCT  35  and the prediction error signal supplied from the motion predictor/compensator  38  and outputs the resultant signal to the frame memory  37 . In contrast, when the picture signal which is supplied from the IDCT portion  35  is of an I picture, the adder  36  directly supplies the picture signal which is supplied from the IDCT  35  to the frame memory portion  37 .  
         [0092]    The frame memory  37  stores the picture signal which is supplied from the adding portion  36  for about a frame period.  
         [0093]    The motion predictor/compensator  38  performs a motion prediction process for the picture signal supplied from adder  25  and a motion compensation process for the picture signal which is stored in the frame memory portion  37  on the basis of the encoding parameters  202  which are supplied from the motion compensator  27 , generates a motion-compensated predicted picture signal, and outputs the motion-compensated predicted picture signal to the subtractor  31  and the adder  36 .  
         [0094]    In addition, the motion predictor/compensator  38  outputs encoding parameters  203  to the VLC  39 .  
         [0095]    The VLC  39  performs an entropy encoding process such as a variable length encoding process or a run length encoding process for the quantized DCT coefficients which are supplied from the Q portion  33  and the encoding parameters  203  which are supplied from the motion predictor/compensator  38  and outputs the resultant encoded signal to the buffer  40 .  
         [0096]    The buffer  40  temporally stores the encoded signal which is supplied from the VLC  39  and outputs the encoded signal as a bitstream to an external device.  
         [0097]    The rate controller  41 B monitors the occupancy rate of the buffer  40  and controls the quantizing characteristics of the Q  33  on the basis of to the occupancy rate.  
         [0098]    In addition, the rate controller  41 B changes the rate controlling method on the basis of rate controller controlling information  104  which is supplied from the encoder controller  61 B, which will be explained later. When the rate controlling method is changed, the calculation process amount of the rate controller  41 B varies.  
         [0099]    Next, the operation of the transcoder controlling portion  3 B will be explained.  
         [0100]    The decoder monitor  51 B monitors the occupancy rate of the buffer  21 B of the decoding portion  1 B and outputs decoder state information  102  to the decider  71  on the basis of the buffer occupancy rate information  101 .  
         [0101]    The decider  71  decides the calculation process amount of the rate controller  41 B of the encoding portion  2 B on the basis of the decoder state information  102  so as to suppress the fluctuation of the occupancy rate of the buffer  21 B.  
         [0102]    When the occupancy rate of the buffer  21 B is greater than a reference value or a target value, the decider  71  outputs encoder controlling information  103  to the encoder controller  61 B so that the encoder controller  61 B causes the rate controller  41 B to decrease the process amount.  
         [0103]    When the process amount of the rate controller  41 B of the encoding portion  2 B is decreased, the occupancy rate of the buffer  21 B is decreased, because the share of the calculation time of the decoding portion  1 B is relatively increased in the entire calculation time of the apparatus, provided that the decoding portion  1 B and the encoding portion  2 B share a calculating device such as a DSP or a CPU on time division basis.  
         [0104]    In contrast, when the occupancy rate of the buffer  21 B is less than the reference value or the target value or when an underflow takes place because of the occupancy rate having approached zero, the decider  71  outputs encoder controlling information  103  to the encoder controller  61 B so that the encoder controller  61 B causes the rate controller  41 B to increase the process amount.  
         [0105]    When the process amount of the rate controller  41 B of the encoding portion  2 B is increased, the occupancy rate of the buffer  21 B is increased, because the share of the calculation time of the decoding portion  1 B is relatively decreased in the entire calculation time of the apparatus.  
         [0106]    In addition, when the process amount of the rate controller  41 B is increased, there is caused other effects that the picture quality is improved and the amount of generated codes decreases.  
         [0107]    In order to vary the process amount of the rate controlling process, the method for the rate controlling process is changed.  
         [0108]    Characteristics, such as complexity and effects, of typical rate controlling method vary. Thus, by switching from one method to another method, the process amount of the rate controlling process is varied.  
         [0109]    The process amount of the rate controlling process is varied (1) when changing a method for using a history of the amount of generated codes, (2) when changing a method for using the distribution of the AC powers of DCT coefficients, (3) when changing a period of updating quaitization steps, (4) when changing the accuracy of calculations, and so forth.  
         [0110]    When the encoder controlling information  103  is supplied from the decider  71  to the encoder controller  61 B, the controller  61 B outputs rate controller controlling information  104  to the rate controller  41 B of the encoding portion  2 B.  
         [0111]    (Third Embodiment)  
         [0112]    Next, with reference to FIG. 4, a third embodiment of the present invention will be explained.  
         [0113]    Referring to FIG. 4, the third embodiment of the present invention comprises a decoding portion  1 B, an encoding portion  2 C, and a transcoder controlling portion  3 C. The decoding portion  1 B comprises buffer  21 B. The encoding portion  2 C comprises motion predictor/compensator  38 B. The transcoder controlling portion  3 C comprises decoder monitor  51 B, encoder controller  61 C, and decider  71 .  
         [0114]    The decoding portion  1 B further comprises VLD (Variable Length Decoder)  22 , IQ (Inversely Quantizer)  23 , IDCT (Inversely Discrete Cosine Transformer)  24 , adder  25 , frame memory  26 , and motion compensator  27 . The encoding portion  2 C further comprises subtractor  31 , DCT (Discrete Cosine Transformer)  32 , Q (Quantizer)  33 , IQ  34 , IDCT  35 , adder  36 , frame memory  37 , VLC (Variable Length Coder)  39 , buffer  40 , and rate controller  41 .  
         [0115]    Next, with reference to FIG. 4, the operation of the picture encoding format converting apparatus according to the third embodiment will be explained.  
         [0116]    The operation of the decoding portion  1 B according to the third embodiment is the same as that according to the second embodiment.  
         [0117]    Next, the operation of the encoding portion  2 C will be explained.  
         [0118]    The operations of the subtractor  31 , the DCT  32 , the Q  33 , the IQ  34 , the IDCT  35 , the adder  36 , the frame memory  37 , the VLC  39 , and the buffer  40  according to the third embodiment are the same as those according to the second embodiment.  
         [0119]    The motion predictor/compensator  38 B performs a motion prediction process for the picture signal supplied from adder  25  and a motion compensation process for a picture signal stored in the frame memory  37  on the basis of motion predictor/compensator controlling information  105  which is supplied from the encoder controller  61 C, which will be explained later, and encoding parameters  202  which are supplied from the motion compensator  27 , generates a motion-compensated picture signal, and outputs the resultant picture signal to the subtractor  31  and the adder  36 .  
         [0120]    The motion predictor/compensator  38 B outputs the encoding parameters  203  to the VLC  39 .  
         [0121]    The rate controller  41  monitors the buffer  40  and controls the quantizing characteristics of the Q  33  on the basis of the monitored result.  
         [0122]    Next, the operation of the transcoder controlling portion  3 C will be explained.  
         [0123]    The decoder monitor  51 B monitors the occupancy rate of the buffer  21 B of the decoding portion  1 B and outputs decoder state information  102  to the decider  71  on the basis of the occupancy rate information  101 .  
         [0124]    The decider  71  decides the operation of the motion predictor/compensator  38 B of the encoding portion  2 C on the basis of the decoder state information  102  so as to suppress the occupancy rate of the buffer  21 B from fluctuating.  
         [0125]    When the occupancy rate of the buffer  21 B is greater than a reference value or a target value, the decider  71  outputs encoder controlling information  103  to the encoder controller  61 C so that the encoder controller  61 C causes the motion predictor/compensator  38 B to decrease the process amount.  
         [0126]    When the process amount of the motion predictor/compensator  38 B of the encoding portion  2 C is decreased, the occupancy rate of the buffer  21 B is decreased, because the share of the calculation time of the decoding portion  1 B is relatively increased in the calculation time of the entire apparatus, provided that the decoding portion  1 B and the encoding portion  2 B share a calculating device such as a DSP or a CPU on time division basis.  
         [0127]    In contrast, when the occupancy rate of the buffer  21 B is less than the reference value or the target value or when an underflow takes place because of the occupancy rate of the buffer having approached zero, the decider  71  outputs encoder controlling information  103  to the encoder controller  61 B so that the encoder controller  61 B causes the motion predictor/compensator  38 B to increase the process amount.  
         [0128]    When the process amount of the motion predictor/compensator  38 B of the encoding portion  2 C is increased, the occupancy rate of the buffer  21 B is increased, because the share of the calculation time of the decoding portion  1 B is relatively decreased in the calculation time of the entire apparatus.  
         [0129]    In addition, when the process amount of the motion predictor/compensator  38 B is increased, there is caused other effects that the picture quality is improved and the amount of generated codes decreases.  
         [0130]    In order to vary the process amount of the motion predictor/compensator  38 B, a search range in which a motion vector is predicted is changed.  
         [0131]    When the picture encoding format is converted, a motion vector supplied from decoding portion  1 B can be reused in encoding portion  2 C.  
         [0132]    The fluctuation of the picture quality in a case where the search range is varied while reusing a motion vector is less than that in a case where the search range is varied while not using the motion vector, provided that the same amount of codes is generated.  
         [0133]    Therefore, when the search range is decreased, the deterioration of the picture quality in the case where a motion vector is reused is less than that in the case where the motion vector is not reused.  
         [0134]    Another method for varying the process amount of the motion predictor/compensator  38 B is based on an abortion of motion prediction as follows: A threshold value is designated against an evaluation function, such as an MAE (Mean Absolute Error) or an MSE (Mean Square Error), at a search point obtained during a motion prediction. The evaluation function value and the threshold value are compared. When the evaluation function value is greater than the threshold value, the motion prediction is aborted.  
         [0135]    In this case, if a large threshold value is designated, the process amount of the motion prediction is decreased. In contrast, when a small threshold value is designated, the process amount for the motion prediction is increased.  
         [0136]    The above-mentioned method for controlling the process amount of the motion prediction may be combined with another method for controlling the process amount of the motion prediction.  
         [0137]    When encoder controlling information  103  is supplied from the decider  71  to the encoder controller  61 C, the controller  61 C outputs motion predictor/compensator controlling information  105  to the motion predictor/compensator  38 B.  
         [0138]    (Fourth Embodiment)  
         [0139]    Next, with reference to FIG. 5, a fourth embodiment of the present invention will be explained.  
         [0140]    Referring to FIG. 5, the fourth embodiment of the present invention comprises decoding portion  1 B, encoding portion  2 D, and transcoder controlling portion  3 D. The decoding portion  1 B comprises buffer  21 B. The encoding portion  2 D comprises motion predictor/compensator  38 B and rate controller  41 B. The transcoder controlling portion  3 D comprises decoder monitor  51 B, encoder controller  61 D, and decider  71 .  
         [0141]    The decoding portion  1 B further comprises VLD (Variable Length Decoder)  22 , IQ (Inversely Quantizer)  23 , IDCT (Inversely Discrete Cosine Transformer)  24 , adder  25 , frame memory  26 , and motion compensator  27 . The encoding portion  2 D further comprises subtractor  31 , DCT (Discrete Cosine Transformer)  32 , Q (Quantizer)  33 , IQ  34 , IDCT  35 , adder  36 , frame memory  37 , VLC (Variable Length Coder)  39 , and buffer  40 .  
         [0142]    Next, with reference to FIG. 5, the operation of the picture encoding format converting apparatus according to the fourth embodiment will be explained.  
         [0143]    The operation of the decoding portion  1 B according to the fourth embodiment is the same as that according to the second embodiment.  
         [0144]    Next, the operation of the encoding portion  2 D according to the fourth embodiment will be explained.  
         [0145]    The operations of subtractor  31 , the DCT  32 , the Q  33 , the IQ  34 , the IDCT  35 , the adder  36 , the frame memory  37 , the VLC  39 , and the buffer  40  according to the fourth embodiment are the same as those according to the second embodiment.  
         [0146]    The motion predictor/compensator  38 B performs a motion detecting process for the picture supplied from adder  25  and a motion compensation predicting process for the picture signal stored in the frame memory portion  37  on the basis of motion predictor/compensator controlling information  105  which is supplied from the encoder controller  61 D, which will be explained later, and encoding parameters  202  which are supplied from the motion compensator  27 , generates a motion compensation predicted picture signal, and outputs the generated picture signal to the subtractor  31  and the adder  36 .  
         [0147]    The motion predictor/compensator  38 B outputs the encoding parameters  203  to the VLC  39 .  
         [0148]    The rate controller  41 B monitors the buffer  40  and controls quantizing characteristics of the Q  33  on the basis of the state of the buffer  40  and rate controller controlling information  104  which is supplied from the encoder controller  61 D, which will be explained later.  
         [0149]    The rate controller  41 B changes the rate controlling method on the basis of the rate controller controlling information  104  which is supplied from the encoder controller  61 D, which will be explained later.  
         [0150]    Next, the operation of the transcoder controlling portion  3 D will be explained.  
         [0151]    The decoder monitor  51 B monitors the occupancy rate of the buffer  21 B of the decoding portion  1 B and outputs decoder state information  102  to the decider  71  on the basis of the buffer occupancy rate information  101 .  
         [0152]    The decider  71  decides the operations of the rate controller  41 B and the motion predictor/compensator  38 B of the encoding portion  2 D on the basis of the decoder state information  102  so as to suppress the occupancy rate of the buffer  21 B from fluctuating.  
         [0153]    When the occupancy rate of the buffer  218  is greater than a predetermined reference value or target value, the decider  71  outputs encoder controlling information  103  to the encoder controller  61 D so as to decrease the process amount for the encoding portion  2 D.  
         [0154]    Corresponding to the encoder controlling information  103 , the decider  71  selects one of three methods, i.e. (1) a method for decreasing the process amount of only the rate controller  41 B, (2) a method for decreasing the process amount of only the motion predictor/compensator  38 B, and (3) a method for decreasing the process amounts for both the rate controller  41 B and the motion predictor/compensator  38 B.  
         [0155]    When the process amount of the encoding portion  2 D is decreased, the occupancy rate of the buffer  218  is decreased, because the share of the calculation time of the decoding portion  1  is relatively increased in calculation time of the entire apparatus, provide that the decoding portion  1 B and the encoding portion  2 D share a calculating device such as a DSP or a CPU on time division basis.  
         [0156]    In contrast, when the occupancy rate of the buffer  218  is less than the predetermined reference value or the target value or when an underflow takes place because of the occupancy rate of the buffer having approached zero, the decider  71  outputs the encoder controlling information  103  to the encoder controller  61 D so that the encoder controller  61 D causes the encoding portion  2 D to increase the process amount.  
         [0157]    Corresponding to the encoder controlling information  103 , the decider  71  can select one of three methods, i.e. (1) a method for increasing the process amount of only the rate controller  41 B, (2) a method for increasing the process amount of only the motion predictor/compensator  38 B, and (3) a method for increasing the process amounts for both the rate controller  41 B and the motion predictor/compensator  38 B.  
         [0158]    When the process amount of the encoding portion  2 D is increased, the occupancy rate of the buffer  21 B is increased, because the share of the calculation time of the decoding portion  1 B is relatively decreased in the calculation time of the entire apparatus.  
         [0159]    When the encoder controlling information  103  is input from the decider  71  to the encoder controller  61 D, the encoder controller  61 D outputs rate controller controlling information  104  to the rate controller  41 B of the encoding portion  2 D and/or motion predictor/compensator controlling information  105  to the motion predictor/compensator  38 B of the encoding portion  2 D.  
         [0160]    (Fifth Embodiment)  
         [0161]    Next, with reference to FIG. 6, the fifth embodiment of the present invention will be explained.  
         [0162]    Referring to FIG. 6, the fifth embodiment of the present invention comprises decoding portion  1 C, encoding portion  2 B, and transcoder controlling portion  3 E. The decoding portion  1 C comprises VLD (Variable Length Decoder)  22 B. The encoding portion  2 B comprises rate controller  41 B. The transcoder controlling portion  3 E comprises decoder monitor  51 C, encoder controller  61 B, and decider  71 .  
         [0163]    The decoding portion  1 C further comprises buffer  21 , IQ (Inversely Quantizer)  23 , IDCT (Inversely Discrete Cosine Transformer)  24 , adder  25 , frame memory  26 , and motion compensator  27 . The encoding portion  2 B further comprises subtractor  31 , DCT (Discrete Cosine Transformer)  32 , Q (Quantizer)  33 , IQ  34 , IDCT  35 , adder  36 , frame memory  37 , motion predictor/compensator  38 , VLC (Variable Length Coder) portion  39 , and buffer  40 .  
         [0164]    Next, with reference to FIG. 6, the operation of the picture encoding format converting apparatus according to the fifth embodiment of the present invention will be explained.  
         [0165]    First of all, the operation of the decoding portion  1 C will be explained.  
         [0166]    The operations of the IQ portion  23 , the IDCT portion  24 , the adder  25 , the frame memory  26 , and the motion compensator  27  according to the fifth embodiment are the same as those according to the second embodiment. The operation of the buffer  21  according to the fifth embodiment is the same as the operation of the buffer  21 B except that the buffer  21  does not output the buffer occupancy rate information  101 .  
         [0167]    The VLD  22 B performs an entropy decoding process such as a variable length decoding process or a run length decoding process for a bitstream which is supplied from the buffer  21  and outputs decoded quantized DCT coefficients to the IQ  23 .  
         [0168]    In addition, the VLD  22 B decodes and outputs encoding parameters  201  such as a motion vector and a prediction mode to the motion compensator  27 . Moreover, the VLD  22 B outputs encoding parameters  106  to the decoder monitor  51 C.  
         [0169]    The operation of the encoding portion  2 B according to the fifth embodiment is the same as the operation of the encoding portion  2 B according to the second embodiment.  
         [0170]    Next, the operation of the transcoder controlling portion  3 E will be explained.  
         [0171]    The decoder monitor  51 C calculates how much process amount the decoding portion  1 C requires to decode a predetermined unit picture on the basis of encoding parameters  106  and outputs the result as decoder state information  102  to the decider  71 .  
         [0172]    The process amount for the decoding portion  1 C is calculated on the basis of the number of macro blocks for which a motion compensation process is performed, the number of macro blocks for which an IDCT process is performed, the number of macro blocks, each of which has difference data between the current frame and the immediately preceding frame, or the like.  
         [0173]    On the basis of the decoder state information  102 , the decider  71  outputs encoder controlling information  103  to the encoder controller  61 B so that the encoding portion  2 B is assigned with a residual performance which is obtained by subtracting the performance needed by the decoding portion  1 C from the performance assigned to the decoding portion  1 C and the encoding portion  2 B in common.  
         [0174]    In other words, the decider  71  controls the encoder controller  61 B so that the process amount for the entire picture encoding format converting apparatus is kept constant in such a manner that when the process amount for the decoding portion  1 C becomes large, the process amount for the encoding portion  2 B is decreased and that when the process amount for the decoding portion  1 C becomes small, the process amount for the encoding portion  2 B is increased, provided that the decoding portion  1 C and the encoding portion  2 B share a calculating device such as a DSP or a CPU on time division basis.  
         [0175]    Thus, since the calculation amount for decoding and encoding a predetermined number of macro blocks becomes constant, the delay time caused in the entire picture encoding format converting apparatus is kept constant.  
         [0176]    When the encoder controlling information  103  is supplied from the decider  71  to the encoder controller  61 B, encoder controller  61 B outputs rate controller controlling information  104  to the rate controller  41 B of the encoding portion  2 B.  
         [0177]    (Sixth Embodiment)  
         [0178]    Next, with reference to FIG. 7, a sixth embodiment of the present invention will be explained.  
         [0179]    Referring to FIG. 7, the sixth embodiment of the present invention comprises decoding portion  1 C, encoding portion  2 C, and transcoder controlling portion  3 F. The decoding portion  1 C comprises VLD (Variable Length Decoder)  22 B. The encoding portion  2 C comprises motion predictor/compensator  38 B. The transcoder controlling portion  3 F comprises decoder monitor  51 C, encoder controller  61 C, and decider  71 .  
         [0180]    The decoding portion  1 C further comprises buffer  21 , IQ (Inversely Quantizer)  23 , IDCT (Inversely Discrete Cosine Transformer)  24 , adder  25 , frame memory  26 , and motion compensator  27 . The encoding portion  2 C further comprises subtractor  31 , DCT (Discrete Cosine Transformer)  32 , Q (Quantizer)  33 , IQ  34 , IDCT  35 , adder  36 , frame memory  37 , VLC (Variable Length Coder)  39 , buffer  40 , and rate controller  41 .  
         [0181]    Next, with reference to FIG. 7, the operation of the picture encoding format converting apparatus according to the sixth embodiment of the present invention will be explained.  
         [0182]    The operation of the decoding portion  1 C according to the sixth embodiment is the same as that according to the fifth embodiment.  
         [0183]    The operation of the encoding portion  2 C according to the sixth embodiment is the same as that according to the third embodiment.  
         [0184]    Next, the operation of the transcoder controlling portion  3 F will be explained.  
         [0185]    The decoder monitor  51 C calculates how much process amount the decoding portion  1 C requires to decode a predetermined unit on the basis of encoding parameters  106  and outputs the result as decoder state information  102  to the decider  71 .  
         [0186]    The decider  71  outputs encoder controlling information  103  to the encoder controller  61 C on the basis of decoder state information  102  so that the encoding portion  2 C is assigned with a residual performance which is obtained by subtracting the performance needed by the decoding portion  1 C from the performance assigned to the decoding portion  1 C and the encoding portion  2 C in common.  
         [0187]    In other words, the decider  71  controls the encoder controller  61 C so that the process amount for the entire picture encoding format converting apparatus is kept constant in such a manner that when the process amount for the decoding portion  1 C becomes large, the process amount for the encoding portion  2 C is decreased and that when the process amount for the decoding portion  1 C becomes small, the process amount for the encoding portion  2 C is increased, provided that the decoding portion  1 C and the encoding portion  2 C share a calculating device such as a DSP or a CPU on time division basis.  
         [0188]    Thus, since the calculation amount for decoding and encoding a predetermined number of macro blocks becomes constant, the delay time caused in the entire picture encoding format converting apparatus is kept constant.  
         [0189]    When the encoder controlling information  103  is supplied from the decider  71  to the encoder controller  61 C, the encoder controller  61 C outputs motion predictor/compensator controlling information  105  to the motion predictor/compensator  38 B of the encoding portion  2 C.  
         [0190]    (Seventh Embodiment)  
         [0191]    Next, with reference to FIG. 8, the seventh embodiment of the present invention will be explained.  
         [0192]    Referring to FIG. 8, the seventh embodiment of the present invention comprises decoding portion  1 C, encoding portion  2 D, and transcoder controlling portion  3 G. The decoding portion  1 C comprises VLD (Variable Length Decoder)  22 B. The encoding portion  2 D comprises motion predictor/compensator  38 B and rate controller  41 B. The transcoder controlling portion  3 G comprises decoder monitor  51 C, encoder controller  61 D, and decider  71 .  
         [0193]    The decoding portion  1 C further comprises buffer  21 , IQ (Inversely Quantizer)  23 , IDCT (Inversely Discrete Cosine Transformer)  24 , adder  25 , frame memory  26 , and motion compensator  27 . The encoding portion  2 D further comprises subtractor  31 , DCT (Discrete Cosine Transformer)  32 , Q (Quantizer)  33 , IQ  34 , IDCT  35 , adder  36 , frame memory  37 , VLC (Variable Length Coder)  39 , and buffer  40 .  
         [0194]    Next, with reference to FIG. 8, the operation of the picture encoding format converting apparatus according to the seventh embodiment of the present invention will be explained.  
         [0195]    The operation of the decoding portion  1 C according to the seventh embodiment is the same as that according to the fifth embodiment.  
         [0196]    The operation of the encoding portion  2 D according to the seventh embodiment is the same as that according to the fourth embodiment.  
         [0197]    Next, the operation of the transcoder controlling portion  3 G will be explained.  
         [0198]    The decoder monitor  51 C calculates how much process amount the decoding portion  1 C requires to decode a predetermined unit picture on the basis of encoding parameters  106  and outputs the result as decoder state information  102  to the decider  71 .  
         [0199]    The decider  71  outputs encoder controlling information  103  to the encoder controller  61 D on the basis of decoder state information  102  so that the encoding portion  2 B is assigned with a residual performance which is obtained by subtracting the performance needed by the decoding portion  1 C from the performance assigned to the decoding portion  1 C and the encoding portion  2 B in common, provided that the decoding portion  1 C and the encoding portion  2 D share a calculating device such as a DSP or a CPU on time division basis.  
         [0200]    In other words, the decider  71  controls the encoder controller  61 D so that the process amount for the entire picture encoding format converting apparatus is kept constant in such a manner that when the process amount for the decoding portion  1 C becomes large, the process amount for the encoding portion  2 D is decreased and that when the process amount for the decoding portion  1 C becomes small, the process amount for the encoding portion  2 D is increased.  
         [0201]    Thus, since the calculation amount for decoding and encoding a predetermined number of macro blocks becomes constant, the delay time caused in the entire picture encoding format converting apparatus is kept constant.  
         [0202]    Like the fourth embodiment, when the encoder controlling information  103  is supplied from the decider  71  to the encoder controller  61 D, the encoder controller  61 D outputs rate controller controlling information  104  and/or motion predictor/compensator controlling information  105  to the rate controller  41 B and/or the motion predictor/compensator  38 B of the encoding portion  2 D.  
         [0203]    (Eighth Embodiment)  
         [0204]    Next, with reference to FIG. 9, an eighth embodiment of the present invention will be explained.  
         [0205]    Referring to FIG. 9, the eighth embodiment of the present invention comprises decoding portion  1 D, encoding portion  2 B, and transcoder controlling portion  3 H. The decoding portion  1 D comprises buffer  21 B and VLD (Variable Length Decoder)  22 B. The encoding portion  2 B comprises rate controller  41 B. The transcoder controlling portion  3 H comprises decoder monitor  51 D, encoder controller  61 B, and decider  71 .  
         [0206]    The decoding portion  1 D further comprises IQ (Inversely Quantizer)  23 , IDCT (Inversely Discrete Cosine Transformer)  24 , adder  25 , frame memory  26 , and motion compensator  27 . The encoding portion  2 B further comprises subtractor  31 , DCT (Discrete Cosine Transformer)  32 , Q (Quantizer)  33 , IQ  34 , IDCT  35 , adder  36 , frame memory  37 , motion predictor/compensator  38 , VLC (Variable Length Coder)  39 , and buffer  40 .  
         [0207]    Next, with reference to FIG. 9, the operation of the picture encoding format converting apparatus according to the eighth embodiment of the present invention will be explained.  
         [0208]    Next, the operation of the decoding portion  1 D will be explained.  
         [0209]    The operations of the buffer  21 B, the IQ portion  23 , the IDCT portion  24 , the adder  25 , the frame memory  26 , and the motion compensator  27  according to the eighth embodiment are the same as those according to the second embodiment.  
         [0210]    The operation of the VLD  22 B according to the eighth embodiment is the same as that according to the fifth embodiment.  
         [0211]    The operation of the encoding portion  2 B according to the eighth embodiment is the same as that according to the second embodiment.  
         [0212]    Next, the operation of the transcoder controlling portion  3 H will be explained.  
         [0213]    The decoder monitor  51 D monitors the occupancy rate of the buffer  21  of the decoding portion  1 D.  
         [0214]    In addition, the decoder monitor  51 D calculates how much process amount the decoding portion  1 D requires to decode a predetermined unit picture on the basis of encoding parameters  106  which are supplied from the VLD  22 B.  
         [0215]    The decoder monitor  51 D outputs decoder state information  102  to the decider  71  on the basis of both buffer occupancy rate information  101  and encoding parameters  106 .  
         [0216]    The decider  71  decides the operation of the rate controller  41 B of the encoding portion  2 B corresponding to the decoder state information  102  so as to suppress the occupancy rate of the buffer  21 B from fluctuating and keep the process amount for the entire picture encoding format converting apparatus constant.  
         [0217]    When encoder controlling information  103  is supplied from the decider  71  to the encoder controller  61 B, the encoder controller  61 B outputs rate controller controlling information  104  to the rate controller  41  of the encoding portion  2 B.  
         [0218]    (Ninth Embodiment)  
         [0219]    Next, with reference to FIG. 10, a ninth embodiment of the present invention will be explained.  
         [0220]    Referring to FIG. 10, the ninth embodiment of the present invention comprises decoding portion  1 D, encoding portion  2 C, and transcoder controlling portion  3 J. The decoding portion  1 D comprises buffer  21 B and VLD (Variable Length Decoder)  22 B. The encoding portion  2 C comprises motion predictor/compensator  38 B. The transcoder controlling portion  3 J comprises decoder monitor  51 D, encoder controller  61 C, and decider  71 .  
         [0221]    The decoding portion  1 D further comprises IQ (Inversely Quantizer)  23 , IDCT (Inversely Discrete cosine Transformer)  24 , adder  25 , frame memory  26 , and motion compensator  27 . The encoding portion  2 C further comprises subtractor  31 , DCT (Discrete Cosine Transformer)  32 , Q (Quantizer)  33 , IQ  34 , IDCT  35 , adder  36 , frame memory  37 , VLC (Variable Length Coder)  39 , buffer  40 , and rate controller  41 .  
         [0222]    Next, with reference to FIG. 10, the operation of the picture encoding format converting apparatus according to the ninth embodiment of the present invention will be explained.  
         [0223]    First of all, the operation of the decoding portion  1 D will be explained.  
         [0224]    The operations of the buffer  21 B, the IQ  23 , the IDCT  24 , the adder  25 , the frame memory  26 , and the motion compensator  27  according to the ninth embodiment are the same as those according to the second embodiment.  
         [0225]    The operation of the VLD  22 B according to the ninth embodiment is the same as that according to the fifth embodiment.  
         [0226]    The operation of the encoding portion  2  according to the ninth embodiment is the same as that according to the third embodiment.  
         [0227]    Next, the operation of the transcoder controlling portion  3 J will be explained.  
         [0228]    The decoder monitor  51 D monitors the occupancy rate of the buffer  21 B of the decoding portion  1 D.  
         [0229]    The decoder monitor  51 D calculates how much process amount the decoding portion  1 D requires to decode a predetermined unit picture on the basis of encoding parameters  106  which are supplied from the VLD portion  22 B of the decoding portion  1 D.  
         [0230]    The decoder monitor  51 D outputs decoder state information  102  to the decider  71  on the basis of both buffer occupancy rate information  101  and encoding parameters  106 .  
         [0231]    The decider  71  decides the operation of the motion predictor/compensator  38 B of the encoding portion  2 C on the basis of the decoder state information  102  so as to suppress the occupancy rate of the buffer  21 B from fluctuating and keep the process amount for the entire picture encoding format converting apparatus constant.  
         [0232]    When encoder controlling information  103  is supplied from the decider  71  to the encoder controller  61 C, the encoder controller  61 C outputs motion predictor/compensator controlling information  105  to the motion predictor/compensator  38 B of the encoding portion  2 C.  
         [0233]    (Tenth Embodiment)  
         [0234]    Next, with reference to FIG. 11, a tenth embodiment of the present invention will be explained.  
         [0235]    Referring to FIG. 11, the tenth embodiment of the present invention comprises decoding portion  1 D, encoding portion  2 D, and transcoder controlling portion  3 K. The decoding portion  1 D comprises buffer  21 B and a VLD (Variable Length Decoder)  22 B. The encoding portion  2 D comprises motion predictor/compensator  38 B and rate controller  41 B. The transcoder controlling portion  3 K comprises decoder monitor  51 D, encoder controller  61 D, and decider  71 .  
         [0236]    The decoding portion  1 D further comprises IQ (Inversely Quantizer)  23 , an IDCT (Inversely Discrete Cosine Transformer)  24 , adder  25 , frame memory  26 , and motion compensator  27 . The encoding portion  2 D further comprises subtactor  31 , DCT (Discrete Cosine Transformer)  32 , Q (Quantizer)  33 , IQ  34 , IDCT  35 , adder  36 , frame memory  37 , VLC (Variable Length Coder)  39 , and buffer  40 .  
         [0237]    Next, with reference to FIG. 11, the operation of the picture encoding format converting apparatus according to the tenth embodiment of the present invention will be explained.  
         [0238]    First of all, the operation of the decoding portion  1 D will be explained.  
         [0239]    The operations of the buffer  21 B, the IQ  23 , the IDCT  24 , the adder  25 , the frame memory  26 , and the motion compensator  27  according to the tenth embodiment are the same as those according to the second embodiment.  
         [0240]    The operation of the VLD  22 B according to the tenth embodiment is the same as that according to the fifth embodiment.  
         [0241]    The operation of the encoding portion  2 D according to the tenth embodiment is the same as that according to the fourth embodiment.  
         [0242]    Next, the operation of the transcoder controlling portion  3 K will be explained.  
         [0243]    The decoder monitor  51 D monitors the occupancy rate of the buffer  21 B of the decoding portion  1 D.  
         [0244]    The decoder monitor  51 D calculates how much process amount the decoding portion  1 D requires to decode a predetermined unit picture on the basis of encoding parameters  106  which are supplied from the VLD portion  22 B of the decoding portion  1 D.  
         [0245]    The decoder monitor  51 D outputs decoder state information  102  to the decider  71  on the basis of both buffer occupancy rate information  101  and the encoding parameters  106 .  
         [0246]    The decider  71  decides the operations of the rate controller  41 B and the motion predictor/compensator  38 B of the encoding portion  2 C on the basis of the decoder state information  102  so as to suppress the occupancy rate of the buffer  21 B from fluctuating and keep the process amount for the entire picture encoding format converting apparatus constant.  
         [0247]    Like the fourth embodiment, when encoder controlling information  103  is supplied from the decider  71  to the encoder controller  61 D, the encoder controller  61 D outputs rate controller controlling information  104  and/or motion predictor/compensator controlling information  105  to the rate controller  41 B and/or the motion predictor/compensator  38 B of the encoding portion  2 D.  
         [0248]    As was explained above, according to the present invention, since the occupancy rate of the input buffer of the picture encoding format converting apparatus is controlled, the delay which takes place in the input buffer can be decreased.  
         [0249]    In addition, according to the present invention, since the entire process amount of the decoding portion and the encoding portion can be controlled, the calculation amount for encoding and decoding a predetermined number of macro blocks becomes constant. Thus, the picture encoding format converting apparatus can be controlled so that the process time thereof becomes constant.  
         [0250]    Further, according to the present invention, the encoding method can be dynamically and flexibly changed corresponding to the network state and picture state.  
         [0251]    Still further, according to the present invention, the process performance of the picture encoding format converting apparatus can be fully used.  
         [0252]    Although the present invention has been shown and explained with respect to the best mode embodiment thereof, it should be understood by those skilled in the art that the foregoing and various other changes, omissions, and additions in the form and detail thereof may be made therein without departing from the spirit and scope of the present invention.