Abstract:
A method for distributing power in an electronic system, comprising receiving power in a first domain at a system power supply converting the power to a second domain having alternating current (AC) signal components at a plurality of frequencies, and transmitting the converted power in the second domain with AC signal components at multiple frequencies to a plurality of AC voltage regulator modules (VRM) of the electronic system. The method further comprises receiving a feeedback signal from the plurality of AC VRM&#39;s and adjusting the AC signal components being transmitted to the plurality of VRM based at least in part of the feedback signal. The method further comprises receiving a control signal from a central processing unit (CPU) and adjusting the AC signal components being transmitted to the plurality of VRM based at least in psart on the control signal

Description:
FIELD OF THE INVENTION  
         [0001]    The present invention relates to the field of power distribution in computer systems. More specifically, the present invention relates to an alternating current (AC) power distribution system.  
         BACKGROUND OF THE INVENTION  
         [0002]    One known approach used for distributing power from a power source to components on a computer system is the direct current (DC) power distribution system. The DC power distribution system typically includes a main power supply, voltage regulator modules, and connectors that couple the main power supply to the voltage regulator modules. The main power supply converts low frequency (approximately 50-60 Hz) AC power received from the power source into DC power. The main power supply then converts the DC power into high frequency AC power. The high frequency AC power is then stepped down, converted back to DC power, and filtered before being transmitted along a connector to a voltage regulator module corresponding to a component on the computer system. At the voltage regulator module (VRM), the DC power is converted to AC power, stepped down, converted to DC power and filtered before being delivered to a component on the computer system.  
           [0003]    A drawback of the DC distribution system was that it imposed dual conversion on the power conversion chain. Dual power conversion added complexity as well as cost and parts-count to the distribution system. Furthermore, the dual power conversion reduced the efficiency of the distribution system. In addition, today&#39;s computer systems are being designed with more stringent power specifications. These specifications require increased slew rates (change of current over time). Current DC distribution systems have experienced difficulties in reliably supporting these requirements.  
           [0004]    Additionally, the VRMs monitor the power output and regulates the power within the VRMs requiring controllers in the VRMs. Since each VRM has their own controller, the system does not have a centralized controller to regulate output power further adding complexity and circuitry. Another drawback of the known approach is that power to the processor is static and does not vary depending upon the power needs of the processor.  
         SUMMARY  
         [0005]    A method for distributing power in an electronic system includes receiving power on a first domain at a system power supply, converting the power to a second domain having an alternating current (AC) signal components at multiple frequencies, and transmitting the converted power in the second domain with AC signal components at multiple frequencies to multiple voltage regulator modules (VRM) in the electronic system.  
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0006]    The present invention is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings, in which the like references indicate similar elements and in which:  
         [0007]    [0007]FIG. 1 is a block diagram of a conventional direct current power distribution system;  
         [0008]    [0008]FIG. 2 is a block diagram of a computer system implementing an embodiment of the present invention;  
         [0009]    [0009]FIG. 3 is a block diagram illustrating an inverter system power supply according to an embodiment of the present invention;  
         [0010]    [0010]FIG. 4 is a block diagram illustrating an inverter system power supply according to an alternate embodiment of the present invention;  
         [0011]    [0011]FIG. 5 is a block diagram illustrating a post-regulator in an alternating current voltage regulator modulate according to an embodiment of the present invention; and  
         [0012]    [0012]FIG. 6 is a flow chart illustrating a method for distributing power according to an embodiment of the present invention.  
     
    
     DETAILED DESCRIPTION  
       [0013]    In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, those skilled in the art will understand that the present invention may be practiced without these specific details, that the present invention is not limited to the depicted embodiments, and that the present invention may be practiced in a variety of alternate embodiments. In other instances, well known methods, procedures, components, and circuits have not been described in detail.  
         [0014]    Parts of the description will be presented using terminology commonly employed by those skilled in the art to convey the substance of their work to others skilled in the art.  
         [0015]    Various operations will be described as multiple discrete steps performed in turn in a manner that is helpful in understanding the present invention. However, the order of description should not be construed as to imply that these operations are necessarily performed in the order they are presented, or even order dependent. Lastly, repeated usage of the phrase “in one embodiment” does not necessarily refer to the same embodiment, although it may.  
         [0016]    [0016]FIG. 1 illustrates a conventional direct current (DC) power distribution system  100  known in the prior art. The DC power distribution system  100  includes a main power supply  110  and a voltage regulator module  130 . The main power supply  110  receives power from a power source (not shown) and processes the power before transmitting it to a voltage regulator module  130 . The main power supply  110  includes a first rectifier unit  111  that receives power in a low frequency alternating current (AC) domain from the power source. The first rectifier unit  111  converts the AC power to DC power. A first filter unit  112  is coupled to the first rectifier unit  111 . The first filter unit  112  reduces ripple in the DC power and prevents transmission of noise generated by the main power supply  110 . A first switch unit  113  is coupled to the first filter unit  112 . The first switch unit  113  receives the DC power from the first filter unit  112  and converts the DC power to high frequency AC power. A first transformer  114  is coupled to the first switch unit  113 . The first transformer  114  receives the high frequency AC power from the first switch unit  113  and steps the high frequency AC power down to a lower voltage level. A second rectifier unit  115  is coupled to the first transformer  114 . The second rectifier unit  115  receives the high frequency AC power from the first transformer and converts the high frequency AC power to DC power. A second filter unit  116  is coupled to the second rectifier unit  115 . The second filter unit  116  receives the DC power from the second rectifier unit  115  and filters away noise from the DC power and transmits the DC power to the voltage regulator module  130 .  
         [0017]    The voltage regulator module  130  receives the DC power from the main power supply  110  and further regulates the power before transmitting the power to a component on a computer system (not shown). The voltage regulator module  130  includes a second switch unit  131 . The second switch unit  131  receives the DC power from the main power supply  110  and converts the DC power to AC power. A second transformer  132  is coupled to the second switch  131 . The second transformer receives the AC power from the second switch and steps the AC power down to a lower level. A third rectifier unit  133  is coupled to the second transformer. The third rectifier receives the AC power and converts it to DC power. A second filter unit  134  is coupled to the third rectifier unit  133 . The third filter unit  134  receives the DC power from the third rectifier unit  133  and filters away ripple from the DC power. The DC power is transmitted from the power regulator module  130  to a component requiring power.  
         [0018]    Since most computer systems require multiple voltages, transformer  114  is required to have multiple windings. Additional rectifiers and filters in the main power supply  110  would connect the power from the additional windings of the transformer to additional connectors that transmits the power to point of use or to additional voltage regulator modules.  
         [0019]    [0019]FIG. 2 illustrates a computer system  200  upon which an embodiment of the present invention can be implemented. The computer system  200  includes a processor  240  that processes data signals. The processor  240  may be a complex instruction set computer (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing a combination of instruction sets, or other processor device. FIG. 2 shows an example of the present invention implemented on a single processor computer system  200 . However, it is understood that the present invention may be implemented in a computer system having multiple processors. The processor  240  is coupled to a CPU bus  231  that transmits data signals between processor  240  and other components in the computer system  200 .  
         [0020]    The computer system  200  includes a memory  242 . The memory  242  may be a dynamic random access memory (DRAM) device, a synchronous direct random access memory (SDRAM) device, or other memory device. The memory  242  may store instructions and code represented by data signals that may be executed by the processor  240 .  
         [0021]    A bridge/memory controller  241  is coupled to the CPU bus  231  and the memory  242 . The bridge/memory controller  241  directs data signals between the processor  240 , the memory  242 , and other components in the computer system  200  and bridges the data signals between the CPU bus  231 , the memory  242 , and a first I/O bus  232 .  
         [0022]    The first I/O bus  232  may be a single bus or a combination of multiple buses. As an example, the first I/O bus  232  may comprise a Peripheral Component Interconnect (PCI) bus, a Personal Computer Memory Card International Association (PCMCIA) bus, a NuBus, or other buses. The first I/O bus  232  provides communication links between components in the computer system  200 . A network controller  243  is coupled to the first I/O bus  232 . The network controller  243  links the computer system  200  to a network of computers (not shown in FIG. 2) and supports communication among the machines. A display device controller  244  is coupled to the first I/O bus  232 . The display device controller  244  allows coupling of a display device (not shown) to the computer system  200  and acts as an interface between the display device and the computer system  200 . The display device controller  244  may be a monochrome display adapter (MDA) card, a color graphics adapter (CGA) card, an enhanced graphics adapter (EGA) card, an extended graphics array (XGA) card or other display device controller. The display device may be a television set, a computer monitor, a flat panel display or other display device. The display device receives data signals from the processor  240  through the display device controller  244  and displays the information and data signals to the user of the computer system  200 .  
         [0023]    A second I/O bus  233  may be a single bus or a combination of multiple buses. As an example, the second I/O bus  233  may comprise a PCI bus, a PCMCIA bus, a NuBus, an Industry Standard Architecture (ISA) bus, or other buses. The second I/O bus  233  provides communication links between components in the computer system  200 . A data storage device  246  is coupled to the second I/O bus  233 . The data storage device  246  may be a hard disk drive, a floppy disk drive, a CD-ROM device, a flash memory device or other mass storage device. A keyboard interface  247  is coupled to the second I/O bus  233 . The keyboard interface  247  may be a keyboard controller or other keyboard interface. The keyboard interface  247  may be a dedicated device or can reside in another device such as a bus controller or other controller. The keyboard interface  247  allows coupling of a keyboard (not shown) to the computer system  200  and transmits data signals from a keyboard to the computer system  200 . An audio controller  248  is coupled to the second I/O bus  233 . The audio controller  248  operates to coordinate the recording and playing of sounds.  
         [0024]    A bus bridge  245  couples the first I/O bus  232  to the second I/O bus  233 . The bus bridge  245  operates to buffer and bridge data signals between the first I/O bus  232  and the second I/O bus  233 .  
         [0025]    The computer system  200  includes a system power supply  250 . The system power supply  250  receives power from a power source such as a wall socket (not shown), battery (not shown), or other power source. In an alternate embodiment, the system power supply  250  will receive power from a battery (not shown) eliminating the need for a rectifier unit  311 . The system power supply  250  includes an inverter unit  251  that processes the power received from the power source and transmits the power in an alternating current (AC) domain at multiple frequencies on an AC bus  230 . Additionally, the inverter receives a multiplexed digital feedback signal from a control bus  255 . Furthermore, the inverter unit  251  receives data signals from the processor  240  on the CPU bus  231 . The computer system  200  includes a multiple of high-frequency AC voltage regulator modules (HFAC VRM)  260 - 268 . The HFAC VRMs  260 - 268  are coupled to the AC bus  230  and transmit multiplexed digital signals onto the control bus  255 . The HFAC VRMs include post-regulator units  271 - 279  that regulates the power to a voltage and current level appropriate for processor  240 , the memory  242 , memory/bridge controller  241 , network controller  243 , display device controller  244 , data storage device  246 , keyboard interface  247 , audio controller  248 , and bus bridge  245  (shown in FIG. 2). It should be appreciated that the system power supply  250  may be implemented in electronic systems other than computer system  200 .  
         [0026]    [0026]FIG. 3 is a block diagram of one embodiment of an inverter unit  251  in system power supply  250  (shown in FIG. 2) according to the teaching of the present invention. The inverter unit  251  includes a rectifier unit  311 . The rectifier unit  311  receives AC power from a power source (not shown). The rectifier unit  311  converts the AC power to a DC domain. The rectifier unit  311  is coupled to a first filtering unit  312 . The first filtering unit  312  reduces ripple in the DC power and prevents transmission of noise generated by the system power supply  250 . A multiple of switching units (single frequency sources)  301 - 309  are multiplexed and are coupled to the filter unit  312  and a centralized controller unit  314 . Each of the switching units  301 - 309  receive the DC power from the filtering unit  312  and converts the DC power to high-frequency AC power with a specific frequency generating signal components at multiple frequencies. Each signal component resonates at a particular frequency and corresponds to one or more HFAC VRMs. Additionally, each of the switching units  301 - 309  receive an control signal from the centralized controller unit  314  and directly adjusts the amplitude of the appropriate frequency signal component which corresponds to each of the appropriate HFAC VRMs  260 - 268 .  
         [0027]    A second filtering unit  340  is coupled to the switching units  301 - 309 . The filtering unit  340  receives the high-frequency AC power containing multiple frequencies from the switching units  301 - 309  and filters away ripple from the high-frequency AC power containing multiple frequencies before transmitting it onto the AC bus  230 .  
         [0028]    In the illustrated embodiment, a centralized controller unit  314  is coupled to the multiple of switching units  301 - 309 , the control bus  255 , and the CPU bus  231 . The controller unit  314  receives multiplexed digital signals from the control bus  255  representing feedback from the multiple HFAC VRMs as discussed below. Centralized controller unit  314  compares these feedback with references and generates control signals which directly adjust each of the switching units  301 - 309  in order to adjust the amplitudes of the appropriate frequencies which correspond to each of the appropriate HFAC VRMs  260 - 268 . Additionally, in one embodiment, the centralized controller unit  314  receives data signals from the CPU  240  via processor bus  231 , and the CPU can adjust the power to the CPU according to the needs of the CPU. As discussed below, each of the switching units  301 - 309  can also be adjusted in response to the data signal received from the CPU  240 .  
         [0029]    A transformer unit  341  is coupled to the filtering unit  340  and the AC bus  230 . The transformer unit  341  receives the high-frequency AC power containing multiple frequencies from the AC filtering unit  340  and steps the high-frequency AC power down to a lower level and transmits the AC power onto the AC bus  230 .  
         [0030]    The rectifier unit  311 , multiple switching units  301 - 309 , filtering unit  340 , centralized controller unit  314 , and the transformer unit  341  may be implemented using any known circuitry or technique. According to an embodiment of the present invention, the rectifier unit  311 , switching units  301 - 309 , and the centralized controller unit  314  may all reside on a single semiconductor, may be discrete components, or may be a combination of both.  
         [0031]    [0031]FIG. 4 shows an alternate embodiment of inverter  251  (shown in FIG. 2). In the illustrated embodiment, a frequency synthesizer  450  is used in place of multiple switching units  301 - 309  (shown in FIG. 3) to generate the high-frequency AC power having multiple frequencies. In various embodiments, any number of techniques can be used to generate the high-frequency AC power at multiple frequencies.  
         [0032]    [0032]FIG. 5 is a block diagram of one embodiment of one of a multiple post-regulator units  271 - 279  in a multiple of HFAC VRMs  260 - 268  (shown in FIG. 2) according to the teachings of the present invention. Each of the post-regulator units  271 - 279  is coupled to the AC bus  230  and the control bus  255 . Each of the post-regulator units  271 - 279  include a resonant circuit  511  and a rectifier unit  512 . The resonant circuit  511  receives the multiple of frequencies and filters out harmonics separating the multiple frequencies to a single specific frequency corresponding to the specific HFAC VRMs for specific components in the computer system. Rectifier unit  512  receives the high-frequency AC power containing the single specific frequency from the resonant circuit  511  and converts the signal component of the high-frequency AC power into an output power signal in the DC domain. In an alternate embodiment, a step down transformer (not shown) may be included as part on the rectifier unit  512  to step down the high-frequency AC power to a lower power level.  
         [0033]    A filtering unit  513  is coupled to the rectifier unit  512 . The filtering unit  513  receives the DC power from the rectifier unit  512  and filters away ripple from the DC power before transmitting the power to a component on the computer system (not shown) via lines  220 - 228  (shown in FIG. 2).  
         [0034]    An analog to digital converter unit  511  is coupled to the lines  220 - 228  and the control bus  255 . The analog to digital converter unit  511  senses and digitizes the output voltage of the filtering unit  513 , multiplexes this digital signal and feeds it into the control bus  255 . According to an embodiment of the present invention, each of the post regulator units  271 - 279  may include only the rectifier unit  512  that converts the high-frequency AC power from the AC bus into the DC domain before transmitting it to the lines  220 - 228 .  
         [0035]    The rectifier unit  512 , filtering unit  513 , and the analog to digital converter unit  511  may be implemented using any known circuitry or technique. According to an embodiment of the present invention, the rectifier unit  512 , filtering unit  513 , and the analog to digital converter unit  511  may all reside on a single semiconductor substrate, be discrete components, or be a combination of both.  
         [0036]    The system power supply  250  (shown in FIG. 2) and the multi-frequency AC voltage regulator modules  260 - 268  (shown in FIG. 2) allows for the distribution of power in a high-frequency AC domain containing multiple frequencies. Distribution of power in the high-frequency AC domain containing multiple frequencies improves the reliability of voltage regulation to components in the computer system having high current differential over time (DI/DT) requirements.  
         [0037]    The system power supply  250  and the high-frequency AC voltage regulator modules  260 - 268  also eliminate the need for dual conversion as required by DC power distribution systems. Furthermore, the utilization of the AC bus  230  to distribute high-frequency AC power containing multiple frequencies eliminates the requirement of multiple conversion stages, multiple winding transformers, and additional rectifiers and filters.  
         [0038]    Furthermore, in the illustrated embodiment, the utilization of multiple frequencies controlled by a centralized controller  314  via control bus  255 , an analog digital converter  511 , and a processor  240  creating a centralized digital feedback loop (CDFL) eliminates multiple control loops, simplifies the HFAC VRMs, and brings intelligence into the power architecture. Additionally, power to the processor can be dynamically controlled depending upon the needs of the processor.  
         [0039]    [0039]FIG. 6 is a flow chart illustrating a method for distributing power according to an embodiment of the present invention. At step  601 , power in an AC domain is regulated from a low frequency AC domain to a high-frequency AC domain containing multiple frequencies. According to an embodiment of the present invention, the power in the AC domain is regulated to the high-frequency AC domain by rectifying the power from the AC domain to a DC domain and converting the power from the DC domain to the high-frequency AC domain at multiple switching units in parallel. An alternative embodiment would include converting the power from the DC domain to the high-frequency AC domain at a frequency synthesizer.  
         [0040]    At step  602 , the high-frequency AC power containing multiple frequencies is transmitted from a system power supply to multiple high-frequency AC voltage regulator modules.  
         [0041]    At step  603 , the power is regulated from the high-frequency AC domain containing multiple frequencies to a DC domain. According to an embodiment of the present invention, the power is regulated from the high-frequency AC domain to the DC domain by stepping down the power and rectifying the power from the high-frequency AC domain to the DC domain.  
         [0042]    At step  604 , a feedback signal is sent to the centralized controller in the power supply to adjust the power transmitted to the particular HFAC VRM accordingly if necessary. According to the present embodiment, the feedback signal is sent by converting an analog signal to a digital signal and sending the digital feedback signal to the centralized power supply via a control bus.  
         [0043]    In the foregoing description, the invention is described with reference to specific exemplary embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the present invention as set forth in the appended claims. The specification and drawings are accordingly to be regarded in an illustrative rather than in a restrictive sense.