Abstract:
A feedback signal sensing method includes the steps of: providing a pulse width modulation (PWM) signal having a period; charging a capacitor by a current source during a pulse duration of the period, so as to form an equivalent slope compensation ramp signal; conducting an inductor current flowing from a boost inductor to flow through an equivalent resistor during the pulse duration of the period, so as to form an equivalent inductor current signal; and using a coupling characteristic of the capacitor together with the equivalent slope compensation ramp signal and the equivalent inductor current signal to form a feedback signal.

Description:
CROSS-REFERENCE TO RELATED U.S. APPLICATIONS 
   Not applicable. 
   STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT 
   Not applicable. 
   NAMES OF PARTIES TO A JOINT RESEARCH AGREEMENT 
   Not applicable. 
   REFERENCE TO AN APPENDIX SUBMITTED ON COMPACT DISC 
   Not applicable. 
   BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The present invention relates to a current mode pulse width modulation (PWM) boost circuit and a feedback sensing method thereof. More particularly, the present invention relates to a current mode PWM boost circuit having functions of directly sensing an inductor current and a slope compensation ramp signal and a feedback sensing method thereof. 
   2. Description of Related Art Including Information Disclosed Under 37 CFR 1.97 and 37 CFR 1.98. 
     FIG. 1  shows a conventional current mode pulse width modulation (PWM) boost circuit  10 , which includes a boost circuit  11 , a voltage dividing circuit  19 , an error amplifier  12 , a comparator  13 , an inductor current generator  14 , a slope compensation ramp generator  15 , an oscillator  16 , a pulse width generator  17 , and a buffer  18 . A voltage V IN  is increased by the boost circuit  11  to generate a higher DC output voltage V OUT . The boost circuit  11  includes an input capacitor C 1 , a boost inductor L, a MOS transistor T, a rectifying diode D, and an output capacitor C 2 . The input capacitor C 1  is used to filter out ripple voltage from the voltage V IN . When the MOS transistor T is turned on, the rectifying diode D has a reverse bias. At this time, a current flows through the boost inductor L forward, such that the voltage on the boost inductor L increases. However, the current does not flow through the boost inductor L in an instant, but increases linearly and forms an electromagnetic field. At this time, when the MOS transistor T is turned on, the output current is provided by the output capacitor C 2  only. When the MOS transistor T is turned off, the boost inductor L cannot store energy, so the electromagnetic field stored in the boost inductor L is released. Thus, the polarity of the voltage on the boost inductor L is inverted, such that the boost inductor L releases the stored energy to the output capacitor C 2 , and a voltage at a terminal (i.e., the node N 3 ) of the rectifying diode D that is connected to the boost inductor L is higher than the voltage V IN . This energy provides a load current, and meanwhile charges the output capacitor C 2  again. The voltage dividing circuit  19  includes two resistors R 1  and R 2 , which are connected in series. A divided voltage V F1  is acquired at a node N 2  that connects the resistors R 1  and R 2 , and is sent to the error amplifier  12  where the divided voltage V F1  is compared with a reference voltage V REF  to generate an error signal E 0 . After that, the error signal E 0  is compared with a feedback signal V SUM  by the comparator  13 . The output of the comparator  13  (i.e., VF 2 ) and an oscillation signal S 1  coming from the oscillator  16  are input into the pulse width generator  17  together. A driving signal S DR  generated by the pulse width generator  17  passes through the buffer  18  to generate a gate control signal S G , so as to adjust the conductive time of the MOS transistor T (i.e., to adjust the pulse duration of the driving signal S DR ), and further to control the DC output voltage V OUT . 
   The inductor current generator  14  receives a voltage signal V SEN  from the node N 3 , and the voltage signal V SEN  is processed by a voltage-to-current transfer structure (e.g., a resistor or a transconductance amplifier) therein to generate an inductor current I SEN  flowing through the boost inductor L.  FIGS. 2(   a )- 2 ( c ) illustrate different access points N 31 , N 32 , and N 33  of the voltage signal V SEN  in the conventional art. The method to capture the voltage signal V SEN  of  FIG. 2(   a ) is more accurate than the methods of the other two figures, but consumes more power. The methods to capture the voltage V SEN  of  FIGS. 2(   b ) and  2 ( c ) are lossless and better than the method of  FIG. 2(   a ), but respectively have problems of lower accuracy and matching. Moreover, after the voltage signal V SEN  is processed by the inductor current generator  14 , the inductor current I SEN  may be easily distorted. Furthermore, the slope compensation ramp generator  15  is directed to solving problems such as open-loop instability, sub-harmonic oscillation, and noise sensitivity in current mode converters when operating in continuous conduction mode with a duty cycle of the driving signal S DR  larger than 50%. The slope compensation ramp generator  15  receives an oscillation signal S 2  from the oscillator  16 , and the oscillation signal S 2  is processed by a voltage-to-current transfer structure (e.g., a transconductance amplifier) therein to generate a slope compensation ramp signal I SLO . Similarly, after being used by the slope compensation ramp generator  15 , the slope compensation ramp signal I SLO  may be easily distorted. Finally, the inductor current I SEN  and the slope compensation ramp signal I SLO  flow through a resistor Rf, and generate the feedback signal V SUM  at a node N 1 . 
   BRIEF SUMMARY OF THE INVENTION 
   One aspect of the present invention is to provide a current mode PWM boost circuit, which uses a feedback signal generating unit including a current source and a capacitor to directly measure an inductor current and an equivalent slope compensation ramp signal inside the current mode PWM boost circuit, so as to generate a feedback signal and to adjust a DC output voltage, thereby reducing the problem of signal distortion when measuring an inductor current and generating a slope compensation ramp signal in the conventional art. 
   Another aspect of the present invention is to provide a feedback signal sensing method applicable to a current mode PWM boost circuit, which directly measures an inductor current flowing through a boost inductor in the boost circuit and a equivalent slope compensation ramp signal formed according to a slope characteristic when a current source charges a capacitor, so as to generate a feedback signal and adjust a DC output voltage. 
   Accordingly, the present invention discloses a current mode PWM boost circuit, which includes a boost unit, a voltage dividing circuit, an error amplifier, a comparator, a pulse width generator, and a feedback signal generating unit. The boost unit includes a boost inductor and a switch, and the boost unit is configured to increase a voltage to generate a DC output voltage. The voltage dividing circuit is configured for generating a divided voltage from the DC output voltage. The error amplifier is configured to generate an error signal by comparing a reference voltage with the divided voltage. The comparator is configured to generate a first signal by comparing the error signal with a feedback signal. The pulse width generator is configured to receive the first signal and a second signal coming from an oscillator to generate a third signal to control the switch. The feedback signal generating unit is coupled to the boost unit to generate the feedback signal, wherein the feedback signal includes an equivalent inductor current signal flowing through the boost inductor and an equivalent slope compensation ramp signal. 
   The present invention also discloses a feedback signal sensing method applicable to a current mode PWM boost circuit, which includes the steps of: providing a PWM signal having a period; charging a capacitor by a current source during the a pulse duration of the period to form an equivalent slope compensation ramp signal; conducting an inductor current flowing from a boost inductor to flow through an equivalent resistor during the pulse duration to form an equivalent inductor current signal; and using a coupling characteristic of the capacitor together with the equivalent slope compensation ramp signal and the equivalent inductor current signal to form a feedback signal. In an embodiment of the present invention, the feedback signal is acquired at a connection point of the current source and the capacitor. 
   The current mode PWM boost circuit of the present invention does not use the voltage-to-current transfer structure, but directly measures the inductor current, and uses the feedback signal generating unit to directly generate the equivalent slope compensation ramp signal. Therefore, compared with the conventional art, the present invention has the advantages of (1) reducing the distortion of the feedback signal; (2) having a favorable response speed because of the direct measurement and signal generation; and (3) eliminating the problem of open-loop instability in the conventional art. 

   
     BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS 
     The invention will be described according to the appended drawings. 
       FIG. 1  is a schematic view illustrating a conventional current mode PWM boost circuit. 
       FIGS. 2(   a )- 2 ( c ) are schematic views illustrating different access points of the voltage signal in the conventional art. 
       FIG. 3  is a schematic view illustrating a current mode PWM boost circuit according to an embodiment of the present invention. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
     FIG. 3  illustrates a current mode PWM boost circuit  20  according to an embodiment of the present invention, which includes a boost unit  21 , a voltage dividing circuit  29 , an error amplifier  22 , a comparator  23 , a pulse width generator  27 , a buffer  28 , and a feedback signal generating unit  24 . The boost unit  21  includes a boost inductor L′, a MOS transistor T′, a rectifying diode D′ connected to a connection point P 1  of the boost inductor L′ and the MOS transistor T′, an input capacitor C 3  for filtering out the ripple voltage from the voltage V IN , and an output capacitor C 5  connected between the rectifying diode D′ and a ground terminal, wherein the output capacitor C 5  is used for generating a DC output voltage V OUT . The voltage dividing circuit  29  uses the DC output voltage V OUT  to generate a divided voltage VF 3 . The voltage dividing circuit  29  includes a first resistor R 3  connected to the rectifying diode D′ and a second resistor R 4  connected between the first resistor R 3  and the ground terminal, wherein the divided voltage VF 3  is acquired at a node P 3  of connecting the first resistor R 3  and the second resistor R 4 . The error amplifier  22  compares a reference voltage V REF  and the divided voltage VF 3  to generate an error signal E′ 0 . The comparator  23  compares the error signal E′ 0  and a feedback signal V′ SUM  to generate a signal VF 4 . The pulse width generator  27  receives the signal VF 4  and a signal S OSC  coming from an oscillator  26  to generate a signal S′ DR  for controlling the MOS transistor T′. The buffer  28 ′ is optional, and is used to improve the driving capability of the signal S′ DR , so as to form a gate control signal S′ G  to control the MOS transistor T′. The feedback signal generating unit  24  is coupled to the boost unit  21 , so as to generate the feedback signal V′ SUM , in which the feedback signal V′ SUM  includes an equivalent inductor current signal (not shown) passing through the boost inductor L′ and an equivalent slope compensation ramp signal (not shown). The feedback signal generating unit  24  includes a capacitor C 4  and a current source I S , which is connected in series with the capacitor C 4 . A terminal of the capacitor C 4  is coupled to the connection point P 1  of the boost inductor L′ and the MOS transistor T′, and the current source I S  is coupled to the other terminal of the capacitor C 4 . 
   The current mode PWM boost circuit  20  of the embodiment of  FIG. 3  is different from the current mode PWM boost circuit  10  in terms of the method of generating the feedback signal V′ SUM . The method for sensing the feedback signal V′ SUM  of the present invention will be illustrated in detail below. 
   When the MOS transistor T′ is turned on, an inductor current I L ′ generated by the voltage V IN  and passing through the boost inductor L′ flows to the ground terminal through the MOS transistor T′ that is turned on. A level V′ SEN  at the node P 1  generated by the inductor current I L ′ is calculated according to the following formula (1):
 
 V′   SEN   =V   IN   ×DT   S   ×Rds/L   (1)
 
   where, DT S  stands for a pulse duration of the fourth signal S′ DR  (i.e., the conductive time of the MOS transistor T′), Rds stands for the resistance of the MOS transistor T′ when being turned on, and L stands for the inductance of the boost inductor L′. 
   As the level V′ SEN  includes information about the inductor current I  L ′, the level V′ SEN  is also referred to as an equivalent inductor current signal, which is associated with the voltage V IN , the boost inductor L′, the resistance Rds of the MOS transistor T′ when being turned on, and a duty cycle of the pulse width generator. Moreover, the current source I S  charges the capacitor C 4  when the MOS transistor T′ is turned on, so a voltage difference V SLO  is established between the nodes P 1  and P 2 . Such voltage difference is calculated according to the following formula (2):
 
 V   SLO   =I   S   ×DT   S   /C   (2)
 
   where, DT S  stands for the pulse duration of the fourth signal S′ DR  (i.e., the conductive time of the MOS transistor T′), and C stands for the capacitance of the capacitor C 4 . As the voltage difference V SLO  includes information about the slope compensation ramp signal (i.e., the slope characteristic when the capacitor C 4  is charged is similar to the third signal S OSC  generated by the oscillator  26 ), the voltage difference V SLO  is also referred to as an equivalent slope compensation ramp signal, which is associated with the current source I S , the capacitor C 4 , and the duty cycle of the pulse width generator  27 . Therefore, according to the coupling characteristic of the capacitor C 4 , the feedback signal V′ SUM  acquired at the node P 2  is the sum of the equivalent inductor current signal and the equivalent slope compensation ramp signal. In other words, 
                         V   SUM   ′     =       V   SEN   ′     +     V   SLO                   =         V     I   ⁢           ⁢   N       ×     DT   S     ×     Rds   /   L       +       I   S     ×       DT   S     /   C                     =       (         V     I   ⁢           ⁢   N       ×     Rds   /   L       +       I   S     /   C       )     ×   DTS                   (   3   )               
where, (V IN  × Rds/L+ I S /C)× DTs in formula (3) has a characteristic of fixed slope.
 
   It is known from the above illustration that the current mode PWM boost circuit and the feedback signal sensing method directly measure the inductor current in the current mode PWM boost circuit and convert the inductor current to an equivalent inductor current signal with a feedback signal generating unit including a current source and a capacitor, and meanwhile charge the capacitor with the current source to directly generate an equivalent slope compensation ramp signal having the slope characteristic, so as to form a feedback signal directly at the connection point of the current source and the capacitor. Therefore, when compared with the conventional art, the present invention has the advantages of (1) reducing the distortion of the feedback signal; (2) having a favorable response speed; and ( 3 ) eliminating the problem of open-loop instability. 
   The above-described embodiments of the present invention are intended to be illustrative only. Numerous alternative embodiments may be devised by persons skilled in the art without departing from the scope of the following claims.