Abstract:
The present invention relates to a variable gain circuit including: a first transistor and a second transistor each having a control electrode connected to a circuit input terminal; a load connected between a first power supply and a first electrode of at least one of the first transistor and the second transistor; a third transistor and a fourth transistor having second electrodes connected to the first transistor and the second transistor, respectively, and each having a first electrode and a control electrode connected to each other; a first variable current source connected between a second power supply and the second electrodes of the first transistor and the third transistor, and having a current value variable according to an external control signal; a second variable current source connected between the second power supply and the second electrodes of the second transistor and the fourth transistor, and having a current value variable according to the control signal; a current source connected between the first power supply and a node of the first electrodes and the control electrodes of the third transistor and the fourth transistor; and an impedance component having one end connected to the first electrodes and the control electrodes of the third transistor and the fourth transistor.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    The present invention relates to a variable gain circuit whose gain is externally controllable, and particularly to a variable gain circuit operable at a low supply voltage.  
           [0002]    A configuration using a Gilbert multiplier is common as a variable gain circuit. An example of a variable gain circuit according to a related art is shown in FIG. 3. In FIG. 3, the related-art variable gain circuit has a differential amplifier circuit  101 , two current divider circuits  102  and  103 , a control voltage (Vc) generating source  104 , and a bias voltage (Vb) generating source  105 .  
           [0003]    The differential amplifier circuit  101  is formed by: NPN-type differential pair transistors Q 101  and Q 102 ; an emitter resistance R 101  connected between emitter electrodes of the differential pair transistors Q 101  and Q 102 ; and constant current sources I 101  and I 102  connected between a ground and the emitter electrodes of the differential pair transistors Q 101  and Q 102 , respectively. Base electrodes of the differential pair transistors Q 101  and Q 102  are connected to circuit input terminals  106  and  107 , respectively  
           [0004]    One current divider circuit  102  has a differential circuit configuration formed by NPN-type differential pair transistors Q 103  and Q 104  each having an emitter electrode commonly connected to a collector electrode of the transistor Q 101  and a resistance R 102  connected between a collector electrode of one transistor Q 103  and a power supply Vcc. A collector electrode of the other transistor Q 104  is connected directly to the power supply Vcc.  
           [0005]    The other current divider circuit  103  has a differential circuit configuration formed by NPN-type differential pair transistors Q 105  and Q 106  each having an emitter electrode commonly connected to a collector electrode of the transistor Q 102  and a resistance R 103  connected between a collector electrode of one transistor Q 105  and the power supply Vcc. A collector electrode of the other transistor Q 106  is connected directly to the power supply Vcc.  
           [0006]    The collector electrodes of the transistors Q 103  and Q 105  in the current divider circuits  102  and  103  are connected to circuit output terminals  108  and  109 , respectively. Base electrodes of the transistors Q 104  and Q 106  are commonly connected to a positive electrode side of the control voltage generating source  104 , whereas base electrodes of the transistors Q 103  and Q 105  are commonly connected to a negative electrode side of the control voltage generating source  104 . A positive electrode side of the bias voltage generating source  105  is connected to the base electrodes of the transistors Q 103  and Q 105 , while a negative electrode side of the bias voltage generating source  105  is connected to the ground.  
           [0007]    In the thus formed variable gain circuit, letting Ic 1  and Ic 2  be collector currents of the transistors Q 103  and Q 104  and Vc be a control voltage of the control voltage generating source  104 , 
             Ic 2/ Ic 1= exp ( Vc/Vt )  (1) 
           [0008]    where Vt=kT/q, k being the Boltzmann constant, T being the absolute temperature, and q being the amount of electron charge.  
           [0009]    Letting IA be a current value of the constant current source I 101 , since Ic 1 +Ic 2 =IA, 
             Ic 1 /IA=Ic 1/( Ic 1+ Ic 2)=1/{1+( Ic 2/ Ic 1)}  (2) 
           [0010]    Hence, when substituting the equation (1) into the equation (2), 
             Ic 1 /IA= 1/{1+( exp ( Vc/Vt ))}  (3) 
           [0011]    Letting vi be an input voltage, vo be an output voltage, RA be a resistance value of the resistance R 101 , and RB be resistance values of the resistances R 102  and R 103 , a gain Av of the variable gain circuit according to the related art is given by:  
             Av   =       vo   vi     =     2          RB   RA     ·     1     1   +     exp        Vc   Vt                         (   4   )                               
 
           [0012]    As is clear from the equation (4), the gain Av can be varied by the control voltage Vc of the control voltage generating source  104 .  
           [0013]    However, the thus formed variable gain circuit according to the related art has a circuit configuration with the differential circuits piled in two stages in a direction of the supply voltage. Therefore, supposing that a base-to-emitter voltage of the bipolar transistors is about 0.9 V at a maximum, and supposing that when the constant current source I 101  is formed by a bipolar transistor, a collector-to-emitter voltage of the transistor is about 0.4 V, a voltage of about 2.2 V is required for operation of the differential circuits piled in two stages (differential amplifier circuit  101  and current divider circuit  102 ) and the constant current source I 101 .  
           [0014]    Furthermore, when device variations and the like are taken into consideration, a supply voltage of at least about 2.5 V is required to prevent saturation of the differential circuits and the constant current source I 101 . In general, when a dynamic range and transient characteristics are taken into consideration, the related-art variable gain circuit formed as described above is of a circuit type to be operated under a supply voltage of about 3.3 V. Thus, while there has recently been a tendency toward lower supply voltage in portable terminals such as portable telephones and PDAs (Personal Digital Assistants), the related-art variable gain circuit formed as described above cannot meet the need for lower supply voltage.  
         SUMMARY OF THE INVENTION  
         [0015]    The present invention has been made in view of the above problem, and it is accordingly an object of the present invention to provide a variable gain circuit operable at a lower supply voltage.  
           [0016]    According to an aspect of the present invention, there is provided a variable gain circuit including: a first transistor and a second transistor each having a control electrode connected to a circuit input terminal; a load connected between a first power supply and a first electrode of at least one of the first transistor and the second transistor; a third transistor and a fourth transistor having second electrodes connected to the first transistor and the second transistor, respectively, and each having a first electrode and a control electrode connected to each other; a first variable current source connected between a second power supply and the second electrodes of the first transistor and the third transistor, and having a current value variable according to an external control signal; a second variable current source connected between the second power supply and the second electrodes of the second transistor and the fourth transistor, and having a current value variable according to the control signal; a current source connected between the first power supply and a node of the first electrodes and the control electrodes of the third transistor and the fourth transistor; and an impedance component having one end connected to the first electrodes and the control electrodes of the third transistor and the fourth transistor.  
           [0017]    Both bipolar transistors and field-effect transistors can be used as the first to fourth transistors. In the case of using a bipolar transistor, the first electrode refers to a collector electrode reached by a carrier (electron or hole); the second electrode refers to an emitter electrode for injecting the carrier; and the control electrode refers to a base electrode supplied with a current for controlling movement of the carrier injected from the emitter electrode. On the other hand, in the case of using a field-effect transistor, the first electrode refers to a drain electrode reached by a carrier; the second electrode refers to a source electrode for supplying the carrier; and the control electrode refers to a gate electrode supplied with a signal for controlling the main current. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0018]    [0018]FIG. 1 is a circuit diagram showing a circuit configuration of a variable gain circuit according to an embodiment of the present invention;  
         [0019]    [0019]FIG. 2 is a block diagram showing an example of use of the variable gain circuit according to the present embodiment; and  
         [0020]    [0020]FIG. 3 is a circuit diagram showing a circuit configuration of a variable gain circuit according to a related art.  
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT  
       [0021]    A preferred embodiment of the present invention will hereinafter be described in detail with reference to the drawings. FIG. 1 is a circuit diagram showing a circuit configuration of a variable gain circuit according to an embodiment of the present invention. Description in the following will be made by taking as an example a case where bipolar transistors are used as transistors forming the circuit.  
         [0022]    In FIG. 1, base electrodes of NPN-type transistors Q 11  and Q 12  are connected to a circuit input terminal  11 , which is supplied with an input signal vi(+) of positive polarity. Resistances R 11  and R 12  are connected between a first power supply, for example a positive power supply Vcc and collector electrodes of the transistors Q 11  and Q 12 , respectively. An emitter electrode of an NPN-type transistor Q 13  is connected to an emitter electrode of the transistor Q 11 . Similarly, an emitter electrode of an NPN-type transistor Q 14  is connected to an emitter electrode of the transistor Q 12 . The above components form a first current divider circuit  13 .  
         [0023]    In the first current divider circuit  13 , a variable current source I 11  whose current value is variable is connected between a second power supply, for example a ground and a common emitter connection point of the transistors Q 11  and Q 13 . Similarly, a variable current source I 12  is connected between the ground and a common emitter connection point of the transistors Q 12  and Q 14 . The transistors Q 13  and Q 14  are each of a diode-connected configuration in which a collector electrode and a base electrode are connected to each other.  
         [0024]    The collector electrode and the base electrode of the transistor Q 13  are further connected to the collector electrode and the base electrode of the transistor Q 14 . A current source  113  is connected between the power supply Vcc and a common connection point of the collectors and the bases of the transistors Q 13  and Q 14 . Also, one end of an impedance component, for example a resistance R 13  is connected to the common connection point of the collectors and the bases of the transistors Q 13  and Q 14 .  
         [0025]    On the other hand, base electrodes of NPN-type transistors Q 15  and Q 16  are connected to a circuit input terminal  12 , which is supplied with an input signal vi(−) of a polarity opposite from that of the input signal vi(+). Resistances R 14  and R 15  are connected between the power supply Vcc and collector electrodes of the transistors Q 15  and Q 16 , respectively. An emitter electrode of an NPN-type transistor Q 17  is connected to an emitter electrode of the transistor Q 15 . Similarly, an emitter electrode of an NPN-type transistor Q 18  is connected to an emitter electrode of the transistor Q 16 . The above components form a second current divider circuit  14 .  
         [0026]    In the second current divider circuit  14 , a variable current source I 14  is connected between the ground and a common emitter connection point of the transistors Q 15  and Q 17 . Similarly, a variable current source  115  is connected between the ground and a common emitter connection point of the transistors Q 16  and Q 18 . The transistors Q 17  and Q 18  are each of the diode-connected configuration in which a collector electrode and a base electrode are connected to each other.  
         [0027]    The collector electrode and the base electrode of the transistor Q 17  are further connected to the collector electrode and the base electrode of the transistor Q 18 . A current source I 16  is connected between the power supply Vcc and a common connection point of the collectors and the bases of the transistors Q 17  and Q 18 . Also, the other end of the resistance R 13  is connected to the common connection point of the collectors and the bases of the transistors Q 17  and Q 18 .  
         [0028]    The collector electrode of the transistor Q 12  in the thus formed variable gain circuit according to the present embodiment is connected to a circuit output terminal  15 , whereby an output signal vo(+) of positive polarity is derived from the circuit output terminal  15 . In addition, the collector electrode of the transistor Q 16  is connected to a circuit output terminal  16 , whereby an output signal vo(−) of the opposite polarity is derived from the circuit output terminal  16 . In this configuration example, it is possible to omit the resistances R 11  and R 14  where no output signals are derived. Current values of the variable current sources I 11 , I 12 , I 14 , and I 15  can be varied according to a control voltage Vc supplied externally via a control terminal  17 .  
         [0029]    Operating principles of the thus formed variable gain circuit according to the present embodiment will next be described.  
         [0030]    First, let Ic 1  to Ic 8  be collector currents flowing through the transistors Q 11  to Q 18 , respectively. Suppose that the current values of the variable current sources I 11  and I 14  are equal to each other, and let IA be the current value; suppose that the current values of the variable current sources I 12  and I 15  are equal to each other, and let IB be the current value; and suppose that current values of the current sources I 13  and I 16  are equal to each other, and let IC be the current value. Further, suppose that resistance values of the resistances R 11  and R 14  are equal to each other, and let RA be the resistance value; and suppose that resistance values of the resistances R 12  and R 15  are equal to each other, and let RB be the resistance value.  
         [0031]    First, letting V 1  be a voltage of the one end of the resistance R 13 , that is, a node {circle over (1)}, 
           vi (+)− Vtln ( Ic 1 /Is )+ Vtln ( Ic 3/ Is )= V 1 
           vi (+)− Vtln ( Ic 2/ Is )+ Vtln ( Ic 4/ Is ) V 1 
         [0032]    where Vt=kT/q, k being the Boltzmann constant, T being the absolute temperature, and q being the amount of electron charge, and the current Is is a constant determined by transistor fabrication process. From the above equations, the following equation is obtained: 
           vi (+)− NT 1= Vtln ( Ic 1 /Ic 3)= Vtln ( Ic 2/ Ic 4) 
         [0033]    Thus, the following relation holds. 
           Ic 1/ Ic 3= Ic 2/ Ic 4  (5) 
         [0034]    Also, 
           Ic 1+ Ic 3= IA   (6) 
           Ic 2+ Ic 4= IB   (7) 
         [0035]    Hence, supposing that IC=(IA+IB)/2, 
           Ic 1= Ic 3= IA/ 2,  Ic 2= Ic 4= IB/ 2 
         [0036]    Letting re 1  to re 4  be emitter resistances of the transistors Q 11  to Q 14 , an impedance Z when the circuit input terminal  11  side is viewed from the node {circle over (1)} is: 
           Z =( re 1+ re 3)//( re 2+ re 4) 
         [0037]    Since re 1 =Vt/Ic 1 , . . . , re 4 =Vt/Ic 4 , the impedance Z is expressed as: 
           Z= 4 Vt /( IA+IB ) 
         [0038]    Hence, letting RO be a resistance value of the resistance R 13 , a gain Av of the variable gain circuit according to the present embodiment is:  
             Av   =       IB     IA   +   IB       ·       2      RB           8      Vt       IA   +   IB       +   RO                 (   8   )                               
 
         [0039]    Thus, as is clear from the equation (8), the gain Av of the variable gain circuit according to the present embodiment is changed by controlling the current value IA of the variable current sources Ill and I 14  and the current value IEB of the variable current sources I 12  and I 15  by means of the control voltage Vc supplied externally via the control terminal  17 .  
         [0040]    While circuit operation on the part of the first current divider circuit  13  has been described above, exactly the same operation is performed on the part of the second current divider circuit  14 .  
         [0041]    As described above, the variable gain circuit according to the present embodiment has a circuit configuration in which each of the current divider circuit  13  (transistors Q 11  to Q 14 ) and the current divider circuit  14  (transistors Q 15  to Q 18 ) is arranged in only one stage in a direction of the supply voltage. Therefore, a voltage of about 0.9 V is required at a maximum to drive the bipolar transistors, and supposing that when the current sources I 11  to I 16  are formed by bipolar transistors, a collector-to-emitter voltage of the transistors is about 0.4 V, a voltage of about 1.7 V (=0.9+0.4×2) is required to drive the variable gain circuit.  
         [0042]    The variable gain circuit according to the present embodiment will be compared with the variable gain circuit according to the related art shown in FIG. 3. As described above, the variable gain circuit according to the related art has the configuration with the two differential circuits piled in the direction of the supply voltage, and therefore requires a voltage of about 2.2 V (=0.9×2+0.4) for circuit operation. On the other hand, the variable gain circuit according to the present embodiment has the above-described circuit configuration and therefore requires a voltage of only about 1.7 V. It is thus possible to reduce the supply voltage required for circuit operation by about 0.5 V as compared with the related art.  
         [0043]    Thus, since the supply voltage can be reduced, it is possible to adequately deal with the further reduction of the supply voltage in portable terminals such as portable telephones and PDAs. Accordingly, the variable gain circuit according to the present embodiment is suitable for use as a gain-controlled amplifier in a circuit unit of a portable terminal or the like. In addition, since the current divider circuits  13  and  14  (transistors Q 11  to Q 14 , and transistors Q 15  to Q 18 , respectively) are formed by using bipolar transistors, the circuits can operate at high speed.  
         [0044]    It is to be noted that the present embodiment has been described by taking as an example a case where the NPN-type bipolar transistors are used as transistors forming the circuit; however, PNP-type bipolar transistors can be used by changing polarity of the power supply. The circuit can also be formed by using field-effect transistors, for example MOS transistors. When using MOS transistors, because the voltage for operating a MOS transistor is generally lower than that for a bipolar transistor, the supply voltage can be further reduced by also forming the current sources Ill to I 16  using MOS transistors.  
         [0045]    As is clear from the equation (4), the gain Av of the variable gain circuit according to the related art cannot be set to zero, whereas as is clear from the equation (8), the gain Av of the variable gain circuit according to the present embodiment can be set to zero. The following example of the use of the variable gain circuit is conceivable as a case where the gain Av of the variable gain circuit is set to zero.  
         [0046]    [0046]FIG. 2 shows a circuit where an input signal is passed through an LPF (low-pass filter)  21  and then supplied to an adder  22  as one input thereof and is passed through an HPF (high-pass filter)  23  and a GCA (gain-controlled amplifier)  24  and then supplied to the adder  22  as the other input thereof, and an addition output of the adder  22  is derived as an output signal. In the thus formed circuit, the variable gain circuit according to the foregoing embodiment is used as the GCA  24 .  
         [0047]    This circuit example can adjust level of the signal passed through the HPF  23  to be added to the signal passed through the LPF  21  by controlling the gain of the GCA  24  by means of a control voltage Vc, and also render zero the signal component to be added to the signal passed through the LPF  21  by setting the gain of the GCA  24  to zero. It is thereby possible to conduct a circuit test based on the output signal of the adder  22 , that is, a characteristic test on the LPF  21 .  
         [0048]    It is to be noted that the foregoing embodiment has been described by taking as an example the variable gain circuit set to perform differential operation by using the input signals vi(+) and vi(−) of polarities opposite from each other; however, the present invention is not limited to the circuit configuration of differential operation, and is similarly applicable to a circuit configuration of single operation.  
         [0049]    In addition, the foregoing embodiment has been described by taking as an example a case where the resistive element (resistance R 13 ) is used as the impedance component; however, the present invention is not limited to a resistive element, and a capacitive element and a coil element may also be used. When a resistive element is used as the impedance component, the circuit functions as a gain-controlled amplifier, as described above, whereas when a capacitive element is used, the circuit functions as a differentiator, and when a coil element is used, the circuit functions as an integrator. In any of the above cases, the gain remains variable.  
         [0050]    As described above, the variable gain circuit according to the present invention has a circuit configuration in which the current divider circuits are arranged in only one stage in a direction of the supply voltage. Therefore, it is possible to reduce the minimum voltage required for circuit operation by about  0 . 5  V as compared with the related-art circuit, and thus reduce the supply voltage.