Abstract:
A power supply circuit of the present invention includes: a current detection circuit connected between a first power supply voltage section for applying a first power supply voltage to a first electronic circuit and a second power supply voltage section for applying a second power supply voltage to a second electronic circuit, the current detection circuit having a monitor terminal for monitoring a current flowing from the first power supply voltage section to the second power supply voltage section; and a current compensation circuit connected to the first power supply voltage section and the monitor terminal, the current compensation circuit controlling a compensation current flowing from the first power supply voltage section to a ground based on the monitored current to compensate for current fluctuations caused by load fluctuations of the second electronic circuit.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    The present invention relates to a power supply circuit, which is capable of restraining generation of power supply noise and fluctuations in a power supply voltage by compensating for current fluctuations caused by load fluctuations of the circuit, and an RF transponder IC card using such a power supply circuit.  
           [0003]    2. Description of the Related Art  
           [0004]    In general, an electronic circuit such as an analog circuit or a digital circuit is operated by applying a power supply voltage thereto. Fluctuations in a current flowing through the circuit depend on the type of the circuit. In particular, large current fluctuations occur in a digital circuit such as a CPU, a logic circuit, or a memory. Such current fluctuations lead to generation of power supply noise or fluctuations in a power supply voltage. The mechanism of generation of power supply noise will be described below.  
           [0005]    [0005]FIG. 11 is a diagram illustrating a structure of a conventional semiconductor integrated circuit  3 . The semiconductor integrated circuit  3  includes a digital circuit  300  and an analog circuit  310 . The digital circuit  300  includes a CPU  301  and a memory  302 . The semiconductor integrated circuit  3  is externally supplied with a power supply voltage VDD via an inductor L 1 . The inductor L 1  is a parasitic inductor which occurs in a conductor line or a bonding wire and has a value of, for example, several nanofarads. In this case, an internal power supply voltage of the semiconductor integrated circuit  3  (chip) is VDD 1 .  
           [0006]    In the case where a current I 1  flowing through the semiconductor integrated circuit  3  (the digital circuit  300  and the analog circuit  310 ) varies as illustrated in FIG. 12B, the internal power supply voltage VDD 1  of the semiconductor integrated circuit  3  (chip) fluctuates at the time the current I 1  varies, as illustrated in FIG. 12A.  
           [0007]    Power supply noise generated in such a manner adversely affects a circuit operation of the analog circuit  310 . For example, in the case where the analog circuit  310  is a comparator having a hysteresis property, a comparison value varies due to fluctuations in the power supply voltage VDD 1 , so that malfunction in the analog circuit  310  may be caused. In the case where the analog circuit  310  is an amplifier, there arises a problem that a power supply fluctuation component is added to the power supply voltage VDD 1  and the quality of a signal output from the amplifier deteriorates. Specific examples of malfunction and property deterioration of an analog circuit will be given below.  
           [0008]    [0008]FIG. 13 is a graph illustrating input-output characteristics of a comparator having a hysteresis property. In general, a comparator is in a HIGH state when an input voltage is higher than a reference voltage, and the comparator is in a LOW state when the input voltage is lower than the reference voltage. In contrast, in a comparator having a hysteresis property, as illustrated in FIG. 13, an output signal Vout is in a HIGH state when an input voltage (an input signal Vin) is equal to or higher than a voltage VH which is higher than a reference voltage Vref 1  by an offset voltage, and the output signal Vout is in a LOW state when the input voltage (the input signal Vin) is equal to or lower than a voltage VL which is lower than the reference voltage Vref 1  by the offset voltage. In the case where an output of the comparator having a hysteresis property is in the HIGH state and a voltage input to the comparator is equal to the reference voltage Vref 1 , when the input voltage is reduced to be equal to or lower than the voltage VL due to generation of power voltage noise, the output of the comparator is changed from the HIGH state to the LOW state and a value of the output will not return to the previous value (HIGH state).  
           [0009]    In order to solve such a problem, conventionally, a method which uses separate power supplies for an analog circuit and a digital circuit or provides a capacitance section having a large capacitance between the power supply voltage VDD 1  section and a ground VSS in the semiconductor integrated circuit  3  has been used to restrain fluctuations in a power supply voltage.  
           [0010]    However, the above-described methods lead to an increase in the number of pins (terminals) of the semiconductor integrated circuit  3  (chip) or an increase in area of the capacitance section provided in the semiconductor integrated circuit  3  (chip). It is preferable that a value of the capacitance is equal to or more than 1 μF, but a value of capacitance which can be provided in the semiconductor integrated circuit  3  (chip) is about 1 μF at most in the case where a standard CMOS process is used, and this is not very effective for great load fluctuations of the semiconductor integrated circuit  3  (chip).  
         SUMMARY OF THE INVENTION  
         [0011]    A power supply circuit of the present invention includes: a current detection circuit connected between a first power supply voltage section for applying a first power supply voltage to a first electronic circuit and a second power supply voltage section for applying a second power supply voltage to a second electronic circuit, the current detection circuit having a monitor terminal for monitoring a current flowing from the first power supply voltage section to the second power supply voltage section; and a current compensation circuit connected to the first power supply voltage section and the monitor terminal, the current compensation circuit controlling a compensation current flowing from the first power supply voltage section to a ground based on the monitored current to compensate for current fluctuations caused by load fluctuations of the second electronic circuit, thereby achieving an objective of the present invention.  
           [0012]    According to above-described structure, the current detection circuit is used to monitor the current flowing through the second power supply voltage section to detect current fluctuations caused by load fluctuations of a digital circuit, etc., and the power supply compensation circuit is used to compensate for the current fluctuations to restrain generation of power supply noise and fluctuations in a power supply voltage, thereby realizing a high-performance power supply circuit which generates lower noise and can restrain malfunction of a circuit (e.g., an analog circuit) which is liable to be adversely affected by the generation of power supply noise and fluctuations in a power supply voltage or a deterioration in the quality of a signal output from a circuit (e.g., an analog circuit).  
           [0013]    The current detection circuit includes a linear regulator including an operational amplifier having a noninverting input terminal and an output terminal, a transistor, and first and second resistances, the transistor has a source connected to the first power supply voltage section, a gate connected to the output terminal of the operational amplifier, and a drain connected to the second power supply voltage section, the first and second resistances are connected in series between the second power supply voltage section and the ground, and a contact point between the first and second resistances is connected to the noninverting input terminal of the operational amplifier, and the operational amplifier noninverting input terminal is connected to a reference voltage section and the operational amplifier output terminal functions as the monitor terminal.  
           [0014]    According to the above-described structure, as described in the following Example 1, it is possible to monitor current fluctuations caused by load fluctuations of a digital circuit, etc., using the linear regulator.  
           [0015]    The current detection circuit includes a third resistance connected between the first power supply voltage section and the second power supply voltage section, and a monitor terminal on the second power supply voltage section side.  
           [0016]    According to the above-described structure, as described in the following Example 2, it is possible to monitor current fluctuations caused by load fluctuations of a digital circuit, etc., using the current detection circuit.  
           [0017]    The current compensation circuit includes: a subtraction circuit for producing a difference current between a prescribed current and a current controlled by the monitor terminal; and a current circuit for causing a compensation current proportional to the difference current to flow from the first power supply voltage section to a ground.  
           [0018]    According to the above-described structure, as described in the following Example 1, it is possible to compensate for current fluctuations of a digital circuit, etc., using the power supply compensation circuit.  
           [0019]    The current compensation circuit includes: a reference voltage generation circuit for producing a reference voltage; a differential amplifier circuit for producing a current corresponding to the sum of a prescribed current and a difference current, the difference current being proportional to a value of a difference voltage representing a difference between the reference voltage and a voltage at the monitor terminal; and a current circuit for causing a compensation current proportional to the sum of the prescribed current and the difference current to flow from the first power supply voltage section to a ground.  
           [0020]    According to the above-described structure, as described in the following Example 2, it is possible to compensate for current fluctuations of a digital circuit, etc., using the power supply compensation circuit.  
           [0021]    The first power supply voltage section is connected to an analog circuit.  
           [0022]    According to the above-described structure, it is possible to restrain malfunction of an analog circuit which is liable to be adversely affected by fluctuations in a power supply voltage or a deterioration in the quality of a signal output from a circuit.  
           [0023]    The second power supply voltage section is connected to a digital circuit.  
           [0024]    According to the above-described structure, it is possible to detect current fluctuations caused by load fluctuations of a digital circuit, etc., in which large current fluctuations occur.  
           [0025]    The current circuit causes the compensation current to flow via a fourth resistance to a ground.  
           [0026]    According to the above-described structure, it is possible to restrain generation of power supply noise by compensating for fluctuations in a current flowing through the second power supply voltage section. The sum of the compensation current and the current flowing through the second power supply voltage section may not be constant. In this case, power supply noise to be generated can be reduced by partially compensating for current fluctuations.  
           [0027]    The sum of a current flowing from the first power supply voltage section to the second power supply voltage section and the compensation current flowing from the first power supply voltage section to a ground is constant.  
           [0028]    According to the above-described structure, it is possible to restrain a current which is caused to unnecessarily flow through a current circuit due to a variance in element properties, etc., of a transistor provided in the current circuit.  
           [0029]    An RF transponder IC card of the present invention includes: a coil antenna; and a semiconductor integrated circuit including a tuning capacitance section having a tuning capacitance, a charging capacitance section having a charging capacitance, a rectifier circuit, an analog circuit, a digital circuit, and a power supply circuit which includes a current detection circuit connected between a first power supply voltage section for applying a first power supply voltage to a first electronic circuit and a second power supply voltage section for applying a second power supply voltage to a second electronic circuit, the current detection circuit having a monitor terminal for monitoring a current flowing from the first power supply voltage section to the second power supply voltage section and a current compensation circuit connected to the first power supply voltage section and the monitor terminal, the current compensation circuit controlling a compensation current flowing from the first power supply voltage section to a ground based on the monitored current to compensate for current fluctuations caused by load fluctuations of the second electronic circuit. The coil antenna is connected in parallel with the tuning capacitance section to an input of the rectifier circuit, the rectifier circuit has an output connected to the charging capacitance section and produces the first power supply voltage supplied to the analog circuit and the power supply circuit produces the second power supply voltage supplied from the first power supply voltage section to the digital circuit, thereby achieving an objective of the present invention.  
           [0030]    According to the above-described structure, it is possible to restrain malfunction of an analog circuit, etc., caused by load fluctuations in a digital circuit, etc., or the deterioration in the quality of a signal output from the analog circuit, thereby realizing a high-performance RF transponder IC card.  
           [0031]    The analog circuit includes a demodulator circuit.  
           [0032]    According to the above-described structure, as described in the following Example 3, it is possible to realize a high-performance RF transponder IC card.  
           [0033]    The semiconductor integrated circuit further includes a modulator circuit connected in parallel with the tuning capacitance section to an input of the rectifier circuit.  
           [0034]    According to the above-described structure, as described in the following Example 4, it is possible to realize a high-performance RF transponder IC card having a modulator circuit.  
           [0035]    The modulator circuit modulates a circuit impedance using a modulating signal.  
           [0036]    According to the above-described structure, as described in the following Example 4, it is possible to realize a high-performance RF transponder IC card having a full-wave rectifier.  
           [0037]    The rectifier circuit is a full-wave rectifier circuit.  
           [0038]    According to the above-described structure, as described in the following Example 4, it is possible to realize a high-performance RF transponder IC card having a full-wave rectifier. A half-wave rectifier may also be used as the rectifier. In such a case, it is possible to realize a high-performance RF transponder IC card having a half-wave rectifier.  
           [0039]    Thus, the invention described herein makes possible the advantages of providing: a high-performance power supply circuit and a high-performance RF transponder IC card which can restrain the generation of power supply noise and fluctuations in a power supply voltage by compensating for current fluctuations caused by load fluctuations of a digital circuit or the like and which can restrain the malfunction of a circuit (e.g., an analog circuit) which is liable to be adversely affected by the generation of power supply noise and fluctuations in a power supply voltage or a deterioration in the quality of a signal output from a circuit (e.g., an analog circuit).  
           [0040]    These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.  
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0041]    [0041]FIG. 1 is a diagram illustrating a structure of a power supply circuit according to Example 1 of the present invention.  
         [0042]    [0042]FIG. 2 is a diagram illustrating a structure of a power supply circuit according to Example 2 of the present invention.  
         [0043]    [0043]FIG. 3 is a diagram illustrating an exemplary structure of a power supply circuit according to the present invention.  
         [0044]    [0044]FIG. 4 is a diagram illustrating a structure of another power supply circuit according to Examples 1 and 2 of the present invention.  
         [0045]    [0045]FIG. 5 is a diagram illustrating a structure of an RF transponder IC card according to Example 3 of the present invention.  
         [0046]    [0046]FIG. 6 is a diagram illustrating a structure of a rectifier circuit in the RF transponder IC card according to Example 3 of the present invention.  
         [0047]    [0047]FIG. 7 is a graph illustrating a waveform of a power supply voltage AVDD after an amplitude-modulated signal is rectified in Example 3.  
         [0048]    [0048]FIG. 8A is a graph illustrating a waveform of a consumption current of a digital circuit in Example 3.  
         [0049]    [0049]FIG. 8B is a graph illustrating respective waveforms of the power supply voltage AVDD in Example 3 with respect to the RF transponder IC card with a power supply circuit and the RF transponder IC card without a power supply circuit.  
         [0050]    [0050]FIG. 8C is a graph illustrating respective waveforms of a demodulated signal in Example 3 with respect to the RF transponder IC card with a power supply circuit and the RF transponder IC card without a power supply circuit.  
         [0051]    [0051]FIG. 9 is a diagram illustrating a structure of an RF transponder IC card according to Example 4 of the present invention.  
         [0052]    [0052]FIG. 10A is a graph illustrating respective waveforms of an impedance of a coil L 2  with respect to the RF transponder IC card with a power supply circuit and the RF transponder IC card without a power supply circuit in Example 4.  
         [0053]    [0053]FIG. 10B is a graph illustrating a waveform of a modulating signal in Example 4.  
         [0054]    [0054]FIG. 10C is a graph illustrating a waveform of a consumption current of a digital circuit in Example 4.  
         [0055]    [0055]FIG. 11 is a diagram illustrating a structure of a conventional semiconductor integrated circuit.  
         [0056]    [0056]FIG. 12A is a graph illustrating a waveform of a current I 1  flowing through the conventional semiconductor integrated circuit.  
         [0057]    [0057]FIG. 12B is a graph illustrating a waveform of a power supply voltage VDD 1  applied to the conventional semiconductor integrated circuit.  
         [0058]    [0058]FIG. 13 is a graph illustrating input/output characteristic of a comparator having a hysteresis property. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0059]    Hereinafter, examples of the present invention will be described with reference to the accompanying drawings. In the drawings described below, components similar to those of the above-described conventional components will be denoted by the same reference numerals, and thus detailed explanation thereof will be omitted.  
       EXAMPLE 1  
       [0060]    [0060]FIG. 1 is a diagram illustrating a structure of a power supply circuit  1  according to Example 1 of the present invention. The power supply circuit  1  includes a current detection circuit  500  and a current compensation circuit  400 . A digital circuit  300  is supplied with a digital power supply voltage DVDD as a power supply voltage and an analog circuit  310  is supplied with an analog power supply voltage AVDD as a power supply voltage.  
         [0061]    The current detection circuit  500  includes a linear regulator  200  as a main component. The linear regulator  200  includes resistances R 1  and R 2 , an operational amplifier  210 , and a pMOS transistor M 1 . The transistor M 1  has a source connected to an analog power supply voltage AVDD section, a gate connected to an output terminal of the operational amplifier  210 , and a drain connected to a digital power supply voltage DVDD section. The output terminal of the operational amplifier  210  is a monitor terminal T 1  (to which a monitor voltage Va is applied) for monitoring a current flowing through the digital power supply voltage DVDD section (i.e., a current flowing through the digital circuit  300 ). The resistance R 1  is connected to the digital power supply voltage DVDD section and a noninverting input terminal T 2  of the operational amplifier  210 . The resistance R 2  is connected to a ground VSS and the noninverting input terminal T 2  of the operational amplifier  210 .  
         [0062]    The current compensation circuit  400  includes a subtraction circuit  410  and a current circuit  420 . The subtraction circuit  410  includes a prescribed current source Ic, a transistor M 2 , and a transistor M 3 . The current source Ic is connected to the ground VSS, a drain of the transistor M 2 , and a drain of a transistor M 3 . Each of the transistors M 2  and M 3  has a source connected to the analog power supply voltage AVDD section. The transistor M 2  has a gate connected to the monitor terminal T 1  (to which a monitor voltage Va is applied) of the linear regulator  200 . The transistor M 3  has a gate connected to the drain thereof to form a control voltage Vc section for the current circuit  420 . The current circuit  420  includes the transistor M 4 . The transistor M 4  has a source connected to the analog power supply voltage AVDD section, a drain connected to the ground VSS, and the gate connected to the control voltage Vc section.  
         [0063]    In the case where a noninverting input terminal T 3  of the operational amplifier  210  is externally supplied with a reference voltage Vref 2 , the digital power supply voltage DVDD is represented by:  
           DVDD=Vref× ( R 1+ R 2)/ R 2  (1).  
         [0064]    In this case, when a current flowing through the resistances R 1  and R 2  is set so as to be much lower than a current I 1  (a current flowing to the digital circuit  300 ), currents I 2 , I 3 , and I 4  flowing through the transistors M 2 , M 3 , and M 4 , respectively, are represented by:  
           I 2= n×I 1  (2)  
           I 3= Ic−n×I 1  (3), and  
           I 4= m× ( Ic−n×I 1)  (4).  
         [0065]    In the subtraction circuit  410 , the difference current I 3  between the prescribed current Ic and the current I 2  controlled by the monitor terminal T 1  (to which a monitor voltage Va is applied) is produced. In the current circuit  420 , the current I 4  proportional to the difference current I 3  flows as a compensation current from the analog power supply voltage AVDD section to the ground VSS. In the above-described expressions, n is a size ratio of the transistor M 1  to the transistor M 2 , and m is a size ratio of the transistor M 3  to the transistor M 4 . I 1  is a current flowing through the transistor Ml. For example, when gate widths of the transistors M 1 , M 2 , M 3 , and M 4  are widths W 1 , W 2 , W 3 , and W 4 , respectively, and gate lengths of the transistors M 1 , M 2 , M 3 , and M 4  are lengths L 1 , L 2 , L 3 , and L 4 , respectively, n and m are represented by:  
           n= ( W 2× L 1)/( L 2× W 1)  (5), and  
           m =( W 4× L 3)/( L 4× W 3)  (6).  
         [0066]    In the expression (4), when the following expressions:  
           Ic=n×I 0, and  
         [0067]    [0067] m= 1/ n    
         [0068]    are given, the current I 4  flowing through the transistor M 4  is represented by:  
           I 4= I 0− I 1.  
         [0069]    In this case, when the current I 1  flowing to the digital circuit  300  is increased by a value of ΔI 1  to I 1 +ΔI 1 , I 4  is I 0 −I 1 −ΔI 1 , and thus a current compensating for fluctuations in the current I 1  flowing to the digital circuit  300  flows through the current circuit  420 . In FIG. 1, a current flowing from the analog power supply voltage AVDD section to the analog circuit  310  has a value of the sum (I 0 +Ic) of the current II flowing to the digital circuit  300 , the current Ic flowing through the subtraction circuit  410 , and the current (I 0 −I 1 ) flowing through the current compensation circuit  420 . As a result, except for the current flowing to the analog circuit  310 , the currents flowing from the analog power supply voltage AVDD section are constant. This means that the noise generated in the analog power supply voltage AVDD due to load fluctuations of the digital circuit  300  is reduced.  
         [0070]    As can be seen from the description above, in Example 1, it is not necessary to use separate power supplies for a digital circuit and an analog circuit for the purpose of restraining fluctuations in a power supply voltage, thereby reducing the number of pins of a chip. Moreover, it is not necessary to provide a capacitance section having a great capacitance in the chip between a digital power supply voltage section and the ground for the purpose of restraining fluctuations in a power supply voltage, thereby preventing an area of a capacitance formed in the semiconductor integrated circuit (chip) from being increased. As a result, a high-performance power supply circuit which can be easily implemented on a chip and have low power supply noise can be realized.  
       EXAMPLE 2  
       [0071]    [0071]FIG. 2 is a diagram illustrating a structure of a power supply circuit  1  according to Example 2 of the present invention. The power supply circuit  1  includes a current detection circuit  500  and a current compensation circuit  400 . The digital circuit  300  is supplied with the digital power supply voltage DVDD as a power supply voltage and the analog circuit  310  is supplied with the analog power supply voltage AVDD as a power supply voltage.  
         [0072]    The current detection circuit  500  includes a resistance R 10  connected between the analog power supply voltage AVDD section and the digital power supply DVDD section and has, on the digital power supply voltage DVDD section side, a monitor terminal T 4  (to which a monitor voltage Va is applied) for monitoring a current flowing through the digital power supply voltage DVDD section (i.e., a current flowing to the digital circuit  300 ).  
         [0073]    The current compensation circuit  400  includes a reference voltage generation circuit  440 , a differential amplifier circuit  430 , and a current circuit  420 . The reference voltage generation circuit  440  includes resistances R 11  and R 12  connected in series between the analog power supply voltage AVDD section and a ground VSS. The reference voltage generation circuit  440  outputs a voltage which is produced based on resistance division between the resistances R 11  and R 12  as a reference voltage Vref 3 . The differential amplifier circuit  430  includes nMOS transistors M 10  and M 11 , pMOS transistors M 12  and M 13 , and a current source I 10 . The current source I 10  is connected to the ground VSS and sources of the transistors M 10  and M 11 . The transistor M 10  has a drain connected to a drain of the transistor M 12 . The transistor M 11  has a drain connected to a drain of the transistor M 13 . The transistors M 12  and M 13  are separately diode-connected (to have a structure in which a source and a gate are connected to serve as a cathode and a drain serves as an anode). The drain of the transistor M 11 , and a gate and the drain of the transistor M 13  are connected to a control voltage Vc section of the current circuit  420 . The transistors M 12  and M 13  have respective sources connected to the analog power supply voltage AVDD section. The transistor M 11  has a gate connected to the monitor terminal T 4  (to which a monitor voltage Va is applied). The transistor M 10  has a gate connected to the reference voltage Vref 3  section. The current circuit  420  includes a transistor M 4  which has a source connected to the analog power supply voltage AVDD section, a drain connected to the ground VSS, and a gate connected to the control voltage Vc section. The current circuit  420  controls the control voltage Vc in the differential amplifier circuit  430  so as to control a current flowing from the analog power supply voltage AVDD section to the ground VSS.  
         [0074]    In the case where a load resistance is Rmax when a maximum current flows through the digital circuit  300 , the relationship among the resistances R 10  to R 12  and Rmax is represented by:  
         ( R 10/( Rmax+R 10)/2= R 11/( R 11+ R 12)  (7).  
         [0075]    For example, when respective values of Rmax, R 10 , R 11 , and R 12  are given as follows: Rmax=90 Ω, R 10 =10 Ω, R 11 =10 kΩ, and R 12 =190 kΩ, the relationship between R 10  and R 11  is given as in R 11 /R 10 =1000 for the purpose of lowering a consumption current.  
         [0076]    When the analog power supply voltage AVDD is 3V, the reference voltage Vref 3  is 2.85V, the power supply voltage DVDD is 2.7V at the maximum digital load, and the maximum load current of the digital circuit  300  is 30 mA. In this case, when a mirror ratio (equivalent to the size ratio of Example 1) of the transistor M 13  to the transistor M 4  is M and current gain of the differential amplifier circuit  430  is A, a current I 4  flowing through the transistor M 4  is represented by:  
           I 4= M× ( A ×( DVDD−Vref 3)+ I 10/2)  (8).  
         [0077]    This means that the current I 4  flowing through the transistor M 4  is proportional to the sum of a current (A×(DVDD−Vref 3 ) which is caused to flow by a difference between the power supply voltage DVDD and the reference voltage Vref 3  and a prescribed current I 10 / 2 .  
         [0078]    In the case where respective values of A, I 10 , and M are given as follows: A=0.001, I 10 =300 μA, and M=100, when the load current flowing to the digital circuit  300  is maximum (i.e., 30 mA), a current flowing through the current circuit  420  is approximately 0 mA, and when the load current flowing to the digital circuit  300  is minimum (i.e., 0 mA), the current flowing through the current circuit  420  is approximately 30 mA. As a result, except for the current flowing from the analog power supply voltage AVDD section to the analog circuit  310 , the currents flowing through the semiconductor integrated circuit  3  are always constant at approximately 30 mA without being affected by load fluctuations of the digital circuit  300 . The currents flowing through the differential amplifier circuit  430  and the reference voltage generation circuit  440  are very low in comparison to the current flowing through the currents circuit  420  and the digital circuit  300 , and thus is negligible. As a result, it is possible to restrain generation of noise in the power supply voltage AVDD section caused by load fluctuations of the digital circuit  300 , thereby realizing a high-performance power supply circuit.  
         [0079]    As can be seen from the description above, in Example 2, it is not necessary to use separate power supplies for a digital circuit and an analog circuit for the purpose of restraining fluctuations in a power supply voltage, thereby reducing the number of pins of a chip. Moreover, it is not necessary to form a capacitance section having a great capacitance in the chip between a digital power supply voltage section and the ground for the purpose of restraining fluctuations in a power supply voltage, thereby preventing an area of a capacitance formed in the semiconductor integrated circuit (chip) from being increased. As a result, a high-performance power supply circuit which can be easily implemented on a chip and have low power supply noise can be realized.  
         [0080]    The present invention is not limited to specific examples of the current detection circuit  500  and the current compensation circuit  400  described above with reference to Examples 1 and 2. As illustrated in FIG. 3, any power supply circuit falls within the scope of the present invention as long as the power supply circuit monitors a current flowing through the digital power supply voltage DVDD section (i.e., a current flowing to the digital circuit  300 ) using the current detection circuit  500  and controls a compensation current flowing from the analog power supply voltage AVDD section to the ground VSS using the current compensation circuit  400  so as to compensate for current fluctuations of the digital circuit  300 .  
         [0081]    In Example 2, the sum of a compensation current and a current flowing through the digital power supply voltage DVDD section is constant, but may not be constant. Power supply noise to be generated can be reduced by partially compensating for fluctuations in a current flowing through the digital power supply voltage DVDD section by the current compensation circuit  400 .  
         [0082]    In Examples 1 and 2, the current circuit  420  has the drain of the transistor M 4  directly connected to the ground VSS, but, as illustrated in FIG. 4, the drain of the transistor M 4  may be connected to the ground VSS via the resistance R 3 . In this case, it is possible to restrain a current which is caused to unnecessarily flow through the circuit due to a variance in element properties, etc., of the transistor M 4 .  
         [0083]    Moreover, in Examples 1 and 2, the digital circuit  300  and the analog circuit  310  are used, but any circuit may be used in place of the digital circuit  300  as long as the circuit cannot be affected by fluctuations in a power supply voltage, and any circuit can be used in place of the analog circuit  310  as long as the circuit is easily affected by fluctuations in a power supply voltage.  
         [0084]    As can be seen from the description above, the present invention is highly effective in providing a high-performance power supply circuit and is extremely useful.  
       EXAMPLE 3  
       [0085]    [0085]FIG. 5 is a diagram illustrating a structure of an RF transponder IC card  4  according to Example 3 of the present invention. The IC card  4  includes a coil antenna L 2  and a semiconductor integrated circuit  3 . The semiconductor integrated circuit  3  includes a tuning capacitance C 3  section having a tuning capacitance C 3 , a charging capacitance C 4  section having a charging capacitance C 4 , a rectifier circuit  2 , an analog circuit  310 , a digital circuit  300 , and a power supply circuit  1 . The tuning capacitance C 3  section and the coil antenna L 2  are both connected in parallel to an input of the rectifier circuit  2 . An output section of the rectifier circuit  2  is connected to the charging capacitance C 4  section. The analog circuit  310  is supplied with a power supply voltage AVDD as a power supply voltage. The analog circuit  310  is provided with a demodulator circuit  311  retrieving an input signal from a power supply voltage AVDD section. The power supply circuit  1  produces a power supply voltage DVDD which is supplied from the power supply voltage AVDD section to the digital circuit  300 . The power supply circuits described in Examples 1 and 2 can be used as the power supply circuit  1 .  
         [0086]    The coil antenna L 2  receives an electric power consumed by the RF transponder IC card  4  and an input signal. The input signal to be received by the coil antenna L 2  has been amplitude-modulated. A full-wave rectifier circuit using diodes D 1 -D 4  as illustrated in FIG. 6 is used as the rectifier circuit  2 . A comparator having a hysteresis property is used as the demodulator circuit  311 . The input signal received by the coil antenna L 2  is rectified by the rectifier circuit  2  to produce the power supply voltage AVDD having a waveform illustrated in FIG. 7. The demodulator circuit  311  extracts a signal component from the power supply voltage AVDD. The demodulator circuit  311  retrieves the power supply voltage AVDD as a signal from the power supply voltage AVDD section when a level of the power supply voltage AVDD varies to a reference level or higher.  
         [0087]    When a current fluctuates in the digital circuit  300  in a manner as illustrated in FIG. 8A, the power supply voltage AVDD has a waveform as represented by the dashed line of FIG. 8B. If the RF transponder IC card  4  does not have the power supply circuit  1 , such current fluctuations (load fluctuations) in the digital circuit  300  cause a malfunction of the demodulator circuit  311 , so that a demodulated signal output from the demodulator circuit  311  has a waveform as represented by the dashed line of FIG. 8C. In contrast, in the RF transponder IC card  4  with the power supply circuit  1  of Example 3, fluctuations in the power supply voltage AVDD caused by the load fluctuations of the digital circuit  300  can be restrained so that a demodulated signal output from the demodulator circuit  311  has a waveform as represented by the solid line of FIG. 8B. As a result, the demodulator circuit  311  can demodulate a signal without having a malfunction, so that the demodulated signal has a waveform as represented by the dashed line of FIG. 8C.  
         [0088]    As can be seen from the description above, in Example 3, malfunction of the analog circuit  310  caused by load fluctuations of the digital circuit  300  can be reduced. As a result, a high-performance RF transponder IC card can be realized.  
       EXAMPLE 4  
       [0089]    [0089]FIG. 9 is a diagram illustrating a structure of an RF transponder IC card  4  according to Example 4 of the present invention. Example 4 differs from Example 3 in that the RF transponder IC card  4  according to Example 4 includes a modulator circuit  315  connected to an input of the rectifier circuit  2  in parallel with the tuning capacitance C 3  section. The modulator circuit  315  modulates an impedance of the coil antenna L 2  in the semiconductor integrated circuit  3  using a modulating signal.  
         [0090]    [0090]FIG. 10A is a graph illustrating respective waveforms of an impedance of the coil L 2  with respect to the RF transponder IC card  4  with a power supply circuit  1  and the RF transponder IC card  4  without the power supply circuit  1  when a modulating signal having a waveform as illustrated in FIG. 10B is input to the RF transponder IC card  4 . In FIG. 10A, the solid line represents a waveform of the impedance of the coil L 2  of the RF transponder IC card  4  with the power supply circuit  1  and the dashed line represents a waveform of the impedance of the coil L 2  of the RF transponder IC card  4  without the power supply circuit  1 . When a current fluctuates (load fluctuations), as illustrated in FIG. 10C, in the digital circuit  300  of the RF transponder IC card without the power supply circuit  1 , the impedance of the coil L 2  is affected in a manner as represented by the dashed line of FIG. 10A. In contrast, in the RF transponder IC card  4  with the power supply circuit  1  of Example 4, a power supply impedance caused by load fluctuations of the digital circuit  300  can be stabilized so that the power supply impedance has a waveform as represented by the solid line of the FIG. 10A.  
         [0091]    As can be seen from the description above, in Example 3, malfunction of the analog circuit  310  caused by load fluctuations of the digital circuit  300  can be reduced. As a result, a high-performance RF transponder IC card can be realized.  
         [0092]    The present invention is not limited to specific examples of the semiconductor integrated circuit  3  described above with reference to Examples 3 and 4. Any RF transponder IC card falls within the scope of the present invention as long as the RF transponder IC card is provided with a power supply circuit as described in Examples 1 and 2.  
         [0093]    In Example 4, the tuning capacitance C 3  section is included in the semiconductor integrated circuit  3 , but it may be provided on the outside of the semiconductor integrated circuit  3  (chip) or a parasitic capacitance of the rectifier circuit  2  or the coil antenna L 2  may be used in place of the tuning capacitance C 3  section.  
         [0094]    In Examples 3 and 4, a full-wave rectifier circuit is used as the rectifier circuit  2 , but a half-wave rectifier circuit may be used.  
         [0095]    As can be seen from the description above, the present invention is highly effective in providing a high-performance RF transponder IC card and is extremely useful.  
         [0096]    As described in detail above, according to the present invention, a current detection circuit is used to monitor a current flowing through a digital power supply voltage section, etc., to detect current fluctuations caused by load fluctuations of a digital circuit, etc., and a power supply compensation circuit is used to compensate for the current fluctuations, thereby realizing a high-performance power supply circuit which generates lower noise.  
         [0097]    Moreover, the present invention provides a power supply circuit which can realize a high-performance RF transponder IC card having a demodulator circuit and a modulator circuit.  
         [0098]    Various other modifications will be apparent to and can be readily made by those skilled in the art without departing from the scope and spirit of this invention. Accordingly, it is not intended that the scope of the claims appended hereto be limited to the description as set forth herein, but rather that the claims be broadly construed.