Abstract:
An improved motor commutation pulse detection circuit for comparing a filtered motor current signal to a threshold value, where the circuit is responsive to the actual or expected amplitude of the commutation pulses for adjusting the motor current signal or the threshold value so that the compared threshold value is substantially equal in amplitude to minimum amplitude commutation pulses in the compared motor current signal. In one circuit, the threshold value is varied in accordance with the average current flowing through the motor at the time of the commutation event. In another circuit, the threshold is effectively switched between a high value and a low value depending on the mode of operation of the motor. A motor run detection threshold is activated during motor running periods, while a motor brake detection threshold is activated during motor braking. The run time detection threshold is set to a relatively high value to detect the relatively high amplitude commutation pulses that occur during motor running, while the brake detection threshold is set to a relatively low value to detect the relatively low amplitude commutation pulses that occur during motor braking. The threshold can effectively be changed by attenuating the commutation signal by a predetermined factor during motor run periods.

Description:
TECHNICAL FIELD 
     This invention relates to circuitry for determining the position of a motor driven actuator by identifying and counting motor commutation pulses. 
     BACKGROUND OF THE INVENTION 
     It is frequently desired, either for control or diagnostic purposes, to detect the position of a motor driven actuator, such as a movable door in an automotive air conditioning duct. In applications where the actuator is driven by a brush-type DC motor, the actuator position may be reliably and inexpensively determined by detecting and counting pulses in the motor current caused by the periodic commutation of motor current by the motor brushes. In general, the pulses are extracted by filtering, and compared to a threshold to distinguish commutation pulses from noise pulses. When a commutation pulse is detected, a one shot is triggered to produce a logic level pulse, and the one shot pulses are counted to provide an output corresponding to the actuator position. 
     Several different pulse detection circuits have been proposed. In one such circuit, described in U.S. Pat. No. 5,132,602, a resistive shunt is connected in a ground path of the motor drive circuit, and the voltage across the shunt is capacitively coupled to the filter circuit. In another circuit, described in U.S. Pat. No. 5,514,977, a resistive shunt is connected in series with the motor, and the voltage at a node between the motor and shunt is capacitively coupled to the filter circuit. In still another circuit, described in co-pending U.S. patent application Ser. No. 09/249,339, filed Feb. 12, 1999, a high impedance circuit connected across the motor controls the current in a sense resistor in proportion to the motor current, and the sense resistor voltage is provided as an input to the filter circuit. Alternatively, the motor voltage itself may be capacitively coupled to the filter circuit, as also described in the co-pending U.S. patent application Ser. No. 09/249,339. 
     A problem experienced in each of the above-described circuits concerns reliably distinguishing commutation pulses from noise pulses. The problem occurs particularly with those circuits which are designed to detect commutation pulses both during motor running and motor braking or coasting, because the pulse amplitudes are much higher during running than during braking or coasting. For example, the commutation pulse amplitude during motor running may be 50 mV or more, while the amplitude during motor braking or coasting may be as small as 14 mV. To detect all commutation pulses, the comparator circuitry is generally designed with a detection threshold slightly lower than the smallest expected pulse, say 12 mV. However, the susceptibility to noise increases as the detection threshold decreases, resulting in an increased likelihood of erroneous pulse detection. What is needed is a simple detection circuit that is insensitive to noise pulses, but will reliably detect all commutation pulses. 
     SUMMARY OF THE INVENTION 
     The present invention is directed to an improved motor commutation pulse detection circuit for comparing a filtered motor current signal to a threshold value, where the circuit is responsive to the actual or expected amplitude of the commutation pulses for adjusting the motor current signal or the threshold value so that the compared threshold value is substantially equal in amplitude to minimum amplitude commutation pulses in the compared motor current signal. In this way, all of the commutation pulses can be reliably detected, and the likelihood of mistaking a noise pulse for a commutation pulse is dramatically reduced. 
     According to a first embodiment, the threshold is varied in accordance with the average current flowing through the motor at the time of the commutation event. In the illustrated embodiment, this is achieved by filtering out the low frequency component of the commutation signal, summing it with a minimum threshold value, and applying a gain factor to the sum to form the variable threshold with which the high frequency component of the commutation signal is compared. 
     According to a second embodiment, the threshold is effectively switched between a high value and a low value depending on the mode of operation of the motor. A run time detection threshold is activated during motor running periods, while a brake/coast detection threshold is activated during motor braking and coasting. The run time detection threshold is set to a relatively high value to detect the relatively high amplitude commutation pulses that occur during motor running, while the brake/coast detection threshold is set to a relatively low value to detect the relatively low amplitude commutation pulses that occur during motor braking and coasting. In the illustrated embodiment, this is achieved with a single comparator and an attenuation circuit that attenuates the commutation signal by a predetermined factor during motor running periods. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a circuit diagram of a first embodiment of the variable threshold motor commutation pulse detection circuit of this invention. 
     FIG. 2 is a circuit diagram of a second embodiment of the variable threshold motor commutation pulse detection circuit of this invention. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     In FIG. 1, the reference numeral  10  generally designates a motor control system including a motor  12 , a drive circuit  14 , an electronic controller  16 , a commutation pulse detection circuit  18 , and a pulse count circuit  20 . The motor  12  is a brush-type DC motor, the drive circuit  14  includes four transistors T 1 , T 2 , T 3 , T 4  connected in an H-bridge configuration to bi-directionally energize the motor windings with a current I M  from a DC power supply (not shown) coupled between supply line  22  (V SUPP ) and ground. The motor  10  may be coupled to drive an actuator A, and the controller  16  produces drive signals HD 1 , LD 1 , HD 2 , LD 2  for the bridge transistors T 1 -T 4  to move the actuator A to a commanded position. The commutation pulse detection circuit  18  includes a motor current circuit  18   a  and a pulse detection circuit  18   b . The motor current circuit  18   a  produces a motor current signal S 0  on line  24  corresponding to the absolute value of the motor current I M , and the pulse detection circuit produces a pulse of uniform duration on line  26  for each commutation pulse detected in the signal S 0 . The line  26 , in turn, is supplied as an input to the pulse count circuit  20 , which provides a digital feedback signal to controller  16  on line  28 . The feedback signal on line  28  corresponds to the actual motor position, and the controller  16  compares the actual and commanded motor positions to form a closed-loop error signal for activating the transistors T 1 -T 4  to drive the motor  10  to the commanded position. 
     The motor current circuit  18   a  includes a pair of operational amplifiers Al and A 2  coupled to opposing terminals or nodes N 1  and N 2  of motor  10 , a current mirror circuit comprising the p-channel MOS transistors T 5 , T 7 , T 8 , T 10  and the n-channel MOS transistors T 6 , T 9  coupled to the outputs of amplifiers A 1 -A 2 , and a sense resistor R SNS . Specifically, the inverting input of amplifier A 1  is connected to node N 1 , and the inverting input of amplifier A 2  is connected to node N 2 . The non-inverting input of amplifier A 1  is connected to a node N 3  between serially connected transistors T 8  and T 9 , and the non-inverting input of amplifier A 2  is connected to a node N 4  between serially connected transistors T 5  and T 6 . The serially connected transistors T 8 , T 9  and T 5 , T 6  are coupled between supply line  22  and ground, whereas the transistors T 7  and T 10  couple the supply line  22  to the upper terminal, or node, N 5  of sense resistor R SNS , the opposite terminal of R SNS  being coupled to ground. The gate of transistor T 9  is coupled to the controller drive signal LD 2  for bridge transistor T 4 , while the gate of transistor T 6  is coupled to the drive signal LD 1  for bridge transistor T 2 . Finally, the gates of transistors T 8 , T 10  are coupled to the output of amplifier A 1 , and the gates of transistors T 5 , T 7  are coupled to the output of amplifier A 2 . 
     The amplifier A 1  and transistor  18  force the voltage at node N 3  to follow the voltage at motor node N 1 , and the amplifier A 2  and transistor T 5  force the voltage at node N 4  to follow the voltage at motor node N 2 . However, the transistors T 6 , T 9  have reduced channel widths W 6 , W 9  compared with the widths W 2 , W 4  of bridge transistors T 2 , T 4 , so that the currents I 6 , I 9  flowing through transistors T 6 , T 9  are related to the currents I 2 ,  14  flowing through bridge transistors T 2 , T 4  as follows: I 6 =(W 6 /W 2 )*I 2 , and I 9 =(W 9 /W 4 )*I 4 . Furthermore, the transistors T 5 , T 7  and T 8 , T 10  are matched so that the currents I 6 , I 9  are mirrored in the transistors T 7 , T 10 . When the motor current IM has a direction as indicated in FIG. 1, transistors T 8 , T 10  are cut off, and the amplifier A 2  and transistors T 5 , T 6 , T 7  produce a voltage S 0  across R SNS  of (W 6 /W 2 )*I 2 *R SNS . Likewise, when the motor current IM has a direction opposite to that indicated in FIG. 1, transistors T 5 , T 7  are cut off, and the amplifier Al and transistors T 8 , T 9 , T 10  produce a voltage S 0  across R SNS  of (W 9 /W 4 )*I 4 *R SNS . In other words, the voltage S 0  across R SNS  has an absolute value that is proportional to the motor current I M . 
     As indicated above, the function of the pulse detection circuit  18   b  is to identify commutation pulses in the motor current signal SO. In general, this is done by filtering and amplifying the signal S 0 , and comparing it to a threshold, as described in the aforementioned patents and patent application. However, the present invention is particularly directed to a pulse detection circuit  18   b  having a variable threshold for reliably identifying motor commutation pulses with minimum susceptibility to noise in the motor current signal S 0 . 
     In the embodiment of FIG. 1, the motor current signal S 0  is supplied as an input to each of the filters  30  and  32 . The band-pass filter  30  passes components of the motor current signal S 0  in the frequency range of commutation pulses, producing a high frequency, or AC, motor current signal S AC . The bandwidth of filter  30  is highly dependent on the motor and its application, but typically is designed to pass signal components in the range of 20 kHz to 50 kHz. On the other hand, the low-pass filter  32  passes components of the motor current signal So in a relatively low frequency range, producing a low frequency, or DC, motor current signal S DC ; in the illustrated embodiment, the filter  32  passes signal components in the range of 0 Hz to 2 kHz. Thus, the signal S AC  includes all of the commutation pulses (along with some noise pulses), whereas the signal S DC  is representative of the average motor current. The high frequency signal S AC  is applied to amplifier  34  which applies a gain factor of a,, forming a signal on line  35  of a 1 *S AC , that is applied to the non-inverting input of comparator  36 . Inverter  38  inverts the signal on line  35 , forming a signal on line  39  of −(a 1 *S AC ), that is applied to the inverting input of comparator  40 . The low frequency signal S DC  is applied to summer  42  along with a minimum threshold value S MIN , and the sum (S DC +S MIN ) is applied as an input to the amplifier  44 , which applies a gain factor of a 0 . The output of amplifier  44  on line  45  forms the commutation pulse threshold THR, and is given by a 0 *(S DC +S MIN ). The threshold THR is applied to the inverting input of comparator  36 , and to the inverting input of comparator  40 . Thus, the comparator  36  produces a high logic output signal when a 1 *S AC &gt;a 0 *(S DC +S MIN ), corresponding to a positive commutation pulse; and the comparator  40  produces a high logic output signal when −(a 1 *S AC )&gt;a 0 *(S DC +S MIN ), corresponding to a negative commutation pulse. The outputs of comparators  36  and  40  are applied as inputs to OR-gate  46 , which in turn, provides an input to one shot circuit  48 . Thus, as indicated above, pulses of uniform duration (determined by one shot  48 ) are developed on line  26  for each commutation pulse detected in the signal S 0 . 
     In the above described pulse detection circuit  18   b , the minimum threshold S MIN  and the gains a 0  and a 1  are calibrated for a given motor control application. The minimum threshold S MIN  is calibrated to be equal to or slightly less than the minimum motor current required to overcome friction once the motor  10  is running; that is, the lowest motor current at which the motor  10  will seize for a given application. The gain a 0  applied to the sum (S DC +S MIN ) is determined so that the threshold THR falls within the common mode input range of the comparators  36  and  40  over the entire range of S DC . In this regard, a limiting circuit may optionally be inserted in the threshold generation path—i.e., between the filter  32  and summer  42 , between the summer  42  and the amplifier  44 , or after the amplifier  44 —to define a maximum value of the threshold THR to simplify the design of the comparators. A moderate amount of limiting may be used without ill effect because susceptibility to noise occurs primarily at low values of S DC . Finally, the gain a 1  applied to the high frequency component SAC is calibrated so that the minimum amplitude commutation pulse is approximately equal to the product a 0 *S DC . Typically, the minimum amplitude commutation pulse varies from 2%-10% of the average motor current, meaning that the gain a 1  will typically have a value of between 10*a 0  and 50*a 0 . 
     FIG. 2 illustrates a motor control system  10 ′ in accordance with a second embodiment of this invention in which a pulse detection circuit  18   b ′ defines a threshold THR′ that is switched between a high value and a low value depending on the mode of operation of the motor  10 . Although this functionality can be implemented in different ways, FIG. 2 illustrates an embodiment in which a signal containing the commutation pulses is attenuated by a predetermined factor when the motor is running, and not attenuated otherwise. Alternatively, a simple logic circuit could be used to select the appropriate threshold for comparison with the commutation signal. 
     Referring to FIG. 2, the motor current signal on line  24  is applied to a band-pass filter and amplifier circuit  50  essentially equivalent to the combination of band-pass filter  30  and amplifier  34  of FIG.  1 . The output of circuit  50  is applied through a resistor  52  to the junction  54 , which is coupled to ground through a resistor  60  and the emitter-collector circuit of transistor  62 . The base of transistor  62  is coupled to electronic controller  16  via line  64 , which carries a logic one output signal when the motor  10  is in a run mode, and a logic zero when motor  10  is in a brake mode. The ratio of resistors  52  and  60  determines the amount of attenuation applied to the output of circuit  50  when transistor  62  is biased conductive during the motor run periods. In the illustrated embodiment, con the commutation pulse amplitude during running operation is approximately four times the commutation pulse amplitude during braking, so the resistance value of resistor  52  is chosen to be approximately three times that of resistor  60 . Obviously, this ratio will vary depending on the application and motor. Similar to the embodiment of FIG. 1, the signal at junction  54  is applied to the non-inverting input of comparator  36 . Inverter  38  inverts the signal at junction  54 , and applies the inverted signal to the inverting input of comparator  40 . A fixed threshold THR′ is applied to the inverting input of comparator  36 , and to the non-inverting inputs  7  comparators  36  and  40 . The threshold THR′ has a relatively low value, and is calibrated to be slightly less than the minimum amplitude commutation pulse expected during coasting of the motor  10 . Thus, the comparator  36  produces a high logic output signal in response to a positive commutation pulse; and the comparator  40  produces a high logic output signal in response to a negative commutation pulse. The outputs of comparators  36  and  40  are applied as inputs to OR-gate  46 , which in turn, provides an input to one shot circuit  48 . In all other respects, the motor control system  10  of FIG. 2 is like that of FIG. 1, and therefore is not described in detail at this point. 
     In summary, the pulse detection circuits of the present invention may be characterized as having a variable threshold which is high when the commutation pulse amplitude is high, and low when the commutation pulse amplitude is low. According to the first embodiment of FIG. 1, the threshold is varied in accordance with the average current flowing through the motor at the time of the commutation event. According to a second embodiment of FIG. 2, the threshold is effectively switched between a high value and a low value depending on the mode of operation of the motor. In either case, the susceptibility to noise pulses is minimized without compromising the ability to reliably detect all commutation pulses. 
     It will be recognized that the present invention, while described in reference to the illustrated embodiments, is not limited thereto. For example, the motor current signal SO may be variously obtained, and numerous circuit modifications may be made. For example, the inverter  38  may be applied to the threshold instead of the motor current signal S 0 , if desired, or an absolute value circuit could be used to eliminate one of the comparators  36 ,  40 . Similarly, while the dual threshold function of the second embodiment is depicted as being achieved by selectively attenuation of the motor current signal S 0 , it will be understood that alternate implementations may be utilized; for example, circuitry could be provided for selecting one of two different thresholds for comparison with an un-attenuated motor current signal S 0 . Accordingly, it will be understood that pulse detection circuits incorporating these and other modifications may fall within the scope of this invention, which is defined by the appended claims.