Abstract:
A system for processing two coherent RF signals respectively provided from two differently oriented receivers of RF radiation, to measure the polarization of the received radiation. A switch combines the two received signals in a repetitive time-shared sequence over a single channel. During each cycle one of the received signals is switched onto the channel for a first predetermined period and the other received signal subsequently is switched onto the channel for a longer second predetermined period that is an integer multiple of the first period. In order to determine the relative amplitude of the two received signals, the combined signal is delayed by one first predetermined period; and the delayed and undelayed combined signals are compared to thereby provide relative amplitude indication signals. In order to determine the relative phase of the two received signals, the combined signal is divided into two parts, and one part of the divided signals is delayed by one first predetermined period; the delayed and undelayed divided signals are processed by a polar discriminator to provide a combination of signals having amplitudes that are a function of the relative phase of the two received signals; and the combination of signals are encoded by a phase angle encoder to thereby provide a relative phase indication signal. The relative amplitude indication signals and the relative phase indication signal are processed by sampling the indication signals during intervals occurring at a rate of once per delay period and comparing the samples to provide an indication of the polarization of the received radiation.

Description:
BACKGROUND OF THE INVENTION 
     The present invention pertains generally to electromagnetic radiation polarization measurement systems and is particularly directed to an improved system and corresponding method for processing two coherent RF signals respectively provided from two differently oriented receivers of RF radiation to measure the polarization of the received radiation. 
     Typically the differently oriented receivers are sensitive to orthogonally polarized RF radiation, such as in a crossed log periodic antenna utilized as a feed for a parabolic dish. Within the context of the present invention, the term &#34;differently oriented receivers&#34; also refers to functionally equivalent antennas, such as a dual polarized horn antenna. 
     For some applications, it is desirable to combine the two received signals for transfer over a single communication channel, such as when a waveguide rotary joint forms a portion of the communications link between the receiving antenna and portions of a signal processing system. The system of the present invention is useful for such applications, although its use is not necessarily limited to systems so including a rotary joint. 
     SUMMARY OF THE INVENTION 
     The present invention is a system including a switch for combining the two received signals in a repetitive time-shaped sequence over a single channel, wherein during each cycle one of the received signals is switched onto the channel for a first predetermined period and the other received signal subsequently is switched onto the channel for a longer second predetermined period that is an interger multiple of the first period; an amplitude encoder for determining the relative amplitude of the two received signals by delaying the combined signal by one first predetermined period and comparing the delayed and undelayed combined signals to thereby provide relative amplitude indication signals; a circuit for determining the relative phase of the two received signals by dividing the combined signal into two parts, delaying one part of the divided signal by one first predetermined period, processing the delayed and undelayed divided signals to provide a combination of signals having amplitudes that are a function of the relative phase of the two received signals, and encoding the combination of signals to thereby provide a relative phase indication signal; and a processor for processing the relative amplitude indication signals and the relative phase indication signal by sampling the indication signals during intervals occurring at a rate of once per delay period and comparing the samples to provide an indication of the polarization of the received radiation. The present invention is also the method corresponding to the above-described system. 
     Additional features of the present invention are described in relation to the description of the preferred embodiment. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     FIG. 1 is a block diagram of the preferred embodiment of the system of the present invention. 
     FIG. 2A shows the waveform of the clock signal provided by the clock and driver circuit in the system of FIG. 1. 
     FIG. 2B shows the waveform of the switching signal provided by the pulse generator in the system of FIG. 1. 
     FIG. 2C shows the waveform of the strobe signal provided by the clock and driver circuit in the system of FIG. 1. 
     FIG. 2D shows the waveforms of the delayed and undelayed combined signals in the amplitude encoder in the system of FIG. 1 when the polarization of the received RF radiation is vertical. 
     FIG. 2E is a table showing the pattern of the relative amplitude indication signals provided by the amplitude encoder in the system of FIG. 1 over all of the sample intervals of each cycle when the polarization of the received RF radiation is vertical. 
     FIG. 2F shows the waveforms of the delayed and undelayed combined signals in the amplitude encoder in the system of FIG. 1 when the polarization of the received RF radiation is horizontal. 
     FIG. 2G is a table showing the pattern of the relative amplitude indication signals provided by the amplitude encoder in the system of FIG. 1 over all of the sample intervals in each cycle when the polarization of the received RF radiation is horizontal. 
     FIG. 3 shows a sample waveform of the combined signal in the system of FIG. 1 during the transition when an RF signal is initially received. 
     FIG. 4 shows the waveforms of the signals provided by the polar discriminator in the system of FIG. 1. 
     FIG. 5 is a sector diagram showing the relationship of the binary value of the relative phase indication signal provided by the phase angle encoder in the system of FIG. 1 to the relative phase Δφ of the received RF signals provided to the RF switch in said system. 
     FIG. 6 is a table showing a typical pattern of the relative phase indication signals provided by the phase angle encoder in the system of FIG. 1 over all of the sample intervals in each cycle for four different types of polarization of the received RF radiation. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring to FIG. 1, the preferred embodiment of the system of the present invention includes a clock and driver circuit 10, a pulse generator 11, an RF switch 12, an RF receiver 14, a log IF amplifier 15, a threshold detector 17, a slope detector 19, an activity detector 20, an amplitude encoder 21, a power divider 22, a delay line 24, limiting amplifiers 25 and 26, a polar discriminator 27, a phase angle encoder 29, a sequence indicator 30, an ECL/TTL interface raw word latch 31 and a microprocessor 32. 
     The system of FIG. 1 processes two coherent RF signals respectively provided on lines 34 and 35 from a vertically oriented RF antenna 36 and a horizontally oriented RF antenna 37 to measure the polarization of RF radiation received by the two antennas 36, 37. Preferably the vertical and horizontal antennas 36, 37 are embodied in either a single crossed log periodic antenna or a dual polarized horn antenna. In either embodiment, the antenna would be utilized as the feed element with a parabolic dish. 
     The RF switch 12 combines the two received RF signals from lines 34 and 35 in a repetitive time-shared sequence over a single channel 39. The single channel 39 may include a rotary joint 40. The RF switch 12 operates in response to a switching signal on line 41 (as shown n FIG. 2B) from the pulse generator 11 to cause the received signal on line 34 from the vertically oriented antenna 36 to be switched onto the single channel 39 for a predetermined period of 100 nanoseconds (nsec) while the switching signal on line 41 is high, and to cause the received signal on line 35 from the horizontally oriented antenna 37 to be switched onto the single channel 39 for a longer period of 200 nsec while the switching signal on line 41 is low. The pulse generator 11 provides the switching signal on line 41 in response to a clock signal on line 42 (as shown in FIG. 2A) from the clock and driver circuit 10. The clock signal on line 42 is a pulsed square wave signal that undergoes a state transition at 100 nsec intervals. 
     The receiver 14 receives the combined signal from line 39 and provides the combined signal onto line 44 at an intermediate frequency (IF) of 160 Megahertz (MHz). 
     The log IF amplifier 15 amplifies the combined IF signal on line 44 to provide a combined signal on line 45 having an amplitude that is logarithmically proportional to the power of the signal on line 44. 
     The threshold detector 17 provides a threshold indication signal on line 46 for indicating whether the amplitude of the combined signal on line 45 exceeds a predetermined voltage threshold V T  (as shown in FIG. 3). 
     The slope detector 19 provides a slope indication signal on line 47 for indicating whether the slope of the combined signal on line 45 is less than a predetermined slope as shown by the slope of the curve illustrated in FIG. 3 at point S T . The activity detector 20 is a logic circuit which provides an activity indication signal on line 49 for indicating when the combined signal on line 45 has an amplitude greater than the predetermined threshold voltage V T  and a slope less than the predetermined slope at the point S T . 
     The activity detector 20 thereby does not recognize either noise below the threshold level V T  or sudden sporadic signal transitions as valid activity. 
     The activity indication signal on line 49 is provided to the latch 31 in response to the leading edge of each strobe signal pulse on line 50. The strobe signal (FIG. 2C) is provided on line 50 by the clock and driver circuit 50, and is timed so that the leading edge of each strobe signal pulse occurs shortly before each transition in the pulse clocked signal on line 42, as shown in FIG. 2. 
     The amplitude encoder 21 determines the relative amplitude of the two received signals on lines 34 and 35 by delaying the combined signal on line 45 by the predetermined period of 100 nsec and by comparing the delayed and undelayed combined signals to thereby provide two relative amplitude indication signals on the two lines 51 and 52. 
     The operation of the amplitude encoder 21 is described with reference to the signal waveforms shown in FIG. 2. A sample interval is 100 nsec which corresponds to the interval between transitions of the clock signal (FIG. 2A). Accordingly, each sample interval corresponds to the period by which the combined signal is delayed within the amplitude encoder 21. The sequence indicator 30 is a three-bit counter which counts the transitions in the clock signal on line 42 and provides a binary sequence indication signal on the two lines 54 for indicating a sample number that varies between 1 and 3. The binary indication signals on the two line 54 are used in the microprocessor comparison of the relative amplitude indication signals on lines 52 and 51. The pulse generator 11 responds to the clock signal on line 42 by providing a high level switching signal (FIG. 2B) on line 41 during every third sample interval beginning with the first transition of the clock signal, so that the switching signal on line 41 is high whenever the sequence indication signals on the two lines 54 indicate a count corresponding to the first sample interval. In FIG. 2, the first sample interval is designated by the number &#34;1&#34;. During the two intervening sample intervals of each cycle (designated &#34;2&#34; and &#34;3&#34;), the pulse generator 11 provides a low level switching signal on line 41. 
     FIG. 2D illustrates the relative amplitudes of the delayed and undelayed combined signals that are compared by amplitude encoder 21 when the polarization of the received radiation is predominantly vertical so as to cause the amplitude of the RF signal received on line 34 to be greater than the amplitude of the RF signal received on line 35. The undelayed combined signal &#34;U&#34; is indicated by a solid line and the delayed combined signal &#34;0&#34; is indicated by a dashed line. The relative amplitude indication signal is provided by the amplitude encoder 21 on the two lines 51 and 52 and the sequence indication signals are provided by the sequence indicator 30 on the two lines 54 to the latch 31 in response to the leading edge of each strobe signal pulse on line 50. Referring to FIGS. 2C, 2D and 2E it is noted that the strobe signal causes the relative amplitude indication signals on the two lines 51 and 52 to be provided by the amplitude encoder 21 in response to a comparison of the delayed and undelayed combined signals that is made shortly before the end of each sample interval when the respective slopes of the delayed and uncombined signals are less than the predetermined slope. When upon being compared in response to the leading edge of the strobe signal, the undelayed signal exceeds the delayed signal by a predetermined amplitude of 6 dB, (U&gt;D), a binary &#34;1&#34; indication signal is provided on line 51. When upon being compared in response to the leading edge of the strobe signal, the delayed signal exceeds the undelayed signal by a predetermined amplitude of 6 dB, (D&gt;U), a binary &#34;1&#34; indication signal is provided on line 52. Thus when the polarization of the received RF radiation is predominantly vertical so as to produce the sequence of delayed and undelayed combined signals having the relative amplitudes shown in FIG. 2D, the bit pattern on the two lines 51 and 52 during the sample intervals, &#34;1&#34;, &#34;2&#34; and &#34;3&#34; are respectively 100 on line 51 and 010 on line 52, as shown in FIG. 2E. During the sample interval &#34;1&#34; the binary indication signal on the two lines 54 is such that a 0 is in the higher order bit position with a 1 in the lower order bit position. The microprocessor 32 compares, during the same interval &#34;1&#34;, the binary indication signal 01 with the bits respectively provided on lines 52 and 51 which are 01. During the sample interval &#34;2&#34;, the binary indication signal on the two lines 54 in such that a 1 is in the higher order bit position with a 0 in the lower order bit position. The microprocessor 32 compares, during the sample interval &#34;2&#34;, the binary indication signal 10 with the bits respectively provided on lines 52 and 51 which are 10. 
     FIG. 2F illustrates the relative amplitudes of the delayed and undelayed combined signals that are compared by the amplitude encoder 21 when the polarization of the received radiation is predominantly horizontal so as to cause the amplitude of the RF signal on line 35 to be greater than the amplitude of the RF signal received on line 34. The symbol nomenclature in FIG. 2F is the same as that in FIG. 2D. Referring to FIG. 2G it is seen that when the polarization of the received RF radiation is predominantly horizontal so as to produce the sequence of delayed and undelayed combined signals shown in FIG. 2F, the bit pattern on the two lines 51 and 52 during the sample intervals &#34;1&#34;, &#34;2&#34; and &#34;3&#34; are respectively 010 on line 51 and 100 on line 52. The microprocessor 32 compares, during the sample interval &#34;1&#34;, the binary indcation signal 01 with the bits respectively provided on lines 52 and 51 which are 10. The microprocessor 32 compares, during the sample interval &#34;2&#34;, the binary indication signal 10 with the bits respectively provided on lines 52 and 51 which are 01. 
     When the polarization of the received RF radiation is neither predominantly vertical nor predominantly horizontal, the bit patterns on both lines 51 and 52 remain at &#34;0&#34; during all sample intervals. 
     The polarization of the received RF radiation, when neither predominantly vertical nor predominantly horizontal, is determined by examining the relative phase characteristics of the received RF signals on lines 34 and 35. To accomplish such examination, the combined signal on line 44 is first divided by the power divider to provide first and second divided signals on lines 55 and 56 respectively. The delay line 24 delays the first divided signal on line 55 by the predetermined delay period of 100 nsec to provide a delayed divided signal on line 57. The delayed divided signal on line 57 and the undelayed divided signal on line 56 are passed through the limit amplifiers 25 and 26 respectively into the polar discriminator 27. 
     The polar discriminator 27 processes the delayed and undelayed signals from lines 57 and 56 respectively to provide a combination of signals V1, V2, V3 and V4 on lines 59, 60, 61 and 62 respectively, having amplitudes that are a function of the relative phase of the received signals. The signals V1, V2, V3 and V4 bear the following respective functional relationships to the phase angle θ between the signals on lines 56 and 57: 
     
         V1 α(1-cos θ)/2 
    
     
         V2 α(1+cos θ)/2 
    
     
         V3 α(1+sin θ)/2 
    
     
         V4 α(1-sin θ)/2 
    
     The relative phase Δφ of the two received RF signals on lines 34 and 35 bears the following relationship to the phase angle θ: 
     
         Δφ=θ-l/λ, 
    
     where λ is the wavelength of the received radiation, and 
     
         l≅T v; 
    
     wherein T is the delay period provided by the delay line 24 and v is the velocity of signal propagation for line 55. 
     FIG. 4 illustrates the waveforms of the signals V1, V2, V3 and V4 over a phase difference angle θ range of from 0° to 360°. 
     The phase angle encoder 29 compares the signals V1, V2, V3 and V4 on lines 59, 60, 61 and 62 from the polar discriminator 27 and translates θ to Δφ; and in response to such comparison and translation, provides a three-bit indication signal on the three lines indicating the relative phase Δφ of the received RF signals on lines 34 and 35. The three-bit relative phase indication signal on the three lines 64 indicates which one of the eight 45° sectors in a range of from 0° to 360° the relative phase Δφ is in. These eight sectors are illustrated in FIG. 5. The relative phase indication signal is provided by the phase angle encoder 29 on the three lines 64 to the latch 31 in response to the leading edge of each strobe signal pulse on line 50. Accordingly, during each sample interval a raw eight-bit word is provided to the latch 31 on line 49 from the activity decoder 20, on lines 51 and 52 from the amplitude encoder 21, on the three lines 64 from the phase angle encoder 29 and on the two lines 54 from the sequence indicator 30. This raw eight-bit word is provided on eight lines 65 to the microprocessor 32. 
     The microprocessor 32 compares the relative amplitude indication signals from lines 51 and 52 and the relative phase amplitude signals from the three lines 64 during each sample interval with reference to the beginning of each cycle of combining the received RF signals, as indicated by the sequence indication signal on the two lines 54, to thereby provide an indication of the polarization of the received radiation. 
     The microprocessor 32 provides an indication of such polarization only when the activity indication signal on line 49 from the activity indicator indicates valid activity on line 45. The microprocessor 32 indicates that the polarization of the received radiation is one of six different types (1) vertical, (2) horizontal, (3) linear slanted at plus 45°, (4) linear slanted at minus 45°, (5) right-hand-circular, or (6) left-hand-circular. The microprocessor 32 provides such indication of polarization only after comparing the amplitude indication signals on lines 51 and 52 and the phase indication signals on the three lines 64 that are taken during all of the sample intervals over each complete cycle of combining the received RF signals from lines 34 and 35. 
     Comparisons of the amplitude indication signals from lines 51 and 52 over all three sample intervals are illustrated in FIGS. 2E and 2G discussed hereinabove. When the amplitude indication signals from lines 51 and 52 have the pattern shown in FIG. 2E over sample intervals &#34;1&#34;, &#34;2&#34;, and &#34;3&#34; from the beginning of each cycle, the microprocessor indicates that the received radiation is vertically polarized. When the amplitude indication signals from lines 51 and 52 have the pattern shown in FIG. 2G over sample intervals &#34;1&#34;, &#34;2&#34; and &#34;3&#34; from the beginning of each cycle, the microprocessor 32 indicates that the received radiation is horizontally polarized. If either the pattern shown in FIG. 2E or the pattern shown in FIG. 2F over the respective sample intervals is recognized by the microprocessor 32, the microprocessor ignores the content of the three-bit phase indication signal on the three lines 64. 
     When neither vertical nor horizontal polarization is indicated, the microprocessor 32 compares the phase indication signals provided on the three lines 64 during all of the sample intervals over each complete cycle of combining the received signals. The correlation between such comparison and the different polarization types is described with reference to FIGS. 5 and 6. FIG. 6 shows the relative sectors in which the relative phase Δφ falls during successive sample intervals during each cycle. The binary value of the three-bit phase indication signal on the three lines 64 corresponds to one of the sectors shown in the relative-phase sector diagram of FIG. 5. However, it should be noted that the binary indication values do not necessarily correspond to the sector number. A Gray binary code is used in changing the binary indication values when progressing from one sector to an adjacent sector. For example, a binary value indication of 0 (i.e. &#34;000&#34;) by the three-bit relative phase indication signal on the three lines 64 indicates that the relative phase is in sector &#34;0&#34; (FIG. 5), which is approximately 0 degrees. A binary value indication of 3 (011) by the phase indication signal indicates that the relative phase is in sector &#34;2&#34;, which is approximately 90°. 
     It is from the pattern of the relative phase Δφ indications during the successive sample intervals that the polarization of the received radiation is determined by the microprocessor 32. 
     The microprocessor 32 compares the pattern of Gray binary codes corresponding to the relative phase Δφ occurring during successive sample intervals with predetermined patterns stored in the microprocessor to determine the polarization of the received radiation. Accordingly, in FIG. 6, the relative phase Δφ sector, as indicated by the three-bit signal on the three lines 64, is shown as sector 0 during the second sample interval for all four types of polarization. 
     When the relative phase indication signals on the three lines 64 indicates a pattern in which the relative phase Δφ is in the same sector during all three sample intervals, the microprocessor 32 indicates that the polarization is slanted at plus 45°. 
     When the relative phase indication signals on the three lines 64 indicate a pattern in which the relative phase Δφ during the first and third sample intervals is offset from the relative phase Δφ during the second sample interval by four sectors, the microprocessor 32 indicates that the polarization is slanted at minus 45°. 
     When the relative phase indication signals on the three lines 64 indicate a pattern in which the relative phase Δφ during the second sample interval lags the relative phase φ during the first sample interval by two sectors and leads the relative phase Δφ during the third sample interval by two sectors, the microprocessor 32 indicates that the polarization is right-hand-circular. 
     When the relative phase indication signals on the three lines 64 indicate a pattern in which the relative phase Δφ during the second sample interval leads the relative phase Δφ during the first sample interval by two sectors and lags the relative phase during the third sample interval by two sectors, the microprocessor 32 indicates that the polarization is left hand circular.