Abstract:
A display panel driving circuit includes N number of amplifiers configured to supply N number of output voltages to a display panel; N number of output switches configured to transmit output signals from the N number of amplifiers through N number of pads to the display panel; and a plurality of charge sharing switches configured to share charges among the N number of pads, wherein the charge sharing switches are formed in the pads.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to a display panel driving circuit, and more particularly, to a display panel driving circuit having charge sharing switches formed in pads, wherein charge sharing switches are formed in pads to serve as ESD (electrostatic discharge) protection devices and decrease an area and a heat value. 
         [0003]    2. Description of the Related Art 
         [0004]    In general, a semiconductor device is provided with pads for electrically connecting the semiconductor device with an outside. Signals associated with command input and data input/output operations are inputted to or outputted from the semiconductor device through the pads. 
         [0005]    Recently, as a design rule of a semiconductor device shrinks, a semiconductor manufacturing technology has been developed to accommodate a trend toward high integration. The size of a semiconductor device is scaled down due to the high integration, and the number of net dies manufactured per a semiconductor wafer is increased, whereby the manufacturing costs can be saved. 
         [0006]    Therefore, measures for reducing an entire area of a semiconductor device are required. 
         [0007]      FIG. 1  is a diagram illustrating a conventional display panel driving circuit. 
         [0008]    Referring to  FIG. 1 , a conventional display panel driving circuit includes N number of amplifiers  111 ,  112  and  113 , N number of output switches  121 ,  122  and  123 , a plurality of charge sharing switches  131 ,  132  and  133 , and N number of pads  141 ,  142  and  143 . The N number of amplifiers  111 ,  112  and  113  are configured to buffer or amplify corresponding data DATA 1 , DATA 2  and DATA N. The N number of output switches  121 ,  122  and  123  are respectively configured to receive the outputs of the N number of amplifiers  111 ,  112  and  113  and allow or interrupt the transmission of the outputs to the N number of pads  141 ,  142  and  143 . The plurality of charge sharing switches  131 ,  132  and  133  are configured to share charges between adjacent pads according to control signals CTRL and CTRLb. 
         [0009]    Due to the fact that charge sharing between the pads  141 ,  142  and  143  is enabled by the charge sharing switches  131 ,  132  and  133 , a positive data voltage and a negative data voltage can be shared (that is, the charges charged in a display panel are recycled to be reused), whereby power consumption of the display panel driving circuit can be reduced. However, since the charge sharing switches  131 ,  132  and  133  occupy a substantial portion of a chip area, limitations exist in decreasing the chip area. Therefore, measures for decreasing the area of the display panel driving circuit in order to decrease the chip area are required. 
         [0010]      FIG. 2  is a diagram illustrating circuits on a line through which data is outputted to the first pad by driving one data voltage in the display panel driving circuit shown in  FIG. 1  and equivalent circuits in the first pad. 
         [0011]    In the first pad  141 , a resistor  141 - 3  is formed between the first charge sharing switch  131  and the first pad  141 , a P-type diode  141 - 1  is formed between a power supply source VDD and a first output terminal PAD OUT 1 , and an N-type diode  141 - 2  is formed between a ground source VSS and the first output terminal PAD OUT 1 . 
         [0012]    The resistor  141 - 3 , the P-type diode  141 - 1  and the N-type diode  141 - 2  are formed in the pad so as to prevent ESD (electrostatic discharge). 
         [0013]    As the number of pixels of a display panel increases, measures for reducing the area occupied by the pads and the charge sharing switches are required to overcome the limitations in terms of area. 
       SUMMARY OF THE INVENTION 
       [0014]    Accordingly, the present invention has been made in an effort to solve the problems occurring in the related art, and an object of the present invention is to provide a display panel driving circuit having charge sharing switches formed in pads, wherein charge sharing switches are formed in pads to decrease an area required for forming ESD (electrostatic discharge) protection devices and a heat value and reduce power consumption. 
         [0015]    In order to achieve the above object, according to one aspect of the present invention, there is provided a display panel driving circuit including: N number of amplifiers configured to supply N number of output voltages to a display panel; N number of output switches configured to transmit output signals from the N number of amplifiers through N number of pads to the display panel; and a plurality of charge sharing switches configured to share charges among the N number of pads, wherein the charge sharing switches are formed in the pads. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0016]    The above objects, and other features and advantages of the present invention will become more apparent after a reading of the following detailed description taken in conjunction with the drawings, in which: 
           [0017]      FIG. 1  is a diagram illustrating a conventional display panel driving circuit; 
           [0018]      FIG. 2  is a diagram illustrating circuits on a line through which data is outputted to a first pad by driving one data voltage in the display panel driving circuit shown in  FIG. 1  and equivalent circuits in the first pad; 
           [0019]      FIG. 3  is a diagram illustrating a display panel driving circuit having charge sharing switches formed in pads in accordance with an embodiment of the present invention; 
           [0020]      FIG. 4  is a diagram illustrating another embodiment of the display panel driving circuit having charge sharing switches formed in pads shown in  FIG. 3 ; 
           [0021]      FIG. 5  is a longitudinal cross-sectional view illustrating the first charge sharing switch formed in the first pad shown in  FIG. 3 ; and 
           [0022]      FIG. 6  is an equivalent circuit diagram of the display panel driving circuit having charge sharing switches formed in pads shown in  FIG. 3 , which has the pad structure as shown in  FIG. 5 . 
       
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
       [0023]    Reference will now be made in greater detail to a preferred embodiment of the invention, an example of which is illustrated in the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings and the description to refer to the same or like parts. 
         [0024]      FIG. 3  is a diagram illustrating a display panel driving circuit having charge sharing switches formed in pads in accordance with an embodiment of the present invention. 
         [0025]    Referring to  FIG. 3 , a display panel driving circuit having charge sharing switches formed in pads in accordance with an embodiment of the present invention includes N number of amplifiers  311 ,  312  and  313 , N number of output switches  321 ,  322  and  323 , N number of pads  331 ,  332 ,  333  and  334 , and charge sharing switches  331 - 1 ,  332 - 1  and  333 - 1  which are formed in the pads  331 ,  332  and  333 . 
         [0026]    In the display panel driving circuit having charge sharing switches formed in pads, charge sharing switches are formed in pads unlike the conventional art shown in  FIG. 1  in which pads and charge sharing switches are separately formed. 
         [0027]    The N number of amplifiers  311 ,  312  and  313  are configured to buffer or amplify corresponding data DATA 1 , DATA 2  and DATA N. The N number of output switches  321 ,  322  and  323  are configured to respectively receive the outputs of the N number of amplifiers  311 ,  312  and  313  and allow or interrupt the transmission of the outputs to the pads  331 ,  332  and  333 . The plurality of charge sharing switches  331 - 1 ,  332 - 1  and  333 - 1  are configured to share charges between the outputs of adjacent pads. Corresponding charge sharing switches are formed in the respective pads. Each charge sharing switch is connected between adjacent pads. 
         [0028]    The amplifiers, the output switches and the pads are provided in the number of N. Although the charge sharing switches are provided in the number of N−1, all the outputs of the pads can be shared. Accordingly, respective charge sharing switches are provided to connect adjacent pads among the N number of pads  331 ,  332 ,  333  and  334 . Among the N number of pads  331 ,  332 ,  333  and  334 , the first pad  331  or the N th  pad  334  which is positioned outermost may not be provided with a charge sharing switch 
         [0029]    As shown in  FIG. 3 , the N th  pad  334  is not provided with a charge sharing switch, and the charge sharing switch formed in the N−1 st  pad  333  shares the outputs of adjacent pads. The N th  pad  334  is formed with diodes for ESD protection. 
         [0030]    Each of the plurality of charge sharing switches can be realized using two transistors. 
         [0031]    For example, the first charge sharing switch  331 - 1  has a sixth PMOS transistor PM 6  and a sixth NMOS transistor NM 6 . 
         [0032]    The sixth NMOS transistor NM 6  is formed in the first pad  331 , and has a gate which receives a control signal CTRL, a first terminal which is connected to the output of the first pad  331  and a second terminal which is connected to the output of the second pad  332 . 
         [0033]    The sixth PMOS transistor PM 6  is formed in the first pad  331 , and has a gate which receives a complementary signal CTRLb of the control signal CTRL, a first terminal which is connected to the output of the first pad  331  and a second terminal which is connected to the output of the second pad  332 . 
         [0034]    While not shown in a drawing, in a second embodiment of the present invention, the N number of output switches  321 ,  322  and  323  are respectively formed in the N number of pads  331 ,  332 ,  333  and  334 . 
         [0035]      FIG. 4  is a diagram illustrating another embodiment of the display panel driving circuit having charge sharing switches formed in pads shown in  FIG. 3 . 
         [0036]    The display panel driving circuit shown in  FIG. 4  is distinguished from the display panel driving circuit having charge sharing switches formed in pads shown in  FIG. 3  in that resistors R 2  and R 3  for ESD protection are additionally included in the pads. 
         [0037]      FIG. 5  is a longitudinal cross-sectional view illustrating the first charge sharing switch  331 - 1  formed in the first pad  331  shown in  FIG. 3 . 
         [0038]    The sixth PMOS transistor PM 6  is formed in N-type wells, and the sixth NMOS transistor NM 6  is formed in P-type wells. 
         [0039]    The first terminal of the sixth PMOS transistor PM 6  and the first terminal of the sixth NMOS transistor NM 6  are connected with each other. The respective first terminals constitute an output PAD OUT 1  of the first pad. 
         [0040]    The second terminal of the sixth PMOS transistor PM 6  and the second terminal of the sixth NMOS transistor NM 6  are connected with each other. The respective second terminals constitute an output PAD OUT 2  of the second pad. 
         [0041]    The N-type wells are formed on a silicon substrate, and a highly doped P-type source and a highly doped P-type drain are formed on the N-type wells, a first gate oxide is formed on an N-type channel, and a first gate terminal Gate 1  is formed on the first gate oxide, by which the sixth PMOS transistor PM 6  is formed. Also, highly doped N-type (N+) terminals for a power supply source VDD, that is, N+ well taps or guard rings are formed in the number of 2. 
         [0042]    Further, the P-type wells are formed on the silicon substrate, and a highly doped N-type source and a highly doped N-type drain are formed on the P-type wells, a second gate oxide is formed on a P-type channel, and a second gate terminal Gate 2  is formed on the second gate oxide, by which the sixth NMOS transistor NM 6  is formed. Also, highly doped P-type (P+) terminals for a ground source VSS, that is, P+ well taps or guard rings are formed in the number of 2. 
         [0043]    Parasitic P-type diodes  331 - 2  and  331 - 3  are formed in the sixth PMOS transistor PM 6  by the highly doped N-type terminals for the power supply source VDD and the highly doped P-type terminals as the source terminal and the drain terminal of the sixth PMOS transistor PM 6 . Also, parasitic N-type diodes  331 - 4  and  331 - 5  are formed in the sixth NMOS transistor NM 6  by the highly doped P-type terminals for the ground source VSS and the highly doped N-type terminals as the source terminal and the drain terminal of the sixth NMOS transistor NM 6 . 
         [0044]    That is to say, it is to be understood that the P-type diodes  331 - 2  and  331 - 3  and N-type diodes  331 - 4  and  331 - 5  as parasitic diodes are formed in the sixth PMOS transistor PM 6  and sixth NMOS transistor NM 6  which realize the first charge sharing switch  331 . 
         [0045]    Since the parasitic diodes can perform the function of diodes according to the conventional art, it is not necessary to separately form diodes, whereby an area reduction effect can be accomplished. 
         [0046]      FIG. 6  is an equivalent circuit diagram of the display panel driving circuit having charge sharing switches formed in pads shown in  FIG. 3 , which has the pad structure as shown in  FIG. 5 . 
         [0047]    Referring to  FIG. 6 , it is to be appreciated that N-type diodes  331 - 4  and  331 - 5  and P-type diodes  331 - 2  and  331 - 3  for ESD protection are formed in charge sharing switches. 
         [0048]    In the present invention, the following effects are achieved due to the fact that the charge sharing switches are formed in the pads. 
         [0049]    First, while charge sharing switches and pads are separately formed in the conventional art, the charge sharing switches are formed in the pads in the present invention, whereby an area is significantly decreased. 
         [0050]    Second, while diodes for ESD protection are formed in the pads in the conventional art, problems related with electrostatic discharge are solved in the present invention by parasitic diodes naturally formed in the charge sharing switches inside the pads, whereby an area required for additionally forming diodes can be saved. 
         [0051]    Third, as lines from the charge sharing switches to the pads are shortened, line resistance is reduced, whereby a heating value and power consumption can be decreased. 
         [0052]    As is apparent from the above description, the display panel driving circuit having charge sharing switches formed in pads according to the present invention provides advantages in that charge sharing switches are formed in pads and problems related with electrostatic discharge are solved by parasitic diodes naturally formed in the charge sharing switches inside the pads, thereby significantly decreasing an area. 
         [0053]    Also, in the present invention, since line resistance from the charge sharing switches to the pads can be reduced, a heat value and power consumption can be reduced. 
         [0054]    Although a preferred embodiment of the present invention has been described for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and the spirit of the invention as disclosed in the accompanying claims.