Abstract:
The device comprises (a) an external impedance (R ext ) connected up between a voltage source (E) for powering the circuit and a pin (4) connected to a high-impedance input (3) of the logic part of this circuit, (b) a branch of the analogue circuit, connected up between this pin (4) and the earth of the circuit and, (c) a circuit (5) transmitting logic signals and connected up to this pin (4) by a logic output (6) which offers a high impedance in one of its two logic states, a specified current being established in the said pin when the said output is in the high-impedance state. 
     Application to the limitation, regulation, directing or measuring of the current in a load outside the integrated circuit.

Description:
BACKGROUND OF THE INVENTION 
     Field of the Invention 
     The present invention relates to a device for establishing a current in an analogue part of an integrated logic and analogue circuit. More particularly, the present invention relates to such a device designed for establishing such a current in a so-called &#34;intelligent&#34; integrated power circuit. 
     Integrated circuits are known comprising input and/or output pins designed to receive or transmit digital signals which are processed or formulated in a logic part of the circuit, and to control analogue output quantities. The so-called &#34;smart&#34; power circuits are examples of such circuits in which digital control and/or diagnostic signals are processed in a logic part adjoining an analogue part comprising a power transistor controlling the flow of a powering current in a load outside the circuit. 
     In such a circuit there may be a need for a reference current, for example in order to ensure a correct biasing of a sub-circuit, or in order to limit, direct or regulate an output current powering a load. Now, present methods of manufacturing integrated circuits do not allow the direct construction of precise internal current sources. Recourse must then be had to internal methods of adjustment or to means of adjustment based on external components such as a resistor. 
     Internal methods of adjustment, which call upon the use of so-called &#34;ZAP&#34; Zener diodes, fuses or programmable memories, bring about an increase in the surface area of the chip embodying the integrated circuit. Furthermore, the implementing of the method of adjustment increases the manufacturing time and number of rejects when sorting the manufactured chips. This solution is not viable when seeking as economical a manufacture as possible. 
     Power supplies use frequently external components like external resistors or application of external voltage to adjust some parameters. As an example, patent application EP 103 455 describes a power supply unit in which regulated output voltage can be switched between two operating values (high and low voltage) by application of a control voltage to a control terminal. In the same way, document &#34;Les alimentations de laboratoire&#34; published in &#34;Electronique Applications&#34; n°24 (June 1982) teaches a power supply in which remote control of current is adjusted by a voltage or a resistor connected between specialised pins of the circuit. 
     However, use of an external resistor entails the presence of an additional specialised pin on the casing of the chip and of the corresponding connection lug on the chip itself, arrangements which also raise the price of the manufactured product. The two known methods are not therefore economical, this being especially harmful in the case of low cost price, high volume manufacture such as encountered in automobile electronics. 
     The aim of the present invention is therefore to construct a device for establishing a current in an analogue part of an integrated logic and analogue circuit, which calls upon neither an internal adjustment nor an external resistor connected up to a specialised pin of the circuit. 
     The aim of the present invention is also to construct such a device which is of especially economical construction. 
     SUMMARY OF THE INVENTION 
     These aims of the invention are achieved, as well as others which will emerge in the remainder of the present description, with a device for establishing a current in an analogue part of an integrated logic and analogue circuit, notable in that it comprises (a) an external impedance connected up between a voltage source for powering the circuit and a pin connected to a high-impedance input of the logic part of this circuit, (b) an internal branch of the analogue circuit, connected up between this pin and the earth of the circuit and, (c) an external circuit transmitting logic signals and connected up to this pin by a logic output which offers a high impedance in one of its two logic states, a specified current being established in the said branch when the said output is in the high-impedance state. 
     By using thus a logic input pin of the integrated circuit for establishing the current sought in this circuit, there is an advantageous saving of the specialised pin which was required prior to the invention. 
     According to a first embodiment of the device according to the invention, the device comprises means for regulating voltage across the terminals of the external impedance when the logic output of the transmitter circuit is in the high-impedance state, so as to adjust the intensity of the current flowing in the branch of the analogue part connected up to this external impedance in series. 
     According to an embodiment of internal means of regulating the integrated circuit, these means comprise an internal reference voltage source, a transistor for testing the current circulating in the branch of the analogue part of the circuit in series with the external impedance, and a comparator whose inputs are powered by the reference voltage source and by the voltage established on the logic input pin of the circuit, the output of the comparator controlling the switching on of the transistor. 
     According to a first application of the device according to the invention, the analogue part comprises means for duplicating several times the current circulating in the branch connected up to the external impedance, in so many biasing sub-circuits used in the integrated circuit. 
     According to a second application of the device according to the invention, the analogue part comprises a transistor for testing the flow of a current in a load outside the circuit, the logic part of the circuit controlling this transistor in switch mode. The analogue part may then comprise means for regulating the intensity of the current flowing in the said load as a function of that of the current established in the branch of this part which is connected up to the external impedance in series. 
     According to a variant, the analogue part comprises means for regulating the intensity of the current flowing in the external impedance as a function of the current circulating in the load. The current in this load may then be measured from a measurement of voltage across the terminals of the external reference. 
     According to another variant, the logic part of the integrated circuit comprises means for controlling a limitation in the current in the load. A starter circuit is then placed between the input of the logic part and a test electrode of the transistor for testing the flow of a current in the load. 
     Other characteristics and advantages of the device according to the invention will emerge on reading the following description and on examining the attached drawing in which: 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a diagram of the device according to the invention, 
     FIG. 2 represents graphs of voltage which are useful in explaining the functioning of the device according to the invention, 
     FIG. 3 is a wiring diagram of a first embodiment of the device according to the invention, 
     FIG. 4 is a wiring diagram of a second embodiment of the device according to the invention, applied to the control or to the measuring of the current in a load external to the integrated circuit, and 
     FIG. 5 is a wiring diagram of a variant of the device of FIG. 4. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Reference is made to FIG. 1 of the attached drawing in which th schematised device comprises an integrated circuit 1 having an analogue part 2 and a logic part powered via at least one logic input EL 3 connected up to an input pin 4 of the integrated circuit. A second so-called transmitter circuit 5 comprises an output pin 6 which transmits logic signals which are collected by the pin 4 of the integrated circuit by virtue of a line 9, in order to be processed in the logic part of this circuit. A voltage source E is connected up to the power terminals 7, 8 and 7&#39;, 8&#39; of the circuits 1 and 5 respectively. 
     According to an essential characteristic of the device according to the invention, the importance of which will be explained below, a current generator is connected up between the pins 7 and 4 of the circuit 1. This generation of current can be established via an impedance and, preferably, via a simple pure resistance R ext , as shown, or via any other means of generating current known in microelectronics. 
     The external resistor R ext  also connected up between the positive terminal of the voltage source E and the logic output 6 of the transmitter circuit 5. As schematised by way of example by the transistor Q E  of the MOS type, this output is of the bare drain type which sets a single logic state on the output 6, for example a &#34;low&#34; state, by switching on the transistor Q E . The other, &#34;high&#34;, logic state is regulated by the resistor R ext  which can be adjusted with precision since it is outside the integrated circuit 1. 
     In FIG. 2, the graph referenced 6 illustrates the two possible logic states established on the output 6 of the circuit 5. The logic input 3 of the circuit 1 is sensitive to a logic signal of level greater than the level A, less than E. The current admitted by the logic input 3 can be regarded as negligible, if this input is constructed with MOS technology for example. 
     In the &#34;high&#34; state, the analogue part 2 of the integrated circuit 1 sets a voltage difference E-V 1  across resistor R ext . According to the invention, this voltage V 1  lies between A and E (see FIG. 2). 
     Under these conditions, it is appreciated that the current I m  which enters the analogue part 2 of the integrated circuit 1 is such that: 
     
         I.sub.m =(E-V.sub.1)/R.sub.ext 
    
     when the output 6 of the circuit 5 is in the &#34;high-impedance&#34; state. Indeed, comsumption by this output is then negligible as is that by the logic input 3. 
     Whatever the variations in the powering voltage E, as long as the voltage V 1  does not drop below the threshold A, the current I m  may be used by the analogue part 2 of the circuit 1 as a reference current, adjusted by the precision external resistor R ext  which then acts as reference current generator. 
     Clearly, this is only possible if the integrated circuit 1 does not need to be permanently powered by a reference current. The reference current is available only when the output 6 is in the &#34;high-impedance&#34; state, in order to avoid any power consumption this way. It is on this account that, according to the invention, there is an advantageous saving of one pin in the manufacture of the integrated analogue and digital circuit 1. Particularly in connection with FIGS. 4 and 5, examples of application of the device according to the invention will be seen below in which this partial availability in time of a reference current is without disadvantage. 
     Having thus explained the principle upon which the present invention is based, reference is made to FIG. 3 of the drawing in which a first embodiment of the device according to the invention has been represented, applied for example to the biasing of sub-circuits internal to the integrated circuit 1. 
     In this Figure there is again found the resistor R ext  connected up between a line at the voltage E and the pin 4 of the circuit 1, which pin is controlled via a logic output of a transmitter circuit (not shown) such as the circuit 5 of FIG. 1. In the &#34;high-impedance&#34; state of this output, it is appreciated that the current I m  entering the circuit via the pin 4 is regulated by a conventional regulator consisting of the comparator C 1  controlling a transistor Q 1  of the MOS type for example, whose drain-source circuit is placed in series with the resistor R ext . The positive terminal of the comparator C 1  is connected up to a reference voltage source V ref  internal to the circuit 1 (a Zener diode for example) whilst the negative terminal of this comparator is connected up to the pin 4. The voltage (E-V 1 ) is then driven to V ref  by the regulator (C 1 , Q 1 ) belonging to the analogue part of the circuit. 
     The current I m  enters a branch 10 of the analogue part of the integrated circuit 1 connected up between the pin 4 and earth. This current is such that: 
     
         I.sub.m =V.sub.ref /R.sub.ext. 
    
     The current I m  thus regulated can constitute a precise internal reference current. 
     A transistor Q 2  assembled in series with the transistor Q 1  is assembled in current-reflector mode with a plurality of transistors Q 3  to Q n  drawing precise reference currents i 3  to i n , which are images of I m  and hence suitable for use in biasing so many sub-circuits of the integrated circuit 1. This is therefore a first application of the device according to the invention. 
     Other applications are illustrated by the embodiments of FIGS. 4 and 5. In these Figures and in the preceding Figures, identical references label identical or similar elements or units. 
     Thus, in the device of FIG. 4 there are again found the regulator (C 1 , Q 1 ) of the device of FIG. 3 and the current-reflector assembly of transistors (Q 2 , Q 3  to Q n ). Currents which traverse a load R c  powered by a voltage source V flow in cells Q 3  to Q m  of the current reflector. The logic input 3 tests the gate of a transistor Q p  which controls, in all-or-nothing mode, the flow of the current in the load, on the input side of the current reflector. There has thus been represented a part of an &#34;intelligent&#34; power circuit designed to control the powering of the load and to, possibly, diagnose operating faults in the load or in the circuit, with the aid of means which are not shown. 
     Two different applications are illustrated, each one corresponding to one of the positions a and b of two coupled two-position switches (SW 1 , SW 2 ). The switch SW 1  is ineffectual in position a and short-circuits the requlator (C 1 , Q 1 ) in position b. The switch SW 2  is installed between the gates of the transistors on the one hand, and the pin 4 (position a), or the drains (for example) of the transistors Q 3  to Q n  (position b) on the other hand. 
     When the switches are in position a, as shown in the Figure, the current I m  is duplicated in the cells Q 3  to Q n  of the current reflector, the current in the load R c  then consisting of the sum of the current in these cells. With this assembly it is clear that the current in the load R c  can be set by suitably regulating I m , by affecting the value of the external impedance R ext  or the value of the reference voltage V ref . This is a second application of the device according to the invention. 
     When the switches are closed on the contact b, it is by contrast the current in the load which is duplicated in the branch of the analogue part of the circuit, which is connected up in series with the external impedance R ext , by way of the drain-source circuit of the transistor Q 2  and of the switch SW 1  which short-circuits the transistor Q 1 . It will be noted that the switch SW 1  is necessary in order to avoid any disturbance which might be created by the regulator circuit (C 1 , Q 1 ). 
     By measuring the voltage across the terminals of the external impedance R ext , with the aid of known means (not shown) the current circulating in the load can at once be measured. This is a further application of the device according to the invention. 
     FIG. 5 represents a variant of the device of FIG. 4, designed to ensure automatic cutting (tripping) of the current in the load R c  when the intensity of this current tends to exceed a certain value. As seen in FIG. 5, the logic input 3 controls the transistor Q p  across a discriminating circuit 15 whose role will be explained below. 
     It will be observed that the duplicating of the load current in the input circuit (R ext , Q 2 ) makes the input voltage V i  of the logic input 3 drop from the value: 
     
         R.sub.ext ×I.sub.m. 
    
     When, due to the current I m  exceeding a setpoint value, this input voltage drops below the flipover threshold for the logic input (see FIG. 1), the transistor Q p  is switched off and hence the current in the load is cut. The desired tripping is thus obtained. However, due to the cutting of the current in the load, the voltage V i  rises back above the switching threshold for the logic input which, in the absence of any countermeasure, would have the effect of switching the load back on. 
     To avoid this switching back on, after tripping, which could damage the load and the integrated circuit, the invention proposes to use the abovementioned discriminating circuit 15 installed between the logic input 3 and the transistor Q p . 
     It will be observed that the comparator for the logic input 3 of the preceding embodiments has been omitted and replaced by two comparators C 2 , C 3  sensitive respectively to (high) V 1b  and (low) V 1b  threshold crossings respectively, the threshold V 1b  corresponding to the desired tripping threshold, and V 1b  &lt;V 1b . 
     It will be noted that the max current in the load will be defined via R ext  as a function of the threshold V 1b  via the relationship I max  =k(E-V 1b )/R ext  where k is the ratio of the currents, defined by the number of transistors Q 3  to Q n . 
     The circuit 15 furthermore comprises a flip-flop 11 of the D type whose inputs S and H (clock) are connected up, across inverters 12, 13 respectively, to the outputs of the comparators C 3  and C 2  respectively. The input D of the flip-flop is earthed. The output Q of the flip-flop is connected up to an input of an AND gate 14 comprising another input connected up to the output of the comparator C 3 . 
     When the integrated circuit is placed in the active state, the voltage V i  rises, and passes through the threshold V 1b , which brings about: 
     1) the passing to 1 of the output of the comparator C 3  and hence of one of the inputs of the AND gate 14, 
     2) the passing to 0 of the output of the inverter 12 which sets the output Q of the flip-flop 11 to 1 as well therefore as the other input of the AND gate 14. 
     The output of the AND gate then passes to the 1 state bringing about the switching of the transistor Q p . 
     Upon exceeding the accepted maximum intensity in the load R c , the voltage V i  drops beneath the threshold V 1b  bringing about a downward transition at the output of the comparator C 2 , and hence an upward transition on the input H of the flip-flop 11 by way of the inverter 13. This transition then brings about the passing of the output Q to the logic state of the input D, that is to say 0. The AND gate is then deactivated and the current in the load R c  is cut by the transistor Q p . The rising back of the voltage V i  as explained earlier brings about a downward transition on the input H which has no effect. 
     The rearming of the circuit 15 can then only take place via a passing of the external control through the (inactive) 0 state, and a return to the active state as described above.