Abstract:
A mixer circuit suitable for broadband RF applications is disclosed. A unique biasing scheme for a conventional Gilbert-cell type 4-quadrant multiplier is used, resulting in relatively good linearity, relatively low noise, and relatively low power consumption. Disclosed techniques provide programmability in gain for the mixer and a broadband frequency of operation. A non-linear feedback loop is wrapped around the circuit to stabilize the common-mode voltage shifts due to programming. In one embodiment, a non-linear switch as load-resistance is used to improve the linearity of the circuit.

Description:
BACKGROUND 
     1. Field of the Invention 
     The invention generally relates to electronics. In particular, the invention relates to wideband mixers. 
     2. Description of the Related Art 
     Ever since its inception in the early 1900s by Edwin Armstrong, RF mixer technology has been at the heart of radio technology. However the utility of mixers has typically been relatively narrowband in frequency range due to the usage of discrete components, such as inductors. 
     In the field of radio frequency integrated circuits (RFIC), a mixer circuit is usually implemented as a Gilbert cell type current commutating approach. See, for example, Gilbert, et al.,  Fundamentals of Active Mixer , Applied Microwave and Wireless, 1995, 10-27. However, other implementation methods are possible. In a conventional Gilbert cell type of mixer, the input devices are biased in the saturation region of operation. This is done to derive maximum V-I (Voltage-Current) efficiency at RF. The conventional approach is fraught with inefficiency, such as relatively poor-linearity and relatively high power dissipation. The conventional approach also uses on-chip inductors, which results in a narrowband design and a relatively large die footprint. In spite of these drawbacks, the conventional technique gained popularity due to first few generations of RFIC being captive to bipolar devices, which are very efficient V-I converters and excellent current commutators. 
     However, CMOS devices are typically not as efficient as bipolar devices as V-I converters. One approach is to use the CMOS devices to switch voltages instead of current. Such techniques have their share of drawbacks, such as relatively poor voltage gain, relatively high noise to folding of noise from high frequency into baseband or intermediate frequency (IF), and the like etc. 
     Apart from the technological limitations of CMOS devices, a modern receiver front end should have a relatively wide dynamic range to accommodate the near-far end problem (faint RF signal versus a large interfering signal). Also, battery-operated portable RF systems should be efficient at using power. 
     SUMMARY 
     The invention includes a novel approach to a Gilbert cell type current commutating mixer. Embodiments of the invention are applicable for discrete or integrated implementation of any RF standard from about 500.0 MHz to 6.0 GHz. For example, embodiments are applicable to, but not limited to, the following: WiFi (802.11a/b/g), GSM, DECT, 802.16d/e, Zigbee, 4G-LTE, etc. 
     Embodiments of the invention can exhibit one or more of the following features: relatively wide-band mixer design (500.0 MHz to 6.0 GHz); relatively low power consumption; a space efficient design which does not need on-chip inductors; programmability in mixers to increase the dynamic range of RF front ends; and maintain large-signal linearity (for example, 1.0 dB compression point) across gain modes. 
     The invention includes a mixer circuit technique that is suitable for broadband RF applications. A biasing scheme for a conventional Gilbert-cell type 4-quadrant multiplier is disclosed. This biasing scheme results in relatively high linearity, relatively low-noise performance, and relatively low-power consumption. The biasing scheme also permits the gain of the mixer to be programmable and permits the mixer to have a relatively broadband frequency of operation. To stabilize the common-mode voltage, around a varying common-mode voltage due to changes in gain and due to the process, voltage and temperature (PVT) variations, a non-linear feedback loop is wrapped around the mixer circuit. A non-linear switch as a load-resistance can further be used to improve the linearity of the mixer circuit across a variety of gain conditions. One embodiment of the invention uses a 0.18 micrometer (μm), 2.5V, CMOS compatible process. Embodiments of the invention are applicable to a variety of wireless standards from 500.0 MHz up to 6.0 GHz. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       These drawings and the associated description herein are provided to illustrate embodiments of the invention and are not intended to be limiting. 
         FIG. 1  illustrates a conventional Gilbert cell type current commutating mixer with selected input devices biased in the linear or ohmic region of operation instead of the conventional saturation region of operation. 
         FIG. 2A  illustrates gain programmability. 
         FIG. 2B  illustrates a common-mode feedback circuit. 
         FIG. 3A  illustrates linearity compensation by utilizing the non-linearity of the switches. 
         FIG. 3B  illustrates an improvement in an output power 1 dB (oP 1 dB) compression point. 
         FIG. 4  illustrates a broadband RF mixer in a monolithic implementation of radio front end in which an embodiment of the mixer circuit can be used. 
     
    
    
     DETAILED DESCRIPTION OF EMBODIMENTS 
     Embodiments of the invention are applicable to a mixer circuit design, such as in a down-converter, in a frequency range of about 500.0 MHz to 6.0 GHz. While illustrated in the context of a mixer circuit, the principles and advantages of linearity improvement through a non-linear switch, the non-linear feedback loop, and the biasing of selected transistors in the linear region of operation (for MOS) can be extended to other analog blocks, such as to low noise amplifiers (LNA), filters, and the like. 
     The problem of wide dynamic range and dynamic power requirement is typically addressed by providing gain programmability into an RF front end. While low noise amplifiers (LNAs) have lent themselves to such programmability, gain programmability in monolithic mixers has been elusive for two reasons. First, gain management at radio frequency (RF) typically deteriorates RF performance and typically uses multiple inductors. Second, gain management can result in a varying output common-mode voltage. A common-mode feedback loop can be used to correct the average output voltage. However, since a mixer is a time invariant system, a classical LTI analysis should not be applied for analyzing the feedback loop. A period steady state (PSS) analysis based approach (called PSS-PSTB) can be used for stability analysis of the mixer. 
     Gain programmability has other associated issues, such as difficulty in maintaining uniform noise-figure and linearity figures across different gain modes. For example, when the measurement numbers are reflected to the output, a linearity figure of merit, such as output third-order intercept point (oIP3), is scaled by the gain of the circuit. One approach to overcome the foregoing limitation is to design the circuit to comply with the demands for the lowest gain mode, which comes at the expense of excess power. A technique is disclosed wherein linearity is improved through the use of non-linear switch or active load. One embodiment of the invention uses a 0.18 μm, MOS, 2.5V process and advances the classical Gilbert cell type current commutating topology making it more suitable for MOS. 
     For a relatively low power, relatively low noise, and relatively highly linear circuit, it is desirable to bias the input devices of a MOS circuit into the linear region of operation instead of the conventional saturation region. 
       FIG. 1  illustrates a MOS version of a current commutating mixer in which the input MOS devices  102 ,  104  for the RF input signal are biased in the linear region. The biasing scheme trades off gain at RF in lieu of better linearity and lower noise. The disclosed biasing technique lowers the power dissipation by lowering the dc bias current used to bias the MOS devices  102 ,  104 . 
     In the modified Gilbert cell mixer illustrated in  FIG. 1 , the RF input signal V RF  is applied as an input across the gates of the input MOS devices  102 ,  104  in a differential manner such that a non-inverted portion of the RF input signal V RF  is applied to the gate of input MOS device  102  and an inverted portion of the RF input signal V RF  is applied to the gate of input MOS device  104 . The input MOS devices  102 ,  104  are equal in size and form a differential pair. The drain of the input MOS device  102  is coupled to the sources of MOS devices  112 ,  114 . The drain of the input MOS device  104  is coupled to the sources of MOS devices  116 ,  118 . 
     The local oscillator signal V LO  is applied as an input across the gates of MOS devices  112 ,  114 ,  116 ,  118 . A non-inverted portion of the local oscillator signal V LO  is applied as an input to the gates of the MOS devices  112 ,  118 . An inverted portion of the local oscillator signal V LO  is applied as an input to the gates of the MOS devices  114 ,  116 . The MOS devices  112 ,  114 ,  116 ,  118  mix the RF input signal V RF  with the local oscillator signal V LO  to generate an intermediate frequency signal V IF . 
     The MOS devices  112 ,  114 ,  116 ,  118  are biased in the saturation region. The MOS devices  112 ,  114 ,  116 ,  118  are equal in size to each other. The MOS devices  112 ,  114  form a differential pair, and the MOS devices  116 ,  118  form another differential pair. The drains of the MOS devices  112 ,  116  are coupled to a first terminal of a resistor  122 . A second terminal of the resistor  122  is coupled to a voltage reference such as ground. The drains of the MOS devices  114 ,  118  are coupled to a first terminal of a resistor  124 . A second terminal of the resistor  124  is coupled to a voltage reference such as ground. A MOS device  132  provides a current source to the sources of the input MOS devices  102 ,  104 . Of course, in an alternate embodiment wherein the PMOS transistors are replaced with NMOS and vice versa, the MOS device  132  will be a current sink. As used herein, the term “current source” will be applicable to both current sources and to current sinks Biasing for the MOS device  132  is not shown. 
     A non-inverting portion of the intermediate frequency signal V IF  is available at a node formed by the drains of the MOS devices  112 ,  116  and the first terminal of the resistor  122 . An inverting portion of the intermediate frequency signal V IF  is available at a node formed by the drains of the MOS devices  114 ,  118  and the first terminal of the resistor  124 . In one embodiment, the resistors  112 ,  114  are non-linear resistors as will be described in greater detail later in connection with  FIGS. 2A and 2B . 
     MOS devices  102 ,  104  that are biased into the linear region (also known as ohmic region) of operation typically exhibit relatively good linearity. A MOS device biased into the linear region behaves as a resistor from drain to source. The output referred noise is curtailed due to low RF gain at this frequency. 
     In a Gilbert cell mixer, the convention had been to bias the input devices  102 ,  104  into the saturation region (also known as active region), which typically necessitates an inductive degeneration for linearization. However, the use of inductive degeneration results in a loss of wideband operation, inefficiently uses a large chip area, and complicates programmability for gain. 
     The biasing of MOS devices at RF into the linear region has many advantages. One drawback to the biasing into the linear region is a lower RF gain. However, the loss in RF gain can be recovered at baseband or intermediate frequency, as will be discussed in greater detail in the following. 
     While illustrated in the context of PMOS (p-type MOSFET) devices for MOS devices  102 ,  104 ,  112 ,  114 ,  116 ,  118 ,  132 , and NMOS (n-type MOSFET) devices for an active load that will be described later, the principles and advantages are also applicable to the reverse configuration. 
       FIG. 2A  illustrates gain programmability. While the low-power, low-noise and linearity advantages are provided by biasing of the input MOS devices  102 ,  104  in the linear or ohmic region as described earlier, the reduction in RF gain is recovered at baseband or intermediate frequency through a resistive load  122 ,  124 ,  202 ,  204 ,  206 ,  208  as shown in the embodiment illustrated in  FIG. 2A . A resistive load can be used because the intermediate frequency signal V IF  is in baseband, that is, has been downconverted to baseband. Thus, a resistor can be used to vary the gain of the signal content. For example, to implement gain programmability, various load devices can be switched as illustrated in  FIG. 2A  with the switches  206 ,  208 , which can switch resistors  202 ,  204  in and out. In the illustrated embodiment, the switches  206 ,  208  are implemented using PMOS devices. In the conventional art, it is typical to use inductive degeneration. However, it can be complicated to implement gain programmability with inductors due to problems with linearity. 
     One difficulty encountered when switching resistive loads via switches such as MOS switches  206 ,  208  is that it affects the bias of the circuit and the common-mode voltage of the intermediate frequency signal V IF  output. This can be overcome by adding a common-mode feedback circuit to control the common-mode voltage. 
       FIG. 2B  illustrates a common-mode feedback circuit  220 ,  222 ,  224 . Mixer circuits are time-varying circuits, so that linear time invariant (LTI) stability analysis should not be used. While a mixer circuit can be analyzed in transient domain, such analysis does not lend itself to a measure of stability. The illustrated circuit was analyzed using a period time stability (PSTB) method, which linearizes the circuit around a time-varying operating point, and then applies the stability measures. 
     The common-mode feedback circuit includes a differential amplifier  220 , a first NMOS device  222 , and a second NMOS device  224 . In the illustrated embodiment, the common-mode voltage for the intermediate frequency signal V IF  can be provided as an input to an inverting input of the differential amplifier  220 . In one embodiment, a summing circuit is used to generate the common-mode voltage for the intermediate frequency signal V IF . A reference voltage, which can correspond to the desired level of the common-mode voltage, can be provided as an input to the non-inverting input of the differential amplifier  220 . An output of the differential amplifier  220  drives gates of the first NMOS device  222  and the second NMOS device  224 . In an alternative configuration, the first NMOS device  222  and the second NMOS device  224  are PMOS devices. 
     A possible issue with gain programmability is the loss of large signal linearity, for example, as measured by an output 1 dB (oP1 dB) compression point, when referenced to the output. Even though linearity of devices is maintained, when referenced to the output through the gain of the circuit, the figure of merit is scaled by the gain of the circuit. 
     One traditional design approach has been to overdesign the circuits for the most stringent of conditions, which typically wastes power and chip area. One embodiment of the invention utilizes the non-linearity of the MOS devices  206 ,  208  as illustrated by the chart in  FIG. 3A . 
       FIG. 3A  illustrates linearity compensation by utilizing the non-linearity of the switches  206 ,  208 . A typical MOS switch (MOS device turned “on” into the linear or ohmic region) has a resistance R SS  versus voltage swing V swing  characteristics as shown in  FIG. 3A .  FIG. 3A  illustrates a first curve  302  of the resistance of an NMOS device and a second curve  304  of the resistance of a PMOS device. A bold curve  306   a ,  306   b  represents a combined resistance. For proper operation, the switches should be biased in the expansive regime of operation, which in this case is on the left half  306   a  of the bold curve  306   a ,  306   b.    
     Thus, when the input signal to the mixer circuit is relatively large and a low gain mode would be typically used, the expansive nature of the switches  206 ,  208  compensate for the compressive nature of the transistors  102 ,  104 ,  112 ,  114 ,  116 ,  118  in general, thereby delaying the onset of compression. This is further elaborated in  FIG. 3B . 
       FIG. 3B  illustrates an improvement in an output power 1 dB (oP1 dB) compression point. The solid curves  332 ,  334  trace the first order and third order components of the mixer circuit in the absence of any linearity compensation. The upper solid curve  332  represents the first order (the gain of the circuit) while the lower solid curve  334  represents the non-linear third order component. The point of intersection  336  of extrapolations of the two curves  332 ,  334  is the third-order intercept point (IP3) of the circuit, whereas the point  338  where the topmost curve  332  bends down by 1.0 dB is the 1 dB compression of the circuit. Depending on the axis to which the quantities are referred (input or output), the corresponding figure of merit would be called either input 1 dB (i1 dB) or output 1 dB (o1 dB) compression points. 
     The dashed curves  342 ,  344  represent harmonic components in the presence of the linearity compensation by expansive switch  206 ,  208  characteristics. Due to the expansive resistance nature of the switches  206 ,  208  themselves, when input power level is increased, the gain (first order component) is further compensated thereby delaying the onset of the 1 dB compression point. This however does come at the expense of inserting further non-linearity in the mixer circuit which is exhibited by the distortion in 3 rd  order component (the dashed lower curve  344 ). However the low-signal linearity (measured by intersection of extrapolated 1 st  and 3 rd  order components from low power levels) are still undisturbed and the IP3 of the circuit can still be maintained if the biasing is proper. 
       FIG. 4  illustrates a broadband RF mixer in a monolithic implementation of radio front end in which an embodiment of the mixer circuit can be used. The implementation style could be either heterodyne (intermediate IF) or homodyne (zero IF) radio. The circuit following the low noise amplifier (LNA)  402  is a downconverter  404  in which an embodiment of the invention can be used. 
     Various embodiments have been described above. Although described with reference to these specific embodiments, the descriptions are intended to be illustrative and are not intended to be limiting. Various modifications and applications may occur to those skilled in the art.