Abstract:
A bootstrap capacitor low voltage prevention circuit and method to control the same is provided. When a low voltage situation is detected the bootstrap capacitor is charged. An over voltage protection circuit is included that prevents the circuit from staying in an over voltage situation for a long period of time.

Description:
RELATED APPLICATIONS 
     This is a continuation-in-part of U.S. patent application Ser. No. 09/766,532, entitled “Bootstrap Capacitor Low Voltage Prevention Circuit,” filed Jan. 18, 2001now abandoned, under 35 U.S.C. §120 and 37 C.F.R. §1.53(b), which is incorporated herein by reference. 
    
    
     FIELD OF THE INVENTION 
     The present invention relates to analog and digital circuits. In particular, the present invention relates to a bootstrap capacitor low voltage prevention circuit. 
     BACKGROUND OF THE INVENTION 
     Bootstrap capacitors are commonly used in many electronic circuits. A bootstrap capacitor charging circuit typically charges a bootstrap capacitor when a signal, such as a voltage, goes below a predefined threshold. On the other hand, when the signal is above the predefined threshold the bootstrap capacitor is not charged. Therefore, the amount of charging time for a bootstrap capacitor is the amount of time the signal is below the predefined threshold. 
     In some operating conditions, the bootstrap capacitor may not be charged to a sufficient value to provide a stable signal to drive a circuit. This can cause a circuit to become non-operational. For example, if a bootstrap capacitor is not charged sufficiently, a switch may be left on in a weak state. This can result in the circuit being uncontrollable. Additionally, if the switch is left on, voltages in the circuit may rise above the intended values causing an over voltage condition. 
     SUMMARY OF THE INVENTION 
     The present invention is directed at addressing the above-mentioned shortcomings, disadvantages and problems, and will be understood by reading and studying the following specifications. 
     In accordance with aspects of the present invention, an apparatus and method are provided for a bootstrap capacitor low voltage prevention circuit. 
     In one aspect of the invention, a switched voltage is coupled to a switching regulator circuit that outputs an output voltage and provides a feedback signal to a control logic circuit. The control logic circuit measures the voltage across a bootstrap capacitor and controls the operation of the switched voltage as well as charging the bootstrap capacitor depending on the state of the switch. 
     Another aspect of the invention includes an over voltage protection circuit and temperature shutdown circuit. If an over voltage condition is detected the circuit is returned to a state of normal operating conditions. Similarly, if the circuit reaches a predetermined temperature, the circuit is shut down. 
     Yet another aspect of the invention includes a method of controlling a bootstrap capacitor low voltage prevention circuit. In accordance with this aspect, the voltage across a bootstrap capacitor is measured. When the measured voltage is too low, the charging of the bootstrap capacitor is stopped, a switched voltage is drained to a predetermined level, and the bootstrap capacitor is charged to a predetermined level. 
     Still yet another aspect of the invention includes a circuit and method for analyzing a waveform. A signal is analyzed to determine if the bootstrap capacitor should be drained or charged. In accordance with this aspect of the invention, the bootstrap capacitor is not charged unless the value of the signal drops below a predetermined threshold. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 shows an overview schematic diagram of a bootstrap capacitor low voltage prevention circuit; 
     FIG. 2 shows a schematic diagram of a bootstrap capacitor low voltage prevention circuit; 
     FIG. 3 illustrates a schematic diagram of a bootstrap capacitor low voltage prevention circuit including an over voltage mode protection circuit and temperature shutdown circuit; 
     FIGS. 4A-4C show exemplary waveforms; 
     FIG. 5 illustrates a flow diagram of the operation a bootstrap capacitor low voltage prevention circuit; and 
     FIG. 6 shows an operational flow diagram for analyzing a waveform used to aid in controlling operation of a bootstrap capacitor low voltage prevention circuit according to an embodiment of the present invention. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     In the following detailed description of exemplary embodiments of the invention, reference is made to the accompanied drawings, which form a part hereof, and which is shown by way of illustration, specific exemplary embodiments of which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized, and other changes may be made, without departing from the spirit or scope of the present invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined only by the appended claims. 
     FIG. 1 shows an overview schematic of a bootstrap capacitor low voltage prevention circuit. A switching regulator ( 105 ) indirectly regulates an average DC output voltage by selectively storing energy by switching energy on and off an inductor (L). In one embodiment of the invention, a buck controller circuit is used as the switching regulator. By comparing the output voltage (V out ) to a reference voltage the inductor current (I L ) is controlled to provide the desired output voltage for the circuit. 
     A switch ( 110 ) receives a voltage signal V in  and outputs a voltage signal V SW  to switching regulator  105 . In one embodiment of the invention when the switch is in the on state, switching regulator  105  receives V in  and receives no V in  signal when the switch is in the off state. Control logic circuit  115  has inputs for receiving feedback from switching regulator  105 , the voltage signal V SW , and voltage signal V in . Control logic circuit  115  contains logic for controlling the charging of CB cap    130 . CB cap    130  charges when switch  110  is in the off state, which occurs when the value of signal V SW  is below a predefined threshold. According to one embodiment of the invention, the predefined threshold is zero volts. The feedback (FB) input of control logic circuit  115  senses feedback from switching regulator  105  and adjusts the duty cycle of switch  110  to keep the voltage signal V out  of the circuit at its desired value. Control logic  115  also contains circuitry to detect when a low voltage is present on CB cap    130  and prevents the circuit from operating when this low voltage condition exists. According to another embodiment of the invention, control logic circuit contains an over voltage protection (OVP) circuit and temperature shutdown circuit. 
     FIG. 2 shows a schematic diagram of a bootstrap capacitor low voltage prevention circuit. Measurement circuit  205  measures the voltage across the bootstrap capacitor (CB cap ) between the points CB  210  and VSW  215 . Latch  225  is set when the measured voltage is small. According to one embodiment of the invention, the measured voltage is small if the difference value is below about 1.6V. Latch  225  is coupled to measurement circuit  205 . Measurement circuit  205  sets latch  225  when the CB cap  voltage drops to a low but still circuit controllable value of about 1.5V, according to one embodiment of the invention. When latch  225  is set, the driver (not shown) that charges CB cap  is turned off. Latch  225  also causes switch M 3  to discharge VSW  215  until VSW  215  is some predefined value above ground. According to one embodiment of the invention, this value is approximately 200 mV above ground. Once this occurs, CB cap  is fully charged and compare circuit  220  resets latch  225 . Compare circuit  220  receives signal VSW and a predetermined reference signal. In one embodiment of the invention, the reference signal is about 200 mV above ground. Compare circuit  220  trips depending on the values of VSW and the reference signal. When compare circuit  220  trips, latch  225  is reset, and the circuit will operate in normal operation. 
     FIG. 3 illustrates a schematic diagram of a bootstrap capacitor low voltage prevention circuit including an over voltage mode protection (OVP) circuit and temperature shutdown circuit. 
     The OVP mode of FIG. 3 will now be described. Referring to FIG. 1, when  1   out  becomes low enough V out  rises. This occurs because switch  110  turns on and then does not turn off until I L  reaches some finite value. Referring back to FIG. 3, switch M 1  is turned off when V out  is too high of a value. According to one embodiment, V out  a comparator is used to determine if V out  is too high a value. Switch M 1  remains off until I out  or feedback resistors R 1  and R 2  (FIG. 1) discharge V out  to a lower threshold value. The determination of the values depends on the operating characteristics of the chip. Alternatively, switch M 1  may remain off for a predetermined period of time. This period of time may be chosen based on the value of V out . During OVP, bias current is not drawn down switch M 1  so that the CB cap  is not being discharged. Additionally, when the circuit is in OVP mode, switch M 1  is disabled. In OVP mode, CB cap  is not constantly charged. The CB cap  voltage is monitored to determine if it drops to a low but still controllable value. According to one embodiment of the invention, switches M 1 -M 4  are transistors. 
     FIG. 3 also shows a temperature shutdown circuit for the bootstrap capacitor low voltage prevention circuit. The circuit is shut down if a predetermined temperature is reached within the circuit. According to one particular embodiment, switch M 3  is turned off when the chip reaches the predetermined temperature. The predetermined temperature is determined by the operating characteristics of the components used in the chip. When M 3  is turned on, the output capacitance C out  (See FIG. 1) is discharged. This helps control switch M 2  and VSW voltage  360  discharges to the proper operating level. When the predetermined temperature is reached, temperature shutdown  350  is set low. And gate  355  receives the low signal and turns off switch M 3 . When switch M 3  is on, VSW  360  discharges until its value is some predefined amount above ground. According to one embodiment of the invention, this value is approximately 200 mV above ground. Once this occurs, CB cap  is fully charged and the circuit is reset as described above. 
     Switch M 4  pulls a bias current when CB cap  is not being discharged. According to one embodiment of the invention, switch M 4  pulls a bias current of about 10 uA. Timer  1  has an input from node  320  that is low when the value of CB−VSW is low. This results when the CB cap  voltage is low. The W/L ratio of transistor M 2  is adjusted such that the value of the signal goes low at a voltage high enough to operate switch  110  shown in FIG. 1 reliably. According to one particular embodiment, value is around 1.5V. The length and width of M 4  can also be adjusted to the same length and width as M 2 . Timer  1  measures the time the value of the signal at node  320  is low. When the signal is low for a time longer than predetermined time T 1  the signal output from Timer  1  is high setting latch  330 . Predetermined time T 1  is chosen such that the period is longer than the switching frequency of V SW  insuring that the circuit is allowed to function when V SW  is high. 
     Timer  2  measures the time VSW  360  is high. The output of Timer  2  is set high if VSW  360  is high for a time longer than a predetermined time and the circuit is not in OVP mode. Timer  2  has an input from comparator  340 . Comparator  340  has a plus (non-inverting) input and a minus (inverting) input. Plus input of comparator  340  is coupled to signal VSW  360 . The minus input is coupled to an offset voltage provided by bias  345 , which according to one embodiment is approximately 200 mV. Comparator  340  is set to trip depending on the values of VSW  360  the bias signal. According to one embodiment of the invention, comparator  340  trips when signal V SW   360  is above the bias signal. When the output of Timer  2  is high latch  305  is set. 
     Timer  3  measures the time VSW  360  is low. The output of Timer  3  is set high if VSW  360  is low for a time longer than a predetermined time. Timer  3  has an input from comparator  330 . Comparator  330  has a plus (non-inverting) input and a minus (inverting) input. Plus input of comparator  330  is coupled to an offset voltage, which according to one embodiment is approximately 200 mV, provided by bias  345 . The minus input is coupled to signal VSW  360 . Comparator  330  trips when the bias signal is larger than the VSW  360  signal. Latch  305  is reset based on Timer&#39;s output. According to one embodiment of the invention, latch  305  is reset if Timer&#39;s output is high. If set is high (1) then a fault condition has occurred within the circuit. When Q is high driver  335  turns off switch M 1 . In one embodiment of the invention, M 1  is a transistor. 
     According to another embodiment of the invention, signal V SW  is analyzed to determine if CB cap  should be drained or charged. CB cap  is not charged unless the value of V SW  drops below a predetermined threshold. According to one embodiment of the present invention, this predetermined threshold is 200 mV. In one actual embodiment, the waveform is analyzed for three (3) periods or longer. The time period may be adjusted to other time periods, such as  2 ,  3 ,  4 , and the like. 
     FIG. 4A shows exemplary graphs of IL and VSW waveforms when a(V in−V   out ) and I out  is sufficiently high to operate the circuit. When the switch (FIG. 1) is on, IL increases from zero (0) to I peak  with a slope of (V in−V   out )/L. Alternatively, when the switch is off IL is conducted through the Schottky diode D 1  (FIG. 1) and ramps downward having a slope of V out /L. The charging time of CB cap  is proportional to the value of I peak . 
     FIG. 4B shows the IL and VSW waveforms when (V in−V   out ) and I out  is low. When I peak  is low the time charging CB cap  is low resulting in the voltage across the CB cap  to start dropping. When I Load  is low enough, inductor L (FIG. 1) resets itself before VSW has a chance to go below zero volts. Under these conditions, the voltage across CB cap  eventually becomes low enough to lock VSW permanently off and VSW becomes equal to V out  causing the converter to be locked into this position. 
     FIG. 4C shows an exemplary waveform of VSW. From time t 1  through t 2  the value of VSW drops below zero volts causing the CB cap  to charge. During this time period the circuit operates properly. From time t 2  through time t 3 , however, VSW does not drop below zero volts resulting in CB cap  not charging and possibly locking VSW permanently in the off position. 
     If I out  becomes low enough, the converter causes V out  to rise. This is caused by the fact that M 1  will be turned on until the load current I Load  reaches some predefined value. If the predefined value is not reached then the switch M 1  is never turned off. When output current I out  is lower than the average value of load current IL, V out  rises. Therefore, according to one embodiment of the invention, an over voltage protection circuit is implemented. A comparator turns off switch M 1  when V out  is above a predetermined threshold. M 1  stays off until V out  is discharged below the predetermined threshold value. This may be accomplished by discharging through feedback resistors. 
     FIG. 5 shows an overview flow diagram illustrating the operation of the bootstrap capacitor low voltage prevention circuit. When the logic flow moves to a block  510 , the value of CB−VSW is measured. Advancing to a decision block  520 , a determination is made as to whether the measured value is low. As discussed above, the value is low when the voltage at CB cap  does not reliably control the circuit. If the value of CB−VSW is not below the predetermined value the logical flow returns to a block  510 . If the measured value is low the logic advances to a block  530 . At a block  530  the driver is turned off. VSW is drained to a predetermined value (block  40 ). According to one embodiment of the invention, VSW is drained to 200 mV above ground. Transitioning to a block  550 , the bootstrap capacitor is charged. Next, at a block  560 , VSW is verified to be at the predetermined value. The driver is then reset and the circuit continues in normal operation (block  570 ). The logical flow then ends. 
     FIG. 6 shows an operational flow diagram for analyzing a signal used to aid in controlling operation of a bootstrap capacitor low voltage prevention circuit according to an embodiment of the present invention. Starting at a block  610  the signal VSW is analyzed. According to one embodiment of the invention, this includes determining a value for the signal. Advancing to a decision block  620 , a decision is made as to whether the signal is below a predetermined value. According to one embodiment of the invention, this predetermined value is 200 mV. In one embodiment of the invention, decision block  620  determines if the signal has dropped below the predetermined value for a sufficient time to properly control the charging of the bootstrap capacitor. If not, the logical flow advances to a block  630 , which drains VSW to a predetermined level. According to one embodiment of the invention, the predetermined level is 200 mV. If so, the logical flow returns to a block  610 . The logical flow then ends. 
     In one embodiment of the present invention, the methods and apparatus of the present invention operate when a low-resistance switch is not available at the power supply. In synchronous converters, where the switch is operated synchronously, low-resistance switches are used. When a low-resistance switch (not shown) is used, the switch node is pulled and held at ground, charging the bootstrap capacitor when the low-resistance switch is activated. However, a low-resistance switch may present a tradeoff by having an increased size in comparison to other switches. The size of low-resistance switch is a consideration as the circuit of the present invention is utilized for low voltage prevention, rather than normal operation. It may be undesirable to dedicate a relatively large amount of area to a circuit that does not operate during normal operation. 
     In non-synchronous circuits, where the switch is operated asynchronously, a high-resistance switch may be utilized. In previous circuits, the voltage at the switch node rises in response to increased current through the switch node. If attempted to be used in a synchronous circuit, the high-resistance switch is unable to hold the switch node at ground in response to the current increase. Accordingly, the bootstrap capacitor may not fully charge before the voltage at the switch node rises to a sufficient potential to prevent the bootstrap capacitor from reaching a full charge. 
     According to the present invention, a non-synchronous circuit is utilized that has a high-resistance switch. Despite the high resistance, the switch node is still pulled towards ground for a significant amount of time, allowing the bootstrap capacitor to reach a full charge and sustain a full charge for a significant interval of time (e.g., 0.5-5 msec). The interval time is more than enough to allow the bootstrap capacitor to charge up, which typically reaches a full charge in 10-100 μsec. The present invention avoids a requirement to utilize a low-resistance switch, reducing the amount of circuit area required to prevent a low voltage condition. 
     The above specification, examples and data provide a complete description of the manufacture and use of the composition of the invention. Since many embodiments of the invention can be made without departing from the spirit and scope of the invention, the invention resides in the claims hereinafter appended.