Abstract:
A fan testing device connects to the fan and a motherboard. The fan testing device includes a first connection module, a second connection module, a control chip, and an alarm module. The control chip is coupled to signal pins of the first and second connectors. The control chip outputs different signals to control the alarm module according to the connections of the first and second connection modules.

Description:
FIELD 
       [0001]    The present disclosure relates to a fan testing device. 
       BACKGROUND 
       [0002]    A fan testing device has a first connector to connect to a motherboard, and a second connector to connect to a fan. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWING 
         [0003]    Many aspects of the present disclosure can be better understood with reference to the following drawing. The components in the drawing are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present disclosure. 
           [0004]    The FIGURE is a circuit diagram of an embodiment of a fan testing device of the present disclosure. 
       
    
    
     DETAILED DESCRIPTION 
       [0005]    It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawing is not necessarily to scale and the proportions of certain parts have been exaggerated to better illustrate details and features of the present disclosure. 
         [0006]    The term “coupled” is defined as connected, whether directly or indirectly through intervening components, and is not necessarily limited to physical connections. The connection can be such that the objects are permanently connected or releasably connected. The term “comprising,” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series, and the like. 
         [0007]    The FIGURE shows an embodiment of a fan test device  10  of the present disclosure. 
         [0008]    The fan test device  10  can comprise a first connection module  20  to connect to a fan, a second connection module  30  to connect to a motherboard, a control chip U 1 , and an alarm module  40 . In the embodiment, the fan test device  10  can notify a user whether the first connection module  20  and the second connection module  30  are coupled incorrectly to the motherboard and the fan, respectively. 
         [0009]    The first connection module  20  can comprise a first connector J 1 , a first resistor R 1 , a second resistor R 2 , a third resistor R 3 , and a capacitor C 1 . The first connector J 1  can be coupled to the fan. A power pin  1  of the first connector J 1  is coupled to a first power input terminal P 5 V through the first resistor R 1 . A speed pin  2  of the first connector J 1  is coupled to the first power input terminal P 5 V through the second resistor R 2 . The speed pin  2  of the first connector J 1  is also grounded through the third resistor and the capacitor C 1  in that order. A node between the third resistor R 3  and the capacitor C 1  is coupled to a speed pin  1  of the control chip U 1 . A ground pin  3  of the first connector J 1  is grounded. A signal pin  4  of the first connector J 1  is coupled to a control pin  2  of the control chip U 1 . The signal pin  4  of the first connector J 1  is further coupled to a power source (not shown) that outputs a constant high-level signal, such as logic  1 , to the signal pin  4  of the first connector J 1 . 
         [0010]    The second connection module  30  can comprise a second connector J 2 , a fourth resistor R 4 , a fifth resistor R 5 , a diode D 1 , a fuse FS, and an electronic switch Q 1 . The second connector J 2  can be coupled to the motherboard. A signal pin  1  of the second connector J 2  is coupled to a signal pin  3  of the control chip U 1 . A power pin  2  of the second connector J 2  is coupled to a second power input terminal P 12 V_A. The power pin  2  of the second connector J 2  is also coupled to an anode of the diode D 1  through the fuse FS. A cathode of the diode D 1  is coupled to a third power input terminal P 12 V. An alarm pin  3  of the second connector J 2  is coupled to a second terminal of the electronic switch Q 1 . A first terminal of the electronic switch Q 1  is grounded through the fifth resistor R 5 . The first terminal of the electronic switch Q 1  is also coupled to an alarm pin  4  of the control chip U 1  through the fourth resistor R 4 . A third terminal of the electronic switch Q 1  is grounded. A ground pin  4  of the second connector J 2  is grounded. 
         [0011]    The alarm module  40  can comprise a sixth resistor R 6  and a light-emitting diode (LED) D 2 . A cathode of the LED D 2  is coupled to an indicating pin  5  of the control chip U 1  through the sixth resistor R 6 . An anode of the LED D 2  is coupled to the first power input terminal PSV. 
         [0012]    When the first connector J 1  is coupled to the motherboard while the second connector J 2  is coupled to the fan, the signal pin  4  of the first connector J 1  is coupled to ground of the motherboard, causing the signal pin  4  of the first connector J 1  to be grounded, and further causing the control pin  2  of the control chip U 1  to be at a low level. The signal pin  1  of the second connector J 2  is coupled to the fan, causing the signal pin  1  of the second connector J 2  to be at a low level and further causing the signal pin  3  of the control chip U 1  to be at a low level. 
         [0013]    The alarm module  40  alerts when the alarm module  40  receives a first signal from the control chip U 1 . In the embodiment, the control chip U 1  outputs a low-level signal, such as logic  0 , through the indicating pin  5  when the control pin  2  and the signal pin  3  of the control chip U 1  are both at a low level, causing the LED D 2  to light up to indicate that the connection between the first connector J 1  and the motherboard, and the connection between the second connector J 2  and the fan, are incorrect. 
         [0014]    When the first connector J 1  is coupled to the fan while the second connector J 2  is coupled to the motherboard, the motherboard outputs a high-level signal to the signal pin  1  of the second connector J 2 , causing the signal pin  3  of the control chip U 1  to be at a high level. The control pin  2  of the control chip U 1  receives the constant high-level signal from the signal pin  4  of the first connector J 1 . The control chip U 1  outputs a high-level signal through the indicating pin  5  when the control pin  2  and the signal pin  3  of the control chip U 1  are both at a high level, causing the LED D 2  to turn off. The fan outputs a speed signal through the speed pin  2  of the first connector J 1 , and the control chip U 1  receives the speed signal through the speed pin  1  of the control chip U 1 . When the control chip U 1  determines that a speed of the fan is abnormal, the control chip U 1  outputs a high-level signal to the first terminal of the electronic switch Q 1  through the alarm pin  4  of the control chip U 1 , causing the electronic switch Q 1  to turn on. When the electronic switch Q 1  is turned on, the alarm pin  3  of the second connector J 2  is grounded. When the alarm pin  3  of the second connector J 2  is grounded, the motherboard receives a low-level signal from the alarm pin  3  of the second connector J 2  and determines that the speed of the fan is abnormal. When the control chip U 1  determines that the speed of the fan is normal, the control chip U 1  outputs a low-level signal to the first terminal of the electronic switch Q 1 , causing the electronic switch Q 1  to turn off. The motherboard receives a high level signal through the alarm pin  3  of the second connector J 2  and determines that the speed of the fan is normal. 
         [0015]    In the embodiment, the electronic switch Q 1  is an NPN transistor, but can be any other suitable transistor. 
         [0016]    The fan test device  10  operates normally when the first connector J 1  is coupled to the fan, and the second connector J 2  is coupled to the motherboard, and notifies a user when the first connector J 1  and the second connector J 2  are coupled to the motherboard and the fan, respectively. 
         [0017]    While the disclosure has been described by way of examples, it is to be understood that the disclosure is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements as would be apparent to those skilled in the art. Therefore, the range of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.