Abstract:
An LED package includes a base, an LED chip, and an encapsulant. The LED chip is mounted on the base, and is enclosed by the encapsulant. The base includes a substrate and a blocking wall integrally formed with the substrate. The blocking wall divides a surface of the substrate into a first bonding area and a second bonding area. An electrically conductive layer and a solder are formed on the bonding area in sequence. The blocking wall can block the first and second solder to overflow outside the first and second bonding area at soldering respectively. A method for manufacturing the LED package is also provided.

Description:
BACKGROUND 
       [0001]    1. Technical Field 
         [0002]    The present disclosure generally relates to LED technology, and particularly to an LED package. 
         [0003]    2. Description of the Related Art 
         [0004]    Light emitting diodes&#39; (LEDs&#39;) many advantages, such as high luminosity, low operational voltage, low power consumption, compatibility with integrated circuits, easy driving, long-term reliability, and environmental friendliness, have promoted the LEDs as a widely used light source. Light emitting diodes are commonly applied in lighting applications. 
         [0005]    LED packages must, however, overcome manufacturing challenges. Referring to  FIG. 1 , a schematic cross section of a base of a commonly used LED package is shown. The base includes a substrate  11 , and a first conductive layer  12   a  and a second conductive layer  12   b  formed at interval on the substrate  11 . A first carrier  13   a  and a second carrier  13   b  are defined respectively on the first conductive layer  12   a  and the second conductive layer  12   b.  A first solder  14   a  and a second solder  14   b  are defined on the first carrier  13   a  and the second carrier  13   b.  Two first blocking walls  15   a,    15   a ′ and two second blocking walls  15   b,    15   b ′ are respectively formed on the first conductive layer  12   a  and the second conductive layer  12   b  on two sides of the first solder  14   a  and the second solder  14   b.  It is complicated to form blocking walls on the conductive layer to prevent solder from overflow, and manufacturing costs are increased. 
         [0006]    What is needed, therefore, is an LED package which can improve manufacturing convenience, and ameliorate the described limitations. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0007]    Many aspects of the disclosure can be better understood with reference to the drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the LED package. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the views. 
           [0008]      FIG. 1  is a schematic cross section of a base of a commonly used LED package. 
           [0009]      FIG. 2  is a schematic cross section of an LED package in accordance with a first embodiment. 
           [0010]      FIG. 3  is a schematic cross section of a base of an LED package in accordance with a first embodiment. 
           [0011]      FIG. 4  is a schematic cross section of a base of an LED package in accordance with a second embodiment. 
           [0012]      FIG. 5  is a schematic view of a substrate plate of an LED package in accordance with a first embodiment. 
           [0013]      FIG. 6  is a schematic view of a substrate plate of an LED package of  FIG. 5  after flipping LED chips. 
       
    
    
     DETAILED DESCRIPTION 
       [0014]    Embodiments of an LED package as disclosed are described in detail here with reference to the drawings. 
         [0015]    Referring to  FIG. 2  and  FIG. 3 , an LED package  10  in accordance with a first embodiment includes a base  100 , an LED chip  200 , and an encapsulant  300 . The base  100  includes a substrate  110 , a first conductive layer  120   a,  a second conductive layer  120   b,  a first carrier  130   a,  a second carrier  130   b,  a first solder  140   a,  and a second solder  140   b.  The LED chip  200  is a flip chip. 
         [0016]    The substrate  110  includes a substrate body  111 , and a first blocking wall  112  and a second blocking wall  113  protruding upwardly from a top surface of the substrate body  111 . In this embodiment, the first blocking wall  112  and the second blocking wall  113  are parallel and can be arranged in different ways, such as with intersecting extension lines. In this embodiment, the first blocking wall  112  and the second blocking wall  113  are perpendicular to the top surface of the substrate body  111  but are not limited thereto. 
         [0017]    The first blocking wall  112  and the second blocking wall  113  are formed integrally with and divide the surface of the substrate body  111  into a first bonding area  114 , a spacing region  115 , and a second bonding area  116 . The spacing region  115  is arranged between the first bonding area  114  and the second bonding area  116 . The substrate  110  can be ceramic, silicon, or PCB (printed circuit board). The first blocking wall  112  and the second blocking wall  113  are formed by etching in this embodiment. 
         [0018]    The first conductive layer  120   a  and the second conductive layer  120   b  are formed on the first bonding area  114  and the second bonding area  116  of the substrate  110  by vapor deposition. The first conductive layer  120   a  and the second conductive layer  120   b  can be gold, silver, copper, nickel, aluminum, or an alloy of combination thereof. 
         [0019]    The first carrier  130   a  and the second carrier  130   b  are formed respectively on the first conductive layer  120   a  and the second conductive layer  120   b  near the first blocking wall  112  and the second blocking wall  113  for seating the first solder  140   a  and the second solder  140   b.  The first carrier  130   a  and the second carrier  130   b  respectively electrically connect with the first conductive layer  120   a  and the second conductive layer  120   b.  The first carrier  130   a  and the second carrier  130   b  can be gold, platinum, chromium, or titanium. 
         [0020]    The first solder  140   a  and the second solder  140   b  are configured for electrically connecting the LED chip  200  with the first conductive layer  120   a  and the second conductive layer  120   b.  In this embodiment, the bottom area of the first solder  140   a  and the second solder  140   b  are respectively less than the carrying area of the first carrier  130   a  and the second carrier  130   b.    
         [0021]    The LED chip  200  is flipped to contact the base  100  with the first electrode  210  and the second electrode  220 . The first electrode  210  electrically connects with the first conductive layer  120   a  through the first solder  140   a,  and the second electrode  220  electrically connects with the second conductive layer  120   b  through the second solder  140   b.    
         [0022]    The encapsulant  300  is an encapsulating resin covering the LED chip  200  and providing protection from dust and moisture. Preferably, the encapsulant  300  can include phosphor, such as Yttrium aluminum garnet (YAG, Y 3 Al 5 O 12 ), Terbium aluminum garnet (TAG, Tb 3 Al 5 O 12 ), silicate, or combination thereof, to increase utility of light. 
         [0023]    During soldering of the first solder  140   a  and the second solder  140   b  with high temperature to connect with the first electrode  210  and the second electrode  220 , the first blocking wall  112  and the second blocking wall  113  on the base  100  can prevent the first solder  140   a  and the second solder  140   b  from overflowing and short circuiting the first conductive layer  120   a  and the second conductive layer  120   b.  The substrate  100  can be a printed circuit board (PCB), by forming an integral blocking wall. 
         [0024]    Referring to  FIG. 4 , an LED package  10  in accordance with a second embodiment differs from the first embodiment in that the base  100 ′ of the second embodiment includes only one blocking wall  117  formed integrally to separate the first bonding area  114  and the second bonding area  116 . The first conductive layer  120   a,  the first carrier  130   a,  the first solder  140   a,  and the second conductive layer  120   b,  the second carrier  130   b,  the second solder  140   b  are respectively configured on the first bonding area  114  and the second bonding area  116 . The blocking wall  117  can prevent the first solder  140   a  and the second solder  140   b  from solder overflow. 
         [0025]    Referring to  FIG. 5  and  FIG. 6 , a manufacturing method of an LED package is as follows: 
         [0026]    Step 1, provide a substrate  20  and etch a plurality of cutting lanes  21  on the substrate  20  according to a predetermined pattern. The cutting lanes  21  divide the substrate  20  into a plurality of substrate units  22 . The substrate  20  can be ceramic, silicon, or PCB. 
         [0027]    Step 2, etch to form a blocking wall  23  on each substrate unit  22  for separating the substrate unit  22  into a first bonding area  24  and a second bonding area  24 ′. In this embodiment, a pair of parallel blocking walls  23  is formed on each substrate unit  22 . 
         [0028]    Step 3, form conductive layers  25  respectively on the first bonding area  24  and the second bonding area  24 ′. In this embodiment, the conductive layer  25  can be gold, silver, copper, nickel, aluminum, or combination thereof. 
         [0029]    Step 4, form carriers  26  on a predetermined position of the conductive layer  25 . The carrier  26  can be gold, platinum, chromium, or titanium. 
         [0030]    Step 5, form solders  27  on the carriers  26 . The area of the solder  27  does not exceed the area of the carrier  26 . 
         [0031]    Step 6, flip an LED chip  200  on each substrate unit  22 . 
         [0032]    Step 7, encapsulate the LED chip  200 . The encapsulant can include phosphor to generate light of different colors. 
         [0033]    Step 8, cut along the cutting lane  21  to achieve a plurality of LED packages. 
         [0034]    It is to be understood, however, that even though numerous characteristics and advantages of the disclosure have been set forth in the foregoing description, together with details of the structures and functions of the embodiment(s), the disclosure is illustrative only, and changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the disclosure to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.