Abstract:
A semiconductor integrated circuit is temperature compensated by circuit elements which may be integrated on a typical semiconductor chip. The elements may include resistances formed by different means to have different temperature coefficients so that the collective temperature coefficient of the resistances can be adjusted by changing the values of the resistances.

Description:
BACKGROUND OF THE INVENTION 
     This invention relates to a semiconductor integrated circuit providing temperature compensation using resistance elements. 
     It is well-known that the characteristics of semiconductor elements, such as transistors, etc., vary with the surrounding temperature. Accordingly, semiconductor integrated circuits with many, integrally formed elements on semiconductor substrates sometimes do not operate according to specification due to variations in the surrounding temperature. Temperature compensating elements are therefore typically provided in such semiconductor integrated circuits to maintain normal operation. These compensating elements may include diodes having temperature dependent forward voltage characteristics or other discrete elements, such as thermistors. However, traditional compensation requires use of elements which cannot be integrated into a typical semiconductor chip. Thus, chip size must be enlarged. 
     OBJECT AND SUMMARY OF THE INVENTION 
     An object of this invention is to provide an improved temperature compensated semiconductor integrated circuit wherein the compensation is performed by circuit elements which may be integrated on a typical semiconductor chip. Temperature compensation is accomplished by providing a plurality of resistance elements which have different temperature coefficients. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     This and other objects and advantages of the invention will become more apparent and more readily appreciated from the following detailed description of the presently referenced exemplary embodiment of the invention taken in conjunction with the accompanying drawing, in which: 
     FIGS. 1 and 2 are circuit diagrams of embodiments of this invention; 
     FIG. 3 is a graph showing the temperature coefficients of the resistances in FIG. 2; and 
     FIG. 4 is a circuit diagram of another embodiment of this invention. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring now to FIG. 1, an embodiment of the present invention as used in a hybrid type semiconductor circuit constant current source will be described. Respective resistances R 1 , R 3 , and R 5  are coupled between a voltage source V s  and the bases of respective bipolar transistors Q 1 , Q 2 , and Q 3 . The base of transistor Q 1  is also connected to the anode of a diode D, which is, in turn, connected to ground through a resistance R 2 . The collector of transistor Q 1  is connected to the base of transistor Q 2 . The collector and emitter of transistor Q 2  are, in turn, connected to the base of transistor Q 3  and to ground, respectively. The emitter of transistor Q 1  is coupled through a group of series resistances (Ra, Rb), collectively indicated as R 4 , to the emitter of transistor Q 3 , and through a resistance R 6 , to ground. The circuit output is provided at the collector of transistor Q 3 . 
     In the operation of the circuit of FIG. 1, transistor Q 3  is controlled in accordance with a comparison of the voltage across resistance R 6  and a reference voltage, V REF , where: 
     
         V.sub.REF = (V.sub.s -V.sub.FD)R.sub.2 /(R.sub.1 +R.sub.2)!- (V.sub.s -V.sub.BEQ.sbsb.2)R.sub.4 /R.sub.3 ! 
    
     In this equation, V FD  is the forward voltage across diode D, and V BEQ2  is the base-emitter voltage of transistor Q 2 . If V REF  is greater than VE, transistor Q 1  conducts more, transistor Q 2  conducts less and transistor Q 3  conducts more. Conversely, if V REF  is less than VE, transistor Q 1  conducts less, transistor Q 2  conducts more and transistor Q 3  conducts less. 
     The circuit of FIG. 1 is a hybrid type semiconductor integrated circuit, in that area I (shown by a dotted line) is formed in a semiconductor substrate as a monolithic semiconductor integrated circuit chip and area II (shown by dotted line) is formed independently using thick film technology. Within the circuit, resistance R 4  acts as a unitary resistance. However, resistance R 4  is formed by two resistances Ra and Rb, one in each area. 
     In forming the hybrid circuit, the above-mentioned semiconductor integrated circuit chip I is disposed on an insulating substrate, such as ceramic, together with the thick film elements generally indicated as II. Resistances R 1 , R 2 , R 3   and Ra are formed by impurity diffusion regions in the semiconductor chip. Alternatively, resistor Ra may be formed from polycrystalline silicon. Thick film resistances R 5 , R 6  and Rb are formed by printing a powder material on the insulating substrate and sintering. Carbon, rutenium oxide, a mixture of palladium oxide and metal or the like may be employed as the powder material. The temperature coefficient of diffusion resistances are generally greater than the temperature coefficient of thick film resistances. For example, the temperature coefficient of a thick film resistance is typically on the order of 200 PPM/degree C. However, the temperature coefficient of a diffusion-type resistance is on the order of 2000 PPM/degree C. Therefore, it is possible to control the temperature characteristic of the above-mentioned voltage V REF  by changing the ratio of the values of resistances Ra and Rb. 
     The amount of change ΔR 4  of the value of resistance R 4  with temperature is shown the following equation: 
     
         ΔR.sub.4 =ΔRa+ΔRb 
    
     ΔRa and ΔRb are the amounts of change of resistances Ra and Rb, respectively. Consequently, the temperature coefficient (ΔR4/R4) of resistance R 4  is shown as follows: 
     
         ΔR.sub.4 /R.sub.4 =(ΔRa+ΔRb)/R.sub.4 =(Ra/R.sub.4)(Δ Ra/Ra)+(Rb/R.sub.4)(ΔRb/Rb) 
    
     In this equation, ΔRa/Ra and ΔRb/Rb are temperature coefficients of resistances Ra and Rb, respectively. Substituting the above-mentioned actual temperature coefficients of Ra and Rb into this equation gives: 
     
         ΔR.sub.4 /R.sub.4 =(2000 PPM)Ra/R.sub.4 +(200 PPM)Rb/R.sub.4 
    
     Thus, the value of ΔR 4  /R 4 , that is the temperature coefficient of resistance R 4 , can be controlled within the limits of 200 PPM/degree C. to 2000 PPM/degree C. The value of thick film resistance Rb can be adjusted by trimming the resistance. 
     The purpose of the circuit in FIG. 1 is to produce a constant current. However, without temperature compensation, the current flowing through transistor Q 3  will vary with temperature. In order to eliminate this temperature dependence, the value of resistance Rb and/or resistance Ra is varied to vary the temperature coefficient of resistance R 4  until the desired degree of temperature independence is achieved. 
     The embodiment of FIG. 1 employs resistances Ra and Rb connected in series. However, a parallel connection of these resistors can also be effective. Resistance R 4  may also be formed by the series and/or parallel connection of three or more resistances. 
     FIG. 2 shows an input circuit which may be made on a single integrated circuit chip. However, the threshold voltage changes with temperature. To stabilize the threshold voltage with respect to temperature, resistances R 7  and R 8  are made by different processes. Namely, resistance R 7  is made by ion implantation, and has a temperature coefficient of 4000 PPM/degrees C. Resistance R 8  is formed in the same region as the base of transistor Q 4 , and has a temperature coefficient of 2000 PPM/degrees C. The threshold voltage V TH  is expressed by the following equation: 
     
         V.sub.TH =V.sub.BE × (R.sub.7 +R.sub.8)/R.sub.8 ! 
    
     The temperature characteristics of resistances R 7  and R 8  are shown in FIG. 3. The values of resistances R 7  and R 8  can be adjusted in order to adjust the temperature coefficient of the series combination of R 7  and R 8  to a value which counterbalances the temperature characteristics of transistor Q 4 . By this procedure the threshold voltage can be made independent of temperature. Thus, a substantially temperature independent threshold voltage V TH  is obtained without requiring the addition of any further elements specifically for temperature compensation. 
     This invention may also use active components in conjunction with resistances that have different temperature coefficients to produce a signal whose value changes with temperature in a predetermined manner. The output of these components can then be used in any application requiring a signal whose value varies with temperature in a known way. The circuit of FIG. 4 is a general comparator having a reference voltage established by a voltage divider formed by resistances R 9  and R 10 . However, resistances R 9  and R 10  have different temperature coefficients. Accordingly, the voltage at the reference input of the comparator changes with temperature. By proper choice of the values of resistances R 9  and R 10 , the temperature characteristics of the composite device can be controlled. As a result of this improvement, an output that varies in a predetermined way with temperature can be obtained. 
     Other combinations of resistances may also be employed to form a resistance having an adjustable temperature coefficient. For example, a base resistance and an emitter resistance, ion implantation resistance and polycrystalline silicon resistance, etc. may be employed. 
     Many changes and modifications can, of course, be carried out without departing from the scope of the present invention, that scope, accordingly, being defined only by the scope of the appended claims.