Abstract:
An image sensor power distribution arrangement includes a sensing portion having a first contact at a first edge thereof and a second contact at a second edge thereof, and a control portion. A first power supply supplies power to the sensing portion via the first contact. A second power supply supplies power to the sensing portion via the second contact, and to the control portion.

Description:
FIELD OF THE INVENTION 
       [0001]    The present invention relates to image sensor power distribution, and more particularly, but not exclusively, to a method and arrangement of image sensor power distribution. Even more particularly, but not exclusively, the present invention relates to a method and arrangement of image sensor power distribution of a standard mobile imaging architecture (SMIA) compatible image sensor. 
       BACKGROUND OF THE INVENTION  
       [0002]    Referring now to  FIG. 1 , a prior art image sensor  100  comprises a regulated power supply  102 , a sensing portion  104  and a control portion  106 . The sensing portion  104  comprises a digital logic array  108  and an image sensor array  110 . The image sensor array  110  comprises a pixel array  118  and first and second analog-to-digital converters  120 ,  122 . The control portion  106  comprises a clock  112 , an input-output (IO) port  114 , which together forms a serial macro element  115  and a phase locked loop (PLL)  116 . 
         [0003]    Typically, a SMIA compatible image sensor requires a supply voltage of 1.2±0.2V to be compliant with the industry standard camera serial interface (CSI-2) specification. The voltage drop δV across the sensing portion  104  is determined by the relationship: 
         [0000]      δV=IR 
         [0000]    where R is the resistance of the digital element, and I is the current passing through the digital element. 
         [0004]    The voltage drop across the sensing portion  104  is typically linear. The voltage drop may be sufficient to compromise the compatibility of the output of the image sensor  100  with the SMIA. That is, the voltage drop may be more that 100 mV. 
         [0005]    Additionally, the connection of the power supply  102  remote from the control portion  106  via semiconductor substrate upon which the image sensor  100  is fabricated gives rise to high impedance between an external capacitor  124  and the control portion  106 . A high impedance results in poor decoupling of current spikes between the power supply  102  and the control portion  106 . Current spikes can cause cross-talk and jitter in the output signal. 
         [0006]    A greater capacitance of the external capacitor  124  provides enhanced decoupling of current spikes. However, the provision of on-chip capacitance in excess of 100 nF, for example, is not practical due to the impedance of the semiconducting nature of the substrate upon which the image sensor  100  is fabricated. 
       SUMMARY OF THE INVENTION 
       [0007]    According to an aspect of the present invention, an image sensor power distribution arrangement comprises a first power supply, a control portion and a sensing portion. The first power supply may be arranged to supply power to the sensing portion via a first contact at a first edge of the sensing portion. 
         [0008]    A second power supply may also be arranged to supply power to the control portion, and may be further arranged to supply power to the sensing portion via a second contact at a second edge of the sensing portion. Such an arrangement may result in an IR drop across the sensing portion being reduced since the sensing portion is driven from two points. 
         [0009]    The first power supply may be located remote from the control portion, and the second power supply may be located adjacent the control portion. The first and second power supplies may be located in respective first and second pad rings of the image sensor. The first and second pad rings may be opposed to each other across the sensing element. 
         [0010]    Since each power supply may be required to supply only half of the current and across half of the resistance, the voltage drop associated with each power supply may be one quarter of that of a single power supply architecture. 
         [0011]    The first power supply may connect to the sensing element at multiple points. The second power supply may connect to the sensing element at multiple points opposed to those points at which the first power supply connects to the sensing element. Either or both of the first and second power supplies may be regulated power supplies. 
         [0012]    The outputs of the first and second power supplies may be connected via a track on a substrate bearing the image sensor. The track may have an impedance less 1Ω, and preferably less than 0.1Ω. 
         [0013]    This architecture advantageously improves load regulation performance by reducing the IR drop across the parasitic impedance due to the track. The architecture may comprise a decoupling capacitor located adjacent the second power supply. Alternatively, the decoupling capacitor may comprise a capacitor external the image sensor. The capacitor may have a capacitance greater than 100 nF, for example. 
         [0014]    The location of the decoupling capacitor adjacent to the second power supply may reduce impedance associated with interconnects between the capacitor and the image sensor. The capacitor external the image sensor may be provided by the substrate of the image sensor, which is typically a printed circuit board (PCB). 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0015]    The invention will now be described, by way of example only, with reference to the accompanying drawings, in which: 
           [0016]      FIG. 1  is a schematic diagram of an image sensor power distribution arrangement according to the prior art; 
           [0017]      FIG. 2  is a graph showing an example voltage drop across the image sensor power distribution arrangement of  FIG. 1  along the line A-A′; 
           [0018]      FIG. 3  is a schematic diagram of a first embodiment of an image sensor power distribution arrangement according to the present invention; 
           [0019]      FIG. 4  is a graph showing an example voltage drop across the image sensor power distribution arrangement of  FIG. 3  along the line B-B′; 
           [0020]      FIG. 5  is a schematic diagram of another embodiment of an image sensor power distribution arrangement according to the present invention; 
           [0021]      FIG. 6  is a schematic diagram of an image sensor comprising a capacitor according to the present invention for use in the power distribution arrangements of  FIGS. 3 and 5 ; and 
           [0022]      FIG. 7  is a plan view of elements of the capacitor of  FIG. 6 . 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0023]    Referring now to  FIGS. 3 and 4 , an image sensor  300  comprises regulated power supplies  302   a,    302   b,  upper and lower ring pads  303   a,    303   b,  a sensing portion  304  and a control portion  306 . Typically, the power supplies  302   a,    302   b  are regulated voltage supplies. Usually, the power supplies  302   a,    302   b  have an output of 1.2V. 
         [0024]    A decoupling capacitor  307  is formed external the image sensor  300  and decouples the power supplies  302   a,    302   b  from external signals. Typically, the capacitor  307  has a capacitance in excess of 100 nF. The construction of the decoupling capacitor  307  is described in detail below. 
         [0025]    The sensing portion  304  comprises a digital logic array  308  and an image sensor array  310 . The image sensor array  310  comprises a pixel array  318 , and first and second analog-to-digital converters (ADCs)  320 ,  322 . The control portion  306  comprises a clock  312  and an input-output (IO) port  314 , which together forms a serial macro element  315 , and a phase locked loop (PLL)  316 . 
         [0026]    One of the power supplies  302   a  is located in the upper ring pad  303   a.  The power supply  302   a  is adjacent both the control portion  306 , and a corner of the sensing portion  304  next to one of the ADCs  320 . This power supply  302   a  supplies power to both the sensing portion  304  and the control portion  306 . The electrical connection between the power supply  302   a  and the sensing portion  304  is provided by a single contact to the ADC  320 , adjacent the control portion  306 . 
         [0027]    The other power supply  302   b  is located in the lower ring pad  303   b.  This power supply  302   b  is adjacent the other corner of the same side of the sensing portion  304 , next to the other of the ADCs  322 . This power supply  302   b  supplies power to the sensing portion  304 . The electrical connection between the power supply  302   b  and the sensing portion  304  is provided by a single contact to the ADC  322 . 
         [0028]    The outputs of the power supplies  302   a,b  are linked via a track  324  formed on a substrate which the image sensor  300  is mounted on. Typically, the track  324  has a low resistance, usually less than 1Ω. Preferably, the track  324  has a resistance of 0.1Ω or less. 
         [0029]    As in the prior art, the voltage drop δV across the sensing portion  304  is determined by the classic relationship: 
         [0000]      δV=IR 
         [0000]    where R is the resistance of the sensing portion, and I is the current passing through the sensing portion. 
         [0030]    However, the location of power supplies  302   a,    302   b  at opposite sides of the sensing portion  304  means that the only half of the voltage drop occurs compared to when a single power supply is used. Also, only half of the current is to be supplied by each power supply  302   a,    302   b  as each power supply  302   a,    302   b  effectively services only half of the sensing portion  204 . This results in a voltage drop sensed at the serial macro  315  of one quarter as compared to when a single power supply is used. The reduced voltage drop is exemplified by line  400  in  FIG. 4 . 
         [0031]    Referring now to  FIG. 5 , a power supply arrangement  500  is substantially similar to the arrangement of  FIG. 3 . Accordingly, similar parts are accorded the same reference numerals in the  500  series. 
         [0032]    The first and second power supplies  502   a,    502   b  are connected to the sensing portion  504  at opposite ends of the respective first and second ADCs  520 ,  522 . This has the effect of further reducing the voltage gradient across the sensing portion  504 . This results in a final lower value of the voltage drop across the sensing portion  504  than the arrangement of  FIG. 3 . 
         [0033]    It will be appreciated that in all the illustrated embodiments the power supplies may operate independently of each other. Each of the power supplies may comprise an independent band gap generator to regulate their respective outputs. 
         [0034]    Referring now to  FIGS. 6 and 7 , an image sensor  600  comprises a lens stack  602 , a sensor array  604 , sealed packaging  606 , a substrate  608  and a high capacitance capacitor  610 . Typically, the substrate  608  is a printed circuit board. 
         [0035]    The lens stack  602 , sensor array  604  and packaging  606  are mounted upon the substrate  608 , with the capacitor  610  being formed within the substrate  608 . The capacitor  610  is formed of an L-shaped conductor  612  and a U-shaped conductor  610  embedded in the substrate  608 . Typically, the substrate  608  will have a high dielectric constant, usually in excess of 4. 
         [0036]    The substrate  608  acts as a dielectric between the conductors  612 ,  614 . Respective free ends  616 ,  618  of the conductors  612 ,  614  form contact terminals  616   a,    618   a  that can be connected to external circuitry  620 . In the illustrated embodiment, the external circuitry  620  comprises an optical device power distribution arrangement as described herein with reference to either  FIG. 3  or  5 . It will be appreciated that the term high capacitance encompasses a capacitance greater than approximately 100 nF. 
         [0037]    While various embodiments of the invention have been described, it will be apparent to those skilled in the art that various modifications, changes, improvements and variations may be made without departing from the scope of the invention.