Publication: Magyar Közlöny
Issue: MK-2009-104 (Year: 2009, Number: 104)
Era: 2004-2010
Section: 
Paragraph Index: 1864

c) not equal to 0 for the first data packet after entering FLOW CONTROL READY state (d1); shall be considered an error (5.2.6.8). 5.2.6.4.4.6 The receipt of a Mode S DATA packet with a valid PS number (i.e. the next PS in sequence) shall cause the lower window PR to be changed to that PS value plus 1. The packet receive sequence number (PR) shall be conveyed to the originating XDLP by a Mode S DATA, RECEIVE READY, RECEIVE NOT READY, or REJECT packet. A valid PR value shall be transmitted by the XDCE to the peer XDCE after the receipt of 8 packets provided that sufficient buffer space exists to store 15 packets. Incrementing the PR and PS fields shall be performed using modulo 16 arithmetic. Note.— The loss of a packet which contains the PR value may cause the ADLP/GDLP operations for that SVC to cease. 5.2.6.4.4.7 A copy of a packet shall be retained until the user data has been successfully transferred. Following successful transfer, the PS value shall be updated. 5.2.6.4.4.8 The PR value for user data shall be updated as soon as the required buffer space for the window (as determined by flow control management) is available within the DCE. 5.2.6.4.4.9 Flow control management shall be provided between the DCE and XDCE. 5.2.6.4.5 INTERRUPT PROCEDURES FOR SWITCHED VIRTUAL CIRCUITS 5.2.6.4.5.1 If user data is to be sent via the Mode S subnetwork without following the flow control procedures, the interrupt procedures shall be used. The interrupt procedure shall have no effect on the normal data packet and flow control procedures. An interrupt packet shall be delivered to the DTE (or the transponder or interrogator interface) at or before the Annex 10 — Aeronautical Communications Volume III 22/11/07 I-5-34 point in the stream of data at which the interrupt was generated. The processing of a Mode S INTERRUPT packet shall occur as soon as it is received by the XDCE. Note.— The use of clear, reset, and restart procedures can cause interrupt data to be lost. 5.2.6.4.5.2 The XDCE shall treat an S-bit sequence of Mode S INTERRUPT packets as a single entity. 5.2.6.4.5.3 Interrupt processing shall have precedence over any other processing for the SVC occurring at the time of the interrupt. 5.2.6.4.5.4 The reception of a Mode S INTERRUPT packet before the previous interrupt of the SVC has been confirmed (by the receipt of a Mode S INTERRUPT CONFIRMATION packet) shall be defined as an error. The error results in a reset (see Table 5-18). 5.2.6.5 RECEIVE READY PROCEDURE 5.2.6.5.1 The Mode S RECEIVE READY packet shall be sent if no Mode S DATA packets (that normally contain the updated PR value) are available for transmittal and it is necessary to transfer the latest PR value. It also shall be sent to terminate a receiver not ready condition. 5.2.6.5.2 Receipt of the Mode S RECEIVE READY packet by the XDCE shall cause the XDCE to update its value of PR for the outgoing SVC. It shall not be taken as a demand for retransmission of packets that have already been transmitted and are still in the window. 5.2.6.5.3 Upon receipt of the Mode S RECEIVE READY packet, the XDCE shall go into the ADLP(GDLP) RECEIVE READY state (g1). 5.2.6.6 RECEIVE NOT READY PROCEDURE 5.2.6.6.1 The Mode S RECEIVE NOT READY packet shall be used to indicate a temporary inability to accept additional DATA packets for the given SVC. The Mode S RNR condition shall be cleared by the receipt of a Mode S RR packet or a Mode S REJECT packet. 5.2.6.6.2 When the XDCE receives a Mode S RECEIVE NOT READY packet from the peer XDCE, it shall update its value of PR for the SVC and stop transmitting Mode S DATA packets on the SVC to the XDLP. The XDCE shall go into the ADLP(GDLP) RECEIVE NOT READY state (g2). 5.2.6.6.3 The XDCE shall transmit a Mode S RECEIVE NOT READY packet to the peer XDCE if it is unable to receive from the peer XDCE any more Mode S DATA packets on the indicated SVC. Under these conditions, the XDCE shall go into the ADCE(GDCE) RECEIVE NOT READY state (f2). 5.2.6.7 RESET PROCEDURE 5.2.6.7.1 When the XDCE receives a Mode S RESET REQUEST packet from either the peer XDCE or the DCE (via the reformatting process) or due to an error condition performs its own reset, the following actions shall be taken:

Source: https://magyarkozlony.hu/hivatalos-lapok/bfd0d67db9f223889f627fd618725b03526630e2/dokumentumok/d5234fd7275da04023366ab8a434989962a31bdf/letoltes