page_title: Athlon
section_title: Athlon Classic (1999)
hierarchical_section_title: Athlon / Generations / Athlon Classic (1999)
context_page_description: Athlon is the brand name applied to a series of x86-compatible microprocessors designed and manufactured by Advanced Micro Devices. The original Athlon was the first seventh-generation x86 processor and was the first desktop processor to reach speeds of one gigahertz. It made its debut as AMD’s high-end processor brand on June 23, 1999. Over the years AMD has used the Athlon name with the 64-bit Athlon 64 architecture, the Athlon II, and Accelerated Processing Unit chips targeting the Socket AM1 desktop SoC architecture, and Socket AM4 Zen microarchitecture. The modern Zen-based Athlon with a Radeon Graphics processor was introduced in 2019 as AMD’s highest-performance entry-level processor.
  Athlon comes from the Ancient Greek ἆθλον meaning " contest", or "prize of a contest", or "place of a contest; arena". With the Athlon name originally used for AMD's mid-range processors with combined CPU/GPU processors with the GPU disabled, AMD currently uses Athlon for budget APUs with integrated graphics. AMD positions the Athlon against its rival, the Intel Pentium.
context_section_description: The AMD Athlon processor launched on June 23, 1999, with general availability by August 1999. Subsequently, from August 1999 until January 2002, this initial K7 processor was the fastest x86 chip in the world. At launch it was, on average, 10% faster than the Pentium III at the same clock for business applications, and 20% faster for gaming workloads. In commercial terms, the Athlon "Classic" was an enormous success.
  Features
  The Athlon Classic is a cartridge-based processor, named Slot A and similar to Intel's cartridge Slot 1 used for Pentium II and Pentium III. It used the same, commonly available, physical 242 pin connector used by Intel Slot 1 processors but rotated by 180 degrees to connect the processor to the motherboard. The cartridge assembly allowed the use of higher speed cache memory modules than could be put on (or reasonably bundled with) motherboards at the time. Similar to the Pentium II and the Katmai-based Pentium III, the Athlon Classic contained 512 KB of L2 cache. This high-speed SRAM cache was run at a divisor of the processor clock and was accessed via its own 64-bit back-side bus, allowing the processor to service both front-side bus requests and cache accesses simultaneously, as compared to pushing everything through the front-side bus.
  The Argon-based Athlon contained 22 million transistors and measured 184 mm². It was fabricated by AMD in a version of their CS44E process, a 0.25 μm complementary metal–oxide–semiconductor (CMOS) process with six levels of aluminium interconnect. "Pluto" and "Orion" Athlons were fabricated in a 0.18 μm process.
  The Athlon's CPU cache consisted of the typical two levels. Athlon was the first x86 processor with a 128 KB split level 1 cache; a 2-way associative cache separated into 2×64 KB for data and instructions (a concept from Harvard architecture). SRAM cache designs at the time were incapable of keeping up with the Athlon's clock scalability, resulting in compromised CPU clock speeds in some computers. With later Athlon models, AMD would integrate the L2 cache onto the processor itself, removing dependence on external cache chips. The Slot-A Athlons were the first multiplier-locked CPUs from AMD, letting users set their own desired clock speed. This was done by AMD in part to hinder CPU remarking and overclocking by resellers, which could result in inconsistent performance. Eventually a product called the "Goldfingers device" was created that could unlock the CPU.
  AMD designed the CPU with more robust x86 instruction decoding capabilities than that of K6, to enhance its ability to keep more data in-flight at once. The critical branch predictor unit was enhanced compared to the K6. Deeper pipelining with more stages allowed higher clock speeds to be attained. Like the AMD K5 and K6, the Athlon dynamically buffered internal micro-instructions at runtime resulting from parallel x86 instruction decoding. The CPU is an out-of-order design, again like previous post-5x86 AMD CPUs. The Athlon utilizes the Alpha 21264's EV6 bus architecture with double data rate (DDR) technology.
  AMD ended its long-time handicap with floating point x87 performance by designing a super-pipelined, out-of-order, triple-issue floating point unit (FPU). Each of its three units could independently calculate an optimal type of instructions with some redundancy, making it possible to operate on more than one floating point instruction at once. This FPU was a huge step forward for AMD, helping compete with Intel's P6 FPU. The 3DNow! floating point SIMD technology, again present, received some revisions and was renamed "Enhanced 3DNow!" Additions included DSP instructions and the extended MMX subset of Intel SSE.
  Specifications
  L1-cache: 64 + 64 KB (data + instructions)
  L2-cache: 512 KB, external chips on CPU module with 50%, 40% or 33% of CPU speed
  MMX, 3DNow!
  Slot A (EV6)
  Front-side bus: 200 MT/s (100 MHz double-pumped)
  VCore: 1.6 V (K7), 1.6–1.8 V (K75)
  First release: June 23, 1999 (K7), November 29, 1999 (K75)
  Clock-rate: 500–700 MHz (K7), 550–1000 MHz (K75)
caption: Athlon architecture
exif: {}