page_title: Motorola 56000
section_title: Technical description
hierarchical_section_title: Motorola 56000 / Technical description
caption_attribution_description: English: Die shot of Motorola DSP56001 digital signal processor (DSP56001RC33, 3E40B mask).
context_page_description: The Motorola DSP56000 is a family of digital signal processor chips produced by Motorola Semiconductor starting in 1986 and is still being produced in more advanced models in the 2010s. The 56k series was quite popular for a time in a number of computers, including the NeXT, Atari Falcon030 and SGI Indigo workstations all using the 56001. Upgraded 56k versions are still used today in audio equipment, radars, communications devices and various other embedded DSP applications. The 56000 was also used as the basis for the updated 96000, which was not commercially successful.
context_section_description: The DSP56000 uses fixed-point arithmetic, with 24-bit program words and 24-bit data words. It includes two 24-bit registers, which can also be referred to as a single 48-bit register. It also includes two 56-bit accumulators, each  with an 8-bit "extension" (aka headroom); otherwise, the accumulators are similar to the other 24/48-bit registers. Being a Modified Harvard architecture processor, the 56k has three memory spaces+buses (and on-chip memory banks in some of the models): a program memory space/bus and two data memory space/bus.
  24 bits were selected as the basic word length because it gave the system a reasonable number range and precision for processing audio (sound), the 56000's main concern. 24 bits correspond to a large 144 dB dynamic range, sufficient in the 1980s when analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) rarely exceeded 20 bits. One example is ADSL applications, where filters typically require 20 bits of accuracy. The leftmost four bits are considered ample headroom for calculations.
  The processor is capable of carrying out 16.5 Million Instructions Per Second (MIPS) at the maximum specified clock speed of 33 MHz., and has hardware support for block-floating point FFT. It uses 5 V TTL levels and consumes approximately 0.4 W.
caption: Die of Motorola DSP56001.
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