page_title: Dual in-line package
section_title: Variants
hierarchical_section_title: Dual in-line package / Construction / Variants
caption_attribution_description: English: An 8080 made by Nippon Electric Corp.
context_page_description: In microelectronics, a dual in-line package, or dual in-line pin package is an electronic component package with a rectangular housing and two parallel rows of electrical connecting pins. The package may be through-hole mounted to a printed circuit board or inserted in a socket. The dual-inline format was invented by Don Forbes, Rex Rice and Bryant Rogers at Fairchild R&D in 1964, when the restricted number of leads available on circular transistor-style packages became a limitation in the use of integrated circuits. Increasingly complex circuits required more signal and power supply leads; eventually microprocessors and similar complex devices required more leads than could be put on a DIP package, leading to development of higher-density chip carriers. Furthermore, square and rectangular packages made it easier to route printed-circuit traces beneath the packages.
  A DIP is usually referred to as a DIPn, where n is the total number of pins. For example, a microcircuit package with two rows of seven vertical leads would be a DIP14. The photograph at the upper right shows three DIP14 ICs. Common packages have as few as three and as many as 64 leads.
context_section_description: Several DIP variants for ICs exist, mostly distinguished by packaging material:
  Ceramic Dual In-line Package (CERDIP or CDIP)
  Plastic Dual In-line Package (PDIP)
  Shrink Plastic Dual In-line Package (SPDIP) – A denser version of the PDIP with a 0.07 in (1.778 mm) lead pitch.
  Skinny Dual In-line Package (SDIP or SPDIP) – Sometimes used to refer to a "narrow" 0.300 in. (or 300 mil) wide DIP, normally when clarification is needed e.g. for DIP with 24 pins or more, which usually come in "wide" 0.600 in wide DIP package. An example of a typical proper full spec for a "narrow" DIP package would be 300 mil body width, 0.1 inches (2.54 mm) pin pitch.
  EPROMs were sold in ceramic DIPs manufactured with a circular window of clear quartz over the chip die to allow the part to be erased by ultraviolet light. Often, the same chips were also sold in less expensive windowless PDIP or CERDIP packages as one-time programmable (OTP) versions. Windowed and windowless packages were also used for microcontrollers, and other devices, containing EPROM memory. Windowed CERDIP-packaged EPROMs were used for the BIOS ROM of many early IBM PC clones with an adhesive label covering the window to prevent inadvertent erasure through exposure to ambient light.
  Molded plastic DIPs are much lower in cost than ceramic packages; one 1979 study showed that a plastic 14 pin DIP cost around US$0.063 and a ceramic package cost US$0.82.
caption: Several PDIPs and CERDIPs. The large CERDIP in the foreground is an NEC 8080AF (Intel 8080-compatible) microprocessor.
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