page_title: Open collector
section_title: POD Pseudo open drain
hierarchical_section_title: Open collector / POD Pseudo open drain
caption_attribution_description: English: Short electronics diagrams with structure, operation when driving high and operation when driving low
context_page_description: An open collector is a common type of output found on many integrated circuits, which behaves like a switch that is either connected to ground or disconnected. Instead of outputting a signal of a specific voltage or current, the output signal is applied to the base of an internal NPN transistor whose collector is externalized on a pin of the IC. The emitter of the transistor is connected internally to the ground pin. If the output device is a MOSFET the output is called open drain and it functions in a similar way. For example, the I²C bus is based on this concept.
context_section_description: The pseudo open drain (POD) drivers have a strong pull-down strength but a weaker pullup strength. A pure open-drain driver, by comparison, has no pullup strength except for leakage current: all the pull-up action is on the external termination resistor. This is why the term "pseudo" has to be used here: there is some pull-up on the driver side when output is at high state, the remaining pull-up strength is provided by parallel-terminating the receiver at the far end to the HIGH voltage, often using a switchable, on-die terminator instead of a separate resistor. The purpose of all this is to reduce the overall power demand compared to using both strong pullup and strong pull-down, as in drivers such as HSTL. DDR4 memory uses POD12 drivers but with the same driver strength (34 Ω/48 Ω) for pull-down (RonPd) and pull-up (RonPu). The term POD in DDR4 referring only for termination type that is only parallel pull-up without the pull-down termination at the far end. The reference point (VREF) for the input is not half-supply as was in DDR3 and may be higher.
  JEDEC standardized the POD15, the POD125, the POD135 and the POD12 for 1.5V, 1.35V and 1.2V interface supply voltages. A comparison of both DDR3 and DDR4 termination schemes in terms of skew, eye aperture and power consumption was published in late 2011.
caption: Pseudo Open Drain usage in DDR interfaces.
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