page_title: Pole splitting
section_title: Selection of CC
hierarchical_section_title: Pole splitting / Example of pole splitting / Selection of CC
caption_attribution_description: Compensation capacitance vs. gain
context_page_description: Pole splitting is a phenomenon exploited in some forms of frequency compensation used in an electronic amplifier. When a capacitor is introduced between the input and output sides of the amplifier with the intention of moving the pole lowest in frequency to lower frequencies, pole splitting causes the pole next in frequency to move to a higher frequency. This pole movement increases the stability of the amplifier and improves its step response at the cost of decreased speed.
context_section_description: What value is a good choice for CC?  For general purpose use, traditional design (often called dominant-pole or single-pole compensation) requires the amplifier gain to drop at 20 dB/decade from the corner frequency down to 0 dB gain, or even lower. With this design the amplifier is stable and has near-optimal step response even as a unity gain voltage buffer. A more aggressive technique is two-pole compensation.
  The way to position f₂ to obtain the design is shown in Figure 3. At the lowest pole f₁, the Bode gain plot breaks slope to fall at 20 dB/decade. The aim is to maintain the 20 dB/decade slope all the way down to zero dB, and taking the ratio of the desired drop in gain (in dB) of 20 log₁₀ Aᵥ to the required change in frequency (on a log frequency scale) of ( log₁₀ f₂  − log₁₀ f₁ ) = log₁₀ ( f₂ / f₁ ) the slope of the segment between f₁ and f₂ is:
  Slope per decade of frequency  
  which is 20 dB/decade provided f₂ = Aᵥ f₁ . If f₂ is not this large, the second break in the Bode plot that occurs at the second pole interrupts the plot before the gain drops to 0 dB with consequent lower stability and degraded step response.
  Figure 3 shows that to obtain the correct gain dependence on frequency, the second pole is at least a factor Aᵥ higher in frequency than the first pole. The gain is reduced a bit by the voltage dividers at the input and output of the amplifier, so with corrections to Aᵥ for the voltage dividers at input and output the pole-ratio condition for good step response becomes:
  Using the approximations for the time constants developed above,
  or
     
  which provides a quadratic equation to determine an appropriate value for CC. Figure 4 shows an example using this equation. At low values of gain this example amplifier satisfies the pole-ratio condition without compensation (that is, in Figure 4 the compensation capacitor CC is small at low gain), but as gain increases, a compensation capacitance rapidly becomes necessary (that is, in Figure 4 the compensation capacitor CC increases rapidly with gain) because the necessary pole ratio increases with gain. For still larger gain, the necessary CC drops with increasing gain because the Miller amplification of CC, which increases with gain (see the Miller equation ),  allows a smaller value for CC.
  To provide more safety margin for design uncertainties, often Aᵥ is increased to two or three times Aᵥ on the right side of this equation. See Sansen or Huijsing and article on step response.
caption: Figure 4:  Miller capacitance at low frequencies CM (top) and compensation capacitor CC (bottom) as a function of gain using Excel. Capacitance units are pF.
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