page_title: Integrated injection logic
section_title: Operation
hierarchical_section_title: Integrated injection logic / Operation
caption_attribution_description: Integrated injection logic
context_page_description: Integrated injection logic is a class of digital circuits built with multiple collector bipolar junction transistors. When introduced it had speed comparable to TTL yet was almost as low power as CMOS, making it ideal for use in VLSI integrated circuits. The gates can be made smaller with this logic family than with CMOS because complementary transistors are not needed. Although the logic voltage levels are very close, I2L has high noise immunity because it operates by current instead of voltage. I2L was developed in 1971 by Siegfried K. Wiedmann and Horst H. Berger who originally called it merged-transistor logic.
  A disadvantage of this logic family is that the gates draw power when not switching unlike with CMOS.
context_section_description: The heart of an I2L circuit is the common emitter open collector inverter.  Typically, an inverter consists of an NPN transistor with the emitter connected to ground and the base biased with a forward current from the current source.  The input is supplied to the base as either a current sink (low logic level) or as a high-z floating condition (high logic level).  The output of an inverter is at the collector.  Likewise, it is either a current sink (low logic level) or a high-z floating condition (high logic level).
  Like direct-coupled transistor logic, there is no resistor between the output (collector) of one NPN transistor and the input (base) of the following transistor.
  To understand how the inverter operates, it is necessary to understand the current flow.  If the bias current is shunted to ground (low logic level), the transistor turns off and the collector floats (high logic level).  If the bias current is not shunted to ground because the input is high-z (high logic level), the bias current flows through the transistor to the emitter, switching on the transistor, and allowing the collector to sink current (low logic level).  Because the output of the inverter can sink current but cannot source current, it is safe to connect the outputs of multiple inverters together to form a wired AND gate.  When the outputs of two inverters are wired together, the result is a two-input NOR gate because the configuration (NOT A) AND (NOT B) is equivalent to NOT (A OR B) (per De Morgan's Theorem).
  Due to internal parasitic capacitance in transistors, higher currents sourced into the base of the inverter transistor result in faster switching speeds, and since the voltage difference between high and low logic levels is smaller for I2L than other bipolar logic families (around 0.5 volts instead of around 3.3 or 5 volts), losses due to charging and discharging parasitic capacitances are minimized.
caption: IIL circuit
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