Document:

<PAGE>   1
                                                                   EXHIBIT 10.17

*CERTAIN INFORMATION WITHIN THIS EXHIBIT HAS BEEN OMITTED AND THE NON-PUBLIC
INFORMATION HAS BEEN FILED SEPARATELY WITH THE SEC. CONFIDENTIAL TREATMENT HAS
BEEN REQUESTED WITH RESPECT TO THE OMITTED PORTIONS.

                           MEMORANDUM OF UNDERSTANDING
                                       FOR
                  CUSTOM TOUCH(TM) 1T-SRAM(TM) MEMORY COMPILER
                    FOR TSMC 0.18um & 0.15um LOGIC PROCESSES

This Memorandum of Understanding (the "MOU") is entered into and effective as of
the date of the last signature below ("Effective Date") by and between Taiwan
Semiconductor Manufacturing Co., Ltd., a company duly incorporated under the
laws of the Republic of China ("ROC"), having its principal place of business at
No. 121, Park Avenue 3, Science Based Industrial Park, Hsin-Chu, Taiwan, ROC
("TSMC"), Monolithic System Technology Incorporated, a company duly incorporated
under the laws of the State of California, USA, having its principal place of
business at 1020 Stewart Drive, Sunnyvale, CA 94086 USA ("MoSys"), and Virage
Logic Corporation, a company duly incorporated under the laws of the State of
California, USA, having its principal place of business at 46501 Landing
Parkway, Fremont, CA 94538 USA ("Virage").

PURPOSE

This MOU is to set forth parameters for an agreement for MoSys and Virage to
develop a Custom Touch(TM) 1T-SRAM(TM) memory compiler (the "Compiler") for
TSMC's 0.18um and 0.15um standard logic semiconductor processes to be jointly
marketed by all parties and sold to TSMC customers by MoSys and Virage.

TERM

This MOU is in place only as long as it takes the three parties to establish a
definitive agreement ("Definitive Agreement") covering the terms and conditions
of establishing and licensing the Compiler, but in no event longer that one (1)
year. TSMC may and licensing the Compiler, but in no event longer than one (1)
year. TSMC may terminate this MOU at any time in the event there is a
technological reason why the Compiler does not provide the functionality agree
to in the Compiler Statement of Work ("SOW") as defined herein.

Following the signature of this MOU, all parties shall use good faith and
reasonable efforts to conclude a definitive agreement within sixty (60) days of
the signature of this MOU.

CONSIDERATION

TSMC shall share the cost of the development of the Compiler with MoSys and
Virage in consideration for developing the Compiler for TSMC's 0.18um process
prior to any one else which would provide an advantage to TSMC and its customers
in the access to the

<PAGE>   2
Compiler. TSMC agree to pay ***, excluding any taxes and withholdings, for the
Development and the Compiler to MoSys and Virage jointly.

TSMC and MoSys shall amend the agreement executed between them dated March 31,
1999 to incorporate wafer-based running royalties for the compiled instances. It
is the intent of TSMC and MoSys to amend their agreement prior to the execution
of the Definitive Agreement.

TSMC and Virage agree that the Compiler and the resulting instances shall be
considered as "0.18um Licensed Products" and thus covered under TSMC's
Pay-for-Performance program as detailed in the Development and Licensing
Agreement executed between them on March 3, 1999.

In consideration for the cost sharing amount paid by TSMC, MoSys and Virage
agree to provide the Compiler for the 0.15um process to TSMC before any other
foundry customer so long as TSMC has provided the said process in a timely
manner. Such development shall be free of charge to TSMC from either MoSys or
Virage provided that at least five (5). TSMC 0.18um customers purchase the
Compiler from either MoSys and/or Virage for use in their chip development. TSMC
understands that the free of charge development of the Compiler for the 0.15 um
process does not necessarily mean no charge for future cost sharing of future
process generations.

PRODUCT

MoSys and Virage shall jointly develop the Compiler initially for TSMC's 0.18um
standard process that is not low voltage. The Compiler shall be developed in
accordance with the SOW which shall be agreed to by all parties, and shall be
updated from time to time by mutual agreement of all parties.

MoSys and Virage shall engineer the Compiler such that instances generated
include BIST, redundancy and fuse programming to ensure high yield and density.
MoSys and Virage shall provide the plans for all DFT planned such as BIST and
diagnostics.

The schedule for the Compiler development project shall be in accordance with
the SOW. The current date for the start of the development is intended to be two
weeks after receipt of cost sharing purchase order from TSMC. TSMC shall issue
the cost sharing purchase order to Virage in a timely manner from the date of
full execution of this MOU. The front-end view and GDS availability dates are to
be determined during the schedule development.

JOINT MARKET ACTIVITIES

TSMC, MoSys and Virage agree to perform joint marketing activities to promote
the relationship and the Compiler established by this MOU. Each entity shall be
financially responsible for its own marketing activities and such activities
must be pre-approved by

                                      -2-
<PAGE>   3
the other two entities prior to launching such activities. The activities shall
include, but not be limited to, the following:

      a)    A joint press release that announces the established partnership and
            planned Compiler, published after signature of this MOU by all
            parties and the issuance of a purchase order for the cost sharing
            amount by TSMC to MoSys and/or Virage;

      b)    Joint sales activities with TSMC by MoSys and Virage, to determine
            customers for the Compiler;

      c)    Quarterly technology reviews to inform all parties of subsequent
            technology developments that could lead to the modification of the
            product established under this agreement, or to additional products
            developed by and/or for the parties; and

      d)    Advertisement of the Compiler in the list of off-the-shelf
            components by both MoSys and Virage, including published datasheets
            to be used by both companies in the selling of the Compiler.

IN WITNESS WHEREOF, the parties hereto have caused this Agreement to be duly
executed in triplicate on their behalf by their duly authorized offers and
representatives on the date first given above.

TAIWAN SEMICONDUCTOR MANUFACTURING
CO., LTD.
       /s/ MIKE PAWLIK
-----------------------------------
Mike Pawlik
Vice President, Corporate Marketing

MOSYS INCORPORATED                       VIRAGE LOGIC
CORPORATION

         /s/ FU-CHIEH HSU                         /s/ ADAM KABLANIAN
-----------------------------------      ---------------------------------------
Fu-Chieh Hsu                             Adam Kablanian
Chairman, President & CEO                President & CEO

                                      -3-
<PAGE>   4
                                 SOW#101999DSI_1

                                  REVISION 1.0

                                OCTOBER 19, 1999

INTRODUCTION

Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC) is contracting with
Virage Logic Corporation (Virage) and MoSys, Inc. (MoSys) to construct a Custom
Touch(TM) 1T-SRAM(TM) Memory Compiler (1T Compiler) based on MoSys' 1T-SRAM(TM)
technology for TSMC's 0.18um standard process, under the business terms
delineated in the document, "Memorandum of Understanding For Custom Touch(TM)
1T-SRAM(TM) Memory Compiler for TSMC 0.18u and 0.15um Logic Processes." The
compilers to be constructed under this program are described in the Virage/MoSys
deliverables section, and are specified in the specification to be determined
and agreed upon by all parties. The work to be accomplished and schedule for
that work is delineated in the Microsoft Project document that shall be
submitted to TSMC by Virage and MoSys in a timely manner but no later than
thirty (30) days from the date of payment made by TSMC to Virage.

TSMC Deliverables

1.    Approval of the Virage Logic/MoSys Custom Touch(TM) 1T-SRAM(TM) Memory
      Compiler Specification, #MCPR-119, dated 9/28/99.

2.    TSMC 0.18um process information to enable circuit simulation and GDS
      layout.

3.    TSMC personnel shall be available to answer technical questions pertaining
      to the process technology by phone, fax, Email or in person.

Customer EDA Tool Flow

The following table describes TSMC's customer tool flow and EDA support
requirements for the purposes of deliverables under this SOW.

<TABLE>
<CAPTION>
  TOOL TYPE                     TOOL NAME                   TOOL VENDOR
-------------                ----------------             ---------------
<S>                          <C>                          <C>
Simulation                       ModelSim                 Mentor Graphics
Simulation                      Verilog-XL                    Cadence
Synthesis                    Design Compiler                 Synopsys
Place & Route                     Apollo                      Avant!
Place & Route                Silicon Ensemble                 Cadence
</TABLE>

<PAGE>   5
Additional EDA views that are needed are to be developed in accordance with the
definitive contract signed between TSMC, MoSys and Virage for the 1T-SRAM
Program.

Virage/MoSys Deliverables

1.      Project Schedule and design reviews as required

2.      EDA Views to support the tool flow to include:

        a)     Verilog with SDF support

        b)     VHDL (VITAL) with SDF support

        c)     Test benches in Verilog and/or VHDL

        d)     Timing models in Synopsys .lib format

        e)     Structural netlists in Verilog and Spice

3.      Physical and logical LEF

4.      GDSII

5.      Custom Touch(TM) 1T-SRAM(TM) Memory Compiler as described in the
        specification #MCPR-119 attached in Appendix B.

REFERENCE DOCUMENTS

The following documents or the relevant information contained therein are the
entire reference basis for construction of the 1T compiler.

1.      TSMC 0.18um Process Design Rules, Version TBD, Document #TBD, TSMC, Ltd.

2.      Virage Logic/MoSys Custom Touch(TM) 1T-SRAM(TM) Memory Specification,
        Spec #MCPR-119, Virage Logic/MoSys, November 1, 1999.

3.      Memorandum of Understanding For Custom Touch(TM) 1T SRAM(TM) Memory
        Compiler for TSMC 0.18u & 0.15um Logic Processes, Version TBD, Document
        TBD, TSMC, Ltd.

4.      Spice Model Version: Type: TBD, version TBD, 0.18um process.

WARRANTY

All Virage instances and compilers come with a 90-day warranty against defects.
To support changes in the process, we offer a foundry Maintenance option,
available for 20% of the list price of the compilers for 1 year of Maintenance.
Included is:

1.      Extended warranty (1 year) for the Maintenance period.

2.      1 change in the design due to design rule changes.

3.      Up to 3 recharacterizations due to changes in spice models or process
        data.

4.      Updated or new EDA models/views, as available.

                                      -2-
<PAGE>   6
Pricing

Attachment A describes the pricing and payment schedule.

Delivery Schedule

The following memory compiler schedule is subject to a start date of 15 calendar
days after receipt of order.

ITEM #1 - Custom Touch(TM) 1T-SRAM(TM) Memory Compiler based on MoSys'
1T-SRAM(TM) technology for TSMC's 0.18um standard process as specified in Spec
#MCPR-119.

<TABLE>
<CAPTION>
Milestone Date                                 Deliverable
--------------                                 -----------
<S>                                            <C>
Milestone #0 - Project Start                   Final SOW
Milestone #1 - Start + 10 weeks                Delivery of front end models
Milestone #2 - Start + 20 weeks                Delivery of abstracts
Milestone #3 - Start + 24 weeks                Delivery of final compiler with GDS
</TABLE>

Virage Logic will conduct its customary quality assurance (QA) simulation and
testing.

Change Orders to SOW

Any party may request changes to any part of a previously agreed upon design
effort during the course of this SOW. Upon receipt of written request, the
receiving party shall promptly inform the other parties the acceptability,
effect and impact, if any, of the requested changes which shall include but is
not limited to, any change in price or scheduled completion dates. It is
understood that all work will continue as previously agreed and without regard
to the requested change until all parties have agreed in writing and have
amended the terms of this SOW accordingly.

                                      -3-
<PAGE>   7
        1.      In the event that TSMC needs to update the specification of this
                SOW, TSMC, MoSys and Virage Logic shall work together to plan
                for the change in specification. TSMC shall have the option to
                approve any increase in cost beforehand.

        2.      Addition/deletion to the SOW requires formal notification of all
                parties with costs and schedule impact documented if possible.

        3.      Any changes to the original SOW requires a minimum of 2 weeks'
                notice before the change can be initiated.

        4.      Any changes to the SOW will require re-confirmation of the
                MoSys/Virage Logic deliverables schedule as well as the contents
                of the deliverables.

        5.      Charge Order - Change orders are modifications required by TSMC
                as a result of modifications to the original specification.
                Written change orders will be acknowledged within one working
                day upon receipt in writing or by email. MoSys/Virage Logic will
                submit an initial estimate for the cost to complete the change
                and any Schedule changes within 5 working days. MoSys/Virage
                will also have the option to update the estimate within 15
                working days of receipt of change order if any additional
                discoveries are made that materially impact cost or schedule.

Please refer to the SOW number in all communications and purchase orders, as
applicable.

APPROVALS

The above statement of work and its attachments are understood and approved.

/s/ MIKE PAWLIK                  /s/ ADAM KABLANIAN            /s/ FU-CHIEN HSU
---------------------------      --------------------------    -----------------
TSMC, Ltd.                       Virage Logic Corporation      MoSys, Inc.

Mike Pawlik                      Adam Kablanian                Fu-Chien Hsu
---------------------------      --------------------------    -----------------
Name                             Name                          Name

VP, Corp. Marketing              President & CEO               President
---------------------------      --------------------------    -----------------
Title                            Title                         Title

                                      -4-
<PAGE>   8
                             Attachment A - Pricing

PRICE

TSMC shall pay *** to Virage Logic for the work specific in the MOU and
the SOW. Virage and MoSys agrees that such amount shall be shared equally
between Virage and MoSys.

Please refer to Quote dated October 19, 1999 previously submitted for accurate
pricing and terms information. The final quote will be attached to this section
for completeness, once an order for the subject compilers is received by Virage
Logic.

PAYMENT SCHEDULE

The payment schedule is milestone based, with percentages due based on the work
completed for that milestone. The milestone numbering is consistent with the
product deliveries.

Milestone #0 - Project Start, Delivery of Final SOW - 30% of total order amount

Milestone #1 - Delivery of front end models - 25% of total order amount

Milestone #2 - Delivery of abstracts - 20% of total order amount

Milestone #3 - Final compiler version delivery - 25% of total order amount

PAYMENT TERMS

Payment terms are net 30.<PAGE>   1
                                                                   EXHIBIT 10.18

                       NETLOGIC/VIRAGE LOGIC MEMORANDUM OF
                        UNDERSTANDING FOR CAM COMPILERS

PURPOSE

        To establish a proposed relationship between NetLogic Microsystems, Inc.
(NetLogic) and Virage Logic Corporation (Virage) to develop and market memory
Compilers that utilize NetLogic CAM technology in order to speed proliferation
of the NetLogic CAM technology and Virage memory compiler technology. It is the
intent of the parties to use this Memorandum of Understanding (MOU) to agree on
a basic framework for the proposed relationship.

        It is further the intent of the parties that revenue generated based on
the Compilers will come from customers of Virage or NetLogic. The parties do not
intend to receive revenue from each other except for specific circumstances
indicated below.

        Following the signature of this MOU, both NetLogic and Virage agree to
use their best efforts to conclude a Formal Contract within 60 days of the
signature of this MOU. Until such time as the Formal Contract is signed, none of
the terms of this MOU are binding on either party.

TERM

        This MOU is effective when signed by both parties (Effective Date) and
expires when the parties enter into the Formal Contract or one year after the
Effective Date.

DEFINITIONS

        A. "Embedded CAM Technology" shall mean (i) all NetLogic architecture,
circuitry, design, database information, and layout information including
documents, data, inventions (whether patentable or patented), and other
intellectual property rights related to CAMs in existence prior to, or developed
by NetLogic during, the term of this Agreement, and incorporated into the
Embedded Product, and (ii) corresponding Embedded Product-related technical
information, documents, data, inventions (whether patentable or patented), and
other intellectual property rights in existence as of the Effective Date or
developed by NetLogic during the term of this Agreement, which are necessary for
the utilization in integrated circuits of the technology described in (i).

        B. "Subsidiary(ies)" of a party shall mean a corporation or other entity
of which such party directly or indirectly owns or controls more than fifty
percent (50%) of the voting stock. Corporations or other entities shall be
considered Subsidiaries only as long as such ownership or control exists. For
the purposes of this MOU, subsidiaries shall always exclude any of the
competitors of either party identified in Attachment A.

<PAGE>   2
        C. "Third Party" shall mean any party other than NetLogic, Virage,
NetLogic Subsidiaries, and Virage Subsidiaries.

        D. "Compiler" shall mean a software tool used by Virage, NetLogic or
customers to develop a Virtual Component or an Embedded Product for the customer
and consists of: (i) object code versions of a set of executable software
program(s), (ii) libraries containing design elements of memory cell arrays and
control logic, and (iii) all related documentation.

        E. "Virtual Component" shall mean a component based on or incorporating
NetLogic's Embedded CAM Technology and generated for a customer using the
jointly developed Compiler, and for use by NetLogic's and/or Virage's customers
who have established a license agreement with NetLogic to use NetLogic's
Embedded CAM Technology.

        F. "Instance" shall mean an output file of a specific "Virtual
Component" generated from the CAM Compiler and provided by Virage to a Third
Party Licensee according to the Third Party Licensee's specific requirement on a
per-design basis.

        G. "Embedded Product" shall mean the semiconductor product that
incorporates the Virtual Component, and modifications thereof as agreed to by
NetLogic and a Third Party Licensee. The Embedded Product shall include the end
product of a Third Party Licensee including System Integrated Circuits (ICs),
including but not limited to a microprocessor, microcontroller, DSP product, or
system-on-a-chip (SOC) products, and Application Specific Integrated Circuits
(ASICs). The Embedded Product shall exclude all products designed as stand-alone
CAM products, including those designed to JEDEC-standard pin-out for stand-alone
CAM products. The Embedded Product shall also exclude all products that compete
with NetLogic products and Virage products existing or under development during
the term of this MOU and the Formal Contract.

        H. "Third Party Licensee" shall mean a Third Party that has a written
license agreement with NetLogic to use the Virtual Component in an Embedded
Product provided by the Third Party.

        I. "Licensed Foundry" shall mean a foundry that has established a
license with NetLogic to manufacture the Virtual Component in a particular
process for an Embedded Product provided by a Third Party.

        J. "CAM Compiler" shall mean a Compiler as defined in D. above that
incorporates the NetLogic Embedded CAM Technology as defined in A. above as the
base memory technology to generate Instances for use in Embedded Products.

PRODUCT

        NetLogic and Virage shall develop a binary and/or ternary CAM Compiler
based on NetLogic's CAM technology for a Licensed Foundry and process.

        If a customer for the CAM Compiler has already been identified, the
high-level functional

            NetLogic/Virage Logic Memorandum of Understanding Page 2

<PAGE>   3
description of the CAM Compiler (the "Specification') shall be mutually
developed by NetLogic, Virage and the customer. If a customer for the CAM
Compiler has not already been identified, then the Specification of the CAM
Compiler shall be mutually developed and mutually agreed to by NetLogic and
Virage before the start of the project. The schedule for the CAM Compiler
Specification shall be developed jointly by NetLogic and Virage.

        NetLogic and Virage agree to use their best efforts to engineer the CAM
Compiler such that Virtual Components generated therefrom include BIST,
redundancy and/or fuse programming to increase yield and density. Virage shall
provide the plans for all DFT planned including but not limited to BIST and
diagnostics. Virage and NetLogic agree to work together to determine the amount
and type of DFT to be included in the CAM Compiler. NetLogic and Virage agree to
determine, before start of the project, whether to optimize the CAM Compiler to
one or mom of the following particular parameters: low power, speed, area or
density.

        The date for the start of development of the first CAM Compiler is to be
determined and shall be after the parties obtain a first customer for the first
CAM Compiler. Additional CAM Compilers for additional foundries and/or processes
may be developed under the terms of the Formal Contract as required to meet
customer demand.

        CUSTOMERS

        Potential customers of NetLogic and Virage can be characterized as (1)
Customer Owned Tooling (COT) customers, and (2) semiconductor Integrated Device
Manufacturers (IDMs). A customer requires a CAM Instance for a specific Embedded
Product or a CAM Compiler for generating multiple Instances for corresponding
Embedded Products.

        COT CUSTOMERS

        The COT customer is the fabless IC or Systems Company that directly
contracts with a Licensed Foundry to have the Embedded Product fabricated. It is
anticipated that the COT customer will purchase the Instance for a specific
Virtual Component, or the CAM Compiler to generate Virtual Components, for its
Embedded Products that will be manufactured at a specific Licensed Foundry.
Although a relationship with Licensed Foundries will be important in order to
initially develop CAM Compilers for their processes and to market the results to
their customers, the parties shall not sell the CAM Compilers to the Licensed
foundries themselves.

        IDM CUSTOMERS

        The IDM customer is a vertically integrated semiconductor or systems
company that owns or operates their own wafer fabrication facility. It is
anticipated that the IDM customer will purchase the CAM Compiler to generate
Virtual Components for its Embedded Products that will be manufactured at its
own facility.

        BUSINESS

            NetLogic/Virage Logic Memorandum of Understanding Page 3

<PAGE>   4
        NetLogic shall grant Virage a royalty-free, non-transferable,
non-exclusive license, for the duration of the MOU and Formal Contract, to use
NetLogic's Embedded CAM Technology only in connection with development and sale
of the CAM Compilers or Instances generated pursuant to the Formal Contract.

        If any customer wishes to add their own proprietary technology to
NetLogic's Embedded CAM Technology, Virage may build products subject to
approval from NetLogic and agreement on suitable licensing fees to NetLogic from
the customer or Virage. Ownership of the resultant product shall be determined
on a case-by-case basis between NetLogic, Virage and the customer.

        If any customer decides not to use NetLogic's Embedded CAM Technology,
Virage is free to build custom CAM components and compilers utilizing other CAM
technologies for the customer's internal and other use provided that the custom
CAM components and compilers are not offered for general commercial sale by
Virage, and do not use, and are not based on, any proprietary or confidential
NetLogic information (including know-how) disclosed to, or learned by, Virage
prior to, during, or subsequent to this agreement. Virage agrees to notify
NetLogic of their intent to enter into such an agreement. Virage also agrees to
provide NetLogic with a high level product description of the custom CAM
component. Under these circumstances, Virage and NetLogic agree to discuss the
product description and compiler to determine the best means for protecting each
parity's intellectual property and business interests.

        Similarly, if a customer decides that they would like to use NetLogic's
Embedded CAM Technology, but would like to use its own or other compiler
technology to develop a Compiler or Instance, then NetLogic is free to provide
NetLogic's Embedded CAM Technology to the customer for the development of the
compiler for the customer's internal and other use provided that the resultant
compiler is not offered for general commercial sale by NetLogic, and does not
use, and is not based on, any proprietary or confidential Virage information
(including know-how) disclosed to, or learned by, NetLogic prior to, during, or
subsequent to this agreement. NetLogic agrees to notify Virage of their intent
to enter into such an agreement. NetLogic also agrees to provide Virage with a
high level product description of the custom Compiler or Instance. Under these
circumstances, Virage and NetLogic agree to discuss the product description and
compiler to determine the best means for protecting each party's intellectual
property and business interests.

        The parties agree to determine, on a case-by-case basis, the
compensation and payment terms of such compensation to be provided to Virage by
NetLogic for NetLogic's own use of the developed CAM Compiler incorporating
Virage's Compiler Technology and NetLogic Embedded CAM Technology to develop a
NetLogic's stand-alone integrated circuit device.

        NetLogic agrees to use its best efforts to license the use of its
Virtual Component to Third Parties, including those referred to NetLogic by
Virage, under reasonable terms and conditions that are demonstrably free of any
unfair discrimination. NetLogic reserves the right, however, to determine, in
its sole discretion whether to license the use of NetLogic's

            NetLogic/Virage Logic Memorandum of Understanding Page 4

<PAGE>   5
Embedded CAM Technology to any IDM customer. NetLogic also reserves the right to
not license the use of NetLogic's Embedded CAM Technology to IDM customers if
the IDM customers do not agree to include a grant back clause to NetLogic in the
license agreement for rights to future inventions developed by the IDM customer.

        For COT customers, Virage and NetLogic agree to continue discussions
during the next sixty (60) days, and to formalize in the Formal Contract, a
framework in which COT customers obtain rights to make, use, sell, or offer to
sell NetLogic's Embedded CAM Technology as part of the CAM compiler.

        PRICING AND ALLOCATION OF SALES REVENUE

        The parties agree that the overall pricing to the customer shall be
determined by a fair market value and shall be based on value to the customer. A
Pricing Model shall be established in the Formal Contract and shall be based on
the following five components:

        (1)     a Non-Recurring Engineering (NRE) fee based on the amount of
                time and/or resources expended by the respective parties to
                develop a subject compiler for the respective foundry and/or
                process;

        (2)     a compiler or instance license fee based on the core values of
                the respective intellectual properties, that can be in the form,
                for example, of an initial license fee, royalties based on the
                selling price of the wafers or Embedded Product, or both;

        (3)     a technology license fee paid by the CAM technology licensee
                based on the core value of NetLogic's CAM intellectual property,
                that can either be in the form, for example, of an initial
                license fee, royalties based on the selling price of the wafer
                or Embedded Product, or both;

        (4)     royalties based on a percentage of the Average Selling Price
                (ASP) of the Embedded Product paid by COT foundry as part of a
                library royalty program; and

        (5)     a maintenance fee for the Instance or the Compiler.

        The overall sales revenue collected by the parties shall be allocated
between the parties based on the amount of contributions from each party, fair
sharing and compatibility with each party's license business model. Allocation
of sales revenue between the parties shall reflect the five components discussed
above and shall be further defined in the Formal Contract. The Formal Contract
shall also address the method for collecting sales tax and allocating tax
liability between the parties.

        INSTANCES

        For any potential CAM Instance customer (whether COT or IDM), the
parties anticipate that Virage will take the lead position in determining the
customer's needs and obtaining the order from the customer. In some situations,
however, NetLogic may make the initial customer contact, determine the
customer's needs and obtain the order from the customer.

        The CAM Instance generated for the customer is to be targeted for a
specific process of a Licensed Foundry for a COT customer or a specific process
for an IDM customer. For the

            NetLogic/Virage Logic Memorandum of Understanding Page 5

<PAGE>   6
sale of a CAM Instance, Virage will generate the Instance and provide necessary
customer support to incorporate the Instance (as a Virtual Component) into the
customer's Embedded Product, with the assistance from NetLogic if needed. Under
this assumption, Virage shall receive and retain substantially the entire NRE
fee and/or the instance license from its sale or licensing agreement with the
customer.

        If NetLogic provides support for generation of an Instance, then
NetLogic and Virage agree to split the NRE fee and/or the instance license based
on the amount of time and/or resources expended by the respective parties in
accordance with the method established in the Formal Contract. Before the
parties begin any CAM Compiler development where Net Logic provides support for
the generation of Instances, the parties shall agree upon the resources to be
expended by each.

        Virage shall provide the customer maintenance services if needed and
retain the entire maintenance fee. NetLogic shall independently establish a
technology license relationship with the customer for use of NetLogic's Embedded
CAM Technology in each Instance. NetLogic shall receive and retain all
compensation, including a license fee and a royalty, from its separate licensing
arrangement with the Customer consistent with its established license business
model.

        COMPILERS

        Any potential CAM Compiler customer may be approached by either company
to determine the need of the customer and determine what course of action is to
be taken to meet or exceed the customer's needs. The CAM Compiler can be
developed and characterized for the customer's specific process or a Licensed
Foundry's process specified by the customer.

        NetLogic and Virage agree that Virage will assume the leadership role
and provide substantially all of the support to the customer to develop the CAM
Compiler. Under this assumption, Virage shall receive and retain substantially
the entire NRE fee and/or the compiler license for development of the CAM
Compiler. If NetLogic provides support to develop the CAM Compiler, then
NetLogic and Virage agree to split the NRE fee and/or the compiler license fee
based on the amount of time and/or resources expended by the respective parties
in accordance with the method established in the Formal Contract. Before the
parties begin any CAM Compiler development where Net Logic provides support for
the development of the CAM Compiler, the parties shall agree upon the resources
to be expended by each.

        Virage may also charge the customer a maintenance fee. The parties
anticipate that Virage will provide most of the maintenance services for the
Compiler and shall retain the entire maintenance fee. If, however, NetLogic
provides maintenance services for the Compiler, then Virage and NetLogic shall
split the maintenance fee based on the amount of time and/or resources expended
by the respective parties in accordance with the method established in the
Formal Contact. NetLogic shall independently establish a technology license
relationship with the customer for use of NetLogic's Embedded CAM Technology in
each Compiler. NetLogic shall receive and retain all compensation, including a
license fee.

            NetLogic/Virage Logic Memorandum of Understanding Page 6

<PAGE>   7
and a royalty, from its separate licensing arrangement with the Customer
consistent with its established license business model.

      INTELLECTUAL PROPERTY AND CONFIDENTIAL INFORMATION

      Neither NetLogic nor Virage may use each other's technology for any
purpose other than that identified in this agreement. In all cases, the
confidentiality of NetLogic and Virage technology must be protected. Both
parties agree to execute a mutual non-disclosure agreement, which shall become
a part of this agreement and the Formal Contract.

      Additionally, Virage and NetLogic agree to cross-license each other's
relevant technology and patents required for the development, sale, and use of
the developed CAM Compiler. Also, NetLogic and Virage agree not to develop
other compilers that compete against the CAM Compiler developed under this
agreement. NetLogic and Virage also agree not to engage or sell products to the
other companies' competitors. Each company is to provide a list of competitors,
and that list is to be attached to this document as Attachment A. Attachment A
may be updated from time-to-time by either party and shall be incorporated into
the Formal Contract.

      NetLogic and Virage anticipate that there will be intellectual property
developed by the parties during the course of development of the CAM Compiler
under this agreement and the subsequent Formal Contract. The parties agree that
the ownership of any intellectual property developed during the course of the
development of the CAM Compiler shall be as follows:

      a)    Any intellectual property developed independently by either party
            which is not based on the other party's intellectual property shall
            be the sole and exclusive property of the developing party and the
            non-developing party shall not acquire any ownership interest in it.
            However, the developing party shall grant the non-developing party a
            non-transferable, non-exclusive, royalty-free license to use the
            intellectual property only in connection with the products developed
            pursuant to this agreement or the subsequent Formal Contract. All
            other license grants shall be at the sole discretion of the
            developing party.

      b)    Any intellectual property developed independently by either party
            which is based on the other party's intellectual property shall be
            the sole and exclusive property of the developing party and the
            non-developing party shall not acquire any ownership interest in
            it. However, the developing party shall grant the non-developing
            party a perpetual non-transferable, non-exclusive, royalty-free
            license to use the intellectual property to develop products or
            services provided by the non-developing party, and to make or sell
            products that incorporate the intellectual property.

      c)    Any intellectual property jointly developed by both parties shall
            be jointly owned by both parties. Neither party shall license,
            assign, or transfer or grant any rights in or to the jointly
            developed intellectual property to any Third Party without the
            prior written consent of the other party. Each party agrees that it
            will not unreasonably withhold such consent. The parties shall
            define in the Formal Contract the method of allocation between the
            parties of any revenue derived from the jointly developed
            intellectual property.

                  NETLOGIC/VIRAGE MEMORANDUM OF UNDERSTANDING             PAGE 7
<PAGE>   8
        NetLogic and Virage agree to cooperate in joint selling activities to
locate an initial source of NRE fees to help fund development of the CAM
Compiler. NetLogic and Virage agree to cooperate on development of a
verification vehicle for the Virtual Component, and a silicon validation report
with the first customer and Licensed Foundry. NetLogic and Virage agree that
Virage shall assume the leadership role in developing the CAM Compiler with the
Licensed Foundry, and that NetLogic shall provide specific product support for
the Virtual Component on an as needed basis. If possible, the first CAM Compiler
will be developed with common design rules to allow foundry reuse. NetLogic and
Virage shall migrate the developed CAM Compiler to additional foundries based on
customer demand.

        MARKETING

        NetLogic and Virage agree to perform joint marketing activities to
promote the relationship established by this Agreement. The activities shall
include, but not be limited to, the following:

        a)      A joint press release that the parties are working together to
                develop a CAM Compiler the includes NetLogic's Embedded CAM
                Technology, the joint press release to be published after
                signature of this MOU and approval of the joint press release by
                both parties,

        b)      Joint sales activities to establish the first customer, that
                will fund the NRE of the first Compiler, and also subsequent
                customers to proliferate the CAM Compiler products,

        c)      A jointly authored white paper discussing the NetLogic's CAM
                technology and the Virage Compiler technology, and the
                advantages of both in one product,

        d)      Quarterly technology reviews to inform each party of subsequent
                technology developments that could lead to the modification of
                the product established under this agreement, or to additional
                products jointly developed by the parties,

        e)      Advertisement of the Compiler in the list of off-the-shelf
                components by both NetLogic and Virage, including published
                datasheets to be used by both companies in the selling of the
                Compiler.

NETLOGIC MICROSYSTEMS, INC.                   VIRAGE LOGIC CORPORATION

/s/ AL KWOK                                   /s/ ADAM KABLANIAN
------------------------------------          ----------------------------------
NAME:  Al Kwok                                NAME:  Adam Kablanian
TITLE: VP of Operations and Business          TITLE:  President & CEO
Development
DATE:                                         DATE:

            NetLogic/Virage Logic Memorandum of Understanding Page 7

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