Initial code add for OpenCL Altera FPGA implementation. Now to come up with a clever way of doing cslowing...
Necessary changes to OpenCL GPU and Multicore FPGA code for Altera OpenCL code.
More Altera FPGA code. Task parallelism code as well as consts added to various constant kernel arguments.
Including changes made to test scripts to the branch
Adding symbolic links as well as some optimisation changes to code generation for Altera FPGA
Adding events to OpenCL GPU code for the OpenCL FPGA code.
More work on the OpenCL Monte Carlo solver
C-slowing for OpenCL on Altera FPGAswq
Pointing local work group size to a NULL value - let the compiler choose the workgroup size
Final commit before reinstalling OS on desktop machine
Fixing types in OpenCL host code
Merge branch 'wip/openclalterafpga' of github.com:Gordonei/ForwardFinancialFramework into wip/openclalterafpga
Merge branch 'wip/openclalterafpga'

Conflicts:
	Platforms/MulticoreCPU/multicore_c_code/black_scholes_underlying.c
	Platforms/MulticoreCPU/multicore_c_code/heston_underlying.c
	Platforms/OpenCLGPU/OpenCLGPU_MonteCarlo.py
	bin/test_scripts/mc_solver_ks_test.py