GitHub PushEvent at 2014-11-26 21:51:43
Repository: kernel_sony_msm8960t
Actor: nosedive
Payload: {"shas":[["243d44feaae7ed9720e3b5e6b487565cece43019","3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@kreinig.com","defconfig: enable prima wlan","nosedive",true],["16c7eb8066b1574a8ae968247b29a8894edb221c","3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@kreinig.com","msm/mdp4_overlay: fix rotator for cm based kernels","nosedive",true],["339fe32931aa996eeeaa122cc681f01ca6c2868a","3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@kreinig.com","arch/arm: add v7_flush_dcache_by_level() API\n\nOn ARMv7 based SOC with an integrated L2 cache, there is a need\nto have a flush API to operate on each cache level. In few low power\nmodes, L2 cache is retained where as L1 is lost. The current\nv7_flush_dcache_all(), flushes all the levels and\nit would be quite expensive.\n\nSo introduce v7_flush_dcache_by_level() API which takes a\nparameter (cache level), and flush only on that level.\n\nSigned-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>\nSigned-off-by: Sricharan R <r.sricharan@ti.com>\nCc: Catalin Marinas <catalin.marinas@arm.com>\nCc: Russell King <rmk+kernel@arm.linux.org.uk>","nosedive",true],["eff9535957a9f9c9b0aa7a1f18513f0790467160","3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@kreinig.com","arch/arm: flush only CPU local cache instead of all cache levels\n\nThe ARMv7 processor setup functions clean and invalidates the\ncpu cache before enabling MMU. The intention here is to start\nwith clean CPU local cache.\n\nBut on architectures like Cortex-[A15/A8], this code will end\nup flushing the L2 cache as well which undesirable and incorrect.\nThe setup functions are used in CPU hotplug scenario's too and\nhence flushing all cache levels should be avoided.\n\nFix this code by restricting the cache flush to local cpu\ncache or L1.\n\nSigned-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>\nCc: Catalin Marinas <catalin.marinas@arm.com>\nCc: Russell King <rmk+kernel@arm.linux.org.uk>","nosedive",true],["aadb36f2781b36cfcb016bc2c65dbc431db7d3d3","3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@kreinig.com","drivers/cpufreq: add cpu governor Powersave and Conservative\n\njust enabled in defconfig\nno extra files added","nosedive",true],["17e89d9398b2e264f24c65b2b710a81562f41e82","3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@kreinig.com","block: add io scheduler Simple-IO","nosedive",true],["4b0571e27ca4713e4bc05be6b663b38b596650e8","3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@kreinig.com","block: add io scheduler FIFO","nosedive",true],["00eb843f7be9ee00e35caaa2ea83a4eb97555f2a","3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@kreinig.com","block: add io scheduler Zen and set default","nosedive",true],["e287320c7401ec491b4668db28ce48176847bc15","3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@kreinig.com","drivers/cpufreq: add cpu governor Wheatley","nosedive",true],["a22dfdeeae7c5c9c16cd84822ed8992d7de961bd","3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@kreinig.com","drivers/cpufreq: add cpu governor Hyper and set default","nosedive",true],["d16ac1352f5dd3ad7f01b575d9dfc2abd4a765a4","3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@kreinig.com","arch/arm: pm-data: enable all sleep states\n\nTest have shown that this will increase battery life particulary\nwith screen off.\n\ncommit fc7b2cbce6e01ca79e6f9a01c104eed29872ba03","nosedive",true],["bd6e690cb783aa662c10fd2ef4a6399ca99ebd77","3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@kreinig.com","gcc: fix errors compiling in 4.8","nosedive",true]],"size":12,"ref":"refs/heads/kitkat","head":"bd6e690cb783aa662c10fd2ef4a6399ca99ebd77"}