GitHub PushEvent at 2014-01-20 15:40:50
Repository: f4ktion_kernel
Actor: F4k
Payload: {"shas":[["2e27920aca67a136784ae3c533efd5949d8120fd","701491b1b88c3b9aed5b9331fff18b956b036fb8@gmail.com","Revert \"wlan: Prima 3.2.7.23\"\n\nThis reverts commit f2abde87072622277b133cd9b06e0db90e816038.","f4k",true],["cb8692b4531aae6d983e871ec48feb2275b0854e","701491b1b88c3b9aed5b9331fff18b956b036fb8@gmail.com","mach-msm: update Overclock and Underclock code for better performance.","f4k",true],["0ee7764811df3cf0dd096613cc79dcbf990938c6","701491b1b88c3b9aed5b9331fff18b956b036fb8@gmail.com","cpufreq: update again SAV2 and SAH3 to fit new low clock freqs.","f4k",true],["15bcf235ff71e2b3b416cd1f4b45bdacc682bce3","701491b1b88c3b9aed5b9331fff18b956b036fb8@gmail.com","cpufreq: introduce a hardlimit that will be respected no matter what …\n\n…userspace is trying to force (Yank555.lu)\n\nSysFS interface :\n\n * /sys/kernel/cpufreq/hardlimit (rw)\n *\n *   set or show the real hard CPU frequency limit\n *\n * /sys/kernel/cpufreq/version (ro)\n *\n *   display CPU freq hard limit version information","f4k",true],["ea77eec2f71b320f5cc176156d7a7a029d72e300","9296a0ca31e8299ed6ec39daa4ff56fd47a51cb6@codeaurora.org","cpufreq: interactive: Modifying sync_freq implementation\n\n1. Check for up_threshold_any_cpu_freq instead of sync_freq to\n   boost the frequency to sync_freq.\n2. Change the load threshold name from sync_freq_load_threshold to\n   up_threshold_any_cpu_load\n3. Do not consider CPUs with load less than up_threshold_any_cpu_load\n   while evaluating max load across CPUs\n\nChange-Id: Ia0e537edbf38a5006c1a22f5c472daa0d086ffc9\nSigned-off-by: Rohit Gupta <rohgup@codeaurora.org>","Rohit Gupta",true],["cc041f4a582f56879dde25b911e24f1268bc745d","9296a0ca31e8299ed6ec39daa4ff56fd47a51cb6@codeaurora.org","cpufreq: interactive: Use default min_sample_time if SDF is zero\n\nUse min_sample_time to step down from max frequencies if\nsampling_down_factor is set to zero.\n\nChange-Id: I2e89bef6220557cb95efd20d658e0c05753b4c3c\nSigned-off-by: Rohit Gupta <rohgup@codeaurora.org>","Rohit Gupta",true],["438138274a9c88b2b6f653bdbba4226ec63884f5","168fbe9b48536378ad61dccedb637b5a226976e8@linux.org.tw","cpufreq: interactive: fix compiling warnings\n\nThe gcc warns like:\n\n  cpufreq_interactive.c:745:6: warning: operation on 'ret' may be\nundefined [-Wsequence-point]\n\nIt was introduced by commit cf0fad49d17cb8273ce555dd5b7afab67d7923bf.\n\nSince sprintf(...) just return 1 (one character) in this case, ret\nshould not changed.\nJust discarding the result of sprintf(...) leads to the result that\nthe committer of cf0fad49d17cb8273ce555dd5b7afab67d7923bf wants.\n\nChange-Id: Ifed1cef6d6a31c3ed23dad03a567b3b9eddf3a57\nSigned-off-by: Chih-Wei Huang <cwhuang@android-x86.org>\nSigned-off-by: Dave Daynard <nardholio@gmail.com>","Chih-Wei Huang",true],["617170be77918a635c026a12a11f715e97bb5ef4","b913f13ef92ac157955c954ccaaff7be065faba4@arm.com","ARM: kconfig: select HAVE_EFFICIENT_UNALIGNED_ACCESS for CPUv6+ && MMU\n\nModern ARM CPUs can perform efficient unaligned memory accesses in\nhardware and this feature is relied up on by code such as the dcache\nword-at-a-time name hashing.\n\nChange-Id: I41559fc9255229e2601f4bef28aa8d48246156b7\nSigned-off-by: Will Deacon <will.deacon@arm.com>","Will Deacon",true],["8845a49f10baba682d6c82f69c95041b4dfdf7d0","701491b1b88c3b9aed5b9331fff18b956b036fb8@gmail.com","lowmemorykiller: Use upstream version instead of Samsung's","f4k",true],["e63fcea756f3b5dc95d2bc7996f40ce85db857bc","209ba179947c35aa8a2a46f4caa398fd10622190@gmail.com","exFAT: Update to v1.2.5\n\nChange-Id: I6a43a674e5edc599b00a902247539b11569f4e6f","Arne Coucheron",true],["5fbd8c207bca9649009856ca9392098c9defac99","1e3ed3bf048787d5836c6bf2eaa8f3a7c1b27ef4@mcafee.com","arm/crypto: Add optimized AES and SHA1 routines\n\nAdd assembler versions of AES and SHA1 for ARM platforms.  This has provided\nup to a 50% improvement in IPsec/TCP throughout for tunnels using AES128/SHA1.\n\nPlatform   CPU SPeed    Endian   Before (bps)   After (bps)   Improvement\n\nIXP425      533 MHz      big     11217042        15566294        ~38%\nKS8695      166 MHz     little    3828549         5795373        ~51%\n\nSigned-off-by: David McCullough <ucdevel@gmail.com>\nSigned-off-by: Herbert Xu <herbert@gondor.apana.org.au>\n\nChange-Id: I821aa8126e8ab0540f5cbc20ffee3a2e7a384d12","David McCullough",true],["17e9298fd0eac963479e0db87af6cbe30a31bce6","00bf0f20509cb3bd3255c624dba0f295e3c4128e@linaro.org","ARM: 7626/1: arm/crypto: Make asm SHA-1 and AES code Thumb-2 compatible\n\nThis patch fixes aes-armv4.S and sha1-armv4-large.S to work\nnatively in Thumb.  This allows ARM/Thumb interworking workarounds\nto be removed.\n\nI also take the opportunity to convert some explicit assembler\ndirectives for exported functions to the standard\nENTRY()/ENDPROC().\n\nFor the code itself:\n\n  * In sha1_block_data_order, use of TEQ with sp is deprecated in\n    ARMv7 and not supported in Thumb.  For the branches back to\n    .L_00_15 and .L_40_59, the TEQ is converted to a CMP, under the\n    assumption that clobbering the C flag here will not cause\n    incorrect behaviour.\n\n    For the first branch back to .L_20_39_or_60_79 the C flag is\n    important, so sp is moved temporarily into another register so\n    that TEQ can be used for the comparison.\n\n  * In the AES code, most forms of register-indexed addressing with\n    shifts and rotates are not permitted for loads and stores in\n    Thumb, so the address calculation is done using a separate\n    instruction for the Thumb case.\n\nThe resulting code is unlikely to be optimally scheduled, but it\nshould not have a large impact given the overall size of the code.\nI haven't run any benchmarks.\n\nSigned-off-by: Dave Martin <dave.martin@linaro.org>\nTested-by: David McCullough <ucdevel@gmail.com> (ARM only)\nAcked-by: David McCullough <ucdevel@gmail.com>\nAcked-by: Nicolas Pitre <nico@linaro.org>\nSigned-off-by: Russell King <rmk+kernel@arm.linux.org.uk>\n\nChange-Id: I819f921198fd6cabfe0ae422607a5392d49040f4","Dave Martin",true],["e0e8af6ab47c6c9c9d37206155efc1f0c41c2759","66d3c5fdaeea7ff1f996ad04f2c45e08ab38e2f5@gmail.com","ARM: 7723/1: crypto: sha1-armv4-large.S: fix SP handling\n\nMake the SHA1 asm code ABI conformant by making sure all stack\naccesses occur above the stack pointer.\n\nOrigin:\nhttp://git.openssl.org/gitweb/?p=openssl.git;a=commit;h=1a9d60d2\n\nSigned-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>\nAcked-by: Nicolas Pitre <nico@linaro.org>\nCc: stable@vger.kernel.org\nSigned-off-by: Russell King <rmk+kernel@arm.linux.org.uk>\n\nChange-Id: Ia7fbf87db0cba99cb22cb432748a0e7f84192177","Ard Biesheuvel",true],["86a9d486f53cd85e2f5e58362cfe8d1abac28761","701491b1b88c3b9aed5b9331fff18b956b036fb8@gmail.com","Update defconfig","f4k",true],["cb71cd764ee5dbf128e126c07e9a57a61b70a389","701491b1b88c3b9aed5b9331fff18b956b036fb8@gmail.com","Linux-3.4.76","f4k",true],["b4c82204274734d88994aeacc12568fa86b8ac41","701491b1b88c3b9aed5b9331fff18b956b036fb8@gmail.com","cfg80211: permanently disable channels specified by base settings\n\nif a custom regulatory domain is passed and if a rule for a channel\nindicates it should be disabled that channel should always remain\ndisabled as per its documentation and design.\nLikewise if WIPHY_FLAG_STRICT_REGULATORY flag is set and a\nregulatory_hint() is issued if a channel is disabled that channel should\nremain disabled.\nWithout this change only drivers that set the _orig flags appropriately\non their own would ensure disallowed channels remaind disabled. This\nhelps drivers save code by relying on the APIS provided to entrust\nchannels that should not be enabled be respected by only having to use\nwiphy_apply_custom_regulatory() or regulatory_hint() with the\nWIPHY_FLAG_STRICT_REGULATORY set.\nIf wiphy_apply_custom_regulatory() is used together with\nWIPHY_FLAG_STRICT_REGULATORY and a regulatory_hint() issued later, the\nincoming regulatory domain can override previously set _orig parameters\nfrom the initial custom regulatory setting.\n\nChange-Id: Ia1af4b293bd299ac20e1934e5e03e633ecb9d6ee\nSigned-off-by: Luis R. Rodriguez <mcgrof@do-not-panic.com>\nSigned-off-by: Mihir Shete <smihir@codeaurora.org>","f4k",true],["98492eb2d56422798207730fa27c860703153377","bc352d988d7c8d983a3e890f70eff91fe2a35656@codeaurora.org","cfg80211: fix set_regdom() to cancel requests with same alpha2\n\nUse a different error code if the regdomain is same and then\nset the request processed so that it doesn't block new\nrequests.\n\nGit-commit: 959085352b7c44ff9bae4d8a4d76146193260e4c\nGit-repo: git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git\nAuthor: Kalle Valo <kvalo@qca.qualcomm.com>\nDate: Thu Jul 12 15:33:58 2012 +0300\n\nChange-Id: I8cbcf80bb43d983c72cf9037f30e11ae8d329b06\nSigned-off-by: Mihir Shete <smihir@codeaurora.org>","Mihir Shete",true],["56d69b22365cd4e4ec308c219f9a0758e0dbda8d","bc352d988d7c8d983a3e890f70eff91fe2a35656@codeaurora.org","msm: wlan: Add VHT80 support on db.txt\n\nAdding support for VHT80 on db.txt\n\nGit-commit: 342e794bf4130b624939504e97169c6d41bec011\nGit-repo: git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-regdb.git\nAuthor: Luis R. Rodriguez <mcgrof@do-not-panic.com>\nDate: 2013-07-17 02:18:42 (GMT)\n\nCRs-Fixed: 557666\nChange-Id: I91ed6f4d52a7b7bea93047f14455cc11b9f203ea\nAcked-by: Tushnim Bhattacharyya <tushnimb@codeaurora.org>\nSigned-off-by: Mihir Shete <smihir@codeaurora.org>","Mihir Shete",true],["6240fd92c1d5bdd1c8475abf39408c2363f286d5","1a75598c7c7ec8d9cce4f98f3a4468c72f5066f2@codeaurora.org","msm: wlan: update db.txt with information from compliance team\n\nUpdate the db.txt with new information from regulatory compliance\nteam.\n\nChange-Id: I22d123c28becb87228f96116456fd2b969440fd3\nSigned-off-by: Arif Hussain <arifhussain@codeaurora.org>\nCRs-Fixed: 571151","Arif Hussain",true],["8e89f82343f13400567a2ae95c94edd8d4448612","bc352d988d7c8d983a3e890f70eff91fe2a35656@codeaurora.org","cfg80211: export regulatory_hint_user() API\n\nThis is to help the hardware configured in world\nroaming mode to save power when not connected to\nany AP.\n\nCRs-Fixed: 542802\nChange-Id: Ia643d0e9848dcd486832973bd6dd186edd7bd4ea\nSigned-off-by: Mihir Shete <smihir@codeaurora.org>","Mihir Shete",true]],"size":30,"ref":"refs/heads/kk-4.4","head":"411abc0ddc15df68fc0235659fa0ab7fcb3651ca"}