GitHub PullRequestReviewCommentEvent at 2014-10-21 18:13:51
Repository: RTOS
Actor: piotrva
Payload: {"action":"created","comment":{"url":"https://api.github.com/repos/eitos/RTOS/pulls/comments/19167280","id":19167280,"diff_hunk":"@@ -0,0 +1,192 @@\n+/*\n+ * context_ISR.cpp\n+ *\n+ * Created: 2014-10-18 14:39:54\n+ *  Author: Piotr\n+ */ \n+#include <avr/interrupt.h>\n+#include \"../src/include/context_ISR.hpp\"\n+#include \"../src/include/StackStructure.hpp\"\n+\n+\n+uint16_t TaskStack;\n+\n+uint16_t ten_drugi;  // TP ONLY\n+\n+uint16_t* TaskStackPointer=&TaskStack;\n+\n+uint8_t task_no_set = 2;  // TP ONLY\n+\n+inline void __attribute__((always_inline)) ContextSave() {\n+\tasm volatile(\"push r0\t\t\t\\n\\t\"  // save r0 on stack\t\n+\t\"in r0, __SREG__\t\t\t\t\\n\\t\"  // load SREG into temp_reg (r0 just saved)\n+\t\"push r0\t\t\t\t\t\t\\n\\t\"  // save SREG on stack\n+\t\"cli\t\t\t\t\t\t\t\\n\\t\"  // clear interrupts (SREG just saved)\n+\t\"push r1\t\t\t\t\t\t\\n\\t\"  // save r1...31\n+\t\"push r2\t\t\t\t\t\t\\n\\t\"\n+\t\"push r3\t\t\t\t\t\t\\n\\t\"\n+\t\"push r4\t\t\t\t\t\t\\n\\t\"\n+\t\"push r5\t\t\t\t\t\t\\n\\t\"\n+\t\"push r6\t\t\t\t\t\t\\n\\t\"\n+\t\"push r7\t\t\t\t\t\t\\n\\t\"\n+\t\"push r8\t\t\t\t\t\t\\n\\t\"\n+\t\"push r9\t\t\t\t\t\t\\n\\t\"\n+\t\"push r10\t\t\t\t\t\t\\n\\t\"\n+\t\"push r11\t\t\t\t\t\t\\n\\t\"\n+\t\"push r12\t\t\t\t\t\t\\n\\t\"\n+\t\"push r13\t\t\t\t\t\t\\n\\t\"\n+\t\"push r14\t\t\t\t\t\t\\n\\t\"\n+\t\"push r15\t\t\t\t\t\t\\n\\t\"\n+\t\"push r16\t\t\t\t\t\t\\n\\t\"\n+\t\"push r17\t\t\t\t\t\t\\n\\t\"\n+\t\"push r18\t\t\t\t\t\t\\n\\t\"\n+\t\"push r19\t\t\t\t\t\t\\n\\t\"\n+\t\"push r20\t\t\t\t\t\t\\n\\t\"\n+\t\"push r21\t\t\t\t\t\t\\n\\t\"\n+\t\"push r22\t\t\t\t\t\t\\n\\t\"\n+\t\"push r23\t\t\t\t\t\t\\n\\t\"\n+\t\"push r24\t\t\t\t\t\t\\n\\t\"\n+\t\"push r25\t\t\t\t\t\t\\n\\t\"\n+\t\"push r26\t\t\t\t\t\t\\n\\t\"\n+\t\"push r27\t\t\t\t\t\t\\n\\t\"\n+\t\"push r28\t\t\t\t\t\t\\n\\t\"\n+\t\"push r29\t\t\t\t\t\t\\n\\t\"\n+\t\"push r30\t\t\t\t\t\t\\n\\t\"\n+\t\"push r31\t\t\t\t\t\t\\n\\t\"\n+\t\"clr __zero_reg__\t\t\t\t\\n\\t\"  // clear zero register (r1 - already saved)\n+\t\"lds r26, TaskStackPointer\t\t\\n\\t\"  // load TaskPointer (LOW) from SRAM into X register\n+\t\"lds r27, TaskStackPointer + 1\t\\n\\t\"  // load TaskPointer (HIGH) from SRAM into X register (SRAM addres)\n+\t\"in r0, __SP_L__\t\t\t\t\\n\\t\"  // load Stack Pointer (LOW) to temp_reg (r0)\n+\t\"st x+, r0\t\t\t\t\t\t\\n\\t\"  // save one byte (half-pointer) at address stored in X & post increment X\n+\t\"in r0, __SP_H__\t\t\t\t\\n\\t\"  // load Stack Pointer (HIGH) to temp_reg (r0)\n+\t\"st x+, r0\t\t\t\t\t\t\\n\\t\"  // save one byte (half-pointer) at address stored in X & post increment X\n+\t);\n+}\n+\n+\n+\n+inline void __attribute__((always_inline)) ContextRestore() {\n+\tasm volatile(\"lds r26, TaskStackPointer\t\\n\\t\"  // load TaskPointer (LOW) from SRAM into X register\n+\t\"lds r27, TaskStackPointer + 1\t\t\t\\n\\t\"  // load TaskPointer (HIGH) from SRAM into X register (SRAM addres)\n+\t\"ld r0, x+\t\t\t\t\t\t\t\t\\n\\t\"  // read one byte (half-pointer) from address stored in X & post increment X\t\n+\t\"out __SP_L__, r0\t\t\t\t\t\t\\n\\t\"  // set Stack Pointer (LOW) to value of temp_reg (r0)\n+\t\"ld r0, x+\t\t\t\t\t\t\t\t\\n\\t\"  // read one byte (half-pointer) from address stored in X & post increment X\n+\t\"out __SP_H__, r0\t\t\t\t\t\t\\n\\t\"  // set Stack Pointer (HIGH) to value of temp_reg (r0)\n+\t\"pop r31\t\t\t\t\t\t\t\t\\n\\t\"  // restore registers r31...1\n+\t\"pop r30\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r29\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r28\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r27\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r26\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r25\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r24\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r23\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r22\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r21\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r20\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r19\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r18\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r17\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r16\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r15\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r14\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r13\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r12\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r11\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r10\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r9\t\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r8\t\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r7\t\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r6\t\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r5\t\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r4\t\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r3\t\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r2\t\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r1\t\t\t\t\t\t\t\t\t\\n\\t\"\n+\t\"pop r0\t\t\t\t\t\t\t\t\t\\n\\t\"  // we have stored SREG as second value on stack\n+\t\"out __SREG__, r0\t\t\t\t\t\t\\n\\t\"  // so write the value to SREG and...\n+\t\"pop r0\t\t\t\t\t\t\t\t\t\\n\\t\"  // ...finally restore r0\n+\t);\n+}\n+\n+inline void __attribute__((always_inline)) StackRamEnd() {\n+\tasm volatile(\"ldi r16,0xFF\t\\n\\t\"\n+\t\"out __SP_L__,r16\t\t\t\t\\n\\t\"\n+\t\"ldi r16,0x10\t\t\t\t\\n\\t\"\n+\t\"out __SP_H__,r16\t\t\t\\n\\t\"\n+\t);\n+}\n+\n+uint16_t TaskAllocate(TaskFunctionType Task, uint16_t TaskStackStart) {\n+\tuint8_t* RamPtr = (uint8_t*)TaskStackStart;","path":"EiTOS/port/context_ISR.cpp","position":121,"original_position":121,"commit_id":"841ae45b5a7db722f8b1f5cfe73c29a71ac86d12","original_commit_id":"841ae45b5a7db722f8b1f5cfe73c29a71ac86d12","user":{"login":"piotrva","id":5657414,"avatar_url":"https://avatars.githubusercontent.com/u/5657414?v=2","gravatar_id":"","url":"https://api.github.com/users/piotrva","html_url":"https://github.com/piotrva","followers_url":"https://api.github.com/users/piotrva/followers","following_url":"https://api.github.com/users/piotrva/following{/other_user}","gists_url":"https://api.github.com/users/piotrva/gists{/gist_id}","starred_url":"https://api.github.com/users/piotrva/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/piotrva/subscriptions","organizations_url":"https://api.github.com/users/piotrva/orgs","repos_url":"https://api.github.com/users/piotrva/repos","events_url":"https://api.github.com/users/piotrva/events{/privacy}","received_events_url":"https://api.github.com/users/piotrva/received_events","type":"User","site_admin":false},"body":"WHAT?\r\nI do have to change 16 bit number (it is much easier to operate 16 bit numbers instead of pointers in the rest of the code) to a pointer in order to have an access to the ram by address.","created_at":"2014-10-21T18:13:51Z","updated_at":"2014-10-21T18:13:51Z","html_url":"https://github.com/eitos/RTOS/pull/11#discussion_r19167280","pull_request_url":"https://api.github.com/repos/eitos/RTOS/pulls/11","_links":{"self":{"href":"https://api.github.com/repos/eitos/RTOS/pulls/comments/19167280"},"html":{"href":"https://github.com/eitos/RTOS/pull/11#discussion_r19167280"},"pull_request":{"href":"https://api.github.com/repos/eitos/RTOS/pulls/11"}}},"pull_request":{"url":"https://api.github.com/repos/eitos/RTOS/pulls/11","id":23046179,"html_url":"https://github.com/eitos/RTOS/pull/11","diff_url":"https://github.com/eitos/RTOS/pull/11.diff","patch_url":"https://github.com/eitos/RTOS/pull/11.patch","issue_url":"https://api.github.com/repos/eitos/RTOS/issues/11","number":11,"state":"closed","locked":false,"title":"Port low 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