GitHub PushEvent at 2014-06-28 01:05:07
Repository: linux
Actor: RobertCNelson
Payload: {"shas":[["2557e2d79d7de9505f5d64bdcbb96ca5c032bdcb","8360e84c0021170906628747e14e01ad4674812c@gmail.com","drm/msm: Replace type of paddr to uint32_t.\n\nThis patch helps to avoid the following build issue:\n\ndrivers/gpu/drm/msm/msm_fbdev.c:108:2: error: passing argument 3 of 'msm_gem_get_iova_locked' from incompatible pointer type [-Werror]\n   msm_gem_get_iova_locked(fbdev->bo, 0, &paddr);\n   ^\nIn file included from drivers/gpu/drm/msm/msm_fbdev.c:18:0:\ndrivers/gpu/drm/msm/msm_drv.h:153:5: note: expected 'uint32_t *' but argument is of type 'dma_addr_t *'\n  int msm_gem_get_iova_locked(struct drm_gem_object *obj, int id,\n      ^\n\nSigned-off-by: Matwey V. Kornilov <matwey@sai.msu.ru>\nSigned-off-by: Rob Clark <robdclark@gmail.com>","Matwey V. Kornilov",true],["370a4d8a79f166d2accc294c4db35e5cbe8c3a90","82f81e62be2bf153f8e7977fe8d5e19723573a1d@linaro.org","drm/msm: storage class should be before const qualifier\n\nThe C99 specification states in section 6.11.5:\n\nThe placement of a storage-class specifier other than at the beginning\nof the declaration specifiers in a declaration is an obsolescent\nfeature.\n\nSigned-off-by: Peter Griffin <peter.griffin@linaro.org>\nCc: David Airlie <airlied@linux.ie>\nCc: dri-devel@lists.freedesktop.org\nCc: linux-kernel@vger.kernel.org\nSigned-off-by: Rob Clark <robdclark@gmail.com>","Peter Griffin",true],["b77f47e78982807286f6fdb4c39f9e798606dace","d4fda244ee25abe7d0b7d782a99f7543e6ef436b@codeaurora.org","drm/msm/hdmi: set hdp clock rate before prepare_enable\n\nThe clock driver usually complains when a clock is being prepared\nbefore setting its rate. It is the case here for \"core_clk\" which\nneeds to be set at 19.2 MHz before we attempt a prepare_enable().\n\nSigned-off-by: Stephane Viau <sviau@codeaurora.org>\nSigned-off-by: Rob Clark <robdclark@gmail.com>","Stephane Viau",true],["cf3198c2051a180d0cb469b275b2fb30a0533772","3efd2a027b14fd890cd23a9ef6d1134b4e5ad850@skynet.be","drm/msm: use PAGE_ALIGNED instead of IS_ALIGNED(PAGE_SIZE)\n\nuse mm.h definition\n\nCc: David Airlie <airlied@linux.ie>\nCc: Rob Clark <robdclark@gmail.com>\nSigned-off-by: Fabian Frederick <fabf@skynet.be>\nSigned-off-by: Rob Clark <robdclark@gmail.com>","Fabian Frederick",true],["87e956e9be0cdb832e90a4731b620286a8826842","d4fda244ee25abe7d0b7d782a99f7543e6ef436b@codeaurora.org","drm/msm: fix IOMMU cleanup for -EPROBE_DEFER\n\nIf probe fails after IOMMU is attached, we need to detach in order to\nclean up properly.  Before this change, IOMMU faults would occur if the\nprobe failed (-EPROBE_DEFER).\n\nSigned-off-by: Stephane Viau <sviau@codeaurora.org>\nSigned-off-by: Rob Clark <robdclark@gmail.com>","Stephane Viau",true],["bfafe93a1cd466ef318b7e5f6c65f59aee147791","fbd5edba1988036c8923f0cca0cce6ac4811db29@intel.com","drm/i915: cache hw power well enabled state\n\nJesse noticed that the punit communication needed to query the VLV power\nwell status can cause substantial delays. Since we can query the state\nfrequently, for example during I2C transfers, maintain a cached version\nof the HW state to get rid of this delay.\n\nThis fixes at least one reported regression where boot time increased by\n~4 seconds due to frequent power well state queries on VLV during eDP\nEDID read.\n\nThis regression has been introduced in\n\ncommit bb4932c4f17b68f34645ffbcf845e4c29d17290b\nAuthor: Imre Deak <imre.deak@intel.com>\nDate:   Mon Apr 14 20:24:33 2014 +0300\n\n    drm/i915: vlv: check port power domain instead of only D0 for eDP VDD on\n\nReported-by: Jesse Barnes <jesse.barnes@intel.com>\nSigned-off-by: Imre Deak <imre.deak@intel.com>\nReviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>\nSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>","Imre Deak",true],["2da38e0c9465b89518b29328daeb7da0ca1690b7","5cf69c63beb17bf38d63aa0e923ee8256af0e205@intel.com","ALSA: compress: fix the struct alignment to 4 bytes\n\nIn 64bit systems the compiler can default align to 8bytes causing mis-match with\n32bit usermode. Avoid this is future by ensuring all the structures shared with\nusermode are packed and aligned to 4 bytes irrespective of arch used\n\n[coding style fixes by tiwai]\n\nSigned-off-by: Vinod Koul <vinod.koul@intel.com>\nSigned-off-by: Takashi Iwai <tiwai@suse.de>","Vinod Koul",true],["8fffe7d1f094eea88aa0380255e247b285a2d5f2","9fb354e0a5603a0331399c18f4aa5aab2f9d9c5b@canonical.com","ALSA: hda - Fix usage of \"model\" module parameter\n\nA recent refactoring broke the possibility to manually specify\nmodel name as a module parameter. This patch restores the desired\nfunctionality.\n\nFixes: c21c8cf77f47 ('ALSA: hda - Add fixup_forced flag')\nReported-by: Kent Baxley <kent.baxley@canonical.com>\nSigned-off-by: David Henningsson <david.henningsson@canonical.com>\nSigned-off-by: Takashi Iwai <tiwai@suse.de>","David Henningsson",true],["a283368382c50345dff61525f493ea307f21ec9b","ff019a5748a52b5641624af88a54a2f0e46a9fb5@ossman.eu","ALSA: hda - hdmi: call overridden init on resume\n\nWe need to call the proper init function in case it has been\noverridden, as it might restore things that the generic routing\ndoesn't know anything about. E.g. AMD cards have special verbs\nthat need resetting.\n\nBugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=77901\nFixes: 5a61358433b1 ('ALSA: hda - hdmi: Add ATI/AMD multi-channel audio support')\nSigned-off-by: Pierre Ossman <pierre@ossman.eu>\nCc: <stable@vger.kernel.org> [v3.13+]\nSigned-off-by: Takashi Iwai <tiwai@suse.de>","Pierre Ossman",true],["56c4b63aaf4c2cd91966b2a5e69e5367bea60bbe","ba783f3beccaedfda693f41a15407d612a629408@intel.com","drm/i915: default to having backlight if VBT not available\n\nApparently there are Apple laptops with magic smoke for a VBIOS, which\nwe fail to find and use. Default to having and setting up backlight in\nthis case.\n\nThis fixes a regression introduced by\ncommit c675949ec58ca50d5a3ae3c757892f1560f6e896\nAuthor: Jani Nikula <jani.nikula@intel.com>\nDate:   Wed Apr 9 11:31:37 2014 +0300\n\n    drm/i915: do not setup backlight if not available according to VBT\n\nBugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=77831\nReported-and-tested-by: Matteo Cypriani <mcy@lm7.fr>\nCc: stable@vger.kernel.org # 3.15+\nReviewed-by: Imre Deak <imre.deak@intel.com>\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>","Jani Nikula",true],["245f98f269714c08dc6d66d021d166cf36059bc4","bae4a7a27bbc965064e97edd6e179ac4979db440@samsung.com","drm/exynos: hdmi: fix power order issue\n\nThis patch resolves page fault issue of Mixer when disabled.\n\nThe SFRs of VP and Mixer are updated by Vertical Sync of Timing\ngenerator which is a part of HDMI so the sequence to disable TV\nSubsystem should be as following:\n\tVP -> Mixer -> HDMI\n\nFor this, this patch disables Mixer and VP (if used) prior to\ndisabling HDMI.\n\nSigned-off-by: Inki Dae <inki.dae@samsung.com>","Inki Dae",true],["aaa51b13ffdc87ffbbde650bab9dee0a9c5c408f","69861c78e6f8ec8c6fbfd1c06050c87cda6b23eb@gmail.com","drm/exynos: dpi: Fix NULL pointer dereference with legacy bindings\n\nIf there is no panel node in DT and instead display timings are provided\ndirectly in FIMD node, there is no panel object created and ctx->panel\nbecomes NULL. However during Exynos DRM initialization\ndrm_helper_hpd_irq_event() is called, which in turns calls\nexynos_dpi_detect(), which dereferences ctx->panel without a check,\ncausing a NULL pointer derefrence.\n\nThis patch fixes the issue by adding necessary NULL pointer check.\n\nSigned-off-by: Tomasz Figa <tomasz.figa@gmail.com>\nReviewed-by: Jingoo Han <jg1.han@samsung.com>\nSigned-off-by: Inki Dae <inki.dae@samsung.com>","Tomasz Figa",true],["dcdffedaf277cd344c49650ee13e622d74af627c","ff341aa343d564f9e53e9dcb6996be8c04859a66@oracle.com","drm/exynos: change zero to NULL for sparse\n\nWe recently changed this function to return a pointer instead of an int\nso we need to change this zero to a NULL or Sparse complains:\n\n\tdrivers/gpu/drm/exynos/exynos_drm_drv.h:346:47:\n\twarning: Using plain integer as NULL pointer\n\nSigned-off-by: Dan Carpenter <dan.carpenter@oracle.com>\nSigned-off-by: Inki Dae <inki.dae@samsung.com>","Dan Carpenter",true],["0013fc9e550a0f9d2c4a19e553292680b6fdb283","1c3b1584a6008857f36c03c58f657c0fc16fc09e@samsung.com","drm/exynos: Fix de-registration ordering\n\n'exynos_drm_pdev' was not getting unregistered if platform_driver_register()\nfailed. Fix the ordering to allow this. This also fixes the below warning by\nmoving the #endif macro. While at it also fix the ordering in the exit function\nso that de-registration happens in opposite order of registration.\ndrivers/gpu/drm/exynos/exynos_drm_drv.c:768:1: warning: label\n'err_unregister_pd' defined but not used [-Wunused-label]\n\nSigned-off-by: Sachin Kamat <sachin.kamat@samsung.com>\nSigned-off-by: Inki Dae <inki.dae@samsung.com>","Sachin Kamat",true],["d9b68d89c2562814aaf67b890709f5aea4f7bf28","dcc2b772defa18622a340d324a717fd6b8ee2807@samsung.com","drm/exynos: disable unused windows on apply\n\nThe patch disables non-enabled HW windows on applying\nconfiguration, it will allow to clear windows enabled\nby bootloader.\n\nSigned-off-by: Andrzej Hajda <a.hajda@samsung.com>\nSigned-off-by: Inki Dae <inki.dae@samsung.com>","Andrzej Hajda",true],["b4bfa3c7d0a464a468615e4c6e06b92387115a04","f8d0375141c1c60c95f3d911ee412cc3cd75bd01@samsung.com","drm/exynos: set power state variable after enabling clocks and power\n\nPower state variable holds the state of the mixer device.\nPower on and power off functions are toggling these variable\nat wrong place.\n\nState variable should be changed to true only after Runtime\nPM and clocks are enabled. Else it may result to a situation\nwhere mixer registers are accessed with device power enabled.\nSimilar logic for poweroff sequence.\n\nSigned-off-by: Rahul Sharma <rahul.sharma@samsung.com>\nSigned-off-by: Inki Dae <inki.dae@samsung.com>","Rahul Sharma",true],["381be025ac1a6dc8efebdf146ced0d4a6007f77b","f8d0375141c1c60c95f3d911ee412cc3cd75bd01@samsung.com","drm/exynos: stop mixer before gating clocks during poweroff\n\nMixer should be power gated only after it is gracefully stopped.\nThe recommended sequence is to Stop the mixer and wait till\nit enters to IDLE state before gating the clocks and power to\nthe mixer.\n\nSigned-off-by: Rahul Sharma <rahul.sharma@samsung.com>\nSigned-off-by: Inki Dae <inki.dae@samsung.com>","Rahul Sharma",true],["967ab6b177ee7111383585639e375d9f67638010","711c73f64afdce07b7e38039a96d2224209e9a6c@chris-wilson.co.uk","drm/i915: Only mark the ctx as initialised after a SET_CONTEXT operation\n\nFallout from\n\ncommit 46470fc932ac8a0e8317a220b3f4ea4ed903338e\nAuthor: Mika Kuoppala <mika.kuoppala@linux.intel.com>\nDate:   Wed May 21 19:01:06 2014 +0300\n\n    drm/i915: Add null state batch to active list\n\nundid the earlier fix of only marking the ctx as initialised after it is\nsaved by the hardware during a SET_CONTEXT operation:\n\ncommit ad1d219974a3d13412268525309c5892f6779ae9\nAuthor: Ben Widawsky <benjamin.widawsky@intel.com>\nDate:   Sat Dec 28 13:31:49 2013 -0800\n\n    drm/i915: set ctx->initialized only after RCS\n\nSigned-off-by: Chris Wilson <chris@chris-wilson.co.uk>\nCc: Ville Syrjälä <ville.syrjala@linux.intel.com>\nCc: Damien Lespiau <damien.lespiau@intel.com>\nCc: Mika Kuoppala <mika.kuoppala@intel.com>\nCc: Ben Widawsky <ben@bwidawsk.net>\nReviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>\nReviewed-by: Ben Widawsky <ben@bwidawsk.net>\n[Jani: add reference to the earlier fix in the commit messsage.]\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>","Chris Wilson",true],["fb7023e0e248a33cb00d0a9cdce0bcedaa1ad284","f714145d6ee82178e54021e0c168f56d17b53c9c@intel.com","drm/i915: BDW: Adding Reserved PCI IDs.\n\nThese PCI IDs are reserved on BSpec and can be used at any time in the future.\nSo let's add this now in order to avoid issues that we already faced on previous\nplatforms, like finding out about new ids when user reported accelaration weren't\nenabled.\n\nCc: stable@vger.kernel.org\nReviewed-by: Ben Widawsky <ben@bwidawsk.net>\nSigned-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>","Rodrigo Vivi",true],["5b5ffff0d25060ab0e21fa0f6cd16428e87bf1ea","711c73f64afdce07b7e38039a96d2224209e9a6c@chris-wilson.co.uk","drm/i915: Hold the table lock whilst walking the file's idr and counting the objects in debugfs\n\nFixes an issue whereby we may race with the table updates (before the\ncore takes the struct_mutex) and so risk dereferencing a stale pointer in\nthe iterator for /debugfs/.../i915_gem_objects. For example,\n\n[ 1524.757545] BUG: unable to handle kernel paging request at f53af748\n[ 1524.757572] IP: [<c1406982>] per_file_stats+0x12/0x100\n[ 1524.757599] *pdpt = 0000000001b13001 *pde = 00000000379fb067 *pte = 80000000353af060\n[ 1524.757621] Oops: 0000 [#1] SMP DEBUG_PAGEALLOC\n[ 1524.757637] Modules linked in: ctr ccm arc4 ath9k ath9k_common ath9k_hw ath snd_hda_codec_conexant mac80211 snd_hda_codec_generic snd_hda_intel snd_hda_controller snd_hda_codec bnep snd_hwdep rfcomm snd_pcm gpio_ich dell_wmi sparse_keymap snd_seq_midi hid_multitouch uvcvideo snd_seq_midi_event dell_laptop snd_rawmidi dcdbas snd_seq videobuf2_vmalloc videobuf2_memops videobuf2_core usbhid videodev snd_seq_device coretemp snd_timer hid joydev kvm_intel cfg80211 ath3k kvm btusb bluetooth serio_raw snd microcode soundcore lpc_ich wmi mac_hid parport_pc ppdev lp parport psmouse ahci libahci\n[ 1524.757825] CPU: 3 PID: 1911 Comm: intel-gpu-overl Tainted: G        W  OE 3.15.0-rc3+ #96\n[ 1524.757840] Hardware name: Dell Inc. Inspiron 1090/Inspiron 1090, BIOS A06 08/23/2011\n[ 1524.757855] task: f52f36c0 ti: f4cbc000 task.ti: f4cbc000\n[ 1524.757869] EIP: 0060:[<c1406982>] EFLAGS: 00210202 CPU: 3\n[ 1524.757884] EIP is at per_file_stats+0x12/0x100\n[ 1524.757896] EAX: 0000002d EBX: 00000000 ECX: f4cbdefc EDX: f53af700\n[ 1524.757909] ESI: c1406970 EDI: f53af700 EBP: f4cbde6c ESP: f4cbde5c\n[ 1524.757922]  DS: 007b ES: 007b FS: 00d8 GS: 0033 SS: 0068\n[ 1524.757934] CR0: 80050033 CR2: f53af748 CR3: 356af000 CR4: 000007f0\n[ 1524.757945] Stack:\n[ 1524.757957]  f4cbdefc 00000000 c1406970 f53af700 f4cbdea8 c12e5f15 f4cbdefc c1406970\n[ 1524.757993]  0000ffff f4cbde90 0000002d f5dc5cd0 e4e80438 c1181d59 f4cbded8 f4d89900\n[ 1524.758027]  f5631b40 e5131074 c1903f37 f4cbdf28 c14068e6 f52648a0 c1927748 c1903f37\n[ 1524.758062] Call Trace:\n[ 1524.758084]  [<c1406970>] ? i915_gem_object_info+0x510/0x510\n[ 1524.758106]  [<c12e5f15>] idr_for_each+0xa5/0x100\n[ 1524.758126]  [<c1406970>] ? i915_gem_object_info+0x510/0x510\n[ 1524.758148]  [<c1181d59>] ? seq_vprintf+0x29/0x50\n[ 1524.758168]  [<c14068e6>] i915_gem_object_info+0x486/0x510\n[ 1524.758189]  [<c11823a6>] seq_read+0xd6/0x380\n[ 1524.758208]  [<c116d11d>] ? final_putname+0x1d/0x40\n[ 1524.758227]  [<c11822d0>] ? seq_hlist_next_percpu+0x90/0x90\n[ 1524.758246]  [<c1163e52>] vfs_read+0x82/0x150\n[ 1524.758265]  [<c11645d6>] SyS_read+0x46/0x90\n[ 1524.758285]  [<c16b8d8c>] sysenter_do_call+0x12/0x22\n[ 1524.758298] Code: f5 8f 2a 00 83 c4 6c 31 c0 5b 5e 5f 5d c3 8d 74 26 00 8d bc 27 00 00 00 00 55 89 e5 57 56 53 83 ec 04 3e 8d 74 26 00 83 41 04 01 <8b> 42 48 01 41 08 8b 42 4c 89 d7 85 c0 75 07 8b 42 60 85 c0 74\n[ 1524.758461] EIP: [<c1406982>] per_file_stats+0x12/0x100 SS:ESP 0068:f4cbde5c\n[ 1524.758485] CR2: 00000000f53af748\n\nReported-by: Sam Jansen <sam.jansen@starleaf.com>\nSigned-off-by: Chris Wilson <chris@chris-wilson.co.uk>\nCc: Sam Jansen <sam.jansen@starleaf.com>\nCc: stable@vger.kernel.org\nReviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>","Chris Wilson",true]],"size":41,"ref":"refs/heads/master","head":"cf0d135649784179c6599f831a01c57a42e31136"}