GitHub PushEvent at 2014-08-25 22:07:49
Repository: linux
Actor: RobertCNelson
Payload: {"shas":[["5e55dccc429527261182581de5edcabb1a61668b","50c3c575ce2bb12c45e20736ce59e86fe81915b4@ti.com","Input: atmel_mxt_ts: switch to using devm_request_threaded_irq\n\nUsing managed request irq helps us simplify our probe and cleanup\na lot.\n\nSigned-off-by: Nishanth Menon <nm@ti.com>\nSigned-off-by: Sundar Raman <sunds@ti.com>\nSigned-off-by: Felipe Balbi <balbi@ti.com>\nSigned-off-by: Sekhar Nori <nsekhar@ti.com>","Nishanth Menon",true],["cdf52051c92118f5eaac8af701d6cf95d86a5756","50c3c575ce2bb12c45e20736ce59e86fe81915b4@ti.com","Input: atmel_mxt_ts: switch to using devm_kzalloc\n\nUsing managed allocation helps us simplify our probe and cleanup.\n\nSigned-off-by: Nishanth Menon <nm@ti.com>\nSigned-off-by: Sundar Raman <sunds@ti.com>\nSigned-off-by: Felipe Balbi <balbi@ti.com>\nSigned-off-by: Sekhar Nori <nsekhar@ti.com>","Nishanth Menon",true],["bf355278cf06ae71fd519bca76044c7edee0d25d","15cf930609716039aab21a4ce2ebb20b7ec82e9e@ti.com","Input: atmel_mxt_ts: Add device tree bindings\n\nAdd device tree bindings for Atmel touch driver.\n\nProvision for supplying config data for controller is\ngiven through device tree data since the driver no longer\nconfigures these values for different firmware revisions.\n\nThis happened after commit 71749f5c66e797a39600dae9de58aab3858dc488\n(\"\").\n\nIdeally, this configuration data should come from a firmware\nlike interface. Something being worked on in the mainline.\nThat work is still in progress and not something that\ncan be pulled into the internal tree at this time.\n\nSigned-off-by: Sundar Raman <sunds@ti.com>\nAcked-by: Nishanth Menon <nm@ti.com>\nSigned-off-by: Felipe Balbi <balbi@ti.com>\nSigned-off-by: Sekhar Nori <nsekhar@ti.com>","Sundar Raman",true],["938e57a69853244cdeb46160daa8c3890b65cf15","15cf930609716039aab21a4ce2ebb20b7ec82e9e@ti.com","Input: atmel_mxt_ts: Add device tree support\n\nAdd device tree support for Atmel touch driver. All platform\nspecific data is now read from dts files and parsed inside the\ndriver.\n\nSigned-off-by: Sundar Raman <sunds@ti.com>\nAcked-by: Nishanth Menon <nm@ti.com>\n[balbi@ti.com: add missing MODULE_DEVICE_TABLE]\nSigned-off-by: Felipe Balbi <balbi@ti.com>\nSigned-off-by: Sekhar Nori <nsekhar@ti.com>","Sundar Raman",true],["64b3b2b14214465cfd5911dd78f69a5018bc9a99","15cf930609716039aab21a4ce2ebb20b7ec82e9e@ti.com","ARM: dts: dra7-evm: Add DT entry for Atmel MXT244 touch controller\n\nThis patch adds DT entry for atmel MXT244 touch driver (atmel_mxt_ts).\nThe device is on i2c1 and with address 0x4a. Platform configuration data\nand interrupts data is added inside dra7-evm.dts file. Pinctrl for\nWakeup2 irq pin, which is used for touchscreen interrupt, has also been\nupdated\n\nSigned-off-by: Sundar Raman <a0393242@ti.com>\nAcked-by: Nishanth Menon <nm@ti.com>\n[balbi@ti.com: set status to okay]\nSigned-off-by: Felipe Balbi <balbi@ti.com>\n[nsekhar@ti.com: fix interrupt number according to crossbar map, move\n                 pinctrl within tsc node. ]\nSigned-off-by: Sekhar Nori <nsekhar@ti.com>","Sundar Raman",true],["40669f75af22ee5ece098df2b7b081b45dee59f6","eba86029bdfc5762d0419aa8dd4fd0368b2d01d4@ti.com","mtd: nand: omap2: Make us work even if CONFIG_MTD_NAND_OMAP_BCH is module\n\nIf CONFIG_MTD_NAND_OMAP_BCH is defined as module then things break\nwith the following message even if ELM(BCH) module is loaded.\n\n[   18.926397] nand: error: CONFIG_MTD_NAND_OMAP_BCH not enabled\n\nFix this issue.\n\nSigned-off-by: Roger Quadros <rogerq@ti.com>\nTested-by: Yan Liu <yan-liu@ti.com>\nSigned-off-by: Sekhar Nori <nsekhar@ti.com>","Roger Quadros",true],["3d9bed8bb24edb6ce1874a1130e25dae0a8d838f","c5344daf2e7bda9dbffd8e6718db2d989f7f4819@ti.com","ARM: dts: dra72x-evm: Enable CPSW and MDIO\n\nAdding CPSW phy-id, CPSW and MDIO pinmux configuration for active and\nsleep states and enable them in board evm dts file.\n\nSigned-off-by: Mugunthan V N <mugunthanvnm@ti.com>\nSigned-off-by: Nishanth Menon <nm@ti.com>\nSigned-off-by: Sekhar Nori <nsekhar@ti.com>","Mugunthan V N",true],["ac8bd4a1de9c913fe90051eaceb33a1a317ef763","c1574519d727edaf2e16b260e452051ef77bf018@ti.com","ti_config_fragments/baseport.cfg: Fix a comment using unsupported format\n\nWe cannot have \"/* */\" style comments in cfg files.\nCurrently baseport.cfg has a comment using the above format.\nFixing the same.\n\nFixes: 33cd3ff1b24c1af8b (\"ti_config_fragments/baseport.cfg: Enable Crypto hardware acclerators\")\nReported-by: Nishanth Menon <nm@ti.com>\nSigned-off-by: Lokesh Vutla <lokeshvutla@ti.com>","Lokesh Vutla",true],["3eccc19a4502202639b7d8f2f5d4c7fe01d4708b","f9463caf95f5a4c66cfb5519ed3d1d413440e4f4@mentor.com","ARM: dts: OMAP5: add pmu node\n\n[ Upstream commit 69a126cbed4b932bcdf363f62b6646a5e8d17435 ]\n\nExpose the PMU on OMAP5.\n\nTested with perf on OMAP5 uEVM.\n\nSigned-off-by: Nathan Lynch <nathan_lynch@mentor.com>\nSigned-off-by: Tony Lindgren <tony@atomide.com>\n[nm@ti.com: cherry-pick for 3.14 kernel]\nSigned-off-by: Nishanth Menon <nm@ti.com>","Nathan Lynch",true],["e94b318cc02fade25d83eaa600326394eabbf724","b7591046495e2864c0de194dffa9f9f56abac3a1@ti.com","ARM: dts: DRA7: Add PMU nodes\n\nDRA74x and DRA72x family of processors vary slightly in the number\nof CPUs. So, add different instances of PMU for each of these processor\ngroups. Further, since the interrupts bypass crossbar and are directly\nconnected to GIC, mark the dts nodes with relevant information.\n\nTested with perf utility.\n\nCc: Nishanth Menon <nm@ti.com>\nCc: Praneeth Bajjuri <praneeth@ti.com>\nSigned-off-by: Lucas Weaver <l-weaver@ti.com>\nReviewed-by: Felipe Balbi <balbi@ti.com>","Lucas Weaver",true],["b8bb135c1f466a94a94f8b8d913e7b7dd6f96c7a","c5344daf2e7bda9dbffd8e6718db2d989f7f4819@ti.com","drivers: net: cpsw: switch-config: get/set phy status support\n\nSupport for get/set individual switch port phy link status\n\nSigned-off-by: Mugunthan V N <mugunthanvnm@ti.com>\nSigned-off-by: Sekhar Nori <nsekhar@ti.com>","Mugunthan V N",true],["d0709d189db60ded862a6c2be39ea7e82b423204","eba86029bdfc5762d0419aa8dd4fd0368b2d01d4@ti.com","ARM: dts: dra7-evm: Fix i2c3 pinmux and frequency\n\nThe I2C3 pins are taken from pads E21 (GPIO6_14) and\nF20 (GPIO6_15). Use the right pinmux register and mode.\n\nAlso fix the I2C frequency from some bogus value to 400KHz.\n\nSigned-off-by: Roger Quadros <rogerq@ti.com>\nSigned-off-by: Sekhar Nori <nsekhar@ti.com>","Roger Quadros",true],["6b2effd9530fd17e2a3c5f3cea715e6184956074","50c3c575ce2bb12c45e20736ce59e86fe81915b4@ti.com","ARM: OMAP5: powerdomain data: fix powerdomain powerstate\n\nUpdate the power domain power states for final production chip\ncapability. OFF mode, OSWR etc have been descoped for various domains.\n\nSigned-off-by: Nishanth Menon <nm@ti.com>","Nishanth Menon",true],["ce2982e70ff93c7d56c97798cf666aa52d50b2b8","50c3c575ce2bb12c45e20736ce59e86fe81915b4@ti.com","ARM: OMAP4+: prminst: provide function to find prm_dev instance offset\n\nPRM device instance can vary depending on SoC. We already handle the\nsame during reset of the device, However, this is also needed\nfor other logic instances. So, first abstract this out to a generic\nfunction.\n\nSigned-off-by: Nishanth Menon <nm@ti.com>","Nishanth Menon",true],["5684487a2da83a50b2270921e58241a2d52a4a85","50c3c575ce2bb12c45e20736ce59e86fe81915b4@ti.com","ARM: OMAP4: PRM: use the generic prm_inst to allow logic to be abstracted\n\nuse the generic function to pick up the prm_instance for a generic logic\nwhich can be reused from OMAP4+\n\nSigned-off-by: Nishanth Menon <nm@ti.com>","Nishanth Menon",true],["5e83669d093a88dbb31001b087ac40107a52dbbf","50c3c575ce2bb12c45e20736ce59e86fe81915b4@ti.com","ARM: OMAP4+: PRM: register interrupt information from DT\n\nAllow the PRM interrupt information to be picked up from device tree.\nthe only exception is for OMAP4 which uses values pre-populated and allows\ncompatibility with older dtb.\n\nSigned-off-by: Nishanth Menon <nm@ti.com>","Nishanth Menon",true],["f0a77a1d71e9915ba7fbf41a560faad6349ba1b2","50c3c575ce2bb12c45e20736ce59e86fe81915b4@ti.com","ARM: OMAP4+: PRM: remove \"wkup\" event\n\n\"wkup\" event at bit offset 0 exists only on OMAP3.\nOMAP4430/60 PRM_IRQSTATUS_A9, OMAP5/DRA7 PRM_IRQSTATUS_MPU\n\nregister bit 0 is DPLL_CORE_RECAL_ST not wakeup event like OMAP3.\n\nThe same applies to AM437x as well.\n\nRemove the wrong definition.\n\nSigned-off-by: Nishanth Menon <nm@ti.com>","Nishanth Menon",true],["4c0a07b9ec1a1781175d6f2066dc2ffb15cf9568","50c3c575ce2bb12c45e20736ce59e86fe81915b4@ti.com","ARM: OMAP4+: PRM: Enable wakeup capability for OMAP5, DRA7\n\nOMAP5 and DRA7 can now use pinctrl based I/O daisychain wakeup\ncapability. So, enable the support.\n\nSigned-off-by: Nishanth Menon <nm@ti.com>","Nishanth Menon",true],["56f5e6692a6d094665e0418c4744b176c7ebd6a1","50c3c575ce2bb12c45e20736ce59e86fe81915b4@ti.com","ARM: OMAP3+: PRM: register interrupt information from DT\n\nAllow the PRM interrupt information to be picked up from device tree.\nOMAP3 may use legacy boot and needs to be compatible with old dtbs\n(without interrupt populated), for these, we use the value which is\npre-populated.\n\nSigned-off-by: Nishanth Menon <nm@ti.com>","Nishanth Menon",true],["bdffadd723d1dd4245bc90b3322e0a32417f0800","50c3c575ce2bb12c45e20736ce59e86fe81915b4@ti.com","ARM: dts: OMAP3+: Add PRM interrupt\n\nProvide OMAP3, 4 and OMAP5 with interrupt number for PRM\n\nSigned-off-by: Nishanth Menon <nm@ti.com>","Nishanth Menon",true]],"size":70,"ref":"refs/heads/3.14","head":"d88949624f5cbaaec41322a44bc3aa6807c40ed1"}