GitHub PushEvent at 2014-10-20 22:23:52
Repository: simavr
Actor: bsekisser
Payload: {"shas":[["4bcb2928292b02f41ce989b113bd97d8c0b5d861","dbe2f39a8b8124367ef42b3c6ea046bd2d5bcf41@embarqmail.com","cores: AVR_IOPORT_DECLARE\n\nconvert port sructure declarations to macro AVR_IOPORT_DECLARE.\n\n\tmodified:   simavr/cores/sim_90usb162.c\n\tmodified:   simavr/cores/sim_mega128.c\n\tmodified:   simavr/cores/sim_mega1280.c\n\tmodified:   simavr/cores/sim_mega1281.c\n\tmodified:   simavr/cores/sim_mega128rfa1.c\n\tmodified:   simavr/cores/sim_mega128rfr2.c\n\tmodified:   simavr/cores/sim_mega169.c\n\tmodified:   simavr/cores/sim_mega2560.c\n\tmodified:   simavr/cores/sim_megax.h\n\tmodified:   simavr/cores/sim_tiny2313.c\n\tmodified:   simavr/sim/avr_ioport.h","bsekisser",true],["e175b0fd73521fd7acea6267bfe023a407f31da4","dbe2f39a8b8124367ef42b3c6ea046bd2d5bcf41@embarqmail.com","cores: add spi declaration\n\nconvert spi structure definitions to AVR_SPI_DECLARE\n\n\tmodified:   simavr/cores/sim_90usb162.c\n\tmodified:   simavr/cores/sim_mega128.c\n\tmodified:   simavr/cores/sim_mega1280.c\n\tmodified:   simavr/cores/sim_mega1281.c\n\tmodified:   simavr/cores/sim_mega128rfr2.c\n\tmodified:   simavr/cores/sim_mega169.c\n\tmodified:   simavr/cores/sim_mega2560.c\n\tmodified:   simavr/cores/sim_megax.h\n\tmodified:   simavr/cores/sim_megax4.h\n\tmodified:   simavr/cores/sim_megax8.h\n\tmodified:   simavr/cores/sim_megaxm1.h\n\tmodified:   simavr/sim/avr_spi.h","bsekisser",true],["4025318a43375f03600d12582bf451c02213ffa9","c2208abde9668e8e9815c3690855edd1e63abeac@pollet.net","Merge pull request #99 from bsekisser/bsekisser-cores-ioport-declare\n\ncores: AVR_IOPORT_DECLARE","Michel Pollet",true],["0428233dbfec25fe56a8189b2e8f7e6fb61189ff","c2208abde9668e8e9815c3690855edd1e63abeac@pollet.net","Merge pull request #100 from bsekisser/bsekisser-cores-spi-declare\n\ncores: add spi declaration","Michel Pollet",true]],"size":4,"ref":"refs/heads/master","head":"0428233dbfec25fe56a8189b2e8f7e6fb61189ff"}