GitHub PushEvent at 2014-05-30 23:31:48
Repository: u-boot
Actor: swarren
Payload: {"shas":[["3b5b599f171ee66bbb514fddd6361a84f1e198f5","b20e59da6aeb5cea6c82b021069d69f63616c55d@xilinx.com","ARM: zynq: Fix sparse warnings in slcr.c\n\nWarnings:\narch/arm/cpu/armv7/zynq/slcr.c:21:6: warning: symbol 'zynq_slcr_lock' was not declared. Should it be static?\narch/arm/cpu/armv7/zynq/slcr.c:27:6: warning: symbol 'zynq_slcr_unlock' was not declared. Should it be static?\narch/arm/cpu/armv7/zynq/slcr.c:34:6: warning: symbol 'zynq_slcr_cpu_reset' was not declared. Should it be static?\narch/arm/cpu/armv7/zynq/slcr.c:54:6: warning: symbol 'zynq_slcr_gem_clk_setup' was not declared. Should it be static?\narch/arm/cpu/armv7/zynq/slcr.c:81:6: warning: symbol 'zynq_slcr_devcfg_disable' was not declared. Should it be static?\narch/arm/cpu/armv7/zynq/slcr.c:94:6: warning: symbol 'zynq_slcr_devcfg_enable' was not declared. Should it be static?\narch/arm/cpu/armv7/zynq/slcr.c:107:5: warning: symbol 'zynq_slcr_get_boot_mode' was not declared. Should it be static?\narch/arm/cpu/armv7/zynq/slcr.c:113:5: warning: symbol 'zynq_slcr_get_idcode' was not declared. Should it be static?\n\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Michal Simek",true],["ec9638659f5ed9cbb691c09fb72aee12c3426601","b20e59da6aeb5cea6c82b021069d69f63616c55d@xilinx.com","ARM: zynq: Fix sparse warning in ddrc.c\n\nWarning:\narch/arm/cpu/armv7/zynq/ddrc.c:43:24: warning: Using plain integer as NULL pointer\n\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Michal Simek",true],["5b73caffeb12b0f635693ce4c53177de86dd3b38","b20e59da6aeb5cea6c82b021069d69f63616c55d@xilinx.com","ARM: zynq: Remove sparse warnings\n\nWarnings:\nboard/xilinx/zynq/board.c:17:13: warning: symbol 'fpga' was not declared. Should it be static?\nboard/xilinx/zynq/board.c:20:13: warning: symbol 'fpga010' was not declared. Should it be static?\nboard/xilinx/zynq/board.c:21:13: warning: symbol 'fpga015' was not declared. Should it be static?\nboard/xilinx/zynq/board.c:22:13: warning: symbol 'fpga020' was not declared. Should it be static?\nboard/xilinx/zynq/board.c:23:13: warning: symbol 'fpga030' was not declared. Should it be static?\nboard/xilinx/zynq/board.c:24:13: warning: symbol 'fpga045' was not declared. Should it be static?\nboard/xilinx/zynq/board.c:25:13: warning: symbol 'fpga100' was not declared. Should it be static?\nboard/xilinx/zynq/board.c:120:5: warning: symbol 'board_mmc_init' was not declared. Should it be static?\n\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Michal Simek",true],["96a2859e54c8f6153ddb429ba730b324ab8ff352","673e7ee326f90477823c14a0bc2c27a78ebaa977@xilinx.com","ARM: zynq: Added efuse status register base address\n\nAdded efuse status register base address. This register\nis used for determining whether efuse was blown or not.\nAlso, added the zynq_get_silicon_version() to get the\nsilicon version of the zynq board.\n\nSigned-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Siva Durga Prasad Paladugu",true],["10fa49f428b9425f554f64a74a451868cbbfba3a","b20e59da6aeb5cea6c82b021069d69f63616c55d@xilinx.com","ARM: zynq: Do not use half memory size for ECC case\n\nMemory size should be specified without ECC place.\nIf you need to have half memory size, please change\nu-boot configuration.\n\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Michal Simek",true],["1540fb725bb7067f5cacbcc624f8684ed1471815","3a191dd2be46e826fee926d532b136ed65cb5318@monstr.eu","ARM: zynq: Call zynq board_init() in SPL\n\nCall board_init() if SPL is configured with CONFIG_SPL_BOARD_INIT.\n\nSigned-off-by: Michal Simek <monstr@monstr.eu>","Michal Simek",true],["6e04769caf208a9f2da8ef8a85353def2a170176","b20e59da6aeb5cea6c82b021069d69f63616c55d@xilinx.com","ARM: zynq: slcr: Fix incorrect commentary\n\nFix c&p error in zynq_slcr_devcfg_enable() commentary\nand extending it with description according\nto Zynq TRM also in zynq_slcr_devcfg_disable().\n\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Michal Simek",true],["2da7a745b6d24eec7be30e7d11ca456d445e30c3","b20e59da6aeb5cea6c82b021069d69f63616c55d@xilinx.com","ARM: zynq: Setup correct slcr_lock value\n\nThe driver should setup slcr state according\nto slcr operations.\n\nReported-by: Andrey Filippov <andrey@elphel.com>\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Michal Simek",true],["dc4a1a2729f9ccaa473cf017c8bd4be4f242cafe","a3a80a5bf09f2a16fb39154c4e7d0b2d849b0dfb@topic.nl","ARM: zynq: Fix bootmode mask\n\nBootmode mask was defined as 0x0F, but documentation mentions 0x07.\nExperiments show that bit \"3\" is the JTAG chain configuration.\nChange the mask to \"7\" to allow systems with a different chain\nconfiguration to boot correctly.\n\nSigned-off-by: Mike Looijmans <mike.looijmans@topic.nl>\nAcked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Mike Looijmans",true],["0b680206ccf5a4ae6adf759339ba7dc7ce06d284","b20e59da6aeb5cea6c82b021069d69f63616c55d@xilinx.com","ARM: zynq: Fix building SPL without FPGA support\n\nWhen CONFIG_FPGA is defined but CONFIG_SPL_FPGA is not, the build fails:\nboard.c: In function 'board_init':\nboard.c:41:3: error: 'fpga' undeclared (first use in this function)\n   fpga = fpga010;\n\nFix this by expanding the \"#if..\" around this block to match the other\nFPGA checks and don't compile this block when buildign for SPL without\nFPGA support.\n\nTested a bootloader that had CONFIG_FPGA defined without CONFIG_SPL_FPGA,\nthis now compiles without errors and loading FPGA from u-boot works.\n\nSigned-off-by: Mike Looijmans <mike.looijmans@topic.nl>\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Michal Simek",true],["3d456eec43c13778738a5b5246a4109282d207a3","b20e59da6aeb5cea6c82b021069d69f63616c55d@xilinx.com","ARM: zynq: Extend kernel image size to 60MB\n\nExtend max kernel image size. Gunzip is checking\nthis value. If kernel is larger, message below is shown.\n\nUncompressing Kernel Image ... Error: inflate() returned -5\nGUNZIP: uncompress, out-of-mem or overwrite error -\nmust RESET board to recover\n\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Michal Simek",true],["3cc3fa8672705e609ccd25348438453bd8de07fd","3a191dd2be46e826fee926d532b136ed65cb5318@monstr.eu","ARM: zynq: Add MIO detection code\n\nAdd run-time MIO pin detection to get actual\npin configuration for specific periphery.\n\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Michal Simek",true],["eb8c54bfaabec7b8ba65a054f6c3e37572288ae9","3a191dd2be46e826fee926d532b136ed65cb5318@monstr.eu","ARM: zynq: ehci: Added USB host driver support\n\nAdded USB host driver for zynq.\n\nSigned-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Michal Simek",true],["c6024c8edd5e9e27f1099341cca1fc41f77c5ed4","673e7ee326f90477823c14a0bc2c27a78ebaa977@xilinx.com","ARM: zynq: Added USB host support for zynq boards\n\nAdded configs to support USB host for zynq boards.\nAlso added a command usbboot to boot from usb.\n\nSigned-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Siva Durga Prasad Paladugu",true],["00cf6b4e229f8537ea2543ccc01e08a310414d09","673e7ee326f90477823c14a0bc2c27a78ebaa977@xilinx.com","ARM: zynq: Enable the FAT write capability\n\nEnable the FAT write capability for SD/MMC write\nfunctionality.\n\nSigned-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Siva Durga Prasad Paladugu",true],["47b35a516b60de6c1055fab3a866a1e70bf12f6b","673e7ee326f90477823c14a0bc2c27a78ebaa977@xilinx.com","ARM: zynq: Move USB/SD/MMC common FAT configs\n\nMoved the USB/SD/MMC common FAT configs separately\nto avoid redefinition warnings.\n\nSigned-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Siva Durga Prasad Paladugu",true],["2e38a9067227ca005e61afc3337c32ae92a4d0c4","673e7ee326f90477823c14a0bc2c27a78ebaa977@xilinx.com","ARM: zynq: Enable EXT4 configs\n\nEnabled the EXT4 configs.\n\nSigned-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Siva Durga Prasad Paladugu",true],["841426ad9f19b7bcf4add8329484ebad672daa9c","b20e59da6aeb5cea6c82b021069d69f63616c55d@xilinx.com","ARM: zynq: Extend maximum number of command arguments\n\n15 was too small for variables stored in file on MMC.\n\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Michal Simek",true],["f05862d7bdba1912d041df1e1434af82d47e64d2","e4725b56ff6a11ac4309e92440cacb47b56011ab@jp.panasonic.com","zynq: add empty xil_io.h to avoid compile error\n\nps7_init.c exported by hw project has #include \"xil_io.h\" line\nbut U-Boot does not have \"xil_io.h\".\n\nSo we get an error on SPL build:\n  ps7_init.c:12581:20: fatal error: xil_io.h: No such file or directory\n\nWe can delete the include directive in ps7_init.c to avoid this error.\nBut it is painful to do this every time we export ps7_init.c file.\n\nInstead, we can put an empty xil_io.h in the same directory\nso we can directly copy ps7_init.c as is.\n\nSigned-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>\nAcked-by: Tom Rini <trini@ti.com>\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Masahiro Yamada",true],["66e6715c5ffe817c70485020508c7b9ec47227b7","e4725b56ff6a11ac4309e92440cacb47b56011ab@jp.panasonic.com","zynq: treat ps7_init.c/h as external files to ignore them\n\nps7_init.c and ps7_init.h are supposed to be exported by hw project\nand copied to board/xilinx/zynq/ directory.\n\nWe want them to be ignored by git.\nSo what we should do is to always treat them as external files\nrather than replacing ps7_init.c\n\nThis commit does:\n\n - Move a weak function ps7_init() to arch/arm/cpu/armv7/zynq/spl.c\n   and delete board/xilinx/zynq/ps7_init.c\n\n - Compile board/xilinx/zynq/ps7_init.c only when it exists\n\n - Add .gitignore to ignore ps7_init.c/h\n\nSigned-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>\nSigned-off-by: Michal Simek <michal.simek@xilinx.com>","Masahiro Yamada",true]],"size":120,"ref":"refs/heads/tegra_dev","head":"623d2cc5438ff5f2ac51f856ba4ff696efd53779"}