GitHub PushEvent at 2014-03-10 06:25:03
Repository: linux-grsec
Actor: minipli
Payload: {"shas":[["07ad6836fa21b8ae1715d5f82a0d28c4140e1e73","1d402fe89ace836b52164ed4c0f247cb6f80efc1@gmail.com","clk: mvebu: armada-370: maintain clock init order\n\nInit order of CLK_OF_DECLARE'd drivers depends on compile order.\nUnfortunately, clk_of_init does not allow drivers to return errors,\ne.g. -EPROBE_DEFER if parent clocks have not been registered, yet.\n\nTo avoid init order woes for MVEBU clock drivers, we take care of\nproper init order ourselves. This patch joins core-clk and gating-clk\ninit to maintain proper init order.\n\nSigned-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\nTested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>\nSigned-off-by: Jason Cooper <jason@lakedaemon.net>","Sebastian Hesselbarth",true],["0a11a6ae94373f37e738f7dc8f51d60a78d78a58","1d402fe89ace836b52164ed4c0f247cb6f80efc1@gmail.com","clk: mvebu: armada-xp: maintain clock init order\n\nInit order of CLK_OF_DECLARE'd drivers depends on compile order.\nUnfortunately, clk_of_init does not allow drivers to return errors,\ne.g. -EPROBE_DEFER if parent clocks have not been registered, yet.\n\nTo avoid init order woes for MVEBU clock drivers, we take care of\nproper init order ourselves. This patch joins core-clk and gating-clk\ninit to maintain proper init order.\n\nSigned-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\nSigned-off-by: Jason Cooper <jason@lakedaemon.net>","Sebastian Hesselbarth",true],["8f7fc5450b64210b08cb3daabb3473dbad197e54","1d402fe89ace836b52164ed4c0f247cb6f80efc1@gmail.com","clk: mvebu: dove: maintain clock init order\n\nInit order of CLK_OF_DECLARE'd drivers depends on compile order.\nUnfortunately, clk_of_init does not allow drivers to return errors,\ne.g. -EPROBE_DEFER if parent clocks have not been registered, yet.\n\nTo avoid init order woes for MVEBU clock drivers, we take care of\nproper init order ourselves. This patch joins core-clk and gating-clk\ninit to maintain proper init order.\n\nSigned-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\nTested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>\nSigned-off-by: Jason Cooper <jason@lakedaemon.net>","Sebastian Hesselbarth",true],["58d516ae95cbf7eed44f85a01cdfad41f17b4197","1d402fe89ace836b52164ed4c0f247cb6f80efc1@gmail.com","clk: mvebu: kirkwood: maintain clock init order\n\nInit order of CLK_OF_DECLARE'd drivers depends on compile order.\nUnfortunately, clk_of_init does not allow drivers to return errors,\ne.g. -EPROBE_DEFER if parent clocks have not been registered, yet.\n\nTo avoid init order woes for MVEBU clock drivers, we take care of\nproper init order ourselves. This patch joins core-clk and gating-clk\ninit to maintain proper init order.\n\nSigned-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\nTested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>\nSigned-off-by: Jason Cooper <jason@lakedaemon.net>","Sebastian Hesselbarth",true],["2f41898704d3cff796ea0adaea272808707d758e","2d324f4ca95610bde432fa2af2f28cd21110687d@free-electrons.com","ARM: sun7i: dt: Fix interrupt trigger types\n\nThe Allwinner A20 uses the ARM GIC as its internal interrupts controller. The\nGIC can work on several interrupt triggers, and the A20 was actually setting it\nup to use a rising edge as a trigger, while it was actually a level high\ntrigger, leading to some interrupts that would be completely ignored if the\nedge was missed.\n\nFix this for the remaining DT nodes that slipped through.\n\nSigned-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>\nCc: stable@vger.kernel.org","Maxime Ripard",true],["40dd8f3b900cac1d925605a9d3199368c4af0a40","2d324f4ca95610bde432fa2af2f28cd21110687d@free-electrons.com","ARM: sunxi: dt: Change the touchscreen compatibles\n\nSwitch the device tree touchscreen compatibles to have a common pattern accross\nall Allwinner SoCs. Since the touchscreen driver has not been merged yet, it\nhas no side effect.\n\nSigned-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>","Maxime Ripard",true],["a65e0c6a7f14d80e87b82959c7333595cbd3e54e","15ad2a232c436ab54d1b78ef06a09c4cd03911f0@ti.com","clk: keystone: gate: fix clk_init_data initialization\n\nThe clk_init_data struct is allocated in the stack. All members of\nthis struct should be initialized before using otherwise it will\nlead to unpredictable situation as it can contain garbage.\n\nUltimately the clk->flag field contains garbage. In my case it leads\nthat flag CLK_IGNORE_UNUSED is set for most of clocks. As result a\nbunch of unused clocks cannot be disabled.\n\nSo initialize flags in this structure too.\n\nCc: Mike Turquette <mturquette@linaro.org>\nSigned-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>\nSigned-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>","Ivan Khoronzhuk",true],["565bbdcd3b91523b4142587c00206302e091a23e","15ad2a232c436ab54d1b78ef06a09c4cd03911f0@ti.com","ARM: keystone: dts: fix clkvcp3 control register address\n\nThe address for control regs in clkvcp3 node is not correct and should\nbe 0x023500a8 instead of 0x0235000a8.\n\nThis lead to few unexpected behaviors while clocks were turned\nof in absence of clk_ignore_unused\n\nMike Turquette <mturquette@linaro.org>\nSigned-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>\nSigned-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>","Ivan Khoronzhuk",true],["32769814d54a5a360b83811b4039c776ec953c71","1a5d131848a166677cc209f94fa988cee9378c32@wizery.com","mac80211: fix sched_scan restart on recovery\n\nIn case we were not suspended, the reconfig function returns without\nconfiguring the scheduled scan.\n\nSigned-off-by: Arik Nemtsov <arikx.nemtsov@intel.com>\nSigned-off-by: Johannes Berg <johannes.berg@intel.com>","Arik Nemtsov",true],["c368ddaa9ad79fdffde4756804321feba6725c75","521d75e285792198b756599dc69946549861e988@intel.com","mac80211: fix memory leak\n\nIn case ieee80211_prep_connection() fails to dereference\nsdata->vif.chanctx_conf, the function returns and doesn't\nfree new_sta. fixed.\n\nSigned-off-by: Eytan Lifshitz <eytan.lifshitz@intel.com>\nSigned-off-by: Johannes Berg <johannes.berg@intel.com>","Eytan Lifshitz",true],["1bf4bbb4024dcdab5e57634dd8ae1072d42a53ac","118ed6118e893d16e8c6e0776e0ebc290952c897@openwrt.org","mac80211: send control port protocol frames to the VO queue\n\nImproves reliability of wifi connections with WPA, since authentication\nframes are prioritized over normal traffic and also typically exempt\nfrom aggregation.\n\nCc: stable@vger.kernel.org\nSigned-off-by: Felix Fietkau <nbd@openwrt.org>\nSigned-off-by: Johannes Berg <johannes.berg@intel.com>","Felix Fietkau",true],["ce898ecb5a3c0027855dcee21ed99690b867d017","3a4d625ce225e891399f98db96a382ac4a84080b@trash.net","netfilter: nft_reject_inet: fix unintended fall-through in switch-statatement\n\nFor IPv4 packets, we call both IPv4 and IPv6 reject.\n\nReported-by: Dave Jones <davej@redhat.com>\nSigned-off-by: Patrick McHardy <kaber@trash.net>\nSigned-off-by: Pablo Neira Ayuso <pablo@netfilter.org>","Patrick McHardy",true],["06efbd6d5694b2e3cde176f724ba572d57709616","0bda9a89324ffe2d19adec61a9f1cd9f8c8e45f0@tiscali.nl","netfilter: nft_meta: fix typo \"CONFIG_NET_CLS_ROUTE\"\n\nThere are two checks for CONFIG_NET_CLS_ROUTE, but the corresponding\nKconfig symbol was dropped in v2.6.39. Since the code guards access to\ndst_entry.tclassid it seems CONFIG_IP_ROUTE_CLASSID should be used\ninstead.\n\nSigned-off-by: Paul Bolle <pebolle@tiscali.nl>\nSigned-off-by: Pablo Neira Ayuso <pablo@netfilter.org>","Paul Bolle",true],["2b7a79bae2dc0327af2352e1d1793b9d752648aa","4d3546a99bfa2457220d5f728333e9f0d7e61856@yahoo.com","netfilter: nf_nat_snmp_basic: fix duplicates in if/else branches\n\nThe solution was found by Patrick in 2.4 kernel sources.\n\nCc: Patrick McHardy <kaber@trash.net>\nSigned-off-by: Francois-Xavier Le Bail <fx.lebail@yahoo.com>\nAcked-by: Patrick McHardy <kaber@trash.net>\nSigned-off-by: Pablo Neira Ayuso <pablo@netfilter.org>","FX Le Bail",true],["478b360a47b71f3b5030eacd3aae6acb1a32c2b6","cef439e78636cdab99cd2923826c5065a0743e5b@strlen.de","netfilter: nf_tables: fix nf_trace always-on with XT_TRACE=n\n\nWhen using nftables with CONFIG_NETFILTER_XT_TARGET_TRACE=n, we get\nlots of \"TRACE: filter:output:policy:1 IN=...\" warnings as several\nplaces will leave skb->nf_trace uninitialised.\n\nUnlike iptables tracing functionality is not conditional in nftables,\nso always copy/zero nf_trace setting when nftables is enabled.\n\nMove this into __nf_copy() helper.\n\nSigned-off-by: Florian Westphal <fw@strlen.de>\nSigned-off-by: Pablo Neira Ayuso <pablo@netfilter.org>","Florian Westphal",true],["f627ed91d85ed7a189ec8b3b045a0d831e1655e2","262b42b771725e3ebec40395f2b058e593df7462@redhat.com","netfilter: nf_tables: check if payload length is a power of 2\n\nAdd a check if payload's length is a power of 2 when selecting ops.\nThe fast ops were meant for well aligned loads, also this fixes a\nsmall bug when using a length of 3 with some offsets which causes\nonly 1 byte to be loaded because the fast ops are chosen.\n\nSigned-off-by: Nikolay Aleksandrov <nikolay@redhat.com>\nAcked-by: Patrick McHardy <kaber@trash.net>\nSigned-off-by: Pablo Neira Ayuso <pablo@netfilter.org>","Nikolay Aleksandrov",true],["cb6448ab0a9ac5f1d1c72a0f573dd9677d8e5418","651dda1e35c6fe8f72c3112540c405a2364bcd71@nvidia.com","clk: tegra: Add missing Tegra20 fuse clks\n\nAdd clocks required for accessing fuses on Tegra20.\n\nSigned-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>\nAcked-by: Stephen Warren <swarren@nvidia.com>","Peter De Schrijver",true],["2edf3e035302776e4756e446baf3b6c7b94c3698","b75a4d02013b0e68ae2c6bb0dcfd4b7bec282dc9@gmail.com","clk: tegra: Correct clock number for UARTE\n\nUARTE has clock number 66. Number 65 is the right one for UARTD.\n\nSigned-off-by: Thierry Reding <treding@nvidia.com>","Thierry Reding",true],["2ec35fd503bf6367ba55ed94dcb68edfe0d26e6a","5c8aa1266c03186393d9e7b3b4e3b14239af8201@chromium.org","clk: tegra: Fix PLLP rate table\n\nThis table had settings for 216MHz, but PLLP is (and is supposed to be)\nconfigured at 408MHz.  If that table is used and PLLP_BASE_OVRRIDE is\nnot set, the kernel will panic in clk_pll_recalc_rate().\n\nSigned-off-by: Gabe Black <gabeblack@google.com>\nSigned-off-by: Andrew Bresticker <abrestic@chromium.org>","Gabe Black",true],["67fc26bfd7a265883fd0804f24f6287d16769e3d","9c6f026f68ffecc44f215af186ef513cd72b6ce4@nvidia.com","clk: tegra: Fix PLLD mnp table\n\nPLLD was using the same mnp table as PLLP.  Fix it to use its own\ntable which is different from PLLP's.\n\nSigned-off-by: Rhyland Klein <rklein@nvidia.com>\nSigned-off-by: Andrew Bresticker <abrestic@chromium.org>","Rhyland Klein",true]],"size":350,"ref":"refs/heads/master","head":"fa389e220254c69ffae0d403eac4146171062d08"}