GitHub PullRequestReviewCommentEvent at 2014-11-24 22:33:42
Repository: report
Actor: stianjensen
Payload: {"action":"created","comment":{"url":"https://api.github.com/repos/dmpro2014/report/pulls/comments/20828254","id":20828254,"diff_hunk":"@@ -5,6 +5,46 @@ \\chapter{Testing}\n \n Does it work?\n \n+\n+\\section{Component testing}\n+The system consists of a number of fairly isolated components.\n+It's valuable to test the components in isolation before they are connected.\n+Both implementation errors, and design flaws, can be uncovered before the components are introduced to the system.\n+The unit tests were implemented as VHDL test benches\n+Table \\ref{tab:vhdl_unit_tests} describes the unit tests that was run.\n+\\begin{table}[H]\n+\t\\centering\n+\t\\begin{tabularx}{\\textwidth}{|c|X|c|}\n+\t\\hline\n+\t\\multicolumn{3}{|c|}{Unit tests.} \\\\\n+\t\\hline  Component under test & What is tested  \t  & Status \\\\ \n+\t\\hline  \\multirow{3}{*}{Barrel selector} \t\t  & Barrel row is incremented each clock cycle.  & \\multirow{3}{*}{ Passed } \\\\\n+\t \t\t\t\t\t\t\t\t\t\t \t\t  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\\multirow{3}{*}{Register file} \t\t  \t  & Read/write to general purpose registers. & \\multirow{3}{*}{ Passed } \\\\\n+\t\t\t\t\t\t\t\t\t\t\t\t\t  & Dedicated registers behave correctly.  & \\\\ \n+\t\t\t\t\t\t\t\t\t\t\t\t\t  & Does the masking bit work.  & \\\\ \t\t\t\t\t\t\t\t\t\t\t\t\t  \n+\t\\hline  Register directory \t\t \t\t\t\t  & Multiplexes input/output signals to the correct register file. & Passed  \\\\\n+\t\n+\t\\hline \\multirow{3}{*}{Processor core} \t\t  \t  & Arithmetic operations. & \\multirow{3}{*}{ Passed } \\\\\n+\t\t\t\t\t\t\t\t\t\t\t\t\t  & Can mask instructions.  & \\\\ \n+\t\t\t\t\t\t\t\t\t\t\t\t\t  \n+\t\\hline \\multirow{3}{*}{ALU} \t\t  \t\t\t  & Computes arithmetic operations. & \\multirow{3}{*}{ Passed } \\\\\n+\t\t\t\t\t\t\t\t\t\t\t\t\t  & Can do left/right shifts.  & \\\\ \n+\t\t\t\t\t\t\t\t\t\t\t\t\t  & Performs \\emph{Set if les than} correctly. &\t\\\\\t\t\t\t\t\t\t\t  \t\t\t\t\t\t\t\t\t\t\t  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