Relax the pattern in dwzbuildid.exp

Hi,
I recently see the fail in dwzbuildid.exp below on some targets,

(gdb) print the_int
No symbol "the_int" in current context.
(gdb) FAIL: gdb.dwarf2/dwzbuildid.exp: mismatch: print the_int

Looks the pattern expects to see "No symbol table is loaded", which
is emitted in c-exp.y,

variable:       name_not_typename
....
                              if (msymbol.minsym != NULL)
                                write_exp_msymbol (pstate, msymbol);
                              else if (!have_full_symbols () && !have_partial_symbols ())
                                error (_("No symbol table is loaded.  Use the \"file\" command."));
                              else
                                error (_("No symbol \"%s\" in current context."),
                                       copy_name ($1.stoken));

it is expected to have no full symbols nor partial symbols, but something
brings full symbols or partial symbols in.  I added "maint info symtabs"
and "maint info psymtabs" in dwzbuildid.exp, and it shows symbols are from
ld.so, which has debug information.  Then, I reproduce the fail like this,

  $ make check RUNTESTFLAGS="CFLAGS_FOR_TARGET='-Wl,-rpath=${glibc_build}:${glibc_build}/math  -Wl,--dynamic-linker=${glibc_build}/elf/ld.so' dwzbuildid.exp"

${glibc_build} is the glibc build tree.  Debug information is not striped,
so the test fail.  However, if I strip debug information from libc.so, libm.so
and ld.so.  The test passes.

This patch is to relax the pattern to match the both cases that glibc build
has and has not debug information.

gdb/testsuite:

2014-05-07  Yao Qi  <yao@codesourcery.com>

	* gdb.dwarf2/dwzbuildid.exp: Match output "No symbol "the_int" in
	current context" too.
Fix an issue with "Rearrange MIPS INSN* masks" patch.

This fixes an issue with Mark Shinwell's "Rearrange MIPS INSN* masks" patch
(https://sourceware.org/ml/binutils/2007-11/msg00231.html).  In the patch
the pref instruction had its membership flags changed from I4|I32|G3 to
I4_32|G3.  Unfortunately G3 was defined as being I4, which made the actual
expanded flags as: I4|I32|I4 and therefore the membership flags should have
been I4_32.  Since the patch was committed G3 was redefined to be I4|EE.  This
fix just removes I4 from G3 making the expanded membership flags for pref as
I4_32|EE.

ChangeLog:

opcodes/
	* mips-opc.c (G3): Remove I4.
Add MIPS r3 and r5 support.

This patch firstly adds support for mips32r3 mips32r5, mips64r3
and mips64r5.  Secondly it adds support for the eretnc instruction.

ChangeLog:

bfd/
	* aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3,
	mips32r5 and mips64r5.
	* archures.c (bfd_architecture): Likewise.
	* bfd-in2.h (bfd_architecture): Likewise.
	* cpu-mips.c (arch_info_struct): Likewise.
	* elfxx-mips.c (mips_set_isa_flags): Likewise.

gas/
	* tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3
	and mips64r5.
	(ISA_HAS_64BIT_FPRS): Likewise.
	(ISA_HAS_ROR): Likewise.
	(ISA_HAS_ODD_SINGLE_FPR): Likewise.
	(ISA_HAS_MXHC1): Likewise.
	(hilo_interlocks): Likewise.
	(md_longopts): Likewise.
	(ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5.
	(ISA_HAS_DROR): Likewise.
	(options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and
	OPTION_MIPS64R5.
	(mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and
	mips64r5.
	(md_parse_option): Likewise.
	(s_mipsset): Likewise.
	(mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3
	and mips64r5.  Also change p5600 entry to be mips32r5.
	* configure.in: Add support for mips32r3, mips32r5, mips64r3 and
	mips64r5.
	* configure: Regenerate.
	* doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and
	-mips64r5 command line options.
	* doc/as.texinfo: Likewise.

gas/testsuite/
	* gas/mips/mips.exp: Add MIPS32r5 tests.  Also add the mips32r3,
	mips32r5, mips64r3 and mips64r5 isas to the testsuite.
	* gas/mips/r5.s: New test.
	* gas/mips/r5.d: Likewise.

include/opcode/
	* mips.h (INSN_ISA_MASK): Updated.
	(INSN_ISA32R3): New define.
	(INSN_ISA32R5): New define.
	(INSN_ISA64R3): New define.
	(INSN_ISA64R5): New define.
	(INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32
	INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered.
	(mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and
	mips64r5.
	(INSN_UPTO32R3): New define.
	(INSN_UPTO32R5): New define.
	(INSN_UPTO64R3): New define.
	(INSN_UPTO64R5): New define.
	(ISA_MIPS32R3): New define.
	(ISA_MIPS32R5): New define.
	(ISA_MIPS64R3): New define.
	(ISA_MIPS64R5): New define.
	(CPU_MIPS32R3): New define.
	(CPU_MIPS32R5): New define.
	(CPU_MIPS64R3): New define.
	(CPU_MIPS64R5): New define.

opcodes/
	* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
	(I34): New define.
	(I36): New define.
	(I66): New define.
	(I68): New define.
	* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
	mips64r5.
	(parse_mips_dis_option): Update MSA and virtualization support to
	allow mips64r3 and mips64r5.
aarch64: detect atomic sequences like other ll/sc architectures

gdb/Changelog:

        * aarch64-tdep.c (aarch64_software_single_step): New function.
        (aarch64_gdbarch_init): Handle single stepping of atomic sequences
        with aarch64_software_single_step.

gdb/testsuite/ChangeLog:

        * gdb.arch/aarch64-atomic-inst.c: New file.
        * gdb.arch/aarch64-atomic-inst.exp: New file.
Add proper arm config for *-*-freebsd*.
Use signed data type for R_XTENSA_DIFF* relocation offsets.

R_XTENSA_DIFF relocation offsets are in fact signed. Treat them as such.
Add testcase that examines ld behaviour on R_XTENSA_DIFF relocation
changing sign during relaxation.

2014-05-02  Volodymyr Arbatov  <arbatov@cadence.com>
	    David Weatherford  <weath@cadence.com>
	    Max Filippov  <jcmvbkbc@gmail.com>

bfd/
  * elf32-xtensa.c (relax_section): treat R_XTENSA_DIFF* relocations as
  signed.

gas/
  * config/tc-xtensa.c (md_apply_fix): mark BFD_RELOC_XTENSA_DIFF*
  fixups as signed.

ld/testsuite/
  * ld-xtensa/diff_overflow.exp, * ld-xtensa/diff_overflow1.s,
  * ld-xtensa/diff_overflow2.s: Add test for DIFF* relocation
  signedness and overflow checking.
mmo.c: Update URLs in documentation comments.
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