Unify eoma68_a20 and a20_olinuxino_m dram settings

As they are 100% identical.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: add board MK808C

HdG: Use standard dram_sun7i_384_1024_iow16.c timings instead of introducing
a copy of it.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: dram: Adjust cubietruck dram chip width and density

Cubietruck has four 4Gb x8 DDR3 chips, not two 8Gb x16. This doesn't
change anything for users, but reports correct values for timing
parameters depending on density.

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: dram: Fix autorefresh timing setup

This patch unifies sun4i and sun[5,7]i autorefresh setup functions
and adds proper tRFC calculation.

tRFC (REF command to ACT time) depends on DDR type and chip density.

On sun4i there were two steps, 127.5ns for <=1Gb density and 327.5ns
for the rest. This fits DDR2 specification for 1Gb and 4Gb chips
and shouldn't be a problems with DDR3 chips <8Gb either, but it will
waste some performance.

On sun[5,7]i however, tRFC was hardcoded to 131 clock cycles, which
seems to come from 4Gb DDR2 chips at 400MHz (327.5ns * 400MHz = 131).
For 4Gb DDR3 chips, like those on cubieboard2 and cubietruck, this
means the memory frequency was limited to ~435MHz if one doesn't want
to fall below the minimum specified tRFC for these chips.

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
ARM: HYP/non-sec: move switch to non-sec to the last boot phase

Having the switch to non-secure in the "prep" phase is causing
all kind of troubles, as that stage can be called multiple times.

Instead, move the switch to non-secure to the last possible phase,
when there is no turning back anymore.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
ARM: HYP/non-sec: add a barrier after setting SCR.NS==1

A CP15 instruction execution can be reordered, requiring an
isb to be sure it is executed in program order.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
ARM: non-sec: reset CNTVOFF to zero

Before switching to non-secure, make sure that CNTVOFF is set
to zero on all CPUs. Otherwise, kernel running in non-secure
without HYP enabled (hence using virtual timers) may observe
timers that are not synchronized, effectively seeing time
going backward...

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
ARM: add missing HYP mode constant

In order to be able to use the various mode constants (far more
readable than random hex values), add the missing HYP and A
values.

Also update arm/lib/interrupts.c to display HYP instead of an
unknown value.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
ARM: HYP/non-sec: add separate section for secure code

In anticipation of refactoring the HYP/non-secure code to run
from secure RAM, add a new linker section that will contain that
code.

Nothing is using it just yet.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
ARM: HYP/non-sec: allow relocation to secure RAM

The current non-sec switching code suffers from one major issue:
it cannot run in secure RAM, as a large part of u-boot still needs
to be run while we're switched to non-secure.

This patch reworks the whole HYP/non-secure strategy by:
- making sure the secure code is the *last* thing u-boot executes
  before entering the payload
- performing an exception return from secure mode directly into
  the payload
- allowing the code to be dynamically relocated to secure RAM
  before switching to non-secure.

This involves quite a bit of horrible code, specially as u-boot
relocation is quite primitive.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
ARM: HYP/non-sec: add generic ARMv7 PSCI code

Implement core support for PSCI. As this is generic code, it doesn't
implement anything really useful (all the functions are returning
Not Implemented).

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
ARM: HYP/non-sec: add the option for a second-stage monitor

Allow the switch to a second stage secure monitor just before
switching to non-secure.

This allows a resident piece of firmware to be active once the
kernel has been entered (the u-boot monitor is dead anyway,
its pages being reused).

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
ARM: convert arch_fixup_memory_node to a generic FDT fixup function

Some architecture needs extra device tree setup. Instead of adding
yet another hook, convert arch_fixup_memory_node to be a generic
FDT fixup function.

[maz: collapsed 3 patches into one, rewrote commit message]

Signed-off-by: Ma Haijun <mahaijuns@gmail.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
ARM: HYP/non-sec/PSCI: emit DT nodes

Generate the PSCI node in the device tree.

Also add a reserve section for the "secure" code that lives in
in normal RAM, so that the kernel knows it'd better not trip on
it.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
sunxi: fix SRAM_B/SRAM_D memory map

Move the B and D SRAM bank to their actual location (or at least
where the documentation pretends they are).

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
sunxi: HYP/non-sec: add sun7i PSCI backend

So far, only supporting the CPU_ON method.
Other functions can be added later.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
sunxi: HYP/non-sec: configure CNTFRQ on all CPUs

CNTFRQ needs to be properly configured on all CPUs. Otherwise,
virtual machines hoping to find valuable information on secondary
CPUs will be disapointed...

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arm: sunxi: Compile DRAM related code only when building SPL

The code of DRAM initialization is only of interest when building the SPL. Move
it to the CONFIG_SPL-only list of files to build.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arm: sunxi: Add basic A31 support

Add a new sun6i machine that doesn't do much for now.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arm: sunxi: Setup the A31 UART0 muxing

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>