sdhci: tegra: Do not exceed platform voltage limits

check for platform limits before setting the voltage

Bug 979504

Change-Id: Iea78be15d6a0eea0f4344c9b78ff9366f4759af8
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/104711
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
i2c: tegra: Fix possible race condition.

on tegra3, the i2c communication start immediately
after writing the tx fifo. And hence there is possibility
to complete the transfer and generates done interrupt before
actually sw updates their local pointers/count.
This patch will make sure that pointers/count can
get updated before data written into the fifo.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89510
(cherry picked from commit 999c09f0ed32f271e767a319dd094947e63fdb8c)

Change-Id: I8e974b83b5306ec3363d4ca31ce1b539a498ca08
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/99997
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
arm: tegra: cardhu: pm298: do not enable wakeup for interrupt keys

Bug 975433

MAX77663 driver hasn't implemented irq_set_wake(). Actually its
interrupt always wakes up AP. Set wakeup = false to reduce warning
messages in kernel

Change-Id: If3e44fea359e363bd99ec415f7be3c4b3945205e
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/100000
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
media: video: ov2710: add sensor group hold

Implements a group hold so that the gain, frame length, and
coarse time can all be written in one ioctl call

Also fixes AEC manual control register value

Also implements bulk i2c send in the same way as ov5650

Bug 953910

Change-Id: Iaa2e8ac6c0156564920696afaa099321db6314f6
Signed-off-by: Pablo Ceballos <pceballos@nvidia.com>
Reviewed-on: http://git-master/r/94380
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Patrick Shehane <pshehane@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
video: tegra: host: Fix error case memory leaks

When a submit fails, the related nvhost_job is not freed. Add an
explicit free. Also, 3D is mapping the save buffer, but it is not
unmapped.

Bug 991972

Change-Id: Ie335adb5e64f54557e76d12dfb6a9a1557781e8d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/105152
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
media: video: tegra: space correction

A space is missing between the words 'an' and 'independent'
in the print statement:
	dev_info(&info->i2c_client->dev,
		"%s no regulator found for %s. "
		"This board may not have an"
		"independent %s regulator.\n",
		__func__, info->vreg[j].vreg_name,
		info->vreg[j].vreg_name);

Bug 991768
Signed-off-by: Preetham Chandru <pchandru@nvidia.com>

Change-Id: Idde809c162b3b32c1db57436273af1810f03000a
Reviewed-on: http://git-master/r/105157
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
ARM: tegra: power: Go to G-CPU if minimum 1 is requested

On Tegra3 switch and stay on G-CPU if minimum 1 is requested via
PM QoS interface. Allow return to LP-CPU only if request is at
default 0 level.

Change-Id: Ie1a732fe6c6a1dcd2f7e78be01e32dcc5a7993a6
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/102120
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Satya Popuri <spopuri@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
video: tegra: host: Remove nvhost dsi driver

Remove nvhost dsi driver. Real dsi driver is in tegradc.

Bug 982965

Change-Id: I86044ba586d796ae8d049471a154dcf37bd0e6ed
Reviewed-on: http://git-master/r/104975
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
ASoC: tegra: remove compilation warning

Ensure i2s_client_bits and i2s_audio_bits do not get used
uninitialized.

Bug 949219

Change-Id: Ibdd7f2598278639388d2c2afb5843f2471375ea2
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/105426
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
serial: tegra: disable interrupt when changing configuration

Disable the interrupts when the baudrate or any uart
configuration. This will avoid the interrupt to be call
when configuration is getting change.

bug 984164
bug 969087

Change-Id: Id008964773237726a0ec4a04c428d3975bf3ebd9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/104476
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: David Yu (Engrg-SW) <davyu@nvidia.com>
Tested-by: David Yu (Engrg-SW) <davyu@nvidia.com>
arm: tegra: pci: Support for dock hot plug

PCIE dock detection is done using GPIO for cardhu
e1291 board. Currently supporting only hotplug
disconnect when all pcie devices will be stopped
and will not work on hotplug connect later.

Bug 912743
Bug 955043
Bug 946385

Change-Id: Ibb2869c12e193be5e6e7e057e149e7699598a061
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/87315
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
video: tegra: Config option for cache maint by set/ways.

Add config option to enable/disable cache maintenance by set/ways.

Change-Id: Ie795e19650b2c05cd4789dbc1e8f04f9edc70bf1
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/104290
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
arm: tegra: Enable config NVMAP_CACHE_MAINT_BY_SET_WAYS.

Change-Id: Ia6dccfbd0464bc088dfcb05cc16e7f2ad35a9783
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/104291
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
ARM: Tegra: changed pingroups

Changed pingroups with proper bit fields
provided in TRM.

Bug 978870

Change-Id: Ie02ff14448103c70e27149ac95cd487d33ab52c0
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/103353
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
ARM: tegra: cleanup wake header usage

Removed unused wake header file from Tegra board files

bug 980993

Change-Id: I61d919a2dc5b98caaca612b990fd1a7d06e76ae2
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/103622
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
rtc: tps80031: add msecure support

Bug 986402

Change-Id: Id12540e31f8d7d9a04d764ed012310a685eafb8d
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/104269
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
arm: tegra: enterprise: add gpio for pmu msecure

Bug 986402

Change-Id: Icf06b136c602639fc84ea822db8cf54078ace5fd
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/104270
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
ARM: Tegra: P1852: changed pad strengths

changed pad strengths to the values provided
by syseng.

Bug 978870

Change-Id: I23afc8235065ce8ab950dc92dc40e7df5f835989
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/105578
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>