msm: vidc: add input parameter checks to exported functions

Check for invalid null parameter passed to functions

CRs-Fixed: 606467
Change-Id: I860ca3d69d8705c7b3d6f27f9504b567be5aeea3
Signed-off-by: Jorge Solano Altamirano <jsolano@codeaurora.org>
msm: subsystem_restart: Add notification to indicate powerup failure

Currently, if powering on a subsystem during restart fails, a
kernel panic is trigerred immediately.
Instead, send a 'powerup failure' notification to the drivers
that have registered for notifications regarding the subsystem.
The drivers can then do the necessary cleanup/logging before a
kernel panic is triggered.

Change-Id: I252f221ee009436b7075c203b2a3de45e395c1b0
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
msm: ssr: Send notification during a cold boot failure

Currently, when powering on a subsystem during cold boot fails,
the drivers that have registered for notifications about the
subsystem are not intimated.
Send the 'powerup failure' notification to these drivers to give
them an opportunity to do the necessary cleanup/logging at their
end before the subsystem is shutdown.

Change-Id: I09c10d5ead7dc153ed3ce3caf8f1c3442a66eb96
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
wcnss: Log debug registers when receives certain notification

If powering on a subsystem during restart fails, SSR framework will send
a "powerup failure" notification to the subsystem. Add the support that
WCNSS platform driver will register to listen the notifications and if
receives "powerup failure" notification, it will log the debug registers.

Change-Id: I0ae8a5ee96122d71c7a86711044f6b07e400b62c
Signed-off-by: Yue Ma <yuem@codeaurora.org>
wcnss: add API to check if wcnss is undergoing an SSR

Wlan driver should not read registers from wcnss or
try to communicate with the chip when it is undergoing
a subsystem-restart. Added an API with the wcnss platform
driver to check if ssr is in progress, this API will be
used by the wlan driver to protect register access and
other prohibited operations.

Change-Id: Ia0d93e774af126d84dbaabf5c36a2c90fdbd58be
CRs-Fixed: 621974
Signed-off-by: Mihir Shete <smihir@codeaurora.org>
ksm: Provide support to use deferred timers for scanner thread

KSM thread to scan pages is getting schedule on definite timeout.
That wakes up CPU from idle state and hence may affect the power
consumption. Provide an optional support to use deferred timer
which suites low-power use-cases.

To enable deferred timers,
$ echo 1 > /sys/kernel/mm/ksm/deferred_timer

Change-Id: I07fe199f97fe1f72f9a9e1b0b757a3ac533719e8
Signed-off-by: Chintan Pandya <cpandya@codeaurora.org>
crypto: msm: fix Off-by-one error in computation of length for strlcpy()

size + strlen("qcom-") is equal to the length of string not including the
null character. However,we are comparing it to the length of the buffer,
so we need to include the null character, and make a change to make sure
(size + strlen("qcom-")) is smaller than CRYPTO_MAX_ALG_NAME.

Change-Id: I882e2c3e761a4bd4344ce8820b26cf890f29bab3
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
msm: mdss: protect command mode BW votes by tracking HW/SW states

Track two states where the BW is needed for the command mode panels
and prevent the BW vote to be released during any of those two states:
1. SW Commit State: This state is the time when the SW has requested
a BW vote, and it will be processing it; it starts at the beginning of
Commit and finish once the kickoff is issued.
2. HW MDP State: This state is the time when the HW is busy
doing the actual transaction, so bandwidth must be kept until
HW finishes; it starts at the beginning of the kickoff and finishes
once the ping pong done interrupt is received.

Change-Id: I2e56128be3ab25a1b065692ae76387a3cd383df3
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
rtc: qpnp-rtc: Set alarm control register properly

RTC Alarm enable bit does not get conserved during
RTC probe function. This patch fixes that issue.

CRs-Fixed: 636652
Change-Id: I28203b8e301510d34d2e726c0bd25e78737f7524
Signed-off-by: Mohit Aggarwal <maggarwa@codeaurora.org>
ARM: dts: msm: Increase the drive strength for MSM8610v2

At lower 10mA random CRC errors are seen. With 12mA drive
strength for clock lines the issue is not seen

CRs-Fixed: 601882
Change-Id: If2b3246c78a2d73acdedb76da964badb0e133bdd
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
defconfig: msm: iommu: Enable VBIF check for msm8974, msm8226, and apq8084

The VBIF check will help debugging issues related to IOMMU TLB sync, IOMMU
halt, and VBIF issues. With this option enabled when an issue occurs the
kernel log will contain debugging information.

Change-Id: I7c170743d3456532849358857cad454a62534da2
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
(cherry picked from commit bb125003a1da87fbda741c1c19236fcb59f6b599)
hwmon: qpnp-adc-current: Add temperature compensation

Add temperature compensation parameters for PM8026 2.1.
Compensate the vbatt voltage for temperature variance above
25degC. Add similar compensation for current compensation.

Also update using the revid api's to check for PMIC revision
instead of using peripheral revision registers. Using
revid PMIC api's makes it easy to follow on what PMIC versions
are the temperature compensation being applied to. Depending
on VADC/IADC revision registers alone may not suffice since
there is no correlation between the individual peripheral
revision and the PMIC number. You could have the same
VADC revision on different PMIC's and to avoid such a
scenario use the PMIC revid.

Change-Id: I90adb1130b2e2461f762df774ddcd018e806cf78
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
ARM: dts: msm: Add phandle to read PMIC rev-id

The VADC/IADC peripheral need to read the PMIC type
and revision to apply the corresponding coefficients
for temperature compensation to vbatt and current.
The property is optional since there are few PMIC
VADC/IADC peripherals that don't have temperature
compensation coefficients added and during such
conditions the temprerature compensation is
not applied for those channels.

Change-Id: I5229934bec71b86f923042af943a3e080ceb009b
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
qpnp-pmic: revid: Add PMIC revision ID support

Add Revision ID support for PM8226 v2.2.

Change-Id: Iadb13841bcfbbaa19642d541e5fb3f2a3f5a7544
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
hwmon: qpnp-adc: add PM8110 2.0 temperature compensation info

Add in support for PM8110 2.0 temperature compensation.
Also, fix a few bugs in the ADC compensation algorithm
where 25C was treated as 2.5C.

Change-Id: Iafa3ceca2b5938432116ecc905dd54b2da7c4b0b
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
hwmon: qpnp-adc-current: fix current compensation direction

Currently the current compensation in the IADC driver is using the wrong
polarity. The compensation function is treating the current with the
battery being the source (i.e. discharging is positive and charging is
negative), but the IADC's IBAT readings treat the battery as a sink
(i.e. charging is positive and discharging is negative).

Fix this by reversing the sign of the iadc current readings before
doing compensation.

Change-Id: I1413ce491b1f430b6a78bfc480174321c512e289
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
hwmon: qpnp-adc-current: log the compensation coefficients

The compensation coefficients are used to execute performance
tests. Provide this information in the debug logs of the IADC driver.

Change-Id: I59df9501d8edf652c6cf0999a17cc820115b07cc
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
hwmon: qpnp-adc-current: Add temperature compensation

Add temperature compensation for IADC PM8026v2.2.
It shares the same temperature compensation parameters
as PM8026v2.1. The temperature compensation is required
on top of gain/offset calibration to compensate
for variations due to chip revision, manufacturer and
temperature.

Change-Id: Ic39ba249d8d28c36bf59d650dcc2c2a3889ee55b
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
hwmon: qpnp-adc-voltage: Add temperature compensation

Add VBAT and OCV temperature compensation for PM8026v2.2.
The temperature compensation is required on top of
gain/offset calibration to compensate for variations due
to chip revision, manufacturer and temperature.

Change-Id: I7c62340a74a118d6f80e4e6bba51c2d07c4a57c6
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
hwmon: qpnp-adc-voltage: Modify temperature compensation

Apply temperature compensation to minimum(die_temp, 60degC)
for vbatt compensation. For OCV temperature compensation
apply the compensation based on the die_temp for the
corresponding PMIC. The temperature compensation is
required on top of gain/offset calibration to compensate
for variations due to chip revision, manufacturer
and temperature.

Change-Id: I0826993ddebe7dae2f033d995fa1266f9509002c
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>