X86: Emit test instead of constant shift + compare if the shift result is unused.

This allows us to compile
  return (mask & 0x8 ? a : b);
into
  testb $8, %dil
  cmovnel %edx, %esi
instead of
  andl  $8, %edi
  shrl  $3, %edi
  cmovnel %edx, %esi

which we formed previously because dag combiner canonicalizes setcc of and into shift.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207088 91177308-0d34-0410-b5e6-96231b3b80d8
[CLNUP] Test commit. Remove newline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207089 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] We don't actually need a set in each SCC to track the nodes. We
can use the node -> SCC mapping in the top-level graph to test this on
the rare occasions we need it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207090 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] Switch the parent SCC tracking from a SmallSetVector to
a SmallPtrSet. Currently, there is no need for stable iteration in this
dimension, and I now thing there won't need to be going forward.

If this is ever re-introduced in any form, it needs to not be
a SetVector based solution because removal cannot be linear. There will
be many SCCs with large numbers of parents. When encountering these, the
incremental SCC update for intra-SCC edge removal was quadratic due to
linear removal (kind of).

I'm really hoping we can avoid having an ordering property here at all
though...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207091 91177308-0d34-0410-b5e6-96231b3b80d8
[asan] Fix instrumentation of x86 intel syntax inline assembly.

Patch by Yuri Gorshenin.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207092 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] Re-order expectations to provide more useful output when debugging
an issue. This way you see that the number of nodes was wrong before
a crash due to accessing too many nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207094 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] Rotate logic applied to the top of the DFSStack to instead be
applied prior to pushing a node onto the DFSStack. This is the first
step toward avoiding the stack entirely for leaf nodes. It also
simplifies things a bit and I think is pointing the way toward factoring
some more of the shared logic out of the two implementations.

It is also making it more obvious how to restructure the loops
themselves to be a bit easier to read (although no different in terms of
functionality).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207095 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] Incorporate the core trick of improvements on the naive Tarjan's
algorithm here: http://dl.acm.org/citation.cfm?id=177301.

The idea of isolating the roots has even more relevance when using the
stack not just to implement the DFS but also to implement the recursive
step. Because we use it for the recursive step, to isolate the roots we
need to maintain two stacks: one for our recursive DFS walk, and another
of the nodes that have been walked. The nice thing is that the latter
will be half the size. It also fixes a complete hack where we scanned
backwards over the stack to find the next potential-root to continue
processing. Now that is always the top of the DFS stack.

While this is a really nice improvement already (IMO) it further opens
the door for two important simplifications:

1) De-duplicating some of the code across the two different walks. I've
   actually made the duplication a bit worse in some senses with this
   patch because the two are starting to converge.
2) Dramatically simplifying the loop structures of both walks.

I wanted to do those separately as they'll be essentially *just* CFG
restructuring. This patch on the other hand actually uses different
datastructures to implement the algorithm itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207098 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: port more tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207101 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: implement BFI optimisation

ARM64 was not producing pure BFI instructions for bitfield insertion
operations, unlike AArch64. The approach had to be a little different (in
ISelDAGToDAG rather than ISelLowering), and the outcomes aren't identical but
hopefully this gives it similar power.

This should address PR19424.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207102 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: port bitfield test to ARM64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207103 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: enable some MC tests on ARM64

This will also (as with CodeGen) disable testing when the ARM64 backend is not
present.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207104 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operands

These can have different relocations in ELF. In particular both:

    b.eq global
    ldr x0, global

are valid, giving different relocations. The only possible way to distinguish
them is via a different fixup, so the operands had to be separated throughout
the backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207105 91177308-0d34-0410-b5e6-96231b3b80d8
ARM64: shut up warning about variable only used in assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207106 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: add support for :abs_gN_s: MOVZ modifiers

We only need assembly support, so it's fairly easy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207108 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: support relocated ADR instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207109 91177308-0d34-0410-b5e6-96231b3b80d8
ARM64: support relocated "TBZ/TBNZ" instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207110 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: allow negative addends, at least on ELF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207111 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: enable remaining MC elf tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207112 91177308-0d34-0410-b5e6-96231b3b80d8
[asan] Use MCInstrInfo in inline asm instrumentation.

Patch by Yuri Gorshenin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207115 91177308-0d34-0410-b5e6-96231b3b80d8