serial: allow option to disable 'temt' test

The implementation of the NS16550 used in the FPGA emulation for
Xtensa doesn't support the TEMT register, so provide an option to
disable the test, by defining CONFIG_SYS_NS16550_BROKEN_TEMT.

Signed-off-by: Chris Zankel <chris@zankel.net>
net/ethoc: support private memory configurations

The 'ethoc' device could also be configured to have a private memory
region instead of having access to the main memory. In that case,
the packets must be copied into (transmit) or out of (receive) that
memory.

This behavior is configured by defining CONFIG_SYS_ETHOC_BUFFER_ADDR.
Make sure to have enough memory for the configured buffers
(one for transmit, and 'PKTBUFSRX' for receive)

Signed-off-by: Chris Zankel <chris@zankel.net>
xtensa: add support for the xtensa processor architecture [1/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Cadence.

This is the first part of the basic architecture port with changes to
common files. The 'arch/xtensa' directory, and boards and additional
drivers will be in separate commits.

Signed-off-by: Chris Zankel <chris@zankel.net>
xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
xtensa: add core information for the dc232b processor

Signed-off-by: Chris Zankel <chris@zankel.net>
xtensa: add support for the 'xtfpga' evaluation board

The 'xtfpga' board is actually a set of FPGA evaluation boards that
can be configured to run an Xtensa processor.

 - Avnet Xilinx LX60
 - Avnet Xilinx LX110
 - Avnet Xilinx LX200
 - Xilinx ML605
 - Xilinx KC705

These boards share the same components (open-ethernet, ns16550 serial,
lcd display, flash, etc.).

Signed-off-by: Chris Zankel <chris@zankel.net>