common/aperture.ad*: Provide package for bit-level manipulation

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
arch/x86/x86-locks: Provide a spin-lock implementation

This provides an x86 locking implementation of which causes a thread
trying to acquire the lock to simply wait in a loop /spin/ while
repeatedly checking if the lock is available. This is because some
synchronisation mechanism is required at the entry and exit of the
critical section to ensure exclusive use of certain shared hardware
resources. For example, as to not corrupt the serial UART telemetry.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
arch/x86/x86-io.ad*: Provide x86 port read/write procedures

Note however the implementation body given has inline machine code
specific to the 'x86' ISA. We now wrap the ISA specific implementation
of I/O operations with the 'common/aperture-io.ads' package.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
arch/x86/x86-io-pnp.ad*: Provide common PNP IO procedures

These are typically needed for configuration of the Super I/O.
Ideally this implementation should later be updated to leverage
devicetree over hard-coded values and taking parameters.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
arch/x86/x86-io-pci.ad*: (WIP) PCI ported IO procedures

These allow for reading and writing into PCI configuration space using
ported I/O since before RAM is working we of course do not yet have
memory-mapped I/O. These are still a work-in-progress.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
arch/x86/x86-cpu.ad*: Provide x86 CPU register procedures

Provide a low-level API to access important 'x86' registers.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Provide serial uart driver for 8250 type and corresponding library

This implements the serial UART component for 8250 type serial UART's.
We also implement the various bits needed for the console subsystem.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
cpu/x86: Entry point assembler for the bootblock

This was pretty much taken verbatim from Coreboot. The CPU first runs
the entry16 'real mode' code and then jumps immediately to the entry32
'protected mode' code. From this point on the processor can now execute
code in 32bit protected mode.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
bootblock: Hook bootblock up into a rudimentary build system

Add more #includes for more assembly code you want to execute right
after the 32bit entry code eg. the CAR assembly.

The bootblock.ld is then used to link that to a 0xfffff000 address.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
README.md: Short update

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
README.md: Update some notes about AMD CAR implementation

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
cpu/amd/agesa: Import AMD AGESA CAR implementation from coreboot

This imports the raw elements needed for a AMD AGESA CAR implementation
from Coreboot as-is, including any needed headers stripped down somewhat.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
cpu: Hook up CAR into bootblock and provide basic Ada entrypoint

See COMPILE notes ~ need a build system now..

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Hook up a basic build system

This needs a lot more work..

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>