cpu: atmega2560: periph/timer: preliminary timer implementation

There are still some issues:
    - Right now the timer always runs with 16 MHz and uses internal counters to
    adjust ticks_per_us (splitting out 2MHz (and 1MHz with it would be possible
    but add complexity)
    - Due tu using 16 MHz timers there is only a relatively small time span
    until the timer overflows
    - The implementation has a high degree of complexity even in this state
    - TODO: Use a counter to "blow up" the timers to 32 Bit artificially
    - TODO: Switch to board agnostic implementation
cpu: atmega2560: timer: switch to board agnostic implementation of timer interface