[TASK] Add optional bitstream generation

Add option to hardware CMake project which bypasses the bitstream
generation.

Change-Id: I79270d7ae0f5955ee55c695947979670abeec177
[FEATURE] Add dual processor lib using shared memory

This library is designed for systems where the user and kernel layer
of openPOWERLINK run on different processors and shared memory
is used as the interface between the two processors.

The dual processor library requires the hardware to support two types
of memory: Common and dynamic memory.

The common memory can be used for exchanging status, errors, states
etc. and is used for creating dynamic memory mapping table used to
share the address for dynamically allocated shared memories.

Dynamic memory can be allocated at run time by any one of the processor
and these addresses are made available to the other processor through
the dynamic memory mapping table.

The library also provides support for handling interrupts for such
systems.

Change-Id: If6977cd52670480785c5c2c029f59f0bf780a187
Signed-off-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FEATURE] Add CAL for dualprocshm library for no OS

Implement CAL for dual processor library (dualprocshm) for targets
without any OS.

Change-Id: Ia4248c359a207cd4e7727d350e5c78e6727c39ac
Signed-off-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FEATURE] Add generic MN stack libraries for dualprocshm CAL

- Add cmake stack library project files to compile MN with dual
  processor shared memory interface.
- Add configuration for Xilinx ARM and Microblaze

Change-Id: Ib29b2de6b3220e918957422b44fbf93e838a8870
Signed-off-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FEATURE] Add SD FAT16 file system access library

This library provides a file system support to allow an application
running on ARM core of Zynq accessing files (CDC) on a SD CARD.
Note: Please refer to readme.md for this library license information!

Change-Id: I388103366822c5a4af8025d11616b7d73f5ea488
Signed-off-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FEATURE] Add Zynq FSBL cmake project

The Zynq first stage bootloader (FSBL) uses boot.bin file placed
on a FAT32 SDCARD initializing host and pcp binaries in the DDR memory.

The bootloader code is part of Xilinx install directory and is
imported and built through cmake for openPOWERLINK demos on Zynq.

Change-Id: Ia68440e81c35029a6cb3b3ba33f57b501a1289a1
Signed-off-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
[FEATURE] Add Quartus and Qsys project for Antares Interface

- Add MN pcp subsystem
- Add 256kx16 SRAM (tri-state-bridge)
- Add openMAC for single phy
- Add EPCS ipcore for M25P80 flash

TODO:
- Add PCIe
- Add LED control
- Connect config pins
- Connect unused outputs

Change-Id: I3df33fb6c4f5142a8f32f6a0ca48523fe3881713