mesa: trim down some #includes
mesa: fix UNCLAMPED_FLOAT_TO_UBYTE() macro for MSVC

MSVC replaces the "F" in "255.0F" with the macro argument which leads
to an error.  s/F/FLT/ to avoid that.

It turns out we weren't using this macro at all on MSVC until the
recent "mesa: Drop USE_IEEE define." change.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
u_vbuf: simple whitespace fix
radeonsi: Simplify si_dma_copy_tile function

No functional change intended.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
glsl: mark variable as loop constant when it is set read only

Patch modifies is_loop_constant() to take advantage of 'read_only' bit
in ir_variable to detect a loop constant. Variables marked read-only
are loop constant like mentioned by a comment in the function.

v2: remove unnecessary comment (Francisco)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82537
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
glsl: allow precision qualifier on sampler arrays

If a precision qualifer is allowed on type T, it should be allowed
on an array of T.  Refactor the check to ensure this is the case.

(Fixes failures in WebGL conformance test 'gl-min-textures')

Signed-off-by: Frank Henigman <fjhenigman@google.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
ilo: update genhw headers

Add some new registers and some tweaks.  The changes that affect ilo are

 GEN6_REG_HS_INVOCATION_COUNT -> GEN7_REG_HS_INVOCATION_COUNT
 GEN6_REG_DS_INVOCATION_COUNT -> GEN7_REG_DS_INVOCATION_COUNT
 GEN6_COND_NORMAL             -> GEN6_COND_NONE
ilo: add a new disassembler

The old disassembler was modified from i965's.  It is as much work as doing a
new one to keep it up-to-date, which also requires copying more headers over.

The outputs of this new disassembler should match i965's as closely as
possible.
scons: add /dynamicbase and /nxcompat to MSVC linkflags

This builds the opengl DLLs with address layout space randomization
(ASLR) and data execution prevention (DEP) for better security.

Reviewed-by: Kurt Daverman <krd@vmware.com>
scons: add /dynamicbase and /nxcompat to MinGW linkflags

Just like b26503b196d51dc46c815e241343e42ab30e8d66 for MSVC.