dma: dw: add a PCI ID for Intel Haswell SoC

In case of PCI mode the DMA controller has a specific ID. Put this ID to the
list of supported.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 24066813d55bb4ea058fd4a8fbc3538dfe032782)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dma: dw: remove leftovers in the comment blocks

There is couple of leftovers in the comment blocks. This patch modifies the
comments accordingly.

There is no functional change.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit dd5720b3006210ecdf4e3c8889e6051f432c4ba3)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dma: dw: allocate memory in two stages in probe

This makes the probe() function a little bit clearer.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 000871ce0336572f5b126a4d7f1ec13fc9adfda2)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dma: dw: Add suspend and resume handling for PCI mode DW_DMAC.

This is to disable/enable DW_DMAC hw during late suspend/early resume.
Since DMA is providing service to other clients (eg: SPI, HSUART),
we need to ensure DMA suspends after the clients and resume
before the clients are active.

Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 4501fe61b286e35be5b372a4f1ffcf5881ceeaed)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dmaengine: dw: move PM to suspend_late / resume_early stages

There is no need to use *_noirq version of suspend and resume PM callbacks. The
suspend_late / resume_early suit better (it was discussed in [1]) and in future
could be used for runtime PM support.

[1] http://www.spinics.net/lists/kernel/msg1650974.html

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 067bd4fdfa17c3bbdac09b401667e967c81eb2b7)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dmaengine: dw: convert to use SET_LATE_SYSTEM_SLEEP_PM_OPS

The commit 4501fe61 "dma: dw: Add suspend and resume handling for PCI mode
DW_DMAC." introduces system power management callbacks. Regarding to commit
f78c4cff "PM / Sleep: Add macro to define common late/early system PM
callbacks" we have nice macro to setup dev_pm_ops structure. This patch
converts a driver to use the macro.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit c31b6ae1b4a75680765ac66d80e2e107e8bf05a0)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dma: remove DEFINE_PCI_DEVICE_TABLE macro

Don't use DEFINE_PCI_DEVICE_TABLE macro, because this macro
is deprecated.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 7587821d3d0812fde4799657aa6d32a57d655bcd)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dmaengine: dw: enable clock before access

hclk signal is a bus clock. So, it means we have to have it enabled during
access to the DMA controller. This patch makes sure that we enable clock before
access to the device, though it currently works on Intel hardware.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit d2f78e95e42a9130002c76f1a1f76e657a4b4004)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dmaengine: dw: fix regression in dw_probe() function

The commit dbde5c29 "dw_dmac: use devm_* functions to simplify code" turns
probe function to use devm_* helpers and simultaneously brings a regression.

We have to 1) call clk_disable_unprepare() on error path, and 2) check error
code of clk_enable_prepare(). First part was done in the original code, second
one is an update.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 8be4f523b48087765defd18483c66b268b3286e5)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dmaengine: dw: check return code of dma_async_device_register()

dma_async_device_register() may return non-zero error code. In such case we
have to follow error path.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 1222934e54b63752b4b1ad305d6a7f632a3ae46d)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dmaengine: dw: add debug message to dwc_dostart_first_queued

It would be useful to know when the first descriptor in the queue is started
along with its cookie.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit cba15617c37cc6082c286c2a272202565f62e7bc)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dmaengine: dw: move dw_dmac.h to where it belongs to

There is a common storage for platform data related structures and definitions
inside kernel source tree. The patch moves file from include/linux to
include/linux/platform_data and renames it acoordingly. The users are also
updated.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
[For the arch/avr32/.* and .*sound/atmel.*]
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 3d598f47e804a77208c6bb0a454123018e2f2281)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
avr32: at32ap700x: don't rely on default DMA masters

In future we are going to remove the defaults of AHB masters from dw_dmac
driver. It means each user have to supply proper source and destination masters
by itself explicitly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 61c4319cb523a2346416cddaa7d4e2f9260c14d9)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dmaengine: dw: convert dw_dma_slave to use explicit HS interfaces

Instead of exposing the possibility to set DMA registers CFG_HI and CFG_LO
strict user to provide handshake interfaces explicitly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 7e1e2f27c5508518e58e5cbb11e26cbb815f4c56)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dmaengine: dw: apply both HS interfaces and remove slave_id usage

Instead of one request line member let's use both source and destination ones.
Usually we have no such hardware except Atmel MMC controller found on AVR32
platform (see arch/avr32/mach-at32ap/at32ap700x.c and
drivers/mmc/host/atmel-mci.c).

This patch removes slave_id usage since it'll be removed from the generic
structure in later. This breaks the non-ACPI / non-DT cases for the users of
the driver, i.e. SPI and HSUART. However, these cases mean only PCI enumerated
devices for now, which is anyway broken (considering more than one DMA
controller in the system) and this patch series is intended to fix that
eventually.

The ACPI and DT cases shall be aware of the channel direction when setting
request lines, but this is a minor problem that would be addressed in future.

Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 8950052029874a6738552debb45077c596e90e6b)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dmaengine: dw: introduce generic filter function

The introduced filter function would be reused in the ACPI and DT cases since
in those cases we have to apply mandatory data to the requested channel. Thus,
patch moves platform driver to use it in that case.

The function unlikely can't be used by users of the driver due to an implicit
dependency to the dw_dmac_core module.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit 4d130de20c3f39fc1a1aecd3969b50d49ff2e358)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dmaengine: dw: move clock operations to platform.c

On BayTrail platform DMA is not functional in the PCI mode, whereby it always
failed and exit at the point when it tries to get a clock. It causes the PCI
mode probe to exit with the error message:
	dw_dmac_pci: probe of 0000:00:1e.0 failed with error -2

This patch moves clock operations to where it belongs to. Thus, the clock is
provided only in ACPI / non-PCI cases.

Reported-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit a15636e83eb0dedefcb1221be729023e4c281748)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
dmaengine: dw: add PCI IDs for Braswell DMAs

Braswell SoC has two DMA controllers for LPSS. This patch adds them to
supported list in the PCI driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit b279c4922e9242b4b1a04da7fa5622f2323c85de)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>