msm: acpuclock-7627: Correct the mask for disabling the pll4

The current mask for disabling the PLL4 before reprogramming
would lead to resetting the pll_enabled bitmap, which would
lead to wrong information while disabling the unused enabled PLL
at the end of the switch.

Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
(cherry picked from commit 8c239d7ecbcce524c631d82abed7c39fad11b4a1)

Change-Id: I9e955b257070f336cb14a72fe2d602ecbdbe419c
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: acpuclock-7627: Avoid AXI freq. change while going into power collapse

There is no reason to change the AXI freq. while going into the PC
since the same AXI frequency is maintained by vote while coming
out of the PC. If the suspend power collapse happens from the
arch_idle path then we would see the sleeping calls while atomic
warning due to mutex being held in the clk_set_rate calls.

Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
(cherry picked from commit b6b3998a08d8f6a1f54a612a1f6e6fca9b0f27f5)

Change-Id: Idc6a0b35360ac731eaa187b2afb9242541a17ce3
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: acpuclock-7627: Skip TCXO PLL for clk_enable

The acpuclock driver only needs to control and vote
the PLLs except TCXO. The clock pll driver doesn't maintain
TCXO as pll.

Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
(cherry picked from commit 1163e8cff1acf958fcca102252425ca20caf1d1f)

Change-Id: I1bf1d23d1ef079857d251bd152c99a41d544b4da
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: acpuclock: Update jiffies while doing intermediate freq. switches

It is important to update the jiffies while doing the intermediate
frequency switches so that delay gets calculated correctly. If
not done then it is possible that some of the slow devices
would fail to transition to highest frequencies.

CRs-Fixed: 397419
CRs-Fixed: 397271
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
(cherry picked from commit 613d2d8720018071a6f1c62e73ffc27c924cb68f)

Change-Id: I7228182d12427630dee959b10812c2b21bf80609
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
Revert "msm: acpuclock-7627: Avoid AXI freq. change while going into power collapse"

This reverts commit 73f5eda9aef9cbf6c7a6c9b3b2f4522e2af3e9dc.

Change-Id: Ib1595d57ea4382a8132674c08729072b11375406
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: acpuclock: Select proper target frequency row for update_jiffies

Update jiffies function is called with wrong target frequency which
could result in the incorrect udelay once the frequency is changed.
Select the final target row so that the lpj is updated properly.

Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
(cherry picked from commit 9d4c4f8bfa68aae7fc51d510387c2e9d7a4c4a14)

Change-Id: I643540bbbbbb197fcd3b08722bfef4b253049c5a
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: acpuclock: Correct voltage levels for CDMA only clock plans

Some of the CDMA only clock plans used for 8625 v1.0/2.0 has
in-correct mapping of the voltage level, use the right value
as per the clock plan information. This doesn't have any power impact
since the all of the nominal clock frequencies have the same
1.1v requirement.

Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
(cherry picked from commit 55b7af9cc523e98cbec5dfc278f75fc854bd451c)

Change-Id: I6da95b947dfddc7246a965ee97aeaefdf36009dd
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: acpuclock: Convert 8625 v1.0 1152Mhz plan to dynamic reprogram

Convert 8625 v1.0 1152Mhz cpufreq clock plan to use the dynamic
reprogram based method with the new clock plan as supported on
8625 v2.0.

Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
(cherry picked from commit 2c2ec160617f50d8332b5f4bf4a91b2084e9a5c2)

Change-Id: Ia64cc18e4f8f37772bec3f72c97c4acfa6ea0adf
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: acpuclock: Use 1GHz v2.0 clock plan for 8625 v1.0 chip

Support 1GHz 8625 v1.0 chip to use the dynamic reprogramming based
clock plan method.

Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
(cherry picked from commit 72cacdba8f1f4d9043f7f2c84ea1ba9c62ba6db7)

Change-Id: If9d1fb133057189ad68b65c29ad7b778c129b7b7
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: acpuclock: Add support for 1.104GHz for 8625 v1.0

Add acpuclock plan for 1.104GHz configuration on 8625v1.0
MSMs.

Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
(cherry picked from commit 4a0be01e911e1ffe7de85e7865f4ede8218772ae)

Change-Id: If483e4e6200cb18925e10c10f0b14e18904665da
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: acpuclock-7627: Fix Frequency plan selection based on Correct PLL.

While selecting a frequency plan for 1008 MHZ, ACPU_PLL_2 frequency
is compared with 245MHZ instead of ACPU_PLL_1.Fix it by changing
it to ACPU_PLL_1.

CRs-Fixed: 432570
Change-Id: Id2fb0af3cd40a55451c0a2912ed72be2887e422f
Acked-by: Manish Poddar <mpoddar@qti.qualcomm.com>
Signed-off-by: Utsab Bose <ubose@codeaurora.org>