target-xtensa: fix build for cores w/o windowed registers

Cores without windowed registers don't have window overflow/underflow
vectors. Move these vectors to a separate group defined conditionally.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
target-xtensa: add test_kc705_ca core

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
target-xtensa: add cpu3400 core

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
target-xtensa: add dsp3400 core

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
target-xtensa: provide GDB support for the fsf core

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
target-xtensa: add test_kc705_be core

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
target-xtensa: add dc233_xea3 core

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
target-xtensa: add lx106 core

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
target-xtensa: add core importing script

This script copies configuration and gdb information from the xtensa
configuration overlay archive and registers new xtensa core.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>