asoc: tegra: MAX98088 machine: Add support for setting bias level

Allow setting bias level to turn off clock extern1 when codec
is idle for enterprise board. (Maxim 98088 codec)

Bug 984678

Change-Id: Ib01be71362ab0c5525f570693b41db73777875e6
Signed-off-by: Ankit Gupta <ankitgupta@nvidia.com>
Reviewed-on: http://git-master/r/102240
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>