sf: Use DirtyRect to optimize Full GPU composition

Use layer DirtyRect information in optimizing full GPU composition by
using startTile and endTile GL calls.

Change-Id: Iec0f9de2ce667438bbcc00d02e500055068df05a
sf: Validate display device id and disable dirtyrect composition

1. Add validation check for display device id to prevent out of bound
   array access.
2. Disable Dirty rect composition feature for GPU by default

Change-Id: I4976468bb156fff197c8c38fe680e10512b4feb5
frameworks/native:  Reset dirtyRect after every queuebuffer call.

Sometimes HWR does not generate dirtyRect even when it updates the
buffer. To avoid incorrect DR calculation in such cases reset
cached dirtyRect after every queueBuffer call.

Change-Id: Iad9a2b1ecb4cf2a3789f2734a2d0e928dc56c9f0
binder: update MemoryHeapIon

* Update from ODROID-XU 04212014 BSP

Change-Id: Ifc2664bcde37a71d855e05e7c9e50288a4508892
reduce PB size from 2MB to 512KB

this allows us to enable h/w acceleration on low-end
devices while keeping memory usage down.

Bug: 6557760
Change-Id: I8af2de3038dc2579360b8b73aa452cb7a0e506a9
egl: Add support for BGRA_8888 format

* Select with BOARD_USE_BGRA_8888 flag

Change-Id: I79a5a9edfef9c264eeeb9807797d03208f9bdbd7
Fix QCOM_BSP ifdef

Change-Id: Ibeee2edadcf03b92f31cf3af3c0be0e2e0af023d
egl: Fix typo

Change-Id: I897eadaa8f093ef1bd29bf93a43c9256d501aff8
SF: Fix Klockwork errors.

Resolve klockwork errors in frameworks/native
to avoid buffer overflow and memory leaks.

Change-Id: I7af17047538e621c872377090cea5b96f0924883
sf:  Add dirtyRect information to SF dumpsys

Display dirtyRect information generated for each layer in
SurfaceFlinger Dumpsys.

Change-Id: Ie60f4bf67bc28af0fcce006c166d8ae4ed4985e8
sf: Use Dirty Rect optimization in "Show Surface Updates" setting

When "Show Surface Updates" setting is ON in developer options, flash the
updating part (union dirty rect) instead of full layers when
GPU Tiled DR optimization is ON.

Change-Id: Id280cc2a22d46cc6539316d6dd0856e328c14c9e
CRs-Fixed: 679386
SF: Modify logic to handle "transparent Region" for displayFrame

sourceCrop and displayFrame calculations according to "transparent Region"
are not synchronized. Because of this mismatch scaling is introduced,
causing corruption in UI. To avoid this scaling, map displayFrame to
sourceCrop, apply reduce and remap result to displayFrame.

CRs-Fixed: 660699

Change-Id: I1e7ad5b1c8932413f53bb94a2e62895661b97057
Init display orientation according to panel orientation

   - Initialize the display default orientation to panel orientation.
   - honor the panel orientation only after the end of boot animation
     or the new orientation is as same as panel orientation.

Change-Id: Ieece097ff7c3710e379f47028900aed59a96c8d5
SF: Ensure boot animation always appears in panel orientation

Ensure that boot animation is always shown in panel
orientation.

Change-Id: I36a75ba5aea803a7b7cace3335a0d7f730612c5d
CRs-Fixed: 604934
sf: Set view frame of each display using binder

Set the view frame of a display using binder when set projection
for that display changes

Change-Id: Ib85ce80e88b207a4cf2559b2cc0e74e60ab3d4d4
surfaceflinger: Track the last surfaceview frame for latency dumps

When measuring GL latency with dumpsys, it's possible to hit a
race condition if the hardware is fast enough to complete rendering
the test cycle before the latency dump is requested, since it only
matches the latency for live layers (unless it's an animation. See
change I8bded1ea08a4cddefef0aa955401052bb9107c90)

So always save a reference to the last rendered SurfaceView frame,
and dump its values if there isn't an active one.

Change-Id: I740e9830161396ea955b5a53322bd8576b5136bc
Move idmap to frameworks/base [1/2]

idmap depends on libandroidfw, so it should go in frameworks/base.
This follows AOSP which moved idmap to frameworks/base back in
February of 2014.

Change-Id: If86df906bddf987fd58e31f947ae78ddd0d2c666
frameworks/native: Modify dirtyRect only on GPU pre-rotation.

Modify layer dirtyRect only when the buffers are pre-rotated by
GPU, not when the buffers are scheduled to be rotated during
composition.

Change-Id: I6dd3c0a9c62fd2b48e58ecd872b37b0655a02958
sf: Fix incorrect state reporting in dumpsys

Dumpsys utility access layer compositionType variable
with out proper protection. These variables are modified
during hwc_prepare call. Existing HAL lock protection is not
sufficient to address this issue. Failure to do this will
result in incorrect state reporting in dumpsys.

A new drawLock mutex in HWComposer that will be used in both
dumpsys and draw calls to ensure correct state is accessed.

Change-Id: I6289e0a3d1f5bbf35a18ddcd0538c9cda3e96c27
sf: Enable GPU Tiled DR optimization for overlap and mixed mode use cases

Extend the GPU Tiled DR optimization to Overlapping layers use cases
and mixed mode composition.

Change-Id: Iaba496be21d5c4ceeedfe3405cf26b36677cd14b