Fix an ODR violation consisting of two 'struct Query' in the global namespace.

Put them in their own anonymous namespaces. Found by GCC's new -Wodr (PR20915).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217662 91177308-0d34-0410-b5e6-96231b3b80d8
Add CMake check for libatomic.



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Fix gcc -Wpedantic.

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Legalizer: Use the scalar bit width when promoting bit counting instrs on
vectors.

e.g. when promoting ctlz from <2 x i32> to <2 x i64> we have to fixup
the result by 32 bits, not 64. PR20917.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217671 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM] Teach the cost model that cross-class copies are costly.

Cross-class copies being expensive is actually a trait of the microarchitecture, but as I haven't yet seen an example of a microarchitecture where they're cheap it seems best to just enable this by default, covering the non-mcpu build case.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217674 91177308-0d34-0410-b5e6-96231b3b80d8
[mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions
Differential Revision: http://reviews.llvm.org/D5211


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[mips][microMIPS] Implement JALS and JALRS instructions.
Differential Revision: http://reviews.llvm.org/D5003


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217676 91177308-0d34-0410-b5e6-96231b3b80d8
[mips][microMIPS] Implement BGEZALS and BLTZALS instructions
Differential Revision: http://reviews.llvm.org/D5004


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217678 91177308-0d34-0410-b5e6-96231b3b80d8
Address comments on r217622

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[mips][microMIPS] Implement JRADDIUSP instruction
Differential Revision: http://reviews.llvm.org/D5046


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217681 91177308-0d34-0410-b5e6-96231b3b80d8
[A57LoadBalancing] unique_ptr-ify.

Thanks to David Blakie for the in-depth review!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217682 91177308-0d34-0410-b5e6-96231b3b80d8
llvm/test/CodeGen/X86/vec_ctbits.ll: Add explicit -mtriple=x86_64-unknown. It was incompatible to Win32 x64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217683 91177308-0d34-0410-b5e6-96231b3b80d8
sys::fs::access(): Fix @param [-Wdocumentation]

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Move sys::fs::AccessMode out of @brief in the function. [-Wdocumentation]

FIXME: Annotate sys::fs::AccessMode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217685 91177308-0d34-0410-b5e6-96231b3b80d8
[lit] Parse all strings as UTF-8 rather than ASCII.

As far as I can tell UTF-8 has been supported since the beginning of Python's
codec support, and it's the de facto standard for text these days, at least
for primarily-English text. This allows us to put Unicode into lit RUN lines.

rdar://problem/18311663

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[A57FPLoadBalancing] Ignore <def>s when checking if a chain may be killed.

Defs are seen before uses, so a def without the kill flag doesn't necessarily
mean that the register is not killed on that instruction. It may be killed
in a later use operand.

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[A57FPLoadBalancing] Remove support for vector types

Vector MUL/MLAs have tied operands, which gives us extra constraints
that we currently can't handle. Instead of silently doing the wrong
thing, remove support to be readded later properly.

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[AArch64] Enable post-RA MI scheduler.

Phabricator Revision: http://reviews.llvm.org/D5278
Patch by Sanjin Sijaric!

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Add support for le64.

Summary:
le64 is a generic little-endian 64-bit processor, mimicking le32.

Depends on D5318.

Test Plan: make check-all

Reviewers: dschuff

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5319

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FileCheckize. NFC.

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