Straight-line code generation.

This involves a new AST visitor pass and a "codegen context", which
holds a set of current bindings and a handle to IR-in-progress with the
basic block whose tail end corresponds to the current program point
being visited.

Control flow is not yet supported, though the infrastructure is in place
for this.

Many small fixes to make this happen, too:

- Minor changes in the way that port reads/writes are parsed.

- Linkage in frontend driver to generate IR and invoke the backend.

- Additional linkages in type-inference: inference graph should now be
  'strict' (in the sense that it captures restriction that must be
  present for the program to be correct, not just enough linkages to
  ensure that we *should* infer something -- graph is necessary for
  typechecking too!)