Adds support to ARMv7's register cache for not loading a destination register prior to overwriting.

This extends the register cache's BindToRegister function with a doLoad argument just like x86's.
The speedup is minor for these implemented integer instructions.
Adds support back for non-immediate cmp/cmpi to ARMv7 JIT.
Optimizes instructions in ARMv7's JIT inside of the arith function.

For instructions where the second immediate value fits within an instruction encoding, just encode it directly in to the instruction.
Merge pull request #1375 from Sonicadvance1/ARMv7-optimizations

Minor ARMv7 JIT recompiler optimizations.