cpu/arm/k60: read IPSR register in unhandled interrupt handler.

Ported 941d7fe7e22ab26e727cf93b489f2fde0b7bf6a8 by
Henrik Mäkitaavola<henrik.makitaavola@gmail.com> to use CMSIS.

Signed-off-by: Joakim Gebart <joakim.gebart@eistec.se>
cpu/k60: Refactor to use CMSIS Core.

Including:
 - Updated to use CMSIS variants of all register accesses.
 - NVIC_* macros from core_cm4.h for handling interrupts instead of raw register accesses.
 - core_clocks_init() renamed to SystemInit()

Signed-off-by: Joakim Gebart <joakim.gebart@eistec.se>
platform/mulle: Refactor udelay.

 - Fix from da62ba3bd13 for zero us delay by Henrik Mäkitaavola.
 - Added comments for readability.
 - Use bit banding when only setting a single bit.

Signed-off-by: Joakim Gebart <joakim.gebart@eistec.se>