Simplify code a bit, no functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211985 91177308-0d34-0410-b5e6-96231b3b80d8
Use a range loop. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211986 91177308-0d34-0410-b5e6-96231b3b80d8
Add ops() method to SDNode that returns an ArrayRef<SDUse>. Use it to simplify some code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211993 91177308-0d34-0410-b5e6-96231b3b80d8
MC: rename EmitWin64EH routines

Rename the routines to reflect the reality that they are more related to call
frame information than to Win64 EH. Although EH is implemented in an intertwined
manner by augmenting with an exception handler and an associated parameter, the
majority of these routines emit information required to unwind the frames. This
also helps identify that these routines are generic for most windows platforms
(they apply equally to nearly all architectures except x86) although the
encoding of the information is architecture dependent.

Unwinding data is emitted via EmitWinCFI* and exception handling information via
EmitWinEH*.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211994 91177308-0d34-0410-b5e6-96231b3b80d8
CodeGen: rename Win64 ExceptionHandling to WinEH

This exception format is not specific to Windows x64.  A similar approach is
taken on nearly all architectures.  Generalise the name to reflect reality.
This will eventually be used for Windows on ARM data emission as well.

Switch the enum and namespace into an enum class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212000 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: use symbolic name for constant

This just changes the constant value to the symbolic name corresponding to it.
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212011 91177308-0d34-0410-b5e6-96231b3b80d8
X86: fix comment

Fix a comment typo `DbgLocLImport` instead of `DLLImport`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212012 91177308-0d34-0410-b5e6-96231b3b80d8
test commit: add a comment line in GVN test file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212019 91177308-0d34-0410-b5e6-96231b3b80d8
test commit (whitespace only)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212020 91177308-0d34-0410-b5e6-96231b3b80d8
undo test commit (whitespace only)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212021 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: take care not to set the ThumbFunc bit on TLS data symbols

This fixes LNT SingleSource/UnitTests/Threads with -mthumb.

Differential Revision: http://reviews.llvm.org/D4324


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212029 91177308-0d34-0410-b5e6-96231b3b80d8
macho-dump: add code to print LC_ID_DYLIB load commands.

I want to check them in lld.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212043 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] Convert mul x, -(pow2 +/- 1) to shift + add/sub.

The combine for mul x, pow2 +/- 1 is unchanged. Test cases for
both combines as well as mul x, pow2 have been added as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212044 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] Unsized types don't specify an alignment.
PR20109

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212045 91177308-0d34-0410-b5e6-96231b3b80d8
[OCaml] Documentation improvements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212048 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] Add support for builtin to read performance monitoring counters.

This patch adds support for a new builtin instruction called
__builtin_ia32_rdpmc.

Builtin '__builtin_ia32_rdpmc' is defined as a 'GCC builtin'; on X86, it can
be used to read performance monitoring counters. It takes as input the index
of the performance counter to read, and returns the value of the specified
performance counter as a 64-bit number.

Calls to this new builtin will map to instruction RDPMC.
The index in input to the builtin call is moved to register %ECX. The result
of the builtin call is the value of the specified performance counter (RDPMC
would return that quantity in registers RDX:RAX).

This patch:
 - Adds builtin int_x86_rdpmc as a GCCBuiltin;
 - Adds a new x86 DAG node called 'RDPMC_DAG';
 - Teaches how to lower this new builtin;
 - Adds an ISel pattern to select instruction RDPMC;
 - Fixes the definition of instruction RDPMC adding %RAX and %RDX as
   implicit definitions, and adding %ECX as implicit use;
 - Adds a LLVM test to verify that the new builtin is correctly selected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212049 91177308-0d34-0410-b5e6-96231b3b80d8
Debug info: split out complex DIVariable address expressions into a
separate MDNode so they can be uniqued via folding set magic. To conserve
space, DIVariable nodes are still variable-length, with the last two
fields being optional.

No functional change.
http://reviews.llvm.org/D3526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212050 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Remove unused declarations leftover from AMDIL

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212051 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Move mul combine to separate function

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212052 91177308-0d34-0410-b5e6-96231b3b80d8
Add the -arch flag support to llvm-nm to select the slice out of a Mach-O
universal file.  This also includes support for -arch all, selecting the host
architecture by default from a universal file and checking if -arch is used
with a standard Mach-O it matches that architecture.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212054 91177308-0d34-0410-b5e6-96231b3b80d8