begin adding UART component.
Write letters to UART @ ~1Hz for debugging.
update simulation to use actual container instead of a parallel
implementation of container.
set outputs for uart debugging version of container.
fix uart TX timer calculation.
add extra source files to project.
add uart files to simulation command line
make compatible with ghdl simulation.
add activity LED to debug monitor.
add generation of bitstream for UART.
cleanup pllclock.  make note for simulation of uart monitor
interface (clock issue).
implement UART receiver.